1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck %s --check-prefix=TERM_DEBUG
5 // expected-no-diagnostics
6 #ifndef HEADER
7 #define HEADER
8 
9 long long get_val() { return 0; }
10 double *g_ptr;
11 
12 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
13 void simple(float *a, float *b, float *c, float *d) {
14   #pragma omp for simd
15 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
16 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
17 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
18 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
19 // CHECK: [[TRUE]]:
20 // CHECK: br label %[[SWITCH:[^,]+]]
21 // CHECK: [[FALSE]]:
22 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
23 // CHECK: br label %[[SWITCH]]
24 // CHECK: [[SWITCH]]:
25 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
26 // CHECK: store i32 [[UP]], i32* [[UB]],
27 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
28 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
29 
30 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
31 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
32 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
33 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
34   for (int i = 3; i < 32; i += 5) {
35 // CHECK: [[SIMPLE_LOOP1_BODY]]:
36 // Start of body: calculate i from IV:
37 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
38 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
39 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
40 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
41 // ... loop body ...
42 // End of body: store into a[i]:
43 // CHECK: store float [[RESULT:%.+]], float*
44     a[i] = b[i] * c[i] * d[i];
45 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
46 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
47 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
48 // br label %{{.+}}, !llvm.loop !{{.+}}
49   }
50 // CHECK: [[SIMPLE_LOOP1_END]]:
51 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
52 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
53 
54   long long k = get_val();
55 
56   #pragma omp for simd linear(k : 3) schedule(simd, nonmonotonic: dynamic)
57 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
58 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
59 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]]
60 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
61 
62 // CHECK: call void @__kmpc_dispatch_init_4(%ident_t* {{.+}}, i32 %{{.+}}, i32 1073741859, i32 0, i32 8, i32 1, i32 1)
63 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
64 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
65 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
66 // CHECK: [[CONT]]:
67 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
68 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
69 
70 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
71 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
72 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
73 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
74   for (int i = 10; i > 1; i--) {
75 // CHECK: [[SIMPLE_LOOP2_BODY]]:
76 // Start of body: calculate i from IV:
77 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
78 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
79 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
80 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
81 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
82 //
83 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
84 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
85 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
86 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
87 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
88 // Update of the privatized version of linear variable!
89 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
90     a[k]++;
91     k = k + 3;
92 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
93 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
94 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
95 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
96   }
97 // CHECK: [[SIMPLE_LOOP2_END]]:
98 //
99 // Update linear vars after loop, as the loop was operating on a private version.
100 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
101 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
102 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* [[K_VAR]]
103 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
104 
105   int lin = 12;
106   #pragma omp for simd linear(lin : get_val()), linear(g_ptr)
107 
108 // Init linear private var.
109 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
110 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
111 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
112 // Remember linear step.
113 // CHECK: [[CALL_VAL:%.+]] = invoke
114 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
115 
116 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]]
117 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
118 
119 // CHECK: call void @__kmpc_for_static_init_8u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
120 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
121 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
122 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
123 // CHECK: [[TRUE]]:
124 // CHECK: br label %[[SWITCH:[^,]+]]
125 // CHECK: [[FALSE]]:
126 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
127 // CHECK: br label %[[SWITCH]]
128 // CHECK: [[SWITCH]]:
129 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
130 // CHECK: store i64 [[UP]], i64* [[UB]],
131 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
132 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]],
133 
134 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]
135 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
136 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
137 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
138   for (unsigned long long it = 2000; it >= 600; it-=400) {
139 // CHECK: [[SIMPLE_LOOP3_BODY]]:
140 // Start of body: calculate it from IV:
141 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
142 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
143 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
144 // CHECK-NEXT: store i64 [[LC_IT_2]], i64*
145 //
146 // Linear start and step are used to calculate current value of the linear variable.
147 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
148 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
149 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]],
150 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
151 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]
152 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
153 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
154 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]
155     *g_ptr++ = 0.0;
156 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]
157 // CHECK: store double{{.*}}[[GEP_VAL]]
158     a[it + lin]++;
159 // CHECK: [[FLT_INC:%.+]] = fadd float
160 // CHECK-NEXT: store float [[FLT_INC]],
161 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]
162 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
163 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
164   }
165 // CHECK: [[SIMPLE_LOOP3_END]]:
166 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
167 //
168 // Linear start and step are used to calculate final value of the linear variables.
169 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
170 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
171 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
172 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
173 // CHECK: store double* {{.*}}[[GLIN_VAR]]
174 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
175 
176   #pragma omp for simd
177 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
178 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
179 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
180 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
181 // CHECK: [[TRUE]]:
182 // CHECK: br label %[[SWITCH:[^,]+]]
183 // CHECK: [[FALSE]]:
184 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
185 // CHECK: br label %[[SWITCH]]
186 // CHECK: [[SWITCH]]:
187 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
188 // CHECK: store i32 [[UP]], i32* [[UB]],
189 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
190 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]],
191 
192 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]
193 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
194 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
195 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
196   for (short it = 6; it <= 20; it-=-4) {
197 // CHECK: [[SIMPLE_LOOP4_BODY]]:
198 // Start of body: calculate it from IV:
199 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
200 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
201 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
202 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
203 // CHECK-NEXT: store i16 [[LC_IT_3]], i16*
204 
205 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]
206 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
207 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
208   }
209 // CHECK: [[SIMPLE_LOOP4_END]]:
210 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
211 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
212 
213   #pragma omp for simd
214 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
215 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
216 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
217 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
218 // CHECK: [[TRUE]]:
219 // CHECK: br label %[[SWITCH:[^,]+]]
220 // CHECK: [[FALSE]]:
221 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
222 // CHECK: br label %[[SWITCH]]
223 // CHECK: [[SWITCH]]:
224 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
225 // CHECK: store i32 [[UP]], i32* [[UB]],
226 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
227 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]],
228 
229 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]
230 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
231 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
232 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
233   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
234 // CHECK: [[SIMPLE_LOOP5_BODY]]:
235 // Start of body: calculate it from IV:
236 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
237 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
238 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
239 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
240 // CHECK-NEXT: store i8 [[LC_IT_2]], i8*
241 
242 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]
243 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
244 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
245   }
246 // CHECK: [[SIMPLE_LOOP5_END]]:
247 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
248 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
249 
250 // CHECK-NOT: mul i32 %{{.+}}, 10
251   #pragma omp for simd
252   for (unsigned i=100; i<10; i+=10) {
253   }
254 
255   int A;
256   #pragma omp parallel
257   {
258   // CHECK: store i32 -1, i32* [[A:%.+]],
259   A = -1;
260   #pragma omp for simd lastprivate(A)
261 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
262 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
263 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
264 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
265 // CHECK: [[TRUE]]:
266 // CHECK: br label %[[SWITCH:[^,]+]]
267 // CHECK: [[FALSE]]:
268 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
269 // CHECK: br label %[[SWITCH]]
270 // CHECK: [[SWITCH]]:
271 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
272 // CHECK: store i64 [[UP]], i64* [[UB]],
273 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
274 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
275 
276 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
277 // CHECK: [[SIMD_LOOP7_COND]]:
278 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
279 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
280 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
281 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
282   for (long long i = -10; i < 10; i += 3) {
283 // CHECK: [[SIMPLE_LOOP7_BODY]]:
284 // Start of body: calculate i from IV:
285 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
286 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
287 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
288 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
289 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
290 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
291 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],
292     A = i;
293 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]
294 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
295 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
296   }
297 // CHECK: [[SIMPLE_LOOP7_END]]:
298 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
299 // CHECK: load i32, i32*
300 // CHECK: icmp ne i32 %{{.+}}, 0
301 // CHECK: br i1 %{{.+}}, label
302 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
303 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}},
304 // CHECK-NEXT: br label
305 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
306   }
307   int R;
308   #pragma omp parallel
309   {
310   // CHECK: store i32 -1, i32* [[R:%[^,]+]],
311   R = -1;
312 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
313   #pragma omp for simd reduction(*:R)
314 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
315 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
316 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
317 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
318 // CHECK: [[TRUE]]:
319 // CHECK: br label %[[SWITCH:[^,]+]]
320 // CHECK: [[FALSE]]:
321 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
322 // CHECK: br label %[[SWITCH]]
323 // CHECK: [[SWITCH]]:
324 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
325 // CHECK: store i64 [[UP]], i64* [[UB]],
326 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
327 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
328 
329 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
330 // CHECK: [[SIMD_LOOP8_COND]]:
331 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
332 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
333 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
334 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
335   for (long long i = -10; i < 10; i += 3) {
336 // CHECK: [[SIMPLE_LOOP8_BODY]]:
337 // Start of body: calculate i from IV:
338 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
339 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
340 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
341 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
342 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
343 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],
344     R *= i;
345 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]
346 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
347 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
348   }
349 // CHECK: [[SIMPLE_LOOP8_END]]:
350 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
351 // CHECK: call i32 @__kmpc_reduce(
352 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
353 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]
354 // CHECK-NEXT: store i32 [[RED]], i32* %{{.+}},
355 // CHECK-NEXT: call void @__kmpc_end_reduce(
356 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
357   }
358 }
359 
360 template <class T, unsigned K> T tfoo(T a) { return a + K; }
361 
362 template <typename T, unsigned N>
363 int templ1(T a, T *z) {
364   #pragma omp for simd collapse(N) schedule(simd: static, N)
365   for (int i = 0; i < N * 2; i++) {
366     for (long long j = 0; j < (N + N + N + N); j += 2) {
367       z[i + j] = a + tfoo<T, N>(i + j);
368     }
369   }
370   return 0;
371 }
372 
373 // Instatiation templ1<float,2>
374 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
375 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 45, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 2)
376 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
377 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
378 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
379 // CHECK: [[TRUE]]:
380 // CHECK: br label %[[SWITCH:[^,]+]]
381 // CHECK: [[FALSE]]:
382 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
383 // CHECK: br label %[[SWITCH]]
384 // CHECK: [[SWITCH]]:
385 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
386 // CHECK: store i64 [[UP]], i64* [[UB]],
387 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
388 // CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
389 
390 // ...
391 // CHECK: icmp sle i64
392 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
393 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
394 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
395 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
396 // CHECK: [[T1_BODY]]:
397 // Loop counters i and j updates:
398 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
399 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
400 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
401 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
402 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
403 // CHECK-NEXT: store i32 [[I_2]], i32*
404 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]
405 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
406 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
407 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
408 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64*
409 // simd.for.inc:
410 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]
411 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
412 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]
413 // CHECK-NEXT: br label {{%.+}}
414 // CHECK: [[T1_END]]:
415 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
416 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
417 // CHECK: ret i32 0
418 //
419 void inst_templ1() {
420   float a;
421   float z[100];
422   templ1<float,2> (a, z);
423 }
424 
425 
426 typedef int MyIdx;
427 
428 class IterDouble {
429   double *Ptr;
430 public:
431   IterDouble operator++ () const {
432     IterDouble n;
433     n.Ptr = Ptr + 1;
434     return n;
435   }
436   bool operator < (const IterDouble &that) const {
437     return Ptr < that.Ptr;
438   }
439   double & operator *() const {
440     return *Ptr;
441   }
442   MyIdx operator - (const IterDouble &that) const {
443     return (MyIdx) (Ptr - that.Ptr);
444   }
445   IterDouble operator + (int Delta) {
446     IterDouble re;
447     re.Ptr = Ptr + Delta;
448     return re;
449   }
450 
451   ///~IterDouble() {}
452 };
453 
454 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
455 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
456 //
457 // Calculate number of iterations before the loop body.
458 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
459 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
460 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
461 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
462 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
463 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
464   #pragma omp for simd
465 
466 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
467 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
468 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
469 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
470 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
471 // CHECK: [[TRUE]]:
472 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
473 // CHECK: br label %[[SWITCH:[^,]+]]
474 // CHECK: [[FALSE]]:
475 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
476 // CHECK: br label %[[SWITCH]]
477 // CHECK: [[SWITCH]]:
478 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
479 // CHECK: store i32 [[UP]], i32* [[UB]],
480 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
481 // CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]],
482 
483 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]
484 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
485 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
486 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
487   for (IterDouble i = ia; i < ib; ++i) {
488 // CHECK: [[IT_BODY]]:
489 // Start of body: calculate i from index:
490 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
491 // Call of operator+ (i, IV).
492 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
493 // ... loop body ...
494    *i = *ic * 0.5;
495 // Float multiply and save result.
496 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
497 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
498 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]]
499    ++ic;
500 //
501 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]
502 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
503 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
504 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
505   }
506 // CHECK: [[IT_END]]:
507 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
508 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
509 // CHECK: ret void
510 }
511 
512 
513 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
514 void collapsed(float *a, float *b, float *c, float *d) {
515   int i; // outer loop counter
516   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
517   // k declared in the loop init below
518   short l; // inner loop counter
519 // CHECK: call void @__kmpc_for_static_init_4u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
520 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
521 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
522 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
523 // CHECK: [[TRUE]]:
524 // CHECK: br label %[[SWITCH:[^,]+]]
525 // CHECK: [[FALSE]]:
526 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
527 // CHECK: br label %[[SWITCH]]
528 // CHECK: [[SWITCH]]:
529 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
530 // CHECK: store i32 [[UP]], i32* [[UB]],
531 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
532 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
533 //
534   #pragma omp for simd collapse(4)
535 
536 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
537 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
538 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]
539 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
540   for (i = 1; i < 3; i++) // 2 iterations
541     for (j = 2u; j < 5u; j++) //3 iterations
542       for (int k = 3; k <= 6; k++) // 4 iterations
543         for (l = 4; l < 9; ++l) // 5 iterations
544         {
545 // CHECK: [[COLL1_BODY]]:
546 // Start of body: calculate i from index:
547 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
548 // Calculation of the loop counters values.
549 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
550 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
551 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
552 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
553 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
554 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20
555 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3
556 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
557 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
558 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
559 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]
560 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5
561 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4
562 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1
563 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]]
564 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]]
565 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]
566 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5
567 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1
568 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]]
569 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
570 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
571 // ... loop body ...
572 // End of body: store into a[i]:
573 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
574     float res = b[j] * c[k];
575     a[i] = res * d[l];
576 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]
577 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
578 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
579 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
580 // CHECK: [[COLL1_END]]:
581   }
582 // i,j,l are updated; k is not updated.
583 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
584 // CHECK: br i1
585 // CHECK: store i32 3, i32*
586 // CHECK-NEXT: store i32 5,
587 // CHECK-NEXT: store i32 7,
588 // CHECK-NEXT: store i16 9, i16*
589 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
590 // CHECK: ret void
591 }
592 
593 extern char foo();
594 extern double globalfloat;
595 
596 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
597 void widened(float *a, float *b, float *c, float *d) {
598   int i; // outer loop counter
599   short j; // inner loop counter
600   globalfloat = 1.0;
601   int localint = 1;
602 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
603 // Counter is widened to 64 bits.
604 // CHECK:     [[MUL:%.+]] = mul nsw i64 2, %{{.+}}
605 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1
606 // CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]],
607 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
608 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
609 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
610 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
611 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
612 // CHECK: [[TRUE]]:
613 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
614 // CHECK: br label %[[SWITCH:[^,]+]]
615 // CHECK: [[FALSE]]:
616 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
617 // CHECK: br label %[[SWITCH]]
618 // CHECK: [[SWITCH]]:
619 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
620 // CHECK: store i64 [[UP]], i64* [[UB]],
621 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
622 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]],
623 //
624   #pragma omp for simd collapse(2) private(globalfloat, localint)
625 
626 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
627 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
628 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
629 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
630   for (i = 1; i < 3; i++) // 2 iterations
631     for (j = 0; j < foo(); j++) // foo() iterations
632   {
633 // CHECK: [[WIDE1_BODY]]:
634 // Start of body: calculate i from index:
635 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
636 // Calculation of the loop counters values...
637 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
638 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]
639 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
640 // ... loop body ...
641 //
642 // Here we expect store into private double var, not global
643 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
644     globalfloat = (float)j/i;
645     float res = b[j] * c[j];
646 // Store into a[i]:
647 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
648     a[i] = res * d[i];
649 // Then there's a store into private var localint:
650 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]
651     localint = (int)j;
652 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]
653 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
654 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
655 //
656 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
657 // CHECK: [[WIDE1_END]]:
658   }
659 // i,j are updated.
660 // CHECK: store i32 3, i32* [[I:%[^,]+]]
661 // CHECK: store i16
662 //
663 // Here we expect store into original localint, not its privatized version.
664 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
665   localint = (int)j;
666 // CHECK: ret void
667 }
668 
669 // TERM_DEBUG-LABEL: bar
670 int bar() {return 0;};
671 
672 // TERM_DEBUG-LABEL: parallel_simd
673 void parallel_simd(float *a) {
674 #pragma omp parallel
675 #pragma omp for simd
676   // TERM_DEBUG-NOT: __kmpc_global_thread_num
677   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
678   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
679   // TERM_DEBUG-NOT: __kmpc_global_thread_num
680   // TERM_DEBUG:     [[TERM_LPAD]]
681   // TERM_DEBUG:     call void @__clang_call_terminate
682   // TERM_DEBUG:     unreachable
683   for (unsigned i = 131071; i <= 2147483647; i += 127)
684     a[i] += bar();
685 }
686 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
687 #endif // HEADER
688