1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 enum omp_allocator_handle_t { 18 omp_null_allocator = 0, 19 omp_default_mem_alloc = 1, 20 omp_large_cap_mem_alloc = 2, 21 omp_const_mem_alloc = 3, 22 omp_high_bw_mem_alloc = 4, 23 omp_low_lat_mem_alloc = 5, 24 omp_cgroup_mem_alloc = 6, 25 omp_pteam_mem_alloc = 7, 26 omp_thread_mem_alloc = 8, 27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 28 }; 29 30 template <class T> 31 struct S { 32 T f; 33 S(T a) : f(a) {} 34 S() : f() {} 35 S<T> &operator=(const S<T> &); 36 operator T() { return T(); } 37 ~S() {} 38 }; 39 40 volatile int g = 1212; 41 volatile int &g1 = g; 42 float f; 43 char cnt; 44 45 struct SS { 46 int a; 47 int b : 4; 48 int &c; 49 SS(int &d) : a(0), b(0), c(d) { 50 #pragma omp parallel 51 #pragma omp for linear(a, b, c) 52 for (int i = 0; i < 2; ++i) 53 #ifdef LAMBDA 54 [&]() { 55 ++this->a, --b, (this)->c /= 1; 56 #pragma omp parallel 57 #pragma omp for linear(a, b) linear(ref(c)) 58 for (int i = 0; i < 2; ++i) 59 ++(this)->a, --b, this->c /= 1; 60 }(); 61 #elif defined(BLOCKS) 62 ^{ 63 ++a; 64 --this->b; 65 (this)->c /= 1; 66 #pragma omp parallel 67 #pragma omp for linear(a, b) linear(uval(c)) 68 for (int i = 0; i < 2; ++i) 69 ++(this)->a, --b, this->c /= 1; 70 }(); 71 #else 72 ++this->a, --b, c /= 1; 73 #endif 74 } 75 }; 76 77 template <typename T> 78 struct SST { 79 T a; 80 SST() : a(T()) { 81 #pragma omp parallel 82 #pragma omp for linear(a) 83 for (int i = 0; i < 2; ++i) 84 #ifdef LAMBDA 85 [&]() { 86 [&]() { 87 ++this->a; 88 #pragma omp parallel 89 #pragma omp for linear(a) 90 for (int i = 0; i < 2; ++i) 91 ++(this)->a; 92 }(); 93 }(); 94 #elif defined(BLOCKS) 95 ^{ 96 ^{ 97 ++a; 98 #pragma omp parallel 99 #pragma omp for linear(a) 100 for (int i = 0; i < 2; ++i) 101 ++(this)->a; 102 }(); 103 }(); 104 #else 105 ++(this)->a; 106 #endif 107 } 108 }; 109 110 template <typename T> 111 T tmain() { 112 S<T> test; 113 SST<T> sst; 114 T *pvar = &test.f; 115 T &lvar = test.f; 116 #pragma omp parallel 117 #pragma omp for linear(pvar, lvar) 118 for (int i = 0; i < 2; ++i) { 119 ++pvar, ++lvar; 120 } 121 return T(); 122 } 123 124 int main() { 125 static int sivar; 126 SS ss(sivar); 127 #ifdef LAMBDA 128 [&]() { 129 #pragma omp parallel 130 #pragma omp for linear(g, g1:5) 131 for (int i = 0; i < 2; ++i) { 132 133 134 135 g += 5; 136 g1 += 5; 137 [&]() { 138 g = 2; 139 g1 = 2; 140 }(); 141 } 142 }(); 143 return 0; 144 #elif defined(BLOCKS) 145 ^{ 146 #pragma omp parallel 147 #pragma omp for linear(g, g1:5) 148 for (int i = 0; i < 2; ++i) { 149 g += 5; 150 g1 += 5; 151 g = 1; 152 g1 = 5; 153 ^{ 154 g = 2; 155 g1 = 2; 156 }(); 157 } 158 }(); 159 return 0; 160 161 162 #else 163 S<float> test; 164 float *pvar = &test.f; 165 long long lvar = 0; 166 #pragma omp parallel 167 #pragma omp for linear(pvar, lvar : 3) allocate(omp_low_lat_mem_alloc: lvar) 168 for (int i = 0; i < 2; ++i) { 169 pvar += 3, lvar += 3; 170 } 171 return tmain<int>(); 172 #endif 173 } 174 175 176 177 // Check for default initialization. 178 179 180 181 182 183 // Check for default initialization. 184 185 #endif 186 187 // CHECK1-LABEL: define {{[^@]+}}@main 188 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 189 // CHECK1-NEXT: entry: 190 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 192 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 193 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 194 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 195 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 196 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 197 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 198 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 199 // CHECK1-NEXT: store float* [[F]], float** [[PVAR]], align 8 200 // CHECK1-NEXT: store i64 0, i64* [[LVAR]], align 8 201 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, i64*)* @.omp_outlined. to void (i32*, i32*, ...)*), float** [[PVAR]], i64* [[LVAR]]) 202 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 203 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 204 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4 206 // CHECK1-NEXT: ret i32 [[TMP0]] 207 // 208 // 209 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 210 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 211 // CHECK1-NEXT: entry: 212 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 213 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 214 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 215 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 216 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 217 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 218 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 219 // CHECK1-NEXT: ret void 220 // 221 // 222 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 223 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 224 // CHECK1-NEXT: entry: 225 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 226 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 227 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 229 // CHECK1-NEXT: ret void 230 // 231 // 232 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 233 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], float** noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i64* noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] { 234 // CHECK1-NEXT: entry: 235 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 236 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca float**, align 8 238 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca i64*, align 8 239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 242 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 243 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 248 // CHECK1-NEXT: [[PVAR2:%.*]] = alloca float*, align 8 249 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 250 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 251 // CHECK1-NEXT: store float** [[PVAR]], float*** [[PVAR_ADDR]], align 8 252 // CHECK1-NEXT: store i64* [[LVAR]], i64** [[LVAR_ADDR]], align 8 253 // CHECK1-NEXT: [[TMP0:%.*]] = load float**, float*** [[PVAR_ADDR]], align 8 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i64*, i64** [[LVAR_ADDR]], align 8 255 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[TMP0]], align 8 256 // CHECK1-NEXT: store float* [[TMP2]], float** [[DOTLINEAR_START]], align 8 257 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 258 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[DOTLINEAR_START1]], align 8 259 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 261 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 262 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 264 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 265 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 266 // CHECK1-NEXT: [[DOTLVAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP5]], i64 8, i8* inttoptr (i64 5 to i8*)) 267 // CHECK1-NEXT: [[DOTLVAR__ADDR:%.*]] = bitcast i8* [[DOTLVAR__VOID_ADDR]] to i64* 268 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 269 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 270 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 271 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 272 // CHECK1: cond.true: 273 // CHECK1-NEXT: br label [[COND_END:%.*]] 274 // CHECK1: cond.false: 275 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 276 // CHECK1-NEXT: br label [[COND_END]] 277 // CHECK1: cond.end: 278 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 279 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 281 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 283 // CHECK1: omp.inner.for.cond: 284 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 285 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 287 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 288 // CHECK1: omp.inner.for.cond.cleanup: 289 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 290 // CHECK1: omp.inner.for.body: 291 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 292 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 293 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 294 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 295 // CHECK1-NEXT: [[TMP12:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 296 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 297 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP13]], 3 298 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL4]] to i64 299 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP12]], i64 [[IDX_EXT]] 300 // CHECK1-NEXT: store float* [[ADD_PTR]], float** [[PVAR2]], align 8 301 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 302 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], 3 304 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL5]] to i64 305 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP14]], [[CONV]] 306 // CHECK1-NEXT: store i64 [[ADD6]], i64* [[DOTLVAR__ADDR]], align 8 307 // CHECK1-NEXT: [[TMP16:%.*]] = load float*, float** [[PVAR2]], align 8 308 // CHECK1-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds float, float* [[TMP16]], i64 3 309 // CHECK1-NEXT: store float* [[ADD_PTR7]], float** [[PVAR2]], align 8 310 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 311 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP17]], 3 312 // CHECK1-NEXT: store i64 [[ADD8]], i64* [[DOTLVAR__ADDR]], align 8 313 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 314 // CHECK1: omp.body.continue: 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 316 // CHECK1: omp.inner.for.inc: 317 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 319 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 321 // CHECK1: omp.inner.for.end: 322 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 323 // CHECK1: omp.loop.exit: 324 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 325 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i64* [[DOTLVAR__ADDR]] to i8* 326 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP5]], i8* [[TMP19]], i8* inttoptr (i64 5 to i8*)) 327 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 328 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 329 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 330 // CHECK1: .omp.linear.pu: 331 // CHECK1-NEXT: [[TMP22:%.*]] = load float*, float** [[PVAR2]], align 8 332 // CHECK1-NEXT: store float* [[TMP22]], float** [[TMP0]], align 8 333 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 334 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP1]], align 8 335 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 336 // CHECK1: .omp.linear.pu.done: 337 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 342 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 343 // CHECK1-NEXT: entry: 344 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 345 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 346 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 347 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32*, align 8 348 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 349 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]]) 350 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 351 // CHECK1-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 352 // CHECK1-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 353 // CHECK1-NEXT: store i32* [[F1]], i32** [[LVAR]], align 8 354 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[LVAR]], align 8 355 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32**, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32** [[PVAR]], i32* [[TMP0]]) 356 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 357 // CHECK1-NEXT: ret i32 0 358 // 359 // 360 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 361 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 362 // CHECK1-NEXT: entry: 363 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 364 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 365 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 366 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 367 // CHECK1-NEXT: ret void 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 371 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 374 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 375 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 376 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 377 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 378 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 379 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 380 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 381 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 382 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 383 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 384 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 385 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 386 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 387 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 388 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 389 // CHECK1-NEXT: ret void 390 // 391 // 392 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 393 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 394 // CHECK1-NEXT: entry: 395 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 396 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 397 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 398 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 399 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[C:%.*]] = alloca i32*, align 8 401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 402 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 403 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 408 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 412 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 413 // CHECK1-NEXT: [[A7:%.*]] = alloca i32, align 4 414 // CHECK1-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 415 // CHECK1-NEXT: [[B9:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: [[C10:%.*]] = alloca i32, align 4 417 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 418 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 419 // CHECK1-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 420 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 421 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 422 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 423 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 424 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 425 // CHECK1-NEXT: store i32* [[A1]], i32** [[A]], align 8 426 // CHECK1-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 427 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 428 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 429 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 430 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 431 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 432 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 433 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 434 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 435 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 436 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 437 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 438 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 439 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 440 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 441 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 442 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 443 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 444 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 445 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 446 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 447 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 448 // CHECK1-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 449 // CHECK1-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 450 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 451 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 452 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 453 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 454 // CHECK1: cond.true: 455 // CHECK1-NEXT: br label [[COND_END:%.*]] 456 // CHECK1: cond.false: 457 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 458 // CHECK1-NEXT: br label [[COND_END]] 459 // CHECK1: cond.end: 460 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 461 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 462 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 463 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 464 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 465 // CHECK1: omp.inner.for.cond: 466 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 467 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 468 // CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 469 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 470 // CHECK1: omp.inner.for.body: 471 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 472 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 473 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 474 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 475 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 476 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 477 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 478 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 479 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 480 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 481 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 482 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 483 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 484 // CHECK1-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 485 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 486 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 487 // CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 488 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 489 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 490 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[_TMP8]], align 8 491 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 492 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1 493 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP23]], align 4 494 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[B9]], align 4 495 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1 496 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 497 // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[_TMP11]], align 8 498 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 499 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1 500 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP26]], align 4 501 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 502 // CHECK1: omp.body.continue: 503 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 504 // CHECK1: omp.inner.for.inc: 505 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 506 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP28]], 1 507 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 508 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 509 // CHECK1: omp.inner.for.end: 510 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 511 // CHECK1: omp.loop.exit: 512 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 513 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 514 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 515 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 516 // CHECK1: .omp.linear.pu: 517 // CHECK1-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP]], align 8 518 // CHECK1-NEXT: store i32* [[TMP31]], i32** [[_TMP20]], align 8 519 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[A7]], align 4 520 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP20]], align 8 521 // CHECK1-NEXT: store i32 [[TMP32]], i32* [[TMP33]], align 4 522 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[B9]], align 4 523 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[B]], align 4 524 // CHECK1-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP3]], align 8 525 // CHECK1-NEXT: store i32* [[TMP35]], i32** [[_TMP21]], align 8 526 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[C10]], align 4 527 // CHECK1-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP21]], align 8 528 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[TMP37]], align 4 529 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[B]], align 4 530 // CHECK1-NEXT: [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 531 // CHECK1-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8 532 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4 533 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15 534 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 535 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 536 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B22]], align 4 537 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 538 // CHECK1: .omp.linear.pu.done: 539 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 540 // CHECK1-NEXT: ret void 541 // 542 // 543 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 544 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 545 // CHECK1-NEXT: entry: 546 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 547 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 548 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 549 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 550 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 551 // CHECK1-NEXT: ret void 552 // 553 // 554 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 555 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 556 // CHECK1-NEXT: entry: 557 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 558 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 559 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 560 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 561 // CHECK1-NEXT: ret void 562 // 563 // 564 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 565 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 566 // CHECK1-NEXT: entry: 567 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 568 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 569 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 570 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 571 // CHECK1-NEXT: ret void 572 // 573 // 574 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 575 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] { 576 // CHECK1-NEXT: entry: 577 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 578 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 579 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca i32**, align 8 580 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca i32*, align 8 581 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 582 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 583 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 584 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 585 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 586 // CHECK1-NEXT: [[DOTLINEAR_START3:%.*]] = alloca i32, align 4 587 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 588 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 589 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 590 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 591 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 592 // CHECK1-NEXT: [[PVAR4:%.*]] = alloca i32*, align 8 593 // CHECK1-NEXT: [[LVAR5:%.*]] = alloca i32, align 4 594 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 595 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32*, align 8 596 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 597 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 598 // CHECK1-NEXT: store i32** [[PVAR]], i32*** [[PVAR_ADDR]], align 8 599 // CHECK1-NEXT: store i32* [[LVAR]], i32** [[LVAR_ADDR]], align 8 600 // CHECK1-NEXT: [[TMP0:%.*]] = load i32**, i32*** [[PVAR_ADDR]], align 8 601 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[LVAR_ADDR]], align 8 602 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 603 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 604 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[_TMP1]], align 8 605 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP0]], align 8 606 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[DOTLINEAR_START]], align 8 607 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 608 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 609 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START3]], align 4 610 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 611 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 612 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 613 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 614 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 615 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 616 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 617 // CHECK1-NEXT: store i32* [[LVAR5]], i32** [[_TMP6]], align 8 618 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 619 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 620 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 621 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 622 // CHECK1: cond.true: 623 // CHECK1-NEXT: br label [[COND_END:%.*]] 624 // CHECK1: cond.false: 625 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 626 // CHECK1-NEXT: br label [[COND_END]] 627 // CHECK1: cond.end: 628 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 629 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 630 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 631 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 632 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 633 // CHECK1: omp.inner.for.cond: 634 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 635 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 636 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 637 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 638 // CHECK1: omp.inner.for.body: 639 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 640 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 641 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 642 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 643 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 644 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 645 // CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP15]], 1 646 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL8]] to i64 647 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP14]], i64 [[IDX_EXT]] 648 // CHECK1-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR4]], align 8 649 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTLINEAR_START3]], align 4 650 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 651 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], 1 652 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], [[MUL9]] 653 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[LVAR5]], align 4 654 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[PVAR4]], align 8 655 // CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP18]], i32 1 656 // CHECK1-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR4]], align 8 657 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP6]], align 8 658 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 659 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 660 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP19]], align 4 661 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 662 // CHECK1: omp.body.continue: 663 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 664 // CHECK1: omp.inner.for.inc: 665 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 666 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 667 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 669 // CHECK1: omp.inner.for.end: 670 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 671 // CHECK1: omp.loop.exit: 672 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 673 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 674 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 675 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 676 // CHECK1: .omp.linear.pu: 677 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[PVAR4]], align 8 678 // CHECK1-NEXT: store i32* [[TMP24]], i32** [[TMP0]], align 8 679 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP1]], align 8 680 // CHECK1-NEXT: store i32* [[TMP25]], i32** [[_TMP12]], align 8 681 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[LVAR5]], align 4 682 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP12]], align 8 683 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[TMP27]], align 4 684 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 685 // CHECK1: .omp.linear.pu.done: 686 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 687 // CHECK1-NEXT: ret void 688 // 689 // 690 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 691 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 692 // CHECK1-NEXT: entry: 693 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 694 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 695 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 696 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 697 // CHECK1-NEXT: ret void 698 // 699 // 700 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 701 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 702 // CHECK1-NEXT: entry: 703 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 704 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 705 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 706 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 707 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 708 // CHECK1-NEXT: ret void 709 // 710 // 711 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 712 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 713 // CHECK1-NEXT: entry: 714 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 715 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 716 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 717 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 718 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 719 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 720 // CHECK1-NEXT: ret void 721 // 722 // 723 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 724 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]]) #[[ATTR2]] { 725 // CHECK1-NEXT: entry: 726 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 727 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 728 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 729 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 730 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 731 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 737 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 738 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 739 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4 740 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 741 // CHECK1-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 742 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 744 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 745 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 746 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0 747 // CHECK1-NEXT: store i32* [[A1]], i32** [[A]], align 8 748 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A]], align 8 749 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 750 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 751 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 752 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 753 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 754 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 755 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 756 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 757 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 758 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 759 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 760 // CHECK1-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 761 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 762 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 763 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 764 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 765 // CHECK1: cond.true: 766 // CHECK1-NEXT: br label [[COND_END:%.*]] 767 // CHECK1: cond.false: 768 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 769 // CHECK1-NEXT: br label [[COND_END]] 770 // CHECK1: cond.end: 771 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 772 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 773 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 774 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 776 // CHECK1: omp.inner.for.cond: 777 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 778 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 779 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 780 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 781 // CHECK1: omp.inner.for.body: 782 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 783 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 784 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 785 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 786 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 787 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 788 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1 789 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]] 790 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[A3]], align 4 791 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP4]], align 8 792 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 793 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 794 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 795 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 796 // CHECK1: omp.body.continue: 797 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 798 // CHECK1: omp.inner.for.inc: 799 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 801 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 802 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 803 // CHECK1: omp.inner.for.end: 804 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 805 // CHECK1: omp.loop.exit: 806 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 807 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 808 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 809 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 810 // CHECK1: .omp.linear.pu: 811 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[TMP]], align 8 812 // CHECK1-NEXT: store i32* [[TMP19]], i32** [[_TMP9]], align 8 813 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[A3]], align 4 814 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[_TMP9]], align 8 815 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[TMP21]], align 4 816 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 817 // CHECK1: .omp.linear.pu.done: 818 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 819 // CHECK1-NEXT: ret void 820 // 821 // 822 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 823 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 824 // CHECK1-NEXT: entry: 825 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 826 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 827 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 828 // CHECK1-NEXT: ret void 829 // 830 // 831 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 832 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 833 // CHECK1-NEXT: entry: 834 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 835 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 836 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 837 // CHECK1-NEXT: ret void 838 // 839 // 840 // CHECK3-LABEL: define {{[^@]+}}@main 841 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 842 // CHECK3-NEXT: entry: 843 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 844 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 845 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 846 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 847 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 848 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 849 // CHECK3-NEXT: ret i32 0 850 // 851 // 852 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 853 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 854 // CHECK3-NEXT: entry: 855 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 856 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 857 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 858 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 859 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 860 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 861 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 862 // CHECK3-NEXT: ret void 863 // 864 // 865 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 866 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 867 // CHECK3-NEXT: entry: 868 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 869 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 870 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 871 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 872 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 873 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 874 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 875 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 876 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 877 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 878 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 879 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 880 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 881 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 882 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 883 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 884 // CHECK3-NEXT: ret void 885 // 886 // 887 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 888 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 889 // CHECK3-NEXT: entry: 890 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 891 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 892 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 893 // CHECK3-NEXT: [[A:%.*]] = alloca i32*, align 8 894 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 895 // CHECK3-NEXT: [[C:%.*]] = alloca i32*, align 8 896 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 897 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 898 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 899 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 900 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 901 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 902 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 903 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 904 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 905 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 906 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 907 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 908 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4 909 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 910 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4 911 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4 912 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 913 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 914 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 915 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 916 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 917 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 918 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 919 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 920 // CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 921 // CHECK3-NEXT: store i32* [[A1]], i32** [[A]], align 8 922 // CHECK3-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 923 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 924 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 925 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 926 // CHECK3-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 927 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 928 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 929 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 930 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 931 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 932 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 933 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 934 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 935 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 936 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 937 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 938 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 939 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 940 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 941 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 942 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 943 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP10]]) 944 // CHECK3-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 945 // CHECK3-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 946 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 947 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 948 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 949 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 950 // CHECK3: cond.true: 951 // CHECK3-NEXT: br label [[COND_END:%.*]] 952 // CHECK3: cond.false: 953 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 954 // CHECK3-NEXT: br label [[COND_END]] 955 // CHECK3: cond.end: 956 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 957 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 958 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 959 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 960 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 961 // CHECK3: omp.inner.for.cond: 962 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 963 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 964 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 965 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 966 // CHECK3: omp.inner.for.body: 967 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 968 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 969 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 970 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 971 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 972 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 973 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 974 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 975 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 976 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 977 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 978 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 979 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 980 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 981 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 982 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 983 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 984 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 985 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 986 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 987 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP23]], align 8 988 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 989 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 990 // CHECK3-NEXT: store i32* [[TMP25]], i32** [[TMP24]], align 8 991 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 992 // CHECK3-NEXT: store i32* [[B9]], i32** [[TMP26]], align 8 993 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 994 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 995 // CHECK3-NEXT: store i32* [[TMP28]], i32** [[TMP27]], align 8 996 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 997 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 998 // CHECK3: omp.body.continue: 999 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1000 // CHECK3: omp.inner.for.inc: 1001 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1002 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP29]], 1 1003 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1004 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1005 // CHECK3: omp.inner.for.end: 1006 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1007 // CHECK3: omp.loop.exit: 1008 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 1009 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1010 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1011 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1012 // CHECK3: .omp.linear.pu: 1013 // CHECK3-NEXT: [[TMP32:%.*]] = load i32*, i32** [[TMP]], align 8 1014 // CHECK3-NEXT: store i32* [[TMP32]], i32** [[_TMP20]], align 8 1015 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[A7]], align 4 1016 // CHECK3-NEXT: [[TMP34:%.*]] = load i32*, i32** [[_TMP20]], align 8 1017 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[TMP34]], align 4 1018 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[B9]], align 4 1019 // CHECK3-NEXT: store i32 [[TMP35]], i32* [[B]], align 4 1020 // CHECK3-NEXT: [[TMP36:%.*]] = load i32*, i32** [[_TMP3]], align 8 1021 // CHECK3-NEXT: store i32* [[TMP36]], i32** [[_TMP21]], align 8 1022 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[C10]], align 4 1023 // CHECK3-NEXT: [[TMP38:%.*]] = load i32*, i32** [[_TMP21]], align 8 1024 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP38]], align 4 1025 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[B]], align 4 1026 // CHECK3-NEXT: [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 1027 // CHECK3-NEXT: [[TMP40:%.*]] = trunc i32 [[TMP39]] to i8 1028 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4 1029 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP40]], 15 1030 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1031 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1032 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B22]], align 4 1033 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1034 // CHECK3: .omp.linear.pu.done: 1035 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1036 // CHECK3-NEXT: ret void 1037 // 1038 // 1039 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1040 // CHECK3-SAME: (%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1041 // CHECK3-NEXT: entry: 1042 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 1043 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 1044 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 1045 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1046 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1047 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1048 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1049 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1050 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1051 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1052 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1053 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1054 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1055 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1056 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1057 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1058 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1059 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1060 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1061 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1062 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1063 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 1064 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1065 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 1066 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1067 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8 1068 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]]) 1069 // CHECK3-NEXT: ret void 1070 // 1071 // 1072 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1073 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] { 1074 // CHECK3-NEXT: entry: 1075 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1076 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1077 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1078 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1079 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 1080 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1081 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1082 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1083 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1084 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1085 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1086 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1087 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1088 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1089 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1090 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1091 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1092 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1093 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1094 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1095 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4 1096 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1097 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4 1098 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4 1099 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1100 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 1101 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 1102 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1103 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1104 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1105 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1106 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 1107 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1108 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1109 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1110 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 1111 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1112 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1113 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 1114 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1115 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 1116 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1117 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 1118 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 1119 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1120 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 1121 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 1122 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START5]], align 4 1123 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP3]], align 8 1124 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1125 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTLINEAR_START6]], align 4 1126 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1127 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1128 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1129 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1130 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1131 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1132 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1133 // CHECK3-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1134 // CHECK3-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1135 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1136 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1137 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 1138 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1139 // CHECK3: cond.true: 1140 // CHECK3-NEXT: br label [[COND_END:%.*]] 1141 // CHECK3: cond.false: 1142 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1143 // CHECK3-NEXT: br label [[COND_END]] 1144 // CHECK3: cond.end: 1145 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1146 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1147 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1148 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1149 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1150 // CHECK3: omp.inner.for.cond: 1151 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1152 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1153 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1154 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1155 // CHECK3: omp.inner.for.body: 1156 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1157 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1158 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1159 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1160 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1161 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1162 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1 1163 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]] 1164 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1165 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1166 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1167 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1 1168 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]] 1169 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1170 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1171 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1172 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1 1173 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]] 1174 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1175 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 1176 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1177 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1 1178 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP25]], align 4 1179 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[B9]], align 4 1180 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1 1181 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 1182 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 1183 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 1184 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1 1185 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP28]], align 4 1186 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1187 // CHECK3: omp.body.continue: 1188 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1189 // CHECK3: omp.inner.for.inc: 1190 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1191 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1 1192 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1193 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1194 // CHECK3: omp.inner.for.end: 1195 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1196 // CHECK3: omp.loop.exit: 1197 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]]) 1198 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1199 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1200 // CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1201 // CHECK3: .omp.linear.pu: 1202 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP2]], align 8 1203 // CHECK3-NEXT: store i32* [[TMP33]], i32** [[_TMP20]], align 8 1204 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[A7]], align 4 1205 // CHECK3-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP20]], align 8 1206 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4 1207 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[B9]], align 4 1208 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[TMP2]], align 4 1209 // CHECK3-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP3]], align 8 1210 // CHECK3-NEXT: store i32* [[TMP37]], i32** [[_TMP21]], align 8 1211 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[C10]], align 4 1212 // CHECK3-NEXT: [[TMP39:%.*]] = load i32*, i32** [[_TMP21]], align 8 1213 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP39]], align 4 1214 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1215 // CHECK3: .omp.linear.pu.done: 1216 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1217 // CHECK3-NEXT: ret void 1218 // 1219 // 1220 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1221 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1222 // CHECK3-NEXT: entry: 1223 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1224 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1225 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1226 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1227 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1228 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1229 // CHECK3-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 4 1230 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1231 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1232 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1233 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1234 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1235 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 4 1236 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 4 1237 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1238 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1239 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i32*, align 8 1240 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1241 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1242 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** @g1, align 8 1243 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[TMP]], align 8 1244 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* @g, align 4 1245 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 1246 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* @g, align 4 1247 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START2]], align 4 1248 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1249 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1250 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1251 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1252 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1253 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1254 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1255 // CHECK3-NEXT: store i32* [[G1]], i32** [[_TMP3]], align 8 1256 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1257 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1258 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1259 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1260 // CHECK3: cond.true: 1261 // CHECK3-NEXT: br label [[COND_END:%.*]] 1262 // CHECK3: cond.false: 1263 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1264 // CHECK3-NEXT: br label [[COND_END]] 1265 // CHECK3: cond.end: 1266 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1267 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1268 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1269 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1270 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1271 // CHECK3: omp.inner.for.cond: 1272 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1273 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1274 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1275 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1276 // CHECK3: omp.inner.for.body: 1277 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1278 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1279 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1280 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1281 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1282 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1283 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 5 1284 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]] 1285 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[G]], align 4 1286 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTLINEAR_START2]], align 4 1287 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1288 // CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 5 1289 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]] 1290 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[G1]], align 4 1291 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4 1292 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5 1293 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[G]], align 4 1294 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP3]], align 8 1295 // CHECK3-NEXT: [[TMP17:%.*]] = load volatile i32, i32* [[TMP16]], align 4 1296 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5 1297 // CHECK3-NEXT: store volatile i32 [[ADD10]], i32* [[TMP16]], align 4 1298 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1299 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP18]], align 8 1300 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1301 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[_TMP3]], align 8 1302 // CHECK3-NEXT: store i32* [[TMP20]], i32** [[TMP19]], align 8 1303 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1304 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1305 // CHECK3: omp.body.continue: 1306 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1307 // CHECK3: omp.inner.for.inc: 1308 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1309 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 1310 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1311 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1312 // CHECK3: omp.inner.for.end: 1313 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1314 // CHECK3: omp.loop.exit: 1315 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 1316 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1317 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1318 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1319 // CHECK3: .omp.linear.pu: 1320 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[G]], align 4 1321 // CHECK3-NEXT: store i32 [[TMP24]], i32* @g, align 4 1322 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** @g1, align 8 1323 // CHECK3-NEXT: store i32* [[TMP25]], i32** [[_TMP12]], align 8 1324 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[G1]], align 4 1325 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP12]], align 8 1326 // CHECK3-NEXT: store volatile i32 [[TMP26]], i32* [[TMP27]], align 4 1327 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1328 // CHECK3: .omp.linear.pu.done: 1329 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1330 // CHECK3-NEXT: ret void 1331 // 1332 // 1333 // CHECK4-LABEL: define {{[^@]+}}@main 1334 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 1335 // CHECK4-NEXT: entry: 1336 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1337 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1338 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1339 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1340 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 1341 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 1342 // CHECK4-NEXT: call void [[TMP1]](i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 1343 // CHECK4-NEXT: ret i32 0 1344 // 1345 // 1346 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1347 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 1348 // CHECK4-NEXT: entry: 1349 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1350 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1351 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1352 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1353 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1354 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1355 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 1356 // CHECK4-NEXT: ret void 1357 // 1358 // 1359 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 1360 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1361 // CHECK4-NEXT: entry: 1362 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1363 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 1364 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1365 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 1366 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 1367 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1368 // CHECK4-NEXT: ret void 1369 // 1370 // 1371 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1372 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 1373 // CHECK4-NEXT: entry: 1374 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1375 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1376 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1377 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1378 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1379 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1380 // CHECK4-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 4 1381 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1382 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1383 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1384 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1385 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1386 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4 1387 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 4 1388 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1389 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, align 8 1390 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 1391 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1392 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1393 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** @g1, align 8 1394 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[TMP]], align 8 1395 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* @g, align 4 1396 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 1397 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @g, align 4 1398 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START2]], align 4 1399 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1400 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1401 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1402 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1403 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1404 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1405 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]]) 1406 // CHECK4-NEXT: store i32* [[G1]], i32** [[_TMP3]], align 8 1407 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1408 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1409 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1410 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1411 // CHECK4: cond.true: 1412 // CHECK4-NEXT: br label [[COND_END:%.*]] 1413 // CHECK4: cond.false: 1414 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1415 // CHECK4-NEXT: br label [[COND_END]] 1416 // CHECK4: cond.end: 1417 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1418 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1419 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1420 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1421 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1422 // CHECK4: omp.inner.for.cond: 1423 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1424 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1425 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1426 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1427 // CHECK4: omp.inner.for.body: 1428 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1429 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1430 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1431 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1432 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1433 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1434 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 5 1435 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]] 1436 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[G]], align 4 1437 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTLINEAR_START2]], align 4 1438 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1439 // CHECK4-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 5 1440 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]] 1441 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[G1]], align 4 1442 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4 1443 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5 1444 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[G]], align 4 1445 // CHECK4-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP3]], align 8 1446 // CHECK4-NEXT: [[TMP17:%.*]] = load volatile i32, i32* [[TMP16]], align 4 1447 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5 1448 // CHECK4-NEXT: store volatile i32 [[ADD10]], i32* [[TMP16]], align 4 1449 // CHECK4-NEXT: store i32 1, i32* [[G]], align 4 1450 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[_TMP3]], align 8 1451 // CHECK4-NEXT: store volatile i32 5, i32* [[TMP18]], align 4 1452 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 1453 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 1454 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 1455 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1456 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 1457 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1458 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 1459 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 1460 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 1461 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1462 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1463 // CHECK4-NEXT: [[TMP19:%.*]] = load volatile i32, i32* [[G]], align 4 1464 // CHECK4-NEXT: store volatile i32 [[TMP19]], i32* [[BLOCK_CAPTURED]], align 8 1465 // CHECK4-NEXT: [[BLOCK_CAPTURED11:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1466 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[_TMP3]], align 8 1467 // CHECK4-NEXT: store i32* [[TMP20]], i32** [[BLOCK_CAPTURED11]], align 8 1468 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]] to void ()* 1469 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP21]] to %struct.__block_literal_generic* 1470 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1471 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1472 // CHECK4-NEXT: [[TMP24:%.*]] = load i8*, i8** [[TMP22]], align 8 1473 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to void (i8*)* 1474 // CHECK4-NEXT: call void [[TMP25]](i8* noundef [[TMP23]]) 1475 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1476 // CHECK4: omp.body.continue: 1477 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1478 // CHECK4: omp.inner.for.inc: 1479 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1480 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP26]], 1 1481 // CHECK4-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1482 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1483 // CHECK4: omp.inner.for.end: 1484 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1485 // CHECK4: omp.loop.exit: 1486 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 1487 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1488 // CHECK4-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1489 // CHECK4-NEXT: br i1 [[TMP28]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1490 // CHECK4: .omp.linear.pu: 1491 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[G]], align 4 1492 // CHECK4-NEXT: store i32 [[TMP29]], i32* @g, align 4 1493 // CHECK4-NEXT: [[TMP30:%.*]] = load i32*, i32** @g1, align 8 1494 // CHECK4-NEXT: store i32* [[TMP30]], i32** [[_TMP13]], align 8 1495 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[G1]], align 4 1496 // CHECK4-NEXT: [[TMP32:%.*]] = load i32*, i32** [[_TMP13]], align 8 1497 // CHECK4-NEXT: store volatile i32 [[TMP31]], i32* [[TMP32]], align 4 1498 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1499 // CHECK4: .omp.linear.pu.done: 1500 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1501 // CHECK4-NEXT: ret void 1502 // 1503 // 1504 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke 1505 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1506 // CHECK4-NEXT: entry: 1507 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1508 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>*, align 8 1509 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1510 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* 1511 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 1512 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1513 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8 1514 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1515 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR1]], align 8 1516 // CHECK4-NEXT: store i32 2, i32* [[TMP0]], align 4 1517 // CHECK4-NEXT: ret void 1518 // 1519 // 1520 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1521 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 1522 // CHECK4-NEXT: entry: 1523 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1524 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1525 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1526 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1527 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1528 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1529 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 1530 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1531 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1532 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1533 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 1534 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 1535 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1536 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1537 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1538 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1539 // CHECK4-NEXT: ret void 1540 // 1541 // 1542 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1543 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] { 1544 // CHECK4-NEXT: entry: 1545 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1546 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1547 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1548 // CHECK4-NEXT: [[A:%.*]] = alloca i32*, align 8 1549 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 1550 // CHECK4-NEXT: [[C:%.*]] = alloca i32*, align 8 1551 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1552 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1553 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1554 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1555 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1556 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1557 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1558 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1559 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1560 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1561 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1562 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1563 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4 1564 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1565 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4 1566 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4 1567 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1568 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 1569 // CHECK4-NEXT: [[_TMP22:%.*]] = alloca i32*, align 8 1570 // CHECK4-NEXT: [[_TMP23:%.*]] = alloca i32*, align 8 1571 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1572 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1573 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1574 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1575 // CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1576 // CHECK4-NEXT: store i32* [[A1]], i32** [[A]], align 8 1577 // CHECK4-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 1578 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 1579 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1580 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 1581 // CHECK4-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 1582 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 1583 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 1584 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1585 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1586 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 1587 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 1588 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 1589 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 1590 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1591 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 1592 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1593 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1594 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1595 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1596 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1597 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1598 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1599 // CHECK4-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1600 // CHECK4-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1601 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1602 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1603 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 1604 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1605 // CHECK4: cond.true: 1606 // CHECK4-NEXT: br label [[COND_END:%.*]] 1607 // CHECK4: cond.false: 1608 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1609 // CHECK4-NEXT: br label [[COND_END]] 1610 // CHECK4: cond.end: 1611 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1612 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1613 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1614 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1615 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1616 // CHECK4: omp.inner.for.cond: 1617 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1618 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1619 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1620 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1621 // CHECK4: omp.inner.for.body: 1622 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1623 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1624 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1625 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1626 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1627 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1628 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 1629 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 1630 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1631 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1632 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1633 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 1634 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 1635 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1636 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1637 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1638 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 1639 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 1640 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1641 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 1642 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 1643 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 1644 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1645 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 1646 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1647 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 1648 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 1649 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 1650 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1651 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1652 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 1653 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1654 // CHECK4-NEXT: [[TMP23:%.*]] = load i32*, i32** [[_TMP8]], align 8 1655 // CHECK4-NEXT: store i32* [[TMP23]], i32** [[BLOCK_CAPTURED]], align 8 1656 // CHECK4-NEXT: [[BLOCK_CAPTURED19:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1657 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[B9]], align 4 1658 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[BLOCK_CAPTURED19]], align 8 1659 // CHECK4-NEXT: [[BLOCK_CAPTURED20:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1660 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP11]], align 8 1661 // CHECK4-NEXT: store i32* [[TMP25]], i32** [[BLOCK_CAPTURED20]], align 8 1662 // CHECK4-NEXT: [[TMP26:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 1663 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP26]] to %struct.__block_literal_generic* 1664 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1665 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1666 // CHECK4-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP27]], align 8 1667 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to void (i8*)* 1668 // CHECK4-NEXT: call void [[TMP30]](i8* noundef [[TMP28]]) 1669 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1670 // CHECK4: omp.body.continue: 1671 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1672 // CHECK4: omp.inner.for.inc: 1673 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1674 // CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP31]], 1 1675 // CHECK4-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 1676 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1677 // CHECK4: omp.inner.for.end: 1678 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1679 // CHECK4: omp.loop.exit: 1680 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 1681 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1682 // CHECK4-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 1683 // CHECK4-NEXT: br i1 [[TMP33]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1684 // CHECK4: .omp.linear.pu: 1685 // CHECK4-NEXT: [[TMP34:%.*]] = load i32*, i32** [[TMP]], align 8 1686 // CHECK4-NEXT: store i32* [[TMP34]], i32** [[_TMP22]], align 8 1687 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[A7]], align 4 1688 // CHECK4-NEXT: [[TMP36:%.*]] = load i32*, i32** [[_TMP22]], align 8 1689 // CHECK4-NEXT: store i32 [[TMP35]], i32* [[TMP36]], align 4 1690 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[B9]], align 4 1691 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[B]], align 4 1692 // CHECK4-NEXT: [[TMP38:%.*]] = load i32*, i32** [[_TMP3]], align 8 1693 // CHECK4-NEXT: store i32* [[TMP38]], i32** [[_TMP23]], align 8 1694 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[C10]], align 4 1695 // CHECK4-NEXT: [[TMP40:%.*]] = load i32*, i32** [[_TMP23]], align 8 1696 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[TMP40]], align 4 1697 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[B]], align 4 1698 // CHECK4-NEXT: [[B24:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 1699 // CHECK4-NEXT: [[TMP42:%.*]] = trunc i32 [[TMP41]] to i8 1700 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B24]], align 4 1701 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP42]], 15 1702 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1703 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1704 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B24]], align 4 1705 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1706 // CHECK4: .omp.linear.pu.done: 1707 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1708 // CHECK4-NEXT: ret void 1709 // 1710 // 1711 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2 1712 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1713 // CHECK4-NEXT: entry: 1714 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1715 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 1716 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1717 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 1718 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 1719 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1720 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 1721 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1722 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 1723 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1724 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 1725 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 1726 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1727 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1728 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 1729 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1730 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1731 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 1732 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1733 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 1734 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 1735 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1736 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 1737 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1738 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1739 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 1740 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]]) 1741 // CHECK4-NEXT: ret void 1742 // 1743 // 1744 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1745 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] { 1746 // CHECK4-NEXT: entry: 1747 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1748 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1749 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1750 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1751 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 1752 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1753 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1754 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1755 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1756 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1757 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1758 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1759 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1760 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1761 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1762 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1763 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1764 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1765 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1766 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1767 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4 1768 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1769 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4 1770 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4 1771 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1772 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 1773 // CHECK4-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 1774 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1775 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1776 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1777 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1778 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 1779 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1780 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1781 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1782 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 1783 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1784 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1785 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 1786 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1787 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 1788 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1789 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 1790 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 1791 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1792 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 1793 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 1794 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START5]], align 4 1795 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP3]], align 8 1796 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1797 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTLINEAR_START6]], align 4 1798 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1799 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1800 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1801 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1802 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1803 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1804 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1805 // CHECK4-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1806 // CHECK4-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1807 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1808 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1809 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 1810 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1811 // CHECK4: cond.true: 1812 // CHECK4-NEXT: br label [[COND_END:%.*]] 1813 // CHECK4: cond.false: 1814 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1815 // CHECK4-NEXT: br label [[COND_END]] 1816 // CHECK4: cond.end: 1817 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1818 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1819 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1820 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1821 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1822 // CHECK4: omp.inner.for.cond: 1823 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1824 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1825 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1826 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1827 // CHECK4: omp.inner.for.body: 1828 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1829 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1830 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1831 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1832 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1833 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1834 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1 1835 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]] 1836 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1837 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1838 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1839 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1 1840 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]] 1841 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1842 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1843 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1844 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1 1845 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]] 1846 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1847 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 1848 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1849 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1 1850 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP25]], align 4 1851 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[B9]], align 4 1852 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1 1853 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 1854 // CHECK4-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 1855 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 1856 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1 1857 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP28]], align 4 1858 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1859 // CHECK4: omp.body.continue: 1860 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1861 // CHECK4: omp.inner.for.inc: 1862 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1863 // CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1 1864 // CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1865 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1866 // CHECK4: omp.inner.for.end: 1867 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1868 // CHECK4: omp.loop.exit: 1869 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]]) 1870 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1871 // CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1872 // CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1873 // CHECK4: .omp.linear.pu: 1874 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP2]], align 8 1875 // CHECK4-NEXT: store i32* [[TMP33]], i32** [[_TMP20]], align 8 1876 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[A7]], align 4 1877 // CHECK4-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP20]], align 8 1878 // CHECK4-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4 1879 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[B9]], align 4 1880 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[TMP2]], align 4 1881 // CHECK4-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP3]], align 8 1882 // CHECK4-NEXT: store i32* [[TMP37]], i32** [[_TMP21]], align 8 1883 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[C10]], align 4 1884 // CHECK4-NEXT: [[C22:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2 1885 // CHECK4-NEXT: [[TMP39:%.*]] = load i32*, i32** [[C22]], align 8 1886 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP39]], align 4 1887 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1888 // CHECK4: .omp.linear.pu.done: 1889 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1890 // CHECK4-NEXT: ret void 1891 // 1892