1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 enum omp_allocator_handle_t { 18 omp_null_allocator = 0, 19 omp_default_mem_alloc = 1, 20 omp_large_cap_mem_alloc = 2, 21 omp_const_mem_alloc = 3, 22 omp_high_bw_mem_alloc = 4, 23 omp_low_lat_mem_alloc = 5, 24 omp_cgroup_mem_alloc = 6, 25 omp_pteam_mem_alloc = 7, 26 omp_thread_mem_alloc = 8, 27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 28 }; 29 30 template <class T> 31 struct S { 32 T f; 33 S(T a) : f(a) {} 34 S() : f() {} 35 S<T> &operator=(const S<T> &); 36 operator T() { return T(); } 37 ~S() {} 38 }; 39 40 volatile int g = 1212; 41 volatile int &g1 = g; 42 float f; 43 char cnt; 44 45 struct SS { 46 int a; 47 int b : 4; 48 int &c; 49 SS(int &d) : a(0), b(0), c(d) { 50 #pragma omp parallel 51 #pragma omp for linear(a, b, c) 52 for (int i = 0; i < 2; ++i) 53 #ifdef LAMBDA 54 [&]() { 55 ++this->a, --b, (this)->c /= 1; 56 #pragma omp parallel 57 #pragma omp for linear(a, b) linear(ref(c)) 58 for (int i = 0; i < 2; ++i) 59 ++(this)->a, --b, this->c /= 1; 60 }(); 61 #elif defined(BLOCKS) 62 ^{ 63 ++a; 64 --this->b; 65 (this)->c /= 1; 66 #pragma omp parallel 67 #pragma omp for linear(a, b) linear(uval(c)) 68 for (int i = 0; i < 2; ++i) 69 ++(this)->a, --b, this->c /= 1; 70 }(); 71 #else 72 ++this->a, --b, c /= 1; 73 #endif 74 } 75 }; 76 77 template <typename T> 78 struct SST { 79 T a; 80 SST() : a(T()) { 81 #pragma omp parallel 82 #pragma omp for linear(a) 83 for (int i = 0; i < 2; ++i) 84 #ifdef LAMBDA 85 [&]() { 86 [&]() { 87 ++this->a; 88 #pragma omp parallel 89 #pragma omp for linear(a) 90 for (int i = 0; i < 2; ++i) 91 ++(this)->a; 92 }(); 93 }(); 94 #elif defined(BLOCKS) 95 ^{ 96 ^{ 97 ++a; 98 #pragma omp parallel 99 #pragma omp for linear(a) 100 for (int i = 0; i < 2; ++i) 101 ++(this)->a; 102 }(); 103 }(); 104 #else 105 ++(this)->a; 106 #endif 107 } 108 }; 109 110 template <typename T> 111 T tmain() { 112 S<T> test; 113 SST<T> sst; 114 T *pvar = &test.f; 115 T &lvar = test.f; 116 #pragma omp parallel 117 #pragma omp for linear(pvar, lvar) 118 for (int i = 0; i < 2; ++i) { 119 ++pvar, ++lvar; 120 } 121 return T(); 122 } 123 124 int main() { 125 static int sivar; 126 SS ss(sivar); 127 #ifdef LAMBDA 128 [&]() { 129 #pragma omp parallel 130 #pragma omp for linear(g, g1:5) 131 for (int i = 0; i < 2; ++i) { 132 133 134 135 g += 5; 136 g1 += 5; 137 [&]() { 138 g = 2; 139 g1 = 2; 140 }(); 141 } 142 }(); 143 return 0; 144 #elif defined(BLOCKS) 145 ^{ 146 #pragma omp parallel 147 #pragma omp for linear(g, g1:5) 148 for (int i = 0; i < 2; ++i) { 149 g += 5; 150 g1 += 5; 151 g = 1; 152 g1 = 5; 153 ^{ 154 g = 2; 155 g1 = 2; 156 }(); 157 } 158 }(); 159 return 0; 160 161 162 #else 163 S<float> test; 164 float *pvar = &test.f; 165 long long lvar = 0; 166 #pragma omp parallel 167 #pragma omp for linear(pvar, lvar : 3) allocate(omp_low_lat_mem_alloc: lvar) 168 for (int i = 0; i < 2; ++i) { 169 pvar += 3, lvar += 3; 170 } 171 return tmain<int>(); 172 #endif 173 } 174 175 176 177 // Check for default initialization. 178 179 180 181 182 183 // Check for default initialization. 184 185 #endif 186 187 // CHECK1-LABEL: define {{[^@]+}}@main 188 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 189 // CHECK1-NEXT: entry: 190 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 192 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 193 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 194 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 195 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 196 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 197 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 198 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 199 // CHECK1-NEXT: store float* [[F]], float** [[PVAR]], align 8 200 // CHECK1-NEXT: store i64 0, i64* [[LVAR]], align 8 201 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, i64*)* @.omp_outlined. to void (i32*, i32*, ...)*), float** [[PVAR]], i64* [[LVAR]]) 202 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 203 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 204 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4 206 // CHECK1-NEXT: ret i32 [[TMP0]] 207 // 208 // 209 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 210 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 211 // CHECK1-NEXT: entry: 212 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 213 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 214 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 215 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 216 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 217 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 218 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 219 // CHECK1-NEXT: ret void 220 // 221 // 222 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 223 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 224 // CHECK1-NEXT: entry: 225 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 226 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 227 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 228 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 229 // CHECK1-NEXT: ret void 230 // 231 // 232 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 233 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], float** nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i64* nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] { 234 // CHECK1-NEXT: entry: 235 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 236 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca float**, align 8 238 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca i64*, align 8 239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 242 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 243 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 248 // CHECK1-NEXT: [[PVAR2:%.*]] = alloca float*, align 8 249 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 250 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 251 // CHECK1-NEXT: store float** [[PVAR]], float*** [[PVAR_ADDR]], align 8 252 // CHECK1-NEXT: store i64* [[LVAR]], i64** [[LVAR_ADDR]], align 8 253 // CHECK1-NEXT: [[TMP0:%.*]] = load float**, float*** [[PVAR_ADDR]], align 8 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i64*, i64** [[LVAR_ADDR]], align 8 255 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[TMP0]], align 8 256 // CHECK1-NEXT: store float* [[TMP2]], float** [[DOTLINEAR_START]], align 8 257 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 258 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[DOTLINEAR_START1]], align 8 259 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 261 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 262 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 264 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 265 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 266 // CHECK1-NEXT: [[DOTLVAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP5]], i64 8, i8* inttoptr (i64 5 to i8*)) 267 // CHECK1-NEXT: [[DOTLVAR__ADDR:%.*]] = bitcast i8* [[DOTLVAR__VOID_ADDR]] to i64* 268 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 269 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 270 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 271 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 272 // CHECK1: cond.true: 273 // CHECK1-NEXT: br label [[COND_END:%.*]] 274 // CHECK1: cond.false: 275 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 276 // CHECK1-NEXT: br label [[COND_END]] 277 // CHECK1: cond.end: 278 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 279 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 281 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 283 // CHECK1: omp.inner.for.cond: 284 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 285 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 287 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 288 // CHECK1: omp.inner.for.cond.cleanup: 289 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 290 // CHECK1: omp.inner.for.body: 291 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 292 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 293 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 294 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 295 // CHECK1-NEXT: [[TMP12:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 296 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 297 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP13]], 3 298 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL4]] to i64 299 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP12]], i64 [[IDX_EXT]] 300 // CHECK1-NEXT: store float* [[ADD_PTR]], float** [[PVAR2]], align 8 301 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 302 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], 3 304 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL5]] to i64 305 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP14]], [[CONV]] 306 // CHECK1-NEXT: store i64 [[ADD6]], i64* [[DOTLVAR__ADDR]], align 8 307 // CHECK1-NEXT: [[TMP16:%.*]] = load float*, float** [[PVAR2]], align 8 308 // CHECK1-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds float, float* [[TMP16]], i64 3 309 // CHECK1-NEXT: store float* [[ADD_PTR7]], float** [[PVAR2]], align 8 310 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 311 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP17]], 3 312 // CHECK1-NEXT: store i64 [[ADD8]], i64* [[DOTLVAR__ADDR]], align 8 313 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 314 // CHECK1: omp.body.continue: 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 316 // CHECK1: omp.inner.for.inc: 317 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 319 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 321 // CHECK1: omp.inner.for.end: 322 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 323 // CHECK1: omp.loop.exit: 324 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 325 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i64* [[DOTLVAR__ADDR]] to i8* 326 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP5]], i8* [[TMP19]], i8* inttoptr (i64 5 to i8*)) 327 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 328 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 329 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 330 // CHECK1: .omp.linear.pu: 331 // CHECK1-NEXT: [[TMP22:%.*]] = load float*, float** [[PVAR2]], align 8 332 // CHECK1-NEXT: store float* [[TMP22]], float** [[TMP0]], align 8 333 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 334 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP1]], align 8 335 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 336 // CHECK1: .omp.linear.pu.done: 337 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 342 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 343 // CHECK1-NEXT: entry: 344 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 345 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 346 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 347 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32*, align 8 348 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 349 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 350 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 351 // CHECK1-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 352 // CHECK1-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 353 // CHECK1-NEXT: store i32* [[F1]], i32** [[LVAR]], align 8 354 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[LVAR]], align 8 355 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32**, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32** [[PVAR]], i32* [[TMP0]]) 356 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 357 // CHECK1-NEXT: ret i32 0 358 // 359 // 360 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 361 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 362 // CHECK1-NEXT: entry: 363 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 364 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 365 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 366 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 367 // CHECK1-NEXT: ret void 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 371 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 374 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 375 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 376 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 377 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 378 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 379 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 380 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 381 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 382 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 383 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 384 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 385 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 386 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 387 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 388 // CHECK1-NEXT: ret void 389 // 390 // 391 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 392 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] { 393 // CHECK1-NEXT: entry: 394 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 395 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 396 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 397 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 398 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[C:%.*]] = alloca i32*, align 8 400 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 401 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 402 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 408 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 412 // CHECK1-NEXT: [[A7:%.*]] = alloca i32, align 4 413 // CHECK1-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 414 // CHECK1-NEXT: [[B9:%.*]] = alloca i32, align 4 415 // CHECK1-NEXT: [[C10:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 417 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 418 // CHECK1-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 419 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 420 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 421 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 422 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 423 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 424 // CHECK1-NEXT: store i32* [[A1]], i32** [[A]], align 8 425 // CHECK1-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 426 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 427 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 428 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 429 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 430 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 431 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 432 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 433 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 434 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 435 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 436 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 437 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 438 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 439 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 440 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 441 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 442 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 443 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 444 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 446 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 447 // CHECK1-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 448 // CHECK1-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 449 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 450 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 451 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 452 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 453 // CHECK1: cond.true: 454 // CHECK1-NEXT: br label [[COND_END:%.*]] 455 // CHECK1: cond.false: 456 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 457 // CHECK1-NEXT: br label [[COND_END]] 458 // CHECK1: cond.end: 459 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 460 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 461 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 462 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 463 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 464 // CHECK1: omp.inner.for.cond: 465 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 466 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 467 // CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 468 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 469 // CHECK1: omp.inner.for.body: 470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 471 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 472 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 473 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 474 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 475 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 476 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 477 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 478 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 479 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 480 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 481 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 482 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 483 // CHECK1-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 484 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 485 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 486 // CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 487 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 488 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 489 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[_TMP8]], align 8 490 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 491 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1 492 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP23]], align 4 493 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[B9]], align 4 494 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1 495 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 496 // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[_TMP11]], align 8 497 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 498 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1 499 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP26]], align 4 500 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 501 // CHECK1: omp.body.continue: 502 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 503 // CHECK1: omp.inner.for.inc: 504 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 505 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP28]], 1 506 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 507 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 508 // CHECK1: omp.inner.for.end: 509 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 510 // CHECK1: omp.loop.exit: 511 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 512 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 513 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 514 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 515 // CHECK1: .omp.linear.pu: 516 // CHECK1-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP]], align 8 517 // CHECK1-NEXT: store i32* [[TMP31]], i32** [[_TMP20]], align 8 518 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[A7]], align 4 519 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP20]], align 8 520 // CHECK1-NEXT: store i32 [[TMP32]], i32* [[TMP33]], align 4 521 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[B9]], align 4 522 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[B]], align 4 523 // CHECK1-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP3]], align 8 524 // CHECK1-NEXT: store i32* [[TMP35]], i32** [[_TMP21]], align 8 525 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[C10]], align 4 526 // CHECK1-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP21]], align 8 527 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[TMP37]], align 4 528 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[B]], align 4 529 // CHECK1-NEXT: [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 530 // CHECK1-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8 531 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4 532 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15 533 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 534 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 535 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B22]], align 4 536 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 537 // CHECK1: .omp.linear.pu.done: 538 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 539 // CHECK1-NEXT: ret void 540 // 541 // 542 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 543 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 544 // CHECK1-NEXT: entry: 545 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 546 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 547 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 548 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 549 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 550 // CHECK1-NEXT: ret void 551 // 552 // 553 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 554 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 555 // CHECK1-NEXT: entry: 556 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 557 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 558 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 559 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 560 // CHECK1-NEXT: ret void 561 // 562 // 563 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 564 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 565 // CHECK1-NEXT: entry: 566 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 567 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 568 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 569 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 570 // CHECK1-NEXT: ret void 571 // 572 // 573 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 574 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32** nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] { 575 // CHECK1-NEXT: entry: 576 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 577 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 578 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca i32**, align 8 579 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca i32*, align 8 580 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 581 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 582 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 583 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 584 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 585 // CHECK1-NEXT: [[DOTLINEAR_START3:%.*]] = alloca i32, align 4 586 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 587 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 588 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 589 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 590 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 591 // CHECK1-NEXT: [[PVAR4:%.*]] = alloca i32*, align 8 592 // CHECK1-NEXT: [[LVAR5:%.*]] = alloca i32, align 4 593 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 594 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32*, align 8 595 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 596 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 597 // CHECK1-NEXT: store i32** [[PVAR]], i32*** [[PVAR_ADDR]], align 8 598 // CHECK1-NEXT: store i32* [[LVAR]], i32** [[LVAR_ADDR]], align 8 599 // CHECK1-NEXT: [[TMP0:%.*]] = load i32**, i32*** [[PVAR_ADDR]], align 8 600 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[LVAR_ADDR]], align 8 601 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 602 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 603 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[_TMP1]], align 8 604 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP0]], align 8 605 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[DOTLINEAR_START]], align 8 606 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 607 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 608 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START3]], align 4 609 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 610 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 611 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 612 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 613 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 614 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 615 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 616 // CHECK1-NEXT: store i32* [[LVAR5]], i32** [[_TMP6]], align 8 617 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 618 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 619 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 620 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 621 // CHECK1: cond.true: 622 // CHECK1-NEXT: br label [[COND_END:%.*]] 623 // CHECK1: cond.false: 624 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 625 // CHECK1-NEXT: br label [[COND_END]] 626 // CHECK1: cond.end: 627 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 628 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 629 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 630 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 631 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 632 // CHECK1: omp.inner.for.cond: 633 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 634 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 635 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 636 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 637 // CHECK1: omp.inner.for.body: 638 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 639 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 640 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 641 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 642 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 643 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 644 // CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP15]], 1 645 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL8]] to i64 646 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP14]], i64 [[IDX_EXT]] 647 // CHECK1-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR4]], align 8 648 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTLINEAR_START3]], align 4 649 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], 1 651 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], [[MUL9]] 652 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[LVAR5]], align 4 653 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[PVAR4]], align 8 654 // CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP18]], i32 1 655 // CHECK1-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR4]], align 8 656 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP6]], align 8 657 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 658 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 659 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP19]], align 4 660 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 661 // CHECK1: omp.body.continue: 662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 663 // CHECK1: omp.inner.for.inc: 664 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 665 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 666 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 667 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 668 // CHECK1: omp.inner.for.end: 669 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 670 // CHECK1: omp.loop.exit: 671 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 672 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 673 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 674 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 675 // CHECK1: .omp.linear.pu: 676 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[PVAR4]], align 8 677 // CHECK1-NEXT: store i32* [[TMP24]], i32** [[TMP0]], align 8 678 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP1]], align 8 679 // CHECK1-NEXT: store i32* [[TMP25]], i32** [[_TMP12]], align 8 680 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[LVAR5]], align 4 681 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP12]], align 8 682 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[TMP27]], align 4 683 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 684 // CHECK1: .omp.linear.pu.done: 685 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 686 // CHECK1-NEXT: ret void 687 // 688 // 689 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 690 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 691 // CHECK1-NEXT: entry: 692 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 693 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 694 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 695 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 696 // CHECK1-NEXT: ret void 697 // 698 // 699 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 700 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 701 // CHECK1-NEXT: entry: 702 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 703 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 704 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 705 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 706 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 707 // CHECK1-NEXT: ret void 708 // 709 // 710 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 711 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 712 // CHECK1-NEXT: entry: 713 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 714 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 715 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 716 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 717 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 718 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 719 // CHECK1-NEXT: ret void 720 // 721 // 722 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 723 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR2]] { 724 // CHECK1-NEXT: entry: 725 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 726 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 727 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 728 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 729 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 730 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 737 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 738 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4 739 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 740 // CHECK1-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 741 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 742 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 743 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 744 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 745 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0 746 // CHECK1-NEXT: store i32* [[A1]], i32** [[A]], align 8 747 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A]], align 8 748 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 749 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 750 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 751 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 752 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 753 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 754 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 755 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 756 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 757 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 758 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 759 // CHECK1-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 760 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 761 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 762 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 763 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 764 // CHECK1: cond.true: 765 // CHECK1-NEXT: br label [[COND_END:%.*]] 766 // CHECK1: cond.false: 767 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 768 // CHECK1-NEXT: br label [[COND_END]] 769 // CHECK1: cond.end: 770 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 771 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 772 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 773 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 774 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 775 // CHECK1: omp.inner.for.cond: 776 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 777 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 778 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 779 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 780 // CHECK1: omp.inner.for.body: 781 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 782 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 783 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 784 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 785 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 786 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 787 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1 788 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]] 789 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[A3]], align 4 790 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP4]], align 8 791 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 792 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 793 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 794 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 795 // CHECK1: omp.body.continue: 796 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 797 // CHECK1: omp.inner.for.inc: 798 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 799 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 800 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 801 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 802 // CHECK1: omp.inner.for.end: 803 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 804 // CHECK1: omp.loop.exit: 805 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 806 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 807 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 808 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 809 // CHECK1: .omp.linear.pu: 810 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[TMP]], align 8 811 // CHECK1-NEXT: store i32* [[TMP19]], i32** [[_TMP9]], align 8 812 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[A3]], align 4 813 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[_TMP9]], align 8 814 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[TMP21]], align 4 815 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 816 // CHECK1: .omp.linear.pu.done: 817 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 818 // CHECK1-NEXT: ret void 819 // 820 // 821 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 822 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 823 // CHECK1-NEXT: entry: 824 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 825 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 826 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 827 // CHECK1-NEXT: ret void 828 // 829 // 830 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 831 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 832 // CHECK1-NEXT: entry: 833 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 834 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 835 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 836 // CHECK1-NEXT: ret void 837 // 838 // 839 // CHECK2-LABEL: define {{[^@]+}}@main 840 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 841 // CHECK2-NEXT: entry: 842 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 843 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 844 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 845 // CHECK2-NEXT: [[PVAR:%.*]] = alloca float*, align 8 846 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i64, align 8 847 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 848 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 849 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 850 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 851 // CHECK2-NEXT: store float* [[F]], float** [[PVAR]], align 8 852 // CHECK2-NEXT: store i64 0, i64* [[LVAR]], align 8 853 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, i64*)* @.omp_outlined. to void (i32*, i32*, ...)*), float** [[PVAR]], i64* [[LVAR]]) 854 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 855 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 856 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 857 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4 858 // CHECK2-NEXT: ret i32 [[TMP0]] 859 // 860 // 861 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 862 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 863 // CHECK2-NEXT: entry: 864 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 865 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 866 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 867 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 868 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 869 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 870 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 871 // CHECK2-NEXT: ret void 872 // 873 // 874 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 875 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 876 // CHECK2-NEXT: entry: 877 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 878 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 879 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 880 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 881 // CHECK2-NEXT: ret void 882 // 883 // 884 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 885 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], float** nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i64* nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] { 886 // CHECK2-NEXT: entry: 887 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 888 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 889 // CHECK2-NEXT: [[PVAR_ADDR:%.*]] = alloca float**, align 8 890 // CHECK2-NEXT: [[LVAR_ADDR:%.*]] = alloca i64*, align 8 891 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 892 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 893 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 894 // CHECK2-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 895 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 896 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 897 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 898 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 899 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 900 // CHECK2-NEXT: [[PVAR2:%.*]] = alloca float*, align 8 901 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 902 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 903 // CHECK2-NEXT: store float** [[PVAR]], float*** [[PVAR_ADDR]], align 8 904 // CHECK2-NEXT: store i64* [[LVAR]], i64** [[LVAR_ADDR]], align 8 905 // CHECK2-NEXT: [[TMP0:%.*]] = load float**, float*** [[PVAR_ADDR]], align 8 906 // CHECK2-NEXT: [[TMP1:%.*]] = load i64*, i64** [[LVAR_ADDR]], align 8 907 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[TMP0]], align 8 908 // CHECK2-NEXT: store float* [[TMP2]], float** [[DOTLINEAR_START]], align 8 909 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 910 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[DOTLINEAR_START1]], align 8 911 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 912 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 913 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 914 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 915 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 916 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 917 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 918 // CHECK2-NEXT: [[DOTLVAR__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP5]], i64 8, i8* inttoptr (i64 5 to i8*)) 919 // CHECK2-NEXT: [[DOTLVAR__ADDR:%.*]] = bitcast i8* [[DOTLVAR__VOID_ADDR]] to i64* 920 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 921 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 922 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 923 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 924 // CHECK2: cond.true: 925 // CHECK2-NEXT: br label [[COND_END:%.*]] 926 // CHECK2: cond.false: 927 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 928 // CHECK2-NEXT: br label [[COND_END]] 929 // CHECK2: cond.end: 930 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 931 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 932 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 933 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 934 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 935 // CHECK2: omp.inner.for.cond: 936 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 937 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 938 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 939 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 940 // CHECK2: omp.inner.for.cond.cleanup: 941 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 942 // CHECK2: omp.inner.for.body: 943 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 944 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 945 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 946 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 947 // CHECK2-NEXT: [[TMP12:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 948 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 949 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP13]], 3 950 // CHECK2-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL4]] to i64 951 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP12]], i64 [[IDX_EXT]] 952 // CHECK2-NEXT: store float* [[ADD_PTR]], float** [[PVAR2]], align 8 953 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 954 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 955 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], 3 956 // CHECK2-NEXT: [[CONV:%.*]] = sext i32 [[MUL5]] to i64 957 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP14]], [[CONV]] 958 // CHECK2-NEXT: store i64 [[ADD6]], i64* [[DOTLVAR__ADDR]], align 8 959 // CHECK2-NEXT: [[TMP16:%.*]] = load float*, float** [[PVAR2]], align 8 960 // CHECK2-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds float, float* [[TMP16]], i64 3 961 // CHECK2-NEXT: store float* [[ADD_PTR7]], float** [[PVAR2]], align 8 962 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 963 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP17]], 3 964 // CHECK2-NEXT: store i64 [[ADD8]], i64* [[DOTLVAR__ADDR]], align 8 965 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 966 // CHECK2: omp.body.continue: 967 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 968 // CHECK2: omp.inner.for.inc: 969 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 970 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 971 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 972 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 973 // CHECK2: omp.inner.for.end: 974 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 975 // CHECK2: omp.loop.exit: 976 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 977 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i64* [[DOTLVAR__ADDR]] to i8* 978 // CHECK2-NEXT: call void @__kmpc_free(i32 [[TMP5]], i8* [[TMP19]], i8* inttoptr (i64 5 to i8*)) 979 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 980 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 981 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 982 // CHECK2: .omp.linear.pu: 983 // CHECK2-NEXT: [[TMP22:%.*]] = load float*, float** [[PVAR2]], align 8 984 // CHECK2-NEXT: store float* [[TMP22]], float** [[TMP0]], align 8 985 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTLVAR__ADDR]], align 8 986 // CHECK2-NEXT: store i64 [[TMP23]], i64* [[TMP1]], align 8 987 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 988 // CHECK2: .omp.linear.pu.done: 989 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 990 // CHECK2-NEXT: ret void 991 // 992 // 993 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 994 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 995 // CHECK2-NEXT: entry: 996 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 997 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 998 // CHECK2-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 999 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i32*, align 8 1000 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1001 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1002 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 1003 // CHECK2-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 1004 // CHECK2-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 1005 // CHECK2-NEXT: store i32* [[F1]], i32** [[LVAR]], align 8 1006 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[LVAR]], align 8 1007 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32**, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32** [[PVAR]], i32* [[TMP0]]) 1008 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1009 // CHECK2-NEXT: ret i32 0 1010 // 1011 // 1012 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1013 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1014 // CHECK2-NEXT: entry: 1015 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1016 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1017 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1018 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1019 // CHECK2-NEXT: ret void 1020 // 1021 // 1022 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1023 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1024 // CHECK2-NEXT: entry: 1025 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1026 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1027 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1028 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1029 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1030 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1031 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 1032 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1033 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1034 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1035 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1036 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1037 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1038 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1039 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1040 // CHECK2-NEXT: ret void 1041 // 1042 // 1043 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1044 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] { 1045 // CHECK2-NEXT: entry: 1046 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1047 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1048 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1049 // CHECK2-NEXT: [[A:%.*]] = alloca i32*, align 8 1050 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 1051 // CHECK2-NEXT: [[C:%.*]] = alloca i32*, align 8 1052 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1053 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1054 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1055 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1056 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1057 // CHECK2-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1058 // CHECK2-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1059 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1060 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1061 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1062 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1063 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1064 // CHECK2-NEXT: [[A7:%.*]] = alloca i32, align 4 1065 // CHECK2-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1066 // CHECK2-NEXT: [[B9:%.*]] = alloca i32, align 4 1067 // CHECK2-NEXT: [[C10:%.*]] = alloca i32, align 4 1068 // CHECK2-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1069 // CHECK2-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 1070 // CHECK2-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 1071 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1072 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1073 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1074 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1075 // CHECK2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1076 // CHECK2-NEXT: store i32* [[A1]], i32** [[A]], align 8 1077 // CHECK2-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 1078 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 1079 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1080 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 1081 // CHECK2-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 1082 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 1083 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 1084 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1085 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1086 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 1087 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 1088 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 1089 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 1090 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1091 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 1092 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1093 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1094 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1095 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1096 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1097 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1098 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1099 // CHECK2-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1100 // CHECK2-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1101 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1102 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1103 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 1104 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1105 // CHECK2: cond.true: 1106 // CHECK2-NEXT: br label [[COND_END:%.*]] 1107 // CHECK2: cond.false: 1108 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1109 // CHECK2-NEXT: br label [[COND_END]] 1110 // CHECK2: cond.end: 1111 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1112 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1113 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1114 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1115 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1116 // CHECK2: omp.inner.for.cond: 1117 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1118 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1119 // CHECK2-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1120 // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1121 // CHECK2: omp.inner.for.body: 1122 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1123 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1124 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1125 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1126 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1127 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1128 // CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 1129 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 1130 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1131 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1132 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1133 // CHECK2-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 1134 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 1135 // CHECK2-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1136 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1137 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1138 // CHECK2-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 1139 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 1140 // CHECK2-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1141 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[_TMP8]], align 8 1142 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1143 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1 1144 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP23]], align 4 1145 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[B9]], align 4 1146 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1 1147 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 1148 // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[_TMP11]], align 8 1149 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 1150 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1 1151 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP26]], align 4 1152 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1153 // CHECK2: omp.body.continue: 1154 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1155 // CHECK2: omp.inner.for.inc: 1156 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1157 // CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP28]], 1 1158 // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1159 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1160 // CHECK2: omp.inner.for.end: 1161 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1162 // CHECK2: omp.loop.exit: 1163 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 1164 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1165 // CHECK2-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1166 // CHECK2-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1167 // CHECK2: .omp.linear.pu: 1168 // CHECK2-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP]], align 8 1169 // CHECK2-NEXT: store i32* [[TMP31]], i32** [[_TMP20]], align 8 1170 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[A7]], align 4 1171 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP20]], align 8 1172 // CHECK2-NEXT: store i32 [[TMP32]], i32* [[TMP33]], align 4 1173 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[B9]], align 4 1174 // CHECK2-NEXT: store i32 [[TMP34]], i32* [[B]], align 4 1175 // CHECK2-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP3]], align 8 1176 // CHECK2-NEXT: store i32* [[TMP35]], i32** [[_TMP21]], align 8 1177 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[C10]], align 4 1178 // CHECK2-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP21]], align 8 1179 // CHECK2-NEXT: store i32 [[TMP36]], i32* [[TMP37]], align 4 1180 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[B]], align 4 1181 // CHECK2-NEXT: [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 1182 // CHECK2-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8 1183 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4 1184 // CHECK2-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15 1185 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1186 // CHECK2-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1187 // CHECK2-NEXT: store i8 [[BF_SET]], i8* [[B22]], align 4 1188 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1189 // CHECK2: .omp.linear.pu.done: 1190 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1191 // CHECK2-NEXT: ret void 1192 // 1193 // 1194 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1195 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1196 // CHECK2-NEXT: entry: 1197 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1198 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1199 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1200 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1201 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4 1202 // CHECK2-NEXT: ret void 1203 // 1204 // 1205 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1206 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1207 // CHECK2-NEXT: entry: 1208 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1209 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1210 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1211 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1212 // CHECK2-NEXT: ret void 1213 // 1214 // 1215 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1216 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1217 // CHECK2-NEXT: entry: 1218 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1219 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1220 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1221 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 1222 // CHECK2-NEXT: ret void 1223 // 1224 // 1225 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1226 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32** nonnull align 8 dereferenceable(8) [[PVAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] { 1227 // CHECK2-NEXT: entry: 1228 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1229 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1230 // CHECK2-NEXT: [[PVAR_ADDR:%.*]] = alloca i32**, align 8 1231 // CHECK2-NEXT: [[LVAR_ADDR:%.*]] = alloca i32*, align 8 1232 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1233 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1234 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1235 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1236 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 1237 // CHECK2-NEXT: [[DOTLINEAR_START3:%.*]] = alloca i32, align 4 1238 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1239 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1240 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1241 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1242 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1243 // CHECK2-NEXT: [[PVAR4:%.*]] = alloca i32*, align 8 1244 // CHECK2-NEXT: [[LVAR5:%.*]] = alloca i32, align 4 1245 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 1246 // CHECK2-NEXT: [[_TMP12:%.*]] = alloca i32*, align 8 1247 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1248 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1249 // CHECK2-NEXT: store i32** [[PVAR]], i32*** [[PVAR_ADDR]], align 8 1250 // CHECK2-NEXT: store i32* [[LVAR]], i32** [[LVAR_ADDR]], align 8 1251 // CHECK2-NEXT: [[TMP0:%.*]] = load i32**, i32*** [[PVAR_ADDR]], align 8 1252 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[LVAR_ADDR]], align 8 1253 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1254 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 1255 // CHECK2-NEXT: store i32* [[TMP2]], i32** [[_TMP1]], align 8 1256 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP0]], align 8 1257 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[DOTLINEAR_START]], align 8 1258 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8 1259 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1260 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START3]], align 4 1261 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1262 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1263 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1264 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1265 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1266 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1267 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 1268 // CHECK2-NEXT: store i32* [[LVAR5]], i32** [[_TMP6]], align 8 1269 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1270 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1271 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1272 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1273 // CHECK2: cond.true: 1274 // CHECK2-NEXT: br label [[COND_END:%.*]] 1275 // CHECK2: cond.false: 1276 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1277 // CHECK2-NEXT: br label [[COND_END]] 1278 // CHECK2: cond.end: 1279 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1280 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1281 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1282 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1283 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1284 // CHECK2: omp.inner.for.cond: 1285 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1286 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1287 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1288 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1289 // CHECK2: omp.inner.for.body: 1290 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1291 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1292 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1293 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1294 // CHECK2-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 1295 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1296 // CHECK2-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP15]], 1 1297 // CHECK2-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL8]] to i64 1298 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP14]], i64 [[IDX_EXT]] 1299 // CHECK2-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR4]], align 8 1300 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTLINEAR_START3]], align 4 1301 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1302 // CHECK2-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], 1 1303 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], [[MUL9]] 1304 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[LVAR5]], align 4 1305 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[PVAR4]], align 8 1306 // CHECK2-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP18]], i32 1 1307 // CHECK2-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR4]], align 8 1308 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP6]], align 8 1309 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1310 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 1311 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP19]], align 4 1312 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1313 // CHECK2: omp.body.continue: 1314 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1315 // CHECK2: omp.inner.for.inc: 1316 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1317 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 1318 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1320 // CHECK2: omp.inner.for.end: 1321 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1322 // CHECK2: omp.loop.exit: 1323 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]]) 1324 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1325 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1326 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1327 // CHECK2: .omp.linear.pu: 1328 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[PVAR4]], align 8 1329 // CHECK2-NEXT: store i32* [[TMP24]], i32** [[TMP0]], align 8 1330 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP1]], align 8 1331 // CHECK2-NEXT: store i32* [[TMP25]], i32** [[_TMP12]], align 8 1332 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[LVAR5]], align 4 1333 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP12]], align 8 1334 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[TMP27]], align 4 1335 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1336 // CHECK2: .omp.linear.pu.done: 1337 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]]) 1338 // CHECK2-NEXT: ret void 1339 // 1340 // 1341 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1342 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1343 // CHECK2-NEXT: entry: 1344 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1345 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1346 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1347 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1348 // CHECK2-NEXT: ret void 1349 // 1350 // 1351 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1352 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1353 // CHECK2-NEXT: entry: 1354 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1355 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1356 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1357 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1358 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4 1359 // CHECK2-NEXT: ret void 1360 // 1361 // 1362 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1363 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1364 // CHECK2-NEXT: entry: 1365 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1366 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1367 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1368 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1369 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 1370 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 1371 // CHECK2-NEXT: ret void 1372 // 1373 // 1374 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1375 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR2]] { 1376 // CHECK2-NEXT: entry: 1377 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1378 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1379 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1380 // CHECK2-NEXT: [[A:%.*]] = alloca i32*, align 8 1381 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1382 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1383 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1384 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1385 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1386 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1387 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1388 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1389 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1390 // CHECK2-NEXT: [[A3:%.*]] = alloca i32, align 4 1391 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 1392 // CHECK2-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 1393 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1394 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1395 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1396 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1397 // CHECK2-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0 1398 // CHECK2-NEXT: store i32* [[A1]], i32** [[A]], align 8 1399 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A]], align 8 1400 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1401 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 1402 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1403 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 1404 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1405 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1406 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1407 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1408 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1409 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1410 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1411 // CHECK2-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 1412 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1413 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1414 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1415 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1416 // CHECK2: cond.true: 1417 // CHECK2-NEXT: br label [[COND_END:%.*]] 1418 // CHECK2: cond.false: 1419 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1420 // CHECK2-NEXT: br label [[COND_END]] 1421 // CHECK2: cond.end: 1422 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1423 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1424 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1425 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1426 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1427 // CHECK2: omp.inner.for.cond: 1428 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1429 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1430 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1431 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1432 // CHECK2: omp.inner.for.body: 1433 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1434 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1435 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1436 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1437 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1438 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1439 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1 1440 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]] 1441 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[A3]], align 4 1442 // CHECK2-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP4]], align 8 1443 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1444 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1 1445 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP14]], align 4 1446 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1447 // CHECK2: omp.body.continue: 1448 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1449 // CHECK2: omp.inner.for.inc: 1450 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1451 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 1452 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1453 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1454 // CHECK2: omp.inner.for.end: 1455 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1456 // CHECK2: omp.loop.exit: 1457 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 1458 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1459 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1460 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1461 // CHECK2: .omp.linear.pu: 1462 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[TMP]], align 8 1463 // CHECK2-NEXT: store i32* [[TMP19]], i32** [[_TMP9]], align 8 1464 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[A3]], align 4 1465 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[_TMP9]], align 8 1466 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[TMP21]], align 4 1467 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1468 // CHECK2: .omp.linear.pu.done: 1469 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1470 // CHECK2-NEXT: ret void 1471 // 1472 // 1473 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1474 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1475 // CHECK2-NEXT: entry: 1476 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1477 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1478 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1479 // CHECK2-NEXT: ret void 1480 // 1481 // 1482 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1483 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1484 // CHECK2-NEXT: entry: 1485 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1486 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1487 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1488 // CHECK2-NEXT: ret void 1489 // 1490 // 1491 // CHECK3-LABEL: define {{[^@]+}}@main 1492 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1493 // CHECK3-NEXT: entry: 1494 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1495 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1496 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1497 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1498 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1499 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1500 // CHECK3-NEXT: ret i32 0 1501 // 1502 // 1503 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1504 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 1505 // CHECK3-NEXT: entry: 1506 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1507 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1508 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1509 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1510 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1511 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1512 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1513 // CHECK3-NEXT: ret void 1514 // 1515 // 1516 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1517 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1518 // CHECK3-NEXT: entry: 1519 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1520 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1521 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1522 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1523 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1524 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1525 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 1526 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1527 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1528 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1529 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1530 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1531 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1532 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1533 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1534 // CHECK3-NEXT: ret void 1535 // 1536 // 1537 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1538 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 1539 // CHECK3-NEXT: entry: 1540 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1541 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1542 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1543 // CHECK3-NEXT: [[A:%.*]] = alloca i32*, align 8 1544 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1545 // CHECK3-NEXT: [[C:%.*]] = alloca i32*, align 8 1546 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1547 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1548 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1549 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1550 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1551 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1552 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1553 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1554 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1555 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1556 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1557 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1558 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4 1559 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1560 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4 1561 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4 1562 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1563 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1564 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 1565 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 1566 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1567 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1568 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1569 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1570 // CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1571 // CHECK3-NEXT: store i32* [[A1]], i32** [[A]], align 8 1572 // CHECK3-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 1573 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 1574 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1575 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 1576 // CHECK3-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 1577 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 1578 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 1579 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1580 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1581 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 1582 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 1583 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 1584 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 1585 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1586 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 1587 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1588 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1589 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1590 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1591 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1592 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1593 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP10]]) 1594 // CHECK3-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1595 // CHECK3-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1596 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1597 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1598 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 1599 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1600 // CHECK3: cond.true: 1601 // CHECK3-NEXT: br label [[COND_END:%.*]] 1602 // CHECK3: cond.false: 1603 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1604 // CHECK3-NEXT: br label [[COND_END]] 1605 // CHECK3: cond.end: 1606 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1607 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1608 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1609 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1610 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1611 // CHECK3: omp.inner.for.cond: 1612 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1613 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1614 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1615 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1616 // CHECK3: omp.inner.for.body: 1617 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1618 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1619 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1620 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1621 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1622 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1623 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 1624 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 1625 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1626 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1627 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1628 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 1629 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 1630 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1631 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1632 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1633 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 1634 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 1635 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1636 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1637 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP23]], align 8 1638 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1639 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 1640 // CHECK3-NEXT: store i32* [[TMP25]], i32** [[TMP24]], align 8 1641 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1642 // CHECK3-NEXT: store i32* [[B9]], i32** [[TMP26]], align 8 1643 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1644 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 1645 // CHECK3-NEXT: store i32* [[TMP28]], i32** [[TMP27]], align 8 1646 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1647 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1648 // CHECK3: omp.body.continue: 1649 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1650 // CHECK3: omp.inner.for.inc: 1651 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1652 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP29]], 1 1653 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1654 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1655 // CHECK3: omp.inner.for.end: 1656 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1657 // CHECK3: omp.loop.exit: 1658 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 1659 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1660 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1661 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1662 // CHECK3: .omp.linear.pu: 1663 // CHECK3-NEXT: [[TMP32:%.*]] = load i32*, i32** [[TMP]], align 8 1664 // CHECK3-NEXT: store i32* [[TMP32]], i32** [[_TMP20]], align 8 1665 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[A7]], align 4 1666 // CHECK3-NEXT: [[TMP34:%.*]] = load i32*, i32** [[_TMP20]], align 8 1667 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[TMP34]], align 4 1668 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[B9]], align 4 1669 // CHECK3-NEXT: store i32 [[TMP35]], i32* [[B]], align 4 1670 // CHECK3-NEXT: [[TMP36:%.*]] = load i32*, i32** [[_TMP3]], align 8 1671 // CHECK3-NEXT: store i32* [[TMP36]], i32** [[_TMP21]], align 8 1672 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[C10]], align 4 1673 // CHECK3-NEXT: [[TMP38:%.*]] = load i32*, i32** [[_TMP21]], align 8 1674 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP38]], align 4 1675 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[B]], align 4 1676 // CHECK3-NEXT: [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 1677 // CHECK3-NEXT: [[TMP40:%.*]] = trunc i32 [[TMP39]] to i8 1678 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4 1679 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP40]], 15 1680 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1681 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1682 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B22]], align 4 1683 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1684 // CHECK3: .omp.linear.pu.done: 1685 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 1686 // CHECK3-NEXT: ret void 1687 // 1688 // 1689 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1690 // CHECK3-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1691 // CHECK3-NEXT: entry: 1692 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 1693 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 1694 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 1695 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1696 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1697 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1698 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1699 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1700 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1701 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1702 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1703 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1704 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1705 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1706 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1707 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1708 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1709 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1710 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1711 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1712 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1713 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 1714 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1715 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 1716 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1717 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8 1718 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]]) 1719 // CHECK3-NEXT: ret void 1720 // 1721 // 1722 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1723 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] { 1724 // CHECK3-NEXT: entry: 1725 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1726 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1727 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1728 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1729 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 1730 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1731 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1732 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1733 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1734 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1735 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1736 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1737 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1738 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 1739 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 1740 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1741 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1742 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1743 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1744 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1745 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4 1746 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 1747 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4 1748 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4 1749 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 1750 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 1751 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 1752 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1753 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1754 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1755 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1756 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 1757 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1758 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1759 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1760 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 1761 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1762 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1763 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 1764 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1765 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 1766 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1767 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 1768 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 1769 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1770 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 1771 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 1772 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START5]], align 4 1773 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP3]], align 8 1774 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1775 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTLINEAR_START6]], align 4 1776 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1777 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1778 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1779 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1780 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1781 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1782 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1783 // CHECK3-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 1784 // CHECK3-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 1785 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1786 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1787 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 1788 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1789 // CHECK3: cond.true: 1790 // CHECK3-NEXT: br label [[COND_END:%.*]] 1791 // CHECK3: cond.false: 1792 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1793 // CHECK3-NEXT: br label [[COND_END]] 1794 // CHECK3: cond.end: 1795 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1796 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1797 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1798 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1799 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1800 // CHECK3: omp.inner.for.cond: 1801 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1802 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1803 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1804 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1805 // CHECK3: omp.inner.for.body: 1806 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1807 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1808 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1809 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1810 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1811 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1812 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1 1813 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]] 1814 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 1815 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 1816 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1817 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1 1818 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]] 1819 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 1820 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 1821 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1822 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1 1823 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]] 1824 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 1825 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 1826 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1827 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1 1828 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP25]], align 4 1829 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[B9]], align 4 1830 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1 1831 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 1832 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 1833 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 1834 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1 1835 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP28]], align 4 1836 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1837 // CHECK3: omp.body.continue: 1838 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1839 // CHECK3: omp.inner.for.inc: 1840 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1841 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1 1842 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 1843 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1844 // CHECK3: omp.inner.for.end: 1845 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1846 // CHECK3: omp.loop.exit: 1847 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]]) 1848 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1849 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1850 // CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1851 // CHECK3: .omp.linear.pu: 1852 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP2]], align 8 1853 // CHECK3-NEXT: store i32* [[TMP33]], i32** [[_TMP20]], align 8 1854 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[A7]], align 4 1855 // CHECK3-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP20]], align 8 1856 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4 1857 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[B9]], align 4 1858 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[TMP2]], align 4 1859 // CHECK3-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP3]], align 8 1860 // CHECK3-NEXT: store i32* [[TMP37]], i32** [[_TMP21]], align 8 1861 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[C10]], align 4 1862 // CHECK3-NEXT: [[TMP39:%.*]] = load i32*, i32** [[_TMP21]], align 8 1863 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[TMP39]], align 4 1864 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1865 // CHECK3: .omp.linear.pu.done: 1866 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1867 // CHECK3-NEXT: ret void 1868 // 1869 // 1870 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1871 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1872 // CHECK3-NEXT: entry: 1873 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1874 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1875 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1876 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1877 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1878 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1879 // CHECK3-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 4 1880 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1881 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1882 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1883 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1884 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1885 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 4 1886 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 4 1887 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1888 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1889 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i32*, align 8 1890 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1891 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1892 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** @g1, align 8 1893 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[TMP]], align 8 1894 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* @g, align 4 1895 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 1896 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* @g, align 4 1897 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START2]], align 4 1898 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1899 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1900 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1901 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1902 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1903 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1904 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1905 // CHECK3-NEXT: store i32* [[G1]], i32** [[_TMP3]], align 8 1906 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1907 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1908 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1909 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1910 // CHECK3: cond.true: 1911 // CHECK3-NEXT: br label [[COND_END:%.*]] 1912 // CHECK3: cond.false: 1913 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1914 // CHECK3-NEXT: br label [[COND_END]] 1915 // CHECK3: cond.end: 1916 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1917 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1918 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1919 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1920 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1921 // CHECK3: omp.inner.for.cond: 1922 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1923 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1924 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1925 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1926 // CHECK3: omp.inner.for.body: 1927 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1928 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1929 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1930 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1931 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 1932 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1933 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 5 1934 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]] 1935 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[G]], align 4 1936 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTLINEAR_START2]], align 4 1937 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1938 // CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 5 1939 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]] 1940 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[G1]], align 4 1941 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4 1942 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5 1943 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[G]], align 4 1944 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP3]], align 8 1945 // CHECK3-NEXT: [[TMP17:%.*]] = load volatile i32, i32* [[TMP16]], align 4 1946 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5 1947 // CHECK3-NEXT: store volatile i32 [[ADD10]], i32* [[TMP16]], align 4 1948 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1949 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP18]], align 8 1950 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1951 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[_TMP3]], align 8 1952 // CHECK3-NEXT: store i32* [[TMP20]], i32** [[TMP19]], align 8 1953 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1954 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1955 // CHECK3: omp.body.continue: 1956 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1957 // CHECK3: omp.inner.for.inc: 1958 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1959 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 1960 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1961 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1962 // CHECK3: omp.inner.for.end: 1963 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1964 // CHECK3: omp.loop.exit: 1965 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 1966 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1967 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1968 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1969 // CHECK3: .omp.linear.pu: 1970 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[G]], align 4 1971 // CHECK3-NEXT: store i32 [[TMP24]], i32* @g, align 4 1972 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** @g1, align 8 1973 // CHECK3-NEXT: store i32* [[TMP25]], i32** [[_TMP12]], align 8 1974 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[G1]], align 4 1975 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP12]], align 8 1976 // CHECK3-NEXT: store volatile i32 [[TMP26]], i32* [[TMP27]], align 4 1977 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1978 // CHECK3: .omp.linear.pu.done: 1979 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1980 // CHECK3-NEXT: ret void 1981 // 1982 // 1983 // CHECK4-LABEL: define {{[^@]+}}@main 1984 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 1985 // CHECK4-NEXT: entry: 1986 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1987 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1988 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1989 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1990 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 1991 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 1992 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 1993 // CHECK4-NEXT: ret i32 0 1994 // 1995 // 1996 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1997 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 1998 // CHECK4-NEXT: entry: 1999 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2000 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2001 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2002 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2003 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2004 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2005 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2006 // CHECK4-NEXT: ret void 2007 // 2008 // 2009 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 2010 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2011 // CHECK4-NEXT: entry: 2012 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2013 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 2014 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2015 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 2016 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 2017 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2018 // CHECK4-NEXT: ret void 2019 // 2020 // 2021 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 2022 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 2023 // CHECK4-NEXT: entry: 2024 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2025 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2026 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2027 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2028 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2029 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2030 // CHECK4-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 4 2031 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2032 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2033 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2034 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2035 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2036 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4 2037 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 4 2038 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2039 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, align 8 2040 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 2041 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2042 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2043 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** @g1, align 8 2044 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[TMP]], align 8 2045 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* @g, align 4 2046 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4 2047 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @g, align 4 2048 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START2]], align 4 2049 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2050 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2051 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2052 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2053 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2054 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2055 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]]) 2056 // CHECK4-NEXT: store i32* [[G1]], i32** [[_TMP3]], align 8 2057 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2058 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2059 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2060 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2061 // CHECK4: cond.true: 2062 // CHECK4-NEXT: br label [[COND_END:%.*]] 2063 // CHECK4: cond.false: 2064 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2065 // CHECK4-NEXT: br label [[COND_END]] 2066 // CHECK4: cond.end: 2067 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2068 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2069 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2070 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2071 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2072 // CHECK4: omp.inner.for.cond: 2073 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2074 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2075 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2076 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2077 // CHECK4: omp.inner.for.body: 2078 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2079 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2080 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2081 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2082 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 2083 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2084 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 5 2085 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]] 2086 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[G]], align 4 2087 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTLINEAR_START2]], align 4 2088 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2089 // CHECK4-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 5 2090 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]] 2091 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[G1]], align 4 2092 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4 2093 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5 2094 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[G]], align 4 2095 // CHECK4-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP3]], align 8 2096 // CHECK4-NEXT: [[TMP17:%.*]] = load volatile i32, i32* [[TMP16]], align 4 2097 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5 2098 // CHECK4-NEXT: store volatile i32 [[ADD10]], i32* [[TMP16]], align 4 2099 // CHECK4-NEXT: store i32 1, i32* [[G]], align 4 2100 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[_TMP3]], align 8 2101 // CHECK4-NEXT: store volatile i32 5, i32* [[TMP18]], align 4 2102 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 2103 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2104 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 2105 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2106 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 2107 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2108 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 2109 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 2110 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 2111 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2112 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2113 // CHECK4-NEXT: [[TMP19:%.*]] = load volatile i32, i32* [[G]], align 4 2114 // CHECK4-NEXT: store volatile i32 [[TMP19]], i32* [[BLOCK_CAPTURED]], align 8 2115 // CHECK4-NEXT: [[BLOCK_CAPTURED11:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2116 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[_TMP3]], align 8 2117 // CHECK4-NEXT: store i32* [[TMP20]], i32** [[BLOCK_CAPTURED11]], align 8 2118 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]] to void ()* 2119 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP21]] to %struct.__block_literal_generic* 2120 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2121 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2122 // CHECK4-NEXT: [[TMP24:%.*]] = load i8*, i8** [[TMP22]], align 8 2123 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to void (i8*)* 2124 // CHECK4-NEXT: call void [[TMP25]](i8* [[TMP23]]) 2125 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2126 // CHECK4: omp.body.continue: 2127 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2128 // CHECK4: omp.inner.for.inc: 2129 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2130 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP26]], 1 2131 // CHECK4-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2132 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2133 // CHECK4: omp.inner.for.end: 2134 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2135 // CHECK4: omp.loop.exit: 2136 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 2137 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2138 // CHECK4-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2139 // CHECK4-NEXT: br i1 [[TMP28]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2140 // CHECK4: .omp.linear.pu: 2141 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[G]], align 4 2142 // CHECK4-NEXT: store i32 [[TMP29]], i32* @g, align 4 2143 // CHECK4-NEXT: [[TMP30:%.*]] = load i32*, i32** @g1, align 8 2144 // CHECK4-NEXT: store i32* [[TMP30]], i32** [[_TMP13]], align 8 2145 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[G1]], align 4 2146 // CHECK4-NEXT: [[TMP32:%.*]] = load i32*, i32** [[_TMP13]], align 8 2147 // CHECK4-NEXT: store volatile i32 [[TMP31]], i32* [[TMP32]], align 4 2148 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2149 // CHECK4: .omp.linear.pu.done: 2150 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2151 // CHECK4-NEXT: ret void 2152 // 2153 // 2154 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke 2155 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2156 // CHECK4-NEXT: entry: 2157 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2158 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>*, align 8 2159 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2160 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* 2161 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 2162 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2163 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8 2164 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2165 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR1]], align 8 2166 // CHECK4-NEXT: store i32 2, i32* [[TMP0]], align 4 2167 // CHECK4-NEXT: ret void 2168 // 2169 // 2170 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2171 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 2172 // CHECK4-NEXT: entry: 2173 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2174 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2175 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2176 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2177 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2178 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2179 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 2180 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2181 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2182 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2183 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2184 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2185 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2186 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2187 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 2188 // CHECK4-NEXT: ret void 2189 // 2190 // 2191 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 2192 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] { 2193 // CHECK4-NEXT: entry: 2194 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2195 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2196 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2197 // CHECK4-NEXT: [[A:%.*]] = alloca i32*, align 8 2198 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 2199 // CHECK4-NEXT: [[C:%.*]] = alloca i32*, align 8 2200 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2201 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2202 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2203 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2204 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2205 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 2206 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 2207 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2208 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2209 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2210 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2211 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2212 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4 2213 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 2214 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4 2215 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4 2216 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 2217 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 2218 // CHECK4-NEXT: [[_TMP22:%.*]] = alloca i32*, align 8 2219 // CHECK4-NEXT: [[_TMP23:%.*]] = alloca i32*, align 8 2220 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2221 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2222 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2223 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2224 // CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2225 // CHECK4-NEXT: store i32* [[A1]], i32** [[A]], align 8 2226 // CHECK4-NEXT: [[C2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 2227 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C2]], align 8 2228 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 2229 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 2230 // CHECK4-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 2231 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 2232 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP3]], align 8 2233 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 2234 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 2235 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_START]], align 4 2236 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[B]], align 4 2237 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START5]], align 4 2238 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 2239 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2240 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START6]], align 4 2241 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2242 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2243 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2244 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2245 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2246 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2247 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 2248 // CHECK4-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 2249 // CHECK4-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 2250 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2251 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2252 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1 2253 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2254 // CHECK4: cond.true: 2255 // CHECK4-NEXT: br label [[COND_END:%.*]] 2256 // CHECK4: cond.false: 2257 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2258 // CHECK4-NEXT: br label [[COND_END]] 2259 // CHECK4: cond.end: 2260 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2261 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2262 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2263 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2264 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2265 // CHECK4: omp.inner.for.cond: 2266 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2267 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2268 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2269 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2270 // CHECK4: omp.inner.for.body: 2271 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2272 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2273 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2274 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2275 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 2276 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2277 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1 2278 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]] 2279 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 2280 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 2281 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2282 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1 2283 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]] 2284 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 2285 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 2286 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2287 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1 2288 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]] 2289 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 2290 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 2291 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2292 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 2293 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2294 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 2295 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2296 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 2297 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 2298 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 2299 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2300 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2301 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 2302 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2303 // CHECK4-NEXT: [[TMP23:%.*]] = load i32*, i32** [[_TMP8]], align 8 2304 // CHECK4-NEXT: store i32* [[TMP23]], i32** [[BLOCK_CAPTURED]], align 8 2305 // CHECK4-NEXT: [[BLOCK_CAPTURED19:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2306 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[B9]], align 4 2307 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[BLOCK_CAPTURED19]], align 8 2308 // CHECK4-NEXT: [[BLOCK_CAPTURED20:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2309 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP11]], align 8 2310 // CHECK4-NEXT: store i32* [[TMP25]], i32** [[BLOCK_CAPTURED20]], align 8 2311 // CHECK4-NEXT: [[TMP26:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 2312 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP26]] to %struct.__block_literal_generic* 2313 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2314 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2315 // CHECK4-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP27]], align 8 2316 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to void (i8*)* 2317 // CHECK4-NEXT: call void [[TMP30]](i8* [[TMP28]]) 2318 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2319 // CHECK4: omp.body.continue: 2320 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2321 // CHECK4: omp.inner.for.inc: 2322 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2323 // CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP31]], 1 2324 // CHECK4-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4 2325 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2326 // CHECK4: omp.inner.for.end: 2327 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2328 // CHECK4: omp.loop.exit: 2329 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]]) 2330 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2331 // CHECK4-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 2332 // CHECK4-NEXT: br i1 [[TMP33]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2333 // CHECK4: .omp.linear.pu: 2334 // CHECK4-NEXT: [[TMP34:%.*]] = load i32*, i32** [[TMP]], align 8 2335 // CHECK4-NEXT: store i32* [[TMP34]], i32** [[_TMP22]], align 8 2336 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[A7]], align 4 2337 // CHECK4-NEXT: [[TMP36:%.*]] = load i32*, i32** [[_TMP22]], align 8 2338 // CHECK4-NEXT: store i32 [[TMP35]], i32* [[TMP36]], align 4 2339 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[B9]], align 4 2340 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[B]], align 4 2341 // CHECK4-NEXT: [[TMP38:%.*]] = load i32*, i32** [[_TMP3]], align 8 2342 // CHECK4-NEXT: store i32* [[TMP38]], i32** [[_TMP23]], align 8 2343 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[C10]], align 4 2344 // CHECK4-NEXT: [[TMP40:%.*]] = load i32*, i32** [[_TMP23]], align 8 2345 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[TMP40]], align 4 2346 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[B]], align 4 2347 // CHECK4-NEXT: [[B24:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1 2348 // CHECK4-NEXT: [[TMP42:%.*]] = trunc i32 [[TMP41]] to i8 2349 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B24]], align 4 2350 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP42]], 15 2351 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2352 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 2353 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B24]], align 4 2354 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2355 // CHECK4: .omp.linear.pu.done: 2356 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]]) 2357 // CHECK4-NEXT: ret void 2358 // 2359 // 2360 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2 2361 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2362 // CHECK4-NEXT: entry: 2363 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2364 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 2365 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2366 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 2367 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 2368 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2369 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 2370 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2371 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 2372 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2373 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2374 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2375 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2376 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2377 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 2378 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2379 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2380 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 2381 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2382 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 2383 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 2384 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2385 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 2386 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2387 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2388 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 2389 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]]) 2390 // CHECK4-NEXT: ret void 2391 // 2392 // 2393 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 2394 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] { 2395 // CHECK4-NEXT: entry: 2396 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2397 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2398 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2399 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2400 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 2401 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 2402 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2403 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2404 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2405 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2406 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2407 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2408 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2409 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4 2410 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4 2411 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2412 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2413 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2414 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2415 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2416 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4 2417 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32*, align 8 2418 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4 2419 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4 2420 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32*, align 8 2421 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32*, align 8 2422 // CHECK4-NEXT: [[_TMP21:%.*]] = alloca i32*, align 8 2423 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2424 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2425 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2426 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2427 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 2428 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 2429 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2430 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2431 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 2432 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 2433 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2434 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 2435 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 2436 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 2437 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 2438 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 2439 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 2440 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2441 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4 2442 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 2443 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START5]], align 4 2444 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP3]], align 8 2445 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2446 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTLINEAR_START6]], align 4 2447 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2448 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2449 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2450 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2451 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2452 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2453 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2454 // CHECK4-NEXT: store i32* [[A7]], i32** [[_TMP8]], align 8 2455 // CHECK4-NEXT: store i32* [[C10]], i32** [[_TMP11]], align 8 2456 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2457 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2458 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 2459 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2460 // CHECK4: cond.true: 2461 // CHECK4-NEXT: br label [[COND_END:%.*]] 2462 // CHECK4: cond.false: 2463 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2464 // CHECK4-NEXT: br label [[COND_END]] 2465 // CHECK4: cond.end: 2466 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2467 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2468 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2469 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2470 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2471 // CHECK4: omp.inner.for.cond: 2472 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2473 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2474 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2475 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2476 // CHECK4: omp.inner.for.body: 2477 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2478 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2479 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2480 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2481 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 2482 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2483 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1 2484 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]] 2485 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[A7]], align 4 2486 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTLINEAR_START5]], align 4 2487 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2488 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1 2489 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]] 2490 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[B9]], align 4 2491 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTLINEAR_START6]], align 4 2492 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2493 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1 2494 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]] 2495 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[C10]], align 4 2496 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP8]], align 8 2497 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2498 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1 2499 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP25]], align 4 2500 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[B9]], align 4 2501 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1 2502 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B9]], align 4 2503 // CHECK4-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP11]], align 8 2504 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 2505 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1 2506 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP28]], align 4 2507 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2508 // CHECK4: omp.body.continue: 2509 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2510 // CHECK4: omp.inner.for.inc: 2511 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2512 // CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1 2513 // CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4 2514 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2515 // CHECK4: omp.inner.for.end: 2516 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2517 // CHECK4: omp.loop.exit: 2518 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]]) 2519 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2520 // CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2521 // CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2522 // CHECK4: .omp.linear.pu: 2523 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP2]], align 8 2524 // CHECK4-NEXT: store i32* [[TMP33]], i32** [[_TMP20]], align 8 2525 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[A7]], align 4 2526 // CHECK4-NEXT: [[TMP35:%.*]] = load i32*, i32** [[_TMP20]], align 8 2527 // CHECK4-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4 2528 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[B9]], align 4 2529 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[TMP2]], align 4 2530 // CHECK4-NEXT: [[TMP37:%.*]] = load i32*, i32** [[_TMP3]], align 8 2531 // CHECK4-NEXT: store i32* [[TMP37]], i32** [[_TMP21]], align 8 2532 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[C10]], align 4 2533 // CHECK4-NEXT: [[C22:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2 2534 // CHECK4-NEXT: [[TMP39:%.*]] = load i32*, i32** [[C22]], align 8 2535 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[TMP39]], align 4 2536 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2537 // CHECK4: .omp.linear.pu.done: 2538 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2539 // CHECK4-NEXT: ret void 2540 // 2541