1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 12 13 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // expected-no-diagnostics 24 #ifndef HEADER 25 #define HEADER 26 27 #ifdef OMP5 28 #define CONDITIONAL conditional : 29 #else 30 #define CONDITIONAL 31 #endif //OMP5 32 33 enum omp_allocator_handle_t { 34 omp_null_allocator = 0, 35 omp_default_mem_alloc = 1, 36 omp_large_cap_mem_alloc = 2, 37 omp_const_mem_alloc = 3, 38 omp_high_bw_mem_alloc = 4, 39 omp_low_lat_mem_alloc = 5, 40 omp_cgroup_mem_alloc = 6, 41 omp_pteam_mem_alloc = 7, 42 omp_thread_mem_alloc = 8, 43 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 44 }; 45 46 struct SS { 47 int a; 48 char e[4]; 49 int b : 4; 50 int &c; 51 SS(int &d) : a(0), b(0), c(d) { 52 #pragma omp parallel 53 #pragma omp for firstprivate(e) lastprivate(a, b, c, e) 54 for (int i = 0; i < 2; ++i) 55 #ifdef LAMBDA 56 [&]() { 57 ++this->a, --b, (this)->c /= 1; 58 #pragma omp parallel 59 #pragma omp for lastprivate(a, b, c) 60 for (int i = 0; i < 2; ++i) 61 ++(this)->a, --b, this->c /= 1; 62 }(); 63 #elif defined(BLOCKS) 64 ^{ 65 ++a; 66 --this->b; 67 (this)->c /= 1; 68 #pragma omp parallel 69 #pragma omp for lastprivate(a, b, c) 70 for (int i = 0; i < 2; ++i) 71 ++(this)->a, --b, this->c /= 1; 72 }(); 73 #else 74 ++this->a, --b, c /= 1; 75 #endif 76 #pragma omp for 77 for (a = 0; a < 2; ++a) 78 #ifdef LAMBDA 79 [&]() { 80 --this->a, ++b, (this)->c *= 2; 81 #pragma omp parallel 82 #pragma omp for lastprivate(b) 83 for (b = 0; b < 2; ++b) 84 ++(this)->a, --b, this->c /= 1; 85 }(); 86 #elif defined(BLOCKS) 87 ^{ 88 ++a; 89 --this->b; 90 (this)->c /= 1; 91 #pragma omp parallel 92 #pragma omp for 93 for (c = 0; c < 2; ++c) 94 ++(this)->a, --b, this->c /= 1; 95 }(); 96 #else 97 ++this->a, --b, c /= 1; 98 #endif 99 } 100 }; 101 102 template <typename T> 103 struct SST { 104 T a; 105 SST() : a(T()) { 106 #pragma omp parallel 107 #pragma omp for lastprivate(a) 108 for (int i = 0; i < 2; ++i) 109 #ifdef LAMBDA 110 [&]() { 111 [&]() { 112 ++this->a; 113 #pragma omp parallel 114 #pragma omp for lastprivate(a) 115 for (int i = 0; i < 2; ++i) 116 ++(this)->a; 117 }(); 118 }(); 119 #elif defined(BLOCKS) 120 ^{ 121 ^{ 122 ++a; 123 #pragma omp parallel 124 #pragma omp for lastprivate(a) 125 for (int i = 0; i < 2; ++i) 126 ++(this)->a; 127 }(); 128 }(); 129 #else 130 ++(this)->a; 131 #endif 132 #pragma omp for 133 for (a = 0; a < 2; ++a) 134 #ifdef LAMBDA 135 [&]() { 136 ++this->a; 137 #pragma omp parallel 138 #pragma omp for 139 for (a = 0; a < 2; ++(this)->a) 140 ++(this)->a; 141 }(); 142 #elif defined(BLOCKS) 143 ^{ 144 ++a; 145 #pragma omp parallel 146 #pragma omp for 147 for (this->a = 0; a < 2; ++a) 148 ++(this)->a; 149 }(); 150 #else 151 ++(this)->a; 152 #endif 153 } 154 }; 155 156 template <class T> 157 struct S { 158 T f; 159 S(T a) : f(a) {} 160 S() : f() {} 161 S<T> &operator=(const S<T> &); 162 operator T() { return T(); } 163 ~S() {} 164 }; 165 166 volatile int g __attribute__((aligned(128)))= 1212; 167 volatile int &g1 = g; 168 float f; 169 char cnt; 170 171 172 template <typename T> 173 T tmain() { 174 S<T> test; 175 SST<T> sst; 176 T t_var __attribute__((aligned(128))) = T(); 177 T vec[] __attribute__((aligned(128))) = {1, 2}; 178 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 179 S<T> &var __attribute__((aligned(128))) = test; 180 #pragma omp parallel 181 #pragma omp for lastprivate(t_var, vec, s_arr, var) 182 for (int i = 0; i < 2; ++i) { 183 vec[i] = t_var; 184 s_arr[i] = var; 185 } 186 return T(); 187 } 188 189 namespace A { 190 double x; 191 } 192 namespace B { 193 using A::x; 194 } 195 196 int main() { 197 static int sivar; 198 SS ss(sivar); 199 #ifdef LAMBDA 200 // FIXME: The outer lambda should not capture 'sivar'; that capture is not 201 // used for anything. 202 [&]() { 203 #pragma omp parallel 204 #pragma omp for lastprivate(g, g1, sivar) 205 for (int i = 0; i < 2; ++i) { 206 207 208 209 210 211 212 g = 1; 213 g1 = 1; 214 sivar = 2; 215 // Check for final copying of private values back to original vars. 216 // Actual copying. 217 218 // original g=private_g; 219 220 // original sivar=private_sivar; 221 [&]() { 222 g = 2; 223 g1 = 2; 224 sivar = 4; 225 }(); 226 } 227 }(); 228 return 0; 229 #elif defined(BLOCKS) 230 ^{ 231 #pragma omp parallel 232 #pragma omp for lastprivate(g, g1, sivar) 233 for (int i = 0; i < 2; ++i) { 234 g = 1; 235 g1 = 1; 236 sivar = 2; 237 // Check for final copying of private values back to original vars. 238 // Actual copying. 239 240 // original g=private_g; 241 g = 1; 242 g1 = 1; 243 ^{ 244 g = 2; 245 g1 = 1; 246 sivar = 4; 247 }(); 248 } 249 }(); 250 return 0; 251 252 253 #else 254 S<float> test; 255 int t_var = 0; 256 int vec[] = {1, 2}; 257 S<float> s_arr[] = {1, 2}; 258 S<float> var(3); 259 #pragma omp parallel 260 #pragma omp for lastprivate(t_var, vec, s_arr, var, sivar) 261 for (int i = 0; i < 2; ++i) { 262 vec[i] = t_var; 263 s_arr[i] = var; 264 sivar += i; 265 } 266 #pragma omp parallel 267 #pragma omp for lastprivate(A::x, B::x) firstprivate(f) lastprivate(f) 268 for (int i = 0; i < 2; ++i) { 269 A::x++; 270 } 271 #pragma omp parallel 272 #pragma omp for allocate(omp_const_mem_alloc: f) firstprivate(f) lastprivate(f) 273 for (int i = 0; i < 2; ++i) { 274 A::x++; 275 } 276 #pragma omp parallel 277 #pragma omp for allocate(omp_const_mem_alloc :cnt) lastprivate(cnt) lastprivate(CONDITIONAL f) 278 for (cnt = 0; cnt < 2; ++cnt) { 279 A::x++; 280 f = 0; 281 } 282 return tmain<int>(); 283 #endif 284 } 285 286 287 288 289 // Check for default initialization. 290 // <Skip loop body> 291 292 // Check for final copying of private values back to original vars. 293 // Actual copying. 294 295 // original t_var=private_t_var; 296 297 // original vec[]=private_vec[]; 298 299 // original s_arr[]=private_s_arr[]; 300 301 // original var=private_var; 302 303 304 // Check for default initialization. 305 306 // <Skip loop body> 307 308 // Check for final copying of private values back to original vars. 309 // Actual copying. 310 311 // original x=private_x; 312 313 // original f=private_f; 314 315 316 317 318 // Check for default initialization. 319 320 // <Skip loop body> 321 322 // Check for final copying of private values back to original vars. 323 // Actual copying. 324 325 // original f=private_f; 326 327 328 329 330 // UB = min(UB, GlobalUB) 331 // <Skip loop body> 332 333 334 335 // Check for final copying of private values back to original vars. 336 337 // Calculate private cnt value. 338 // original cnt=private_cnt; 339 340 341 342 343 344 345 346 347 // Check for default initialization. 348 // <Skip loop body> 349 350 // Check for final copying of private values back to original vars. 351 // Actual copying. 352 353 // original t_var=private_t_var; 354 355 // original vec[]=private_vec[]; 356 357 // original s_arr[]=private_s_arr[]; 358 359 // original var=private_var; 360 #endif 361 362 // CHECK1-LABEL: define {{[^@]+}}@main 363 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 364 // CHECK1-NEXT: entry: 365 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 367 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 368 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 370 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 371 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 372 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 373 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 374 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 375 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 376 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 377 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 378 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 379 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 380 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 381 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 382 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 383 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar) 384 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 385 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 386 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*)) 387 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 388 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 389 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]] 390 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 391 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 392 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 393 // CHECK1: arraydestroy.body: 394 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 395 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 396 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 397 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 398 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 399 // CHECK1: arraydestroy.done1: 400 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 401 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 402 // CHECK1-NEXT: ret i32 [[TMP2]] 403 // 404 // 405 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 406 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 407 // CHECK1-NEXT: entry: 408 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 409 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 410 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 411 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 412 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 413 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 414 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 415 // CHECK1-NEXT: ret void 416 // 417 // 418 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 419 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 420 // CHECK1-NEXT: entry: 421 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 422 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 423 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 424 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 425 // CHECK1-NEXT: ret void 426 // 427 // 428 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 429 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 430 // CHECK1-NEXT: entry: 431 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 432 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 433 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 434 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 435 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 436 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 437 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 438 // CHECK1-NEXT: ret void 439 // 440 // 441 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 442 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] { 443 // CHECK1-NEXT: entry: 444 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 445 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 446 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 447 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 448 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 449 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 450 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 451 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 452 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 453 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 454 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 459 // CHECK1-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 460 // CHECK1-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4 461 // CHECK1-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4 462 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 463 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 464 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 465 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 466 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 467 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 468 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 469 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 470 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 471 // CHECK1-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 472 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 473 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 474 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 475 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 476 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 477 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 478 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 479 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 480 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 481 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 482 // CHECK1: arrayctor.loop: 483 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 484 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 485 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 486 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 487 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 488 // CHECK1: arrayctor.cont: 489 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 490 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 491 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 492 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 493 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 494 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 495 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 496 // CHECK1: cond.true: 497 // CHECK1-NEXT: br label [[COND_END:%.*]] 498 // CHECK1: cond.false: 499 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 500 // CHECK1-NEXT: br label [[COND_END]] 501 // CHECK1: cond.end: 502 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 503 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 504 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 505 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 507 // CHECK1: omp.inner.for.cond: 508 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 510 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 511 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 512 // CHECK1: omp.inner.for.cond.cleanup: 513 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 514 // CHECK1: omp.inner.for.body: 515 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 516 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 517 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 518 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 519 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4 520 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 521 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 522 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 523 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 524 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 525 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64 526 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]] 527 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 528 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 529 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4 530 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]] 531 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[SIVAR5]], align 4 532 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 533 // CHECK1: omp.body.continue: 534 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 535 // CHECK1: omp.inner.for.inc: 536 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 537 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 538 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 539 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 540 // CHECK1: omp.inner.for.end: 541 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 542 // CHECK1: omp.loop.exit: 543 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 544 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 545 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 546 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 547 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 548 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 549 // CHECK1: .omp.lastprivate.then: 550 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4 551 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 4 552 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 553 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 554 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 555 // CHECK1-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 556 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S* 557 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 558 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]] 559 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 560 // CHECK1: omp.arraycpy.body: 561 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 562 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 563 // CHECK1-NEXT: [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]]) 564 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 565 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 566 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 567 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 568 // CHECK1: omp.arraycpy.done13: 569 // CHECK1-NEXT: [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 570 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4 571 // CHECK1-NEXT: store i32 [[TMP28]], i32* [[TMP4]], align 4 572 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 573 // CHECK1: .omp.lastprivate.done: 574 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]] 575 // CHECK1-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 576 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 577 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 578 // CHECK1: arraydestroy.body: 579 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 580 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 581 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 582 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 583 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 584 // CHECK1: arraydestroy.done16: 585 // CHECK1-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 586 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 587 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]]) 588 // CHECK1-NEXT: ret void 589 // 590 // 591 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 592 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 593 // CHECK1-NEXT: entry: 594 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 595 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 596 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 597 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 598 // CHECK1-NEXT: ret void 599 // 600 // 601 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 602 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 603 // CHECK1-NEXT: entry: 604 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 605 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 606 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 607 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 608 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 609 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 610 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 611 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 612 // CHECK1-NEXT: [[F:%.*]] = alloca float, align 4 613 // CHECK1-NEXT: [[X:%.*]] = alloca double, align 8 614 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 615 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 616 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 618 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 619 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 620 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 621 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* @f, align 4 622 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4 623 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 624 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 625 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) 626 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 627 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 628 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 629 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 630 // CHECK1: cond.true: 631 // CHECK1-NEXT: br label [[COND_END:%.*]] 632 // CHECK1: cond.false: 633 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 634 // CHECK1-NEXT: br label [[COND_END]] 635 // CHECK1: cond.end: 636 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 637 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 638 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 639 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 641 // CHECK1: omp.inner.for.cond: 642 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 643 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 644 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 645 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 646 // CHECK1: omp.inner.for.body: 647 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 648 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 649 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 650 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 651 // CHECK1-NEXT: [[TMP9:%.*]] = load double, double* [[X]], align 8 652 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00 653 // CHECK1-NEXT: store double [[INC]], double* [[X]], align 8 654 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 655 // CHECK1: omp.body.continue: 656 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 657 // CHECK1: omp.inner.for.inc: 658 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 659 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 660 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 661 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 662 // CHECK1: omp.inner.for.end: 663 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 664 // CHECK1: omp.loop.exit: 665 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 666 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 667 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 668 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 669 // CHECK1: .omp.lastprivate.then: 670 // CHECK1-NEXT: [[TMP13:%.*]] = load double, double* [[X]], align 8 671 // CHECK1-NEXT: store double [[TMP13]], double* @_ZN1A1xE, align 8 672 // CHECK1-NEXT: [[TMP14:%.*]] = load float, float* [[F]], align 4 673 // CHECK1-NEXT: store float [[TMP14]], float* @f, align 4 674 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 675 // CHECK1: .omp.lastprivate.done: 676 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) 677 // CHECK1-NEXT: ret void 678 // 679 // 680 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 681 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 682 // CHECK1-NEXT: entry: 683 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 684 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 685 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 686 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 687 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 688 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 689 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 690 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 691 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 692 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 693 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 694 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 695 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 696 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 697 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 698 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 699 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 700 // CHECK1-NEXT: [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*)) 701 // CHECK1-NEXT: [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float* 702 // CHECK1-NEXT: [[TMP2:%.*]] = load float, float* @f, align 4 703 // CHECK1-NEXT: store float [[TMP2]], float* [[DOTF__ADDR]], align 4 704 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 705 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 706 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 707 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 708 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 709 // CHECK1: cond.true: 710 // CHECK1-NEXT: br label [[COND_END:%.*]] 711 // CHECK1: cond.false: 712 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 713 // CHECK1-NEXT: br label [[COND_END]] 714 // CHECK1: cond.end: 715 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 716 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 717 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 718 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 719 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 720 // CHECK1: omp.inner.for.cond: 721 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 722 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 723 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 724 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 725 // CHECK1: omp.inner.for.cond.cleanup: 726 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 727 // CHECK1: omp.inner.for.body: 728 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 729 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 730 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 731 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 732 // CHECK1-NEXT: [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8 733 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00 734 // CHECK1-NEXT: store double [[INC]], double* @_ZN1A1xE, align 8 735 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 736 // CHECK1: omp.body.continue: 737 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 738 // CHECK1: omp.inner.for.inc: 739 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 740 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 741 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 742 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 743 // CHECK1: omp.inner.for.end: 744 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 745 // CHECK1: omp.loop.exit: 746 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 747 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 748 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 749 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 750 // CHECK1: .omp.lastprivate.then: 751 // CHECK1-NEXT: [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4 752 // CHECK1-NEXT: store float [[TMP13]], float* @f, align 4 753 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 754 // CHECK1: .omp.lastprivate.done: 755 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8* 756 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*)) 757 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 758 // CHECK1-NEXT: ret void 759 // 760 // 761 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 762 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 763 // CHECK1-NEXT: entry: 764 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 765 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 766 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 767 // CHECK1-NEXT: [[TMP:%.*]] = alloca i8, align 1 768 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 769 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 770 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 771 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 772 // CHECK1-NEXT: [[F:%.*]] = alloca float, align 4 773 // CHECK1-NEXT: [[CNT:%.*]] = alloca i8, align 1 774 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 775 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 776 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 777 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 778 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 779 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 780 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 781 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 782 // CHECK1-NEXT: [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*)) 783 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 784 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 785 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 786 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 787 // CHECK1: cond.true: 788 // CHECK1-NEXT: br label [[COND_END:%.*]] 789 // CHECK1: cond.false: 790 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 791 // CHECK1-NEXT: br label [[COND_END]] 792 // CHECK1: cond.end: 793 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 794 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 795 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 796 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 797 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 798 // CHECK1: omp.inner.for.cond: 799 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 801 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 802 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 803 // CHECK1: omp.inner.for.cond.cleanup: 804 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 805 // CHECK1: omp.inner.for.body: 806 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 807 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 808 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 809 // CHECK1-NEXT: [[CONV:%.*]] = trunc i32 [[ADD]] to i8 810 // CHECK1-NEXT: store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1 811 // CHECK1-NEXT: [[TMP8:%.*]] = load double, double* @_ZN1A1xE, align 8 812 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP8]], 1.000000e+00 813 // CHECK1-NEXT: store double [[INC]], double* @_ZN1A1xE, align 8 814 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 815 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 816 // CHECK1: omp.body.continue: 817 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 818 // CHECK1: omp.inner.for.inc: 819 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 820 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1 821 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 822 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 823 // CHECK1: omp.inner.for.end: 824 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 825 // CHECK1: omp.loop.exit: 826 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 827 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 828 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 829 // CHECK1-NEXT: br i1 [[TMP11]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 830 // CHECK1: .omp.lastprivate.then: 831 // CHECK1-NEXT: store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1 832 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1 833 // CHECK1-NEXT: store i8 [[TMP12]], i8* @cnt, align 1 834 // CHECK1-NEXT: [[TMP13:%.*]] = load float, float* [[F]], align 4 835 // CHECK1-NEXT: store float [[TMP13]], float* @f, align 4 836 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 837 // CHECK1: .omp.lastprivate.done: 838 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*)) 839 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 840 // CHECK1-NEXT: ret void 841 // 842 // 843 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 844 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 845 // CHECK1-NEXT: entry: 846 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 847 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 848 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 849 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 850 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 851 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 852 // CHECK1-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 128 853 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 854 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]]) 855 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 856 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 857 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 858 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 859 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 860 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 861 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 862 // CHECK1-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128 863 // CHECK1-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128 864 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]]) 865 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 866 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 867 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 868 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 869 // CHECK1: arraydestroy.body: 870 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 871 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 872 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 873 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 874 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 875 // CHECK1: arraydestroy.done1: 876 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 877 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4 878 // CHECK1-NEXT: ret i32 [[TMP3]] 879 // 880 // 881 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 882 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 883 // CHECK1-NEXT: entry: 884 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 885 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 886 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 887 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 888 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 889 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 890 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 891 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 892 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 893 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4 894 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 895 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 896 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 897 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 898 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 899 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 900 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 901 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 902 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 903 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 904 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 905 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 906 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 907 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8 908 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 909 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 910 // CHECK1-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 911 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 912 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 913 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 914 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 915 // CHECK1-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 916 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 917 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 918 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 919 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 920 // CHECK1: cond.true: 921 // CHECK1-NEXT: br label [[COND_END:%.*]] 922 // CHECK1: cond.false: 923 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 924 // CHECK1-NEXT: br label [[COND_END]] 925 // CHECK1: cond.end: 926 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 927 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 928 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 929 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 930 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 931 // CHECK1: omp.inner.for.cond: 932 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 933 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 934 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 935 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 936 // CHECK1: omp.inner.for.body: 937 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 938 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 939 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 940 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 941 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP8]], align 4 942 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8 943 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 944 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 945 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 946 // CHECK1-NEXT: [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 947 // CHECK1-NEXT: [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8 948 // CHECK1-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4 949 // CHECK1-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 950 // CHECK1-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 951 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1 952 // CHECK1-NEXT: [[TMP11:%.*]] = trunc i32 [[DEC]] to i8 953 // CHECK1-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8 954 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15 955 // CHECK1-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 956 // CHECK1-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 957 // CHECK1-NEXT: store i8 [[BF_SET10]], i8* [[B6]], align 8 958 // CHECK1-NEXT: [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4 959 // CHECK1-NEXT: [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4 960 // CHECK1-NEXT: [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32 961 // CHECK1-NEXT: [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 962 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8 963 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 964 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 965 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 966 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 967 // CHECK1: omp.body.continue: 968 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 969 // CHECK1: omp.inner.for.inc: 970 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 971 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1 972 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 973 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 974 // CHECK1: omp.inner.for.end: 975 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 976 // CHECK1: omp.loop.exit: 977 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 978 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 979 // CHECK1-NEXT: ret void 980 // 981 // 982 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 983 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] { 984 // CHECK1-NEXT: entry: 985 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 986 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 987 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 988 // CHECK1-NEXT: [[E:%.*]] = alloca [4 x i8]*, align 8 989 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 990 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[C:%.*]] = alloca i32*, align 8 992 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 993 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 994 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca [4 x i8]*, align 8 995 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 996 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 997 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 998 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 999 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1000 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1001 // CHECK1-NEXT: [[E7:%.*]] = alloca [4 x i8], align 1 1002 // CHECK1-NEXT: [[_TMP8:%.*]] = alloca [4 x i8]*, align 8 1003 // CHECK1-NEXT: [[A9:%.*]] = alloca i32, align 4 1004 // CHECK1-NEXT: [[_TMP10:%.*]] = alloca i32*, align 8 1005 // CHECK1-NEXT: [[B11:%.*]] = alloca i32, align 4 1006 // CHECK1-NEXT: [[C12:%.*]] = alloca i32, align 4 1007 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 1008 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1009 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1010 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1011 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1012 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1013 // CHECK1-NEXT: [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1 1014 // CHECK1-NEXT: store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8 1015 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0 1016 // CHECK1-NEXT: store i32* [[A2]], i32** [[A]], align 8 1017 // CHECK1-NEXT: [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3 1018 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8 1019 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1020 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 1021 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 1022 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 1023 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[_TMP4]], align 8 1024 // CHECK1-NEXT: [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8 1025 // CHECK1-NEXT: store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8 1026 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1027 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1028 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1029 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1030 // CHECK1-NEXT: [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 1031 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8* 1032 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8* 1033 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false) 1034 // CHECK1-NEXT: store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8 1035 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1036 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1037 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 1038 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8 1039 // CHECK1-NEXT: store i32* [[A9]], i32** [[_TMP10]], align 8 1040 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 1041 // CHECK1-NEXT: store i32* [[C12]], i32** [[_TMP13]], align 8 1042 // CHECK1-NEXT: [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 1043 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1044 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1045 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 1046 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1047 // CHECK1: cond.true: 1048 // CHECK1-NEXT: br label [[COND_END:%.*]] 1049 // CHECK1: cond.false: 1050 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1051 // CHECK1-NEXT: br label [[COND_END]] 1052 // CHECK1: cond.end: 1053 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1054 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1055 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1056 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1057 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1058 // CHECK1: omp.inner.for.cond: 1059 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1060 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1061 // CHECK1-NEXT: [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1062 // CHECK1-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1063 // CHECK1: omp.inner.for.body: 1064 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1065 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1066 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1067 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1068 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8 1069 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1070 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 1071 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP19]], align 4 1072 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[B11]], align 4 1073 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP21]], -1 1074 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B11]], align 4 1075 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8 1076 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1077 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP23]], 1 1078 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP22]], align 4 1079 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1080 // CHECK1: omp.body.continue: 1081 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1082 // CHECK1: omp.inner.for.inc: 1083 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1084 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1 1085 // CHECK1-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4 1086 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1087 // CHECK1: omp.inner.for.end: 1088 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1089 // CHECK1: omp.loop.exit: 1090 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 1091 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1092 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1093 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1094 // CHECK1: .omp.lastprivate.then: 1095 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8 1096 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1097 // CHECK1-NEXT: store i32 [[TMP28]], i32* [[TMP10]], align 4 1098 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[B11]], align 4 1099 // CHECK1-NEXT: store i32 [[TMP29]], i32* [[B]], align 4 1100 // CHECK1-NEXT: [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8 1101 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1102 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[TMP11]], align 4 1103 // CHECK1-NEXT: [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8 1104 // CHECK1-NEXT: [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1 1105 // CHECK1-NEXT: store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1 1106 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[B11]], align 4 1107 // CHECK1-NEXT: [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 1108 // CHECK1-NEXT: [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8 1109 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8 1110 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15 1111 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1112 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1113 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B16]], align 8 1114 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1115 // CHECK1: .omp.lastprivate.done: 1116 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 1117 // CHECK1-NEXT: ret void 1118 // 1119 // 1120 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1121 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1122 // CHECK1-NEXT: entry: 1123 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1124 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1125 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1126 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1127 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 1128 // CHECK1-NEXT: ret void 1129 // 1130 // 1131 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1132 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1133 // CHECK1-NEXT: entry: 1134 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1135 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1136 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1137 // CHECK1-NEXT: ret void 1138 // 1139 // 1140 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1141 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1142 // CHECK1-NEXT: entry: 1143 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1144 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1145 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1146 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1147 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1148 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1149 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1150 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4 1151 // CHECK1-NEXT: ret void 1152 // 1153 // 1154 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1155 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1156 // CHECK1-NEXT: entry: 1157 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1158 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1159 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1160 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1161 // CHECK1-NEXT: ret void 1162 // 1163 // 1164 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1165 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1166 // CHECK1-NEXT: entry: 1167 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1168 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1169 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1170 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1171 // CHECK1-NEXT: ret void 1172 // 1173 // 1174 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1175 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1176 // CHECK1-NEXT: entry: 1177 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1178 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1179 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1180 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1181 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1182 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1183 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1184 // CHECK1-NEXT: ret void 1185 // 1186 // 1187 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 1188 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1189 // CHECK1-NEXT: entry: 1190 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1191 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1192 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1193 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1194 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1195 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1196 // CHECK1-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1197 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1198 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1199 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1200 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1201 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1202 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1203 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1204 // CHECK1-NEXT: [[T_VAR3:%.*]] = alloca i32, align 128 1205 // CHECK1-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 128 1206 // CHECK1-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128 1207 // CHECK1-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 1208 // CHECK1-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8 1209 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1210 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1211 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1212 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1213 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1214 // CHECK1-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1215 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1216 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1217 // CHECK1-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1218 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1219 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1220 // CHECK1-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 1221 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1222 // CHECK1-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 1223 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1224 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1225 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1226 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1227 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1228 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1229 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1230 // CHECK1: arrayctor.loop: 1231 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1232 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1233 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1234 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1235 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1236 // CHECK1: arrayctor.cont: 1237 // CHECK1-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 1238 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1239 // CHECK1-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8 1240 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1241 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1242 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1243 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1244 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1245 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1246 // CHECK1: cond.true: 1247 // CHECK1-NEXT: br label [[COND_END:%.*]] 1248 // CHECK1: cond.false: 1249 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1250 // CHECK1-NEXT: br label [[COND_END]] 1251 // CHECK1: cond.end: 1252 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1253 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1254 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1255 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 1256 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1257 // CHECK1: omp.inner.for.cond: 1258 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1259 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1260 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1261 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1262 // CHECK1: omp.inner.for.cond.cleanup: 1263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1264 // CHECK1: omp.inner.for.body: 1265 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1266 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1267 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1268 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1269 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128 1270 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1271 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1272 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1273 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 1274 // CHECK1-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 1275 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 1276 // CHECK1-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 1277 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]] 1278 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP16]]) 1279 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1280 // CHECK1: omp.body.continue: 1281 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1282 // CHECK1: omp.inner.for.inc: 1283 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1284 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1 1285 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1287 // CHECK1: omp.inner.for.end: 1288 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1289 // CHECK1: omp.loop.exit: 1290 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1291 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1292 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 1293 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1294 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1295 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1296 // CHECK1: .omp.lastprivate.then: 1297 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128 1298 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 128 1299 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1300 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1301 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false) 1302 // CHECK1-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 1303 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0* 1304 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 1305 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]] 1306 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1307 // CHECK1: omp.arraycpy.body: 1308 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1309 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1310 // CHECK1-NEXT: [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]]) 1311 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1312 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1313 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 1314 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 1315 // CHECK1: omp.arraycpy.done14: 1316 // CHECK1-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 1317 // CHECK1-NEXT: [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP28]]) 1318 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1319 // CHECK1: .omp.lastprivate.done: 1320 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] 1321 // CHECK1-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1322 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2 1323 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1324 // CHECK1: arraydestroy.body: 1325 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1326 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1327 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1328 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]] 1329 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]] 1330 // CHECK1: arraydestroy.done17: 1331 // CHECK1-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1332 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1333 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]]) 1334 // CHECK1-NEXT: ret void 1335 // 1336 // 1337 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1338 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1339 // CHECK1-NEXT: entry: 1340 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1341 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1342 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1343 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1344 // CHECK1-NEXT: ret void 1345 // 1346 // 1347 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1348 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1349 // CHECK1-NEXT: entry: 1350 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1351 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1352 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1353 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1354 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 1355 // CHECK1-NEXT: ret void 1356 // 1357 // 1358 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1359 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1360 // CHECK1-NEXT: entry: 1361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1364 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1365 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1366 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1367 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1368 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1369 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4 1370 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 1371 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 1372 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1373 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1374 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1375 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 1377 // CHECK1-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 1378 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1379 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1380 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1381 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1382 // CHECK1-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 1383 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1384 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1385 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1 1386 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1387 // CHECK1: cond.true: 1388 // CHECK1-NEXT: br label [[COND_END:%.*]] 1389 // CHECK1: cond.false: 1390 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1391 // CHECK1-NEXT: br label [[COND_END]] 1392 // CHECK1: cond.end: 1393 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 1394 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1395 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1396 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 1397 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1398 // CHECK1: omp.inner.for.cond: 1399 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1400 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1401 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 1402 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1403 // CHECK1: omp.inner.for.body: 1404 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1405 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 1406 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1407 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8 1408 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP7]], align 4 1409 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 1410 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1411 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1 1412 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP8]], align 4 1413 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1414 // CHECK1: omp.body.continue: 1415 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1416 // CHECK1: omp.inner.for.inc: 1417 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1418 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1419 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1420 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1421 // CHECK1: omp.inner.for.end: 1422 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1423 // CHECK1: omp.loop.exit: 1424 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 1425 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 1426 // CHECK1-NEXT: ret void 1427 // 1428 // 1429 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1430 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] { 1431 // CHECK1-NEXT: entry: 1432 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1433 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1434 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1435 // CHECK1-NEXT: [[A:%.*]] = alloca i32*, align 8 1436 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1437 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1438 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1439 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1440 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1441 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1442 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1443 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4 1444 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 1445 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1446 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1447 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1448 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1449 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1450 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0 1451 // CHECK1-NEXT: store i32* [[A1]], i32** [[A]], align 8 1452 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A]], align 8 1453 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1454 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1455 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1456 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1457 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1458 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 1459 // CHECK1-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 1460 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1461 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1462 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1463 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1464 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1465 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1466 // CHECK1: cond.true: 1467 // CHECK1-NEXT: br label [[COND_END:%.*]] 1468 // CHECK1: cond.false: 1469 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1470 // CHECK1-NEXT: br label [[COND_END]] 1471 // CHECK1: cond.end: 1472 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1473 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1474 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1475 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1476 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1477 // CHECK1: omp.inner.for.cond: 1478 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1479 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1480 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1481 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1482 // CHECK1: omp.inner.for.body: 1483 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1484 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1485 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1486 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1487 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 1488 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1489 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 1490 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 1491 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1492 // CHECK1: omp.body.continue: 1493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1494 // CHECK1: omp.inner.for.inc: 1495 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1496 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1 1497 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1498 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1499 // CHECK1: omp.inner.for.end: 1500 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1501 // CHECK1: omp.loop.exit: 1502 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1503 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1504 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1505 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1506 // CHECK1: .omp.lastprivate.then: 1507 // CHECK1-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8 1508 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4 1509 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[TMP2]], align 4 1510 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1511 // CHECK1: .omp.lastprivate.done: 1512 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 1513 // CHECK1-NEXT: ret void 1514 // 1515 // 1516 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1517 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1518 // CHECK1-NEXT: entry: 1519 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1520 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1521 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1522 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1523 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1524 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1525 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1526 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1527 // CHECK1-NEXT: ret void 1528 // 1529 // 1530 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1531 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1532 // CHECK1-NEXT: entry: 1533 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1534 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1535 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1536 // CHECK1-NEXT: ret void 1537 // 1538 // 1539 // CHECK3-LABEL: define {{[^@]+}}@main 1540 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1541 // CHECK3-NEXT: entry: 1542 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1543 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1544 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1545 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1546 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1547 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1548 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8 1549 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 1550 // CHECK3-NEXT: ret i32 0 1551 // 1552 // 1553 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1554 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 1555 // CHECK3-NEXT: entry: 1556 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1557 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1558 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1559 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1560 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1561 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1562 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 1563 // CHECK3-NEXT: ret void 1564 // 1565 // 1566 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1567 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 1568 // CHECK3-NEXT: entry: 1569 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1570 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1571 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1572 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1573 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1574 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1575 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1576 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1577 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1578 // CHECK3-NEXT: [[A3:%.*]] = alloca i32, align 4 1579 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 1580 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1581 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) 1582 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1583 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1584 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1585 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1586 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 1587 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1588 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 1589 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1590 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 1591 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 1592 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 1593 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1594 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1595 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 1596 // CHECK3-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 1597 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1598 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1599 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1600 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1601 // CHECK3-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 1602 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1603 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1604 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1605 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1606 // CHECK3: cond.true: 1607 // CHECK3-NEXT: br label [[COND_END:%.*]] 1608 // CHECK3: cond.false: 1609 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1610 // CHECK3-NEXT: br label [[COND_END]] 1611 // CHECK3: cond.end: 1612 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1613 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1614 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1615 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1616 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1617 // CHECK3: omp.inner.for.cond: 1618 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1619 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1620 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1621 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1622 // CHECK3: omp.inner.for.body: 1623 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1624 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1625 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1626 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 1627 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP8]], align 4 1628 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1629 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP9]], align 8 1630 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1631 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 1632 // CHECK3-NEXT: store i32* [[TMP11]], i32** [[TMP10]], align 8 1633 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE0_clEv(%class.anon.1* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1634 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1635 // CHECK3: omp.body.continue: 1636 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1637 // CHECK3: omp.inner.for.inc: 1638 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1639 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 1640 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1641 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1642 // CHECK3: omp.inner.for.end: 1643 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1644 // CHECK3: omp.loop.exit: 1645 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 1646 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]]) 1647 // CHECK3-NEXT: ret void 1648 // 1649 // 1650 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1651 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3:[0-9]+]] { 1652 // CHECK3-NEXT: entry: 1653 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1654 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1655 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1656 // CHECK3-NEXT: [[E:%.*]] = alloca [4 x i8]*, align 8 1657 // CHECK3-NEXT: [[A:%.*]] = alloca i32*, align 8 1658 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1659 // CHECK3-NEXT: [[C:%.*]] = alloca i32*, align 8 1660 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1661 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 1662 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca [4 x i8]*, align 8 1663 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1664 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1665 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1666 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1667 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1668 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1669 // CHECK3-NEXT: [[E7:%.*]] = alloca [4 x i8], align 1 1670 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca [4 x i8]*, align 8 1671 // CHECK3-NEXT: [[A9:%.*]] = alloca i32, align 4 1672 // CHECK3-NEXT: [[_TMP10:%.*]] = alloca i32*, align 8 1673 // CHECK3-NEXT: [[B11:%.*]] = alloca i32, align 4 1674 // CHECK3-NEXT: [[C12:%.*]] = alloca i32, align 4 1675 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 1676 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1677 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1678 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1679 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1680 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1681 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1682 // CHECK3-NEXT: [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1 1683 // CHECK3-NEXT: store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8 1684 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0 1685 // CHECK3-NEXT: store i32* [[A2]], i32** [[A]], align 8 1686 // CHECK3-NEXT: [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3 1687 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8 1688 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 1689 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 1690 // CHECK3-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 1691 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 1692 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP4]], align 8 1693 // CHECK3-NEXT: [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8 1694 // CHECK3-NEXT: store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8 1695 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1696 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1697 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1698 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1699 // CHECK3-NEXT: [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 1700 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8* 1701 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8* 1702 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false) 1703 // CHECK3-NEXT: store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8 1704 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1705 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1706 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 1707 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8 1708 // CHECK3-NEXT: store i32* [[A9]], i32** [[_TMP10]], align 8 1709 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 1710 // CHECK3-NEXT: store i32* [[C12]], i32** [[_TMP13]], align 8 1711 // CHECK3-NEXT: [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 1712 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1713 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1714 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 1715 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1716 // CHECK3: cond.true: 1717 // CHECK3-NEXT: br label [[COND_END:%.*]] 1718 // CHECK3: cond.false: 1719 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1720 // CHECK3-NEXT: br label [[COND_END]] 1721 // CHECK3: cond.end: 1722 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1723 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1724 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1725 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 1726 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1727 // CHECK3: omp.inner.for.cond: 1728 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1729 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1730 // CHECK3-NEXT: [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1731 // CHECK3-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1732 // CHECK3: omp.inner.for.body: 1733 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1734 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1735 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1736 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1737 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1738 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP19]], align 8 1739 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1740 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[_TMP10]], align 8 1741 // CHECK3-NEXT: store i32* [[TMP21]], i32** [[TMP20]], align 8 1742 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1743 // CHECK3-NEXT: store i32* [[B11]], i32** [[TMP22]], align 8 1744 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1745 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[_TMP13]], align 8 1746 // CHECK3-NEXT: store i32* [[TMP24]], i32** [[TMP23]], align 8 1747 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1748 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1749 // CHECK3: omp.body.continue: 1750 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1751 // CHECK3: omp.inner.for.inc: 1752 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1753 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP25]], 1 1754 // CHECK3-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4 1755 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1756 // CHECK3: omp.inner.for.end: 1757 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1758 // CHECK3: omp.loop.exit: 1759 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 1760 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1761 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1762 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1763 // CHECK3: .omp.lastprivate.then: 1764 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[_TMP10]], align 8 1765 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 1766 // CHECK3-NEXT: store i32 [[TMP29]], i32* [[TMP10]], align 4 1767 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[B11]], align 4 1768 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[B]], align 4 1769 // CHECK3-NEXT: [[TMP31:%.*]] = load i32*, i32** [[_TMP13]], align 8 1770 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 1771 // CHECK3-NEXT: store i32 [[TMP32]], i32* [[TMP11]], align 4 1772 // CHECK3-NEXT: [[TMP33:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8 1773 // CHECK3-NEXT: [[TMP34:%.*]] = load [4 x i8], [4 x i8]* [[TMP33]], align 1 1774 // CHECK3-NEXT: store [4 x i8] [[TMP34]], [4 x i8]* [[TMP12]], align 1 1775 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[B11]], align 4 1776 // CHECK3-NEXT: [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 1777 // CHECK3-NEXT: [[TMP36:%.*]] = trunc i32 [[TMP35]] to i8 1778 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8 1779 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP36]], 15 1780 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1781 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1782 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B16]], align 8 1783 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1784 // CHECK3: .omp.lastprivate.done: 1785 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 1786 // CHECK3-NEXT: ret void 1787 // 1788 // 1789 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1790 // CHECK3-SAME: (%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1791 // CHECK3-NEXT: entry: 1792 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 1793 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 1794 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 1795 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1796 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1797 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1798 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1799 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1800 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1801 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1802 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1803 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1804 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1805 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1806 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1807 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1808 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1809 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1810 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1811 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1812 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1813 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 1814 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1815 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 1816 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1817 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8 1818 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]]) 1819 // CHECK3-NEXT: ret void 1820 // 1821 // 1822 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv 1823 // CHECK3-SAME: (%class.anon.1* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2]] align 2 { 1824 // CHECK3-NEXT: entry: 1825 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.1*, align 8 1826 // CHECK3-NEXT: store %class.anon.1* [[THIS]], %class.anon.1** [[THIS_ADDR]], align 8 1827 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.1*, %class.anon.1** [[THIS_ADDR]], align 8 1828 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1:%.*]], %class.anon.1* [[THIS1]], i32 0, i32 0 1829 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1830 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1 1831 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1832 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1833 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP4]], -1 1834 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP3]], align 4 1835 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 2 1836 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 1837 // CHECK3-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4 1838 // CHECK3-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 1839 // CHECK3-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 1840 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1 1841 // CHECK3-NEXT: [[TMP5:%.*]] = trunc i32 [[INC]] to i8 1842 // CHECK3-NEXT: [[BF_LOAD2:%.*]] = load i8, i8* [[B]], align 8 1843 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15 1844 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16 1845 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 1846 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 1847 // CHECK3-NEXT: [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4 1848 // CHECK3-NEXT: [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4 1849 // CHECK3-NEXT: [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32 1850 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 3 1851 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[C]], align 8 1852 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1853 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 2 1854 // CHECK3-NEXT: store i32 [[MUL]], i32* [[TMP6]], align 4 1855 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1 1856 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1857 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP9]]) 1858 // CHECK3-NEXT: ret void 1859 // 1860 // 1861 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1862 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] { 1863 // CHECK3-NEXT: entry: 1864 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1865 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1866 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1867 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1868 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 1869 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1870 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1871 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1872 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1873 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1874 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1875 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1876 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1877 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1878 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1879 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1880 // CHECK3-NEXT: [[A5:%.*]] = alloca i32, align 4 1881 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 1882 // CHECK3-NEXT: [[B7:%.*]] = alloca i32, align 4 1883 // CHECK3-NEXT: [[C8:%.*]] = alloca i32, align 4 1884 // CHECK3-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 1885 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1886 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1887 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1888 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1889 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1890 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 1891 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1892 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1893 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1894 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 1895 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1896 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1897 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 1898 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1899 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 1900 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1901 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 1902 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1903 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1904 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1905 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1906 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 1907 // CHECK3-NEXT: store i32* [[A5]], i32** [[_TMP6]], align 8 1908 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 1909 // CHECK3-NEXT: store i32* [[C8]], i32** [[_TMP9]], align 8 1910 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1911 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1912 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1913 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1914 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 1915 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1916 // CHECK3: cond.true: 1917 // CHECK3-NEXT: br label [[COND_END:%.*]] 1918 // CHECK3: cond.false: 1919 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1920 // CHECK3-NEXT: br label [[COND_END]] 1921 // CHECK3: cond.end: 1922 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1923 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1924 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1925 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1926 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1927 // CHECK3: omp.inner.for.cond: 1928 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1929 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1930 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1931 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1932 // CHECK3: omp.inner.for.body: 1933 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1934 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1935 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1936 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1937 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8 1938 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4 1939 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP17]], 1 1940 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP16]], align 4 1941 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[B7]], align 4 1942 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP18]], -1 1943 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B7]], align 4 1944 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8 1945 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 1946 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP20]], 1 1947 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP19]], align 4 1948 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1949 // CHECK3: omp.body.continue: 1950 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1951 // CHECK3: omp.inner.for.inc: 1952 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1953 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 1954 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 1955 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1956 // CHECK3: omp.inner.for.end: 1957 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1958 // CHECK3: omp.loop.exit: 1959 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 1960 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1961 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1962 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1963 // CHECK3: .omp.lastprivate.then: 1964 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8 1965 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1966 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[TMP6]], align 4 1967 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[B7]], align 4 1968 // CHECK3-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4 1969 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8 1970 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1971 // CHECK3-NEXT: store i32 [[TMP28]], i32* [[TMP7]], align 4 1972 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1973 // CHECK3: .omp.lastprivate.done: 1974 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 1975 // CHECK3-NEXT: ret void 1976 // 1977 // 1978 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1979 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 1980 // CHECK3-NEXT: entry: 1981 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1982 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1983 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1984 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1985 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1986 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1987 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1988 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1989 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1990 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1991 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1992 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1993 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1994 // CHECK3-NEXT: [[B3:%.*]] = alloca i32, align 4 1995 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 1996 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1997 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1998 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1999 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2000 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2001 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2002 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2003 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 2004 // CHECK3-NEXT: store i32* [[TMP2]], i32** [[_TMP1]], align 8 2005 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2006 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2007 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2008 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2009 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2010 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2011 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2012 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2013 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2014 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2015 // CHECK3: cond.true: 2016 // CHECK3-NEXT: br label [[COND_END:%.*]] 2017 // CHECK3: cond.false: 2018 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2019 // CHECK3-NEXT: br label [[COND_END]] 2020 // CHECK3: cond.end: 2021 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2022 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2023 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2024 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2025 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2026 // CHECK3: omp.inner.for.cond: 2027 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2028 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2029 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2030 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2031 // CHECK3: omp.inner.for.body: 2032 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2033 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2034 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2035 // CHECK3-NEXT: store i32 [[ADD]], i32* [[B3]], align 4 2036 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP1]], align 8 2037 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2038 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 2039 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 2040 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[B3]], align 4 2041 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP13]], -1 2042 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B3]], align 4 2043 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 3 2044 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[C]], align 8 2045 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2046 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP15]], 1 2047 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP14]], align 4 2048 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2049 // CHECK3: omp.body.continue: 2050 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2051 // CHECK3: omp.inner.for.inc: 2052 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2053 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 2054 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2055 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2056 // CHECK3: omp.inner.for.end: 2057 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2058 // CHECK3: omp.loop.exit: 2059 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 2060 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2061 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2062 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2063 // CHECK3: .omp.lastprivate.then: 2064 // CHECK3-NEXT: store i32 2, i32* [[B3]], align 4 2065 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[B3]], align 4 2066 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[B]], align 4 2067 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[B3]], align 4 2068 // CHECK3-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 2069 // CHECK3-NEXT: [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8 2070 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B7]], align 8 2071 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15 2072 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2073 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 2074 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B7]], align 8 2075 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2076 // CHECK3: .omp.lastprivate.done: 2077 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2078 // CHECK3-NEXT: ret void 2079 // 2080 // 2081 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 2082 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3]] { 2083 // CHECK3-NEXT: entry: 2084 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2085 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2086 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2087 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2088 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2089 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2090 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2091 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2092 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2093 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2094 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 2095 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 4 2096 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2097 // CHECK3-NEXT: [[SIVAR3:%.*]] = alloca i32, align 4 2098 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2099 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8 2100 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2101 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2102 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2103 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2104 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** @g1, align 8 2105 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2106 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2107 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2108 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2109 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2110 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** @g1, align 8 2111 // CHECK3-NEXT: store i32* [[G1]], i32** [[_TMP2]], align 8 2112 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2113 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2114 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2115 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2116 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2117 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2118 // CHECK3: cond.true: 2119 // CHECK3-NEXT: br label [[COND_END:%.*]] 2120 // CHECK3: cond.false: 2121 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2122 // CHECK3-NEXT: br label [[COND_END]] 2123 // CHECK3: cond.end: 2124 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2125 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2126 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2127 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2128 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2129 // CHECK3: omp.inner.for.cond: 2130 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2131 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2132 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2133 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2134 // CHECK3: omp.inner.for.body: 2135 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2136 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2137 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2138 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2139 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 2140 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 2141 // CHECK3-NEXT: store volatile i32 1, i32* [[TMP11]], align 4 2142 // CHECK3-NEXT: store i32 2, i32* [[SIVAR3]], align 4 2143 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 2144 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP12]], align 8 2145 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 2146 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8 2147 // CHECK3-NEXT: store i32* [[TMP14]], i32** [[TMP13]], align 8 2148 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 2149 // CHECK3-NEXT: store i32* [[SIVAR3]], i32** [[TMP15]], align 8 2150 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.2* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 2151 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2152 // CHECK3: omp.body.continue: 2153 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2154 // CHECK3: omp.inner.for.inc: 2155 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2156 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 2157 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2158 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2159 // CHECK3: omp.inner.for.end: 2160 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2161 // CHECK3: omp.loop.exit: 2162 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 2163 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2164 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2165 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2166 // CHECK3: .omp.lastprivate.then: 2167 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[G]], align 128 2168 // CHECK3-NEXT: store volatile i32 [[TMP19]], i32* @g, align 128 2169 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[_TMP2]], align 8 2170 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 2171 // CHECK3-NEXT: store volatile i32 [[TMP21]], i32* [[TMP2]], align 4 2172 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR3]], align 4 2173 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[TMP0]], align 4 2174 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2175 // CHECK3: .omp.lastprivate.done: 2176 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2177 // CHECK3-NEXT: ret void 2178 // 2179 // 2180 // CHECK4-LABEL: define {{[^@]+}}@main 2181 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 2182 // CHECK4-NEXT: entry: 2183 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2184 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 2185 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8 2186 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 2187 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2188 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0 2189 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2190 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1 2191 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2192 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2 2193 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2194 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3 2195 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 2196 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4 2197 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2198 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 2199 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2200 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8 2201 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()* 2202 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic* 2203 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2204 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2205 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8 2206 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)* 2207 // CHECK4-NEXT: call void [[TMP5]](i8* noundef [[TMP3]]) 2208 // CHECK4-NEXT: ret i32 0 2209 // 2210 // 2211 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2212 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 2213 // CHECK4-NEXT: entry: 2214 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2215 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2216 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2217 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2218 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2219 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2220 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 2221 // CHECK4-NEXT: ret void 2222 // 2223 // 2224 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 2225 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2226 // CHECK4-NEXT: entry: 2227 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2228 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8 2229 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2230 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* 2231 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8 2232 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @_ZZ4mainE5sivar) 2233 // CHECK4-NEXT: ret void 2234 // 2235 // 2236 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 2237 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 2238 // CHECK4-NEXT: entry: 2239 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2240 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2241 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2242 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2243 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2244 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2245 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2246 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2247 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2248 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2249 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 2250 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 4 2251 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2252 // CHECK4-NEXT: [[SIVAR3:%.*]] = alloca i32, align 4 2253 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2254 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, align 128 2255 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2256 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2257 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2258 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2259 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** @g1, align 8 2260 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2261 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2262 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2263 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2264 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2265 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** @g1, align 8 2266 // CHECK4-NEXT: store i32* [[G1]], i32** [[_TMP2]], align 8 2267 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2268 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2269 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2270 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2271 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2272 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2273 // CHECK4: cond.true: 2274 // CHECK4-NEXT: br label [[COND_END:%.*]] 2275 // CHECK4: cond.false: 2276 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2277 // CHECK4-NEXT: br label [[COND_END]] 2278 // CHECK4: cond.end: 2279 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2280 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2281 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2282 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2283 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2284 // CHECK4: omp.inner.for.cond: 2285 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2286 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2287 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2288 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2289 // CHECK4: omp.inner.for.body: 2290 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2291 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2292 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2293 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2294 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 2295 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 2296 // CHECK4-NEXT: store volatile i32 1, i32* [[TMP11]], align 4 2297 // CHECK4-NEXT: store i32 2, i32* [[SIVAR3]], align 4 2298 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 2299 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP2]], align 8 2300 // CHECK4-NEXT: store volatile i32 1, i32* [[TMP12]], align 4 2301 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 2302 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 2303 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 2304 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2305 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 2306 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2307 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 2308 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 2309 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 2310 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2311 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8 2312 // CHECK4-NEXT: [[TMP13:%.*]] = load volatile i32, i32* [[G]], align 128 2313 // CHECK4-NEXT: store volatile i32 [[TMP13]], i32* [[BLOCK_CAPTURED]], align 128 2314 // CHECK4-NEXT: [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 2315 // CHECK4-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8 2316 // CHECK4-NEXT: store i32* [[TMP14]], i32** [[BLOCK_CAPTURED5]], align 32 2317 // CHECK4-NEXT: [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 2318 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[SIVAR3]], align 4 2319 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[BLOCK_CAPTURED6]], align 8 2320 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]] to void ()* 2321 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP16]] to %struct.__block_literal_generic* 2322 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2323 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2324 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP17]], align 8 2325 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to void (i8*)* 2326 // CHECK4-NEXT: call void [[TMP20]](i8* noundef [[TMP18]]) 2327 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2328 // CHECK4: omp.body.continue: 2329 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2330 // CHECK4: omp.inner.for.inc: 2331 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2332 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 2333 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2334 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2335 // CHECK4: omp.inner.for.end: 2336 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2337 // CHECK4: omp.loop.exit: 2338 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2339 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2340 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2341 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2342 // CHECK4: .omp.lastprivate.then: 2343 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[G]], align 128 2344 // CHECK4-NEXT: store volatile i32 [[TMP24]], i32* @g, align 128 2345 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[_TMP2]], align 8 2346 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2347 // CHECK4-NEXT: store volatile i32 [[TMP26]], i32* [[TMP2]], align 4 2348 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[SIVAR3]], align 4 2349 // CHECK4-NEXT: store i32 [[TMP27]], i32* [[TMP0]], align 4 2350 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2351 // CHECK4: .omp.lastprivate.done: 2352 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]]) 2353 // CHECK4-NEXT: ret void 2354 // 2355 // 2356 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke 2357 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2358 // CHECK4-NEXT: entry: 2359 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2360 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>*, align 8 2361 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2362 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* 2363 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>** [[BLOCK_ADDR]], align 8 2364 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8 2365 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 2366 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 2367 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR1]], align 32 2368 // CHECK4-NEXT: store i32 1, i32* [[TMP0]], align 4 2369 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 2370 // CHECK4-NEXT: store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8 2371 // CHECK4-NEXT: ret void 2372 // 2373 // 2374 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2375 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 2376 // CHECK4-NEXT: entry: 2377 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2378 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2379 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2380 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2381 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2382 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2383 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2384 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2385 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2386 // CHECK4-NEXT: [[A3:%.*]] = alloca i32, align 4 2387 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 2388 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, align 8 2389 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 2390 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2391 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2392 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2393 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2394 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 2395 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2396 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 2397 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2398 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 2399 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 2400 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 2401 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2402 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 2403 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 2404 // CHECK4-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 2405 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2406 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2407 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2408 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2409 // CHECK4-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 2410 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2411 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2412 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2413 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2414 // CHECK4: cond.true: 2415 // CHECK4-NEXT: br label [[COND_END:%.*]] 2416 // CHECK4: cond.false: 2417 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2418 // CHECK4-NEXT: br label [[COND_END]] 2419 // CHECK4: cond.end: 2420 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2421 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2422 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2423 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2424 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2425 // CHECK4: omp.inner.for.cond: 2426 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2427 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2428 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2429 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2430 // CHECK4: omp.inner.for.body: 2431 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2432 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2433 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2434 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 2435 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP8]], align 4 2436 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 0 2437 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2438 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 1 2439 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2440 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 2 2441 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2442 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 3 2443 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @___ZN2SSC2ERi_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 2444 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 4 2445 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.6 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2446 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5 2447 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 2448 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6 2449 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8 2450 // CHECK4-NEXT: store i32* [[TMP9]], i32** [[BLOCK_CAPTURED]], align 8 2451 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]] to void ()* 2452 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP10]] to %struct.__block_literal_generic* 2453 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2454 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2455 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP11]], align 8 2456 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to void (i8*)* 2457 // CHECK4-NEXT: call void [[TMP14]](i8* noundef [[TMP12]]) 2458 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2459 // CHECK4: omp.body.continue: 2460 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2461 // CHECK4: omp.inner.for.inc: 2462 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2463 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 2464 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2465 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2466 // CHECK4: omp.inner.for.end: 2467 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2468 // CHECK4: omp.loop.exit: 2469 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 2470 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 2471 // CHECK4-NEXT: ret void 2472 // 2473 // 2474 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 2475 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 2476 // CHECK4-NEXT: entry: 2477 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2478 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2479 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2480 // CHECK4-NEXT: [[E:%.*]] = alloca [4 x i8]*, align 8 2481 // CHECK4-NEXT: [[A:%.*]] = alloca i32*, align 8 2482 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 2483 // CHECK4-NEXT: [[C:%.*]] = alloca i32*, align 8 2484 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2485 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 2486 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca [4 x i8]*, align 8 2487 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2488 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2489 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2490 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2491 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2492 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2493 // CHECK4-NEXT: [[E7:%.*]] = alloca [4 x i8], align 1 2494 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca [4 x i8]*, align 8 2495 // CHECK4-NEXT: [[A9:%.*]] = alloca i32, align 4 2496 // CHECK4-NEXT: [[_TMP10:%.*]] = alloca i32*, align 8 2497 // CHECK4-NEXT: [[B11:%.*]] = alloca i32, align 4 2498 // CHECK4-NEXT: [[C12:%.*]] = alloca i32, align 4 2499 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 2500 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2501 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 2502 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2503 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2504 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2505 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2506 // CHECK4-NEXT: [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1 2507 // CHECK4-NEXT: store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8 2508 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0 2509 // CHECK4-NEXT: store i32* [[A2]], i32** [[A]], align 8 2510 // CHECK4-NEXT: [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3 2511 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8 2512 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 2513 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 2514 // CHECK4-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 2515 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 2516 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP4]], align 8 2517 // CHECK4-NEXT: [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8 2518 // CHECK4-NEXT: store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8 2519 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2520 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2521 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2522 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2523 // CHECK4-NEXT: [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 2524 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8* 2525 // CHECK4-NEXT: [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8* 2526 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false) 2527 // CHECK4-NEXT: store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8 2528 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2529 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2530 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 2531 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8 2532 // CHECK4-NEXT: store i32* [[A9]], i32** [[_TMP10]], align 8 2533 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 2534 // CHECK4-NEXT: store i32* [[C12]], i32** [[_TMP13]], align 8 2535 // CHECK4-NEXT: [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 2536 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2537 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2538 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 2539 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2540 // CHECK4: cond.true: 2541 // CHECK4-NEXT: br label [[COND_END:%.*]] 2542 // CHECK4: cond.false: 2543 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2544 // CHECK4-NEXT: br label [[COND_END]] 2545 // CHECK4: cond.end: 2546 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2547 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2548 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2549 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 2550 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2551 // CHECK4: omp.inner.for.cond: 2552 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2553 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2554 // CHECK4-NEXT: [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2555 // CHECK4-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2556 // CHECK4: omp.inner.for.body: 2557 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2558 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2559 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2560 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2561 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 2562 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2563 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 2564 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2565 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 2566 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2567 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 2568 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 2569 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 2570 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2571 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2572 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 2573 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2574 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8 2575 // CHECK4-NEXT: store i32* [[TMP19]], i32** [[BLOCK_CAPTURED]], align 8 2576 // CHECK4-NEXT: [[BLOCK_CAPTURED15:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2577 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[B11]], align 4 2578 // CHECK4-NEXT: store i32 [[TMP20]], i32* [[BLOCK_CAPTURED15]], align 8 2579 // CHECK4-NEXT: [[BLOCK_CAPTURED16:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2580 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[_TMP13]], align 8 2581 // CHECK4-NEXT: store i32* [[TMP21]], i32** [[BLOCK_CAPTURED16]], align 8 2582 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 2583 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP22]] to %struct.__block_literal_generic* 2584 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2585 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2586 // CHECK4-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP23]], align 8 2587 // CHECK4-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to void (i8*)* 2588 // CHECK4-NEXT: call void [[TMP26]](i8* noundef [[TMP24]]) 2589 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2590 // CHECK4: omp.body.continue: 2591 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2592 // CHECK4: omp.inner.for.inc: 2593 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2594 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP27]], 1 2595 // CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2596 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2597 // CHECK4: omp.inner.for.end: 2598 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2599 // CHECK4: omp.loop.exit: 2600 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 2601 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2602 // CHECK4-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 2603 // CHECK4-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2604 // CHECK4: .omp.lastprivate.then: 2605 // CHECK4-NEXT: [[TMP30:%.*]] = load i32*, i32** [[_TMP10]], align 8 2606 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2607 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[TMP10]], align 4 2608 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[B11]], align 4 2609 // CHECK4-NEXT: store i32 [[TMP32]], i32* [[B]], align 4 2610 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[_TMP13]], align 8 2611 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2612 // CHECK4-NEXT: store i32 [[TMP34]], i32* [[TMP11]], align 4 2613 // CHECK4-NEXT: [[TMP35:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8 2614 // CHECK4-NEXT: [[TMP36:%.*]] = load [4 x i8], [4 x i8]* [[TMP35]], align 1 2615 // CHECK4-NEXT: store [4 x i8] [[TMP36]], [4 x i8]* [[TMP12]], align 1 2616 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[B11]], align 4 2617 // CHECK4-NEXT: [[B18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 2618 // CHECK4-NEXT: [[TMP38:%.*]] = trunc i32 [[TMP37]] to i8 2619 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B18]], align 8 2620 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP38]], 15 2621 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2622 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 2623 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B18]], align 8 2624 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2625 // CHECK4: .omp.lastprivate.done: 2626 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 2627 // CHECK4-NEXT: ret void 2628 // 2629 // 2630 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2 2631 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2632 // CHECK4-NEXT: entry: 2633 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2634 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 2635 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2636 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 2637 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 2638 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 2639 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 2640 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2641 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 2642 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2643 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2644 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2645 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2646 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2647 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 2648 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 2649 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2650 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 2651 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2652 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 2653 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 2654 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 2655 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 2656 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 2657 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 2658 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 2659 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]]) 2660 // CHECK4-NEXT: ret void 2661 // 2662 // 2663 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 2664 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2665 // CHECK4-NEXT: entry: 2666 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2667 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2668 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2669 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2670 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 2671 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 2672 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2673 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2674 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2675 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2676 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2677 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2678 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2679 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2680 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2681 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2682 // CHECK4-NEXT: [[A5:%.*]] = alloca i32, align 4 2683 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 2684 // CHECK4-NEXT: [[B7:%.*]] = alloca i32, align 4 2685 // CHECK4-NEXT: [[C8:%.*]] = alloca i32, align 4 2686 // CHECK4-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 2687 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2688 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2689 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2690 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2691 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2692 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 2693 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 2694 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2695 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2696 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 2697 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 2698 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2699 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 2700 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 2701 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[_TMP2]], align 8 2702 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 2703 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[_TMP3]], align 8 2704 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2705 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2706 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2707 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2708 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8 2709 // CHECK4-NEXT: store i32* [[A5]], i32** [[_TMP6]], align 8 2710 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8 2711 // CHECK4-NEXT: store i32* [[C8]], i32** [[_TMP9]], align 8 2712 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2713 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2714 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2715 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2716 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 2717 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2718 // CHECK4: cond.true: 2719 // CHECK4-NEXT: br label [[COND_END:%.*]] 2720 // CHECK4: cond.false: 2721 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2722 // CHECK4-NEXT: br label [[COND_END]] 2723 // CHECK4: cond.end: 2724 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2725 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2726 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2727 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2728 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2729 // CHECK4: omp.inner.for.cond: 2730 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2731 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2732 // CHECK4-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2733 // CHECK4-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2734 // CHECK4: omp.inner.for.body: 2735 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2736 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2737 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2738 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2739 // CHECK4-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8 2740 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4 2741 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP17]], 1 2742 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP16]], align 4 2743 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[B7]], align 4 2744 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP18]], -1 2745 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B7]], align 4 2746 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8 2747 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 2748 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP20]], 1 2749 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP19]], align 4 2750 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2751 // CHECK4: omp.body.continue: 2752 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2753 // CHECK4: omp.inner.for.inc: 2754 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2755 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1 2756 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 2757 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2758 // CHECK4: omp.inner.for.end: 2759 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2760 // CHECK4: omp.loop.exit: 2761 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 2762 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2763 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 2764 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 2765 // CHECK4: .omp.lastprivate.then: 2766 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8 2767 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2768 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[TMP6]], align 4 2769 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[B7]], align 4 2770 // CHECK4-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4 2771 // CHECK4-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8 2772 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 2773 // CHECK4-NEXT: store i32 [[TMP28]], i32* [[TMP7]], align 4 2774 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 2775 // CHECK4: .omp.lastprivate.done: 2776 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 2777 // CHECK4-NEXT: ret void 2778 // 2779 // 2780 // CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke 2781 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] { 2782 // CHECK4-NEXT: entry: 2783 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2784 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>*, align 8 2785 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2786 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* 2787 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>** [[BLOCK_ADDR]], align 8 2788 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5 2789 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 2790 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6 2791 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 2792 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2793 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2794 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 2795 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS]], i32 0, i32 2 2796 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 2797 // CHECK4-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4 2798 // CHECK4-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 2799 // CHECK4-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 2800 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1 2801 // CHECK4-NEXT: [[TMP2:%.*]] = trunc i32 [[DEC]] to i8 2802 // CHECK4-NEXT: [[BF_LOAD1:%.*]] = load i8, i8* [[B]], align 8 2803 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15 2804 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16 2805 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 2806 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 2807 // CHECK4-NEXT: [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4 2808 // CHECK4-NEXT: [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4 2809 // CHECK4-NEXT: [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32 2810 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS]], i32 0, i32 3 2811 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 2812 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2813 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 2814 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 2815 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6 2816 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 2817 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]]) 2818 // CHECK4-NEXT: ret void 2819 // 2820 // 2821 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5 2822 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2823 // CHECK4-NEXT: entry: 2824 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2825 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2826 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2827 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2828 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2829 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2830 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2831 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2832 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2833 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2834 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2835 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2836 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2837 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 2838 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 2839 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2840 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2841 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2842 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2843 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2844 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2845 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2846 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 2847 // CHECK4-NEXT: store i32* [[TMP2]], i32** [[_TMP1]], align 8 2848 // CHECK4-NEXT: store i32* [[_TMP2]], i32** [[_TMP3]], align 8 2849 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2850 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2851 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2852 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2853 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP4]], align 8 2854 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2855 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2856 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2857 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2858 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2859 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2860 // CHECK4: cond.true: 2861 // CHECK4-NEXT: br label [[COND_END:%.*]] 2862 // CHECK4: cond.false: 2863 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2864 // CHECK4-NEXT: br label [[COND_END]] 2865 // CHECK4: cond.end: 2866 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2867 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2868 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2869 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2870 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2871 // CHECK4: omp.inner.for.cond: 2872 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2873 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2874 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2875 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2876 // CHECK4: omp.inner.for.body: 2877 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2878 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2879 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2880 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 2881 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2882 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 8 2883 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2884 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP13]], 1 2885 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP12]], align 4 2886 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2 2887 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 2888 // CHECK4-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4 2889 // CHECK4-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 2890 // CHECK4-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 2891 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1 2892 // CHECK4-NEXT: [[TMP14:%.*]] = trunc i32 [[DEC]] to i8 2893 // CHECK4-NEXT: [[BF_LOAD6:%.*]] = load i8, i8* [[B]], align 8 2894 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15 2895 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16 2896 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 2897 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 2898 // CHECK4-NEXT: [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4 2899 // CHECK4-NEXT: [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4 2900 // CHECK4-NEXT: [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32 2901 // CHECK4-NEXT: [[TMP15:%.*]] = load i32*, i32** [[_TMP4]], align 8 2902 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2903 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP16]], 1 2904 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP15]], align 4 2905 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2906 // CHECK4: omp.body.continue: 2907 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2908 // CHECK4: omp.inner.for.inc: 2909 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2910 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 2911 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2912 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2913 // CHECK4: omp.inner.for.end: 2914 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2915 // CHECK4: omp.loop.exit: 2916 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2917 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 2918 // CHECK4-NEXT: ret void 2919 // 2920 // 2921 // CHECK5-LABEL: define {{[^@]+}}@main 2922 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 2923 // CHECK5-NEXT: entry: 2924 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2925 // CHECK5-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 2926 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2927 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2928 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2929 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2930 // CHECK5-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 2931 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 2932 // CHECK5-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 2933 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2934 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4 2935 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2936 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2937 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2938 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2939 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2940 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2941 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 2942 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar) 2943 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 2944 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2945 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*)) 2946 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2947 // CHECK5-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2948 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]] 2949 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2950 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2951 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2952 // CHECK5: arraydestroy.body: 2953 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2954 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2955 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2956 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2957 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2958 // CHECK5: arraydestroy.done1: 2959 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2960 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 2961 // CHECK5-NEXT: ret i32 [[TMP2]] 2962 // 2963 // 2964 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2965 // CHECK5-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 2966 // CHECK5-NEXT: entry: 2967 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2968 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2969 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2970 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2971 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2972 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2973 // CHECK5-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 2974 // CHECK5-NEXT: ret void 2975 // 2976 // 2977 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2978 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 2979 // CHECK5-NEXT: entry: 2980 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2981 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2982 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2983 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2984 // CHECK5-NEXT: ret void 2985 // 2986 // 2987 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2988 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 2989 // CHECK5-NEXT: entry: 2990 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2991 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2992 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2993 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2994 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2995 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2996 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2997 // CHECK5-NEXT: ret void 2998 // 2999 // 3000 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 3001 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3002 // CHECK5-NEXT: entry: 3003 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3004 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3005 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 3006 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3007 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 3008 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 3009 // CHECK5-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 3010 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3011 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3012 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3013 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3014 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3015 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3016 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3017 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3018 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3019 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3020 // CHECK5-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4 3021 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3022 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3023 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3024 // CHECK5-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 3025 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3026 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 3027 // CHECK5-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 3028 // CHECK5-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 3029 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 3030 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3031 // CHECK5-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 3032 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 3033 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 3034 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3035 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3036 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3037 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3038 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3039 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3040 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3041 // CHECK5: arrayctor.loop: 3042 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3043 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3044 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3045 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3046 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3047 // CHECK5: arrayctor.cont: 3048 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 3049 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3050 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3051 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3052 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3053 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 3054 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3055 // CHECK5: cond.true: 3056 // CHECK5-NEXT: br label [[COND_END:%.*]] 3057 // CHECK5: cond.false: 3058 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3059 // CHECK5-NEXT: br label [[COND_END]] 3060 // CHECK5: cond.end: 3061 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3062 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3063 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3064 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3065 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3066 // CHECK5: omp.inner.for.cond: 3067 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3068 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3069 // CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3070 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3071 // CHECK5: omp.inner.for.cond.cleanup: 3072 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3073 // CHECK5: omp.inner.for.body: 3074 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3075 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3076 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3077 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3078 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4 3079 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[I]], align 4 3080 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 3081 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3082 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 3083 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3084 // CHECK5-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64 3085 // CHECK5-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]] 3086 // CHECK5-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 3087 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 3088 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4 3089 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]] 3090 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[SIVAR5]], align 4 3091 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3092 // CHECK5: omp.body.continue: 3093 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3094 // CHECK5: omp.inner.for.inc: 3095 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3096 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 3097 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 3098 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3099 // CHECK5: omp.inner.for.end: 3100 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3101 // CHECK5: omp.loop.exit: 3102 // CHECK5-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3103 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3104 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3105 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3106 // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3107 // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3108 // CHECK5: .omp.lastprivate.then: 3109 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4 3110 // CHECK5-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 4 3111 // CHECK5-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3112 // CHECK5-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 3113 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false) 3114 // CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0 3115 // CHECK5-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S* 3116 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 3117 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]] 3118 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3119 // CHECK5: omp.arraycpy.body: 3120 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3121 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3122 // CHECK5-NEXT: [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]]) 3123 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3124 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3125 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 3126 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 3127 // CHECK5: omp.arraycpy.done13: 3128 // CHECK5-NEXT: [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) 3129 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4 3130 // CHECK5-NEXT: store i32 [[TMP28]], i32* [[TMP4]], align 4 3131 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3132 // CHECK5: .omp.lastprivate.done: 3133 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]] 3134 // CHECK5-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3135 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 3136 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3137 // CHECK5: arraydestroy.body: 3138 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3139 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3140 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3141 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] 3142 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] 3143 // CHECK5: arraydestroy.done16: 3144 // CHECK5-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3145 // CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3146 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]]) 3147 // CHECK5-NEXT: ret void 3148 // 3149 // 3150 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3151 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3152 // CHECK5-NEXT: entry: 3153 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3154 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3155 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3156 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3157 // CHECK5-NEXT: ret void 3158 // 3159 // 3160 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 3161 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3162 // CHECK5-NEXT: entry: 3163 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3164 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3165 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3166 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3167 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3168 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3169 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3170 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3171 // CHECK5-NEXT: [[F:%.*]] = alloca float, align 4 3172 // CHECK5-NEXT: [[X:%.*]] = alloca double, align 8 3173 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3174 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3175 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3176 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3177 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3178 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3179 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3180 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* @f, align 4 3181 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4 3182 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3183 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3184 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) 3185 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3186 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3187 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 3188 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3189 // CHECK5: cond.true: 3190 // CHECK5-NEXT: br label [[COND_END:%.*]] 3191 // CHECK5: cond.false: 3192 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3193 // CHECK5-NEXT: br label [[COND_END]] 3194 // CHECK5: cond.end: 3195 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3196 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3197 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3198 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3199 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3200 // CHECK5: omp.inner.for.cond: 3201 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3202 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3203 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3204 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3205 // CHECK5: omp.inner.for.body: 3206 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3207 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3208 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3209 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3210 // CHECK5-NEXT: [[TMP9:%.*]] = load double, double* [[X]], align 8 3211 // CHECK5-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00 3212 // CHECK5-NEXT: store double [[INC]], double* [[X]], align 8 3213 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3214 // CHECK5: omp.body.continue: 3215 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3216 // CHECK5: omp.inner.for.inc: 3217 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3218 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3219 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3220 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3221 // CHECK5: omp.inner.for.end: 3222 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3223 // CHECK5: omp.loop.exit: 3224 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3225 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3226 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3227 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3228 // CHECK5: .omp.lastprivate.then: 3229 // CHECK5-NEXT: [[TMP13:%.*]] = load double, double* [[X]], align 8 3230 // CHECK5-NEXT: store double [[TMP13]], double* @_ZN1A1xE, align 8 3231 // CHECK5-NEXT: [[TMP14:%.*]] = load float, float* [[F]], align 4 3232 // CHECK5-NEXT: store float [[TMP14]], float* @f, align 4 3233 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3234 // CHECK5: .omp.lastprivate.done: 3235 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) 3236 // CHECK5-NEXT: ret void 3237 // 3238 // 3239 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 3240 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3241 // CHECK5-NEXT: entry: 3242 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3243 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3244 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3245 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3246 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3247 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3248 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3249 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3250 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3251 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3252 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3253 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3254 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3255 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3256 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3257 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3258 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3259 // CHECK5-NEXT: [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*)) 3260 // CHECK5-NEXT: [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float* 3261 // CHECK5-NEXT: [[TMP2:%.*]] = load float, float* @f, align 4 3262 // CHECK5-NEXT: store float [[TMP2]], float* [[DOTF__ADDR]], align 4 3263 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 3264 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3265 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3266 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 3267 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3268 // CHECK5: cond.true: 3269 // CHECK5-NEXT: br label [[COND_END:%.*]] 3270 // CHECK5: cond.false: 3271 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3272 // CHECK5-NEXT: br label [[COND_END]] 3273 // CHECK5: cond.end: 3274 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3275 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3276 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3277 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3278 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3279 // CHECK5: omp.inner.for.cond: 3280 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3281 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3282 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3283 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3284 // CHECK5: omp.inner.for.cond.cleanup: 3285 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3286 // CHECK5: omp.inner.for.body: 3287 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3288 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3289 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3290 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3291 // CHECK5-NEXT: [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8 3292 // CHECK5-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00 3293 // CHECK5-NEXT: store double [[INC]], double* @_ZN1A1xE, align 8 3294 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3295 // CHECK5: omp.body.continue: 3296 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3297 // CHECK5: omp.inner.for.inc: 3298 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3299 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3300 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3301 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3302 // CHECK5: omp.inner.for.end: 3303 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3304 // CHECK5: omp.loop.exit: 3305 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3306 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3307 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3308 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3309 // CHECK5: .omp.lastprivate.then: 3310 // CHECK5-NEXT: [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4 3311 // CHECK5-NEXT: store float [[TMP13]], float* @f, align 4 3312 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3313 // CHECK5: .omp.lastprivate.done: 3314 // CHECK5-NEXT: [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8* 3315 // CHECK5-NEXT: call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*)) 3316 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 3317 // CHECK5-NEXT: ret void 3318 // 3319 // 3320 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 3321 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3322 // CHECK5-NEXT: entry: 3323 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3324 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3325 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3326 // CHECK5-NEXT: [[TMP:%.*]] = alloca i8, align 1 3327 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3328 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3329 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3330 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3331 // CHECK5-NEXT: [[F:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 4 3332 // CHECK5-NEXT: [[CNT:%.*]] = alloca i8, align 1 3333 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3334 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3335 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3336 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3337 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3338 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3339 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3340 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3341 // CHECK5-NEXT: [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*)) 3342 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 1 3343 // CHECK5-NEXT: store i8 0, i8* [[TMP2]], align 4 3344 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 0 3345 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3346 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3347 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3348 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3349 // CHECK5: cond.true: 3350 // CHECK5-NEXT: br label [[COND_END:%.*]] 3351 // CHECK5: cond.false: 3352 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3353 // CHECK5-NEXT: br label [[COND_END]] 3354 // CHECK5: cond.end: 3355 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3356 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3357 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3358 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3359 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3360 // CHECK5: omp.inner.for.cond: 3361 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3362 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3363 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3364 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3365 // CHECK5: omp.inner.for.cond.cleanup: 3366 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3367 // CHECK5: omp.inner.for.body: 3368 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3369 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3370 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3371 // CHECK5-NEXT: [[CONV:%.*]] = trunc i32 [[ADD]] to i8 3372 // CHECK5-NEXT: store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1 3373 // CHECK5-NEXT: [[TMP10:%.*]] = load double, double* @_ZN1A1xE, align 8 3374 // CHECK5-NEXT: [[INC:%.*]] = fadd double [[TMP10]], 1.000000e+00 3375 // CHECK5-NEXT: store double [[INC]], double* @_ZN1A1xE, align 8 3376 // CHECK5-NEXT: store float 0.000000e+00, float* [[TMP3]], align 4 3377 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3378 // CHECK5-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var) 3379 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* @.{{pl_cond[.].+[.|,]}} align 4 3380 // CHECK5-NEXT: [[TMP13:%.*]] = icmp sle i32 [[TMP12]], [[TMP11]] 3381 // CHECK5-NEXT: br i1 [[TMP13]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]] 3382 // CHECK5: lp_cond_then: 3383 // CHECK5-NEXT: store i32 [[TMP11]], i32* @.{{pl_cond[.].+[.|,]}} align 4 3384 // CHECK5-NEXT: [[TMP14:%.*]] = load float, float* [[TMP3]], align 4 3385 // CHECK5-NEXT: store float [[TMP14]], float* @{{pl_cond[.].+[.|,]}} align 4 3386 // CHECK5-NEXT: br label [[LP_COND_EXIT]] 3387 // CHECK5: lp_cond_exit: 3388 // CHECK5-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var) 3389 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3390 // CHECK5: omp.body.continue: 3391 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3392 // CHECK5: omp.inner.for.inc: 3393 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3394 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], 1 3395 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3396 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3397 // CHECK5: omp.inner.for.end: 3398 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3399 // CHECK5: omp.loop.exit: 3400 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3401 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3402 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3403 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 3404 // CHECK5-NEXT: br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3405 // CHECK5: .omp.lastprivate.then: 3406 // CHECK5-NEXT: store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1 3407 // CHECK5-NEXT: [[TMP18:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1 3408 // CHECK5-NEXT: store i8 [[TMP18]], i8* @cnt, align 1 3409 // CHECK5-NEXT: [[TMP19:%.*]] = load float, float* @{{pl_cond[.].+[.|,]}} align 4 3410 // CHECK5-NEXT: store float [[TMP19]], float* [[TMP3]], align 4 3411 // CHECK5-NEXT: [[TMP20:%.*]] = load float, float* [[TMP3]], align 4 3412 // CHECK5-NEXT: store float [[TMP20]], float* @f, align 4 3413 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3414 // CHECK5: .omp.lastprivate.done: 3415 // CHECK5-NEXT: call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*)) 3416 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 3417 // CHECK5-NEXT: ret void 3418 // 3419 // 3420 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3421 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] { 3422 // CHECK5-NEXT: entry: 3423 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3424 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3425 // CHECK5-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 3426 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 3427 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 3428 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 3429 // CHECK5-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 128 3430 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3431 // CHECK5-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]]) 3432 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 128 3433 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3434 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3435 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3436 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3437 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3438 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3439 // CHECK5-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128 3440 // CHECK5-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128 3441 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]]) 3442 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 3443 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3444 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3445 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3446 // CHECK5: arraydestroy.body: 3447 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3448 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3449 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3450 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3451 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 3452 // CHECK5: arraydestroy.done1: 3453 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 3454 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4 3455 // CHECK5-NEXT: ret i32 [[TMP3]] 3456 // 3457 // 3458 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3459 // CHECK5-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3460 // CHECK5-NEXT: entry: 3461 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3462 // CHECK5-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3463 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3464 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3465 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3466 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3467 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3468 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3469 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3470 // CHECK5-NEXT: [[A3:%.*]] = alloca i32, align 4 3471 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 3472 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3473 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3474 // CHECK5-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3475 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3476 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3477 // CHECK5-NEXT: store i32 0, i32* [[A]], align 8 3478 // CHECK5-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3479 // CHECK5-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8 3480 // CHECK5-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3481 // CHECK5-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 3482 // CHECK5-NEXT: store i8 [[BF_SET]], i8* [[B]], align 8 3483 // CHECK5-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 3484 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3485 // CHECK5-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 3486 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]]) 3487 // CHECK5-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 3488 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3489 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3490 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3491 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3492 // CHECK5-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 3493 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3494 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3495 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 3496 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3497 // CHECK5: cond.true: 3498 // CHECK5-NEXT: br label [[COND_END:%.*]] 3499 // CHECK5: cond.false: 3500 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3501 // CHECK5-NEXT: br label [[COND_END]] 3502 // CHECK5: cond.end: 3503 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3504 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3505 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3506 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3507 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3508 // CHECK5: omp.inner.for.cond: 3509 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3510 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3511 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3512 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3513 // CHECK5: omp.inner.for.body: 3514 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3515 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 3516 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3517 // CHECK5-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 3518 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP8]], align 4 3519 // CHECK5-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8 3520 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3521 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 3522 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP9]], align 4 3523 // CHECK5-NEXT: [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3524 // CHECK5-NEXT: [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8 3525 // CHECK5-NEXT: [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4 3526 // CHECK5-NEXT: [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4 3527 // CHECK5-NEXT: [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32 3528 // CHECK5-NEXT: [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1 3529 // CHECK5-NEXT: [[TMP11:%.*]] = trunc i32 [[DEC]] to i8 3530 // CHECK5-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8 3531 // CHECK5-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15 3532 // CHECK5-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 3533 // CHECK5-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 3534 // CHECK5-NEXT: store i8 [[BF_SET10]], i8* [[B6]], align 8 3535 // CHECK5-NEXT: [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4 3536 // CHECK5-NEXT: [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4 3537 // CHECK5-NEXT: [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32 3538 // CHECK5-NEXT: [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3 3539 // CHECK5-NEXT: [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8 3540 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3541 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP13]], 1 3542 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TMP12]], align 4 3543 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3544 // CHECK5: omp.body.continue: 3545 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3546 // CHECK5: omp.inner.for.inc: 3547 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3548 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1 3549 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3550 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3551 // CHECK5: omp.inner.for.end: 3552 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3553 // CHECK5: omp.loop.exit: 3554 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 3555 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 3556 // CHECK5-NEXT: ret void 3557 // 3558 // 3559 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 3560 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] { 3561 // CHECK5-NEXT: entry: 3562 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3563 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3564 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3565 // CHECK5-NEXT: [[E:%.*]] = alloca [4 x i8]*, align 8 3566 // CHECK5-NEXT: [[A:%.*]] = alloca i32*, align 8 3567 // CHECK5-NEXT: [[B:%.*]] = alloca i32, align 4 3568 // CHECK5-NEXT: [[C:%.*]] = alloca i32*, align 8 3569 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3570 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 3571 // CHECK5-NEXT: [[_TMP5:%.*]] = alloca [4 x i8]*, align 8 3572 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3573 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 3574 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3575 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3576 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3577 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3578 // CHECK5-NEXT: [[E7:%.*]] = alloca [4 x i8], align 1 3579 // CHECK5-NEXT: [[_TMP8:%.*]] = alloca [4 x i8]*, align 8 3580 // CHECK5-NEXT: [[A9:%.*]] = alloca i32, align 4 3581 // CHECK5-NEXT: [[_TMP10:%.*]] = alloca i32*, align 8 3582 // CHECK5-NEXT: [[B11:%.*]] = alloca i32, align 4 3583 // CHECK5-NEXT: [[C12:%.*]] = alloca i32, align 4 3584 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32*, align 8 3585 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3586 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3587 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3588 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3589 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3590 // CHECK5-NEXT: [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1 3591 // CHECK5-NEXT: store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8 3592 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0 3593 // CHECK5-NEXT: store i32* [[A2]], i32** [[A]], align 8 3594 // CHECK5-NEXT: [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3 3595 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8 3596 // CHECK5-NEXT: store i32* [[TMP1]], i32** [[C]], align 8 3597 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 3598 // CHECK5-NEXT: store i32* [[TMP2]], i32** [[TMP]], align 8 3599 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C]], align 8 3600 // CHECK5-NEXT: store i32* [[TMP3]], i32** [[_TMP4]], align 8 3601 // CHECK5-NEXT: [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8 3602 // CHECK5-NEXT: store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8 3603 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3604 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3605 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3606 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3607 // CHECK5-NEXT: [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 3608 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8* 3609 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8* 3610 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false) 3611 // CHECK5-NEXT: store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8 3612 // CHECK5-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3613 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3614 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 3615 // CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8 3616 // CHECK5-NEXT: store i32* [[A9]], i32** [[_TMP10]], align 8 3617 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 3618 // CHECK5-NEXT: store i32* [[C12]], i32** [[_TMP13]], align 8 3619 // CHECK5-NEXT: [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8 3620 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3621 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3622 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1 3623 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3624 // CHECK5: cond.true: 3625 // CHECK5-NEXT: br label [[COND_END:%.*]] 3626 // CHECK5: cond.false: 3627 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3628 // CHECK5-NEXT: br label [[COND_END]] 3629 // CHECK5: cond.end: 3630 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3631 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3632 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3633 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 3634 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3635 // CHECK5: omp.inner.for.cond: 3636 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3637 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3638 // CHECK5-NEXT: [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3639 // CHECK5-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3640 // CHECK5: omp.inner.for.body: 3641 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3642 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3643 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3644 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3645 // CHECK5-NEXT: [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8 3646 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3647 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 3648 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP19]], align 4 3649 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[B11]], align 4 3650 // CHECK5-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP21]], -1 3651 // CHECK5-NEXT: store i32 [[DEC]], i32* [[B11]], align 4 3652 // CHECK5-NEXT: [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8 3653 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3654 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP23]], 1 3655 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TMP22]], align 4 3656 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3657 // CHECK5: omp.body.continue: 3658 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3659 // CHECK5: omp.inner.for.inc: 3660 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3661 // CHECK5-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1 3662 // CHECK5-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4 3663 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3664 // CHECK5: omp.inner.for.end: 3665 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3666 // CHECK5: omp.loop.exit: 3667 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]]) 3668 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3669 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3670 // CHECK5-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3671 // CHECK5: .omp.lastprivate.then: 3672 // CHECK5-NEXT: [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8 3673 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 3674 // CHECK5-NEXT: store i32 [[TMP28]], i32* [[TMP10]], align 4 3675 // CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[B11]], align 4 3676 // CHECK5-NEXT: store i32 [[TMP29]], i32* [[B]], align 4 3677 // CHECK5-NEXT: [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8 3678 // CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3679 // CHECK5-NEXT: store i32 [[TMP31]], i32* [[TMP11]], align 4 3680 // CHECK5-NEXT: [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8 3681 // CHECK5-NEXT: [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1 3682 // CHECK5-NEXT: store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1 3683 // CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[B11]], align 4 3684 // CHECK5-NEXT: [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2 3685 // CHECK5-NEXT: [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8 3686 // CHECK5-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8 3687 // CHECK5-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15 3688 // CHECK5-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3689 // CHECK5-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]] 3690 // CHECK5-NEXT: store i8 [[BF_SET]], i8* [[B16]], align 8 3691 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3692 // CHECK5: .omp.lastprivate.done: 3693 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]]) 3694 // CHECK5-NEXT: ret void 3695 // 3696 // 3697 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3698 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3699 // CHECK5-NEXT: entry: 3700 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3701 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3702 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3703 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3704 // CHECK5-NEXT: store float 0.000000e+00, float* [[F]], align 4 3705 // CHECK5-NEXT: ret void 3706 // 3707 // 3708 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3709 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3710 // CHECK5-NEXT: entry: 3711 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3712 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3713 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3714 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3715 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3716 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3717 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3718 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4 3719 // CHECK5-NEXT: ret void 3720 // 3721 // 3722 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3723 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3724 // CHECK5-NEXT: entry: 3725 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3726 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3727 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3728 // CHECK5-NEXT: ret void 3729 // 3730 // 3731 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3732 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3733 // CHECK5-NEXT: entry: 3734 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3735 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3736 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3737 // CHECK5-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3738 // CHECK5-NEXT: ret void 3739 // 3740 // 3741 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 3742 // CHECK5-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3743 // CHECK5-NEXT: entry: 3744 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3745 // CHECK5-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3746 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3747 // CHECK5-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3748 // CHECK5-NEXT: ret void 3749 // 3750 // 3751 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3752 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3753 // CHECK5-NEXT: entry: 3754 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3755 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3756 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3757 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3758 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3759 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3760 // CHECK5-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3761 // CHECK5-NEXT: ret void 3762 // 3763 // 3764 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 3765 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3766 // CHECK5-NEXT: entry: 3767 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3768 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3769 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 3770 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3771 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 3772 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 3773 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3774 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3775 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3776 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3777 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3778 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3779 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3780 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3781 // CHECK5-NEXT: [[T_VAR3:%.*]] = alloca i32, align 128 3782 // CHECK5-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 128 3783 // CHECK5-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128 3784 // CHECK5-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 3785 // CHECK5-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8 3786 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3787 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3788 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3789 // CHECK5-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 3790 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3791 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3792 // CHECK5-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3793 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 3794 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3795 // CHECK5-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3796 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3797 // CHECK5-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 3798 // CHECK5-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3799 // CHECK5-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 3800 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3801 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3802 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3803 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3804 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3805 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3806 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3807 // CHECK5: arrayctor.loop: 3808 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3809 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3810 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3811 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3812 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3813 // CHECK5: arrayctor.cont: 3814 // CHECK5-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3815 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 3816 // CHECK5-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8 3817 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3818 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3819 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3820 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3821 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 3822 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3823 // CHECK5: cond.true: 3824 // CHECK5-NEXT: br label [[COND_END:%.*]] 3825 // CHECK5: cond.false: 3826 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3827 // CHECK5-NEXT: br label [[COND_END]] 3828 // CHECK5: cond.end: 3829 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 3830 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3831 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3832 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 3833 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3834 // CHECK5: omp.inner.for.cond: 3835 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3836 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3837 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 3838 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3839 // CHECK5: omp.inner.for.cond.cleanup: 3840 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3841 // CHECK5: omp.inner.for.body: 3842 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3843 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 3844 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3845 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3846 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128 3847 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3848 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 3849 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 3850 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4 3851 // CHECK5-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 3852 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4 3853 // CHECK5-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 3854 // CHECK5-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]] 3855 // CHECK5-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP16]]) 3856 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3857 // CHECK5: omp.body.continue: 3858 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3859 // CHECK5: omp.inner.for.inc: 3860 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3861 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1 3862 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 3863 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3864 // CHECK5: omp.inner.for.end: 3865 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3866 // CHECK5: omp.loop.exit: 3867 // CHECK5-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3868 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 3869 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) 3870 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3871 // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3872 // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 3873 // CHECK5: .omp.lastprivate.then: 3874 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128 3875 // CHECK5-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 128 3876 // CHECK5-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3877 // CHECK5-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3878 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false) 3879 // CHECK5-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0 3880 // CHECK5-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0* 3881 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 3882 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]] 3883 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3884 // CHECK5: omp.arraycpy.body: 3885 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3886 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3887 // CHECK5-NEXT: [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]]) 3888 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3889 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3890 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]] 3891 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] 3892 // CHECK5: omp.arraycpy.done14: 3893 // CHECK5-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8 3894 // CHECK5-NEXT: [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP28]]) 3895 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 3896 // CHECK5: .omp.lastprivate.done: 3897 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] 3898 // CHECK5-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3899 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2 3900 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3901 // CHECK5: arraydestroy.body: 3902 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3903 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3904 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 3905 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]] 3906 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]] 3907 // CHECK5: arraydestroy.done17: 3908 // CHECK5-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3909 // CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3910 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]]) 3911 // CHECK5-NEXT: ret void 3912 // 3913 // 3914 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3915 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3916 // CHECK5-NEXT: entry: 3917 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3918 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3919 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3920 // CHECK5-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3921 // CHECK5-NEXT: ret void 3922 // 3923 // 3924 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3925 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3926 // CHECK5-NEXT: entry: 3927 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3928 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3929 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3930 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3931 // CHECK5-NEXT: store i32 0, i32* [[F]], align 4 3932 // CHECK5-NEXT: ret void 3933 // 3934 // 3935 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3936 // CHECK5-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 3937 // CHECK5-NEXT: entry: 3938 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3939 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3940 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3941 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3942 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3943 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3944 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3945 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3946 // CHECK5-NEXT: [[A3:%.*]] = alloca i32, align 4 3947 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 3948 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) 3949 // CHECK5-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3950 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3951 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3952 // CHECK5-NEXT: store i32 0, i32* [[A]], align 4 3953 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]]) 3954 // CHECK5-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 3955 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3956 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3957 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3958 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3959 // CHECK5-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 3960 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3961 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3962 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1 3963 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3964 // CHECK5: cond.true: 3965 // CHECK5-NEXT: br label [[COND_END:%.*]] 3966 // CHECK5: cond.false: 3967 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3968 // CHECK5-NEXT: br label [[COND_END]] 3969 // CHECK5: cond.end: 3970 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 3971 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3972 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3973 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 3974 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3975 // CHECK5: omp.inner.for.cond: 3976 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3977 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3978 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 3979 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3980 // CHECK5: omp.inner.for.body: 3981 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3982 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 3983 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3984 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8 3985 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP7]], align 4 3986 // CHECK5-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8 3987 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3988 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1 3989 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP8]], align 4 3990 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3991 // CHECK5: omp.body.continue: 3992 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3993 // CHECK5: omp.inner.for.inc: 3994 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3995 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 3996 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3997 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3998 // CHECK5: omp.inner.for.end: 3999 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4000 // CHECK5: omp.loop.exit: 4001 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 4002 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) 4003 // CHECK5-NEXT: ret void 4004 // 4005 // 4006 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 4007 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] { 4008 // CHECK5-NEXT: entry: 4009 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4010 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4011 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 4012 // CHECK5-NEXT: [[A:%.*]] = alloca i32*, align 8 4013 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4014 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4015 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4016 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4017 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4018 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4019 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4020 // CHECK5-NEXT: [[A3:%.*]] = alloca i32, align 4 4021 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32*, align 8 4022 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4023 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4024 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4025 // CHECK5-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 4026 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 4027 // CHECK5-NEXT: [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0 4028 // CHECK5-NEXT: store i32* [[A1]], i32** [[A]], align 8 4029 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A]], align 8 4030 // CHECK5-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 4031 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4032 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4033 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4034 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4035 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 4036 // CHECK5-NEXT: store i32* [[A3]], i32** [[_TMP4]], align 8 4037 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4038 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4039 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4040 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4041 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 4042 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4043 // CHECK5: cond.true: 4044 // CHECK5-NEXT: br label [[COND_END:%.*]] 4045 // CHECK5: cond.false: 4046 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4047 // CHECK5-NEXT: br label [[COND_END]] 4048 // CHECK5: cond.end: 4049 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4050 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4051 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4052 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4053 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4054 // CHECK5: omp.inner.for.cond: 4055 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4056 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4057 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4058 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4059 // CHECK5: omp.inner.for.body: 4060 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4061 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4062 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4063 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4064 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8 4065 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 4066 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4067 // CHECK5-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 4068 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4069 // CHECK5: omp.body.continue: 4070 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4071 // CHECK5: omp.inner.for.inc: 4072 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4073 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1 4074 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4075 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4076 // CHECK5: omp.inner.for.end: 4077 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4078 // CHECK5: omp.loop.exit: 4079 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4080 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4081 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4082 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 4083 // CHECK5: .omp.lastprivate.then: 4084 // CHECK5-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8 4085 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4 4086 // CHECK5-NEXT: store i32 [[TMP17]], i32* [[TMP2]], align 4 4087 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 4088 // CHECK5: .omp.lastprivate.done: 4089 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]]) 4090 // CHECK5-NEXT: ret void 4091 // 4092 // 4093 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4094 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 4095 // CHECK5-NEXT: entry: 4096 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4097 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4098 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4099 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4100 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4101 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4102 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4103 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4104 // CHECK5-NEXT: ret void 4105 // 4106 // 4107 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4108 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 4109 // CHECK5-NEXT: entry: 4110 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4111 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4112 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4113 // CHECK5-NEXT: ret void 4114 // 4115