1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute simd private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 3; 75 sfvar = 4.0; 76 [&]() { 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 8.0; 81 82 }(); 83 } 84 }(); 85 return 0; 86 #else 87 S<float> test; 88 int t_var = 0; 89 int vec[] = {1, 2}; 90 S<float> s_arr[] = {1, 2}; 91 S<float> &var = test; 92 93 #pragma omp target 94 #pragma omp teams 95 #pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var, svar) 96 for (int i = 0; i < 2; ++i) { 97 vec[i] = t_var; 98 s_arr[i] = var; 99 } 100 int i; 101 102 #pragma omp target 103 #pragma omp teams 104 #pragma omp distribute simd 105 for (i = 0; i < 2; ++i) { 106 ; 107 } 108 return tmain<int>(); 109 #endif 110 } 111 112 113 114 115 116 117 #endif 118 // CHECK1-LABEL: define {{[^@]+}}@main 119 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 120 // CHECK1-NEXT: entry: 121 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 123 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 124 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 125 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 126 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 127 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 128 // CHECK1-NEXT: ret i32 0 129 // 130 // 131 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 132 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 133 // CHECK1-NEXT: entry: 134 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 135 // CHECK1-NEXT: ret void 136 // 137 // 138 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 139 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 140 // CHECK1-NEXT: entry: 141 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 142 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 143 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 146 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 151 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 152 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 153 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 155 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 157 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 158 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 159 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 160 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 162 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 163 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 164 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 165 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 166 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 167 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 168 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 169 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 170 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 171 // CHECK1: cond.true: 172 // CHECK1-NEXT: br label [[COND_END:%.*]] 173 // CHECK1: cond.false: 174 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 175 // CHECK1-NEXT: br label [[COND_END]] 176 // CHECK1: cond.end: 177 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 178 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 179 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 180 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 181 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 182 // CHECK1: omp.inner.for.cond: 183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 184 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 185 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 186 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 187 // CHECK1: omp.inner.for.body: 188 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 189 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 190 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 191 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 192 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !4 193 // CHECK1-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8, !llvm.access.group !4 194 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8, !llvm.access.group !4 195 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !4 196 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !4 197 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 198 // CHECK1-NEXT: store double* [[G]], double** [[TMP9]], align 8, !llvm.access.group !4 199 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 200 // CHECK1-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8, !llvm.access.group !4 201 // CHECK1-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8, !llvm.access.group !4 202 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 203 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8, !llvm.access.group !4 204 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 205 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8, !llvm.access.group !4 206 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 207 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 208 // CHECK1: omp.body.continue: 209 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 210 // CHECK1: omp.inner.for.inc: 211 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 212 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 213 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 215 // CHECK1: omp.inner.for.end: 216 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 217 // CHECK1: omp.loop.exit: 218 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 219 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 220 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 221 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 222 // CHECK1: .omp.final.then: 223 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 224 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 225 // CHECK1: .omp.final.done: 226 // CHECK1-NEXT: ret void 227 // 228 // 229 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 230 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 231 // CHECK1-NEXT: entry: 232 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 233 // CHECK1-NEXT: ret void 234 // 235 // 236 // CHECK2-LABEL: define {{[^@]+}}@main 237 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 238 // CHECK2-NEXT: entry: 239 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 240 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 241 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 242 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 243 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 244 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 245 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 246 // CHECK2-NEXT: ret i32 0 247 // 248 // 249 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 250 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 251 // CHECK2-NEXT: entry: 252 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 253 // CHECK2-NEXT: ret void 254 // 255 // 256 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 257 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 258 // CHECK2-NEXT: entry: 259 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 260 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 261 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 262 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 263 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 264 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 265 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 266 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 267 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 268 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 269 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 270 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 271 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 272 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 273 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 274 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 275 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 276 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 277 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 278 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 279 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 280 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 281 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 282 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 283 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 284 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 285 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 286 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 287 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 288 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 289 // CHECK2: cond.true: 290 // CHECK2-NEXT: br label [[COND_END:%.*]] 291 // CHECK2: cond.false: 292 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 293 // CHECK2-NEXT: br label [[COND_END]] 294 // CHECK2: cond.end: 295 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 296 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 297 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 298 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 299 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 300 // CHECK2: omp.inner.for.cond: 301 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 302 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 303 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 304 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 305 // CHECK2: omp.inner.for.body: 306 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 307 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 308 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 309 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 310 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !4 311 // CHECK2-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8, !llvm.access.group !4 312 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8, !llvm.access.group !4 313 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !4 314 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !4 315 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 316 // CHECK2-NEXT: store double* [[G]], double** [[TMP9]], align 8, !llvm.access.group !4 317 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 318 // CHECK2-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8, !llvm.access.group !4 319 // CHECK2-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8, !llvm.access.group !4 320 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 321 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8, !llvm.access.group !4 322 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 323 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8, !llvm.access.group !4 324 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 325 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 326 // CHECK2: omp.body.continue: 327 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 328 // CHECK2: omp.inner.for.inc: 329 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 330 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 331 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 332 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 333 // CHECK2: omp.inner.for.end: 334 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 335 // CHECK2: omp.loop.exit: 336 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 337 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 338 // CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 339 // CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 340 // CHECK2: .omp.final.then: 341 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 342 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 343 // CHECK2: .omp.final.done: 344 // CHECK2-NEXT: ret void 345 // 346 // 347 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 348 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 349 // CHECK2-NEXT: entry: 350 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 351 // CHECK2-NEXT: ret void 352 // 353 // 354 // CHECK3-LABEL: define {{[^@]+}}@main 355 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 356 // CHECK3-NEXT: entry: 357 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 359 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 360 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 361 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 362 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 363 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 364 // CHECK3-NEXT: ret i32 0 365 // 366 // 367 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 368 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 369 // CHECK3-NEXT: entry: 370 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 371 // CHECK3-NEXT: ret void 372 // 373 // 374 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 375 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 376 // CHECK3-NEXT: entry: 377 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 378 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 379 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 380 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 381 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 382 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 383 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 384 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 385 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 386 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 387 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 388 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 389 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 390 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 391 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 392 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 393 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 394 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 395 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 396 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 397 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 398 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 399 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 400 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 401 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 402 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 403 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 404 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 405 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 406 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 407 // CHECK3: cond.true: 408 // CHECK3-NEXT: br label [[COND_END:%.*]] 409 // CHECK3: cond.false: 410 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 411 // CHECK3-NEXT: br label [[COND_END]] 412 // CHECK3: cond.end: 413 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 414 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 415 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 416 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 417 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 418 // CHECK3: omp.inner.for.cond: 419 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 420 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 421 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 422 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 423 // CHECK3: omp.inner.for.body: 424 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 425 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 426 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 427 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 428 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !5 429 // CHECK3-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 430 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4, !llvm.access.group !5 431 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !5 432 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !5 433 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 434 // CHECK3-NEXT: store double* [[G]], double** [[TMP9]], align 4, !llvm.access.group !5 435 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 436 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 437 // CHECK3-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4, !llvm.access.group !5 438 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 439 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4, !llvm.access.group !5 440 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 441 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4, !llvm.access.group !5 442 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 443 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 444 // CHECK3: omp.body.continue: 445 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 446 // CHECK3: omp.inner.for.inc: 447 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 448 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 449 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 450 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 451 // CHECK3: omp.inner.for.end: 452 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 453 // CHECK3: omp.loop.exit: 454 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 455 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 456 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 457 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 458 // CHECK3: .omp.final.then: 459 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 460 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 461 // CHECK3: .omp.final.done: 462 // CHECK3-NEXT: ret void 463 // 464 // 465 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 466 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 467 // CHECK3-NEXT: entry: 468 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 469 // CHECK3-NEXT: ret void 470 // 471 // 472 // CHECK4-LABEL: define {{[^@]+}}@main 473 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 474 // CHECK4-NEXT: entry: 475 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 476 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 477 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 478 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 479 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 480 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 481 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 482 // CHECK4-NEXT: ret i32 0 483 // 484 // 485 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 486 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 487 // CHECK4-NEXT: entry: 488 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 489 // CHECK4-NEXT: ret void 490 // 491 // 492 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 493 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 494 // CHECK4-NEXT: entry: 495 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 496 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 497 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 498 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 499 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 500 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 501 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 502 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 503 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 504 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 505 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 506 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 507 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 508 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 509 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 510 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 511 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 512 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 513 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 514 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 515 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 516 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 517 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 518 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 519 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 520 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 521 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 522 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 523 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 524 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 525 // CHECK4: cond.true: 526 // CHECK4-NEXT: br label [[COND_END:%.*]] 527 // CHECK4: cond.false: 528 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 529 // CHECK4-NEXT: br label [[COND_END]] 530 // CHECK4: cond.end: 531 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 532 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 533 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 534 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 535 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 536 // CHECK4: omp.inner.for.cond: 537 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 538 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 539 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 540 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 541 // CHECK4: omp.inner.for.body: 542 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 543 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 544 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 545 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 546 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !5 547 // CHECK4-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 548 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4, !llvm.access.group !5 549 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !5 550 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !5 551 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 552 // CHECK4-NEXT: store double* [[G]], double** [[TMP9]], align 4, !llvm.access.group !5 553 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 554 // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 555 // CHECK4-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4, !llvm.access.group !5 556 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 557 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4, !llvm.access.group !5 558 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 559 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4, !llvm.access.group !5 560 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 561 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 562 // CHECK4: omp.body.continue: 563 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 564 // CHECK4: omp.inner.for.inc: 565 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 566 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 567 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 568 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 569 // CHECK4: omp.inner.for.end: 570 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 571 // CHECK4: omp.loop.exit: 572 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 573 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 574 // CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 575 // CHECK4-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 576 // CHECK4: .omp.final.then: 577 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 578 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 579 // CHECK4: .omp.final.done: 580 // CHECK4-NEXT: ret void 581 // 582 // 583 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 584 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 585 // CHECK4-NEXT: entry: 586 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 587 // CHECK4-NEXT: ret void 588 // 589 // 590 // CHECK5-LABEL: define {{[^@]+}}@main 591 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 592 // CHECK5-NEXT: entry: 593 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 594 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 595 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 596 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 597 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 598 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 599 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 600 // CHECK5-NEXT: ret i32 0 601 // 602 // 603 // CHECK6-LABEL: define {{[^@]+}}@main 604 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 605 // CHECK6-NEXT: entry: 606 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 607 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 608 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 609 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 610 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 611 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 612 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 613 // CHECK6-NEXT: ret i32 0 614 // 615 // 616 // CHECK7-LABEL: define {{[^@]+}}@main 617 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 618 // CHECK7-NEXT: entry: 619 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 620 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 621 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 622 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 623 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 624 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 625 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 626 // CHECK7-NEXT: ret i32 0 627 // 628 // 629 // CHECK8-LABEL: define {{[^@]+}}@main 630 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 631 // CHECK8-NEXT: entry: 632 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 633 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 634 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 635 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 636 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 637 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 638 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 639 // CHECK8-NEXT: ret i32 0 640 // 641 // 642 // CHECK9-LABEL: define {{[^@]+}}@main 643 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 644 // CHECK9-NEXT: entry: 645 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 646 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 647 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 648 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 649 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 650 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 651 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 652 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 653 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 654 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 655 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 656 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 657 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 658 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 659 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 660 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 661 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 662 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 663 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 664 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 665 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 666 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 667 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 668 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 669 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 670 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 671 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 672 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 673 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 674 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 675 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 676 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 677 // CHECK9: omp_offload.failed: 678 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 679 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 680 // CHECK9: omp_offload.cont: 681 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 682 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 683 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 684 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 685 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 686 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 687 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8 688 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 689 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 690 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 691 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 692 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 693 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 694 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 695 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 696 // CHECK9-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 697 // CHECK9-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 698 // CHECK9-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 699 // CHECK9: omp_offload.failed3: 700 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP4]]) #[[ATTR4]] 701 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]] 702 // CHECK9: omp_offload.cont4: 703 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 704 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 705 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 706 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 707 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 708 // CHECK9: arraydestroy.body: 709 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 710 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 711 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 712 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 713 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 714 // CHECK9: arraydestroy.done5: 715 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 716 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 717 // CHECK9-NEXT: ret i32 [[TMP15]] 718 // 719 // 720 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 721 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 722 // CHECK9-NEXT: entry: 723 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 724 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 725 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 726 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 727 // CHECK9-NEXT: ret void 728 // 729 // 730 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 731 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 732 // CHECK9-NEXT: entry: 733 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 734 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 735 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 736 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 737 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 738 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 739 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 740 // CHECK9-NEXT: ret void 741 // 742 // 743 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 744 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 745 // CHECK9-NEXT: entry: 746 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 747 // CHECK9-NEXT: ret void 748 // 749 // 750 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 751 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 752 // CHECK9-NEXT: entry: 753 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 754 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 755 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 756 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 757 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 758 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 759 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 760 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 761 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 762 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 763 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 764 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 765 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 766 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 767 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 768 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 769 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 770 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 771 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 772 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 773 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 774 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 775 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 776 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 777 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 778 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 779 // CHECK9: arrayctor.loop: 780 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 781 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 782 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 783 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 784 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 785 // CHECK9: arrayctor.cont: 786 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 787 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 788 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 789 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 790 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 791 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 792 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 793 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 794 // CHECK9: cond.true: 795 // CHECK9-NEXT: br label [[COND_END:%.*]] 796 // CHECK9: cond.false: 797 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 798 // CHECK9-NEXT: br label [[COND_END]] 799 // CHECK9: cond.end: 800 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 801 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 802 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 803 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 804 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 805 // CHECK9: omp.inner.for.cond: 806 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 807 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 808 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 809 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 810 // CHECK9: omp.inner.for.cond.cleanup: 811 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 812 // CHECK9: omp.inner.for.body: 813 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 814 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 815 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 816 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 817 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 818 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 819 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 820 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 821 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 822 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !6 823 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 824 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 825 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 826 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 827 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 828 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false), !llvm.access.group !6 829 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 830 // CHECK9: omp.body.continue: 831 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 832 // CHECK9: omp.inner.for.inc: 833 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 834 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 835 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 836 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 837 // CHECK9: omp.inner.for.end: 838 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 839 // CHECK9: omp.loop.exit: 840 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 841 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 842 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 843 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 844 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 845 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 846 // CHECK9: .omp.final.then: 847 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 848 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 849 // CHECK9: .omp.final.done: 850 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 851 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 852 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 853 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 854 // CHECK9: arraydestroy.body: 855 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 856 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 857 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 858 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 859 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 860 // CHECK9: arraydestroy.done8: 861 // CHECK9-NEXT: ret void 862 // 863 // 864 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 865 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 866 // CHECK9-NEXT: entry: 867 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 868 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 869 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 870 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 871 // CHECK9-NEXT: ret void 872 // 873 // 874 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 875 // CHECK9-SAME: (i64 noundef [[I:%.*]]) #[[ATTR3]] { 876 // CHECK9-NEXT: entry: 877 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 878 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 879 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 880 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]]) 881 // CHECK9-NEXT: ret void 882 // 883 // 884 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 885 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 886 // CHECK9-NEXT: entry: 887 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 888 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 889 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 890 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 891 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 892 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 893 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 894 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 895 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 896 // CHECK9-NEXT: [[I1:%.*]] = alloca i32, align 4 897 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 898 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 899 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 900 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 901 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 902 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 903 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 904 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 905 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 906 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 907 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 908 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 909 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 910 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 911 // CHECK9: cond.true: 912 // CHECK9-NEXT: br label [[COND_END:%.*]] 913 // CHECK9: cond.false: 914 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 915 // CHECK9-NEXT: br label [[COND_END]] 916 // CHECK9: cond.end: 917 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 918 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 919 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 920 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 921 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 922 // CHECK9: omp.inner.for.cond: 923 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 924 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 925 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 926 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 927 // CHECK9: omp.inner.for.body: 928 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 929 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 930 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 931 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I1]], align 4, !llvm.access.group !12 932 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 933 // CHECK9: omp.body.continue: 934 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 935 // CHECK9: omp.inner.for.inc: 936 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 937 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 938 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 939 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 940 // CHECK9: omp.inner.for.end: 941 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 942 // CHECK9: omp.loop.exit: 943 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 944 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 945 // CHECK9-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 946 // CHECK9-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 947 // CHECK9: .omp.final.then: 948 // CHECK9-NEXT: store i32 2, i32* [[TMP0]], align 4 949 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 950 // CHECK9: .omp.final.done: 951 // CHECK9-NEXT: ret void 952 // 953 // 954 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 955 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 956 // CHECK9-NEXT: entry: 957 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 958 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 959 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 960 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 961 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 962 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 963 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 964 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 965 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 966 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 967 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 968 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 969 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 970 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 971 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 972 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 973 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 974 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 975 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 976 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 977 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 978 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 979 // CHECK9: omp_offload.failed: 980 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 981 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 982 // CHECK9: omp_offload.cont: 983 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 984 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 985 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 986 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 987 // CHECK9: arraydestroy.body: 988 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 989 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 990 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 991 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 992 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 993 // CHECK9: arraydestroy.done2: 994 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 995 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 996 // CHECK9-NEXT: ret i32 [[TMP4]] 997 // 998 // 999 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1000 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1001 // CHECK9-NEXT: entry: 1002 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1003 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1004 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1005 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1006 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1007 // CHECK9-NEXT: ret void 1008 // 1009 // 1010 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1011 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1012 // CHECK9-NEXT: entry: 1013 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1014 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1015 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1016 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1017 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1018 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1019 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1020 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1021 // CHECK9-NEXT: ret void 1022 // 1023 // 1024 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1025 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1026 // CHECK9-NEXT: entry: 1027 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1028 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1029 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1030 // CHECK9-NEXT: ret void 1031 // 1032 // 1033 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1034 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1035 // CHECK9-NEXT: entry: 1036 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1037 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1038 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1039 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1040 // CHECK9-NEXT: ret void 1041 // 1042 // 1043 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1044 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1045 // CHECK9-NEXT: entry: 1046 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1047 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1048 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1049 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1050 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1051 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1052 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1053 // CHECK9-NEXT: ret void 1054 // 1055 // 1056 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1057 // CHECK9-SAME: () #[[ATTR3]] { 1058 // CHECK9-NEXT: entry: 1059 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1060 // CHECK9-NEXT: ret void 1061 // 1062 // 1063 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1064 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1065 // CHECK9-NEXT: entry: 1066 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1067 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1068 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1069 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1070 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1071 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1072 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1073 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1074 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1075 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1077 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1078 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1079 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1080 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1081 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1082 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1083 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1084 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1085 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1086 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1087 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1088 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1089 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1090 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1091 // CHECK9: arrayctor.loop: 1092 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1093 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1094 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1095 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1096 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1097 // CHECK9: arrayctor.cont: 1098 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1099 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1100 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1101 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1102 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1103 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1104 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1105 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1106 // CHECK9: cond.true: 1107 // CHECK9-NEXT: br label [[COND_END:%.*]] 1108 // CHECK9: cond.false: 1109 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1110 // CHECK9-NEXT: br label [[COND_END]] 1111 // CHECK9: cond.end: 1112 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1113 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1114 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1115 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1116 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1117 // CHECK9: omp.inner.for.cond: 1118 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1119 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 1120 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1121 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1122 // CHECK9: omp.inner.for.cond.cleanup: 1123 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1124 // CHECK9: omp.inner.for.body: 1125 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1126 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1127 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1128 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 1129 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !15 1130 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 1131 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1132 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1133 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 1134 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !15 1135 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 1136 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1137 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1138 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1139 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1140 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false), !llvm.access.group !15 1141 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1142 // CHECK9: omp.body.continue: 1143 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1144 // CHECK9: omp.inner.for.inc: 1145 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1146 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1147 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1148 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1149 // CHECK9: omp.inner.for.end: 1150 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1151 // CHECK9: omp.loop.exit: 1152 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1153 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1154 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1155 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1156 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1157 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1158 // CHECK9: .omp.final.then: 1159 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1160 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1161 // CHECK9: .omp.final.done: 1162 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1163 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1164 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1165 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1166 // CHECK9: arraydestroy.body: 1167 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1168 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1169 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1170 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1171 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1172 // CHECK9: arraydestroy.done8: 1173 // CHECK9-NEXT: ret void 1174 // 1175 // 1176 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1177 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1178 // CHECK9-NEXT: entry: 1179 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1180 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1181 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1182 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1183 // CHECK9-NEXT: ret void 1184 // 1185 // 1186 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1187 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1188 // CHECK9-NEXT: entry: 1189 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1190 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1191 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1192 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1193 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1194 // CHECK9-NEXT: ret void 1195 // 1196 // 1197 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1198 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1199 // CHECK9-NEXT: entry: 1200 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1201 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1202 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1203 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1204 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1205 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1206 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1207 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1208 // CHECK9-NEXT: ret void 1209 // 1210 // 1211 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1212 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1213 // CHECK9-NEXT: entry: 1214 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1215 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1216 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1217 // CHECK9-NEXT: ret void 1218 // 1219 // 1220 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1221 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1222 // CHECK9-NEXT: entry: 1223 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1224 // CHECK9-NEXT: ret void 1225 // 1226 // 1227 // CHECK10-LABEL: define {{[^@]+}}@main 1228 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1229 // CHECK10-NEXT: entry: 1230 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1231 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1232 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1233 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1234 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1235 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1236 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1237 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1238 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1239 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1240 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1241 // CHECK10-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 1242 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1243 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1244 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1245 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1246 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1247 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1248 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1249 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1250 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1251 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1252 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1253 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1254 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1255 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1256 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1257 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1258 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1259 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1260 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1261 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1262 // CHECK10: omp_offload.failed: 1263 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1264 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1265 // CHECK10: omp_offload.cont: 1266 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1267 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32* 1268 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1269 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8 1270 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1271 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 1272 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8 1273 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1274 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1275 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1276 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1277 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8 1278 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1279 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1280 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1281 // CHECK10-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1282 // CHECK10-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1283 // CHECK10-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1284 // CHECK10: omp_offload.failed3: 1285 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP4]]) #[[ATTR4]] 1286 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1287 // CHECK10: omp_offload.cont4: 1288 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1289 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1290 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1291 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1292 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1293 // CHECK10: arraydestroy.body: 1294 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1295 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1296 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1297 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1298 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1299 // CHECK10: arraydestroy.done5: 1300 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1301 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 1302 // CHECK10-NEXT: ret i32 [[TMP15]] 1303 // 1304 // 1305 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1306 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1307 // CHECK10-NEXT: entry: 1308 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1309 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1310 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1311 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1312 // CHECK10-NEXT: ret void 1313 // 1314 // 1315 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1316 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1317 // CHECK10-NEXT: entry: 1318 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1319 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1320 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1321 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1322 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1323 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1324 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1325 // CHECK10-NEXT: ret void 1326 // 1327 // 1328 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1329 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1330 // CHECK10-NEXT: entry: 1331 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1332 // CHECK10-NEXT: ret void 1333 // 1334 // 1335 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1336 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1337 // CHECK10-NEXT: entry: 1338 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1339 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1340 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1341 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1342 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1343 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1344 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1345 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1346 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1347 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1348 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1349 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1350 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1351 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1352 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1353 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1354 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1355 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1356 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1357 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1358 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1359 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1360 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1361 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1362 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1363 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1364 // CHECK10: arrayctor.loop: 1365 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1366 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1367 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1368 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1369 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1370 // CHECK10: arrayctor.cont: 1371 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1372 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1373 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1374 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1375 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1376 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1377 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1378 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1379 // CHECK10: cond.true: 1380 // CHECK10-NEXT: br label [[COND_END:%.*]] 1381 // CHECK10: cond.false: 1382 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1383 // CHECK10-NEXT: br label [[COND_END]] 1384 // CHECK10: cond.end: 1385 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1386 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1387 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1388 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1389 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1390 // CHECK10: omp.inner.for.cond: 1391 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1392 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 1393 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1394 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1395 // CHECK10: omp.inner.for.cond.cleanup: 1396 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1397 // CHECK10: omp.inner.for.body: 1398 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1399 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1400 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1401 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 1402 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 1403 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 1404 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1405 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1406 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 1407 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !6 1408 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 1409 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1410 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1411 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 1412 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1413 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false), !llvm.access.group !6 1414 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1415 // CHECK10: omp.body.continue: 1416 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1417 // CHECK10: omp.inner.for.inc: 1418 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1419 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1420 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 1421 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1422 // CHECK10: omp.inner.for.end: 1423 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1424 // CHECK10: omp.loop.exit: 1425 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1426 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1427 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1428 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1429 // CHECK10-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1430 // CHECK10-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1431 // CHECK10: .omp.final.then: 1432 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1433 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1434 // CHECK10: .omp.final.done: 1435 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1436 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1437 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 1438 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1439 // CHECK10: arraydestroy.body: 1440 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1441 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1442 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1443 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1444 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1445 // CHECK10: arraydestroy.done8: 1446 // CHECK10-NEXT: ret void 1447 // 1448 // 1449 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1450 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1451 // CHECK10-NEXT: entry: 1452 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1453 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1454 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1455 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1456 // CHECK10-NEXT: ret void 1457 // 1458 // 1459 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1460 // CHECK10-SAME: (i64 noundef [[I:%.*]]) #[[ATTR3]] { 1461 // CHECK10-NEXT: entry: 1462 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 1463 // CHECK10-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8 1464 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32* 1465 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]]) 1466 // CHECK10-NEXT: ret void 1467 // 1468 // 1469 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1470 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 1471 // CHECK10-NEXT: entry: 1472 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1473 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1474 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 1475 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1476 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1477 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1478 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1479 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1480 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1481 // CHECK10-NEXT: [[I1:%.*]] = alloca i32, align 4 1482 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1483 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1484 // CHECK10-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 1485 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 1486 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1487 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1488 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1489 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1490 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1491 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1492 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1493 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1494 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1495 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1496 // CHECK10: cond.true: 1497 // CHECK10-NEXT: br label [[COND_END:%.*]] 1498 // CHECK10: cond.false: 1499 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1500 // CHECK10-NEXT: br label [[COND_END]] 1501 // CHECK10: cond.end: 1502 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1503 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1504 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1505 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1506 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1507 // CHECK10: omp.inner.for.cond: 1508 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1509 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 1510 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1511 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1512 // CHECK10: omp.inner.for.body: 1513 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1514 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1515 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1516 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I1]], align 4, !llvm.access.group !12 1517 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1518 // CHECK10: omp.body.continue: 1519 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1520 // CHECK10: omp.inner.for.inc: 1521 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1522 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 1523 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1524 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 1525 // CHECK10: omp.inner.for.end: 1526 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1527 // CHECK10: omp.loop.exit: 1528 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1529 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1530 // CHECK10-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 1531 // CHECK10-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1532 // CHECK10: .omp.final.then: 1533 // CHECK10-NEXT: store i32 2, i32* [[TMP0]], align 4 1534 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1535 // CHECK10: .omp.final.done: 1536 // CHECK10-NEXT: ret void 1537 // 1538 // 1539 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1540 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1541 // CHECK10-NEXT: entry: 1542 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1543 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1544 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1545 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1546 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1547 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1548 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1549 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1550 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1551 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1552 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1553 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1554 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1555 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1556 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1557 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1558 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1559 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1560 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1561 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1562 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1563 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1564 // CHECK10: omp_offload.failed: 1565 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1566 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1567 // CHECK10: omp_offload.cont: 1568 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1569 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1570 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1571 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1572 // CHECK10: arraydestroy.body: 1573 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1574 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1575 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1576 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1577 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1578 // CHECK10: arraydestroy.done2: 1579 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1580 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1581 // CHECK10-NEXT: ret i32 [[TMP4]] 1582 // 1583 // 1584 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1585 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1586 // CHECK10-NEXT: entry: 1587 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1588 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1589 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1590 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1591 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1592 // CHECK10-NEXT: ret void 1593 // 1594 // 1595 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1596 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1597 // CHECK10-NEXT: entry: 1598 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1599 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1600 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1601 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1602 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1603 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1604 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1605 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1606 // CHECK10-NEXT: ret void 1607 // 1608 // 1609 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1610 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1611 // CHECK10-NEXT: entry: 1612 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1613 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1614 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1615 // CHECK10-NEXT: ret void 1616 // 1617 // 1618 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1619 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1620 // CHECK10-NEXT: entry: 1621 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1622 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1623 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1624 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1625 // CHECK10-NEXT: ret void 1626 // 1627 // 1628 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1629 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1630 // CHECK10-NEXT: entry: 1631 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1632 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1633 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1634 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1635 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1636 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1637 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1638 // CHECK10-NEXT: ret void 1639 // 1640 // 1641 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1642 // CHECK10-SAME: () #[[ATTR3]] { 1643 // CHECK10-NEXT: entry: 1644 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1645 // CHECK10-NEXT: ret void 1646 // 1647 // 1648 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 1649 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1650 // CHECK10-NEXT: entry: 1651 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1652 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1653 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1654 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1655 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1656 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1657 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1658 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1659 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1660 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1661 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1662 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1663 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1664 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1665 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1666 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1667 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1668 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1669 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1670 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1671 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1672 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1673 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1674 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1675 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1676 // CHECK10: arrayctor.loop: 1677 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1678 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1679 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1680 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1681 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1682 // CHECK10: arrayctor.cont: 1683 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1684 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1685 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1686 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1687 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1688 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1689 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1690 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1691 // CHECK10: cond.true: 1692 // CHECK10-NEXT: br label [[COND_END:%.*]] 1693 // CHECK10: cond.false: 1694 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1695 // CHECK10-NEXT: br label [[COND_END]] 1696 // CHECK10: cond.end: 1697 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1698 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1699 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1700 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1701 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1702 // CHECK10: omp.inner.for.cond: 1703 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1704 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 1705 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1706 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1707 // CHECK10: omp.inner.for.cond.cleanup: 1708 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1709 // CHECK10: omp.inner.for.body: 1710 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1711 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1712 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1713 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 1714 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !15 1715 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 1716 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1717 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1718 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 1719 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !15 1720 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 1721 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1722 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1723 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1724 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1725 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false), !llvm.access.group !15 1726 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1727 // CHECK10: omp.body.continue: 1728 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1729 // CHECK10: omp.inner.for.inc: 1730 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1731 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1732 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1733 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1734 // CHECK10: omp.inner.for.end: 1735 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1736 // CHECK10: omp.loop.exit: 1737 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1738 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1739 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1740 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1741 // CHECK10-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1742 // CHECK10-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1743 // CHECK10: .omp.final.then: 1744 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1745 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1746 // CHECK10: .omp.final.done: 1747 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1748 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1749 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1750 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1751 // CHECK10: arraydestroy.body: 1752 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1753 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1754 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1755 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1756 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1757 // CHECK10: arraydestroy.done8: 1758 // CHECK10-NEXT: ret void 1759 // 1760 // 1761 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1762 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1763 // CHECK10-NEXT: entry: 1764 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1765 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1766 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1767 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1768 // CHECK10-NEXT: ret void 1769 // 1770 // 1771 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1772 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1773 // CHECK10-NEXT: entry: 1774 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1775 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1776 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1777 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1778 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 1779 // CHECK10-NEXT: ret void 1780 // 1781 // 1782 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1783 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1784 // CHECK10-NEXT: entry: 1785 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1786 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1787 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1788 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1789 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1790 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1791 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1792 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1793 // CHECK10-NEXT: ret void 1794 // 1795 // 1796 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1797 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1798 // CHECK10-NEXT: entry: 1799 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1800 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1801 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1802 // CHECK10-NEXT: ret void 1803 // 1804 // 1805 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1806 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 1807 // CHECK10-NEXT: entry: 1808 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 1809 // CHECK10-NEXT: ret void 1810 // 1811 // 1812 // CHECK11-LABEL: define {{[^@]+}}@main 1813 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1814 // CHECK11-NEXT: entry: 1815 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1816 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1817 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 1818 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1819 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1820 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1821 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1822 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 1823 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1824 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1825 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1826 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 1827 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1828 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1829 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1830 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1831 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1832 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 1833 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1834 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1835 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1836 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 1837 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1838 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1839 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 1840 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1841 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 1842 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1843 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1844 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1845 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1846 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1847 // CHECK11: omp_offload.failed: 1848 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1849 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1850 // CHECK11: omp_offload.cont: 1851 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1852 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[I_CASTED]], align 4 1853 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_CASTED]], align 4 1854 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1855 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 1856 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[TMP6]], align 4 1857 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1858 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1859 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[TMP8]], align 4 1860 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1861 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 1862 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1863 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1864 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1865 // CHECK11-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1866 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1867 // CHECK11-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1868 // CHECK11: omp_offload.failed3: 1869 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP4]]) #[[ATTR4]] 1870 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1871 // CHECK11: omp_offload.cont4: 1872 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1873 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1874 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1875 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1876 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1877 // CHECK11: arraydestroy.body: 1878 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1879 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1880 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1881 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1882 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1883 // CHECK11: arraydestroy.done5: 1884 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1885 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 1886 // CHECK11-NEXT: ret i32 [[TMP15]] 1887 // 1888 // 1889 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1890 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1891 // CHECK11-NEXT: entry: 1892 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1893 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1894 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1895 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1896 // CHECK11-NEXT: ret void 1897 // 1898 // 1899 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1900 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1901 // CHECK11-NEXT: entry: 1902 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1903 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1904 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1905 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1906 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1907 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1908 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1909 // CHECK11-NEXT: ret void 1910 // 1911 // 1912 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1913 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1914 // CHECK11-NEXT: entry: 1915 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1916 // CHECK11-NEXT: ret void 1917 // 1918 // 1919 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1920 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1921 // CHECK11-NEXT: entry: 1922 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1923 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1924 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1925 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1926 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1927 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1928 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1929 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1930 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1931 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1932 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1933 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1934 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1935 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 1936 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1937 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1938 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1939 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1940 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1941 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1942 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1943 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1944 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1945 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1946 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1947 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1948 // CHECK11: arrayctor.loop: 1949 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1950 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1951 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1952 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1953 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1954 // CHECK11: arrayctor.cont: 1955 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1956 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 1957 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1958 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1959 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1960 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1961 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1962 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1963 // CHECK11: cond.true: 1964 // CHECK11-NEXT: br label [[COND_END:%.*]] 1965 // CHECK11: cond.false: 1966 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1967 // CHECK11-NEXT: br label [[COND_END]] 1968 // CHECK11: cond.end: 1969 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1970 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1971 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1972 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1973 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1974 // CHECK11: omp.inner.for.cond: 1975 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1976 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 1977 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1978 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1979 // CHECK11: omp.inner.for.cond.cleanup: 1980 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1981 // CHECK11: omp.inner.for.body: 1982 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1983 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1984 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1985 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 1986 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 1987 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 1988 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 1989 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 1990 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !7 1991 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 1992 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 1993 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 1994 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1995 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false), !llvm.access.group !7 1996 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1997 // CHECK11: omp.body.continue: 1998 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1999 // CHECK11: omp.inner.for.inc: 2000 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2001 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2002 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2003 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2004 // CHECK11: omp.inner.for.end: 2005 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2006 // CHECK11: omp.loop.exit: 2007 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2008 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2009 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2010 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2011 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2012 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2013 // CHECK11: .omp.final.then: 2014 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2015 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2016 // CHECK11: .omp.final.done: 2017 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2018 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2019 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2020 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2021 // CHECK11: arraydestroy.body: 2022 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2023 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2024 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2025 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2026 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2027 // CHECK11: arraydestroy.done7: 2028 // CHECK11-NEXT: ret void 2029 // 2030 // 2031 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2032 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2033 // CHECK11-NEXT: entry: 2034 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2035 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2036 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2037 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2038 // CHECK11-NEXT: ret void 2039 // 2040 // 2041 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2042 // CHECK11-SAME: (i32 noundef [[I:%.*]]) #[[ATTR3]] { 2043 // CHECK11-NEXT: entry: 2044 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2045 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 2046 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[I_ADDR]]) 2047 // CHECK11-NEXT: ret void 2048 // 2049 // 2050 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2051 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 2052 // CHECK11-NEXT: entry: 2053 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2054 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2055 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2056 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2057 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2058 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2059 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2060 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2061 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2062 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 2063 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2064 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2065 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2066 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2067 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2068 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2069 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2070 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2071 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2072 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2073 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2074 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2075 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2076 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2077 // CHECK11: cond.true: 2078 // CHECK11-NEXT: br label [[COND_END:%.*]] 2079 // CHECK11: cond.false: 2080 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2081 // CHECK11-NEXT: br label [[COND_END]] 2082 // CHECK11: cond.end: 2083 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2084 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2085 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2086 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2087 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2088 // CHECK11: omp.inner.for.cond: 2089 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2090 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 2091 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2092 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2093 // CHECK11: omp.inner.for.body: 2094 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2095 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2096 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2097 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I1]], align 4, !llvm.access.group !13 2098 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2099 // CHECK11: omp.body.continue: 2100 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2101 // CHECK11: omp.inner.for.inc: 2102 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2103 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 2104 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2105 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2106 // CHECK11: omp.inner.for.end: 2107 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2108 // CHECK11: omp.loop.exit: 2109 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2110 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2111 // CHECK11-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 2112 // CHECK11-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2113 // CHECK11: .omp.final.then: 2114 // CHECK11-NEXT: store i32 2, i32* [[TMP0]], align 4 2115 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2116 // CHECK11: .omp.final.done: 2117 // CHECK11-NEXT: ret void 2118 // 2119 // 2120 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2121 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2122 // CHECK11-NEXT: entry: 2123 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2124 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2125 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2126 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2127 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2128 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2129 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2130 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2131 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2132 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2133 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2134 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2135 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2136 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2137 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2138 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2139 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2140 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2141 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2142 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2143 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2144 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2145 // CHECK11: omp_offload.failed: 2146 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2147 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2148 // CHECK11: omp_offload.cont: 2149 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2150 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2151 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2152 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2153 // CHECK11: arraydestroy.body: 2154 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2155 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2156 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2157 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2158 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2159 // CHECK11: arraydestroy.done2: 2160 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2161 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2162 // CHECK11-NEXT: ret i32 [[TMP4]] 2163 // 2164 // 2165 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2166 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2167 // CHECK11-NEXT: entry: 2168 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2169 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2170 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2171 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2172 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2173 // CHECK11-NEXT: ret void 2174 // 2175 // 2176 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2177 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2178 // CHECK11-NEXT: entry: 2179 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2180 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2181 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2182 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2183 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2184 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2185 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2186 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2187 // CHECK11-NEXT: ret void 2188 // 2189 // 2190 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2191 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2192 // CHECK11-NEXT: entry: 2193 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2194 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2195 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2196 // CHECK11-NEXT: ret void 2197 // 2198 // 2199 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2200 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2201 // CHECK11-NEXT: entry: 2202 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2203 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2204 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2205 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2206 // CHECK11-NEXT: ret void 2207 // 2208 // 2209 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2210 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2211 // CHECK11-NEXT: entry: 2212 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2213 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2214 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2215 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2216 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2217 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2218 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2219 // CHECK11-NEXT: ret void 2220 // 2221 // 2222 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2223 // CHECK11-SAME: () #[[ATTR3]] { 2224 // CHECK11-NEXT: entry: 2225 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2226 // CHECK11-NEXT: ret void 2227 // 2228 // 2229 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2230 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2231 // CHECK11-NEXT: entry: 2232 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2233 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2234 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2235 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2236 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2237 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2238 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2239 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2240 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2241 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2242 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2243 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2244 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2245 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2246 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2247 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2248 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2249 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2250 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2251 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2252 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2253 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2254 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2255 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2256 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2257 // CHECK11: arrayctor.loop: 2258 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2259 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2260 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2261 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2262 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2263 // CHECK11: arrayctor.cont: 2264 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2265 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2266 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2267 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2268 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2269 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2270 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2271 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2272 // CHECK11: cond.true: 2273 // CHECK11-NEXT: br label [[COND_END:%.*]] 2274 // CHECK11: cond.false: 2275 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2276 // CHECK11-NEXT: br label [[COND_END]] 2277 // CHECK11: cond.end: 2278 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2279 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2280 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2281 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2282 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2283 // CHECK11: omp.inner.for.cond: 2284 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2285 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 2286 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2287 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2288 // CHECK11: omp.inner.for.cond.cleanup: 2289 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2290 // CHECK11: omp.inner.for.body: 2291 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2292 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2293 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2294 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 2295 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !16 2296 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 2297 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2298 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 2299 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !16 2300 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 2301 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2302 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2303 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2304 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false), !llvm.access.group !16 2305 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2306 // CHECK11: omp.body.continue: 2307 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2308 // CHECK11: omp.inner.for.inc: 2309 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2310 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2311 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2312 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2313 // CHECK11: omp.inner.for.end: 2314 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2315 // CHECK11: omp.loop.exit: 2316 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2317 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2318 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2319 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2320 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2321 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2322 // CHECK11: .omp.final.then: 2323 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2324 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2325 // CHECK11: .omp.final.done: 2326 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2327 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2328 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2329 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2330 // CHECK11: arraydestroy.body: 2331 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2332 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2333 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2334 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2335 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2336 // CHECK11: arraydestroy.done7: 2337 // CHECK11-NEXT: ret void 2338 // 2339 // 2340 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2341 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2342 // CHECK11-NEXT: entry: 2343 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2344 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2345 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2346 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2347 // CHECK11-NEXT: ret void 2348 // 2349 // 2350 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2351 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2352 // CHECK11-NEXT: entry: 2353 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2354 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2355 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2356 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2357 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2358 // CHECK11-NEXT: ret void 2359 // 2360 // 2361 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2362 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2363 // CHECK11-NEXT: entry: 2364 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2365 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2366 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2367 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2368 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2369 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2370 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2371 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2372 // CHECK11-NEXT: ret void 2373 // 2374 // 2375 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2376 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2377 // CHECK11-NEXT: entry: 2378 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2379 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2380 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2381 // CHECK11-NEXT: ret void 2382 // 2383 // 2384 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2385 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2386 // CHECK11-NEXT: entry: 2387 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2388 // CHECK11-NEXT: ret void 2389 // 2390 // 2391 // CHECK12-LABEL: define {{[^@]+}}@main 2392 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2393 // CHECK12-NEXT: entry: 2394 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2395 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2396 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2397 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2398 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2399 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2400 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2401 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2402 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2403 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2404 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2405 // CHECK12-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2406 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2407 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2408 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2409 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2410 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2411 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2412 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2413 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2414 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2415 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2416 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2417 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2418 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2419 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2420 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2421 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2422 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2423 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2424 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2425 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2426 // CHECK12: omp_offload.failed: 2427 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 2428 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2429 // CHECK12: omp_offload.cont: 2430 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2431 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[I_CASTED]], align 4 2432 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_CASTED]], align 4 2433 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2434 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 2435 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[TMP6]], align 4 2436 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2437 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2438 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[TMP8]], align 4 2439 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2440 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 4 2441 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2442 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2443 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2444 // CHECK12-NEXT: [[TMP12:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2445 // CHECK12-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 2446 // CHECK12-NEXT: br i1 [[TMP13]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 2447 // CHECK12: omp_offload.failed3: 2448 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP4]]) #[[ATTR4]] 2449 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT4]] 2450 // CHECK12: omp_offload.cont4: 2451 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2452 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2453 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2454 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2455 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2456 // CHECK12: arraydestroy.body: 2457 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2458 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2459 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2460 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2461 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2462 // CHECK12: arraydestroy.done5: 2463 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2464 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 2465 // CHECK12-NEXT: ret i32 [[TMP15]] 2466 // 2467 // 2468 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2469 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2470 // CHECK12-NEXT: entry: 2471 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2472 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2473 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2474 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2475 // CHECK12-NEXT: ret void 2476 // 2477 // 2478 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2479 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2480 // CHECK12-NEXT: entry: 2481 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2482 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2483 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2484 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2485 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2486 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2487 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2488 // CHECK12-NEXT: ret void 2489 // 2490 // 2491 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 2492 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 2493 // CHECK12-NEXT: entry: 2494 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2495 // CHECK12-NEXT: ret void 2496 // 2497 // 2498 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2499 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2500 // CHECK12-NEXT: entry: 2501 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2502 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2503 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2504 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2505 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2506 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2507 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2508 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2509 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2510 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2511 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2512 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2513 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2514 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2515 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2516 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2517 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2518 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2519 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2520 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2521 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2522 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2523 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2524 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2525 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2526 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2527 // CHECK12: arrayctor.loop: 2528 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2529 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2530 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2531 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2532 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2533 // CHECK12: arrayctor.cont: 2534 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2535 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2536 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2537 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2538 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2539 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2540 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2541 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2542 // CHECK12: cond.true: 2543 // CHECK12-NEXT: br label [[COND_END:%.*]] 2544 // CHECK12: cond.false: 2545 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2546 // CHECK12-NEXT: br label [[COND_END]] 2547 // CHECK12: cond.end: 2548 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2549 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2550 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2551 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2552 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2553 // CHECK12: omp.inner.for.cond: 2554 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2555 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 2556 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2557 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2558 // CHECK12: omp.inner.for.cond.cleanup: 2559 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2560 // CHECK12: omp.inner.for.body: 2561 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2562 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2563 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2564 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 2565 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 2566 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 2567 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2568 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 2569 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !7 2570 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 2571 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 2572 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 2573 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 2574 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false), !llvm.access.group !7 2575 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2576 // CHECK12: omp.body.continue: 2577 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2578 // CHECK12: omp.inner.for.inc: 2579 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2580 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2581 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 2582 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2583 // CHECK12: omp.inner.for.end: 2584 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2585 // CHECK12: omp.loop.exit: 2586 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2587 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2588 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2589 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2590 // CHECK12-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2591 // CHECK12-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2592 // CHECK12: .omp.final.then: 2593 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 2594 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 2595 // CHECK12: .omp.final.done: 2596 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2597 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2598 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2599 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2600 // CHECK12: arraydestroy.body: 2601 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2602 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2603 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2604 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2605 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2606 // CHECK12: arraydestroy.done7: 2607 // CHECK12-NEXT: ret void 2608 // 2609 // 2610 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2611 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2612 // CHECK12-NEXT: entry: 2613 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2614 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2615 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2616 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2617 // CHECK12-NEXT: ret void 2618 // 2619 // 2620 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2621 // CHECK12-SAME: (i32 noundef [[I:%.*]]) #[[ATTR3]] { 2622 // CHECK12-NEXT: entry: 2623 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2624 // CHECK12-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4 2625 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[I_ADDR]]) 2626 // CHECK12-NEXT: ret void 2627 // 2628 // 2629 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2630 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 2631 // CHECK12-NEXT: entry: 2632 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2633 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2634 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4 2635 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2636 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2637 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2638 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2639 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2640 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2641 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 2642 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2643 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2644 // CHECK12-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4 2645 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4 2646 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2647 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2648 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2649 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2650 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2651 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2652 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2653 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2654 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2655 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2656 // CHECK12: cond.true: 2657 // CHECK12-NEXT: br label [[COND_END:%.*]] 2658 // CHECK12: cond.false: 2659 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2660 // CHECK12-NEXT: br label [[COND_END]] 2661 // CHECK12: cond.end: 2662 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2663 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2664 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2665 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2666 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2667 // CHECK12: omp.inner.for.cond: 2668 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2669 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 2670 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2671 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2672 // CHECK12: omp.inner.for.body: 2673 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2674 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2675 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2676 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I1]], align 4, !llvm.access.group !13 2677 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2678 // CHECK12: omp.body.continue: 2679 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2680 // CHECK12: omp.inner.for.inc: 2681 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2682 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 2683 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2684 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2685 // CHECK12: omp.inner.for.end: 2686 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2687 // CHECK12: omp.loop.exit: 2688 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2689 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2690 // CHECK12-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 2691 // CHECK12-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2692 // CHECK12: .omp.final.then: 2693 // CHECK12-NEXT: store i32 2, i32* [[TMP0]], align 4 2694 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 2695 // CHECK12: .omp.final.done: 2696 // CHECK12-NEXT: ret void 2697 // 2698 // 2699 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2700 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 2701 // CHECK12-NEXT: entry: 2702 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2703 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2704 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2705 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2706 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2707 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2708 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2709 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2710 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2711 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2712 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2713 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2714 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2715 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2716 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2717 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2718 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2719 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2720 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2721 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2722 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2723 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2724 // CHECK12: omp_offload.failed: 2725 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2726 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2727 // CHECK12: omp_offload.cont: 2728 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2729 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2730 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2731 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2732 // CHECK12: arraydestroy.body: 2733 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2734 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2735 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2736 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2737 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2738 // CHECK12: arraydestroy.done2: 2739 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2740 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2741 // CHECK12-NEXT: ret i32 [[TMP4]] 2742 // 2743 // 2744 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2745 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2746 // CHECK12-NEXT: entry: 2747 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2748 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2749 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2750 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2751 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 2752 // CHECK12-NEXT: ret void 2753 // 2754 // 2755 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2756 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2757 // CHECK12-NEXT: entry: 2758 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2759 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2760 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2761 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2762 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2763 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2764 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2765 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 2766 // CHECK12-NEXT: ret void 2767 // 2768 // 2769 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2770 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2771 // CHECK12-NEXT: entry: 2772 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2773 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2774 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2775 // CHECK12-NEXT: ret void 2776 // 2777 // 2778 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2779 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2780 // CHECK12-NEXT: entry: 2781 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2782 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2783 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2784 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2785 // CHECK12-NEXT: ret void 2786 // 2787 // 2788 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2789 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2790 // CHECK12-NEXT: entry: 2791 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2792 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2793 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2794 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2795 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2796 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2797 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2798 // CHECK12-NEXT: ret void 2799 // 2800 // 2801 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2802 // CHECK12-SAME: () #[[ATTR3]] { 2803 // CHECK12-NEXT: entry: 2804 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2805 // CHECK12-NEXT: ret void 2806 // 2807 // 2808 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 2809 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2810 // CHECK12-NEXT: entry: 2811 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2812 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2813 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2814 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2815 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2816 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2817 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2818 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2819 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2820 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2821 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2822 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2823 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2824 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2825 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2826 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2827 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2828 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2829 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2830 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2831 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2832 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2833 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2834 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2835 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2836 // CHECK12: arrayctor.loop: 2837 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2838 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2839 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2840 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2841 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2842 // CHECK12: arrayctor.cont: 2843 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2844 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2845 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2846 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2847 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2848 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2849 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2850 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2851 // CHECK12: cond.true: 2852 // CHECK12-NEXT: br label [[COND_END:%.*]] 2853 // CHECK12: cond.false: 2854 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2855 // CHECK12-NEXT: br label [[COND_END]] 2856 // CHECK12: cond.end: 2857 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2858 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2859 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2860 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2861 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2862 // CHECK12: omp.inner.for.cond: 2863 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2864 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 2865 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2866 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2867 // CHECK12: omp.inner.for.cond.cleanup: 2868 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2869 // CHECK12: omp.inner.for.body: 2870 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2871 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2872 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2873 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 2874 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !16 2875 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 2876 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2877 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 2878 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !16 2879 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 2880 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2881 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2882 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2883 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false), !llvm.access.group !16 2884 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2885 // CHECK12: omp.body.continue: 2886 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2887 // CHECK12: omp.inner.for.inc: 2888 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2889 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2890 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2891 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2892 // CHECK12: omp.inner.for.end: 2893 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2894 // CHECK12: omp.loop.exit: 2895 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2896 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2897 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2898 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2899 // CHECK12-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2900 // CHECK12-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2901 // CHECK12: .omp.final.then: 2902 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 2903 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 2904 // CHECK12: .omp.final.done: 2905 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2906 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2907 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2908 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2909 // CHECK12: arraydestroy.body: 2910 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2911 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2912 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2913 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2914 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2915 // CHECK12: arraydestroy.done7: 2916 // CHECK12-NEXT: ret void 2917 // 2918 // 2919 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2920 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2921 // CHECK12-NEXT: entry: 2922 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2923 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2924 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2925 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2926 // CHECK12-NEXT: ret void 2927 // 2928 // 2929 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2930 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2931 // CHECK12-NEXT: entry: 2932 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2933 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2934 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2935 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2936 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 2937 // CHECK12-NEXT: ret void 2938 // 2939 // 2940 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2941 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2942 // CHECK12-NEXT: entry: 2943 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2944 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2945 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2946 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2947 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2948 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2949 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2950 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2951 // CHECK12-NEXT: ret void 2952 // 2953 // 2954 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2955 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2956 // CHECK12-NEXT: entry: 2957 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2958 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2959 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2960 // CHECK12-NEXT: ret void 2961 // 2962 // 2963 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2964 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 2965 // CHECK12-NEXT: entry: 2966 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 2967 // CHECK12-NEXT: ret void 2968 // 2969 // 2970 // CHECK13-LABEL: define {{[^@]+}}@main 2971 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2972 // CHECK13-NEXT: entry: 2973 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2974 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 2975 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 2976 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2977 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2978 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2979 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2980 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 2981 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2982 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 2983 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2984 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2985 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2986 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2987 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2988 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2989 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2990 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 2991 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 2992 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2993 // CHECK13-NEXT: [[I12:%.*]] = alloca i32, align 4 2994 // CHECK13-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2995 // CHECK13-NEXT: [[DOTOMP_LB14:%.*]] = alloca i32, align 4 2996 // CHECK13-NEXT: [[DOTOMP_UB15:%.*]] = alloca i32, align 4 2997 // CHECK13-NEXT: [[DOTOMP_IV16:%.*]] = alloca i32, align 4 2998 // CHECK13-NEXT: [[I17:%.*]] = alloca i32, align 4 2999 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3000 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3001 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3002 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3003 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3004 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3005 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3006 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3007 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3008 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3009 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3010 // CHECK13-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 3011 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3012 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3013 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3014 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3015 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3016 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3017 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3018 // CHECK13: arrayctor.loop: 3019 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3020 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3021 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3022 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3023 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3024 // CHECK13: arrayctor.cont: 3025 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3026 // CHECK13-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 3027 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3028 // CHECK13: omp.inner.for.cond: 3029 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3030 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3031 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3032 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3033 // CHECK13: omp.inner.for.cond.cleanup: 3034 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3035 // CHECK13: omp.inner.for.body: 3036 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3037 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3038 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3039 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3040 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 3041 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3042 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3043 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3044 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3045 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 3046 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3047 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3048 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3049 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3050 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3051 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !2 3052 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3053 // CHECK13: omp.body.continue: 3054 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3055 // CHECK13: omp.inner.for.inc: 3056 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3057 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3058 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3059 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3060 // CHECK13: omp.inner.for.end: 3061 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3062 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 3063 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3064 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 3065 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3066 // CHECK13: arraydestroy.body: 3067 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3068 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3069 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3070 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3071 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3072 // CHECK13: arraydestroy.done11: 3073 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB14]], align 4 3074 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB15]], align 4 3075 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB14]], align 4 3076 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV16]], align 4 3077 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND18:%.*]] 3078 // CHECK13: omp.inner.for.cond18: 3079 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3080 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB15]], align 4, !llvm.access.group !6 3081 // CHECK13-NEXT: [[CMP19:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3082 // CHECK13-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY20:%.*]], label [[OMP_INNER_FOR_END26:%.*]] 3083 // CHECK13: omp.inner.for.body20: 3084 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3085 // CHECK13-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP16]], 1 3086 // CHECK13-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 3087 // CHECK13-NEXT: store i32 [[ADD22]], i32* [[I17]], align 4, !llvm.access.group !6 3088 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE23:%.*]] 3089 // CHECK13: omp.body.continue23: 3090 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC24:%.*]] 3091 // CHECK13: omp.inner.for.inc24: 3092 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3093 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP17]], 1 3094 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3095 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND18]], !llvm.loop [[LOOP7:![0-9]+]] 3096 // CHECK13: omp.inner.for.end26: 3097 // CHECK13-NEXT: store i32 2, i32* [[I12]], align 4 3098 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 3099 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3100 // CHECK13-NEXT: [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3101 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN27]], i64 2 3102 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY28:%.*]] 3103 // CHECK13: arraydestroy.body28: 3104 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST29:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_INNER_FOR_END26]] ], [ [[ARRAYDESTROY_ELEMENT30:%.*]], [[ARRAYDESTROY_BODY28]] ] 3105 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT30]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST29]], i64 -1 3106 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT30]]) #[[ATTR4]] 3107 // CHECK13-NEXT: [[ARRAYDESTROY_DONE31:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT30]], [[ARRAY_BEGIN27]] 3108 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE31]], label [[ARRAYDESTROY_DONE32:%.*]], label [[ARRAYDESTROY_BODY28]] 3109 // CHECK13: arraydestroy.done32: 3110 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3111 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[RETVAL]], align 4 3112 // CHECK13-NEXT: ret i32 [[TMP19]] 3113 // 3114 // 3115 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3116 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3117 // CHECK13-NEXT: entry: 3118 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3119 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3120 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3121 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3122 // CHECK13-NEXT: ret void 3123 // 3124 // 3125 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3126 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3127 // CHECK13-NEXT: entry: 3128 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3129 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3130 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3131 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3132 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3133 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3134 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3135 // CHECK13-NEXT: ret void 3136 // 3137 // 3138 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3139 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3140 // CHECK13-NEXT: entry: 3141 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3142 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3143 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3144 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3145 // CHECK13-NEXT: ret void 3146 // 3147 // 3148 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3149 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3150 // CHECK13-NEXT: entry: 3151 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3152 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3153 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3154 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3155 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3156 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3157 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3158 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3159 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3160 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3161 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3162 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3163 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3164 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3165 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3166 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 3167 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 3168 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3169 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3170 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3171 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3172 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3173 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 3174 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3175 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 3176 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3177 // CHECK13-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 3178 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3179 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3180 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3181 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3182 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3183 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3184 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3185 // CHECK13: arrayctor.loop: 3186 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3187 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3188 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3189 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3190 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3191 // CHECK13: arrayctor.cont: 3192 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3193 // CHECK13-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 3194 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3195 // CHECK13: omp.inner.for.cond: 3196 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3197 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 3198 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3199 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3200 // CHECK13: omp.inner.for.cond.cleanup: 3201 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3202 // CHECK13: omp.inner.for.body: 3203 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3204 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3205 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3206 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 3207 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !9 3208 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 3209 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3210 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3211 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 3212 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !9 3213 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 3214 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3215 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3216 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3217 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 3218 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !9 3219 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3220 // CHECK13: omp.body.continue: 3221 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3222 // CHECK13: omp.inner.for.inc: 3223 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3224 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3225 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3226 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 3227 // CHECK13: omp.inner.for.end: 3228 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3229 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3230 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3231 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 3232 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3233 // CHECK13: arraydestroy.body: 3234 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3235 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3236 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3237 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3238 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3239 // CHECK13: arraydestroy.done11: 3240 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3241 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3242 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 3243 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 3244 // CHECK13: arraydestroy.body13: 3245 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 3246 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 3247 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 3248 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 3249 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 3250 // CHECK13: arraydestroy.done17: 3251 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3252 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3253 // CHECK13-NEXT: ret i32 [[TMP14]] 3254 // 3255 // 3256 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3257 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3258 // CHECK13-NEXT: entry: 3259 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3260 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3261 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3262 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3263 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3264 // CHECK13-NEXT: ret void 3265 // 3266 // 3267 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3268 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3269 // CHECK13-NEXT: entry: 3270 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3271 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3272 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3273 // CHECK13-NEXT: ret void 3274 // 3275 // 3276 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3277 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3278 // CHECK13-NEXT: entry: 3279 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3280 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3281 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3282 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3283 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3284 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3285 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3286 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3287 // CHECK13-NEXT: ret void 3288 // 3289 // 3290 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3291 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3292 // CHECK13-NEXT: entry: 3293 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3294 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3295 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3296 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3297 // CHECK13-NEXT: ret void 3298 // 3299 // 3300 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3301 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3302 // CHECK13-NEXT: entry: 3303 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3304 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3305 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3306 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3307 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3308 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3309 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 3310 // CHECK13-NEXT: ret void 3311 // 3312 // 3313 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3314 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3315 // CHECK13-NEXT: entry: 3316 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3317 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3318 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3319 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3320 // CHECK13-NEXT: ret void 3321 // 3322 // 3323 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3324 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3325 // CHECK13-NEXT: entry: 3326 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3327 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3328 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3329 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3330 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3331 // CHECK13-NEXT: ret void 3332 // 3333 // 3334 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3335 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3336 // CHECK13-NEXT: entry: 3337 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3338 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3339 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3340 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3341 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3342 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3343 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3344 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3345 // CHECK13-NEXT: ret void 3346 // 3347 // 3348 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3349 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3350 // CHECK13-NEXT: entry: 3351 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3352 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3353 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3354 // CHECK13-NEXT: ret void 3355 // 3356 // 3357 // CHECK14-LABEL: define {{[^@]+}}@main 3358 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3359 // CHECK14-NEXT: entry: 3360 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3361 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3362 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3363 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3364 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3365 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3366 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3367 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3368 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 3369 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3370 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3371 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3372 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3373 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3374 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3375 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3376 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3377 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 3378 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 3379 // CHECK14-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3380 // CHECK14-NEXT: [[I12:%.*]] = alloca i32, align 4 3381 // CHECK14-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 3382 // CHECK14-NEXT: [[DOTOMP_LB14:%.*]] = alloca i32, align 4 3383 // CHECK14-NEXT: [[DOTOMP_UB15:%.*]] = alloca i32, align 4 3384 // CHECK14-NEXT: [[DOTOMP_IV16:%.*]] = alloca i32, align 4 3385 // CHECK14-NEXT: [[I17:%.*]] = alloca i32, align 4 3386 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3387 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3388 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3389 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3390 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3391 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3392 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3393 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3394 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3395 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3396 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3397 // CHECK14-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 3398 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3399 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3400 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3401 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3402 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3403 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3404 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3405 // CHECK14: arrayctor.loop: 3406 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3407 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3408 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3409 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3410 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3411 // CHECK14: arrayctor.cont: 3412 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3413 // CHECK14-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 3414 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3415 // CHECK14: omp.inner.for.cond: 3416 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3417 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3418 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3419 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3420 // CHECK14: omp.inner.for.cond.cleanup: 3421 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3422 // CHECK14: omp.inner.for.body: 3423 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3424 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3425 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3426 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3427 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 3428 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3429 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3430 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3431 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3432 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 3433 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3434 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3435 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3436 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3437 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3438 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !2 3439 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3440 // CHECK14: omp.body.continue: 3441 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3442 // CHECK14: omp.inner.for.inc: 3443 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3444 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3445 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3446 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3447 // CHECK14: omp.inner.for.end: 3448 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 3449 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 3450 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3451 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 3452 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3453 // CHECK14: arraydestroy.body: 3454 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3455 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3456 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3457 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3458 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3459 // CHECK14: arraydestroy.done11: 3460 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB14]], align 4 3461 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB15]], align 4 3462 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB14]], align 4 3463 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV16]], align 4 3464 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND18:%.*]] 3465 // CHECK14: omp.inner.for.cond18: 3466 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3467 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB15]], align 4, !llvm.access.group !6 3468 // CHECK14-NEXT: [[CMP19:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3469 // CHECK14-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY20:%.*]], label [[OMP_INNER_FOR_END26:%.*]] 3470 // CHECK14: omp.inner.for.body20: 3471 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3472 // CHECK14-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP16]], 1 3473 // CHECK14-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 3474 // CHECK14-NEXT: store i32 [[ADD22]], i32* [[I17]], align 4, !llvm.access.group !6 3475 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE23:%.*]] 3476 // CHECK14: omp.body.continue23: 3477 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC24:%.*]] 3478 // CHECK14: omp.inner.for.inc24: 3479 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3480 // CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP17]], 1 3481 // CHECK14-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !6 3482 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND18]], !llvm.loop [[LOOP7:![0-9]+]] 3483 // CHECK14: omp.inner.for.end26: 3484 // CHECK14-NEXT: store i32 2, i32* [[I12]], align 4 3485 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 3486 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3487 // CHECK14-NEXT: [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3488 // CHECK14-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN27]], i64 2 3489 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY28:%.*]] 3490 // CHECK14: arraydestroy.body28: 3491 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST29:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_INNER_FOR_END26]] ], [ [[ARRAYDESTROY_ELEMENT30:%.*]], [[ARRAYDESTROY_BODY28]] ] 3492 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT30]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST29]], i64 -1 3493 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT30]]) #[[ATTR4]] 3494 // CHECK14-NEXT: [[ARRAYDESTROY_DONE31:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT30]], [[ARRAY_BEGIN27]] 3495 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE31]], label [[ARRAYDESTROY_DONE32:%.*]], label [[ARRAYDESTROY_BODY28]] 3496 // CHECK14: arraydestroy.done32: 3497 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3498 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[RETVAL]], align 4 3499 // CHECK14-NEXT: ret i32 [[TMP19]] 3500 // 3501 // 3502 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3503 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3504 // CHECK14-NEXT: entry: 3505 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3506 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3507 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3508 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3509 // CHECK14-NEXT: ret void 3510 // 3511 // 3512 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3513 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3514 // CHECK14-NEXT: entry: 3515 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3516 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3517 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3518 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3519 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3520 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3521 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3522 // CHECK14-NEXT: ret void 3523 // 3524 // 3525 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3526 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3527 // CHECK14-NEXT: entry: 3528 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3529 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3530 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3531 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3532 // CHECK14-NEXT: ret void 3533 // 3534 // 3535 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3536 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 3537 // CHECK14-NEXT: entry: 3538 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3539 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3540 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3541 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3542 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3543 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3544 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 3545 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3546 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3547 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3548 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3549 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3550 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3551 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3552 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3553 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 3554 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 3555 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3556 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3557 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3558 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3559 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3560 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 3561 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3562 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 3563 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3564 // CHECK14-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 3565 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3566 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3567 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3568 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3569 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3570 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3571 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3572 // CHECK14: arrayctor.loop: 3573 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3574 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3575 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3576 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3577 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3578 // CHECK14: arrayctor.cont: 3579 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3580 // CHECK14-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 3581 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3582 // CHECK14: omp.inner.for.cond: 3583 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3584 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 3585 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3586 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3587 // CHECK14: omp.inner.for.cond.cleanup: 3588 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3589 // CHECK14: omp.inner.for.body: 3590 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3591 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3592 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3593 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 3594 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !9 3595 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 3596 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3597 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3598 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 3599 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !9 3600 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 3601 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3602 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3603 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3604 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 3605 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !9 3606 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3607 // CHECK14: omp.body.continue: 3608 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3609 // CHECK14: omp.inner.for.inc: 3610 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3611 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3612 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3613 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 3614 // CHECK14: omp.inner.for.end: 3615 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 3616 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3617 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3618 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 3619 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3620 // CHECK14: arraydestroy.body: 3621 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3622 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3623 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3624 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3625 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3626 // CHECK14: arraydestroy.done11: 3627 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3628 // CHECK14-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3629 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 3630 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 3631 // CHECK14: arraydestroy.body13: 3632 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 3633 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 3634 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 3635 // CHECK14-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 3636 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 3637 // CHECK14: arraydestroy.done17: 3638 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3639 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3640 // CHECK14-NEXT: ret i32 [[TMP14]] 3641 // 3642 // 3643 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3644 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3645 // CHECK14-NEXT: entry: 3646 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3647 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3648 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3649 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3650 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 3651 // CHECK14-NEXT: ret void 3652 // 3653 // 3654 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3655 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3656 // CHECK14-NEXT: entry: 3657 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3658 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3659 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3660 // CHECK14-NEXT: ret void 3661 // 3662 // 3663 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3664 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3665 // CHECK14-NEXT: entry: 3666 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3667 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3668 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3669 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3670 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3671 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3672 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3673 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 3674 // CHECK14-NEXT: ret void 3675 // 3676 // 3677 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3678 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3679 // CHECK14-NEXT: entry: 3680 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3681 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3682 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3683 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3684 // CHECK14-NEXT: ret void 3685 // 3686 // 3687 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3688 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3689 // CHECK14-NEXT: entry: 3690 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3691 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3692 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3693 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3694 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3695 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3696 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 3697 // CHECK14-NEXT: ret void 3698 // 3699 // 3700 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3701 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3702 // CHECK14-NEXT: entry: 3703 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3704 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3705 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3706 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3707 // CHECK14-NEXT: ret void 3708 // 3709 // 3710 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3711 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3712 // CHECK14-NEXT: entry: 3713 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3714 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3715 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3716 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3717 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 3718 // CHECK14-NEXT: ret void 3719 // 3720 // 3721 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3722 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3723 // CHECK14-NEXT: entry: 3724 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3725 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3726 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3727 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3728 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3729 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3730 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3731 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3732 // CHECK14-NEXT: ret void 3733 // 3734 // 3735 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3736 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3737 // CHECK14-NEXT: entry: 3738 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3739 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3740 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3741 // CHECK14-NEXT: ret void 3742 // 3743 // 3744 // CHECK15-LABEL: define {{[^@]+}}@main 3745 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 3746 // CHECK15-NEXT: entry: 3747 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3748 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 3749 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 3750 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3751 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3752 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3753 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3754 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3755 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3756 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3757 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3758 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3759 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3760 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3761 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3762 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3763 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3764 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 3765 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3766 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3767 // CHECK15-NEXT: [[I11:%.*]] = alloca i32, align 4 3768 // CHECK15-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 3769 // CHECK15-NEXT: [[DOTOMP_LB13:%.*]] = alloca i32, align 4 3770 // CHECK15-NEXT: [[DOTOMP_UB14:%.*]] = alloca i32, align 4 3771 // CHECK15-NEXT: [[DOTOMP_IV15:%.*]] = alloca i32, align 4 3772 // CHECK15-NEXT: [[I16:%.*]] = alloca i32, align 4 3773 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3774 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 3775 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3776 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 3777 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3778 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3779 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3780 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3781 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3782 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3783 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3784 // CHECK15-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3785 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3786 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3787 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3788 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3789 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3790 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3791 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3792 // CHECK15: arrayctor.loop: 3793 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3794 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3795 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3796 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3797 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3798 // CHECK15: arrayctor.cont: 3799 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3800 // CHECK15-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3801 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3802 // CHECK15: omp.inner.for.cond: 3803 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3804 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 3805 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3806 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3807 // CHECK15: omp.inner.for.cond.cleanup: 3808 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3809 // CHECK15: omp.inner.for.body: 3810 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3811 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3812 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3813 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 3814 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 3815 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 3816 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 3817 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 3818 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 3819 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 3820 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP8]] 3821 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 3822 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3823 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !3 3824 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3825 // CHECK15: omp.body.continue: 3826 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3827 // CHECK15: omp.inner.for.inc: 3828 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3829 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 3830 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3831 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3832 // CHECK15: omp.inner.for.end: 3833 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 3834 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 3835 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3836 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 3837 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3838 // CHECK15: arraydestroy.body: 3839 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3840 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3841 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3842 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 3843 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 3844 // CHECK15: arraydestroy.done10: 3845 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB13]], align 4 3846 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB14]], align 4 3847 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB13]], align 4 3848 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV15]], align 4 3849 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND17:%.*]] 3850 // CHECK15: omp.inner.for.cond17: 3851 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 3852 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB14]], align 4, !llvm.access.group !7 3853 // CHECK15-NEXT: [[CMP18:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3854 // CHECK15-NEXT: br i1 [[CMP18]], label [[OMP_INNER_FOR_BODY19:%.*]], label [[OMP_INNER_FOR_END25:%.*]] 3855 // CHECK15: omp.inner.for.body19: 3856 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 3857 // CHECK15-NEXT: [[MUL20:%.*]] = mul nsw i32 [[TMP16]], 1 3858 // CHECK15-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]] 3859 // CHECK15-NEXT: store i32 [[ADD21]], i32* [[I16]], align 4, !llvm.access.group !7 3860 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE22:%.*]] 3861 // CHECK15: omp.body.continue22: 3862 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC23:%.*]] 3863 // CHECK15: omp.inner.for.inc23: 3864 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 3865 // CHECK15-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP17]], 1 3866 // CHECK15-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 3867 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND17]], !llvm.loop [[LOOP8:![0-9]+]] 3868 // CHECK15: omp.inner.for.end25: 3869 // CHECK15-NEXT: store i32 2, i32* [[I11]], align 4 3870 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3871 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3872 // CHECK15-NEXT: [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3873 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN26]], i32 2 3874 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY27:%.*]] 3875 // CHECK15: arraydestroy.body27: 3876 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST28:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_INNER_FOR_END25]] ], [ [[ARRAYDESTROY_ELEMENT29:%.*]], [[ARRAYDESTROY_BODY27]] ] 3877 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT29]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST28]], i32 -1 3878 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT29]]) #[[ATTR4]] 3879 // CHECK15-NEXT: [[ARRAYDESTROY_DONE30:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT29]], [[ARRAY_BEGIN26]] 3880 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE30]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY27]] 3881 // CHECK15: arraydestroy.done31: 3882 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3883 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[RETVAL]], align 4 3884 // CHECK15-NEXT: ret i32 [[TMP19]] 3885 // 3886 // 3887 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3888 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3889 // CHECK15-NEXT: entry: 3890 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3891 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3892 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3893 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3894 // CHECK15-NEXT: ret void 3895 // 3896 // 3897 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3898 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3899 // CHECK15-NEXT: entry: 3900 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3901 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3902 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3903 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3904 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3905 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3906 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3907 // CHECK15-NEXT: ret void 3908 // 3909 // 3910 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3911 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3912 // CHECK15-NEXT: entry: 3913 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3914 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3915 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3916 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3917 // CHECK15-NEXT: ret void 3918 // 3919 // 3920 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3921 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 3922 // CHECK15-NEXT: entry: 3923 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3924 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3925 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3926 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3927 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3928 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3929 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3930 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3931 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3932 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3933 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3934 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3935 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3936 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3937 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3938 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 3939 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 3940 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3941 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 3942 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3943 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3944 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3945 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3946 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3947 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3948 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3949 // CHECK15-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3950 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3951 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3952 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3953 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3954 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3955 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3956 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3957 // CHECK15: arrayctor.loop: 3958 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3959 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3960 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3961 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3962 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3963 // CHECK15: arrayctor.cont: 3964 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3965 // CHECK15-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 3966 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3967 // CHECK15: omp.inner.for.cond: 3968 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3969 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 3970 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3971 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3972 // CHECK15: omp.inner.for.cond.cleanup: 3973 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3974 // CHECK15: omp.inner.for.body: 3975 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3976 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3977 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3978 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 3979 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !10 3980 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3981 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 3982 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 3983 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !10 3984 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3985 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]] 3986 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 3987 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 3988 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !10 3989 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3990 // CHECK15: omp.body.continue: 3991 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3992 // CHECK15: omp.inner.for.inc: 3993 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3994 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 3995 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3996 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3997 // CHECK15: omp.inner.for.end: 3998 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 3999 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4000 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4001 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 4002 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4003 // CHECK15: arraydestroy.body: 4004 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4005 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4006 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4007 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4008 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4009 // CHECK15: arraydestroy.done10: 4010 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4011 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4012 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 4013 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 4014 // CHECK15: arraydestroy.body12: 4015 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 4016 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 4017 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 4018 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 4019 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 4020 // CHECK15: arraydestroy.done16: 4021 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4022 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4023 // CHECK15-NEXT: ret i32 [[TMP14]] 4024 // 4025 // 4026 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4027 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4028 // CHECK15-NEXT: entry: 4029 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4030 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4031 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4032 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4033 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4034 // CHECK15-NEXT: ret void 4035 // 4036 // 4037 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4038 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4039 // CHECK15-NEXT: entry: 4040 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4041 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4042 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4043 // CHECK15-NEXT: ret void 4044 // 4045 // 4046 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4047 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4048 // CHECK15-NEXT: entry: 4049 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4050 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4051 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4052 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4053 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4054 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4055 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4056 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4057 // CHECK15-NEXT: ret void 4058 // 4059 // 4060 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4061 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4062 // CHECK15-NEXT: entry: 4063 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4064 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4065 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4066 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4067 // CHECK15-NEXT: ret void 4068 // 4069 // 4070 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4071 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4072 // CHECK15-NEXT: entry: 4073 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4074 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4075 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4076 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4077 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4078 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4079 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4080 // CHECK15-NEXT: ret void 4081 // 4082 // 4083 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4084 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4085 // CHECK15-NEXT: entry: 4086 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4087 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4088 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4089 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4090 // CHECK15-NEXT: ret void 4091 // 4092 // 4093 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4094 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4095 // CHECK15-NEXT: entry: 4096 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4097 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4098 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4099 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4100 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4101 // CHECK15-NEXT: ret void 4102 // 4103 // 4104 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4105 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4106 // CHECK15-NEXT: entry: 4107 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4108 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4109 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4110 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4111 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4112 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4113 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4114 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4115 // CHECK15-NEXT: ret void 4116 // 4117 // 4118 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4119 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4120 // CHECK15-NEXT: entry: 4121 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4122 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4123 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4124 // CHECK15-NEXT: ret void 4125 // 4126 // 4127 // CHECK16-LABEL: define {{[^@]+}}@main 4128 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4129 // CHECK16-NEXT: entry: 4130 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4131 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4132 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4133 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4134 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4135 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4136 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4137 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4138 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 4139 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4140 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4141 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4142 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4143 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4144 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4145 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4146 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4147 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4148 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4149 // CHECK16-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4150 // CHECK16-NEXT: [[I11:%.*]] = alloca i32, align 4 4151 // CHECK16-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 4152 // CHECK16-NEXT: [[DOTOMP_LB13:%.*]] = alloca i32, align 4 4153 // CHECK16-NEXT: [[DOTOMP_UB14:%.*]] = alloca i32, align 4 4154 // CHECK16-NEXT: [[DOTOMP_IV15:%.*]] = alloca i32, align 4 4155 // CHECK16-NEXT: [[I16:%.*]] = alloca i32, align 4 4156 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4157 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4158 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4159 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4160 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4161 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4162 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4163 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4164 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4165 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4166 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4167 // CHECK16-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 4168 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4169 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4170 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4171 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4172 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4173 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4174 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4175 // CHECK16: arrayctor.loop: 4176 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4177 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4178 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4179 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4180 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4181 // CHECK16: arrayctor.cont: 4182 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4183 // CHECK16-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4184 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4185 // CHECK16: omp.inner.for.cond: 4186 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4187 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4188 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4189 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4190 // CHECK16: omp.inner.for.cond.cleanup: 4191 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4192 // CHECK16: omp.inner.for.body: 4193 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4194 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4195 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4196 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4197 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 4198 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4199 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 4200 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4201 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 4202 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4203 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP8]] 4204 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 4205 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4206 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !3 4207 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4208 // CHECK16: omp.body.continue: 4209 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4210 // CHECK16: omp.inner.for.inc: 4211 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4212 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 4213 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4214 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4215 // CHECK16: omp.inner.for.end: 4216 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 4217 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4218 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4219 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 4220 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4221 // CHECK16: arraydestroy.body: 4222 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4223 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4224 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4225 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4226 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4227 // CHECK16: arraydestroy.done10: 4228 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB13]], align 4 4229 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB14]], align 4 4230 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB13]], align 4 4231 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV15]], align 4 4232 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND17:%.*]] 4233 // CHECK16: omp.inner.for.cond17: 4234 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 4235 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB14]], align 4, !llvm.access.group !7 4236 // CHECK16-NEXT: [[CMP18:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4237 // CHECK16-NEXT: br i1 [[CMP18]], label [[OMP_INNER_FOR_BODY19:%.*]], label [[OMP_INNER_FOR_END25:%.*]] 4238 // CHECK16: omp.inner.for.body19: 4239 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 4240 // CHECK16-NEXT: [[MUL20:%.*]] = mul nsw i32 [[TMP16]], 1 4241 // CHECK16-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]] 4242 // CHECK16-NEXT: store i32 [[ADD21]], i32* [[I16]], align 4, !llvm.access.group !7 4243 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE22:%.*]] 4244 // CHECK16: omp.body.continue22: 4245 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC23:%.*]] 4246 // CHECK16: omp.inner.for.inc23: 4247 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 4248 // CHECK16-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP17]], 1 4249 // CHECK16-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV15]], align 4, !llvm.access.group !7 4250 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND17]], !llvm.loop [[LOOP8:![0-9]+]] 4251 // CHECK16: omp.inner.for.end25: 4252 // CHECK16-NEXT: store i32 2, i32* [[I11]], align 4 4253 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4254 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4255 // CHECK16-NEXT: [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4256 // CHECK16-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN26]], i32 2 4257 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY27:%.*]] 4258 // CHECK16: arraydestroy.body27: 4259 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST28:%.*]] = phi %struct.S* [ [[TMP18]], [[OMP_INNER_FOR_END25]] ], [ [[ARRAYDESTROY_ELEMENT29:%.*]], [[ARRAYDESTROY_BODY27]] ] 4260 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT29]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST28]], i32 -1 4261 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT29]]) #[[ATTR4]] 4262 // CHECK16-NEXT: [[ARRAYDESTROY_DONE30:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT29]], [[ARRAY_BEGIN26]] 4263 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE30]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY27]] 4264 // CHECK16: arraydestroy.done31: 4265 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4266 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[RETVAL]], align 4 4267 // CHECK16-NEXT: ret i32 [[TMP19]] 4268 // 4269 // 4270 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4271 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4272 // CHECK16-NEXT: entry: 4273 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4274 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4275 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4276 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4277 // CHECK16-NEXT: ret void 4278 // 4279 // 4280 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4281 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4282 // CHECK16-NEXT: entry: 4283 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4284 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4285 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4286 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4287 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4288 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4289 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4290 // CHECK16-NEXT: ret void 4291 // 4292 // 4293 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4294 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4295 // CHECK16-NEXT: entry: 4296 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4297 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4298 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4299 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4300 // CHECK16-NEXT: ret void 4301 // 4302 // 4303 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4304 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4305 // CHECK16-NEXT: entry: 4306 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4307 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4308 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4309 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4310 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4311 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4312 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 4313 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4314 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4315 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4316 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4317 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4318 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4319 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4320 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4321 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4322 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4323 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4324 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4325 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4326 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4327 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4328 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4329 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4330 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4331 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4332 // CHECK16-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 4333 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4334 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4335 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4336 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4337 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4338 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4339 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4340 // CHECK16: arrayctor.loop: 4341 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4342 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4343 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4344 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4345 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4346 // CHECK16: arrayctor.cont: 4347 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4348 // CHECK16-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4349 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4350 // CHECK16: omp.inner.for.cond: 4351 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4352 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 4353 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4354 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4355 // CHECK16: omp.inner.for.cond.cleanup: 4356 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4357 // CHECK16: omp.inner.for.body: 4358 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4359 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4360 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4361 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 4362 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !10 4363 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 4364 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 4365 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 4366 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !10 4367 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 4368 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]] 4369 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 4370 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4371 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !10 4372 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4373 // CHECK16: omp.body.continue: 4374 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4375 // CHECK16: omp.inner.for.inc: 4376 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4377 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 4378 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4379 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 4380 // CHECK16: omp.inner.for.end: 4381 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 4382 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4383 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4384 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 4385 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4386 // CHECK16: arraydestroy.body: 4387 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4388 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4389 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4390 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4391 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4392 // CHECK16: arraydestroy.done10: 4393 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4394 // CHECK16-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4395 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 4396 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 4397 // CHECK16: arraydestroy.body12: 4398 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 4399 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 4400 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 4401 // CHECK16-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 4402 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 4403 // CHECK16: arraydestroy.done16: 4404 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4405 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4406 // CHECK16-NEXT: ret i32 [[TMP14]] 4407 // 4408 // 4409 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4410 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4411 // CHECK16-NEXT: entry: 4412 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4413 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4414 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4415 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4416 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4417 // CHECK16-NEXT: ret void 4418 // 4419 // 4420 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4421 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4422 // CHECK16-NEXT: entry: 4423 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4424 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4425 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4426 // CHECK16-NEXT: ret void 4427 // 4428 // 4429 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4430 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4431 // CHECK16-NEXT: entry: 4432 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4433 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4434 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4435 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4436 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4437 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4438 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4439 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4440 // CHECK16-NEXT: ret void 4441 // 4442 // 4443 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4444 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4445 // CHECK16-NEXT: entry: 4446 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4447 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4448 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4449 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4450 // CHECK16-NEXT: ret void 4451 // 4452 // 4453 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4454 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4455 // CHECK16-NEXT: entry: 4456 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4457 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4458 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4459 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4460 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4461 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4462 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4463 // CHECK16-NEXT: ret void 4464 // 4465 // 4466 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4467 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4468 // CHECK16-NEXT: entry: 4469 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4470 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4471 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4472 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4473 // CHECK16-NEXT: ret void 4474 // 4475 // 4476 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4477 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4478 // CHECK16-NEXT: entry: 4479 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4480 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4481 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4482 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4483 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4484 // CHECK16-NEXT: ret void 4485 // 4486 // 4487 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4488 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4489 // CHECK16-NEXT: entry: 4490 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4491 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4492 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4493 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4494 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4495 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4496 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4497 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4498 // CHECK16-NEXT: ret void 4499 // 4500 // 4501 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4502 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4503 // CHECK16-NEXT: entry: 4504 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4505 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4506 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4507 // CHECK16-NEXT: ret void 4508 // 4509