1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8 
9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6
12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
15 
16 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12
22 
23 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14
26 // RUN: %clang_cc1 -no-opaque-pointers  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32 
33 template <class T>
34 struct S {
35   T f;
36   S(T a) : f(a) {}
37   S() : f() {}
38   operator T() { return T(); }
39   ~S() {}
40 };
41 
42 template <typename T>
43 T tmain() {
44   S<T> test;
45   T t_var = T();
46   T vec[] = {1, 2};
47   S<T> s_arr[] = {1, 2};
48   S<T> &var = test;
49   #pragma omp target
50   #pragma omp teams
51 #pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
52   for (int i = 0; i < 2; ++i) {
53     vec[i] = t_var;
54     s_arr[i] = var;
55   }
56   return T();
57 }
58 
59 int main() {
60   static int svar;
61   volatile double g;
62   volatile double &g1 = g;
63 
64   #ifdef LAMBDA
65   [&]() {
66     static float sfvar;
67 
68     #pragma omp target
69     #pragma omp teams
70 #pragma omp distribute simd lastprivate(g, g1, svar, sfvar)
71     for (int i = 0; i < 2; ++i) {
72       // loop variables
73 
74       // init private variables
75       g = 1;
76       g1 = 1;
77       svar = 3;
78       sfvar = 4.0;
79 
80       // linear counter
81 
82 
83 
84 
85       [&]() {
86 	g = 2;
87 	g1 = 2;
88 	svar = 4;
89 	sfvar = 8.0;
90 
91       }();
92     }
93   }();
94   return 0;
95   #else
96   S<float> test;
97   int t_var = 0;
98   int vec[] = {1, 2};
99   S<float> s_arr[] = {1, 2};
100   S<float> &var = test;
101 
102   #pragma omp target
103   #pragma omp teams
104 #pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
105   for (int i = 0; i < 2; ++i) {
106     vec[i] = t_var;
107     s_arr[i] = var;
108   }
109   int i;
110 
111   return tmain<int>();
112   #endif
113 }
114 
115 
116 // skip loop variables
117 
118 // copy from parameters to local address variables
119 
120 // load content of local address variables
121 // the distribute loop
122 // assignment: vec[i] = t_var;
123 
124 // assignment: s_arr[i] = var;
125 
126 // lastprivates
127 
128 
129 // template tmain
130 
131 
132 
133 // skip alloca of global_tid and bound_tid
134 // skip loop variables
135 
136 // skip init of bound and global tid
137 // copy from parameters to local address variables
138 
139 // load content of local address variables
140 // assignment: vec[i] = t_var;
141 
142 // assignment: s_arr[i] = var;
143 
144 // lastprivates
145 
146 
147 #endif
148 // CHECK1-LABEL: define {{[^@]+}}@main
149 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
150 // CHECK1-NEXT:  entry:
151 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
152 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
153 // CHECK1-NEXT:    [[G1:%.*]] = alloca double*, align 8
154 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
155 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
156 // CHECK1-NEXT:    store double* [[G]], double** [[G1]], align 8
157 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
158 // CHECK1-NEXT:    store double* [[G]], double** [[TMP0]], align 8
159 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
160 // CHECK1-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
161 // CHECK1-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
162 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
163 // CHECK1-NEXT:    ret i32 0
164 //
165 //
166 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
167 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
168 // CHECK1-NEXT:  entry:
169 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
170 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
171 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
172 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
173 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
174 // CHECK1-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
175 // CHECK1-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
176 // CHECK1-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
177 // CHECK1-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
178 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
179 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
180 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
181 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
182 // CHECK1-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
183 // CHECK1-NEXT:    [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
184 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
185 // CHECK1-NEXT:    ret void
186 //
187 //
188 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
189 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
190 // CHECK1-NEXT:  entry:
191 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
192 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
193 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 8
194 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 8
195 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
196 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 8
197 // CHECK1-NEXT:    [[TMP:%.*]] = alloca double*, align 8
198 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca double*, align 8
199 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
201 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
202 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
203 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
204 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8
206 // CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8
207 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca double*, align 8
208 // CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
210 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
212 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
213 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
214 // CHECK1-NEXT:    store double* [[G]], double** [[G_ADDR]], align 8
215 // CHECK1-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 8
216 // CHECK1-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
217 // CHECK1-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
218 // CHECK1-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
219 // CHECK1-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
220 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
221 // CHECK1-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
222 // CHECK1-NEXT:    store double* [[TMP1]], double** [[TMP]], align 8
223 // CHECK1-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
224 // CHECK1-NEXT:    store double* [[TMP4]], double** [[_TMP1]], align 8
225 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
226 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
227 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
228 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
229 // CHECK1-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
230 // CHECK1-NEXT:    store double* [[G14]], double** [[_TMP5]], align 8
231 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
232 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
233 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
234 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
235 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
236 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
237 // CHECK1:       cond.true:
238 // CHECK1-NEXT:    br label [[COND_END:%.*]]
239 // CHECK1:       cond.false:
240 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
241 // CHECK1-NEXT:    br label [[COND_END]]
242 // CHECK1:       cond.end:
243 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
244 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
245 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
246 // CHECK1-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
247 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
248 // CHECK1:       omp.inner.for.cond:
249 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
250 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
251 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
252 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
253 // CHECK1:       omp.inner.for.body:
254 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
255 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
256 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
257 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
258 // CHECK1-NEXT:    store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !4
259 // CHECK1-NEXT:    [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4
260 // CHECK1-NEXT:    store volatile double 1.000000e+00, double* [[TMP14]], align 8, !llvm.access.group !4
261 // CHECK1-NEXT:    store i32 3, i32* [[SVAR6]], align 4, !llvm.access.group !4
262 // CHECK1-NEXT:    store float 4.000000e+00, float* [[SFVAR7]], align 4, !llvm.access.group !4
263 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
264 // CHECK1-NEXT:    store double* [[G3]], double** [[TMP15]], align 8, !llvm.access.group !4
265 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
266 // CHECK1-NEXT:    [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4
267 // CHECK1-NEXT:    store double* [[TMP17]], double** [[TMP16]], align 8, !llvm.access.group !4
268 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
269 // CHECK1-NEXT:    store i32* [[SVAR6]], i32** [[TMP18]], align 8, !llvm.access.group !4
270 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
271 // CHECK1-NEXT:    store float* [[SFVAR7]], float** [[TMP19]], align 8, !llvm.access.group !4
272 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4
273 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
274 // CHECK1:       omp.body.continue:
275 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
276 // CHECK1:       omp.inner.for.inc:
277 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
278 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
279 // CHECK1-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
280 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
281 // CHECK1:       omp.inner.for.end:
282 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
283 // CHECK1:       omp.loop.exit:
284 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
285 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
286 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
287 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
288 // CHECK1:       .omp.final.then:
289 // CHECK1-NEXT:    store i32 2, i32* [[I]], align 4
290 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
291 // CHECK1:       .omp.final.done:
292 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
293 // CHECK1-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
294 // CHECK1-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
295 // CHECK1:       .omp.lastprivate.then:
296 // CHECK1-NEXT:    [[TMP25:%.*]] = load double, double* [[G3]], align 8
297 // CHECK1-NEXT:    store volatile double [[TMP25]], double* [[TMP0]], align 8
298 // CHECK1-NEXT:    [[TMP26:%.*]] = load double*, double** [[_TMP5]], align 8
299 // CHECK1-NEXT:    [[TMP27:%.*]] = load double, double* [[TMP26]], align 8
300 // CHECK1-NEXT:    store volatile double [[TMP27]], double* [[TMP5]], align 8
301 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SVAR6]], align 4
302 // CHECK1-NEXT:    store i32 [[TMP28]], i32* [[TMP2]], align 4
303 // CHECK1-NEXT:    [[TMP29:%.*]] = load float, float* [[SFVAR7]], align 4
304 // CHECK1-NEXT:    store float [[TMP29]], float* [[TMP3]], align 4
305 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
306 // CHECK1:       .omp.lastprivate.done:
307 // CHECK1-NEXT:    ret void
308 //
309 //
310 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
311 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
312 // CHECK1-NEXT:  entry:
313 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
314 // CHECK1-NEXT:    ret void
315 //
316 //
317 // CHECK2-LABEL: define {{[^@]+}}@main
318 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
319 // CHECK2-NEXT:  entry:
320 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
321 // CHECK2-NEXT:    [[G:%.*]] = alloca double, align 8
322 // CHECK2-NEXT:    [[G1:%.*]] = alloca double*, align 8
323 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
324 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
325 // CHECK2-NEXT:    store double* [[G]], double** [[G1]], align 8
326 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
327 // CHECK2-NEXT:    store double* [[G]], double** [[TMP0]], align 8
328 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
329 // CHECK2-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
330 // CHECK2-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
331 // CHECK2-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
332 // CHECK2-NEXT:    ret i32 0
333 //
334 //
335 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
336 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
337 // CHECK2-NEXT:  entry:
338 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
339 // CHECK2-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
340 // CHECK2-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
341 // CHECK2-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
342 // CHECK2-NEXT:    [[TMP:%.*]] = alloca double*, align 8
343 // CHECK2-NEXT:    store i64 [[G]], i64* [[G_ADDR]], align 8
344 // CHECK2-NEXT:    store i64 [[G1]], i64* [[G1_ADDR]], align 8
345 // CHECK2-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
346 // CHECK2-NEXT:    store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
347 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
348 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
349 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
350 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
351 // CHECK2-NEXT:    store double* [[CONV1]], double** [[TMP]], align 8
352 // CHECK2-NEXT:    [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
353 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
354 // CHECK2-NEXT:    ret void
355 //
356 //
357 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
358 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
359 // CHECK2-NEXT:  entry:
360 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
362 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 8
363 // CHECK2-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 8
364 // CHECK2-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
365 // CHECK2-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 8
366 // CHECK2-NEXT:    [[TMP:%.*]] = alloca double*, align 8
367 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca double*, align 8
368 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
369 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
370 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
371 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
372 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
373 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
374 // CHECK2-NEXT:    [[G3:%.*]] = alloca double, align 8
375 // CHECK2-NEXT:    [[G14:%.*]] = alloca double, align 8
376 // CHECK2-NEXT:    [[_TMP5:%.*]] = alloca double*, align 8
377 // CHECK2-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
378 // CHECK2-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
379 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
380 // CHECK2-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
381 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
382 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
383 // CHECK2-NEXT:    store double* [[G]], double** [[G_ADDR]], align 8
384 // CHECK2-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 8
385 // CHECK2-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
386 // CHECK2-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
387 // CHECK2-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
388 // CHECK2-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
389 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
390 // CHECK2-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
391 // CHECK2-NEXT:    store double* [[TMP1]], double** [[TMP]], align 8
392 // CHECK2-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
393 // CHECK2-NEXT:    store double* [[TMP4]], double** [[_TMP1]], align 8
394 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
395 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
396 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
397 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
398 // CHECK2-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
399 // CHECK2-NEXT:    store double* [[G14]], double** [[_TMP5]], align 8
400 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
401 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
402 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
403 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
404 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
405 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
406 // CHECK2:       cond.true:
407 // CHECK2-NEXT:    br label [[COND_END:%.*]]
408 // CHECK2:       cond.false:
409 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
410 // CHECK2-NEXT:    br label [[COND_END]]
411 // CHECK2:       cond.end:
412 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
413 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
414 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
415 // CHECK2-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
416 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
417 // CHECK2:       omp.inner.for.cond:
418 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
419 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
420 // CHECK2-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
421 // CHECK2-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
422 // CHECK2:       omp.inner.for.body:
423 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
424 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
425 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
426 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
427 // CHECK2-NEXT:    store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !4
428 // CHECK2-NEXT:    [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4
429 // CHECK2-NEXT:    store volatile double 1.000000e+00, double* [[TMP14]], align 8, !llvm.access.group !4
430 // CHECK2-NEXT:    store i32 3, i32* [[SVAR6]], align 4, !llvm.access.group !4
431 // CHECK2-NEXT:    store float 4.000000e+00, float* [[SFVAR7]], align 4, !llvm.access.group !4
432 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
433 // CHECK2-NEXT:    store double* [[G3]], double** [[TMP15]], align 8, !llvm.access.group !4
434 // CHECK2-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
435 // CHECK2-NEXT:    [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4
436 // CHECK2-NEXT:    store double* [[TMP17]], double** [[TMP16]], align 8, !llvm.access.group !4
437 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
438 // CHECK2-NEXT:    store i32* [[SVAR6]], i32** [[TMP18]], align 8, !llvm.access.group !4
439 // CHECK2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
440 // CHECK2-NEXT:    store float* [[SFVAR7]], float** [[TMP19]], align 8, !llvm.access.group !4
441 // CHECK2-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4
442 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
443 // CHECK2:       omp.body.continue:
444 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
445 // CHECK2:       omp.inner.for.inc:
446 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
447 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
448 // CHECK2-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
449 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
450 // CHECK2:       omp.inner.for.end:
451 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
452 // CHECK2:       omp.loop.exit:
453 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
454 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
455 // CHECK2-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
456 // CHECK2-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
457 // CHECK2:       .omp.final.then:
458 // CHECK2-NEXT:    store i32 2, i32* [[I]], align 4
459 // CHECK2-NEXT:    br label [[DOTOMP_FINAL_DONE]]
460 // CHECK2:       .omp.final.done:
461 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
462 // CHECK2-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
463 // CHECK2-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
464 // CHECK2:       .omp.lastprivate.then:
465 // CHECK2-NEXT:    [[TMP25:%.*]] = load double, double* [[G3]], align 8
466 // CHECK2-NEXT:    store volatile double [[TMP25]], double* [[TMP0]], align 8
467 // CHECK2-NEXT:    [[TMP26:%.*]] = load double*, double** [[_TMP5]], align 8
468 // CHECK2-NEXT:    [[TMP27:%.*]] = load double, double* [[TMP26]], align 8
469 // CHECK2-NEXT:    store volatile double [[TMP27]], double* [[TMP5]], align 8
470 // CHECK2-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SVAR6]], align 4
471 // CHECK2-NEXT:    store i32 [[TMP28]], i32* [[TMP2]], align 4
472 // CHECK2-NEXT:    [[TMP29:%.*]] = load float, float* [[SFVAR7]], align 4
473 // CHECK2-NEXT:    store float [[TMP29]], float* [[TMP3]], align 4
474 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
475 // CHECK2:       .omp.lastprivate.done:
476 // CHECK2-NEXT:    ret void
477 //
478 //
479 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
480 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
481 // CHECK2-NEXT:  entry:
482 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
483 // CHECK2-NEXT:    ret void
484 //
485 //
486 // CHECK3-LABEL: define {{[^@]+}}@main
487 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
488 // CHECK3-NEXT:  entry:
489 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
490 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
491 // CHECK3-NEXT:    [[G1:%.*]] = alloca double*, align 4
492 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
493 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
494 // CHECK3-NEXT:    store double* [[G]], double** [[G1]], align 4
495 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
496 // CHECK3-NEXT:    store double* [[G]], double** [[TMP0]], align 4
497 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
498 // CHECK3-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
499 // CHECK3-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
500 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
501 // CHECK3-NEXT:    ret i32 0
502 //
503 //
504 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
505 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
506 // CHECK3-NEXT:  entry:
507 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
508 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
509 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
510 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
511 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
512 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
513 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
514 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
515 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
516 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
517 // CHECK3-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
518 // CHECK3-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
519 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
520 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
521 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
522 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
523 // CHECK3-NEXT:    [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
524 // CHECK3-NEXT:    store double [[TMP2]], double* [[G2]], align 8
525 // CHECK3-NEXT:    [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
526 // CHECK3-NEXT:    [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
527 // CHECK3-NEXT:    store double [[TMP4]], double* [[G13]], align 8
528 // CHECK3-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
529 // CHECK3-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
530 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
531 // CHECK3-NEXT:    ret void
532 //
533 //
534 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
535 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
536 // CHECK3-NEXT:  entry:
537 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
538 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
539 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
540 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
541 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
542 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 4
543 // CHECK3-NEXT:    [[TMP:%.*]] = alloca double*, align 4
544 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca double*, align 4
545 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
546 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
547 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
548 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
549 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
550 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
551 // CHECK3-NEXT:    [[G3:%.*]] = alloca double, align 8
552 // CHECK3-NEXT:    [[G14:%.*]] = alloca double, align 8
553 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca double*, align 4
554 // CHECK3-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
555 // CHECK3-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
556 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
557 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
558 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
559 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
560 // CHECK3-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
561 // CHECK3-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
562 // CHECK3-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
563 // CHECK3-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
564 // CHECK3-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
565 // CHECK3-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
566 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
567 // CHECK3-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
568 // CHECK3-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
569 // CHECK3-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
570 // CHECK3-NEXT:    store double* [[TMP4]], double** [[_TMP1]], align 4
571 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
572 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
573 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
574 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
575 // CHECK3-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
576 // CHECK3-NEXT:    store double* [[G14]], double** [[_TMP5]], align 4
577 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
578 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
579 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
580 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
581 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
582 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
583 // CHECK3:       cond.true:
584 // CHECK3-NEXT:    br label [[COND_END:%.*]]
585 // CHECK3:       cond.false:
586 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
587 // CHECK3-NEXT:    br label [[COND_END]]
588 // CHECK3:       cond.end:
589 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
590 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
591 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
592 // CHECK3-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
593 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
594 // CHECK3:       omp.inner.for.cond:
595 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
596 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
597 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
598 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
599 // CHECK3:       omp.inner.for.body:
600 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
601 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
602 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
603 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
604 // CHECK3-NEXT:    store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !5
605 // CHECK3-NEXT:    [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5
606 // CHECK3-NEXT:    store volatile double 1.000000e+00, double* [[TMP14]], align 4, !llvm.access.group !5
607 // CHECK3-NEXT:    store i32 3, i32* [[SVAR6]], align 4, !llvm.access.group !5
608 // CHECK3-NEXT:    store float 4.000000e+00, float* [[SFVAR7]], align 4, !llvm.access.group !5
609 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
610 // CHECK3-NEXT:    store double* [[G3]], double** [[TMP15]], align 4, !llvm.access.group !5
611 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
612 // CHECK3-NEXT:    [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5
613 // CHECK3-NEXT:    store double* [[TMP17]], double** [[TMP16]], align 4, !llvm.access.group !5
614 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
615 // CHECK3-NEXT:    store i32* [[SVAR6]], i32** [[TMP18]], align 4, !llvm.access.group !5
616 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
617 // CHECK3-NEXT:    store float* [[SFVAR7]], float** [[TMP19]], align 4, !llvm.access.group !5
618 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5
619 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
620 // CHECK3:       omp.body.continue:
621 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
622 // CHECK3:       omp.inner.for.inc:
623 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
624 // CHECK3-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
625 // CHECK3-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
626 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
627 // CHECK3:       omp.inner.for.end:
628 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
629 // CHECK3:       omp.loop.exit:
630 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
631 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
632 // CHECK3-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
633 // CHECK3-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
634 // CHECK3:       .omp.final.then:
635 // CHECK3-NEXT:    store i32 2, i32* [[I]], align 4
636 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
637 // CHECK3:       .omp.final.done:
638 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
639 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
640 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
641 // CHECK3:       .omp.lastprivate.then:
642 // CHECK3-NEXT:    [[TMP25:%.*]] = load double, double* [[G3]], align 8
643 // CHECK3-NEXT:    store volatile double [[TMP25]], double* [[TMP0]], align 8
644 // CHECK3-NEXT:    [[TMP26:%.*]] = load double*, double** [[_TMP5]], align 4
645 // CHECK3-NEXT:    [[TMP27:%.*]] = load double, double* [[TMP26]], align 4
646 // CHECK3-NEXT:    store volatile double [[TMP27]], double* [[TMP5]], align 4
647 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SVAR6]], align 4
648 // CHECK3-NEXT:    store i32 [[TMP28]], i32* [[TMP2]], align 4
649 // CHECK3-NEXT:    [[TMP29:%.*]] = load float, float* [[SFVAR7]], align 4
650 // CHECK3-NEXT:    store float [[TMP29]], float* [[TMP3]], align 4
651 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
652 // CHECK3:       .omp.lastprivate.done:
653 // CHECK3-NEXT:    ret void
654 //
655 //
656 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
657 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
658 // CHECK3-NEXT:  entry:
659 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
660 // CHECK3-NEXT:    ret void
661 //
662 //
663 // CHECK4-LABEL: define {{[^@]+}}@main
664 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
665 // CHECK4-NEXT:  entry:
666 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
667 // CHECK4-NEXT:    [[G:%.*]] = alloca double, align 8
668 // CHECK4-NEXT:    [[G1:%.*]] = alloca double*, align 4
669 // CHECK4-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
670 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
671 // CHECK4-NEXT:    store double* [[G]], double** [[G1]], align 4
672 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
673 // CHECK4-NEXT:    store double* [[G]], double** [[TMP0]], align 4
674 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
675 // CHECK4-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
676 // CHECK4-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
677 // CHECK4-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
678 // CHECK4-NEXT:    ret i32 0
679 //
680 //
681 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
682 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
683 // CHECK4-NEXT:  entry:
684 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
685 // CHECK4-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
686 // CHECK4-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
687 // CHECK4-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
688 // CHECK4-NEXT:    [[TMP:%.*]] = alloca double*, align 4
689 // CHECK4-NEXT:    [[G2:%.*]] = alloca double, align 8
690 // CHECK4-NEXT:    [[G13:%.*]] = alloca double, align 8
691 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca double*, align 4
692 // CHECK4-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
693 // CHECK4-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
694 // CHECK4-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
695 // CHECK4-NEXT:    store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
696 // CHECK4-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
697 // CHECK4-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
698 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
699 // CHECK4-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
700 // CHECK4-NEXT:    [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
701 // CHECK4-NEXT:    store double [[TMP2]], double* [[G2]], align 8
702 // CHECK4-NEXT:    [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
703 // CHECK4-NEXT:    [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
704 // CHECK4-NEXT:    store double [[TMP4]], double* [[G13]], align 8
705 // CHECK4-NEXT:    store double* [[G13]], double** [[_TMP4]], align 4
706 // CHECK4-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
707 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
708 // CHECK4-NEXT:    ret void
709 //
710 //
711 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
712 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
713 // CHECK4-NEXT:  entry:
714 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
715 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
716 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca double*, align 4
717 // CHECK4-NEXT:    [[G1_ADDR:%.*]] = alloca double*, align 4
718 // CHECK4-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
719 // CHECK4-NEXT:    [[SFVAR_ADDR:%.*]] = alloca float*, align 4
720 // CHECK4-NEXT:    [[TMP:%.*]] = alloca double*, align 4
721 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca double*, align 4
722 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
723 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
724 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
725 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
726 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
727 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
728 // CHECK4-NEXT:    [[G3:%.*]] = alloca double, align 8
729 // CHECK4-NEXT:    [[G14:%.*]] = alloca double, align 8
730 // CHECK4-NEXT:    [[_TMP5:%.*]] = alloca double*, align 4
731 // CHECK4-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
732 // CHECK4-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
733 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
734 // CHECK4-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
735 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
736 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
737 // CHECK4-NEXT:    store double* [[G]], double** [[G_ADDR]], align 4
738 // CHECK4-NEXT:    store double* [[G1]], double** [[G1_ADDR]], align 4
739 // CHECK4-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
740 // CHECK4-NEXT:    store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
741 // CHECK4-NEXT:    [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
742 // CHECK4-NEXT:    [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
743 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
744 // CHECK4-NEXT:    [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
745 // CHECK4-NEXT:    store double* [[TMP1]], double** [[TMP]], align 4
746 // CHECK4-NEXT:    [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
747 // CHECK4-NEXT:    store double* [[TMP4]], double** [[_TMP1]], align 4
748 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
749 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
750 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
751 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
752 // CHECK4-NEXT:    [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
753 // CHECK4-NEXT:    store double* [[G14]], double** [[_TMP5]], align 4
754 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
755 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
756 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
757 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
759 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
760 // CHECK4:       cond.true:
761 // CHECK4-NEXT:    br label [[COND_END:%.*]]
762 // CHECK4:       cond.false:
763 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
764 // CHECK4-NEXT:    br label [[COND_END]]
765 // CHECK4:       cond.end:
766 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
767 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
768 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
769 // CHECK4-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
770 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
771 // CHECK4:       omp.inner.for.cond:
772 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
773 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
774 // CHECK4-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
775 // CHECK4-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
776 // CHECK4:       omp.inner.for.body:
777 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
778 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
779 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
780 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
781 // CHECK4-NEXT:    store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !5
782 // CHECK4-NEXT:    [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5
783 // CHECK4-NEXT:    store volatile double 1.000000e+00, double* [[TMP14]], align 4, !llvm.access.group !5
784 // CHECK4-NEXT:    store i32 3, i32* [[SVAR6]], align 4, !llvm.access.group !5
785 // CHECK4-NEXT:    store float 4.000000e+00, float* [[SFVAR7]], align 4, !llvm.access.group !5
786 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
787 // CHECK4-NEXT:    store double* [[G3]], double** [[TMP15]], align 4, !llvm.access.group !5
788 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
789 // CHECK4-NEXT:    [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5
790 // CHECK4-NEXT:    store double* [[TMP17]], double** [[TMP16]], align 4, !llvm.access.group !5
791 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
792 // CHECK4-NEXT:    store i32* [[SVAR6]], i32** [[TMP18]], align 4, !llvm.access.group !5
793 // CHECK4-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
794 // CHECK4-NEXT:    store float* [[SFVAR7]], float** [[TMP19]], align 4, !llvm.access.group !5
795 // CHECK4-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5
796 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
797 // CHECK4:       omp.body.continue:
798 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
799 // CHECK4:       omp.inner.for.inc:
800 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
801 // CHECK4-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
802 // CHECK4-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
803 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
804 // CHECK4:       omp.inner.for.end:
805 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
806 // CHECK4:       omp.loop.exit:
807 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
808 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
809 // CHECK4-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
810 // CHECK4-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
811 // CHECK4:       .omp.final.then:
812 // CHECK4-NEXT:    store i32 2, i32* [[I]], align 4
813 // CHECK4-NEXT:    br label [[DOTOMP_FINAL_DONE]]
814 // CHECK4:       .omp.final.done:
815 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
816 // CHECK4-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
817 // CHECK4-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
818 // CHECK4:       .omp.lastprivate.then:
819 // CHECK4-NEXT:    [[TMP25:%.*]] = load double, double* [[G3]], align 8
820 // CHECK4-NEXT:    store volatile double [[TMP25]], double* [[TMP0]], align 8
821 // CHECK4-NEXT:    [[TMP26:%.*]] = load double*, double** [[_TMP5]], align 4
822 // CHECK4-NEXT:    [[TMP27:%.*]] = load double, double* [[TMP26]], align 4
823 // CHECK4-NEXT:    store volatile double [[TMP27]], double* [[TMP5]], align 4
824 // CHECK4-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SVAR6]], align 4
825 // CHECK4-NEXT:    store i32 [[TMP28]], i32* [[TMP2]], align 4
826 // CHECK4-NEXT:    [[TMP29:%.*]] = load float, float* [[SFVAR7]], align 4
827 // CHECK4-NEXT:    store float [[TMP29]], float* [[TMP3]], align 4
828 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
829 // CHECK4:       .omp.lastprivate.done:
830 // CHECK4-NEXT:    ret void
831 //
832 //
833 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
834 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
835 // CHECK4-NEXT:  entry:
836 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
837 // CHECK4-NEXT:    ret void
838 //
839 //
840 // CHECK5-LABEL: define {{[^@]+}}@main
841 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
842 // CHECK5-NEXT:  entry:
843 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
844 // CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8
845 // CHECK5-NEXT:    [[G1:%.*]] = alloca double*, align 8
846 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
847 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
848 // CHECK5-NEXT:    store double* [[G]], double** [[G1]], align 8
849 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
850 // CHECK5-NEXT:    store double* [[G]], double** [[TMP0]], align 8
851 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
852 // CHECK5-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
853 // CHECK5-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
854 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
855 // CHECK5-NEXT:    ret i32 0
856 //
857 //
858 // CHECK6-LABEL: define {{[^@]+}}@main
859 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
860 // CHECK6-NEXT:  entry:
861 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
862 // CHECK6-NEXT:    [[G:%.*]] = alloca double, align 8
863 // CHECK6-NEXT:    [[G1:%.*]] = alloca double*, align 8
864 // CHECK6-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
865 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
866 // CHECK6-NEXT:    store double* [[G]], double** [[G1]], align 8
867 // CHECK6-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
868 // CHECK6-NEXT:    store double* [[G]], double** [[TMP0]], align 8
869 // CHECK6-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
870 // CHECK6-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 8
871 // CHECK6-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 8
872 // CHECK6-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
873 // CHECK6-NEXT:    ret i32 0
874 //
875 //
876 // CHECK7-LABEL: define {{[^@]+}}@main
877 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
878 // CHECK7-NEXT:  entry:
879 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
880 // CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8
881 // CHECK7-NEXT:    [[G1:%.*]] = alloca double*, align 4
882 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
883 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
884 // CHECK7-NEXT:    store double* [[G]], double** [[G1]], align 4
885 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
886 // CHECK7-NEXT:    store double* [[G]], double** [[TMP0]], align 4
887 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
888 // CHECK7-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
889 // CHECK7-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
890 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
891 // CHECK7-NEXT:    ret i32 0
892 //
893 //
894 // CHECK8-LABEL: define {{[^@]+}}@main
895 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
896 // CHECK8-NEXT:  entry:
897 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
898 // CHECK8-NEXT:    [[G:%.*]] = alloca double, align 8
899 // CHECK8-NEXT:    [[G1:%.*]] = alloca double*, align 4
900 // CHECK8-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
901 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
902 // CHECK8-NEXT:    store double* [[G]], double** [[G1]], align 4
903 // CHECK8-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
904 // CHECK8-NEXT:    store double* [[G]], double** [[TMP0]], align 4
905 // CHECK8-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
906 // CHECK8-NEXT:    [[TMP2:%.*]] = load double*, double** [[G1]], align 4
907 // CHECK8-NEXT:    store double* [[TMP2]], double** [[TMP1]], align 4
908 // CHECK8-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
909 // CHECK8-NEXT:    ret i32 0
910 //
911 //
912 // CHECK9-LABEL: define {{[^@]+}}@main
913 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
914 // CHECK9-NEXT:  entry:
915 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
916 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
917 // CHECK9-NEXT:    [[G1:%.*]] = alloca double*, align 8
918 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
919 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
920 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
921 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
922 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
923 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
924 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
925 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
926 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
927 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
928 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
929 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
930 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
931 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
932 // CHECK9-NEXT:    store double* [[G]], double** [[G1]], align 8
933 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
934 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
935 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
936 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
937 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
938 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
939 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
940 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
941 // CHECK9-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
942 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
943 // CHECK9-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
944 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
945 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
946 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
947 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
948 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
949 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
950 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
951 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[CONV1]], align 4
952 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
953 // CHECK9-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
954 // CHECK9-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
955 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
956 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
957 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
958 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
959 // CHECK9-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
960 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
961 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
962 // CHECK9-NEXT:    store i8* null, i8** [[TMP13]], align 8
963 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
964 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
965 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
966 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
967 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
968 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
969 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
970 // CHECK9-NEXT:    store i8* null, i8** [[TMP18]], align 8
971 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
972 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
973 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
974 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
975 // CHECK9-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
976 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
977 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
978 // CHECK9-NEXT:    store i8* null, i8** [[TMP23]], align 8
979 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
980 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
981 // CHECK9-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
982 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
983 // CHECK9-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
984 // CHECK9-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
985 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
986 // CHECK9-NEXT:    store i8* null, i8** [[TMP28]], align 8
987 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
988 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
989 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP30]], align 8
990 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
991 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
992 // CHECK9-NEXT:    store i64 [[TMP6]], i64* [[TMP32]], align 8
993 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
994 // CHECK9-NEXT:    store i8* null, i8** [[TMP33]], align 8
995 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
996 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
997 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
998 // CHECK9-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
999 // CHECK9-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1000 // CHECK9-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1001 // CHECK9:       omp_offload.failed:
1002 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1003 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1004 // CHECK9:       omp_offload.cont:
1005 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
1006 // CHECK9-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
1007 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1008 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1009 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1010 // CHECK9:       arraydestroy.body:
1011 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1012 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1013 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1014 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1015 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1016 // CHECK9:       arraydestroy.done3:
1017 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1018 // CHECK9-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1019 // CHECK9-NEXT:    ret i32 [[TMP39]]
1020 //
1021 //
1022 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1023 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1024 // CHECK9-NEXT:  entry:
1025 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1026 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1027 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1028 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1029 // CHECK9-NEXT:    ret void
1030 //
1031 //
1032 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1033 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1034 // CHECK9-NEXT:  entry:
1035 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1036 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1037 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1038 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1039 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1040 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1041 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1042 // CHECK9-NEXT:    ret void
1043 //
1044 //
1045 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1046 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1047 // CHECK9-NEXT:  entry:
1048 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1049 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1050 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1051 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1052 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
1053 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1054 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1055 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1056 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1057 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1058 // CHECK9-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1059 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1060 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1061 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1062 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1063 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1064 // CHECK9-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1065 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1066 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1067 // CHECK9-NEXT:    ret void
1068 //
1069 //
1070 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1071 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1072 // CHECK9-NEXT:  entry:
1073 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1074 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1075 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1076 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1077 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1078 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1079 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1080 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1081 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
1082 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1083 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1084 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1085 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1086 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1087 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1088 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1089 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1090 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1091 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1092 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 8
1093 // CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
1094 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1095 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1096 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1097 // CHECK9-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1098 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1099 // CHECK9-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1100 // CHECK9-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1101 // CHECK9-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1102 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1103 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1104 // CHECK9-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1105 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1106 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1107 // CHECK9-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1108 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1109 // CHECK9-NEXT:    store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1110 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1111 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1112 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1113 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1114 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1115 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1116 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1117 // CHECK9:       arrayctor.loop:
1118 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1119 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1120 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1121 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1122 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1123 // CHECK9:       arrayctor.cont:
1124 // CHECK9-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1125 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1126 // CHECK9-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1127 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1128 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1129 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1130 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1131 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1132 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1133 // CHECK9:       cond.true:
1134 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1135 // CHECK9:       cond.false:
1136 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1137 // CHECK9-NEXT:    br label [[COND_END]]
1138 // CHECK9:       cond.end:
1139 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1140 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1141 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1142 // CHECK9-NEXT:    store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1143 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1144 // CHECK9:       omp.inner.for.cond:
1145 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1146 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
1147 // CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1148 // CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1149 // CHECK9:       omp.inner.for.cond.cleanup:
1150 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1151 // CHECK9:       omp.inner.for.body:
1152 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1153 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1154 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1155 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
1156 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5
1157 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1158 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1159 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1160 // CHECK9-NEXT:    store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
1161 // CHECK9-NEXT:    [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5
1162 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1163 // CHECK9-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64
1164 // CHECK9-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1165 // CHECK9-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1166 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
1167 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false), !llvm.access.group !5
1168 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1169 // CHECK9:       omp.body.continue:
1170 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1171 // CHECK9:       omp.inner.for.inc:
1172 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1173 // CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
1174 // CHECK9-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1175 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1176 // CHECK9:       omp.inner.for.end:
1177 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1178 // CHECK9:       omp.loop.exit:
1179 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1180 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1181 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1182 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1183 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1184 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1185 // CHECK9:       .omp.final.then:
1186 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
1187 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1188 // CHECK9:       .omp.final.done:
1189 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1190 // CHECK9-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1191 // CHECK9-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1192 // CHECK9:       .omp.lastprivate.then:
1193 // CHECK9-NEXT:    [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
1194 // CHECK9-NEXT:    store i32 [[TMP28]], i32* [[TMP0]], align 4
1195 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1196 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1197 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 8, i1 false)
1198 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1199 // CHECK9-NEXT:    [[TMP31:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1200 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
1201 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP32]]
1202 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1203 // CHECK9:       omp.arraycpy.body:
1204 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1205 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1206 // CHECK9-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1207 // CHECK9-NEXT:    [[TMP34:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1208 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
1209 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1210 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1211 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP32]]
1212 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1213 // CHECK9:       omp.arraycpy.done14:
1214 // CHECK9-NEXT:    [[TMP35:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1215 // CHECK9-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
1216 // CHECK9-NEXT:    [[TMP37:%.*]] = bitcast %struct.S* [[TMP35]] to i8*
1217 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP36]], i8* align 4 [[TMP37]], i64 4, i1 false)
1218 // CHECK9-NEXT:    [[TMP38:%.*]] = load i32, i32* [[SVAR8]], align 4
1219 // CHECK9-NEXT:    store i32 [[TMP38]], i32* [[TMP4]], align 4
1220 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1221 // CHECK9:       .omp.lastprivate.done:
1222 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1223 // CHECK9-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1224 // CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1225 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1226 // CHECK9:       arraydestroy.body:
1227 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1228 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1229 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1230 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1231 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1232 // CHECK9:       arraydestroy.done16:
1233 // CHECK9-NEXT:    ret void
1234 //
1235 //
1236 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1237 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1238 // CHECK9-NEXT:  entry:
1239 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1240 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1241 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1242 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1243 // CHECK9-NEXT:    ret void
1244 //
1245 //
1246 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1247 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1248 // CHECK9-NEXT:  entry:
1249 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1250 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1251 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1252 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1253 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1254 // CHECK9-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
1255 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1256 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1257 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1258 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1259 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1260 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1261 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1262 // CHECK9-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1263 // CHECK9-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1264 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1265 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1266 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1267 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1268 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1269 // CHECK9-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1270 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1271 // CHECK9-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1272 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1273 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1274 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1275 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1276 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1277 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1278 // CHECK9-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1279 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1280 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1281 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP8]], align 8
1282 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1283 // CHECK9-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1284 // CHECK9-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
1285 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1286 // CHECK9-NEXT:    store i8* null, i8** [[TMP11]], align 8
1287 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1288 // CHECK9-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1289 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1290 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1291 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1292 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1293 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1294 // CHECK9-NEXT:    store i8* null, i8** [[TMP16]], align 8
1295 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1296 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1297 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1298 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1299 // CHECK9-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1300 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1301 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1302 // CHECK9-NEXT:    store i8* null, i8** [[TMP21]], align 8
1303 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1304 // CHECK9-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1305 // CHECK9-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1306 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1307 // CHECK9-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1308 // CHECK9-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1309 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1310 // CHECK9-NEXT:    store i8* null, i8** [[TMP26]], align 8
1311 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1312 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1313 // CHECK9-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1314 // CHECK9-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1315 // CHECK9-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1316 // CHECK9-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1317 // CHECK9:       omp_offload.failed:
1318 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1319 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1320 // CHECK9:       omp_offload.cont:
1321 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1322 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1323 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1324 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1325 // CHECK9:       arraydestroy.body:
1326 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1327 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1328 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1329 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1330 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1331 // CHECK9:       arraydestroy.done2:
1332 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1333 // CHECK9-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1334 // CHECK9-NEXT:    ret i32 [[TMP32]]
1335 //
1336 //
1337 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1338 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1339 // CHECK9-NEXT:  entry:
1340 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1341 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1342 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1343 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1344 // CHECK9-NEXT:    store float 0.000000e+00, float* [[F]], align 4
1345 // CHECK9-NEXT:    ret void
1346 //
1347 //
1348 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1349 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1350 // CHECK9-NEXT:  entry:
1351 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1352 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1353 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1354 // CHECK9-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1355 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1356 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1357 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1358 // CHECK9-NEXT:    store float [[TMP0]], float* [[F]], align 4
1359 // CHECK9-NEXT:    ret void
1360 //
1361 //
1362 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1363 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1364 // CHECK9-NEXT:  entry:
1365 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1366 // CHECK9-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1367 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1368 // CHECK9-NEXT:    ret void
1369 //
1370 //
1371 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1372 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1373 // CHECK9-NEXT:  entry:
1374 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1375 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1376 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1377 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1378 // CHECK9-NEXT:    ret void
1379 //
1380 //
1381 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1382 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1383 // CHECK9-NEXT:  entry:
1384 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1385 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1386 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1387 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1388 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1389 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1390 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1391 // CHECK9-NEXT:    ret void
1392 //
1393 //
1394 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1395 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1396 // CHECK9-NEXT:  entry:
1397 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1398 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1399 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1400 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1401 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1402 // CHECK9-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1403 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1404 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1405 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1406 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1407 // CHECK9-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1408 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1409 // CHECK9-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1410 // CHECK9-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1411 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1412 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1413 // CHECK9-NEXT:    ret void
1414 //
1415 //
1416 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1417 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1418 // CHECK9-NEXT:  entry:
1419 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1420 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1421 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1422 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1423 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1424 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1425 // CHECK9-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1426 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1427 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1428 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1429 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1430 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1431 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1432 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1433 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1434 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1435 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1436 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1437 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
1438 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1439 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1440 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1441 // CHECK9-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1442 // CHECK9-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1443 // CHECK9-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1444 // CHECK9-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1445 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1446 // CHECK9-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1447 // CHECK9-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1448 // CHECK9-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1449 // CHECK9-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1450 // CHECK9-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1451 // CHECK9-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1452 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1453 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1454 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1455 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1456 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1457 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1458 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1459 // CHECK9:       arrayctor.loop:
1460 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1461 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1462 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1463 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1464 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1465 // CHECK9:       arrayctor.cont:
1466 // CHECK9-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1467 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1468 // CHECK9-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
1469 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1470 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1471 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1472 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1473 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1474 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1475 // CHECK9:       cond.true:
1476 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1477 // CHECK9:       cond.false:
1478 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1479 // CHECK9-NEXT:    br label [[COND_END]]
1480 // CHECK9:       cond.end:
1481 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1482 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1483 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1484 // CHECK9-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1485 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1486 // CHECK9:       omp.inner.for.cond:
1487 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1488 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
1489 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1490 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1491 // CHECK9:       omp.inner.for.cond.cleanup:
1492 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1493 // CHECK9:       omp.inner.for.body:
1494 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1495 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1496 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1497 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
1498 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !11
1499 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
1500 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1501 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1502 // CHECK9-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
1503 // CHECK9-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8, !llvm.access.group !11
1504 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
1505 // CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1506 // CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1507 // CHECK9-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
1508 // CHECK9-NEXT:    [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
1509 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !11
1510 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1511 // CHECK9:       omp.body.continue:
1512 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1513 // CHECK9:       omp.inner.for.inc:
1514 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1515 // CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
1516 // CHECK9-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1517 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1518 // CHECK9:       omp.inner.for.end:
1519 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1520 // CHECK9:       omp.loop.exit:
1521 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1522 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1523 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1524 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1525 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1526 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1527 // CHECK9:       .omp.final.then:
1528 // CHECK9-NEXT:    store i32 2, i32* [[I]], align 4
1529 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1530 // CHECK9:       .omp.final.done:
1531 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1532 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1533 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1534 // CHECK9:       .omp.lastprivate.then:
1535 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
1536 // CHECK9-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
1537 // CHECK9-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1538 // CHECK9-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1539 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1540 // CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1541 // CHECK9-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
1542 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
1543 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP31]]
1544 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1545 // CHECK9:       omp.arraycpy.body:
1546 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1547 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1548 // CHECK9-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1549 // CHECK9-NEXT:    [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1550 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1551 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1552 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1553 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1554 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1555 // CHECK9:       omp.arraycpy.done13:
1556 // CHECK9-NEXT:    [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
1557 // CHECK9-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
1558 // CHECK9-NEXT:    [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
1559 // CHECK9-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1560 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1561 // CHECK9:       .omp.lastprivate.done:
1562 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1563 // CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1564 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
1565 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1566 // CHECK9:       arraydestroy.body:
1567 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1568 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1569 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1570 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1571 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1572 // CHECK9:       arraydestroy.done15:
1573 // CHECK9-NEXT:    ret void
1574 //
1575 //
1576 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1577 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1578 // CHECK9-NEXT:  entry:
1579 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1580 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1581 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1582 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1583 // CHECK9-NEXT:    ret void
1584 //
1585 //
1586 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1587 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1588 // CHECK9-NEXT:  entry:
1589 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1590 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1591 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1592 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1593 // CHECK9-NEXT:    store i32 0, i32* [[F]], align 4
1594 // CHECK9-NEXT:    ret void
1595 //
1596 //
1597 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1598 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1599 // CHECK9-NEXT:  entry:
1600 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1601 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1602 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1603 // CHECK9-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1604 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1605 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1606 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1607 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1608 // CHECK9-NEXT:    ret void
1609 //
1610 //
1611 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1612 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1613 // CHECK9-NEXT:  entry:
1614 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1615 // CHECK9-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1616 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1617 // CHECK9-NEXT:    ret void
1618 //
1619 //
1620 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1621 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1622 // CHECK9-NEXT:  entry:
1623 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1624 // CHECK9-NEXT:    ret void
1625 //
1626 //
1627 // CHECK10-LABEL: define {{[^@]+}}@main
1628 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1629 // CHECK10-NEXT:  entry:
1630 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1631 // CHECK10-NEXT:    [[G:%.*]] = alloca double, align 8
1632 // CHECK10-NEXT:    [[G1:%.*]] = alloca double*, align 8
1633 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1634 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1635 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1636 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1637 // CHECK10-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
1638 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1639 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1640 // CHECK10-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
1641 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1642 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1643 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1644 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1645 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1646 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1647 // CHECK10-NEXT:    store double* [[G]], double** [[G1]], align 8
1648 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1649 // CHECK10-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1650 // CHECK10-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1651 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1652 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1653 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1654 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1655 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1656 // CHECK10-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1657 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1658 // CHECK10-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1659 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1660 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1661 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1662 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1663 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1664 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1665 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1666 // CHECK10-NEXT:    store i32 [[TMP5]], i32* [[CONV1]], align 4
1667 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1668 // CHECK10-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1669 // CHECK10-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1670 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1671 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1672 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
1673 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1674 // CHECK10-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1675 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
1676 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1677 // CHECK10-NEXT:    store i8* null, i8** [[TMP13]], align 8
1678 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1679 // CHECK10-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1680 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1681 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1682 // CHECK10-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1683 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1684 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1685 // CHECK10-NEXT:    store i8* null, i8** [[TMP18]], align 8
1686 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1687 // CHECK10-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1688 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1689 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1690 // CHECK10-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1691 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1692 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1693 // CHECK10-NEXT:    store i8* null, i8** [[TMP23]], align 8
1694 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1695 // CHECK10-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1696 // CHECK10-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1697 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1698 // CHECK10-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1699 // CHECK10-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1700 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1701 // CHECK10-NEXT:    store i8* null, i8** [[TMP28]], align 8
1702 // CHECK10-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1703 // CHECK10-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1704 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP30]], align 8
1705 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1706 // CHECK10-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1707 // CHECK10-NEXT:    store i64 [[TMP6]], i64* [[TMP32]], align 8
1708 // CHECK10-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1709 // CHECK10-NEXT:    store i8* null, i8** [[TMP33]], align 8
1710 // CHECK10-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1711 // CHECK10-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1712 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
1713 // CHECK10-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1714 // CHECK10-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1715 // CHECK10-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1716 // CHECK10:       omp_offload.failed:
1717 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1718 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1719 // CHECK10:       omp_offload.cont:
1720 // CHECK10-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
1721 // CHECK10-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
1722 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1723 // CHECK10-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1724 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1725 // CHECK10:       arraydestroy.body:
1726 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1727 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1728 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1729 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1730 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1731 // CHECK10:       arraydestroy.done3:
1732 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1733 // CHECK10-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1734 // CHECK10-NEXT:    ret i32 [[TMP39]]
1735 //
1736 //
1737 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1738 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1739 // CHECK10-NEXT:  entry:
1740 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1741 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1742 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1743 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1744 // CHECK10-NEXT:    ret void
1745 //
1746 //
1747 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1748 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1749 // CHECK10-NEXT:  entry:
1750 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1751 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1752 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1753 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1754 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1755 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1756 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1757 // CHECK10-NEXT:    ret void
1758 //
1759 //
1760 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1761 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1762 // CHECK10-NEXT:  entry:
1763 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1764 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1765 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1766 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1767 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
1768 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1769 // CHECK10-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1770 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1771 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1772 // CHECK10-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1773 // CHECK10-NEXT:    store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1774 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1775 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1776 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1777 // CHECK10-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1778 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1779 // CHECK10-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1780 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1781 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1782 // CHECK10-NEXT:    ret void
1783 //
1784 //
1785 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1786 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1787 // CHECK10-NEXT:  entry:
1788 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1789 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1790 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1791 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1792 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1793 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1794 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1795 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
1796 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
1797 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1798 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1799 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1800 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1801 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1802 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1803 // CHECK10-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1804 // CHECK10-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1805 // CHECK10-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1806 // CHECK10-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1807 // CHECK10-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 8
1808 // CHECK10-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
1809 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1810 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1811 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1812 // CHECK10-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1813 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1814 // CHECK10-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1815 // CHECK10-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1816 // CHECK10-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1817 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1818 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1819 // CHECK10-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1820 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1821 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1822 // CHECK10-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1823 // CHECK10-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1824 // CHECK10-NEXT:    store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1825 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1826 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1827 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1828 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1829 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1830 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1831 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1832 // CHECK10:       arrayctor.loop:
1833 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1834 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1835 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1836 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1837 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1838 // CHECK10:       arrayctor.cont:
1839 // CHECK10-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1840 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1841 // CHECK10-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1842 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1843 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1844 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1845 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1846 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1847 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1848 // CHECK10:       cond.true:
1849 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1850 // CHECK10:       cond.false:
1851 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1852 // CHECK10-NEXT:    br label [[COND_END]]
1853 // CHECK10:       cond.end:
1854 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1855 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1856 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1857 // CHECK10-NEXT:    store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1858 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1859 // CHECK10:       omp.inner.for.cond:
1860 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1861 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
1862 // CHECK10-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1863 // CHECK10-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1864 // CHECK10:       omp.inner.for.cond.cleanup:
1865 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1866 // CHECK10:       omp.inner.for.body:
1867 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1868 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1869 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1870 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
1871 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5
1872 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1873 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1874 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1875 // CHECK10-NEXT:    store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
1876 // CHECK10-NEXT:    [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5
1877 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
1878 // CHECK10-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64
1879 // CHECK10-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1880 // CHECK10-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1881 // CHECK10-NEXT:    [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
1882 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false), !llvm.access.group !5
1883 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1884 // CHECK10:       omp.body.continue:
1885 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1886 // CHECK10:       omp.inner.for.inc:
1887 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1888 // CHECK10-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
1889 // CHECK10-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1890 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1891 // CHECK10:       omp.inner.for.end:
1892 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1893 // CHECK10:       omp.loop.exit:
1894 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1895 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1896 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1897 // CHECK10-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1898 // CHECK10-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1899 // CHECK10-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1900 // CHECK10:       .omp.final.then:
1901 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
1902 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1903 // CHECK10:       .omp.final.done:
1904 // CHECK10-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1905 // CHECK10-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1906 // CHECK10-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1907 // CHECK10:       .omp.lastprivate.then:
1908 // CHECK10-NEXT:    [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
1909 // CHECK10-NEXT:    store i32 [[TMP28]], i32* [[TMP0]], align 4
1910 // CHECK10-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1911 // CHECK10-NEXT:    [[TMP30:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1912 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 8, i1 false)
1913 // CHECK10-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1914 // CHECK10-NEXT:    [[TMP31:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1915 // CHECK10-NEXT:    [[TMP32:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
1916 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP32]]
1917 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1918 // CHECK10:       omp.arraycpy.body:
1919 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1920 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1921 // CHECK10-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1922 // CHECK10-NEXT:    [[TMP34:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1923 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
1924 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1925 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1926 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP32]]
1927 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1928 // CHECK10:       omp.arraycpy.done14:
1929 // CHECK10-NEXT:    [[TMP35:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1930 // CHECK10-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
1931 // CHECK10-NEXT:    [[TMP37:%.*]] = bitcast %struct.S* [[TMP35]] to i8*
1932 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP36]], i8* align 4 [[TMP37]], i64 4, i1 false)
1933 // CHECK10-NEXT:    [[TMP38:%.*]] = load i32, i32* [[SVAR8]], align 4
1934 // CHECK10-NEXT:    store i32 [[TMP38]], i32* [[TMP4]], align 4
1935 // CHECK10-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1936 // CHECK10:       .omp.lastprivate.done:
1937 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1938 // CHECK10-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1939 // CHECK10-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1940 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1941 // CHECK10:       arraydestroy.body:
1942 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1943 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1944 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1945 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1946 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1947 // CHECK10:       arraydestroy.done16:
1948 // CHECK10-NEXT:    ret void
1949 //
1950 //
1951 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1952 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1953 // CHECK10-NEXT:  entry:
1954 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1955 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1956 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1957 // CHECK10-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1958 // CHECK10-NEXT:    ret void
1959 //
1960 //
1961 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1962 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
1963 // CHECK10-NEXT:  entry:
1964 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1965 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1966 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1967 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1968 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1969 // CHECK10-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
1970 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1971 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1972 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1973 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1974 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1975 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1976 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1977 // CHECK10-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1978 // CHECK10-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1979 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1980 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1981 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1982 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1983 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1984 // CHECK10-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1985 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1986 // CHECK10-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1987 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1988 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1989 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
1990 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1991 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1992 // CHECK10-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1993 // CHECK10-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1994 // CHECK10-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1995 // CHECK10-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1996 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP8]], align 8
1997 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1998 // CHECK10-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1999 // CHECK10-NEXT:    store i64 [[TMP3]], i64* [[TMP10]], align 8
2000 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2001 // CHECK10-NEXT:    store i8* null, i8** [[TMP11]], align 8
2002 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2003 // CHECK10-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2004 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
2005 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2006 // CHECK10-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2007 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
2008 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2009 // CHECK10-NEXT:    store i8* null, i8** [[TMP16]], align 8
2010 // CHECK10-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2011 // CHECK10-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2012 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
2013 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2014 // CHECK10-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2015 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
2016 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2017 // CHECK10-NEXT:    store i8* null, i8** [[TMP21]], align 8
2018 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2019 // CHECK10-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2020 // CHECK10-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
2021 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2022 // CHECK10-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2023 // CHECK10-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
2024 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2025 // CHECK10-NEXT:    store i8* null, i8** [[TMP26]], align 8
2026 // CHECK10-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2027 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2028 // CHECK10-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2029 // CHECK10-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2030 // CHECK10-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2031 // CHECK10-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2032 // CHECK10:       omp_offload.failed:
2033 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2034 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2035 // CHECK10:       omp_offload.cont:
2036 // CHECK10-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2037 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2038 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2039 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2040 // CHECK10:       arraydestroy.body:
2041 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2042 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2043 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2044 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2045 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2046 // CHECK10:       arraydestroy.done2:
2047 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2048 // CHECK10-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2049 // CHECK10-NEXT:    ret i32 [[TMP32]]
2050 //
2051 //
2052 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2053 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2054 // CHECK10-NEXT:  entry:
2055 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2056 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2057 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2058 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2059 // CHECK10-NEXT:    store float 0.000000e+00, float* [[F]], align 4
2060 // CHECK10-NEXT:    ret void
2061 //
2062 //
2063 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2064 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2065 // CHECK10-NEXT:  entry:
2066 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2067 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2068 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2069 // CHECK10-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2070 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2071 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2072 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2073 // CHECK10-NEXT:    store float [[TMP0]], float* [[F]], align 4
2074 // CHECK10-NEXT:    ret void
2075 //
2076 //
2077 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2078 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2079 // CHECK10-NEXT:  entry:
2080 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2081 // CHECK10-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2082 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2083 // CHECK10-NEXT:    ret void
2084 //
2085 //
2086 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2087 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2088 // CHECK10-NEXT:  entry:
2089 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2090 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2091 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2092 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2093 // CHECK10-NEXT:    ret void
2094 //
2095 //
2096 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2097 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2098 // CHECK10-NEXT:  entry:
2099 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2100 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2101 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2102 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2103 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2104 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2105 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
2106 // CHECK10-NEXT:    ret void
2107 //
2108 //
2109 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2110 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2111 // CHECK10-NEXT:  entry:
2112 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2113 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2114 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2115 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2116 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
2117 // CHECK10-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2118 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2119 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2120 // CHECK10-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2121 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2122 // CHECK10-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2123 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2124 // CHECK10-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2125 // CHECK10-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2126 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2127 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2128 // CHECK10-NEXT:    ret void
2129 //
2130 //
2131 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2132 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2133 // CHECK10-NEXT:  entry:
2134 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2135 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2136 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2137 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2138 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2139 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2140 // CHECK10-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
2141 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2142 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2143 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2144 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2145 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2146 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2147 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2148 // CHECK10-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2149 // CHECK10-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2150 // CHECK10-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2151 // CHECK10-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2152 // CHECK10-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
2153 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2154 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2155 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2156 // CHECK10-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2157 // CHECK10-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2158 // CHECK10-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2159 // CHECK10-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2160 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2161 // CHECK10-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2162 // CHECK10-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2163 // CHECK10-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2164 // CHECK10-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2165 // CHECK10-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2166 // CHECK10-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2167 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2168 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2169 // CHECK10-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2170 // CHECK10-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2171 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2172 // CHECK10-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2173 // CHECK10-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2174 // CHECK10:       arrayctor.loop:
2175 // CHECK10-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2176 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2177 // CHECK10-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2178 // CHECK10-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2179 // CHECK10-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2180 // CHECK10:       arrayctor.cont:
2181 // CHECK10-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2182 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2183 // CHECK10-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
2184 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2185 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2186 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2187 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2188 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2189 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2190 // CHECK10:       cond.true:
2191 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2192 // CHECK10:       cond.false:
2193 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2194 // CHECK10-NEXT:    br label [[COND_END]]
2195 // CHECK10:       cond.end:
2196 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2197 // CHECK10-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2198 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2199 // CHECK10-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2200 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2201 // CHECK10:       omp.inner.for.cond:
2202 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2203 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2204 // CHECK10-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2205 // CHECK10-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2206 // CHECK10:       omp.inner.for.cond.cleanup:
2207 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2208 // CHECK10:       omp.inner.for.body:
2209 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2210 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2211 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2212 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2213 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !11
2214 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2215 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2216 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2217 // CHECK10-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2218 // CHECK10-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8, !llvm.access.group !11
2219 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2220 // CHECK10-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
2221 // CHECK10-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
2222 // CHECK10-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
2223 // CHECK10-NEXT:    [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
2224 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !11
2225 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2226 // CHECK10:       omp.body.continue:
2227 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2228 // CHECK10:       omp.inner.for.inc:
2229 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2230 // CHECK10-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
2231 // CHECK10-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2232 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2233 // CHECK10:       omp.inner.for.end:
2234 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2235 // CHECK10:       omp.loop.exit:
2236 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2237 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2238 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2239 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2240 // CHECK10-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2241 // CHECK10-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2242 // CHECK10:       .omp.final.then:
2243 // CHECK10-NEXT:    store i32 2, i32* [[I]], align 4
2244 // CHECK10-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2245 // CHECK10:       .omp.final.done:
2246 // CHECK10-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2247 // CHECK10-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2248 // CHECK10-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2249 // CHECK10:       .omp.lastprivate.then:
2250 // CHECK10-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
2251 // CHECK10-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
2252 // CHECK10-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2253 // CHECK10-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2254 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
2255 // CHECK10-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2256 // CHECK10-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2257 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
2258 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP31]]
2259 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2260 // CHECK10:       omp.arraycpy.body:
2261 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2262 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2263 // CHECK10-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2264 // CHECK10-NEXT:    [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2265 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
2266 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2267 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2268 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2269 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2270 // CHECK10:       omp.arraycpy.done13:
2271 // CHECK10-NEXT:    [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2272 // CHECK10-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2273 // CHECK10-NEXT:    [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
2274 // CHECK10-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
2275 // CHECK10-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2276 // CHECK10:       .omp.lastprivate.done:
2277 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2278 // CHECK10-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2279 // CHECK10-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
2280 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2281 // CHECK10:       arraydestroy.body:
2282 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2283 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2284 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2285 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2286 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2287 // CHECK10:       arraydestroy.done15:
2288 // CHECK10-NEXT:    ret void
2289 //
2290 //
2291 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2292 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2293 // CHECK10-NEXT:  entry:
2294 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2295 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2296 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2297 // CHECK10-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2298 // CHECK10-NEXT:    ret void
2299 //
2300 //
2301 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2302 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2303 // CHECK10-NEXT:  entry:
2304 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2305 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2306 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2307 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2308 // CHECK10-NEXT:    store i32 0, i32* [[F]], align 4
2309 // CHECK10-NEXT:    ret void
2310 //
2311 //
2312 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2313 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2314 // CHECK10-NEXT:  entry:
2315 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2316 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2317 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2318 // CHECK10-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2319 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2320 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2321 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2322 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2323 // CHECK10-NEXT:    ret void
2324 //
2325 //
2326 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2327 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2328 // CHECK10-NEXT:  entry:
2329 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2330 // CHECK10-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2331 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2332 // CHECK10-NEXT:    ret void
2333 //
2334 //
2335 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2336 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2337 // CHECK10-NEXT:  entry:
2338 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
2339 // CHECK10-NEXT:    ret void
2340 //
2341 //
2342 // CHECK11-LABEL: define {{[^@]+}}@main
2343 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2344 // CHECK11-NEXT:  entry:
2345 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2346 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
2347 // CHECK11-NEXT:    [[G1:%.*]] = alloca double*, align 4
2348 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2349 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2350 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2351 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2352 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
2353 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2354 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2355 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
2356 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2357 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2358 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2359 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2360 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2361 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2362 // CHECK11-NEXT:    store double* [[G]], double** [[G1]], align 4
2363 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
2364 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
2365 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2366 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2367 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2368 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2369 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2370 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2371 // CHECK11-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2372 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2373 // CHECK11-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2374 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2375 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2376 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2377 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2378 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2379 // CHECK11-NEXT:    store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2380 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2381 // CHECK11-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2382 // CHECK11-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2383 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2384 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2385 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
2386 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2387 // CHECK11-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2388 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
2389 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2390 // CHECK11-NEXT:    store i8* null, i8** [[TMP13]], align 4
2391 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2392 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2393 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2394 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2395 // CHECK11-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2396 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2397 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2398 // CHECK11-NEXT:    store i8* null, i8** [[TMP18]], align 4
2399 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2400 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2401 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2402 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2403 // CHECK11-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2404 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2405 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2406 // CHECK11-NEXT:    store i8* null, i8** [[TMP23]], align 4
2407 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2408 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2409 // CHECK11-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2410 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2411 // CHECK11-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2412 // CHECK11-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2413 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2414 // CHECK11-NEXT:    store i8* null, i8** [[TMP28]], align 4
2415 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2416 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2417 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP30]], align 4
2418 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2419 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2420 // CHECK11-NEXT:    store i32 [[TMP6]], i32* [[TMP32]], align 4
2421 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2422 // CHECK11-NEXT:    store i8* null, i8** [[TMP33]], align 4
2423 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2424 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2425 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2426 // CHECK11-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2427 // CHECK11-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2428 // CHECK11-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2429 // CHECK11:       omp_offload.failed:
2430 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2431 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2432 // CHECK11:       omp_offload.cont:
2433 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
2434 // CHECK11-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
2435 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2436 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2437 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2438 // CHECK11:       arraydestroy.body:
2439 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2440 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2441 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2442 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2443 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2444 // CHECK11:       arraydestroy.done2:
2445 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2446 // CHECK11-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2447 // CHECK11-NEXT:    ret i32 [[TMP39]]
2448 //
2449 //
2450 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2451 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2452 // CHECK11-NEXT:  entry:
2453 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2454 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2455 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2456 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2457 // CHECK11-NEXT:    ret void
2458 //
2459 //
2460 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2461 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2462 // CHECK11-NEXT:  entry:
2463 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2464 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2465 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2466 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2467 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2468 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2469 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2470 // CHECK11-NEXT:    ret void
2471 //
2472 //
2473 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2474 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2475 // CHECK11-NEXT:  entry:
2476 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2477 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2478 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2479 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2480 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
2481 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2482 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2483 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2484 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2485 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2486 // CHECK11-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2487 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2488 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2489 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2490 // CHECK11-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2491 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2492 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
2493 // CHECK11-NEXT:    ret void
2494 //
2495 //
2496 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2497 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2498 // CHECK11-NEXT:  entry:
2499 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2500 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2501 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2502 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2503 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2504 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2505 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
2506 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
2507 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
2508 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2509 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2510 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2511 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2512 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2513 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2514 // CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2515 // CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2516 // CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2517 // CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2518 // CHECK11-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 4
2519 // CHECK11-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
2520 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2521 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2522 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2523 // CHECK11-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2524 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2525 // CHECK11-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2526 // CHECK11-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2527 // CHECK11-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
2528 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2529 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2530 // CHECK11-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2531 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2532 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
2533 // CHECK11-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
2534 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2535 // CHECK11-NEXT:    store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
2536 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2537 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2538 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2539 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2540 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2541 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2542 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2543 // CHECK11:       arrayctor.loop:
2544 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2545 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2546 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2547 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2548 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2549 // CHECK11:       arrayctor.cont:
2550 // CHECK11-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
2551 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2552 // CHECK11-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
2553 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2554 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2555 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2556 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2557 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2558 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2559 // CHECK11:       cond.true:
2560 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2561 // CHECK11:       cond.false:
2562 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2563 // CHECK11-NEXT:    br label [[COND_END]]
2564 // CHECK11:       cond.end:
2565 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2566 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2567 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2568 // CHECK11-NEXT:    store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2569 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2570 // CHECK11:       omp.inner.for.cond:
2571 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2572 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2573 // CHECK11-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2574 // CHECK11-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2575 // CHECK11:       omp.inner.for.cond.cleanup:
2576 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2577 // CHECK11:       omp.inner.for.body:
2578 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2579 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2580 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2581 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2582 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6
2583 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2584 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP16]]
2585 // CHECK11-NEXT:    store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
2586 // CHECK11-NEXT:    [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4, !llvm.access.group !6
2587 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2588 // CHECK11-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP18]]
2589 // CHECK11-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
2590 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
2591 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false), !llvm.access.group !6
2592 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2593 // CHECK11:       omp.body.continue:
2594 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2595 // CHECK11:       omp.inner.for.inc:
2596 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2597 // CHECK11-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
2598 // CHECK11-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2599 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2600 // CHECK11:       omp.inner.for.end:
2601 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2602 // CHECK11:       omp.loop.exit:
2603 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2604 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2605 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
2606 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2607 // CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2608 // CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2609 // CHECK11:       .omp.final.then:
2610 // CHECK11-NEXT:    store i32 2, i32* [[I]], align 4
2611 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2612 // CHECK11:       .omp.final.done:
2613 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2614 // CHECK11-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
2615 // CHECK11-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2616 // CHECK11:       .omp.lastprivate.then:
2617 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
2618 // CHECK11-NEXT:    store i32 [[TMP28]], i32* [[TMP0]], align 4
2619 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2620 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2621 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 8, i1 false)
2622 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2623 // CHECK11-NEXT:    [[TMP31:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
2624 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
2625 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP32]]
2626 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2627 // CHECK11:       omp.arraycpy.body:
2628 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2629 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2630 // CHECK11-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2631 // CHECK11-NEXT:    [[TMP34:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2632 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false)
2633 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2634 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2635 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP32]]
2636 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2637 // CHECK11:       omp.arraycpy.done13:
2638 // CHECK11-NEXT:    [[TMP35:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
2639 // CHECK11-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
2640 // CHECK11-NEXT:    [[TMP37:%.*]] = bitcast %struct.S* [[TMP35]] to i8*
2641 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 [[TMP37]], i32 4, i1 false)
2642 // CHECK11-NEXT:    [[TMP38:%.*]] = load i32, i32* [[SVAR8]], align 4
2643 // CHECK11-NEXT:    store i32 [[TMP38]], i32* [[TMP4]], align 4
2644 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2645 // CHECK11:       .omp.lastprivate.done:
2646 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2647 // CHECK11-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2648 // CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2
2649 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2650 // CHECK11:       arraydestroy.body:
2651 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2652 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2653 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2654 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2655 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2656 // CHECK11:       arraydestroy.done15:
2657 // CHECK11-NEXT:    ret void
2658 //
2659 //
2660 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2661 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2662 // CHECK11-NEXT:  entry:
2663 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2664 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2665 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2666 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2667 // CHECK11-NEXT:    ret void
2668 //
2669 //
2670 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2671 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2672 // CHECK11-NEXT:  entry:
2673 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2674 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2675 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2676 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2677 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2678 // CHECK11-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
2679 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2680 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2681 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2682 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2683 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2684 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2685 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
2686 // CHECK11-NEXT:    store i32 0, i32* [[T_VAR]], align 4
2687 // CHECK11-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2688 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2689 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2690 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2691 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2692 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2693 // CHECK11-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2694 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2695 // CHECK11-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2696 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2697 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2698 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2699 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2700 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2701 // CHECK11-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2702 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2703 // CHECK11-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2704 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP8]], align 4
2705 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2706 // CHECK11-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2707 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
2708 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2709 // CHECK11-NEXT:    store i8* null, i8** [[TMP11]], align 4
2710 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2711 // CHECK11-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2712 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
2713 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2714 // CHECK11-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2715 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2716 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2717 // CHECK11-NEXT:    store i8* null, i8** [[TMP16]], align 4
2718 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2719 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2720 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2721 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2722 // CHECK11-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2723 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
2724 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2725 // CHECK11-NEXT:    store i8* null, i8** [[TMP21]], align 4
2726 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2727 // CHECK11-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2728 // CHECK11-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
2729 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2730 // CHECK11-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2731 // CHECK11-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
2732 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2733 // CHECK11-NEXT:    store i8* null, i8** [[TMP26]], align 4
2734 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2735 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2736 // CHECK11-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2737 // CHECK11-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2738 // CHECK11-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2739 // CHECK11-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2740 // CHECK11:       omp_offload.failed:
2741 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2742 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2743 // CHECK11:       omp_offload.cont:
2744 // CHECK11-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2745 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2746 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2747 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2748 // CHECK11:       arraydestroy.body:
2749 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2750 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2751 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2752 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2753 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2754 // CHECK11:       arraydestroy.done2:
2755 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2756 // CHECK11-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2757 // CHECK11-NEXT:    ret i32 [[TMP32]]
2758 //
2759 //
2760 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2761 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2762 // CHECK11-NEXT:  entry:
2763 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2764 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2765 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2766 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2767 // CHECK11-NEXT:    store float 0.000000e+00, float* [[F]], align 4
2768 // CHECK11-NEXT:    ret void
2769 //
2770 //
2771 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2772 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2773 // CHECK11-NEXT:  entry:
2774 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2775 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2776 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2777 // CHECK11-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2778 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2779 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2780 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2781 // CHECK11-NEXT:    store float [[TMP0]], float* [[F]], align 4
2782 // CHECK11-NEXT:    ret void
2783 //
2784 //
2785 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2786 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2787 // CHECK11-NEXT:  entry:
2788 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2789 // CHECK11-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2790 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2791 // CHECK11-NEXT:    ret void
2792 //
2793 //
2794 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2795 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2796 // CHECK11-NEXT:  entry:
2797 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2798 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2799 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2800 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2801 // CHECK11-NEXT:    ret void
2802 //
2803 //
2804 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2805 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2806 // CHECK11-NEXT:  entry:
2807 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2808 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2809 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2810 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2811 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2812 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2813 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2814 // CHECK11-NEXT:    ret void
2815 //
2816 //
2817 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2818 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2819 // CHECK11-NEXT:  entry:
2820 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2821 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2822 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2823 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2824 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2825 // CHECK11-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2826 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2827 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2828 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2829 // CHECK11-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2830 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2831 // CHECK11-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2832 // CHECK11-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2833 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2834 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2835 // CHECK11-NEXT:    ret void
2836 //
2837 //
2838 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2839 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2840 // CHECK11-NEXT:  entry:
2841 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2842 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2843 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2844 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2845 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2846 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2847 // CHECK11-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
2848 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2849 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2850 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2851 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2852 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2853 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2854 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2855 // CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2856 // CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2857 // CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2858 // CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2859 // CHECK11-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
2860 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2861 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2862 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2863 // CHECK11-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2864 // CHECK11-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2865 // CHECK11-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2866 // CHECK11-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2867 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2868 // CHECK11-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2869 // CHECK11-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2870 // CHECK11-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2871 // CHECK11-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
2872 // CHECK11-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2873 // CHECK11-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
2874 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2875 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2876 // CHECK11-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2877 // CHECK11-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2878 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2879 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2880 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2881 // CHECK11:       arrayctor.loop:
2882 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2883 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2884 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2885 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2886 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2887 // CHECK11:       arrayctor.cont:
2888 // CHECK11-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
2889 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2890 // CHECK11-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
2891 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2892 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2893 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2894 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2895 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2896 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2897 // CHECK11:       cond.true:
2898 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2899 // CHECK11:       cond.false:
2900 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2901 // CHECK11-NEXT:    br label [[COND_END]]
2902 // CHECK11:       cond.end:
2903 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2904 // CHECK11-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2905 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2906 // CHECK11-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2907 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2908 // CHECK11:       omp.inner.for.cond:
2909 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2910 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2911 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2912 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2913 // CHECK11:       omp.inner.for.cond.cleanup:
2914 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2915 // CHECK11:       omp.inner.for.body:
2916 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2917 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2918 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2919 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
2920 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !12
2921 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2922 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP15]]
2923 // CHECK11-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2924 // CHECK11-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4, !llvm.access.group !12
2925 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2926 // CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP17]]
2927 // CHECK11-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
2928 // CHECK11-NEXT:    [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
2929 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !12
2930 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2931 // CHECK11:       omp.body.continue:
2932 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2933 // CHECK11:       omp.inner.for.inc:
2934 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2935 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2936 // CHECK11-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2937 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2938 // CHECK11:       omp.inner.for.end:
2939 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2940 // CHECK11:       omp.loop.exit:
2941 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2942 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2943 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2944 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2945 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2946 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2947 // CHECK11:       .omp.final.then:
2948 // CHECK11-NEXT:    store i32 2, i32* [[I]], align 4
2949 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2950 // CHECK11:       .omp.final.done:
2951 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2952 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2953 // CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2954 // CHECK11:       .omp.lastprivate.then:
2955 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
2956 // CHECK11-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
2957 // CHECK11-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2958 // CHECK11-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2959 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
2960 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2961 // CHECK11-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2962 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
2963 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP31]]
2964 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2965 // CHECK11:       omp.arraycpy.body:
2966 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2967 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2968 // CHECK11-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2969 // CHECK11-NEXT:    [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2970 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
2971 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2972 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2973 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2974 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2975 // CHECK11:       omp.arraycpy.done12:
2976 // CHECK11-NEXT:    [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
2977 // CHECK11-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2978 // CHECK11-NEXT:    [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
2979 // CHECK11-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
2980 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2981 // CHECK11:       .omp.lastprivate.done:
2982 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2983 // CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2984 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
2985 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2986 // CHECK11:       arraydestroy.body:
2987 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2988 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2989 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2990 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2991 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2992 // CHECK11:       arraydestroy.done14:
2993 // CHECK11-NEXT:    ret void
2994 //
2995 //
2996 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2997 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2998 // CHECK11-NEXT:  entry:
2999 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3000 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3001 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3002 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3003 // CHECK11-NEXT:    ret void
3004 //
3005 //
3006 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3007 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3008 // CHECK11-NEXT:  entry:
3009 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3010 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3011 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3012 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3013 // CHECK11-NEXT:    store i32 0, i32* [[F]], align 4
3014 // CHECK11-NEXT:    ret void
3015 //
3016 //
3017 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3018 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3019 // CHECK11-NEXT:  entry:
3020 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3021 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3022 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3023 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3024 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3025 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3026 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3027 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
3028 // CHECK11-NEXT:    ret void
3029 //
3030 //
3031 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3032 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3033 // CHECK11-NEXT:  entry:
3034 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3035 // CHECK11-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3036 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3037 // CHECK11-NEXT:    ret void
3038 //
3039 //
3040 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3041 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
3042 // CHECK11-NEXT:  entry:
3043 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
3044 // CHECK11-NEXT:    ret void
3045 //
3046 //
3047 // CHECK12-LABEL: define {{[^@]+}}@main
3048 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
3049 // CHECK12-NEXT:  entry:
3050 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3051 // CHECK12-NEXT:    [[G:%.*]] = alloca double, align 8
3052 // CHECK12-NEXT:    [[G1:%.*]] = alloca double*, align 4
3053 // CHECK12-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3054 // CHECK12-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3055 // CHECK12-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3056 // CHECK12-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3057 // CHECK12-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
3058 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3059 // CHECK12-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3060 // CHECK12-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
3061 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
3062 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
3063 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
3064 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3065 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3066 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3067 // CHECK12-NEXT:    store double* [[G]], double** [[G1]], align 4
3068 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3069 // CHECK12-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3070 // CHECK12-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3071 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
3072 // CHECK12-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3073 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3074 // CHECK12-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
3075 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3076 // CHECK12-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
3077 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3078 // CHECK12-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
3079 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3080 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3081 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3082 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3083 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
3084 // CHECK12-NEXT:    store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
3085 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
3086 // CHECK12-NEXT:    [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3087 // CHECK12-NEXT:    [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3088 // CHECK12-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3089 // CHECK12-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3090 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
3091 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3092 // CHECK12-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3093 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
3094 // CHECK12-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3095 // CHECK12-NEXT:    store i8* null, i8** [[TMP13]], align 4
3096 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3097 // CHECK12-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3098 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3099 // CHECK12-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3100 // CHECK12-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
3101 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
3102 // CHECK12-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3103 // CHECK12-NEXT:    store i8* null, i8** [[TMP18]], align 4
3104 // CHECK12-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3105 // CHECK12-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
3106 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
3107 // CHECK12-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3108 // CHECK12-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
3109 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
3110 // CHECK12-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3111 // CHECK12-NEXT:    store i8* null, i8** [[TMP23]], align 4
3112 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3113 // CHECK12-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
3114 // CHECK12-NEXT:    store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
3115 // CHECK12-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3116 // CHECK12-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
3117 // CHECK12-NEXT:    store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
3118 // CHECK12-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3119 // CHECK12-NEXT:    store i8* null, i8** [[TMP28]], align 4
3120 // CHECK12-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3121 // CHECK12-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
3122 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[TMP30]], align 4
3123 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3124 // CHECK12-NEXT:    [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
3125 // CHECK12-NEXT:    store i32 [[TMP6]], i32* [[TMP32]], align 4
3126 // CHECK12-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
3127 // CHECK12-NEXT:    store i8* null, i8** [[TMP33]], align 4
3128 // CHECK12-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3129 // CHECK12-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3130 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
3131 // CHECK12-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3132 // CHECK12-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
3133 // CHECK12-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3134 // CHECK12:       omp_offload.failed:
3135 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
3136 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3137 // CHECK12:       omp_offload.cont:
3138 // CHECK12-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
3139 // CHECK12-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
3140 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3141 // CHECK12-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3142 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3143 // CHECK12:       arraydestroy.body:
3144 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3145 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3146 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3147 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3148 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3149 // CHECK12:       arraydestroy.done2:
3150 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3151 // CHECK12-NEXT:    [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3152 // CHECK12-NEXT:    ret i32 [[TMP39]]
3153 //
3154 //
3155 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3156 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3157 // CHECK12-NEXT:  entry:
3158 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3159 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3160 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3161 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3162 // CHECK12-NEXT:    ret void
3163 //
3164 //
3165 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3166 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3167 // CHECK12-NEXT:  entry:
3168 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3169 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3170 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3171 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3172 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3173 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3174 // CHECK12-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3175 // CHECK12-NEXT:    ret void
3176 //
3177 //
3178 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
3179 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
3180 // CHECK12-NEXT:  entry:
3181 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3182 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3183 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3184 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3185 // CHECK12-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
3186 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3187 // CHECK12-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3188 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3189 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3190 // CHECK12-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3191 // CHECK12-NEXT:    store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3192 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3193 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3194 // CHECK12-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3195 // CHECK12-NEXT:    store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3196 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3197 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
3198 // CHECK12-NEXT:    ret void
3199 //
3200 //
3201 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3202 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3203 // CHECK12-NEXT:  entry:
3204 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3205 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3206 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3207 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3208 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3209 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3210 // CHECK12-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3211 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
3212 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
3213 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3214 // CHECK12-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3215 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3216 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3217 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3218 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3219 // CHECK12-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3220 // CHECK12-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3221 // CHECK12-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3222 // CHECK12-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3223 // CHECK12-NEXT:    [[_TMP7:%.*]] = alloca %struct.S*, align 4
3224 // CHECK12-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
3225 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3226 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3227 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3228 // CHECK12-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3229 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3230 // CHECK12-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3231 // CHECK12-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3232 // CHECK12-NEXT:    store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3233 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3234 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3235 // CHECK12-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3236 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3237 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3238 // CHECK12-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3239 // CHECK12-NEXT:    [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3240 // CHECK12-NEXT:    store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
3241 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3242 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3243 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3244 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3245 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3246 // CHECK12-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3247 // CHECK12-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3248 // CHECK12:       arrayctor.loop:
3249 // CHECK12-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3250 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3251 // CHECK12-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3252 // CHECK12-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3253 // CHECK12-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3254 // CHECK12:       arrayctor.cont:
3255 // CHECK12-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
3256 // CHECK12-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3257 // CHECK12-NEXT:    store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
3258 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3259 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3260 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3261 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3262 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
3263 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3264 // CHECK12:       cond.true:
3265 // CHECK12-NEXT:    br label [[COND_END:%.*]]
3266 // CHECK12:       cond.false:
3267 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3268 // CHECK12-NEXT:    br label [[COND_END]]
3269 // CHECK12:       cond.end:
3270 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3271 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3272 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3273 // CHECK12-NEXT:    store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3274 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3275 // CHECK12:       omp.inner.for.cond:
3276 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3277 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3278 // CHECK12-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3279 // CHECK12-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3280 // CHECK12:       omp.inner.for.cond.cleanup:
3281 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3282 // CHECK12:       omp.inner.for.body:
3283 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3284 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3285 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3286 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
3287 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6
3288 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3289 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP16]]
3290 // CHECK12-NEXT:    store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
3291 // CHECK12-NEXT:    [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4, !llvm.access.group !6
3292 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3293 // CHECK12-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP18]]
3294 // CHECK12-NEXT:    [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
3295 // CHECK12-NEXT:    [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
3296 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false), !llvm.access.group !6
3297 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3298 // CHECK12:       omp.body.continue:
3299 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3300 // CHECK12:       omp.inner.for.inc:
3301 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3302 // CHECK12-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
3303 // CHECK12-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3304 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3305 // CHECK12:       omp.inner.for.end:
3306 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3307 // CHECK12:       omp.loop.exit:
3308 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3309 // CHECK12-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
3310 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
3311 // CHECK12-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3312 // CHECK12-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3313 // CHECK12-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3314 // CHECK12:       .omp.final.then:
3315 // CHECK12-NEXT:    store i32 2, i32* [[I]], align 4
3316 // CHECK12-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3317 // CHECK12:       .omp.final.done:
3318 // CHECK12-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3319 // CHECK12-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
3320 // CHECK12-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3321 // CHECK12:       .omp.lastprivate.then:
3322 // CHECK12-NEXT:    [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
3323 // CHECK12-NEXT:    store i32 [[TMP28]], i32* [[TMP0]], align 4
3324 // CHECK12-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3325 // CHECK12-NEXT:    [[TMP30:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3326 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 8, i1 false)
3327 // CHECK12-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
3328 // CHECK12-NEXT:    [[TMP31:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
3329 // CHECK12-NEXT:    [[TMP32:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
3330 // CHECK12-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP32]]
3331 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3332 // CHECK12:       omp.arraycpy.body:
3333 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3334 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3335 // CHECK12-NEXT:    [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3336 // CHECK12-NEXT:    [[TMP34:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3337 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false)
3338 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3339 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3340 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP32]]
3341 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
3342 // CHECK12:       omp.arraycpy.done13:
3343 // CHECK12-NEXT:    [[TMP35:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
3344 // CHECK12-NEXT:    [[TMP36:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3345 // CHECK12-NEXT:    [[TMP37:%.*]] = bitcast %struct.S* [[TMP35]] to i8*
3346 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 [[TMP37]], i32 4, i1 false)
3347 // CHECK12-NEXT:    [[TMP38:%.*]] = load i32, i32* [[SVAR8]], align 4
3348 // CHECK12-NEXT:    store i32 [[TMP38]], i32* [[TMP4]], align 4
3349 // CHECK12-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3350 // CHECK12:       .omp.lastprivate.done:
3351 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3352 // CHECK12-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3353 // CHECK12-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2
3354 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3355 // CHECK12:       arraydestroy.body:
3356 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3357 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3358 // CHECK12-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3359 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
3360 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
3361 // CHECK12:       arraydestroy.done15:
3362 // CHECK12-NEXT:    ret void
3363 //
3364 //
3365 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3366 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3367 // CHECK12-NEXT:  entry:
3368 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3369 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3370 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3371 // CHECK12-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3372 // CHECK12-NEXT:    ret void
3373 //
3374 //
3375 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3376 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
3377 // CHECK12-NEXT:  entry:
3378 // CHECK12-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3379 // CHECK12-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3380 // CHECK12-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3381 // CHECK12-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3382 // CHECK12-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3383 // CHECK12-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
3384 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3385 // CHECK12-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3386 // CHECK12-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3387 // CHECK12-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3388 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3389 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3390 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3391 // CHECK12-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3392 // CHECK12-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3393 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3394 // CHECK12-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3395 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
3396 // CHECK12-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3397 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3398 // CHECK12-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3399 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3400 // CHECK12-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3401 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3402 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3403 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3404 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3405 // CHECK12-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3406 // CHECK12-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3407 // CHECK12-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3408 // CHECK12-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3409 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP8]], align 4
3410 // CHECK12-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3411 // CHECK12-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3412 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[TMP10]], align 4
3413 // CHECK12-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3414 // CHECK12-NEXT:    store i8* null, i8** [[TMP11]], align 4
3415 // CHECK12-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3416 // CHECK12-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3417 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3418 // CHECK12-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3419 // CHECK12-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3420 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3421 // CHECK12-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3422 // CHECK12-NEXT:    store i8* null, i8** [[TMP16]], align 4
3423 // CHECK12-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3424 // CHECK12-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3425 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3426 // CHECK12-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3427 // CHECK12-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3428 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3429 // CHECK12-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3430 // CHECK12-NEXT:    store i8* null, i8** [[TMP21]], align 4
3431 // CHECK12-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3432 // CHECK12-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3433 // CHECK12-NEXT:    store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3434 // CHECK12-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3435 // CHECK12-NEXT:    [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3436 // CHECK12-NEXT:    store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3437 // CHECK12-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3438 // CHECK12-NEXT:    store i8* null, i8** [[TMP26]], align 4
3439 // CHECK12-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3440 // CHECK12-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3441 // CHECK12-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
3442 // CHECK12-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3443 // CHECK12-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3444 // CHECK12-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3445 // CHECK12:       omp_offload.failed:
3446 // CHECK12-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3447 // CHECK12-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3448 // CHECK12:       omp_offload.cont:
3449 // CHECK12-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3450 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3451 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3452 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3453 // CHECK12:       arraydestroy.body:
3454 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3455 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3456 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3457 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3458 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3459 // CHECK12:       arraydestroy.done2:
3460 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3461 // CHECK12-NEXT:    [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3462 // CHECK12-NEXT:    ret i32 [[TMP32]]
3463 //
3464 //
3465 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3466 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3467 // CHECK12-NEXT:  entry:
3468 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3469 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3470 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3471 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3472 // CHECK12-NEXT:    store float 0.000000e+00, float* [[F]], align 4
3473 // CHECK12-NEXT:    ret void
3474 //
3475 //
3476 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3477 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3478 // CHECK12-NEXT:  entry:
3479 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3480 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3481 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3482 // CHECK12-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3483 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3484 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3485 // CHECK12-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3486 // CHECK12-NEXT:    store float [[TMP0]], float* [[F]], align 4
3487 // CHECK12-NEXT:    ret void
3488 //
3489 //
3490 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3491 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3492 // CHECK12-NEXT:  entry:
3493 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3494 // CHECK12-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3495 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3496 // CHECK12-NEXT:    ret void
3497 //
3498 //
3499 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3500 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3501 // CHECK12-NEXT:  entry:
3502 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3503 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3504 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3505 // CHECK12-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3506 // CHECK12-NEXT:    ret void
3507 //
3508 //
3509 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3510 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3511 // CHECK12-NEXT:  entry:
3512 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3513 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3514 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3515 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3516 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3517 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3518 // CHECK12-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
3519 // CHECK12-NEXT:    ret void
3520 //
3521 //
3522 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3523 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3524 // CHECK12-NEXT:  entry:
3525 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3526 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3527 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3528 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3529 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3530 // CHECK12-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3531 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3532 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3533 // CHECK12-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3534 // CHECK12-NEXT:    [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3535 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3536 // CHECK12-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3537 // CHECK12-NEXT:    store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3538 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3539 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3540 // CHECK12-NEXT:    ret void
3541 //
3542 //
3543 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3544 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3545 // CHECK12-NEXT:  entry:
3546 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3547 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3548 // CHECK12-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3549 // CHECK12-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3550 // CHECK12-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3551 // CHECK12-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3552 // CHECK12-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
3553 // CHECK12-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3554 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3555 // CHECK12-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3556 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3557 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3558 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3559 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3560 // CHECK12-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3561 // CHECK12-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3562 // CHECK12-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3563 // CHECK12-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3564 // CHECK12-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
3565 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
3566 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3567 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3568 // CHECK12-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3569 // CHECK12-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3570 // CHECK12-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3571 // CHECK12-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3572 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3573 // CHECK12-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3574 // CHECK12-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3575 // CHECK12-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3576 // CHECK12-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3577 // CHECK12-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3578 // CHECK12-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
3579 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3580 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3581 // CHECK12-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3582 // CHECK12-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3583 // CHECK12-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3584 // CHECK12-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3585 // CHECK12-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3586 // CHECK12:       arrayctor.loop:
3587 // CHECK12-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3588 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3589 // CHECK12-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3590 // CHECK12-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3591 // CHECK12-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3592 // CHECK12:       arrayctor.cont:
3593 // CHECK12-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
3594 // CHECK12-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3595 // CHECK12-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
3596 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3597 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3598 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3599 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3600 // CHECK12-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3601 // CHECK12-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3602 // CHECK12:       cond.true:
3603 // CHECK12-NEXT:    br label [[COND_END:%.*]]
3604 // CHECK12:       cond.false:
3605 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3606 // CHECK12-NEXT:    br label [[COND_END]]
3607 // CHECK12:       cond.end:
3608 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
3609 // CHECK12-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3610 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3611 // CHECK12-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
3612 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3613 // CHECK12:       omp.inner.for.cond:
3614 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3615 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
3616 // CHECK12-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3617 // CHECK12-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3618 // CHECK12:       omp.inner.for.cond.cleanup:
3619 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3620 // CHECK12:       omp.inner.for.body:
3621 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3622 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
3623 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3624 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
3625 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !12
3626 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3627 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP15]]
3628 // CHECK12-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
3629 // CHECK12-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4, !llvm.access.group !12
3630 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3631 // CHECK12-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP17]]
3632 // CHECK12-NEXT:    [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
3633 // CHECK12-NEXT:    [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
3634 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !12
3635 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3636 // CHECK12:       omp.body.continue:
3637 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3638 // CHECK12:       omp.inner.for.inc:
3639 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3640 // CHECK12-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
3641 // CHECK12-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3642 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3643 // CHECK12:       omp.inner.for.end:
3644 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3645 // CHECK12:       omp.loop.exit:
3646 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3647 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
3648 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
3649 // CHECK12-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3650 // CHECK12-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3651 // CHECK12-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3652 // CHECK12:       .omp.final.then:
3653 // CHECK12-NEXT:    store i32 2, i32* [[I]], align 4
3654 // CHECK12-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3655 // CHECK12:       .omp.final.done:
3656 // CHECK12-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3657 // CHECK12-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3658 // CHECK12-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3659 // CHECK12:       .omp.lastprivate.then:
3660 // CHECK12-NEXT:    [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
3661 // CHECK12-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
3662 // CHECK12-NEXT:    [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3663 // CHECK12-NEXT:    [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3664 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
3665 // CHECK12-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
3666 // CHECK12-NEXT:    [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
3667 // CHECK12-NEXT:    [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
3668 // CHECK12-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP31]]
3669 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3670 // CHECK12:       omp.arraycpy.body:
3671 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3672 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3673 // CHECK12-NEXT:    [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3674 // CHECK12-NEXT:    [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3675 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
3676 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3677 // CHECK12-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3678 // CHECK12-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
3679 // CHECK12-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3680 // CHECK12:       omp.arraycpy.done12:
3681 // CHECK12-NEXT:    [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
3682 // CHECK12-NEXT:    [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
3683 // CHECK12-NEXT:    [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
3684 // CHECK12-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
3685 // CHECK12-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3686 // CHECK12:       .omp.lastprivate.done:
3687 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3688 // CHECK12-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3689 // CHECK12-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
3690 // CHECK12-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3691 // CHECK12:       arraydestroy.body:
3692 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3693 // CHECK12-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3694 // CHECK12-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3695 // CHECK12-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3696 // CHECK12-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3697 // CHECK12:       arraydestroy.done14:
3698 // CHECK12-NEXT:    ret void
3699 //
3700 //
3701 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3702 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3703 // CHECK12-NEXT:  entry:
3704 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3705 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3706 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3707 // CHECK12-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3708 // CHECK12-NEXT:    ret void
3709 //
3710 //
3711 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3712 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3713 // CHECK12-NEXT:  entry:
3714 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3715 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3716 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3717 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3718 // CHECK12-NEXT:    store i32 0, i32* [[F]], align 4
3719 // CHECK12-NEXT:    ret void
3720 //
3721 //
3722 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3723 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3724 // CHECK12-NEXT:  entry:
3725 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3726 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3727 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3728 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3729 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3730 // CHECK12-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3731 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3732 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
3733 // CHECK12-NEXT:    ret void
3734 //
3735 //
3736 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3737 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3738 // CHECK12-NEXT:  entry:
3739 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3740 // CHECK12-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3741 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3742 // CHECK12-NEXT:    ret void
3743 //
3744 //
3745 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3746 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
3747 // CHECK12-NEXT:  entry:
3748 // CHECK12-NEXT:    call void @__tgt_register_requires(i64 1)
3749 // CHECK12-NEXT:    ret void
3750 //
3751 //
3752 // CHECK13-LABEL: define {{[^@]+}}@main
3753 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
3754 // CHECK13-NEXT:  entry:
3755 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3756 // CHECK13-NEXT:    [[G:%.*]] = alloca double, align 8
3757 // CHECK13-NEXT:    [[G1:%.*]] = alloca double*, align 8
3758 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3759 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3760 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3761 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3762 // CHECK13-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
3763 // CHECK13-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
3764 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
3765 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca %struct.S*, align 8
3766 // CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
3767 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3768 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3769 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3770 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3771 // CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
3772 // CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
3773 // CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
3774 // CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
3775 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca %struct.S*, align 8
3776 // CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
3777 // CHECK13-NEXT:    [[I16:%.*]] = alloca i32, align 4
3778 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3779 // CHECK13-NEXT:    store double* [[G]], double** [[G1]], align 8
3780 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3781 // CHECK13-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3782 // CHECK13-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3783 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
3784 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
3785 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3786 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
3787 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3788 // CHECK13-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
3789 // CHECK13-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3790 // CHECK13-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
3791 // CHECK13-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3792 // CHECK13-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
3793 // CHECK13-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8
3794 // CHECK13-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
3795 // CHECK13-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8
3796 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3797 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3798 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3799 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3800 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
3801 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
3802 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3803 // CHECK13:       arrayctor.loop:
3804 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3805 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3806 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
3807 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3808 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3809 // CHECK13:       arrayctor.cont:
3810 // CHECK13-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8
3811 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
3812 // CHECK13-NEXT:    store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
3813 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3814 // CHECK13:       omp.inner.for.cond:
3815 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3816 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3817 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3818 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3819 // CHECK13:       omp.inner.for.cond.cleanup:
3820 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3821 // CHECK13:       omp.inner.for.body:
3822 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3823 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3824 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3825 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
3826 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !2
3827 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3828 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3829 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
3830 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3831 // CHECK13-NEXT:    [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !2
3832 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3833 // CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP13]] to i64
3834 // CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
3835 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
3836 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
3837 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !2
3838 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3839 // CHECK13:       omp.body.continue:
3840 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3841 // CHECK13:       omp.inner.for.inc:
3842 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3843 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1
3844 // CHECK13-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3845 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3846 // CHECK13:       omp.inner.for.end:
3847 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
3848 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
3849 // CHECK13-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
3850 // CHECK13-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3851 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
3852 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
3853 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3854 // CHECK13-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR6]] to %struct.S*
3855 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
3856 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP21]]
3857 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3858 // CHECK13:       omp.arraycpy.body:
3859 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3860 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3861 // CHECK13-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3862 // CHECK13-NEXT:    [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3863 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
3864 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3865 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3866 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
3867 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
3868 // CHECK13:       omp.arraycpy.done13:
3869 // CHECK13-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
3870 // CHECK13-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3871 // CHECK13-NEXT:    [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
3872 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
3873 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
3874 // CHECK13-NEXT:    store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
3875 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
3876 // CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
3877 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
3878 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3879 // CHECK13:       arraydestroy.body:
3880 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3881 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3882 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3883 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
3884 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
3885 // CHECK13:       arraydestroy.done15:
3886 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
3887 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
3888 // CHECK13-NEXT:    [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3889 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2
3890 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY18:%.*]]
3891 // CHECK13:       arraydestroy.body18:
3892 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]
3893 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1
3894 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]]
3895 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]
3896 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]
3897 // CHECK13:       arraydestroy.done22:
3898 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3899 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
3900 // CHECK13-NEXT:    ret i32 [[TMP30]]
3901 //
3902 //
3903 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3904 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3905 // CHECK13-NEXT:  entry:
3906 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3907 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3908 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3909 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3910 // CHECK13-NEXT:    ret void
3911 //
3912 //
3913 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3914 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3915 // CHECK13-NEXT:  entry:
3916 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3917 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3918 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3919 // CHECK13-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
3920 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3921 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3922 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3923 // CHECK13-NEXT:    ret void
3924 //
3925 //
3926 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3927 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3928 // CHECK13-NEXT:  entry:
3929 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3930 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3931 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3932 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3933 // CHECK13-NEXT:    ret void
3934 //
3935 //
3936 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3937 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
3938 // CHECK13-NEXT:  entry:
3939 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3940 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3941 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3942 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3943 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3944 // CHECK13-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
3945 // CHECK13-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
3946 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
3947 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
3948 // CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
3949 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3950 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3951 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3952 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3953 // CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
3954 // CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
3955 // CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
3956 // CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
3957 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
3958 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3959 // CHECK13-NEXT:    store i32 0, i32* [[T_VAR]], align 4
3960 // CHECK13-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3961 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
3962 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
3963 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
3964 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
3965 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
3966 // CHECK13-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
3967 // CHECK13-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3968 // CHECK13-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
3969 // CHECK13-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3970 // CHECK13-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
3971 // CHECK13-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8
3972 // CHECK13-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
3973 // CHECK13-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8
3974 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3975 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3976 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3977 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3978 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
3979 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3980 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3981 // CHECK13:       arrayctor.loop:
3982 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3983 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3984 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
3985 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3986 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3987 // CHECK13:       arrayctor.cont:
3988 // CHECK13-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8
3989 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
3990 // CHECK13-NEXT:    store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
3991 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3992 // CHECK13:       omp.inner.for.cond:
3993 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3994 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3995 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3996 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3997 // CHECK13:       omp.inner.for.cond.cleanup:
3998 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3999 // CHECK13:       omp.inner.for.body:
4000 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4001 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4002 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4003 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4004 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !6
4005 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4006 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4007 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
4008 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
4009 // CHECK13-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !6
4010 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4011 // CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP13]] to i64
4012 // CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
4013 // CHECK13-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
4014 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
4015 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !6
4016 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4017 // CHECK13:       omp.body.continue:
4018 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4019 // CHECK13:       omp.inner.for.inc:
4020 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4021 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1
4022 // CHECK13-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4023 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4024 // CHECK13:       omp.inner.for.end:
4025 // CHECK13-NEXT:    store i32 2, i32* [[I]], align 4
4026 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
4027 // CHECK13-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
4028 // CHECK13-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4029 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
4030 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
4031 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4032 // CHECK13-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR6]] to %struct.S.0*
4033 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
4034 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP21]]
4035 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4036 // CHECK13:       omp.arraycpy.body:
4037 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4038 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4039 // CHECK13-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4040 // CHECK13-NEXT:    [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4041 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
4042 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4043 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4044 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
4045 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
4046 // CHECK13:       omp.arraycpy.done13:
4047 // CHECK13-NEXT:    [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
4048 // CHECK13-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
4049 // CHECK13-NEXT:    [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
4050 // CHECK13-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
4051 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
4052 // CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
4053 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
4054 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4055 // CHECK13:       arraydestroy.body:
4056 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4057 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4058 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4059 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
4060 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
4061 // CHECK13:       arraydestroy.done15:
4062 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4063 // CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4064 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
4065 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
4066 // CHECK13:       arraydestroy.body17:
4067 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
4068 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
4069 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
4070 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
4071 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
4072 // CHECK13:       arraydestroy.done21:
4073 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4074 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
4075 // CHECK13-NEXT:    ret i32 [[TMP29]]
4076 //
4077 //
4078 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4079 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4080 // CHECK13-NEXT:  entry:
4081 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4082 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4083 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4084 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4085 // CHECK13-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4086 // CHECK13-NEXT:    ret void
4087 //
4088 //
4089 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4090 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4091 // CHECK13-NEXT:  entry:
4092 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4093 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4094 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4095 // CHECK13-NEXT:    ret void
4096 //
4097 //
4098 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4099 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4100 // CHECK13-NEXT:  entry:
4101 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4102 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4103 // CHECK13-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4104 // CHECK13-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4105 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4106 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4107 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4108 // CHECK13-NEXT:    store float [[TMP0]], float* [[F]], align 4
4109 // CHECK13-NEXT:    ret void
4110 //
4111 //
4112 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4113 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4114 // CHECK13-NEXT:  entry:
4115 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4116 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4117 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4118 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
4119 // CHECK13-NEXT:    ret void
4120 //
4121 //
4122 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4123 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4124 // CHECK13-NEXT:  entry:
4125 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4126 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4127 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4128 // CHECK13-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4129 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4130 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4131 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
4132 // CHECK13-NEXT:    ret void
4133 //
4134 //
4135 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4136 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4137 // CHECK13-NEXT:  entry:
4138 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4139 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4140 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4141 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4142 // CHECK13-NEXT:    ret void
4143 //
4144 //
4145 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4146 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4147 // CHECK13-NEXT:  entry:
4148 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4149 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4150 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4151 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4152 // CHECK13-NEXT:    store i32 0, i32* [[F]], align 4
4153 // CHECK13-NEXT:    ret void
4154 //
4155 //
4156 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4157 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4158 // CHECK13-NEXT:  entry:
4159 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4160 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4161 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4162 // CHECK13-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4163 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4164 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4165 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4166 // CHECK13-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4167 // CHECK13-NEXT:    ret void
4168 //
4169 //
4170 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4171 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4172 // CHECK13-NEXT:  entry:
4173 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4174 // CHECK13-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4175 // CHECK13-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4176 // CHECK13-NEXT:    ret void
4177 //
4178 //
4179 // CHECK14-LABEL: define {{[^@]+}}@main
4180 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
4181 // CHECK14-NEXT:  entry:
4182 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4183 // CHECK14-NEXT:    [[G:%.*]] = alloca double, align 8
4184 // CHECK14-NEXT:    [[G1:%.*]] = alloca double*, align 8
4185 // CHECK14-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4186 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4187 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4188 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4189 // CHECK14-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
4190 // CHECK14-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 8
4191 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
4192 // CHECK14-NEXT:    [[_TMP2:%.*]] = alloca %struct.S*, align 8
4193 // CHECK14-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
4194 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4195 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4196 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4197 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
4198 // CHECK14-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
4199 // CHECK14-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
4200 // CHECK14-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
4201 // CHECK14-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
4202 // CHECK14-NEXT:    [[_TMP8:%.*]] = alloca %struct.S*, align 8
4203 // CHECK14-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
4204 // CHECK14-NEXT:    [[I16:%.*]] = alloca i32, align 4
4205 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4206 // CHECK14-NEXT:    store double* [[G]], double** [[G1]], align 8
4207 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
4208 // CHECK14-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4209 // CHECK14-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4210 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
4211 // CHECK14-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
4212 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
4213 // CHECK14-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
4214 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
4215 // CHECK14-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
4216 // CHECK14-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
4217 // CHECK14-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
4218 // CHECK14-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
4219 // CHECK14-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
4220 // CHECK14-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8
4221 // CHECK14-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
4222 // CHECK14-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8
4223 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4224 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4225 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4226 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4227 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
4228 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
4229 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4230 // CHECK14:       arrayctor.loop:
4231 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4232 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4233 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
4234 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4235 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4236 // CHECK14:       arrayctor.cont:
4237 // CHECK14-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8
4238 // CHECK14-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
4239 // CHECK14-NEXT:    store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
4240 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4241 // CHECK14:       omp.inner.for.cond:
4242 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4243 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
4244 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4245 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4246 // CHECK14:       omp.inner.for.cond.cleanup:
4247 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4248 // CHECK14:       omp.inner.for.body:
4249 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4250 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4251 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4252 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
4253 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !2
4254 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4255 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4256 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
4257 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
4258 // CHECK14-NEXT:    [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !2
4259 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4260 // CHECK14-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP13]] to i64
4261 // CHECK14-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
4262 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
4263 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
4264 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !2
4265 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4266 // CHECK14:       omp.body.continue:
4267 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4268 // CHECK14:       omp.inner.for.inc:
4269 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4270 // CHECK14-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1
4271 // CHECK14-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4272 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4273 // CHECK14:       omp.inner.for.end:
4274 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
4275 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
4276 // CHECK14-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
4277 // CHECK14-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4278 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
4279 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
4280 // CHECK14-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4281 // CHECK14-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR6]] to %struct.S*
4282 // CHECK14-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
4283 // CHECK14-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP21]]
4284 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4285 // CHECK14:       omp.arraycpy.body:
4286 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4287 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4288 // CHECK14-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4289 // CHECK14-NEXT:    [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4290 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
4291 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4292 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4293 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
4294 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
4295 // CHECK14:       omp.arraycpy.done13:
4296 // CHECK14-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
4297 // CHECK14-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
4298 // CHECK14-NEXT:    [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
4299 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
4300 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
4301 // CHECK14-NEXT:    store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
4302 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
4303 // CHECK14-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
4304 // CHECK14-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
4305 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4306 // CHECK14:       arraydestroy.body:
4307 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4308 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4309 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4310 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
4311 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
4312 // CHECK14:       arraydestroy.done15:
4313 // CHECK14-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
4314 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4315 // CHECK14-NEXT:    [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4316 // CHECK14-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2
4317 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY18:%.*]]
4318 // CHECK14:       arraydestroy.body18:
4319 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]
4320 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1
4321 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]]
4322 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]
4323 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]
4324 // CHECK14:       arraydestroy.done22:
4325 // CHECK14-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4326 // CHECK14-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
4327 // CHECK14-NEXT:    ret i32 [[TMP30]]
4328 //
4329 //
4330 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4331 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4332 // CHECK14-NEXT:  entry:
4333 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4334 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4335 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4336 // CHECK14-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
4337 // CHECK14-NEXT:    ret void
4338 //
4339 //
4340 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4341 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4342 // CHECK14-NEXT:  entry:
4343 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4344 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4345 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4346 // CHECK14-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4347 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4348 // CHECK14-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4349 // CHECK14-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
4350 // CHECK14-NEXT:    ret void
4351 //
4352 //
4353 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4354 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4355 // CHECK14-NEXT:  entry:
4356 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4357 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4358 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4359 // CHECK14-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4360 // CHECK14-NEXT:    ret void
4361 //
4362 //
4363 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4364 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat {
4365 // CHECK14-NEXT:  entry:
4366 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4367 // CHECK14-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4368 // CHECK14-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4369 // CHECK14-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4370 // CHECK14-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4371 // CHECK14-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
4372 // CHECK14-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
4373 // CHECK14-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
4374 // CHECK14-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
4375 // CHECK14-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
4376 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4377 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4378 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4379 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
4380 // CHECK14-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
4381 // CHECK14-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
4382 // CHECK14-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
4383 // CHECK14-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
4384 // CHECK14-NEXT:    [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
4385 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
4386 // CHECK14-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4387 // CHECK14-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4388 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
4389 // CHECK14-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
4390 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
4391 // CHECK14-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
4392 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
4393 // CHECK14-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
4394 // CHECK14-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
4395 // CHECK14-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
4396 // CHECK14-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
4397 // CHECK14-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
4398 // CHECK14-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8
4399 // CHECK14-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
4400 // CHECK14-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8
4401 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4402 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4403 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4404 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4405 // CHECK14-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
4406 // CHECK14-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
4407 // CHECK14-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4408 // CHECK14:       arrayctor.loop:
4409 // CHECK14-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4410 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4411 // CHECK14-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
4412 // CHECK14-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4413 // CHECK14-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4414 // CHECK14:       arrayctor.cont:
4415 // CHECK14-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8
4416 // CHECK14-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
4417 // CHECK14-NEXT:    store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
4418 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4419 // CHECK14:       omp.inner.for.cond:
4420 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4421 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
4422 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4423 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4424 // CHECK14:       omp.inner.for.cond.cleanup:
4425 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4426 // CHECK14:       omp.inner.for.body:
4427 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4428 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4429 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4430 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4431 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !6
4432 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4433 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4434 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
4435 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
4436 // CHECK14-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !6
4437 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4438 // CHECK14-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP13]] to i64
4439 // CHECK14-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
4440 // CHECK14-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
4441 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
4442 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !6
4443 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4444 // CHECK14:       omp.body.continue:
4445 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4446 // CHECK14:       omp.inner.for.inc:
4447 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4448 // CHECK14-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1
4449 // CHECK14-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4450 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4451 // CHECK14:       omp.inner.for.end:
4452 // CHECK14-NEXT:    store i32 2, i32* [[I]], align 4
4453 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
4454 // CHECK14-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
4455 // CHECK14-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4456 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
4457 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
4458 // CHECK14-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4459 // CHECK14-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR6]] to %struct.S.0*
4460 // CHECK14-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
4461 // CHECK14-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP21]]
4462 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4463 // CHECK14:       omp.arraycpy.body:
4464 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4465 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4466 // CHECK14-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4467 // CHECK14-NEXT:    [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4468 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
4469 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4470 // CHECK14-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4471 // CHECK14-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
4472 // CHECK14-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
4473 // CHECK14:       omp.arraycpy.done13:
4474 // CHECK14-NEXT:    [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
4475 // CHECK14-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
4476 // CHECK14-NEXT:    [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
4477 // CHECK14-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
4478 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
4479 // CHECK14-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
4480 // CHECK14-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
4481 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4482 // CHECK14:       arraydestroy.body:
4483 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4484 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4485 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4486 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
4487 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
4488 // CHECK14:       arraydestroy.done15:
4489 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4490 // CHECK14-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4491 // CHECK14-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
4492 // CHECK14-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
4493 // CHECK14:       arraydestroy.body17:
4494 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
4495 // CHECK14-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
4496 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
4497 // CHECK14-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
4498 // CHECK14-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
4499 // CHECK14:       arraydestroy.done21:
4500 // CHECK14-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4501 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
4502 // CHECK14-NEXT:    ret i32 [[TMP29]]
4503 //
4504 //
4505 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4506 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4507 // CHECK14-NEXT:  entry:
4508 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4509 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4510 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4511 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4512 // CHECK14-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4513 // CHECK14-NEXT:    ret void
4514 //
4515 //
4516 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4517 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4518 // CHECK14-NEXT:  entry:
4519 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4520 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4521 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4522 // CHECK14-NEXT:    ret void
4523 //
4524 //
4525 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4526 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4527 // CHECK14-NEXT:  entry:
4528 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4529 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4530 // CHECK14-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4531 // CHECK14-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4532 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4533 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4534 // CHECK14-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4535 // CHECK14-NEXT:    store float [[TMP0]], float* [[F]], align 4
4536 // CHECK14-NEXT:    ret void
4537 //
4538 //
4539 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4540 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4541 // CHECK14-NEXT:  entry:
4542 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4543 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4544 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4545 // CHECK14-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
4546 // CHECK14-NEXT:    ret void
4547 //
4548 //
4549 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4550 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4551 // CHECK14-NEXT:  entry:
4552 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4553 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4554 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4555 // CHECK14-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4556 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4557 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4558 // CHECK14-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
4559 // CHECK14-NEXT:    ret void
4560 //
4561 //
4562 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4563 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4564 // CHECK14-NEXT:  entry:
4565 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4566 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4567 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4568 // CHECK14-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4569 // CHECK14-NEXT:    ret void
4570 //
4571 //
4572 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4573 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4574 // CHECK14-NEXT:  entry:
4575 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4576 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4577 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4578 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4579 // CHECK14-NEXT:    store i32 0, i32* [[F]], align 4
4580 // CHECK14-NEXT:    ret void
4581 //
4582 //
4583 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4584 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4585 // CHECK14-NEXT:  entry:
4586 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4587 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4588 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4589 // CHECK14-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4590 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4591 // CHECK14-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4592 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4593 // CHECK14-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
4594 // CHECK14-NEXT:    ret void
4595 //
4596 //
4597 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4598 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4599 // CHECK14-NEXT:  entry:
4600 // CHECK14-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4601 // CHECK14-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4602 // CHECK14-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4603 // CHECK14-NEXT:    ret void
4604 //
4605 //
4606 // CHECK15-LABEL: define {{[^@]+}}@main
4607 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
4608 // CHECK15-NEXT:  entry:
4609 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4610 // CHECK15-NEXT:    [[G:%.*]] = alloca double, align 8
4611 // CHECK15-NEXT:    [[G1:%.*]] = alloca double*, align 4
4612 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4613 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4614 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4615 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4616 // CHECK15-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
4617 // CHECK15-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
4618 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
4619 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca %struct.S*, align 4
4620 // CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
4621 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4622 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4623 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4624 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
4625 // CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
4626 // CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
4627 // CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
4628 // CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
4629 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca %struct.S*, align 4
4630 // CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
4631 // CHECK15-NEXT:    [[I15:%.*]] = alloca i32, align 4
4632 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4633 // CHECK15-NEXT:    store double* [[G]], double** [[G1]], align 4
4634 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
4635 // CHECK15-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4636 // CHECK15-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4637 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
4638 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4639 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
4640 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
4641 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
4642 // CHECK15-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
4643 // CHECK15-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4644 // CHECK15-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
4645 // CHECK15-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4646 // CHECK15-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4647 // CHECK15-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4
4648 // CHECK15-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
4649 // CHECK15-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4
4650 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4651 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4652 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4653 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4654 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
4655 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4656 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4657 // CHECK15:       arrayctor.loop:
4658 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4659 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4660 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4661 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4662 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4663 // CHECK15:       arrayctor.cont:
4664 // CHECK15-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4
4665 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
4666 // CHECK15-NEXT:    store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
4667 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4668 // CHECK15:       omp.inner.for.cond:
4669 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4670 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
4671 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4672 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4673 // CHECK15:       omp.inner.for.cond.cleanup:
4674 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4675 // CHECK15:       omp.inner.for.body:
4676 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4677 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4678 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4679 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
4680 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !3
4681 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4682 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i32 0, i32 [[TMP11]]
4683 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
4684 // CHECK15-NEXT:    [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !3
4685 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4686 // CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 [[TMP13]]
4687 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
4688 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
4689 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !3
4690 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4691 // CHECK15:       omp.body.continue:
4692 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4693 // CHECK15:       omp.inner.for.inc:
4694 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4695 // CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
4696 // CHECK15-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4697 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4698 // CHECK15:       omp.inner.for.end:
4699 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
4700 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
4701 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
4702 // CHECK15-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4703 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
4704 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
4705 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4706 // CHECK15-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR6]] to %struct.S*
4707 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
4708 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP21]]
4709 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4710 // CHECK15:       omp.arraycpy.body:
4711 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4712 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4713 // CHECK15-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4714 // CHECK15-NEXT:    [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4715 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
4716 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4717 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4718 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
4719 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
4720 // CHECK15:       omp.arraycpy.done12:
4721 // CHECK15-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
4722 // CHECK15-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
4723 // CHECK15-NEXT:    [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
4724 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
4725 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
4726 // CHECK15-NEXT:    store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
4727 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
4728 // CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
4729 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
4730 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4731 // CHECK15:       arraydestroy.body:
4732 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4733 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4734 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4735 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4736 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4737 // CHECK15:       arraydestroy.done14:
4738 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
4739 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4740 // CHECK15-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4741 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i32 2
4742 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
4743 // CHECK15:       arraydestroy.body17:
4744 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
4745 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1
4746 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
4747 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
4748 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
4749 // CHECK15:       arraydestroy.done21:
4750 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4751 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
4752 // CHECK15-NEXT:    ret i32 [[TMP30]]
4753 //
4754 //
4755 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4756 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4757 // CHECK15-NEXT:  entry:
4758 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4759 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4760 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4761 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
4762 // CHECK15-NEXT:    ret void
4763 //
4764 //
4765 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4766 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4767 // CHECK15-NEXT:  entry:
4768 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4769 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4770 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4771 // CHECK15-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4772 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4773 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4774 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
4775 // CHECK15-NEXT:    ret void
4776 //
4777 //
4778 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4779 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4780 // CHECK15-NEXT:  entry:
4781 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4782 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4783 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4784 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4785 // CHECK15-NEXT:    ret void
4786 //
4787 //
4788 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4789 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
4790 // CHECK15-NEXT:  entry:
4791 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4792 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4793 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4794 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4795 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4796 // CHECK15-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
4797 // CHECK15-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
4798 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4799 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
4800 // CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
4801 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4802 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4803 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4804 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
4805 // CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
4806 // CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
4807 // CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
4808 // CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
4809 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
4810 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
4811 // CHECK15-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4812 // CHECK15-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4813 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
4814 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4815 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
4816 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
4817 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
4818 // CHECK15-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
4819 // CHECK15-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4820 // CHECK15-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
4821 // CHECK15-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4822 // CHECK15-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4823 // CHECK15-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4
4824 // CHECK15-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
4825 // CHECK15-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4
4826 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4827 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4828 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4829 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4830 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
4831 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4832 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4833 // CHECK15:       arrayctor.loop:
4834 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4835 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4836 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
4837 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4838 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4839 // CHECK15:       arrayctor.cont:
4840 // CHECK15-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
4841 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
4842 // CHECK15-NEXT:    store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
4843 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4844 // CHECK15:       omp.inner.for.cond:
4845 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4846 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
4847 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4848 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4849 // CHECK15:       omp.inner.for.cond.cleanup:
4850 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4851 // CHECK15:       omp.inner.for.body:
4852 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4853 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4854 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4855 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
4856 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !7
4857 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4858 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i32 0, i32 [[TMP11]]
4859 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
4860 // CHECK15-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !7
4861 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4862 // CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 [[TMP13]]
4863 // CHECK15-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
4864 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
4865 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !7
4866 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4867 // CHECK15:       omp.body.continue:
4868 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4869 // CHECK15:       omp.inner.for.inc:
4870 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4871 // CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
4872 // CHECK15-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4873 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4874 // CHECK15:       omp.inner.for.end:
4875 // CHECK15-NEXT:    store i32 2, i32* [[I]], align 4
4876 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
4877 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
4878 // CHECK15-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4879 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
4880 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
4881 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4882 // CHECK15-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR6]] to %struct.S.0*
4883 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
4884 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP21]]
4885 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4886 // CHECK15:       omp.arraycpy.body:
4887 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4888 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4889 // CHECK15-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4890 // CHECK15-NEXT:    [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4891 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
4892 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4893 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4894 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
4895 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
4896 // CHECK15:       omp.arraycpy.done12:
4897 // CHECK15-NEXT:    [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
4898 // CHECK15-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
4899 // CHECK15-NEXT:    [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
4900 // CHECK15-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
4901 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
4902 // CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
4903 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
4904 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4905 // CHECK15:       arraydestroy.body:
4906 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4907 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4908 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4909 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4910 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4911 // CHECK15:       arraydestroy.done14:
4912 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4913 // CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4914 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN15]], i32 2
4915 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
4916 // CHECK15:       arraydestroy.body16:
4917 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
4918 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
4919 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
4920 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
4921 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
4922 // CHECK15:       arraydestroy.done20:
4923 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4924 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
4925 // CHECK15-NEXT:    ret i32 [[TMP29]]
4926 //
4927 //
4928 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4929 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4930 // CHECK15-NEXT:  entry:
4931 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4932 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4933 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4934 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4935 // CHECK15-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4936 // CHECK15-NEXT:    ret void
4937 //
4938 //
4939 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4940 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4941 // CHECK15-NEXT:  entry:
4942 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4943 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4944 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4945 // CHECK15-NEXT:    ret void
4946 //
4947 //
4948 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4949 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4950 // CHECK15-NEXT:  entry:
4951 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4952 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4953 // CHECK15-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4954 // CHECK15-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4955 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4956 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4957 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4958 // CHECK15-NEXT:    store float [[TMP0]], float* [[F]], align 4
4959 // CHECK15-NEXT:    ret void
4960 //
4961 //
4962 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4963 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4964 // CHECK15-NEXT:  entry:
4965 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4966 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4967 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4968 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
4969 // CHECK15-NEXT:    ret void
4970 //
4971 //
4972 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4973 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4974 // CHECK15-NEXT:  entry:
4975 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4976 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4977 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4978 // CHECK15-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4979 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4980 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4981 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
4982 // CHECK15-NEXT:    ret void
4983 //
4984 //
4985 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4986 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4987 // CHECK15-NEXT:  entry:
4988 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4989 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4990 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4991 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4992 // CHECK15-NEXT:    ret void
4993 //
4994 //
4995 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4996 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4997 // CHECK15-NEXT:  entry:
4998 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4999 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5000 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5001 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5002 // CHECK15-NEXT:    store i32 0, i32* [[F]], align 4
5003 // CHECK15-NEXT:    ret void
5004 //
5005 //
5006 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5007 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5008 // CHECK15-NEXT:  entry:
5009 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5010 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5011 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5012 // CHECK15-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5013 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5014 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5015 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5016 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5017 // CHECK15-NEXT:    ret void
5018 //
5019 //
5020 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5021 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5022 // CHECK15-NEXT:  entry:
5023 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5024 // CHECK15-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5025 // CHECK15-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5026 // CHECK15-NEXT:    ret void
5027 //
5028 //
5029 // CHECK16-LABEL: define {{[^@]+}}@main
5030 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
5031 // CHECK16-NEXT:  entry:
5032 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5033 // CHECK16-NEXT:    [[G:%.*]] = alloca double, align 8
5034 // CHECK16-NEXT:    [[G1:%.*]] = alloca double*, align 4
5035 // CHECK16-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
5036 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5037 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5038 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
5039 // CHECK16-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 4
5040 // CHECK16-NEXT:    [[TMP:%.*]] = alloca %struct.S*, align 4
5041 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 4
5042 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca %struct.S*, align 4
5043 // CHECK16-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
5044 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5045 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5046 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5047 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
5048 // CHECK16-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
5049 // CHECK16-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
5050 // CHECK16-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
5051 // CHECK16-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
5052 // CHECK16-NEXT:    [[_TMP8:%.*]] = alloca %struct.S*, align 4
5053 // CHECK16-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
5054 // CHECK16-NEXT:    [[I15:%.*]] = alloca i32, align 4
5055 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5056 // CHECK16-NEXT:    store double* [[G]], double** [[G1]], align 4
5057 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
5058 // CHECK16-NEXT:    store i32 0, i32* [[T_VAR]], align 4
5059 // CHECK16-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5060 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
5061 // CHECK16-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5062 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
5063 // CHECK16-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
5064 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
5065 // CHECK16-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
5066 // CHECK16-NEXT:    [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
5067 // CHECK16-NEXT:    store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
5068 // CHECK16-NEXT:    [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
5069 // CHECK16-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
5070 // CHECK16-NEXT:    store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4
5071 // CHECK16-NEXT:    [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
5072 // CHECK16-NEXT:    store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4
5073 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5074 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5075 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5076 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5077 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
5078 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
5079 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5080 // CHECK16:       arrayctor.loop:
5081 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5082 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
5083 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
5084 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5085 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5086 // CHECK16:       arrayctor.cont:
5087 // CHECK16-NEXT:    [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4
5088 // CHECK16-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
5089 // CHECK16-NEXT:    store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
5090 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5091 // CHECK16:       omp.inner.for.cond:
5092 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5093 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5094 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5095 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5096 // CHECK16:       omp.inner.for.cond.cleanup:
5097 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5098 // CHECK16:       omp.inner.for.body:
5099 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5100 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5101 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5102 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5103 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !3
5104 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5105 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i32 0, i32 [[TMP11]]
5106 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5107 // CHECK16-NEXT:    [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !3
5108 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5109 // CHECK16-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 [[TMP13]]
5110 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
5111 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
5112 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !3
5113 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5114 // CHECK16:       omp.body.continue:
5115 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5116 // CHECK16:       omp.inner.for.inc:
5117 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5118 // CHECK16-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
5119 // CHECK16-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5120 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5121 // CHECK16:       omp.inner.for.end:
5122 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
5123 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
5124 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
5125 // CHECK16-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5126 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
5127 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
5128 // CHECK16-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5129 // CHECK16-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR6]] to %struct.S*
5130 // CHECK16-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
5131 // CHECK16-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP21]]
5132 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5133 // CHECK16:       omp.arraycpy.body:
5134 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5135 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5136 // CHECK16-NEXT:    [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5137 // CHECK16-NEXT:    [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5138 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
5139 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5140 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5141 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
5142 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
5143 // CHECK16:       omp.arraycpy.done12:
5144 // CHECK16-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
5145 // CHECK16-NEXT:    [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
5146 // CHECK16-NEXT:    [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
5147 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
5148 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
5149 // CHECK16-NEXT:    store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
5150 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
5151 // CHECK16-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
5152 // CHECK16-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
5153 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5154 // CHECK16:       arraydestroy.body:
5155 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5156 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5157 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5158 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
5159 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
5160 // CHECK16:       arraydestroy.done14:
5161 // CHECK16-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
5162 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5163 // CHECK16-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5164 // CHECK16-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i32 2
5165 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
5166 // CHECK16:       arraydestroy.body17:
5167 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
5168 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1
5169 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
5170 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
5171 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
5172 // CHECK16:       arraydestroy.done21:
5173 // CHECK16-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
5174 // CHECK16-NEXT:    [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
5175 // CHECK16-NEXT:    ret i32 [[TMP30]]
5176 //
5177 //
5178 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5179 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
5180 // CHECK16-NEXT:  entry:
5181 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5182 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5183 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5184 // CHECK16-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
5185 // CHECK16-NEXT:    ret void
5186 //
5187 //
5188 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
5189 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5190 // CHECK16-NEXT:  entry:
5191 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5192 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5193 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5194 // CHECK16-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5195 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5196 // CHECK16-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5197 // CHECK16-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
5198 // CHECK16-NEXT:    ret void
5199 //
5200 //
5201 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5202 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5203 // CHECK16-NEXT:  entry:
5204 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5205 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5206 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5207 // CHECK16-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
5208 // CHECK16-NEXT:    ret void
5209 //
5210 //
5211 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
5212 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat {
5213 // CHECK16-NEXT:  entry:
5214 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5215 // CHECK16-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5216 // CHECK16-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5217 // CHECK16-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5218 // CHECK16-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
5219 // CHECK16-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 4
5220 // CHECK16-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 4
5221 // CHECK16-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
5222 // CHECK16-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
5223 // CHECK16-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
5224 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5225 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5226 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5227 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
5228 // CHECK16-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
5229 // CHECK16-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
5230 // CHECK16-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
5231 // CHECK16-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
5232 // CHECK16-NEXT:    [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
5233 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
5234 // CHECK16-NEXT:    store i32 0, i32* [[T_VAR]], align 4
5235 // CHECK16-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5236 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
5237 // CHECK16-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5238 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
5239 // CHECK16-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
5240 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
5241 // CHECK16-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
5242 // CHECK16-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
5243 // CHECK16-NEXT:    store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
5244 // CHECK16-NEXT:    [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
5245 // CHECK16-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
5246 // CHECK16-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4
5247 // CHECK16-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
5248 // CHECK16-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4
5249 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5250 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5251 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5252 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5253 // CHECK16-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
5254 // CHECK16-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
5255 // CHECK16-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5256 // CHECK16:       arrayctor.loop:
5257 // CHECK16-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5258 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
5259 // CHECK16-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
5260 // CHECK16-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5261 // CHECK16-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5262 // CHECK16:       arrayctor.cont:
5263 // CHECK16-NEXT:    [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
5264 // CHECK16-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
5265 // CHECK16-NEXT:    store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
5266 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5267 // CHECK16:       omp.inner.for.cond:
5268 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5269 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
5270 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5271 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5272 // CHECK16:       omp.inner.for.cond.cleanup:
5273 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5274 // CHECK16:       omp.inner.for.body:
5275 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5276 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5277 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5278 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
5279 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !7
5280 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5281 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i32 0, i32 [[TMP11]]
5282 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
5283 // CHECK16-NEXT:    [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !7
5284 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
5285 // CHECK16-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 [[TMP13]]
5286 // CHECK16-NEXT:    [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
5287 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
5288 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !7
5289 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5290 // CHECK16:       omp.body.continue:
5291 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5292 // CHECK16:       omp.inner.for.inc:
5293 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5294 // CHECK16-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
5295 // CHECK16-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
5296 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
5297 // CHECK16:       omp.inner.for.end:
5298 // CHECK16-NEXT:    store i32 2, i32* [[I]], align 4
5299 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR4]], align 4
5300 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[T_VAR]], align 4
5301 // CHECK16-NEXT:    [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5302 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
5303 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
5304 // CHECK16-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5305 // CHECK16-NEXT:    [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR6]] to %struct.S.0*
5306 // CHECK16-NEXT:    [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
5307 // CHECK16-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP21]]
5308 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5309 // CHECK16:       omp.arraycpy.body:
5310 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5311 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5312 // CHECK16-NEXT:    [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5313 // CHECK16-NEXT:    [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5314 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
5315 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5316 // CHECK16-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5317 // CHECK16-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
5318 // CHECK16-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
5319 // CHECK16:       omp.arraycpy.done12:
5320 // CHECK16-NEXT:    [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
5321 // CHECK16-NEXT:    [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
5322 // CHECK16-NEXT:    [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
5323 // CHECK16-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
5324 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
5325 // CHECK16-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
5326 // CHECK16-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
5327 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5328 // CHECK16:       arraydestroy.body:
5329 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5330 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5331 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5332 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
5333 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
5334 // CHECK16:       arraydestroy.done14:
5335 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5336 // CHECK16-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5337 // CHECK16-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN15]], i32 2
5338 // CHECK16-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
5339 // CHECK16:       arraydestroy.body16:
5340 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
5341 // CHECK16-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
5342 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
5343 // CHECK16-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
5344 // CHECK16-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
5345 // CHECK16:       arraydestroy.done20:
5346 // CHECK16-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
5347 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
5348 // CHECK16-NEXT:    ret i32 [[TMP29]]
5349 //
5350 //
5351 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
5352 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5353 // CHECK16-NEXT:  entry:
5354 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5355 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5356 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5357 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5358 // CHECK16-NEXT:    store float 0.000000e+00, float* [[F]], align 4
5359 // CHECK16-NEXT:    ret void
5360 //
5361 //
5362 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
5363 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5364 // CHECK16-NEXT:  entry:
5365 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5366 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5367 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5368 // CHECK16-NEXT:    ret void
5369 //
5370 //
5371 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
5372 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5373 // CHECK16-NEXT:  entry:
5374 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
5375 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5376 // CHECK16-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
5377 // CHECK16-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5378 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
5379 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5380 // CHECK16-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5381 // CHECK16-NEXT:    store float [[TMP0]], float* [[F]], align 4
5382 // CHECK16-NEXT:    ret void
5383 //
5384 //
5385 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
5386 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5387 // CHECK16-NEXT:  entry:
5388 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5389 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5390 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5391 // CHECK16-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
5392 // CHECK16-NEXT:    ret void
5393 //
5394 //
5395 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
5396 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5397 // CHECK16-NEXT:  entry:
5398 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5399 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5400 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5401 // CHECK16-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5402 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5403 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5404 // CHECK16-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
5405 // CHECK16-NEXT:    ret void
5406 //
5407 //
5408 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5409 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5410 // CHECK16-NEXT:  entry:
5411 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5412 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5413 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5414 // CHECK16-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
5415 // CHECK16-NEXT:    ret void
5416 //
5417 //
5418 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5419 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5420 // CHECK16-NEXT:  entry:
5421 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5422 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5423 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5424 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5425 // CHECK16-NEXT:    store i32 0, i32* [[F]], align 4
5426 // CHECK16-NEXT:    ret void
5427 //
5428 //
5429 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5430 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5431 // CHECK16-NEXT:  entry:
5432 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5433 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5434 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5435 // CHECK16-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5436 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5437 // CHECK16-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5438 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5439 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5440 // CHECK16-NEXT:    ret void
5441 //
5442 //
5443 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5444 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5445 // CHECK16-NEXT:  entry:
5446 // CHECK16-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5447 // CHECK16-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5448 // CHECK16-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5449 // CHECK16-NEXT:    ret void
5450 //
5451