1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute simd firstprivate(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute simd firstprivate(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 // Private alloca's for conversion 73 74 // Actual private variables to be used in the body (tmp is used for the reference type) 75 76 // Store input parameter addresses into private alloca's for conversion 77 78 79 80 g += 1; 81 g1 += 1; 82 svar += 3; 83 sfvar += 4.0; 84 85 // call inner lambda (use refs to private alloca's) 86 [&]() { 87 g += 2; 88 g1 += 2; 89 svar += 4; 90 sfvar += 8.0; 91 92 93 94 }(); 95 } 96 }(); 97 return 0; 98 #else 99 S<float> test; 100 int t_var = 0; 101 int vec[] = {1, 2}; 102 S<float> s_arr[] = {1, 2}; 103 S<float> &var = test; 104 105 #pragma omp target 106 #pragma omp teams 107 #pragma omp distribute simd firstprivate(t_var, vec, s_arr, s_arr, var, var, svar) 108 for (int i = 0; i < 2; ++i) { 109 vec[i] = t_var; 110 s_arr[i] = var; 111 } 112 return tmain<int>(); 113 #endif 114 } 115 116 117 118 119 // discard omp loop variables 120 121 122 123 // init t_var 124 125 // init vec 126 127 // init s_arr 128 129 130 // init var 131 132 // init svar 133 134 135 136 // Template 137 138 139 140 // discard omp loop variables 141 142 143 144 // init t_var 145 146 // init vec 147 148 // init s_arr 149 150 151 // init var 152 153 154 155 #endif 156 // CHECK1-LABEL: define {{[^@]+}}@main 157 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 158 // CHECK1-NEXT: entry: 159 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 161 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 162 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 163 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 164 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 165 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 166 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 167 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 168 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 169 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 170 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 171 // CHECK1-NEXT: ret i32 0 172 // 173 // 174 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 175 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 176 // CHECK1-NEXT: entry: 177 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 178 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 179 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 180 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 181 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 182 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 183 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 184 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 185 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 186 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 187 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 188 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 189 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 190 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 191 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 192 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 193 // CHECK1-NEXT: ret void 194 // 195 // 196 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 197 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 198 // CHECK1-NEXT: entry: 199 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 200 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 201 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 202 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 203 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 204 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 205 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 206 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 207 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 214 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 215 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 216 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 220 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 221 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 222 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 223 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 224 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 225 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 226 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 227 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 228 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 229 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 230 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 231 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 232 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 233 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 234 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 235 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 236 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 237 // CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 238 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8 239 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 240 // CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8 241 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8 242 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 243 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 244 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 245 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 246 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 247 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 248 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 249 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 250 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 251 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 252 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 253 // CHECK1: cond.true: 254 // CHECK1-NEXT: br label [[COND_END:%.*]] 255 // CHECK1: cond.false: 256 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 257 // CHECK1-NEXT: br label [[COND_END]] 258 // CHECK1: cond.end: 259 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 260 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 261 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 262 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 264 // CHECK1: omp.inner.for.cond: 265 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 266 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 267 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 268 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 269 // CHECK1: omp.inner.for.body: 270 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 271 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 272 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 273 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 274 // CHECK1-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !4 275 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 276 // CHECK1-NEXT: store double [[ADD9]], double* [[G3]], align 8, !llvm.access.group !4 277 // CHECK1-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 278 // CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8, !llvm.access.group !4 279 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 280 // CHECK1-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8, !llvm.access.group !4 281 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !4 282 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 283 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4, !llvm.access.group !4 284 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !4 285 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 286 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 287 // CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 288 // CHECK1-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4, !llvm.access.group !4 289 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 290 // CHECK1-NEXT: store double* [[G3]], double** [[TMP23]], align 8, !llvm.access.group !4 291 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 292 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 293 // CHECK1-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8, !llvm.access.group !4 294 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 295 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8, !llvm.access.group !4 296 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 297 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8, !llvm.access.group !4 298 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 299 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 300 // CHECK1: omp.body.continue: 301 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 302 // CHECK1: omp.inner.for.inc: 303 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 304 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 305 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 306 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 307 // CHECK1: omp.inner.for.end: 308 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 309 // CHECK1: omp.loop.exit: 310 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 311 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 312 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 313 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 314 // CHECK1: .omp.final.then: 315 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 316 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 317 // CHECK1: .omp.final.done: 318 // CHECK1-NEXT: ret void 319 // 320 // 321 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 322 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 323 // CHECK1-NEXT: entry: 324 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 325 // CHECK1-NEXT: ret void 326 // 327 // 328 // CHECK2-LABEL: define {{[^@]+}}@main 329 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 330 // CHECK2-NEXT: entry: 331 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 332 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 333 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 334 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 335 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 336 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 337 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 338 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 339 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 340 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 341 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 342 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 343 // CHECK2-NEXT: ret i32 0 344 // 345 // 346 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 347 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 348 // CHECK2-NEXT: entry: 349 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 350 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 351 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 352 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 353 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 354 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 355 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 356 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 357 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 358 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 359 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 360 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 361 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 362 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 363 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 364 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 365 // CHECK2-NEXT: ret void 366 // 367 // 368 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 369 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 370 // CHECK2-NEXT: entry: 371 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 372 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 373 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 374 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 375 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 376 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 377 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 378 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 379 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 380 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 381 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 382 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 383 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 384 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 385 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8 386 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8 387 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 388 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 389 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 390 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 391 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 392 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 393 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 394 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 395 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 396 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 397 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 398 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 399 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 400 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 401 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 402 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 403 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 404 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 405 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 406 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 407 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 408 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 409 // CHECK2-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 410 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8 411 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 412 // CHECK2-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8 413 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8 414 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 415 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 416 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 417 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 418 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 419 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 420 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 421 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 422 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 423 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 424 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 425 // CHECK2: cond.true: 426 // CHECK2-NEXT: br label [[COND_END:%.*]] 427 // CHECK2: cond.false: 428 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 429 // CHECK2-NEXT: br label [[COND_END]] 430 // CHECK2: cond.end: 431 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 432 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 433 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 434 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 435 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 436 // CHECK2: omp.inner.for.cond: 437 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 438 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 439 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 440 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 441 // CHECK2: omp.inner.for.body: 442 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 443 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 444 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 445 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 446 // CHECK2-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !4 447 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 448 // CHECK2-NEXT: store double [[ADD9]], double* [[G3]], align 8, !llvm.access.group !4 449 // CHECK2-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 450 // CHECK2-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8, !llvm.access.group !4 451 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 452 // CHECK2-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8, !llvm.access.group !4 453 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !4 454 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 455 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4, !llvm.access.group !4 456 // CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !4 457 // CHECK2-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 458 // CHECK2-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 459 // CHECK2-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 460 // CHECK2-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4, !llvm.access.group !4 461 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 462 // CHECK2-NEXT: store double* [[G3]], double** [[TMP23]], align 8, !llvm.access.group !4 463 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 464 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 465 // CHECK2-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8, !llvm.access.group !4 466 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 467 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8, !llvm.access.group !4 468 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 469 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8, !llvm.access.group !4 470 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 471 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 472 // CHECK2: omp.body.continue: 473 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 474 // CHECK2: omp.inner.for.inc: 475 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 476 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 477 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 478 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 479 // CHECK2: omp.inner.for.end: 480 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 481 // CHECK2: omp.loop.exit: 482 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 483 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 484 // CHECK2-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 485 // CHECK2-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 486 // CHECK2: .omp.final.then: 487 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 488 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 489 // CHECK2: .omp.final.done: 490 // CHECK2-NEXT: ret void 491 // 492 // 493 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 494 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 495 // CHECK2-NEXT: entry: 496 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 497 // CHECK2-NEXT: ret void 498 // 499 // 500 // CHECK3-LABEL: define {{[^@]+}}@main 501 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 502 // CHECK3-NEXT: entry: 503 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 504 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 505 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 506 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 507 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 508 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 509 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 510 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 511 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 512 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 513 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 514 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 515 // CHECK3-NEXT: ret i32 0 516 // 517 // 518 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 519 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 520 // CHECK3-NEXT: entry: 521 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 522 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 523 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 524 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 525 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 526 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 527 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 528 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 529 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 530 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 531 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 532 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 533 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 534 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 535 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 536 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 537 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 538 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 539 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 540 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 541 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 542 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 543 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 544 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 545 // CHECK3-NEXT: ret void 546 // 547 // 548 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 549 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 550 // CHECK3-NEXT: entry: 551 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 552 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 553 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 554 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 555 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 556 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 557 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 558 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 559 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 560 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 561 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 562 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 563 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 564 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 565 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 566 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8 567 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 568 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 569 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 570 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 571 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 572 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 573 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 574 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 575 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 576 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 577 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 578 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 579 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 580 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 581 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 582 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 583 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 584 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 585 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 586 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 587 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 588 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 589 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 590 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8 591 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 592 // CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4 593 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8 594 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 595 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 596 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 597 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 598 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 599 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 600 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 601 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 602 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 603 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 604 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 605 // CHECK3: cond.true: 606 // CHECK3-NEXT: br label [[COND_END:%.*]] 607 // CHECK3: cond.false: 608 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 609 // CHECK3-NEXT: br label [[COND_END]] 610 // CHECK3: cond.end: 611 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 612 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 613 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 614 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 615 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 616 // CHECK3: omp.inner.for.cond: 617 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 618 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 619 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 620 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 621 // CHECK3: omp.inner.for.body: 622 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 623 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 624 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 625 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 626 // CHECK3-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !5 627 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 628 // CHECK3-NEXT: store double [[ADD9]], double* [[G3]], align 8, !llvm.access.group !5 629 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 630 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4, !llvm.access.group !5 631 // CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 632 // CHECK3-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4, !llvm.access.group !5 633 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !5 634 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 635 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4, !llvm.access.group !5 636 // CHECK3-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !5 637 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 638 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 639 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 640 // CHECK3-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4, !llvm.access.group !5 641 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 642 // CHECK3-NEXT: store double* [[G3]], double** [[TMP23]], align 4, !llvm.access.group !5 643 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 644 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 645 // CHECK3-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4, !llvm.access.group !5 646 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 647 // CHECK3-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4, !llvm.access.group !5 648 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 649 // CHECK3-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4, !llvm.access.group !5 650 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 651 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 652 // CHECK3: omp.body.continue: 653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 654 // CHECK3: omp.inner.for.inc: 655 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 656 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 657 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 658 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 659 // CHECK3: omp.inner.for.end: 660 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 661 // CHECK3: omp.loop.exit: 662 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 663 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 664 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 665 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 666 // CHECK3: .omp.final.then: 667 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 668 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 669 // CHECK3: .omp.final.done: 670 // CHECK3-NEXT: ret void 671 // 672 // 673 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 674 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 675 // CHECK3-NEXT: entry: 676 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 677 // CHECK3-NEXT: ret void 678 // 679 // 680 // CHECK4-LABEL: define {{[^@]+}}@main 681 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 682 // CHECK4-NEXT: entry: 683 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 684 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 685 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 686 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 687 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 688 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 689 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 690 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 691 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 692 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 693 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 694 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 695 // CHECK4-NEXT: ret i32 0 696 // 697 // 698 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 699 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 700 // CHECK4-NEXT: entry: 701 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 702 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 703 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 704 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 705 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 706 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 707 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 708 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 709 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 710 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 711 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 712 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 713 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 714 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 715 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 716 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 717 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 718 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 719 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 720 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 721 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 722 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 723 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 724 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 725 // CHECK4-NEXT: ret void 726 // 727 // 728 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 729 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 730 // CHECK4-NEXT: entry: 731 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 732 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 733 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 734 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 735 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 736 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 737 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 738 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 739 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 740 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 741 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 742 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 743 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 744 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 745 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 746 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8 747 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 748 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 749 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 750 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 751 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 752 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 753 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 754 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 755 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 756 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 757 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 758 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 759 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 760 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 761 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 762 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 763 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 764 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 765 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 766 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 767 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 768 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 769 // CHECK4-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8 770 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8 771 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 772 // CHECK4-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4 773 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8 774 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 775 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 776 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 777 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 778 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 779 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 780 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 781 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 782 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 783 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 784 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 785 // CHECK4: cond.true: 786 // CHECK4-NEXT: br label [[COND_END:%.*]] 787 // CHECK4: cond.false: 788 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 789 // CHECK4-NEXT: br label [[COND_END]] 790 // CHECK4: cond.end: 791 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 792 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 793 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 794 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 795 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 796 // CHECK4: omp.inner.for.cond: 797 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 798 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 799 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 800 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 801 // CHECK4: omp.inner.for.body: 802 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 803 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 804 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 805 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 806 // CHECK4-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !5 807 // CHECK4-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 808 // CHECK4-NEXT: store double [[ADD9]], double* [[G3]], align 8, !llvm.access.group !5 809 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 810 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4, !llvm.access.group !5 811 // CHECK4-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 812 // CHECK4-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4, !llvm.access.group !5 813 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !5 814 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 815 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4, !llvm.access.group !5 816 // CHECK4-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !5 817 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 818 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 819 // CHECK4-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 820 // CHECK4-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4, !llvm.access.group !5 821 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 822 // CHECK4-NEXT: store double* [[G3]], double** [[TMP23]], align 4, !llvm.access.group !5 823 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 824 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 825 // CHECK4-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4, !llvm.access.group !5 826 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 827 // CHECK4-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4, !llvm.access.group !5 828 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 829 // CHECK4-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4, !llvm.access.group !5 830 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 831 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 832 // CHECK4: omp.body.continue: 833 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 834 // CHECK4: omp.inner.for.inc: 835 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 836 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 837 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 838 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 839 // CHECK4: omp.inner.for.end: 840 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 841 // CHECK4: omp.loop.exit: 842 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 843 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 844 // CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 845 // CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 846 // CHECK4: .omp.final.then: 847 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 848 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 849 // CHECK4: .omp.final.done: 850 // CHECK4-NEXT: ret void 851 // 852 // 853 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 854 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 855 // CHECK4-NEXT: entry: 856 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 857 // CHECK4-NEXT: ret void 858 // 859 // 860 // CHECK5-LABEL: define {{[^@]+}}@main 861 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 862 // CHECK5-NEXT: entry: 863 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 864 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 865 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 866 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 867 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 868 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 869 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 870 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 871 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 872 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 873 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 874 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 875 // CHECK5-NEXT: ret i32 0 876 // 877 // 878 // CHECK6-LABEL: define {{[^@]+}}@main 879 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 880 // CHECK6-NEXT: entry: 881 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 882 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 883 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 884 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 885 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 886 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 887 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 888 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 8 889 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 890 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 891 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 892 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 893 // CHECK6-NEXT: ret i32 0 894 // 895 // 896 // CHECK7-LABEL: define {{[^@]+}}@main 897 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 898 // CHECK7-NEXT: entry: 899 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 900 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 901 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 902 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 903 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 904 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 905 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 906 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 907 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 908 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 909 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 910 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 911 // CHECK7-NEXT: ret i32 0 912 // 913 // 914 // CHECK8-LABEL: define {{[^@]+}}@main 915 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 916 // CHECK8-NEXT: entry: 917 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 918 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 919 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 920 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 921 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 922 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 923 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 924 // CHECK8-NEXT: store double* [[G]], double** [[TMP0]], align 4 925 // CHECK8-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 926 // CHECK8-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 927 // CHECK8-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 928 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 929 // CHECK8-NEXT: ret i32 0 930 // 931 // 932 // CHECK9-LABEL: define {{[^@]+}}@main 933 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 934 // CHECK9-NEXT: entry: 935 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 936 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 937 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 938 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 939 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 940 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 941 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 942 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 943 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 944 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 945 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 946 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 947 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 948 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 949 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 950 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 951 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 952 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 953 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 954 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 955 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 956 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 957 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 958 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 959 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 960 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 961 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 962 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 963 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 964 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 965 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 966 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 967 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 968 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 969 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 970 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 971 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 972 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 973 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 974 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 975 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 976 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 977 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 978 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 979 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 980 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 981 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 982 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 983 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 984 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 985 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 986 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 987 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 988 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 989 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 990 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 991 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 992 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 993 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 994 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 995 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 996 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 997 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 998 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 999 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1000 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1001 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1002 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1003 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1004 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1005 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 1006 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1007 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1008 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1009 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1010 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1011 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1012 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1013 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 1014 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1015 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1016 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1017 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1018 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1019 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1020 // CHECK9: omp_offload.failed: 1021 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1022 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1023 // CHECK9: omp_offload.cont: 1024 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1025 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1026 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1027 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1028 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1029 // CHECK9: arraydestroy.body: 1030 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1031 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1032 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1033 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1034 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1035 // CHECK9: arraydestroy.done3: 1036 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1037 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1038 // CHECK9-NEXT: ret i32 [[TMP39]] 1039 // 1040 // 1041 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1042 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1043 // CHECK9-NEXT: entry: 1044 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1045 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1046 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1047 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1048 // CHECK9-NEXT: ret void 1049 // 1050 // 1051 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1052 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1053 // CHECK9-NEXT: entry: 1054 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1055 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1056 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1057 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1058 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1059 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1060 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1061 // CHECK9-NEXT: ret void 1062 // 1063 // 1064 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1065 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1066 // CHECK9-NEXT: entry: 1067 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1068 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1069 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1070 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1071 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1072 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1073 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1074 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1075 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1076 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1077 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1078 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1079 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1080 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1081 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1082 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1083 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1084 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1085 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1086 // CHECK9-NEXT: ret void 1087 // 1088 // 1089 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1090 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1091 // CHECK9-NEXT: entry: 1092 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1093 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1094 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1095 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1096 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1097 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1098 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1099 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1100 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1101 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1102 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1103 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1104 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1105 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1106 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1107 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1108 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1109 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1110 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1111 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1112 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1113 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1114 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1115 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1116 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1117 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1118 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1119 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1120 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1121 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1122 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1123 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1124 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1125 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1126 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1127 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1128 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1129 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1130 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1131 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1132 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1133 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1134 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1135 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1136 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1137 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1138 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1139 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1140 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1141 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1142 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1143 // CHECK9: omp.arraycpy.body: 1144 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1145 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1146 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1147 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1148 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1149 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1150 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1151 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1152 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1153 // CHECK9: omp.arraycpy.done6: 1154 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1155 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1156 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1157 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1158 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1159 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1160 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1161 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1162 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1163 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1164 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1165 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1166 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1167 // CHECK9: cond.true: 1168 // CHECK9-NEXT: br label [[COND_END:%.*]] 1169 // CHECK9: cond.false: 1170 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1171 // CHECK9-NEXT: br label [[COND_END]] 1172 // CHECK9: cond.end: 1173 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1174 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1175 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1176 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1177 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1178 // CHECK9: omp.inner.for.cond: 1179 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1180 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 1181 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1182 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1183 // CHECK9: omp.inner.for.cond.cleanup: 1184 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1185 // CHECK9: omp.inner.for.body: 1186 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1187 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 1188 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1189 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 1190 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 1191 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1192 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64 1193 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1194 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 1195 // CHECK9-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !5 1196 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1197 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64 1198 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]] 1199 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1200 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 1201 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false), !llvm.access.group !5 1202 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1203 // CHECK9: omp.body.continue: 1204 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1205 // CHECK9: omp.inner.for.inc: 1206 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1207 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1 1208 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1209 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1210 // CHECK9: omp.inner.for.end: 1211 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1212 // CHECK9: omp.loop.exit: 1213 // CHECK9-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1214 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 1215 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 1216 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1217 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1218 // CHECK9-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1219 // CHECK9: .omp.final.then: 1220 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1221 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1222 // CHECK9: .omp.final.done: 1223 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1224 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1225 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1226 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1227 // CHECK9: arraydestroy.body: 1228 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1229 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1230 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1231 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1232 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1233 // CHECK9: arraydestroy.done15: 1234 // CHECK9-NEXT: ret void 1235 // 1236 // 1237 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1238 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1239 // CHECK9-NEXT: entry: 1240 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1241 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1242 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1243 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1244 // CHECK9-NEXT: ret void 1245 // 1246 // 1247 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1248 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1249 // CHECK9-NEXT: entry: 1250 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1251 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1252 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1253 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1254 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1255 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1256 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1257 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1258 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1259 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1260 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1261 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1262 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1263 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1264 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1265 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1266 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1267 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1268 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1269 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1270 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1271 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1272 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1273 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1274 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1275 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1276 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1277 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1278 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1279 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1280 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1281 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1282 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1283 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1284 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1285 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1286 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1287 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1288 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1289 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1290 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1291 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1292 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1293 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1294 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1295 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1296 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1297 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1298 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1299 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1300 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1301 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1302 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1303 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 1304 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1305 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1306 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1307 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1308 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1309 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1310 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1311 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 1312 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1313 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1314 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1315 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1316 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1317 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1318 // CHECK9: omp_offload.failed: 1319 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1320 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1321 // CHECK9: omp_offload.cont: 1322 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1323 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1324 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1325 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1326 // CHECK9: arraydestroy.body: 1327 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1328 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1329 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1330 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1331 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1332 // CHECK9: arraydestroy.done2: 1333 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1334 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1335 // CHECK9-NEXT: ret i32 [[TMP32]] 1336 // 1337 // 1338 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1339 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1340 // CHECK9-NEXT: entry: 1341 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1342 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1343 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1344 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1345 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1346 // CHECK9-NEXT: ret void 1347 // 1348 // 1349 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1350 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1351 // CHECK9-NEXT: entry: 1352 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1353 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1354 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1355 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1356 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1357 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1358 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1359 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1360 // CHECK9-NEXT: ret void 1361 // 1362 // 1363 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1364 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1365 // CHECK9-NEXT: entry: 1366 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1367 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1368 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1369 // CHECK9-NEXT: ret void 1370 // 1371 // 1372 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1373 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1374 // CHECK9-NEXT: entry: 1375 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1376 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1377 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1378 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1379 // CHECK9-NEXT: ret void 1380 // 1381 // 1382 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1383 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1384 // CHECK9-NEXT: entry: 1385 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1386 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1387 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1388 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1389 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1390 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1391 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1392 // CHECK9-NEXT: ret void 1393 // 1394 // 1395 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1396 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1397 // CHECK9-NEXT: entry: 1398 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1399 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1400 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1401 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1402 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1403 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1404 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1405 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1406 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1407 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1408 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1409 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1410 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1411 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 1412 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1413 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 1414 // CHECK9-NEXT: ret void 1415 // 1416 // 1417 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1418 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1419 // CHECK9-NEXT: entry: 1420 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1421 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1422 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1423 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1424 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1425 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1426 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1427 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1428 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1429 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1430 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1431 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1432 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1433 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1434 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1435 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1436 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 1437 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1438 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 1439 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1440 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1441 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1442 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1443 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1444 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1445 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1446 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1447 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1448 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1449 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1450 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 1451 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1452 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 1453 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1454 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1455 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1456 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1457 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1458 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 1459 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1460 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1461 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 1462 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1463 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 1464 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1465 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 1466 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1467 // CHECK9: omp.arraycpy.body: 1468 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1469 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1470 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1471 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1472 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 1473 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1474 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1475 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 1476 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1477 // CHECK9: omp.arraycpy.done6: 1478 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 1479 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 1480 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 1481 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 1482 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 1483 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1484 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1485 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1486 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1487 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 1488 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1489 // CHECK9: cond.true: 1490 // CHECK9-NEXT: br label [[COND_END:%.*]] 1491 // CHECK9: cond.false: 1492 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1493 // CHECK9-NEXT: br label [[COND_END]] 1494 // CHECK9: cond.end: 1495 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 1496 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1497 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1498 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 1499 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1500 // CHECK9: omp.inner.for.cond: 1501 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1502 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1503 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 1504 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1505 // CHECK9: omp.inner.for.cond.cleanup: 1506 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1507 // CHECK9: omp.inner.for.body: 1508 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1509 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 1510 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1511 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 1512 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !11 1513 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 1514 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 1515 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1516 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1517 // CHECK9-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !11 1518 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 1519 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64 1520 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1521 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 1522 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 1523 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false), !llvm.access.group !11 1524 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1525 // CHECK9: omp.body.continue: 1526 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1527 // CHECK9: omp.inner.for.inc: 1528 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1529 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1 1530 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1531 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1532 // CHECK9: omp.inner.for.end: 1533 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1534 // CHECK9: omp.loop.exit: 1535 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1536 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1537 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 1538 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1539 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 1540 // CHECK9-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1541 // CHECK9: .omp.final.then: 1542 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1543 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1544 // CHECK9: .omp.final.done: 1545 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1546 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 1547 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 1548 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1549 // CHECK9: arraydestroy.body: 1550 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1551 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1552 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1553 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1554 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1555 // CHECK9: arraydestroy.done14: 1556 // CHECK9-NEXT: ret void 1557 // 1558 // 1559 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1560 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1561 // CHECK9-NEXT: entry: 1562 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1563 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1564 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1565 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1566 // CHECK9-NEXT: ret void 1567 // 1568 // 1569 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1570 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1571 // CHECK9-NEXT: entry: 1572 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1573 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1574 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1575 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1576 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1577 // CHECK9-NEXT: ret void 1578 // 1579 // 1580 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1581 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1582 // CHECK9-NEXT: entry: 1583 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1584 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1585 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1586 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1587 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1588 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1589 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1590 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1591 // CHECK9-NEXT: ret void 1592 // 1593 // 1594 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1595 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK9-NEXT: entry: 1597 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1598 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1599 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1600 // CHECK9-NEXT: ret void 1601 // 1602 // 1603 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1604 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1605 // CHECK9-NEXT: entry: 1606 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1607 // CHECK9-NEXT: ret void 1608 // 1609 // 1610 // CHECK10-LABEL: define {{[^@]+}}@main 1611 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1612 // CHECK10-NEXT: entry: 1613 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1614 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1615 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1616 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1617 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1618 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1619 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1620 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1621 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1622 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1623 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1624 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1625 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1626 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1627 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1628 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1629 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1630 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1631 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1632 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1633 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1634 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1635 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1636 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1637 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1638 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1639 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1640 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1641 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1642 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1643 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1644 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1645 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1646 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1647 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1648 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1649 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1650 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1651 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1652 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1653 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1654 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1655 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1656 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1657 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1658 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1659 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 1660 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1661 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1662 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1663 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1664 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1665 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1666 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1667 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8 1668 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1669 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1670 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1671 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1672 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1673 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1674 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1675 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8 1676 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1677 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1678 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1679 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1680 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1681 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1682 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1683 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8 1684 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1685 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1686 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1687 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1688 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1689 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1690 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1691 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8 1692 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1693 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1694 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1695 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1696 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1697 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1698 // CHECK10: omp_offload.failed: 1699 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1700 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1701 // CHECK10: omp_offload.cont: 1702 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1703 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1704 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1705 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1706 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1707 // CHECK10: arraydestroy.body: 1708 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1709 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1710 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1711 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1712 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1713 // CHECK10: arraydestroy.done3: 1714 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1715 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1716 // CHECK10-NEXT: ret i32 [[TMP39]] 1717 // 1718 // 1719 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1720 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1721 // CHECK10-NEXT: entry: 1722 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1723 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1724 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1725 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1726 // CHECK10-NEXT: ret void 1727 // 1728 // 1729 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1730 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1731 // CHECK10-NEXT: entry: 1732 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1733 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1734 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1735 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1736 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1737 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1738 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1739 // CHECK10-NEXT: ret void 1740 // 1741 // 1742 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 1743 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1744 // CHECK10-NEXT: entry: 1745 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1746 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1747 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1748 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1749 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1750 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1751 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1752 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1753 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1754 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1755 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1756 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1757 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1758 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1759 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1760 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1761 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1762 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1763 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1764 // CHECK10-NEXT: ret void 1765 // 1766 // 1767 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1768 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1769 // CHECK10-NEXT: entry: 1770 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1771 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1772 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1773 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1774 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1775 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1776 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1777 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1778 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1779 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1780 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1781 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1782 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1783 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1784 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1785 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1786 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1787 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1788 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1789 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1790 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1791 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1792 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1793 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1794 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1795 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1796 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1797 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1798 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1799 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1800 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1801 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1802 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1803 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1804 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1805 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1806 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1807 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1808 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1809 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1810 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1811 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1812 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1813 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1814 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1815 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1816 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1817 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1818 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1819 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1820 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1821 // CHECK10: omp.arraycpy.body: 1822 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1823 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1824 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1825 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1826 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1827 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1828 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1829 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1830 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1831 // CHECK10: omp.arraycpy.done6: 1832 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1833 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1834 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1835 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1836 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1837 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1838 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1839 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1840 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1841 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1842 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1843 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1844 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1845 // CHECK10: cond.true: 1846 // CHECK10-NEXT: br label [[COND_END:%.*]] 1847 // CHECK10: cond.false: 1848 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1849 // CHECK10-NEXT: br label [[COND_END]] 1850 // CHECK10: cond.end: 1851 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1852 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1853 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1854 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1855 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1856 // CHECK10: omp.inner.for.cond: 1857 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1858 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 1859 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1860 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1861 // CHECK10: omp.inner.for.cond.cleanup: 1862 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1863 // CHECK10: omp.inner.for.body: 1864 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1865 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 1866 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1867 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 1868 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 1869 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1870 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64 1871 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 1872 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 1873 // CHECK10-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !5 1874 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 1875 // CHECK10-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64 1876 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]] 1877 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1878 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 1879 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false), !llvm.access.group !5 1880 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1881 // CHECK10: omp.body.continue: 1882 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1883 // CHECK10: omp.inner.for.inc: 1884 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1885 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1 1886 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1887 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1888 // CHECK10: omp.inner.for.end: 1889 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1890 // CHECK10: omp.loop.exit: 1891 // CHECK10-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1892 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 1893 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 1894 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1895 // CHECK10-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1896 // CHECK10-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1897 // CHECK10: .omp.final.then: 1898 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1899 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1900 // CHECK10: .omp.final.done: 1901 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1902 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1903 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1904 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1905 // CHECK10: arraydestroy.body: 1906 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1907 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1908 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1909 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1910 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1911 // CHECK10: arraydestroy.done15: 1912 // CHECK10-NEXT: ret void 1913 // 1914 // 1915 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1916 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1917 // CHECK10-NEXT: entry: 1918 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1919 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1920 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1921 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1922 // CHECK10-NEXT: ret void 1923 // 1924 // 1925 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1926 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1927 // CHECK10-NEXT: entry: 1928 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1929 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1930 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1931 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1932 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1933 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1934 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1935 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1936 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1937 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1938 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1939 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1940 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1941 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1942 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1943 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1944 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1945 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1946 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1947 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1948 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1949 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1950 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1951 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1952 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1953 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1954 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1955 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1956 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1957 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1958 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1959 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1960 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1961 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1962 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1963 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1964 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1965 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 1966 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1967 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1968 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1969 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1970 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1971 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1972 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1973 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 1974 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1975 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1976 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1977 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1978 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1979 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1980 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1981 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8 1982 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1983 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1984 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1985 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1986 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1987 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1988 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1989 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8 1990 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1991 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1992 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1993 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1994 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1995 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1996 // CHECK10: omp_offload.failed: 1997 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1998 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1999 // CHECK10: omp_offload.cont: 2000 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2001 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2002 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2003 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2004 // CHECK10: arraydestroy.body: 2005 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2006 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2007 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2008 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2009 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2010 // CHECK10: arraydestroy.done2: 2011 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2012 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2013 // CHECK10-NEXT: ret i32 [[TMP32]] 2014 // 2015 // 2016 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2017 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2018 // CHECK10-NEXT: entry: 2019 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2020 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2021 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2022 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2023 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 2024 // CHECK10-NEXT: ret void 2025 // 2026 // 2027 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2028 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2029 // CHECK10-NEXT: entry: 2030 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2031 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2032 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2033 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2034 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2035 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2036 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2037 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 2038 // CHECK10-NEXT: ret void 2039 // 2040 // 2041 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2042 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2043 // CHECK10-NEXT: entry: 2044 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2045 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2046 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2047 // CHECK10-NEXT: ret void 2048 // 2049 // 2050 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2051 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2052 // CHECK10-NEXT: entry: 2053 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2054 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2055 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2056 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2057 // CHECK10-NEXT: ret void 2058 // 2059 // 2060 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2061 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2062 // CHECK10-NEXT: entry: 2063 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2064 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2065 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2066 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2067 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2068 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2069 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2070 // CHECK10-NEXT: ret void 2071 // 2072 // 2073 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2074 // CHECK10-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2075 // CHECK10-NEXT: entry: 2076 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2077 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2078 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2079 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2080 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2081 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2082 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2083 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2084 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2085 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2086 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2087 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2088 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2089 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2090 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2091 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2092 // CHECK10-NEXT: ret void 2093 // 2094 // 2095 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2096 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2097 // CHECK10-NEXT: entry: 2098 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2099 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2100 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2101 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2102 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2103 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2104 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2105 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2106 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2107 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2108 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2109 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2110 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2111 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2112 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2113 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2114 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2115 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2116 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2117 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2118 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2119 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2120 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2121 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2122 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2123 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2124 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2125 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2126 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2127 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2128 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2129 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2130 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 2131 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2132 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2133 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2134 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2135 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2136 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2137 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2138 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2139 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 2140 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2141 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2142 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2143 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2144 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2145 // CHECK10: omp.arraycpy.body: 2146 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2147 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2148 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2149 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2150 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 2151 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2152 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2153 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2154 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2155 // CHECK10: omp.arraycpy.done6: 2156 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 2157 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2158 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2159 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 2160 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2161 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2162 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2163 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2164 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2165 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2166 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2167 // CHECK10: cond.true: 2168 // CHECK10-NEXT: br label [[COND_END:%.*]] 2169 // CHECK10: cond.false: 2170 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2171 // CHECK10-NEXT: br label [[COND_END]] 2172 // CHECK10: cond.end: 2173 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2174 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2175 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2176 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2177 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2178 // CHECK10: omp.inner.for.cond: 2179 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2180 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2181 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2182 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2183 // CHECK10: omp.inner.for.cond.cleanup: 2184 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2185 // CHECK10: omp.inner.for.body: 2186 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2187 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2188 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2189 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 2190 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !11 2191 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 2192 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2193 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2194 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2195 // CHECK10-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !11 2196 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 2197 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64 2198 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 2199 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 2200 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 2201 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false), !llvm.access.group !11 2202 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2203 // CHECK10: omp.body.continue: 2204 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2205 // CHECK10: omp.inner.for.inc: 2206 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2207 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1 2208 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2209 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2210 // CHECK10: omp.inner.for.end: 2211 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2212 // CHECK10: omp.loop.exit: 2213 // CHECK10-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2214 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2215 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 2216 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2217 // CHECK10-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 2218 // CHECK10-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2219 // CHECK10: .omp.final.then: 2220 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 2221 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 2222 // CHECK10: .omp.final.done: 2223 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2224 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2225 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2226 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2227 // CHECK10: arraydestroy.body: 2228 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2229 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2230 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2231 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2232 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2233 // CHECK10: arraydestroy.done14: 2234 // CHECK10-NEXT: ret void 2235 // 2236 // 2237 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2238 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2239 // CHECK10-NEXT: entry: 2240 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2241 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2242 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2243 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2244 // CHECK10-NEXT: ret void 2245 // 2246 // 2247 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2248 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2249 // CHECK10-NEXT: entry: 2250 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2251 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2252 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2253 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2254 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2255 // CHECK10-NEXT: ret void 2256 // 2257 // 2258 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2259 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2260 // CHECK10-NEXT: entry: 2261 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2262 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2263 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2264 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2265 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2266 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2267 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2268 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2269 // CHECK10-NEXT: ret void 2270 // 2271 // 2272 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2273 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2274 // CHECK10-NEXT: entry: 2275 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2276 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2277 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2278 // CHECK10-NEXT: ret void 2279 // 2280 // 2281 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2282 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2283 // CHECK10-NEXT: entry: 2284 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2285 // CHECK10-NEXT: ret void 2286 // 2287 // 2288 // CHECK11-LABEL: define {{[^@]+}}@main 2289 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2290 // CHECK11-NEXT: entry: 2291 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2292 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2293 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2294 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2295 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2296 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2297 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2298 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2299 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2300 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2301 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2302 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2303 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2304 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2305 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2306 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2307 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2308 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2309 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2310 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2311 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2312 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2313 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2314 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2315 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2316 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2317 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2318 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2319 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2320 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2321 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2322 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2323 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2324 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2325 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2326 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2327 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2328 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2329 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2330 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2331 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2332 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 2333 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 2334 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2335 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2336 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2337 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2338 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2339 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2340 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2341 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 2342 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2343 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 2344 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2345 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2346 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 2347 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2348 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2349 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 2350 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2351 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 2352 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2353 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2354 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 2355 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2356 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2357 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 2358 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2359 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 2360 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2361 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 2362 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 2363 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2364 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 2365 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 2366 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 2367 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 2368 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2369 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2370 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2371 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2372 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2373 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2374 // CHECK11: omp_offload.failed: 2375 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 2376 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2377 // CHECK11: omp_offload.cont: 2378 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2379 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2380 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2381 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2382 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2383 // CHECK11: arraydestroy.body: 2384 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2385 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2386 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2387 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2388 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2389 // CHECK11: arraydestroy.done2: 2390 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2391 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2392 // CHECK11-NEXT: ret i32 [[TMP39]] 2393 // 2394 // 2395 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2396 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2397 // CHECK11-NEXT: entry: 2398 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2399 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2400 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2401 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2402 // CHECK11-NEXT: ret void 2403 // 2404 // 2405 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2406 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2407 // CHECK11-NEXT: entry: 2408 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2409 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2410 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2411 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2412 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2413 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2414 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2415 // CHECK11-NEXT: ret void 2416 // 2417 // 2418 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 2419 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2420 // CHECK11-NEXT: entry: 2421 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2422 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2423 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2424 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2425 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 2426 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2427 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2428 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2429 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2430 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2431 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 2432 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2433 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2434 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2435 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 2436 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2437 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 2438 // CHECK11-NEXT: ret void 2439 // 2440 // 2441 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2442 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2443 // CHECK11-NEXT: entry: 2444 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2445 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2446 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2447 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2448 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 2449 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 2450 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 2451 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2452 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2453 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2454 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2455 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2456 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2457 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2458 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2459 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2460 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2461 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2462 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2463 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 2464 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 2465 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2466 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2467 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2468 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2469 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2470 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2471 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 2472 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 2473 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2474 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2475 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 2476 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 2477 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 2478 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 2479 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2480 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 2481 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2482 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2483 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2484 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2485 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 2486 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 2487 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2488 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2489 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 2490 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2491 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 2492 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2493 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 2494 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2495 // CHECK11: omp.arraycpy.body: 2496 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2497 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2498 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2499 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2500 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 2501 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2502 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2503 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 2504 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2505 // CHECK11: omp.arraycpy.done6: 2506 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 2507 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 2508 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 2509 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 2510 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 2511 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 2512 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 2513 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2514 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2515 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2516 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2517 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 2518 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2519 // CHECK11: cond.true: 2520 // CHECK11-NEXT: br label [[COND_END:%.*]] 2521 // CHECK11: cond.false: 2522 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2523 // CHECK11-NEXT: br label [[COND_END]] 2524 // CHECK11: cond.end: 2525 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2526 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2527 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2528 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2529 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2530 // CHECK11: omp.inner.for.cond: 2531 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2532 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 2533 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 2534 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2535 // CHECK11: omp.inner.for.cond.cleanup: 2536 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2537 // CHECK11: omp.inner.for.body: 2538 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2539 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 2540 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2541 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 2542 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6 2543 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 2544 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]] 2545 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 2546 // CHECK11-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !6 2547 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 2548 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]] 2549 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 2550 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 2551 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false), !llvm.access.group !6 2552 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2553 // CHECK11: omp.body.continue: 2554 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2555 // CHECK11: omp.inner.for.inc: 2556 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2557 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 2558 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2559 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2560 // CHECK11: omp.inner.for.end: 2561 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2562 // CHECK11: omp.loop.exit: 2563 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2564 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 2565 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 2566 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2567 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2568 // CHECK11-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2569 // CHECK11: .omp.final.then: 2570 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2571 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2572 // CHECK11: .omp.final.done: 2573 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2574 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2575 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 2576 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2577 // CHECK11: arraydestroy.body: 2578 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2579 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2580 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2581 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2582 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2583 // CHECK11: arraydestroy.done14: 2584 // CHECK11-NEXT: ret void 2585 // 2586 // 2587 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2588 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2589 // CHECK11-NEXT: entry: 2590 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2591 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2592 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2593 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2594 // CHECK11-NEXT: ret void 2595 // 2596 // 2597 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2598 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2599 // CHECK11-NEXT: entry: 2600 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2601 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2602 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2603 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2604 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2605 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2606 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2607 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2608 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 2609 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 2610 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 2611 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2612 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2613 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2614 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2615 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2616 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2617 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2618 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2619 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2620 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2621 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 2622 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 2623 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2624 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2625 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2626 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2627 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2628 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2629 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2630 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2631 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2632 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2633 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2634 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2635 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2636 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2637 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2638 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2639 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 2640 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2641 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2642 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 2643 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2644 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2645 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2646 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2647 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 2648 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2649 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2650 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 2651 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2652 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 2653 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2654 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2655 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 2656 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2657 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2658 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 2659 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2660 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 2661 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2662 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2663 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2664 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2665 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2666 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2667 // CHECK11: omp_offload.failed: 2668 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2669 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2670 // CHECK11: omp_offload.cont: 2671 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2672 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2673 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2674 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2675 // CHECK11: arraydestroy.body: 2676 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2677 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2678 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2679 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2680 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2681 // CHECK11: arraydestroy.done2: 2682 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2683 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2684 // CHECK11-NEXT: ret i32 [[TMP32]] 2685 // 2686 // 2687 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2688 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2689 // CHECK11-NEXT: entry: 2690 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2691 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2692 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2693 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2694 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2695 // CHECK11-NEXT: ret void 2696 // 2697 // 2698 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2699 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2700 // CHECK11-NEXT: entry: 2701 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2702 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2703 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2704 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2705 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2706 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2707 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2708 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2709 // CHECK11-NEXT: ret void 2710 // 2711 // 2712 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2713 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2714 // CHECK11-NEXT: entry: 2715 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2716 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2717 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2718 // CHECK11-NEXT: ret void 2719 // 2720 // 2721 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2722 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2723 // CHECK11-NEXT: entry: 2724 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2725 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2726 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2727 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2728 // CHECK11-NEXT: ret void 2729 // 2730 // 2731 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2732 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2733 // CHECK11-NEXT: entry: 2734 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2735 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2736 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2737 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2738 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2739 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2740 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2741 // CHECK11-NEXT: ret void 2742 // 2743 // 2744 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2745 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2746 // CHECK11-NEXT: entry: 2747 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2748 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2749 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2750 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2751 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2752 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2753 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2754 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2755 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2756 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2757 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2758 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2759 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 2760 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2761 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2762 // CHECK11-NEXT: ret void 2763 // 2764 // 2765 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2766 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2767 // CHECK11-NEXT: entry: 2768 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2769 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2770 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2771 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 2772 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 2773 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 2774 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 2775 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2776 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2777 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2778 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2779 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2780 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2781 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2782 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2783 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2784 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2785 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2786 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 2787 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2788 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2789 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2790 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2791 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 2792 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2793 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 2794 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2795 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 2796 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 2797 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 2798 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 2799 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 2800 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 2801 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2802 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2803 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2804 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2805 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2806 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2807 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2808 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2809 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 2810 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2811 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2812 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2813 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2814 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2815 // CHECK11: omp.arraycpy.body: 2816 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2817 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2818 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2819 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2820 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 2821 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2822 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2823 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2824 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2825 // CHECK11: omp.arraycpy.done6: 2826 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 2827 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2828 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2829 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 2830 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 2831 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2832 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2833 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2834 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2835 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2836 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2837 // CHECK11: cond.true: 2838 // CHECK11-NEXT: br label [[COND_END:%.*]] 2839 // CHECK11: cond.false: 2840 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2841 // CHECK11-NEXT: br label [[COND_END]] 2842 // CHECK11: cond.end: 2843 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2844 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2845 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2846 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2848 // CHECK11: omp.inner.for.cond: 2849 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2850 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2851 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2852 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2853 // CHECK11: omp.inner.for.cond.cleanup: 2854 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2855 // CHECK11: omp.inner.for.body: 2856 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2857 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2858 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2859 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 2860 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !12 2861 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 2862 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]] 2863 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 2864 // CHECK11-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !12 2865 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 2866 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]] 2867 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 2868 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 2869 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false), !llvm.access.group !12 2870 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2871 // CHECK11: omp.body.continue: 2872 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2873 // CHECK11: omp.inner.for.inc: 2874 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2875 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 2876 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2877 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2878 // CHECK11: omp.inner.for.end: 2879 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2880 // CHECK11: omp.loop.exit: 2881 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2882 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2883 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 2884 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2885 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 2886 // CHECK11-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2887 // CHECK11: .omp.final.then: 2888 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2889 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2890 // CHECK11: .omp.final.done: 2891 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2892 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2893 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 2894 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2895 // CHECK11: arraydestroy.body: 2896 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2897 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2898 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2899 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2900 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2901 // CHECK11: arraydestroy.done13: 2902 // CHECK11-NEXT: ret void 2903 // 2904 // 2905 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2906 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2907 // CHECK11-NEXT: entry: 2908 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2909 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2910 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2911 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2912 // CHECK11-NEXT: ret void 2913 // 2914 // 2915 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2916 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2917 // CHECK11-NEXT: entry: 2918 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2919 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2920 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2921 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2922 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2923 // CHECK11-NEXT: ret void 2924 // 2925 // 2926 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2927 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2928 // CHECK11-NEXT: entry: 2929 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2930 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2931 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2932 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2933 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2934 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2935 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2936 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2937 // CHECK11-NEXT: ret void 2938 // 2939 // 2940 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2941 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2942 // CHECK11-NEXT: entry: 2943 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2944 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2945 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2946 // CHECK11-NEXT: ret void 2947 // 2948 // 2949 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2950 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2951 // CHECK11-NEXT: entry: 2952 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2953 // CHECK11-NEXT: ret void 2954 // 2955 // 2956 // CHECK12-LABEL: define {{[^@]+}}@main 2957 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2958 // CHECK12-NEXT: entry: 2959 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2960 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2961 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2962 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2963 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2964 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2965 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2966 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2967 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 2968 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2969 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 2970 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 2971 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 2972 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 2973 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2974 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2975 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2976 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2977 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2978 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2979 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2980 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2981 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2982 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2983 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2984 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2985 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 2986 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 2987 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2988 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 2989 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2990 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2991 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2992 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 2993 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 2994 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2995 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 2996 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2997 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2998 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2999 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3000 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3001 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 3002 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3003 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 3004 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3005 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3006 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3007 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3008 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 3009 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 3010 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3011 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4 3012 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3013 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 3014 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 3015 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3016 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 3017 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 3018 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3019 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4 3020 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3021 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3022 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 3023 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3024 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 3025 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 3026 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3027 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4 3028 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3029 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3030 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3031 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3032 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3033 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 3034 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3035 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4 3036 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3037 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3038 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 3039 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3040 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3041 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3042 // CHECK12: omp_offload.failed: 3043 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3044 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3045 // CHECK12: omp_offload.cont: 3046 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3047 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3048 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3049 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3050 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3051 // CHECK12: arraydestroy.body: 3052 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3053 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3054 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3055 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3056 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3057 // CHECK12: arraydestroy.done2: 3058 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3059 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3060 // CHECK12-NEXT: ret i32 [[TMP39]] 3061 // 3062 // 3063 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3064 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3065 // CHECK12-NEXT: entry: 3066 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3067 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3068 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3069 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3070 // CHECK12-NEXT: ret void 3071 // 3072 // 3073 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3074 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3075 // CHECK12-NEXT: entry: 3076 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3077 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3078 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3079 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3080 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3081 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3082 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3083 // CHECK12-NEXT: ret void 3084 // 3085 // 3086 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 3087 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3088 // CHECK12-NEXT: entry: 3089 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3090 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3091 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3092 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3093 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3094 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3095 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3096 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3097 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3098 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3099 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3100 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3101 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3102 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3103 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3104 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3105 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3106 // CHECK12-NEXT: ret void 3107 // 3108 // 3109 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3110 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3111 // CHECK12-NEXT: entry: 3112 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3113 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3114 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3115 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3116 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3117 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3118 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3119 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3120 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3121 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3122 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3123 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3124 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3125 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3126 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3127 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3128 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3129 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 3130 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3131 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 3132 // CHECK12-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 3133 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3134 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3135 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3136 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3137 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3138 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3139 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3140 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3141 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3142 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3143 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3144 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3145 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3146 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3147 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3148 // CHECK12-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 3149 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3150 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3151 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3152 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3153 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 3154 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 3155 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3156 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3157 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 3158 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3159 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 3160 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3161 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 3162 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3163 // CHECK12: omp.arraycpy.body: 3164 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3165 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3166 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3167 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3168 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 3169 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3170 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3171 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 3172 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3173 // CHECK12: omp.arraycpy.done6: 3174 // CHECK12-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 3175 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 3176 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 3177 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3178 // CHECK12-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 3179 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 3180 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 3181 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3182 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3183 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3184 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3185 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 3186 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3187 // CHECK12: cond.true: 3188 // CHECK12-NEXT: br label [[COND_END:%.*]] 3189 // CHECK12: cond.false: 3190 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3191 // CHECK12-NEXT: br label [[COND_END]] 3192 // CHECK12: cond.end: 3193 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 3194 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3195 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3196 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 3197 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3198 // CHECK12: omp.inner.for.cond: 3199 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3200 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 3201 // CHECK12-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 3202 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3203 // CHECK12: omp.inner.for.cond.cleanup: 3204 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3205 // CHECK12: omp.inner.for.body: 3206 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3207 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1 3208 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3209 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 3210 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6 3211 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3212 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]] 3213 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 3214 // CHECK12-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !6 3215 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3216 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]] 3217 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* 3218 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8* 3219 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false), !llvm.access.group !6 3220 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3221 // CHECK12: omp.body.continue: 3222 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3223 // CHECK12: omp.inner.for.inc: 3224 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3225 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 3226 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3227 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3228 // CHECK12: omp.inner.for.end: 3229 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3230 // CHECK12: omp.loop.exit: 3231 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3232 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 3233 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 3234 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3235 // CHECK12-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3236 // CHECK12-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3237 // CHECK12: .omp.final.then: 3238 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3239 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3240 // CHECK12: .omp.final.done: 3241 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3242 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3243 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 3244 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3245 // CHECK12: arraydestroy.body: 3246 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3247 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3248 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3249 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3250 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3251 // CHECK12: arraydestroy.done14: 3252 // CHECK12-NEXT: ret void 3253 // 3254 // 3255 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3256 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3257 // CHECK12-NEXT: entry: 3258 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3259 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3260 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3261 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3262 // CHECK12-NEXT: ret void 3263 // 3264 // 3265 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3266 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3267 // CHECK12-NEXT: entry: 3268 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3269 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3270 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3271 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3272 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3273 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3274 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3275 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3276 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3277 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3278 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3279 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3280 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3281 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3282 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3283 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3284 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3285 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3286 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3287 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3288 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3289 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3290 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3291 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3292 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3293 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3294 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3295 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3296 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3297 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3298 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3299 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3300 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3301 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3302 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3303 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3304 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 3305 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3306 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3307 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3308 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3309 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3310 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3311 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3312 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 3313 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3314 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3315 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3316 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3317 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3318 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3319 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3320 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4 3321 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3322 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3323 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3324 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3325 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3326 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3327 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3328 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4 3329 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3330 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3331 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 3332 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3333 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3334 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3335 // CHECK12: omp_offload.failed: 3336 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3337 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3338 // CHECK12: omp_offload.cont: 3339 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3340 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3341 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3342 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3343 // CHECK12: arraydestroy.body: 3344 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3345 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3346 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3347 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3348 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3349 // CHECK12: arraydestroy.done2: 3350 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3351 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3352 // CHECK12-NEXT: ret i32 [[TMP32]] 3353 // 3354 // 3355 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3356 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3357 // CHECK12-NEXT: entry: 3358 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3359 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3360 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3361 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3362 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3363 // CHECK12-NEXT: ret void 3364 // 3365 // 3366 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3367 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3368 // CHECK12-NEXT: entry: 3369 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3370 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3371 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3372 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3373 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3374 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3375 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3376 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3377 // CHECK12-NEXT: ret void 3378 // 3379 // 3380 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3381 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3382 // CHECK12-NEXT: entry: 3383 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3384 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3385 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3386 // CHECK12-NEXT: ret void 3387 // 3388 // 3389 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3390 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3391 // CHECK12-NEXT: entry: 3392 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3393 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3394 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3395 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3396 // CHECK12-NEXT: ret void 3397 // 3398 // 3399 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3400 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3401 // CHECK12-NEXT: entry: 3402 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3403 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3404 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3405 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3406 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3407 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3408 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3409 // CHECK12-NEXT: ret void 3410 // 3411 // 3412 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3413 // CHECK12-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3414 // CHECK12-NEXT: entry: 3415 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3416 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3417 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3418 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3419 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3420 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3421 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3422 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3423 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3424 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3425 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3426 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3427 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3428 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3429 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3430 // CHECK12-NEXT: ret void 3431 // 3432 // 3433 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3434 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3435 // CHECK12-NEXT: entry: 3436 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3437 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3438 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3439 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3440 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3441 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3442 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3443 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3444 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3445 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3446 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3447 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3448 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3449 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3450 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3451 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3452 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3453 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3454 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 3455 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3456 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3457 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3458 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3459 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3460 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3461 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3462 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3463 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3464 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3465 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3466 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3467 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3468 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 3469 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3470 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3471 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3472 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3473 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3474 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 3475 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3476 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3477 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 3478 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3479 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 3480 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3481 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 3482 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3483 // CHECK12: omp.arraycpy.body: 3484 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3485 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3486 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3487 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3488 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 3489 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3490 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3491 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3492 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3493 // CHECK12: omp.arraycpy.done6: 3494 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 3495 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3496 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3497 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 3498 // CHECK12-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 3499 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3500 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 3501 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3502 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3503 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 3504 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3505 // CHECK12: cond.true: 3506 // CHECK12-NEXT: br label [[COND_END:%.*]] 3507 // CHECK12: cond.false: 3508 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3509 // CHECK12-NEXT: br label [[COND_END]] 3510 // CHECK12: cond.end: 3511 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3512 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3513 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3514 // CHECK12-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3515 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3516 // CHECK12: omp.inner.for.cond: 3517 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3518 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3519 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3520 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3521 // CHECK12: omp.inner.for.cond.cleanup: 3522 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3523 // CHECK12: omp.inner.for.body: 3524 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3525 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3526 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3527 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 3528 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !12 3529 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3530 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]] 3531 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3532 // CHECK12-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !12 3533 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3534 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]] 3535 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8* 3536 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8* 3537 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false), !llvm.access.group !12 3538 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3539 // CHECK12: omp.body.continue: 3540 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3541 // CHECK12: omp.inner.for.inc: 3542 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3543 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 3544 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3545 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3546 // CHECK12: omp.inner.for.end: 3547 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3548 // CHECK12: omp.loop.exit: 3549 // CHECK12-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3550 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3551 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]]) 3552 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3553 // CHECK12-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 3554 // CHECK12-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3555 // CHECK12: .omp.final.then: 3556 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3557 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3558 // CHECK12: .omp.final.done: 3559 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3560 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3561 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 3562 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3563 // CHECK12: arraydestroy.body: 3564 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3565 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3566 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3567 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 3568 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 3569 // CHECK12: arraydestroy.done13: 3570 // CHECK12-NEXT: ret void 3571 // 3572 // 3573 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3574 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3575 // CHECK12-NEXT: entry: 3576 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3577 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3578 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3579 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3580 // CHECK12-NEXT: ret void 3581 // 3582 // 3583 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3584 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3585 // CHECK12-NEXT: entry: 3586 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3587 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3588 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3589 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3590 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3591 // CHECK12-NEXT: ret void 3592 // 3593 // 3594 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3595 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3596 // CHECK12-NEXT: entry: 3597 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3598 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3599 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3600 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3601 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3602 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3603 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3604 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3605 // CHECK12-NEXT: ret void 3606 // 3607 // 3608 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3609 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3610 // CHECK12-NEXT: entry: 3611 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3612 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3613 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3614 // CHECK12-NEXT: ret void 3615 // 3616 // 3617 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3618 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3619 // CHECK12-NEXT: entry: 3620 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3621 // CHECK12-NEXT: ret void 3622 // 3623 // 3624 // CHECK13-LABEL: define {{[^@]+}}@main 3625 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3626 // CHECK13-NEXT: entry: 3627 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3628 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3629 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3630 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3631 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3632 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3633 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3634 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3635 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3636 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3637 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 3638 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3639 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3640 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3641 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3642 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3643 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3644 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3645 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3646 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3647 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3648 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3649 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3650 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3651 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3652 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3653 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3654 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3655 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3656 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3657 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3658 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3659 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3660 // CHECK13-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 3661 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3662 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3663 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3664 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3665 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3666 // CHECK13: omp.inner.for.cond: 3667 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3668 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3669 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3670 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3671 // CHECK13: omp.inner.for.body: 3672 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3673 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3674 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3675 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3676 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2 3677 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3678 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3679 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3680 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3681 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !2 3682 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3683 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 3684 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 3685 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3686 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 3687 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 3688 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3689 // CHECK13: omp.body.continue: 3690 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3691 // CHECK13: omp.inner.for.inc: 3692 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3693 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 3694 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3695 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3696 // CHECK13: omp.inner.for.end: 3697 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3698 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 3699 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3700 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3701 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3702 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3703 // CHECK13: arraydestroy.body: 3704 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3705 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3706 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 3707 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3708 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3709 // CHECK13: arraydestroy.done7: 3710 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3711 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3712 // CHECK13-NEXT: ret i32 [[TMP17]] 3713 // 3714 // 3715 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3716 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3717 // CHECK13-NEXT: entry: 3718 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3719 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3720 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3721 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3722 // CHECK13-NEXT: ret void 3723 // 3724 // 3725 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3726 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3727 // CHECK13-NEXT: entry: 3728 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3729 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3730 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3731 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3732 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3733 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3734 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3735 // CHECK13-NEXT: ret void 3736 // 3737 // 3738 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3739 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3740 // CHECK13-NEXT: entry: 3741 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3742 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3743 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3744 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3745 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3746 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3747 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3748 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3749 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 3750 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3751 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3752 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3753 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3754 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3755 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3756 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3757 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3758 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3759 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3760 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 3761 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3762 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 3763 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3764 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3765 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 3766 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 3767 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3768 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 3769 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3770 // CHECK13-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 3771 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3772 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3773 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3774 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3775 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3776 // CHECK13: omp.inner.for.cond: 3777 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3778 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 3779 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3780 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3781 // CHECK13: omp.inner.for.body: 3782 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3783 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3784 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3785 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 3786 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 3787 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3788 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3789 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3790 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 3791 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !6 3792 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3793 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 3794 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 3795 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 3796 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 3797 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 3798 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3799 // CHECK13: omp.body.continue: 3800 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3801 // CHECK13: omp.inner.for.inc: 3802 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3803 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 3804 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3805 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3806 // CHECK13: omp.inner.for.end: 3807 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3808 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3809 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3810 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3811 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3812 // CHECK13: arraydestroy.body: 3813 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3814 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3815 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3816 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3817 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3818 // CHECK13: arraydestroy.done7: 3819 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3820 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3821 // CHECK13-NEXT: ret i32 [[TMP17]] 3822 // 3823 // 3824 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3825 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3826 // CHECK13-NEXT: entry: 3827 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3828 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3829 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3830 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3831 // CHECK13-NEXT: ret void 3832 // 3833 // 3834 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3835 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3836 // CHECK13-NEXT: entry: 3837 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3838 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3839 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3840 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3841 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3842 // CHECK13-NEXT: ret void 3843 // 3844 // 3845 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3846 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3847 // CHECK13-NEXT: entry: 3848 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3849 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3850 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3851 // CHECK13-NEXT: ret void 3852 // 3853 // 3854 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3855 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3856 // CHECK13-NEXT: entry: 3857 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3858 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3859 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3860 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3861 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3862 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3863 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3864 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3865 // CHECK13-NEXT: ret void 3866 // 3867 // 3868 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3869 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3870 // CHECK13-NEXT: entry: 3871 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3872 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3873 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3874 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3875 // CHECK13-NEXT: ret void 3876 // 3877 // 3878 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3879 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3880 // CHECK13-NEXT: entry: 3881 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3882 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3883 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3884 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3885 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3886 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3887 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 3888 // CHECK13-NEXT: ret void 3889 // 3890 // 3891 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3892 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3893 // CHECK13-NEXT: entry: 3894 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3895 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3896 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3897 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3898 // CHECK13-NEXT: ret void 3899 // 3900 // 3901 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3902 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3903 // CHECK13-NEXT: entry: 3904 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3905 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3906 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3907 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3908 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3909 // CHECK13-NEXT: ret void 3910 // 3911 // 3912 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3913 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3914 // CHECK13-NEXT: entry: 3915 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3916 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3917 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3918 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3919 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3920 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3921 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3922 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3923 // CHECK13-NEXT: ret void 3924 // 3925 // 3926 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3927 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3928 // CHECK13-NEXT: entry: 3929 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3930 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3931 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3932 // CHECK13-NEXT: ret void 3933 // 3934 // 3935 // CHECK14-LABEL: define {{[^@]+}}@main 3936 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3937 // CHECK14-NEXT: entry: 3938 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3939 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3940 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3941 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3942 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3943 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3944 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3945 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3946 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3947 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3948 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 3949 // CHECK14-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 3950 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3951 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3952 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3953 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3954 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3955 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3956 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3957 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3958 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3959 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3960 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3961 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3962 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3963 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3964 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3965 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3966 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 3967 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 3968 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3969 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 3970 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 3971 // CHECK14-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 3972 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3973 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3974 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3975 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3976 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3977 // CHECK14: omp.inner.for.cond: 3978 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3979 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3980 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3981 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3982 // CHECK14: omp.inner.for.body: 3983 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3984 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3985 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3986 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3987 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2 3988 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3989 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 3990 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 3991 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3992 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !2 3993 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3994 // CHECK14-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 3995 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 3996 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3997 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 3998 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 3999 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4000 // CHECK14: omp.body.continue: 4001 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4002 // CHECK14: omp.inner.for.inc: 4003 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4004 // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 4005 // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4006 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4007 // CHECK14: omp.inner.for.end: 4008 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4009 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 4010 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4011 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4012 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 4013 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4014 // CHECK14: arraydestroy.body: 4015 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4016 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4017 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4018 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4019 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4020 // CHECK14: arraydestroy.done7: 4021 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4022 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4023 // CHECK14-NEXT: ret i32 [[TMP17]] 4024 // 4025 // 4026 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4027 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4028 // CHECK14-NEXT: entry: 4029 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4030 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4031 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4032 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4033 // CHECK14-NEXT: ret void 4034 // 4035 // 4036 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4037 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4038 // CHECK14-NEXT: entry: 4039 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4040 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4041 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4042 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4043 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4044 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4045 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4046 // CHECK14-NEXT: ret void 4047 // 4048 // 4049 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4050 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 4051 // CHECK14-NEXT: entry: 4052 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4053 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4054 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4055 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4056 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4057 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 4058 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 4059 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 4060 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 4061 // CHECK14-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4062 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4063 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4064 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4065 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4066 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4067 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4068 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4069 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 4070 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 4071 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 4072 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 4073 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 4074 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 4075 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4076 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 4077 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 4078 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 4079 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 4080 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 4081 // CHECK14-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 4082 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4083 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4084 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4085 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4086 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4087 // CHECK14: omp.inner.for.cond: 4088 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4089 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4090 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4091 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4092 // CHECK14: omp.inner.for.body: 4093 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4094 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4095 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4096 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4097 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 4098 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4099 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 4100 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 4101 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4102 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !6 4103 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4104 // CHECK14-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 4105 // CHECK14-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 4106 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 4107 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4108 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 4109 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4110 // CHECK14: omp.body.continue: 4111 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4112 // CHECK14: omp.inner.for.inc: 4113 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4114 // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 4115 // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4116 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4117 // CHECK14: omp.inner.for.end: 4118 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4119 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4120 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4121 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 4122 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4123 // CHECK14: arraydestroy.body: 4124 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4125 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4126 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4127 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4128 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4129 // CHECK14: arraydestroy.done7: 4130 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4131 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4132 // CHECK14-NEXT: ret i32 [[TMP17]] 4133 // 4134 // 4135 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4136 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4137 // CHECK14-NEXT: entry: 4138 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4139 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4140 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4141 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4142 // CHECK14-NEXT: ret void 4143 // 4144 // 4145 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4146 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4147 // CHECK14-NEXT: entry: 4148 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4149 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4150 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4151 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4152 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4153 // CHECK14-NEXT: ret void 4154 // 4155 // 4156 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4157 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4158 // CHECK14-NEXT: entry: 4159 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4160 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4161 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4162 // CHECK14-NEXT: ret void 4163 // 4164 // 4165 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4166 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4167 // CHECK14-NEXT: entry: 4168 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4169 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4170 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4171 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4172 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4173 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4174 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4175 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4176 // CHECK14-NEXT: ret void 4177 // 4178 // 4179 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4180 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4181 // CHECK14-NEXT: entry: 4182 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4183 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4184 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4185 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4186 // CHECK14-NEXT: ret void 4187 // 4188 // 4189 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4190 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4191 // CHECK14-NEXT: entry: 4192 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4193 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4194 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4195 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4196 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4197 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4198 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 4199 // CHECK14-NEXT: ret void 4200 // 4201 // 4202 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4203 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4204 // CHECK14-NEXT: entry: 4205 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4206 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4207 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4208 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4209 // CHECK14-NEXT: ret void 4210 // 4211 // 4212 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4213 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4214 // CHECK14-NEXT: entry: 4215 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4216 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4217 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4218 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4219 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4220 // CHECK14-NEXT: ret void 4221 // 4222 // 4223 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4224 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4225 // CHECK14-NEXT: entry: 4226 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4227 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4228 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4229 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4230 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4231 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4232 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4233 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4234 // CHECK14-NEXT: ret void 4235 // 4236 // 4237 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4238 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4239 // CHECK14-NEXT: entry: 4240 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4241 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4242 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4243 // CHECK14-NEXT: ret void 4244 // 4245 // 4246 // CHECK15-LABEL: define {{[^@]+}}@main 4247 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4248 // CHECK15-NEXT: entry: 4249 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4250 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4251 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4252 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4253 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4254 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4255 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4256 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4257 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4258 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4259 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 4260 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4261 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4262 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4263 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4264 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4265 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4266 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4267 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4268 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4269 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4270 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4271 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4272 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4273 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4274 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4275 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4276 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4277 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4278 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4279 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4280 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4281 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4282 // CHECK15-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 4283 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4284 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4285 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4286 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4287 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4288 // CHECK15: omp.inner.for.cond: 4289 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4290 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4291 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4292 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4293 // CHECK15: omp.inner.for.body: 4294 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4295 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4296 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4297 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4298 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3 4299 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4300 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 4301 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4302 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !3 4303 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4304 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]] 4305 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 4306 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4307 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 4308 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4309 // CHECK15: omp.body.continue: 4310 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4311 // CHECK15: omp.inner.for.inc: 4312 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4313 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 4314 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4315 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4316 // CHECK15: omp.inner.for.end: 4317 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4318 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4319 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4320 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4321 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4322 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4323 // CHECK15: arraydestroy.body: 4324 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4325 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4326 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4327 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4328 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 4329 // CHECK15: arraydestroy.done6: 4330 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4331 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4332 // CHECK15-NEXT: ret i32 [[TMP17]] 4333 // 4334 // 4335 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4336 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4337 // CHECK15-NEXT: entry: 4338 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4339 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4340 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4341 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4342 // CHECK15-NEXT: ret void 4343 // 4344 // 4345 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4346 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4347 // CHECK15-NEXT: entry: 4348 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4349 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4350 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4351 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4352 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4353 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4354 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4355 // CHECK15-NEXT: ret void 4356 // 4357 // 4358 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4359 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4360 // CHECK15-NEXT: entry: 4361 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4362 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4363 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4364 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4365 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4366 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4367 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4368 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4369 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 4370 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4371 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4372 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4373 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4374 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4375 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4376 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4377 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4378 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4379 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4380 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4381 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4382 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4383 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4384 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4385 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4386 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4387 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4388 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4389 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4390 // CHECK15-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 4391 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4392 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4393 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4394 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4395 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4396 // CHECK15: omp.inner.for.cond: 4397 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4398 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 4399 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4400 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4401 // CHECK15: omp.inner.for.body: 4402 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4403 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4404 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4405 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 4406 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 4407 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4408 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 4409 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 4410 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !7 4411 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4412 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP12]] 4413 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 4414 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4415 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 4416 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4417 // CHECK15: omp.body.continue: 4418 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4419 // CHECK15: omp.inner.for.inc: 4420 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4421 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 4422 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4423 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 4424 // CHECK15: omp.inner.for.end: 4425 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4426 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4427 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4428 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4429 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4430 // CHECK15: arraydestroy.body: 4431 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4432 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4433 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4434 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4435 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 4436 // CHECK15: arraydestroy.done6: 4437 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4438 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4439 // CHECK15-NEXT: ret i32 [[TMP17]] 4440 // 4441 // 4442 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4443 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4444 // CHECK15-NEXT: entry: 4445 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4446 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4447 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4448 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4449 // CHECK15-NEXT: ret void 4450 // 4451 // 4452 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4453 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4454 // CHECK15-NEXT: entry: 4455 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4456 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4457 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4458 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4459 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4460 // CHECK15-NEXT: ret void 4461 // 4462 // 4463 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4464 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4465 // CHECK15-NEXT: entry: 4466 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4467 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4468 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4469 // CHECK15-NEXT: ret void 4470 // 4471 // 4472 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4473 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4474 // CHECK15-NEXT: entry: 4475 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4476 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4477 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4478 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4479 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4480 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4481 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4482 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4483 // CHECK15-NEXT: ret void 4484 // 4485 // 4486 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4487 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4488 // CHECK15-NEXT: entry: 4489 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4490 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4491 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4492 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4493 // CHECK15-NEXT: ret void 4494 // 4495 // 4496 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4497 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4498 // CHECK15-NEXT: entry: 4499 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4500 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4501 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4502 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4503 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4504 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4505 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4506 // CHECK15-NEXT: ret void 4507 // 4508 // 4509 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4510 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4511 // CHECK15-NEXT: entry: 4512 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4513 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4514 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4515 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4516 // CHECK15-NEXT: ret void 4517 // 4518 // 4519 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4520 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4521 // CHECK15-NEXT: entry: 4522 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4523 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4524 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4525 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4526 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4527 // CHECK15-NEXT: ret void 4528 // 4529 // 4530 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4531 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4532 // CHECK15-NEXT: entry: 4533 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4534 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4535 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4536 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4537 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4538 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4539 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4540 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4541 // CHECK15-NEXT: ret void 4542 // 4543 // 4544 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4545 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4546 // CHECK15-NEXT: entry: 4547 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4548 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4549 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4550 // CHECK15-NEXT: ret void 4551 // 4552 // 4553 // CHECK16-LABEL: define {{[^@]+}}@main 4554 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4555 // CHECK16-NEXT: entry: 4556 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4557 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4558 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4559 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4560 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4561 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4562 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4563 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4564 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4565 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4566 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 4567 // CHECK16-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4568 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4569 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4570 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4571 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4572 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4573 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4574 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4575 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4576 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4577 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4578 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4579 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4580 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4581 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4582 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4583 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4584 // CHECK16-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4585 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4586 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4587 // CHECK16-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 4588 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4589 // CHECK16-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 4590 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4591 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4592 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4593 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4594 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4595 // CHECK16: omp.inner.for.cond: 4596 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4597 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4598 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4599 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4600 // CHECK16: omp.inner.for.body: 4601 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4602 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4603 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4604 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4605 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3 4606 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4607 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 4608 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4609 // CHECK16-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !3 4610 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4611 // CHECK16-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]] 4612 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 4613 // CHECK16-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4614 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 4615 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4616 // CHECK16: omp.body.continue: 4617 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4618 // CHECK16: omp.inner.for.inc: 4619 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4620 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 4621 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4622 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4623 // CHECK16: omp.inner.for.end: 4624 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 4625 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4626 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4627 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4628 // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4629 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4630 // CHECK16: arraydestroy.body: 4631 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4632 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4633 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 4634 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4635 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 4636 // CHECK16: arraydestroy.done6: 4637 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4638 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4639 // CHECK16-NEXT: ret i32 [[TMP17]] 4640 // 4641 // 4642 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4643 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4644 // CHECK16-NEXT: entry: 4645 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4646 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4647 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4648 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4649 // CHECK16-NEXT: ret void 4650 // 4651 // 4652 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4653 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4654 // CHECK16-NEXT: entry: 4655 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4656 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4657 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4658 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4659 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4660 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4661 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4662 // CHECK16-NEXT: ret void 4663 // 4664 // 4665 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4666 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4667 // CHECK16-NEXT: entry: 4668 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4669 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4670 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4671 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4672 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4673 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4674 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4675 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4676 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 4677 // CHECK16-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4678 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4679 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4680 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4681 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4682 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4683 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4684 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4685 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4686 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4687 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4688 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4689 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4690 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4691 // CHECK16-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4692 // CHECK16-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4693 // CHECK16-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4694 // CHECK16-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4695 // CHECK16-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 4696 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4697 // CHECK16-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 4698 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4699 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4700 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4701 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4702 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4703 // CHECK16: omp.inner.for.cond: 4704 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4705 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 4706 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4707 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4708 // CHECK16: omp.inner.for.body: 4709 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4710 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4711 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4712 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 4713 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 4714 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4715 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 4716 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 4717 // CHECK16-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !7 4718 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4719 // CHECK16-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP12]] 4720 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 4721 // CHECK16-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4722 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 4723 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4724 // CHECK16: omp.body.continue: 4725 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4726 // CHECK16: omp.inner.for.inc: 4727 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4728 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 4729 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4730 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 4731 // CHECK16: omp.inner.for.end: 4732 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 4733 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4734 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4735 // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4736 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4737 // CHECK16: arraydestroy.body: 4738 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4739 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4740 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4741 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4742 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 4743 // CHECK16: arraydestroy.done6: 4744 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4745 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 4746 // CHECK16-NEXT: ret i32 [[TMP17]] 4747 // 4748 // 4749 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4750 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4751 // CHECK16-NEXT: entry: 4752 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4753 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4754 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4755 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4756 // CHECK16-NEXT: ret void 4757 // 4758 // 4759 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4760 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4761 // CHECK16-NEXT: entry: 4762 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4763 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4764 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4765 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4766 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4767 // CHECK16-NEXT: ret void 4768 // 4769 // 4770 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4771 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4772 // CHECK16-NEXT: entry: 4773 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4774 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4775 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4776 // CHECK16-NEXT: ret void 4777 // 4778 // 4779 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4780 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4781 // CHECK16-NEXT: entry: 4782 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4783 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4784 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4785 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4786 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4787 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4788 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4789 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4790 // CHECK16-NEXT: ret void 4791 // 4792 // 4793 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4794 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4795 // CHECK16-NEXT: entry: 4796 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4797 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4798 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4799 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4800 // CHECK16-NEXT: ret void 4801 // 4802 // 4803 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4804 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4805 // CHECK16-NEXT: entry: 4806 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4807 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4808 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4809 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4810 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4811 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4812 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4813 // CHECK16-NEXT: ret void 4814 // 4815 // 4816 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4817 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4818 // CHECK16-NEXT: entry: 4819 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4820 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4821 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4822 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4823 // CHECK16-NEXT: ret void 4824 // 4825 // 4826 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4827 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4828 // CHECK16-NEXT: entry: 4829 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4830 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4831 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4832 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4833 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4834 // CHECK16-NEXT: ret void 4835 // 4836 // 4837 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4838 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4839 // CHECK16-NEXT: entry: 4840 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4841 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4842 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4843 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4844 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4845 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4846 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4847 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4848 // CHECK16-NEXT: ret void 4849 // 4850 // 4851 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4852 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4853 // CHECK16-NEXT: entry: 4854 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4855 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4856 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4857 // CHECK16-NEXT: ret void 4858 // 4859