1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 3; 75 sfvar = 4.0; 76 [&]() { 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 8.0; 81 82 }(); 83 } 84 }(); 85 return 0; 86 #else 87 S<float> test; 88 int t_var = 0; 89 int vec[] = {1, 2}; 90 S<float> s_arr[] = {1, 2}; 91 S<float> &var = test; 92 93 #pragma omp target 94 #pragma omp teams 95 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var, svar) 96 for (int i = 0; i < 2; ++i) { 97 vec[i] = t_var; 98 s_arr[i] = var; 99 } 100 int i; 101 102 #pragma omp target 103 #pragma omp teams 104 #pragma omp distribute private(i) 105 for (i = 0; i < 2; ++i) { 106 ; 107 } 108 return tmain<int>(); 109 #endif 110 } 111 112 113 114 115 116 #endif 117 // CHECK1-LABEL: define {{[^@]+}}@main 118 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 119 // CHECK1-NEXT: entry: 120 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 122 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 123 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 124 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 125 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 126 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 127 // CHECK1-NEXT: ret i32 0 128 // 129 // 130 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 131 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 132 // CHECK1-NEXT: entry: 133 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 134 // CHECK1-NEXT: ret void 135 // 136 // 137 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 138 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 141 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 145 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 146 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 150 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 151 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 152 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 154 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 156 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 157 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 158 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 160 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 163 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 164 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 166 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 169 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 170 // CHECK1: cond.true: 171 // CHECK1-NEXT: br label [[COND_END:%.*]] 172 // CHECK1: cond.false: 173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 174 // CHECK1-NEXT: br label [[COND_END]] 175 // CHECK1: cond.end: 176 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 177 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 179 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 181 // CHECK1: omp.inner.for.cond: 182 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 184 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 185 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 186 // CHECK1: omp.inner.for.body: 187 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 189 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 190 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 191 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8 192 // CHECK1-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 193 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 194 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4 195 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 196 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 197 // CHECK1-NEXT: store double* [[G]], double** [[TMP9]], align 8 198 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 199 // CHECK1-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 200 // CHECK1-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 201 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 202 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 203 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 204 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 205 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 206 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 207 // CHECK1: omp.body.continue: 208 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 209 // CHECK1: omp.inner.for.inc: 210 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 212 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 213 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 214 // CHECK1: omp.inner.for.end: 215 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 216 // CHECK1: omp.loop.exit: 217 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 218 // CHECK1-NEXT: ret void 219 // 220 // 221 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 222 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 223 // CHECK1-NEXT: entry: 224 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 225 // CHECK1-NEXT: ret void 226 // 227 // 228 // CHECK3-LABEL: define {{[^@]+}}@main 229 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 230 // CHECK3-NEXT: entry: 231 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 232 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 233 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 234 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 235 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 236 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 237 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 238 // CHECK3-NEXT: ret i32 0 239 // 240 // 241 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 242 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 243 // CHECK3-NEXT: entry: 244 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 245 // CHECK3-NEXT: ret void 246 // 247 // 248 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 249 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 250 // CHECK3-NEXT: entry: 251 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 252 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 253 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 254 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 255 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 256 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 257 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 258 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 259 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 260 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 261 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 262 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 263 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 264 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 265 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 266 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 267 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 268 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 269 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 270 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 271 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 272 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 273 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 274 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 275 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 276 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 277 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 278 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 279 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 280 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 281 // CHECK3: cond.true: 282 // CHECK3-NEXT: br label [[COND_END:%.*]] 283 // CHECK3: cond.false: 284 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 285 // CHECK3-NEXT: br label [[COND_END]] 286 // CHECK3: cond.end: 287 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 288 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 289 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 290 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 291 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 292 // CHECK3: omp.inner.for.cond: 293 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 294 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 295 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 296 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 297 // CHECK3: omp.inner.for.body: 298 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 299 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 300 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 301 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 302 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8 303 // CHECK3-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4 304 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4 305 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4 306 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 307 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 308 // CHECK3-NEXT: store double* [[G]], double** [[TMP9]], align 4 309 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 310 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4 311 // CHECK3-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4 312 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 313 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4 314 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 315 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4 316 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 317 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 318 // CHECK3: omp.body.continue: 319 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 320 // CHECK3: omp.inner.for.inc: 321 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 322 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 323 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 324 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 325 // CHECK3: omp.inner.for.end: 326 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 327 // CHECK3: omp.loop.exit: 328 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 329 // CHECK3-NEXT: ret void 330 // 331 // 332 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 333 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 334 // CHECK3-NEXT: entry: 335 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 336 // CHECK3-NEXT: ret void 337 // 338 // 339 // CHECK9-LABEL: define {{[^@]+}}@main 340 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 341 // CHECK9-NEXT: entry: 342 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 343 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 344 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 345 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 346 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 347 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 348 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 349 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 350 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 351 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 352 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 353 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 354 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 355 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 356 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 357 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 358 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 359 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 360 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 361 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 362 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 363 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 364 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 365 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 366 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 367 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 368 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 369 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 370 // CHECK9: omp_offload.failed: 371 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 372 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 373 // CHECK9: omp_offload.cont: 374 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 375 // CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 376 // CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 377 // CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 378 // CHECK9: omp_offload.failed3: 379 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 380 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]] 381 // CHECK9: omp_offload.cont4: 382 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 383 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 384 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 385 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 386 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 387 // CHECK9: arraydestroy.body: 388 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 389 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 390 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 391 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 392 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 393 // CHECK9: arraydestroy.done5: 394 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 395 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 396 // CHECK9-NEXT: ret i32 [[TMP6]] 397 // 398 // 399 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 400 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 401 // CHECK9-NEXT: entry: 402 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 403 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 404 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 405 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 406 // CHECK9-NEXT: ret void 407 // 408 // 409 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 410 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 411 // CHECK9-NEXT: entry: 412 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 413 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 414 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 415 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 416 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 417 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 418 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 419 // CHECK9-NEXT: ret void 420 // 421 // 422 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 423 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 424 // CHECK9-NEXT: entry: 425 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 426 // CHECK9-NEXT: ret void 427 // 428 // 429 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 430 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 431 // CHECK9-NEXT: entry: 432 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 433 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 434 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 435 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 436 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 437 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 438 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 439 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 440 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 441 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 442 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 443 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 444 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 445 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 446 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 447 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 448 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 449 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 450 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 451 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 452 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 453 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 454 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 455 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 456 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 457 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 458 // CHECK9: arrayctor.loop: 459 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 460 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 461 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 462 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 463 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 464 // CHECK9: arrayctor.cont: 465 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 466 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 467 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 468 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 469 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 470 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 471 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 472 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 473 // CHECK9: cond.true: 474 // CHECK9-NEXT: br label [[COND_END:%.*]] 475 // CHECK9: cond.false: 476 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 477 // CHECK9-NEXT: br label [[COND_END]] 478 // CHECK9: cond.end: 479 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 480 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 481 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 482 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 483 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 484 // CHECK9: omp.inner.for.cond: 485 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 486 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 488 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 489 // CHECK9: omp.inner.for.cond.cleanup: 490 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 491 // CHECK9: omp.inner.for.body: 492 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 493 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 494 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 495 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 496 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 497 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 498 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 499 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 500 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 501 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 502 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 503 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 504 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 505 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 506 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 507 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 508 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 509 // CHECK9: omp.body.continue: 510 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 511 // CHECK9: omp.inner.for.inc: 512 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 513 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 514 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 515 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 516 // CHECK9: omp.inner.for.end: 517 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 518 // CHECK9: omp.loop.exit: 519 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 520 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 521 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 522 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 523 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 524 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 525 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 526 // CHECK9: arraydestroy.body: 527 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 528 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 529 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 530 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 531 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 532 // CHECK9: arraydestroy.done8: 533 // CHECK9-NEXT: ret void 534 // 535 // 536 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 537 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 538 // CHECK9-NEXT: entry: 539 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 540 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 541 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 542 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 543 // CHECK9-NEXT: ret void 544 // 545 // 546 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 547 // CHECK9-SAME: () #[[ATTR3]] { 548 // CHECK9-NEXT: entry: 549 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 550 // CHECK9-NEXT: ret void 551 // 552 // 553 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 554 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 555 // CHECK9-NEXT: entry: 556 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 557 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 558 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 559 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 560 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 561 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 562 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 563 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 564 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 565 // CHECK9-NEXT: [[I1:%.*]] = alloca i32, align 4 566 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 567 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 568 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 569 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 570 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 571 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 572 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 573 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 574 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 575 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 576 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 577 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 578 // CHECK9: cond.true: 579 // CHECK9-NEXT: br label [[COND_END:%.*]] 580 // CHECK9: cond.false: 581 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 582 // CHECK9-NEXT: br label [[COND_END]] 583 // CHECK9: cond.end: 584 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 585 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 586 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 587 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 588 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 589 // CHECK9: omp.inner.for.cond: 590 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 591 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 592 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 593 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 594 // CHECK9: omp.inner.for.body: 595 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 596 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 597 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 598 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 599 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 600 // CHECK9: omp.body.continue: 601 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 602 // CHECK9: omp.inner.for.inc: 603 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 604 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 605 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 606 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 607 // CHECK9: omp.inner.for.end: 608 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 609 // CHECK9: omp.loop.exit: 610 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 611 // CHECK9-NEXT: ret void 612 // 613 // 614 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 615 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 616 // CHECK9-NEXT: entry: 617 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 618 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 619 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 620 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 621 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 622 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 623 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 624 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 625 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 626 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 627 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 628 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 629 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 630 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 631 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 632 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 633 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 634 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 635 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 636 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 637 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 638 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 639 // CHECK9: omp_offload.failed: 640 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 641 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 642 // CHECK9: omp_offload.cont: 643 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 644 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 645 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 646 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 647 // CHECK9: arraydestroy.body: 648 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 649 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 650 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 651 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 652 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 653 // CHECK9: arraydestroy.done2: 654 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 655 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 656 // CHECK9-NEXT: ret i32 [[TMP4]] 657 // 658 // 659 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 660 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 661 // CHECK9-NEXT: entry: 662 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 663 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 664 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 665 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 666 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 667 // CHECK9-NEXT: ret void 668 // 669 // 670 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 671 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 672 // CHECK9-NEXT: entry: 673 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 674 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 675 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 676 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 677 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 678 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 679 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 680 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 681 // CHECK9-NEXT: ret void 682 // 683 // 684 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 685 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 686 // CHECK9-NEXT: entry: 687 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 688 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 689 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 690 // CHECK9-NEXT: ret void 691 // 692 // 693 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 694 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 695 // CHECK9-NEXT: entry: 696 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 697 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 698 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 699 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 700 // CHECK9-NEXT: ret void 701 // 702 // 703 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 704 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 705 // CHECK9-NEXT: entry: 706 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 707 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 708 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 709 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 710 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 711 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 712 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 713 // CHECK9-NEXT: ret void 714 // 715 // 716 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 717 // CHECK9-SAME: () #[[ATTR3]] { 718 // CHECK9-NEXT: entry: 719 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 720 // CHECK9-NEXT: ret void 721 // 722 // 723 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 724 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 725 // CHECK9-NEXT: entry: 726 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 727 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 728 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 729 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 730 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 731 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 732 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 733 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 734 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 735 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 736 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 737 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 738 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 739 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 740 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 741 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 742 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 743 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 744 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 745 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 746 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 747 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 748 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 749 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 750 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 751 // CHECK9: arrayctor.loop: 752 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 753 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 754 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 755 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 756 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 757 // CHECK9: arrayctor.cont: 758 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 759 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 760 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 761 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 762 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 763 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 764 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 765 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 766 // CHECK9: cond.true: 767 // CHECK9-NEXT: br label [[COND_END:%.*]] 768 // CHECK9: cond.false: 769 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 770 // CHECK9-NEXT: br label [[COND_END]] 771 // CHECK9: cond.end: 772 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 773 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 774 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 775 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 776 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 777 // CHECK9: omp.inner.for.cond: 778 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 779 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 780 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 781 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 782 // CHECK9: omp.inner.for.cond.cleanup: 783 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 784 // CHECK9: omp.inner.for.body: 785 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 786 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 787 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 788 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 789 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 790 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 791 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 792 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 793 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 794 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 795 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 796 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 797 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 798 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 799 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 800 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 801 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 802 // CHECK9: omp.body.continue: 803 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 804 // CHECK9: omp.inner.for.inc: 805 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 806 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 807 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 808 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 809 // CHECK9: omp.inner.for.end: 810 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 811 // CHECK9: omp.loop.exit: 812 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 813 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 814 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 815 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 816 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 817 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 818 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 819 // CHECK9: arraydestroy.body: 820 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 821 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 822 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 823 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 824 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 825 // CHECK9: arraydestroy.done8: 826 // CHECK9-NEXT: ret void 827 // 828 // 829 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 830 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 831 // CHECK9-NEXT: entry: 832 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 833 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 834 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 835 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 836 // CHECK9-NEXT: ret void 837 // 838 // 839 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 840 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 841 // CHECK9-NEXT: entry: 842 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 843 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 844 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 845 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 846 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 847 // CHECK9-NEXT: ret void 848 // 849 // 850 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 851 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 852 // CHECK9-NEXT: entry: 853 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 854 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 855 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 856 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 857 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 858 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 859 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 860 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 861 // CHECK9-NEXT: ret void 862 // 863 // 864 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 865 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 866 // CHECK9-NEXT: entry: 867 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 868 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 869 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 870 // CHECK9-NEXT: ret void 871 // 872 // 873 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 874 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 875 // CHECK9-NEXT: entry: 876 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 877 // CHECK9-NEXT: ret void 878 // 879 // 880 // CHECK11-LABEL: define {{[^@]+}}@main 881 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 882 // CHECK11-NEXT: entry: 883 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 884 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 885 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 886 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 887 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 888 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 889 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 890 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 891 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 892 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 893 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 894 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 895 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 896 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 897 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 898 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 899 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 900 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 901 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 902 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 903 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 904 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 905 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 906 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 907 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 908 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 909 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 910 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 911 // CHECK11: omp_offload.failed: 912 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 913 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 914 // CHECK11: omp_offload.cont: 915 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 916 // CHECK11-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 917 // CHECK11-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 918 // CHECK11-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 919 // CHECK11: omp_offload.failed3: 920 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 921 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]] 922 // CHECK11: omp_offload.cont4: 923 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 924 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 925 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 926 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 927 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 928 // CHECK11: arraydestroy.body: 929 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 930 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 931 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 932 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 933 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 934 // CHECK11: arraydestroy.done5: 935 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 936 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 937 // CHECK11-NEXT: ret i32 [[TMP6]] 938 // 939 // 940 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 941 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 942 // CHECK11-NEXT: entry: 943 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 944 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 945 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 946 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 947 // CHECK11-NEXT: ret void 948 // 949 // 950 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 951 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 952 // CHECK11-NEXT: entry: 953 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 954 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 955 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 956 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 957 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 958 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 959 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 960 // CHECK11-NEXT: ret void 961 // 962 // 963 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 964 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 965 // CHECK11-NEXT: entry: 966 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 967 // CHECK11-NEXT: ret void 968 // 969 // 970 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 971 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 972 // CHECK11-NEXT: entry: 973 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 974 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 975 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 976 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 977 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 978 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 979 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 980 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 981 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 982 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 983 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 984 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 985 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 986 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 987 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 988 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 989 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 990 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 991 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 992 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 993 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 994 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 995 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 996 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 997 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 998 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 999 // CHECK11: arrayctor.loop: 1000 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1001 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1002 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1003 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1004 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1005 // CHECK11: arrayctor.cont: 1006 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1007 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 1008 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1009 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1010 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1011 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1012 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1013 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1014 // CHECK11: cond.true: 1015 // CHECK11-NEXT: br label [[COND_END:%.*]] 1016 // CHECK11: cond.false: 1017 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1018 // CHECK11-NEXT: br label [[COND_END]] 1019 // CHECK11: cond.end: 1020 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1021 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1022 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1023 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1024 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1025 // CHECK11: omp.inner.for.cond: 1026 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1027 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1028 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1029 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1030 // CHECK11: omp.inner.for.cond.cleanup: 1031 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1032 // CHECK11: omp.inner.for.body: 1033 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1034 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1035 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1036 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1037 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1038 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1039 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 1040 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1041 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 1042 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1043 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 1044 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 1045 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1046 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 1047 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1048 // CHECK11: omp.body.continue: 1049 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1050 // CHECK11: omp.inner.for.inc: 1051 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1052 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1053 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1054 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1055 // CHECK11: omp.inner.for.end: 1056 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1057 // CHECK11: omp.loop.exit: 1058 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1059 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1060 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1061 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1062 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1063 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 1064 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1065 // CHECK11: arraydestroy.body: 1066 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1067 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1068 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1069 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1070 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1071 // CHECK11: arraydestroy.done7: 1072 // CHECK11-NEXT: ret void 1073 // 1074 // 1075 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1076 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1077 // CHECK11-NEXT: entry: 1078 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1079 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1080 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1081 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1082 // CHECK11-NEXT: ret void 1083 // 1084 // 1085 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1086 // CHECK11-SAME: () #[[ATTR3]] { 1087 // CHECK11-NEXT: entry: 1088 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1089 // CHECK11-NEXT: ret void 1090 // 1091 // 1092 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1093 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1094 // CHECK11-NEXT: entry: 1095 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1096 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1097 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1098 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1099 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1100 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1101 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1102 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1103 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1104 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 1105 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1106 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1107 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1108 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1109 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1110 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1111 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1112 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1113 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1114 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1115 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1116 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1117 // CHECK11: cond.true: 1118 // CHECK11-NEXT: br label [[COND_END:%.*]] 1119 // CHECK11: cond.false: 1120 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1121 // CHECK11-NEXT: br label [[COND_END]] 1122 // CHECK11: cond.end: 1123 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1124 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1125 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1126 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1127 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1128 // CHECK11: omp.inner.for.cond: 1129 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1130 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1131 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1132 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1133 // CHECK11: omp.inner.for.body: 1134 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1135 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1136 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1137 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1138 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1139 // CHECK11: omp.body.continue: 1140 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1141 // CHECK11: omp.inner.for.inc: 1142 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1143 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1144 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1145 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1146 // CHECK11: omp.inner.for.end: 1147 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1148 // CHECK11: omp.loop.exit: 1149 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1150 // CHECK11-NEXT: ret void 1151 // 1152 // 1153 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1154 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 1155 // CHECK11-NEXT: entry: 1156 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1157 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1158 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1159 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1160 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1161 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 1162 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1163 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1164 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1165 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1166 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1167 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1168 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1169 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 1170 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 1171 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1172 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 1173 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1174 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1175 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1176 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1177 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1178 // CHECK11: omp_offload.failed: 1179 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1180 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1181 // CHECK11: omp_offload.cont: 1182 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1183 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1184 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1185 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1186 // CHECK11: arraydestroy.body: 1187 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1188 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1189 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1190 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1191 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1192 // CHECK11: arraydestroy.done2: 1193 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1194 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1195 // CHECK11-NEXT: ret i32 [[TMP4]] 1196 // 1197 // 1198 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1199 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1200 // CHECK11-NEXT: entry: 1201 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1202 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1203 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1204 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1205 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 1206 // CHECK11-NEXT: ret void 1207 // 1208 // 1209 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1210 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1211 // CHECK11-NEXT: entry: 1212 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1213 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1214 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1215 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1216 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1217 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1218 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1219 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 1220 // CHECK11-NEXT: ret void 1221 // 1222 // 1223 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1224 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1225 // CHECK11-NEXT: entry: 1226 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1227 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1228 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1229 // CHECK11-NEXT: ret void 1230 // 1231 // 1232 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1233 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1234 // CHECK11-NEXT: entry: 1235 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1236 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1237 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1238 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1239 // CHECK11-NEXT: ret void 1240 // 1241 // 1242 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1243 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1244 // CHECK11-NEXT: entry: 1245 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1246 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1247 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1248 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1249 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1250 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1251 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1252 // CHECK11-NEXT: ret void 1253 // 1254 // 1255 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1256 // CHECK11-SAME: () #[[ATTR3]] { 1257 // CHECK11-NEXT: entry: 1258 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1259 // CHECK11-NEXT: ret void 1260 // 1261 // 1262 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 1263 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1264 // CHECK11-NEXT: entry: 1265 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1266 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1267 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1268 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1269 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1270 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1271 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1272 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1273 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1274 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1275 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1276 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1277 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1278 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 1279 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1280 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1281 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1282 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1283 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1284 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1285 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1286 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1287 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1288 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1289 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1290 // CHECK11: arrayctor.loop: 1291 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1292 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1293 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 1294 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1295 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1296 // CHECK11: arrayctor.cont: 1297 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1298 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 1299 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1300 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1301 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1302 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1303 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1304 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1305 // CHECK11: cond.true: 1306 // CHECK11-NEXT: br label [[COND_END:%.*]] 1307 // CHECK11: cond.false: 1308 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1309 // CHECK11-NEXT: br label [[COND_END]] 1310 // CHECK11: cond.end: 1311 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1312 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1313 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1314 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1315 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1316 // CHECK11: omp.inner.for.cond: 1317 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1318 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1319 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1320 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1321 // CHECK11: omp.inner.for.cond.cleanup: 1322 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1323 // CHECK11: omp.inner.for.body: 1324 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1325 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1326 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1327 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1328 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1329 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1330 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 1331 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1332 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 1333 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1334 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 1335 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 1336 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1337 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 1338 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1339 // CHECK11: omp.body.continue: 1340 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1341 // CHECK11: omp.inner.for.inc: 1342 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1343 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1344 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1345 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1346 // CHECK11: omp.inner.for.end: 1347 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1348 // CHECK11: omp.loop.exit: 1349 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1350 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1351 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1352 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1353 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1354 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 1355 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1356 // CHECK11: arraydestroy.body: 1357 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1358 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1359 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1360 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1361 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1362 // CHECK11: arraydestroy.done7: 1363 // CHECK11-NEXT: ret void 1364 // 1365 // 1366 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1367 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1368 // CHECK11-NEXT: entry: 1369 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1370 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1371 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1372 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1373 // CHECK11-NEXT: ret void 1374 // 1375 // 1376 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1377 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1378 // CHECK11-NEXT: entry: 1379 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1380 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1381 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1382 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1383 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 1384 // CHECK11-NEXT: ret void 1385 // 1386 // 1387 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1388 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1389 // CHECK11-NEXT: entry: 1390 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1391 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1392 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1393 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1394 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1395 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1396 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1397 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1398 // CHECK11-NEXT: ret void 1399 // 1400 // 1401 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1402 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1403 // CHECK11-NEXT: entry: 1404 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1405 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 1406 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 1407 // CHECK11-NEXT: ret void 1408 // 1409 // 1410 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1411 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1412 // CHECK11-NEXT: entry: 1413 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1414 // CHECK11-NEXT: ret void 1415 // 1416