1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 3; 75 sfvar = 4.0; 76 [&]() { 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 8.0; 81 82 }(); 83 } 84 }(); 85 return 0; 86 #else 87 S<float> test; 88 int t_var = 0; 89 int vec[] = {1, 2}; 90 S<float> s_arr[] = {1, 2}; 91 S<float> &var = test; 92 93 #pragma omp target 94 #pragma omp teams 95 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var, svar) 96 for (int i = 0; i < 2; ++i) { 97 vec[i] = t_var; 98 s_arr[i] = var; 99 } 100 int i; 101 102 #pragma omp target 103 #pragma omp teams 104 #pragma omp distribute private(i) 105 for (i = 0; i < 2; ++i) { 106 ; 107 } 108 return tmain<int>(); 109 #endif 110 } 111 112 113 114 115 116 #endif 117 // CHECK1-LABEL: define {{[^@]+}}@main 118 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 119 // CHECK1-NEXT: entry: 120 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 122 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 123 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 124 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 125 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 126 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 127 // CHECK1-NEXT: ret i32 0 128 // 129 // 130 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 131 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 132 // CHECK1-NEXT: entry: 133 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 134 // CHECK1-NEXT: ret void 135 // 136 // 137 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 138 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 141 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 145 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 146 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 150 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 151 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 152 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 154 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 156 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 157 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 158 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 160 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 163 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 164 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 166 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 169 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 170 // CHECK1: cond.true: 171 // CHECK1-NEXT: br label [[COND_END:%.*]] 172 // CHECK1: cond.false: 173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 174 // CHECK1-NEXT: br label [[COND_END]] 175 // CHECK1: cond.end: 176 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 177 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 179 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 181 // CHECK1: omp.inner.for.cond: 182 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 184 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 185 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 186 // CHECK1: omp.inner.for.body: 187 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 189 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 190 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 191 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8 192 // CHECK1-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 193 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 194 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4 195 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 196 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 197 // CHECK1-NEXT: store double* [[G]], double** [[TMP9]], align 8 198 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 199 // CHECK1-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 200 // CHECK1-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 201 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 202 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 203 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 204 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 205 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 206 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 207 // CHECK1: omp.body.continue: 208 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 209 // CHECK1: omp.inner.for.inc: 210 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 212 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 213 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 214 // CHECK1: omp.inner.for.end: 215 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 216 // CHECK1: omp.loop.exit: 217 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 218 // CHECK1-NEXT: ret void 219 // 220 // 221 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 222 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 223 // CHECK1-NEXT: entry: 224 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 225 // CHECK1-NEXT: ret void 226 // 227 // 228 // CHECK2-LABEL: define {{[^@]+}}@main 229 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 230 // CHECK2-NEXT: entry: 231 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 232 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 233 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 234 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 235 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 236 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 237 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 238 // CHECK2-NEXT: ret i32 0 239 // 240 // 241 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 242 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 243 // CHECK2-NEXT: entry: 244 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 245 // CHECK2-NEXT: ret void 246 // 247 // 248 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 249 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 250 // CHECK2-NEXT: entry: 251 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 252 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 253 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 254 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 255 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 256 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 257 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 258 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 259 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 260 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 261 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 262 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 263 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 264 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 265 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 266 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 267 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 268 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 269 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 270 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 271 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 272 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 273 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 274 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 275 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 276 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 277 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 278 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 279 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 280 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 281 // CHECK2: cond.true: 282 // CHECK2-NEXT: br label [[COND_END:%.*]] 283 // CHECK2: cond.false: 284 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 285 // CHECK2-NEXT: br label [[COND_END]] 286 // CHECK2: cond.end: 287 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 288 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 289 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 290 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 291 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 292 // CHECK2: omp.inner.for.cond: 293 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 294 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 295 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 296 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 297 // CHECK2: omp.inner.for.body: 298 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 299 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 300 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 301 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 302 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8 303 // CHECK2-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 304 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 305 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4 306 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 307 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 308 // CHECK2-NEXT: store double* [[G]], double** [[TMP9]], align 8 309 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 310 // CHECK2-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 311 // CHECK2-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 312 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 313 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 314 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 315 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 316 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 317 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 318 // CHECK2: omp.body.continue: 319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 320 // CHECK2: omp.inner.for.inc: 321 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 322 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 323 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 324 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 325 // CHECK2: omp.inner.for.end: 326 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 327 // CHECK2: omp.loop.exit: 328 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 329 // CHECK2-NEXT: ret void 330 // 331 // 332 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 333 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 334 // CHECK2-NEXT: entry: 335 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 336 // CHECK2-NEXT: ret void 337 // 338 // 339 // CHECK3-LABEL: define {{[^@]+}}@main 340 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 341 // CHECK3-NEXT: entry: 342 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 343 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 344 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 345 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 346 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 347 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 348 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 349 // CHECK3-NEXT: ret i32 0 350 // 351 // 352 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 353 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 354 // CHECK3-NEXT: entry: 355 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 356 // CHECK3-NEXT: ret void 357 // 358 // 359 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 360 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 361 // CHECK3-NEXT: entry: 362 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 363 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 364 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 365 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 366 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 367 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 368 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 369 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 370 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 371 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 372 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 373 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 374 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 375 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 376 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 377 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 378 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 379 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 380 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 381 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 382 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 383 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 384 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 385 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 386 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 387 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 388 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 389 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 390 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 391 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 392 // CHECK3: cond.true: 393 // CHECK3-NEXT: br label [[COND_END:%.*]] 394 // CHECK3: cond.false: 395 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 396 // CHECK3-NEXT: br label [[COND_END]] 397 // CHECK3: cond.end: 398 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 399 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 400 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 401 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 403 // CHECK3: omp.inner.for.cond: 404 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 405 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 406 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 407 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 408 // CHECK3: omp.inner.for.body: 409 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 410 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 411 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 412 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 413 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8 414 // CHECK3-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4 415 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4 416 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4 417 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 418 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 419 // CHECK3-NEXT: store double* [[G]], double** [[TMP9]], align 4 420 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 421 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4 422 // CHECK3-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4 423 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 424 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4 425 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 426 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4 427 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 428 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 429 // CHECK3: omp.body.continue: 430 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 431 // CHECK3: omp.inner.for.inc: 432 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 433 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 434 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 435 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 436 // CHECK3: omp.inner.for.end: 437 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 438 // CHECK3: omp.loop.exit: 439 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 440 // CHECK3-NEXT: ret void 441 // 442 // 443 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 444 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 445 // CHECK3-NEXT: entry: 446 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 447 // CHECK3-NEXT: ret void 448 // 449 // 450 // CHECK4-LABEL: define {{[^@]+}}@main 451 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 452 // CHECK4-NEXT: entry: 453 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 454 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 455 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 456 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 457 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 458 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 459 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 460 // CHECK4-NEXT: ret i32 0 461 // 462 // 463 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 464 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 465 // CHECK4-NEXT: entry: 466 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 467 // CHECK4-NEXT: ret void 468 // 469 // 470 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 471 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 472 // CHECK4-NEXT: entry: 473 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 474 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 475 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 476 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 477 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 478 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 479 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 480 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 481 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 482 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 483 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 484 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 485 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 486 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 487 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 488 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 489 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 490 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 491 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 492 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 493 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 494 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 495 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 496 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 497 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 498 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 499 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 500 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 501 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 502 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 503 // CHECK4: cond.true: 504 // CHECK4-NEXT: br label [[COND_END:%.*]] 505 // CHECK4: cond.false: 506 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 507 // CHECK4-NEXT: br label [[COND_END]] 508 // CHECK4: cond.end: 509 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 510 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 511 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 512 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 513 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 514 // CHECK4: omp.inner.for.cond: 515 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 516 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 517 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 518 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 519 // CHECK4: omp.inner.for.body: 520 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 522 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 523 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 524 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8 525 // CHECK4-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4 526 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4 527 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4 528 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 529 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 530 // CHECK4-NEXT: store double* [[G]], double** [[TMP9]], align 4 531 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 532 // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4 533 // CHECK4-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4 534 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 535 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4 536 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 537 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4 538 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 539 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 540 // CHECK4: omp.body.continue: 541 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 542 // CHECK4: omp.inner.for.inc: 543 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 544 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 545 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 546 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 547 // CHECK4: omp.inner.for.end: 548 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 549 // CHECK4: omp.loop.exit: 550 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 551 // CHECK4-NEXT: ret void 552 // 553 // 554 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 555 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 556 // CHECK4-NEXT: entry: 557 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 558 // CHECK4-NEXT: ret void 559 // 560 // 561 // CHECK5-LABEL: define {{[^@]+}}@main 562 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 563 // CHECK5-NEXT: entry: 564 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 565 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 566 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 567 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 568 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 569 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 570 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 571 // CHECK5-NEXT: ret i32 0 572 // 573 // 574 // CHECK6-LABEL: define {{[^@]+}}@main 575 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 576 // CHECK6-NEXT: entry: 577 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 578 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 579 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 580 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 581 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 582 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 583 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 584 // CHECK6-NEXT: ret i32 0 585 // 586 // 587 // CHECK7-LABEL: define {{[^@]+}}@main 588 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 589 // CHECK7-NEXT: entry: 590 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 591 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 592 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 593 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 594 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 595 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 596 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 597 // CHECK7-NEXT: ret i32 0 598 // 599 // 600 // CHECK8-LABEL: define {{[^@]+}}@main 601 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 602 // CHECK8-NEXT: entry: 603 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 604 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 605 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 606 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 607 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 608 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 609 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 610 // CHECK8-NEXT: ret i32 0 611 // 612 // 613 // CHECK9-LABEL: define {{[^@]+}}@main 614 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 615 // CHECK9-NEXT: entry: 616 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 617 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 618 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 619 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 620 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 621 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 622 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 623 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 624 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 625 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 626 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 627 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 628 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 629 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 630 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 631 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 632 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 633 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 634 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 635 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 636 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 637 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 638 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 639 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 640 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 641 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 642 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 643 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 644 // CHECK9: omp_offload.failed: 645 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 646 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 647 // CHECK9: omp_offload.cont: 648 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 649 // CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 650 // CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 651 // CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 652 // CHECK9: omp_offload.failed3: 653 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 654 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]] 655 // CHECK9: omp_offload.cont4: 656 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 657 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 658 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 659 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 660 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 661 // CHECK9: arraydestroy.body: 662 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 663 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 664 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 665 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 666 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 667 // CHECK9: arraydestroy.done5: 668 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 669 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 670 // CHECK9-NEXT: ret i32 [[TMP6]] 671 // 672 // 673 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 674 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 675 // CHECK9-NEXT: entry: 676 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 677 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 678 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 679 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 680 // CHECK9-NEXT: ret void 681 // 682 // 683 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 684 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 685 // CHECK9-NEXT: entry: 686 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 687 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 688 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 689 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 690 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 691 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 692 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 693 // CHECK9-NEXT: ret void 694 // 695 // 696 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 697 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 698 // CHECK9-NEXT: entry: 699 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 700 // CHECK9-NEXT: ret void 701 // 702 // 703 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 704 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 705 // CHECK9-NEXT: entry: 706 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 707 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 708 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 709 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 710 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 711 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 712 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 713 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 714 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 715 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 716 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 717 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 718 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 719 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 720 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 721 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 722 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 723 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 724 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 725 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 726 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 727 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 728 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 729 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 730 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 731 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 732 // CHECK9: arrayctor.loop: 733 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 734 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 735 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 736 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 737 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 738 // CHECK9: arrayctor.cont: 739 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 740 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 741 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 742 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 743 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 744 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 745 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 746 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 747 // CHECK9: cond.true: 748 // CHECK9-NEXT: br label [[COND_END:%.*]] 749 // CHECK9: cond.false: 750 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 751 // CHECK9-NEXT: br label [[COND_END]] 752 // CHECK9: cond.end: 753 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 754 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 755 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 756 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 757 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 758 // CHECK9: omp.inner.for.cond: 759 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 760 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 761 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 762 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 763 // CHECK9: omp.inner.for.cond.cleanup: 764 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 765 // CHECK9: omp.inner.for.body: 766 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 767 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 768 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 769 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 770 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 771 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 772 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 773 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 774 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 775 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 776 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 777 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 778 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 779 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 780 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 781 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 782 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 783 // CHECK9: omp.body.continue: 784 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 785 // CHECK9: omp.inner.for.inc: 786 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 787 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 788 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 789 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 790 // CHECK9: omp.inner.for.end: 791 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 792 // CHECK9: omp.loop.exit: 793 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 794 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 795 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 796 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 797 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 798 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 799 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 800 // CHECK9: arraydestroy.body: 801 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 802 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 803 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 804 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 805 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 806 // CHECK9: arraydestroy.done8: 807 // CHECK9-NEXT: ret void 808 // 809 // 810 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 811 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 812 // CHECK9-NEXT: entry: 813 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 814 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 815 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 816 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 817 // CHECK9-NEXT: ret void 818 // 819 // 820 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 821 // CHECK9-SAME: () #[[ATTR3]] { 822 // CHECK9-NEXT: entry: 823 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 824 // CHECK9-NEXT: ret void 825 // 826 // 827 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 828 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 829 // CHECK9-NEXT: entry: 830 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 831 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 832 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 833 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 834 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 835 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 836 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 837 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 838 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 839 // CHECK9-NEXT: [[I1:%.*]] = alloca i32, align 4 840 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 841 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 842 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 843 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 844 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 845 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 846 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 847 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 848 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 849 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 850 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 851 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 852 // CHECK9: cond.true: 853 // CHECK9-NEXT: br label [[COND_END:%.*]] 854 // CHECK9: cond.false: 855 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 856 // CHECK9-NEXT: br label [[COND_END]] 857 // CHECK9: cond.end: 858 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 859 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 860 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 861 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 862 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 863 // CHECK9: omp.inner.for.cond: 864 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 865 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 866 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 867 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 868 // CHECK9: omp.inner.for.body: 869 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 870 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 871 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 872 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 873 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 874 // CHECK9: omp.body.continue: 875 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 876 // CHECK9: omp.inner.for.inc: 877 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 878 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 879 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 880 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 881 // CHECK9: omp.inner.for.end: 882 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 883 // CHECK9: omp.loop.exit: 884 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 885 // CHECK9-NEXT: ret void 886 // 887 // 888 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 889 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 890 // CHECK9-NEXT: entry: 891 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 892 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 893 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 894 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 895 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 896 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 897 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 898 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 899 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 900 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 901 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 902 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 903 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 904 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 905 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 906 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 907 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 908 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 909 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 910 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 911 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 912 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 913 // CHECK9: omp_offload.failed: 914 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 915 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 916 // CHECK9: omp_offload.cont: 917 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 918 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 919 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 920 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 921 // CHECK9: arraydestroy.body: 922 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 923 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 924 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 925 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 926 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 927 // CHECK9: arraydestroy.done2: 928 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 929 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 930 // CHECK9-NEXT: ret i32 [[TMP4]] 931 // 932 // 933 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 934 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 935 // CHECK9-NEXT: entry: 936 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 937 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 938 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 939 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 940 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 941 // CHECK9-NEXT: ret void 942 // 943 // 944 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 945 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 946 // CHECK9-NEXT: entry: 947 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 948 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 949 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 950 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 951 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 952 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 953 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 954 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 955 // CHECK9-NEXT: ret void 956 // 957 // 958 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 959 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 960 // CHECK9-NEXT: entry: 961 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 962 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 963 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 964 // CHECK9-NEXT: ret void 965 // 966 // 967 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 968 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 969 // CHECK9-NEXT: entry: 970 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 971 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 972 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 973 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 974 // CHECK9-NEXT: ret void 975 // 976 // 977 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 978 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 979 // CHECK9-NEXT: entry: 980 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 981 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 982 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 983 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 984 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 985 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 986 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 987 // CHECK9-NEXT: ret void 988 // 989 // 990 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 991 // CHECK9-SAME: () #[[ATTR3]] { 992 // CHECK9-NEXT: entry: 993 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 994 // CHECK9-NEXT: ret void 995 // 996 // 997 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 998 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 999 // CHECK9-NEXT: entry: 1000 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1001 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1002 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1003 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1004 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1005 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1006 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1007 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1008 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1009 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1010 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1011 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1012 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1013 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1014 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1015 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1016 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1017 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1018 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1019 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1020 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1021 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1022 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1023 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1024 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1025 // CHECK9: arrayctor.loop: 1026 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1027 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1028 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1029 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1030 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1031 // CHECK9: arrayctor.cont: 1032 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 1033 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1034 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1035 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1036 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1037 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1038 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1039 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1040 // CHECK9: cond.true: 1041 // CHECK9-NEXT: br label [[COND_END:%.*]] 1042 // CHECK9: cond.false: 1043 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1044 // CHECK9-NEXT: br label [[COND_END]] 1045 // CHECK9: cond.end: 1046 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1047 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1048 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1049 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1050 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1051 // CHECK9: omp.inner.for.cond: 1052 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1053 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1054 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1055 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1056 // CHECK9: omp.inner.for.cond.cleanup: 1057 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1058 // CHECK9: omp.inner.for.body: 1059 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1060 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1061 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1062 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1063 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1064 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1065 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1066 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1067 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1068 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 1069 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1070 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1071 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1072 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1073 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1074 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1075 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1076 // CHECK9: omp.body.continue: 1077 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1078 // CHECK9: omp.inner.for.inc: 1079 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1080 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1081 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1082 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1083 // CHECK9: omp.inner.for.end: 1084 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1085 // CHECK9: omp.loop.exit: 1086 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1087 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1088 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1089 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1090 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1091 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1092 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1093 // CHECK9: arraydestroy.body: 1094 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1095 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1096 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1097 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1098 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1099 // CHECK9: arraydestroy.done8: 1100 // CHECK9-NEXT: ret void 1101 // 1102 // 1103 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1104 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1105 // CHECK9-NEXT: entry: 1106 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1107 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1108 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1109 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1110 // CHECK9-NEXT: ret void 1111 // 1112 // 1113 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1114 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1115 // CHECK9-NEXT: entry: 1116 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1117 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1118 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1119 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1120 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1121 // CHECK9-NEXT: ret void 1122 // 1123 // 1124 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1125 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1126 // CHECK9-NEXT: entry: 1127 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1128 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1129 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1130 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1131 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1132 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1133 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1134 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1135 // CHECK9-NEXT: ret void 1136 // 1137 // 1138 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1139 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1140 // CHECK9-NEXT: entry: 1141 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1142 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1143 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1144 // CHECK9-NEXT: ret void 1145 // 1146 // 1147 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1148 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1149 // CHECK9-NEXT: entry: 1150 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1151 // CHECK9-NEXT: ret void 1152 // 1153 // 1154 // CHECK10-LABEL: define {{[^@]+}}@main 1155 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1156 // CHECK10-NEXT: entry: 1157 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1158 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1159 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1160 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1161 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1162 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1163 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1164 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1165 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1166 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1167 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1168 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1169 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1170 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1171 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1172 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1173 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1174 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1175 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1176 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1177 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1178 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1179 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1180 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1181 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1182 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1183 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1184 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1185 // CHECK10: omp_offload.failed: 1186 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1187 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1188 // CHECK10: omp_offload.cont: 1189 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1190 // CHECK10-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1191 // CHECK10-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 1192 // CHECK10-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1193 // CHECK10: omp_offload.failed3: 1194 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 1195 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1196 // CHECK10: omp_offload.cont4: 1197 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1198 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1199 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1200 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1201 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1202 // CHECK10: arraydestroy.body: 1203 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1204 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1205 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1206 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1207 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1208 // CHECK10: arraydestroy.done5: 1209 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1210 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1211 // CHECK10-NEXT: ret i32 [[TMP6]] 1212 // 1213 // 1214 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1215 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1216 // CHECK10-NEXT: entry: 1217 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1218 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1219 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1220 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1221 // CHECK10-NEXT: ret void 1222 // 1223 // 1224 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1225 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1226 // CHECK10-NEXT: entry: 1227 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1228 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1229 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1230 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1231 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1232 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1233 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1234 // CHECK10-NEXT: ret void 1235 // 1236 // 1237 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1238 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1239 // CHECK10-NEXT: entry: 1240 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1241 // CHECK10-NEXT: ret void 1242 // 1243 // 1244 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1245 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1246 // CHECK10-NEXT: entry: 1247 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1248 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1249 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1250 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1251 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1252 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1253 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1254 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1255 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1256 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1257 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1258 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1259 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1260 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1261 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1262 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1263 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1264 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1265 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1266 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1267 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1268 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1269 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1270 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1271 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1272 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1273 // CHECK10: arrayctor.loop: 1274 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1275 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1276 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1277 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1278 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1279 // CHECK10: arrayctor.cont: 1280 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1281 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1282 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1283 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1284 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1285 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1286 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1287 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1288 // CHECK10: cond.true: 1289 // CHECK10-NEXT: br label [[COND_END:%.*]] 1290 // CHECK10: cond.false: 1291 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1292 // CHECK10-NEXT: br label [[COND_END]] 1293 // CHECK10: cond.end: 1294 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1295 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1296 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1297 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1298 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1299 // CHECK10: omp.inner.for.cond: 1300 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1301 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1302 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1303 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1304 // CHECK10: omp.inner.for.cond.cleanup: 1305 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1306 // CHECK10: omp.inner.for.body: 1307 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1308 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1309 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1310 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1311 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1312 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1313 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1314 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1315 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1316 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 1317 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1318 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1319 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1320 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 1321 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1322 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1323 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1324 // CHECK10: omp.body.continue: 1325 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1326 // CHECK10: omp.inner.for.inc: 1327 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1328 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1329 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1330 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1331 // CHECK10: omp.inner.for.end: 1332 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1333 // CHECK10: omp.loop.exit: 1334 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1335 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1336 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1337 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1338 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1339 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 1340 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1341 // CHECK10: arraydestroy.body: 1342 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1343 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1344 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1345 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1346 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1347 // CHECK10: arraydestroy.done8: 1348 // CHECK10-NEXT: ret void 1349 // 1350 // 1351 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1352 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1353 // CHECK10-NEXT: entry: 1354 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1355 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1356 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1357 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1358 // CHECK10-NEXT: ret void 1359 // 1360 // 1361 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1362 // CHECK10-SAME: () #[[ATTR3]] { 1363 // CHECK10-NEXT: entry: 1364 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1365 // CHECK10-NEXT: ret void 1366 // 1367 // 1368 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1369 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1370 // CHECK10-NEXT: entry: 1371 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1372 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1373 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1374 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1375 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1376 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1377 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1378 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1379 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1380 // CHECK10-NEXT: [[I1:%.*]] = alloca i32, align 4 1381 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1382 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1383 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1384 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1385 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1386 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1387 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1388 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1389 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1390 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1391 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1392 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1393 // CHECK10: cond.true: 1394 // CHECK10-NEXT: br label [[COND_END:%.*]] 1395 // CHECK10: cond.false: 1396 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1397 // CHECK10-NEXT: br label [[COND_END]] 1398 // CHECK10: cond.end: 1399 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1400 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1401 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1402 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1403 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1404 // CHECK10: omp.inner.for.cond: 1405 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1406 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1407 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1408 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1409 // CHECK10: omp.inner.for.body: 1410 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1411 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1412 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1413 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1414 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1415 // CHECK10: omp.body.continue: 1416 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1417 // CHECK10: omp.inner.for.inc: 1418 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1419 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1420 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1421 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1422 // CHECK10: omp.inner.for.end: 1423 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1424 // CHECK10: omp.loop.exit: 1425 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1426 // CHECK10-NEXT: ret void 1427 // 1428 // 1429 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1430 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1431 // CHECK10-NEXT: entry: 1432 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1433 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1434 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1435 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1436 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1437 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1438 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1439 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1440 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1441 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1442 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1443 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1444 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1445 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1446 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1447 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1448 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1449 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1450 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1451 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1452 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1453 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1454 // CHECK10: omp_offload.failed: 1455 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1456 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1457 // CHECK10: omp_offload.cont: 1458 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1459 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1460 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1461 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1462 // CHECK10: arraydestroy.body: 1463 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1464 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1465 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1466 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1467 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1468 // CHECK10: arraydestroy.done2: 1469 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1470 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1471 // CHECK10-NEXT: ret i32 [[TMP4]] 1472 // 1473 // 1474 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1475 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1476 // CHECK10-NEXT: entry: 1477 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1478 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1479 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1480 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1481 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1482 // CHECK10-NEXT: ret void 1483 // 1484 // 1485 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1486 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1487 // CHECK10-NEXT: entry: 1488 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1489 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1490 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1491 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1492 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1493 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1494 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1495 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1496 // CHECK10-NEXT: ret void 1497 // 1498 // 1499 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1500 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1501 // CHECK10-NEXT: entry: 1502 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1503 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1504 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1505 // CHECK10-NEXT: ret void 1506 // 1507 // 1508 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1509 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1510 // CHECK10-NEXT: entry: 1511 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1512 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1513 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1514 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1515 // CHECK10-NEXT: ret void 1516 // 1517 // 1518 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1519 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1520 // CHECK10-NEXT: entry: 1521 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1522 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1523 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1524 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1525 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1526 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1527 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1528 // CHECK10-NEXT: ret void 1529 // 1530 // 1531 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1532 // CHECK10-SAME: () #[[ATTR3]] { 1533 // CHECK10-NEXT: entry: 1534 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1535 // CHECK10-NEXT: ret void 1536 // 1537 // 1538 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 1539 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1540 // CHECK10-NEXT: entry: 1541 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1542 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1543 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1544 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1545 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1546 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1547 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1548 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1549 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1550 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1551 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1552 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1553 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1554 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1555 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1556 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1557 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1558 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1559 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1560 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1561 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1562 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1563 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1564 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1565 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1566 // CHECK10: arrayctor.loop: 1567 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1568 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1569 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1570 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1571 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1572 // CHECK10: arrayctor.cont: 1573 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 1574 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1575 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1576 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1577 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1578 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1579 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1580 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1581 // CHECK10: cond.true: 1582 // CHECK10-NEXT: br label [[COND_END:%.*]] 1583 // CHECK10: cond.false: 1584 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1585 // CHECK10-NEXT: br label [[COND_END]] 1586 // CHECK10: cond.end: 1587 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1588 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1589 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1590 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1591 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1592 // CHECK10: omp.inner.for.cond: 1593 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1594 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1595 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1596 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1597 // CHECK10: omp.inner.for.cond.cleanup: 1598 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1599 // CHECK10: omp.inner.for.body: 1600 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1601 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1602 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1603 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1604 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1605 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1606 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1607 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1608 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1609 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 1610 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1611 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1612 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1613 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1614 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1615 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1616 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1617 // CHECK10: omp.body.continue: 1618 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1619 // CHECK10: omp.inner.for.inc: 1620 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1621 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1622 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1623 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1624 // CHECK10: omp.inner.for.end: 1625 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1626 // CHECK10: omp.loop.exit: 1627 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1628 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1629 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1630 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1631 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1632 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1633 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1634 // CHECK10: arraydestroy.body: 1635 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1636 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1637 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1638 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1639 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1640 // CHECK10: arraydestroy.done8: 1641 // CHECK10-NEXT: ret void 1642 // 1643 // 1644 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1645 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1646 // CHECK10-NEXT: entry: 1647 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1648 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1649 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1650 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1651 // CHECK10-NEXT: ret void 1652 // 1653 // 1654 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1655 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1656 // CHECK10-NEXT: entry: 1657 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1658 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1659 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1660 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1661 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 1662 // CHECK10-NEXT: ret void 1663 // 1664 // 1665 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1666 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1667 // CHECK10-NEXT: entry: 1668 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1669 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1670 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1671 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1672 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1673 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1674 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1675 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1676 // CHECK10-NEXT: ret void 1677 // 1678 // 1679 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1680 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1681 // CHECK10-NEXT: entry: 1682 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1683 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1684 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1685 // CHECK10-NEXT: ret void 1686 // 1687 // 1688 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1689 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 1690 // CHECK10-NEXT: entry: 1691 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 1692 // CHECK10-NEXT: ret void 1693 // 1694 // 1695 // CHECK11-LABEL: define {{[^@]+}}@main 1696 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1697 // CHECK11-NEXT: entry: 1698 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1699 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1700 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 1701 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1702 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1703 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1704 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1705 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 1706 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1707 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1708 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1709 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1710 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1711 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 1712 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1713 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1714 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1715 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 1716 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1717 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1718 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 1719 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1720 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 1721 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1722 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1723 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1724 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1725 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1726 // CHECK11: omp_offload.failed: 1727 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1728 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1729 // CHECK11: omp_offload.cont: 1730 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1731 // CHECK11-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1732 // CHECK11-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 1733 // CHECK11-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1734 // CHECK11: omp_offload.failed3: 1735 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 1736 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1737 // CHECK11: omp_offload.cont4: 1738 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1739 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1740 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1741 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1742 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1743 // CHECK11: arraydestroy.body: 1744 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1745 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1746 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1747 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1748 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1749 // CHECK11: arraydestroy.done5: 1750 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1751 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1752 // CHECK11-NEXT: ret i32 [[TMP6]] 1753 // 1754 // 1755 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1756 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1757 // CHECK11-NEXT: entry: 1758 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1759 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1760 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1761 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1762 // CHECK11-NEXT: ret void 1763 // 1764 // 1765 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1766 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1767 // CHECK11-NEXT: entry: 1768 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1769 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1770 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1771 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1772 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1773 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1774 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1775 // CHECK11-NEXT: ret void 1776 // 1777 // 1778 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1779 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1780 // CHECK11-NEXT: entry: 1781 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1782 // CHECK11-NEXT: ret void 1783 // 1784 // 1785 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1786 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1787 // CHECK11-NEXT: entry: 1788 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1789 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1790 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1791 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1792 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1793 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1794 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1795 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1796 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1797 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1798 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1799 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1800 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1801 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 1802 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1803 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1804 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1805 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1806 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1807 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1808 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1809 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1810 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1811 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1812 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1813 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1814 // CHECK11: arrayctor.loop: 1815 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1816 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1817 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1818 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1819 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1820 // CHECK11: arrayctor.cont: 1821 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1822 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 1823 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1824 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1825 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1826 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1827 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1828 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1829 // CHECK11: cond.true: 1830 // CHECK11-NEXT: br label [[COND_END:%.*]] 1831 // CHECK11: cond.false: 1832 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1833 // CHECK11-NEXT: br label [[COND_END]] 1834 // CHECK11: cond.end: 1835 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1836 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1837 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1838 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1839 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1840 // CHECK11: omp.inner.for.cond: 1841 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1842 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1843 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1844 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1845 // CHECK11: omp.inner.for.cond.cleanup: 1846 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1847 // CHECK11: omp.inner.for.body: 1848 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1849 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1850 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1851 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1852 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1853 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1854 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 1855 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1856 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 1857 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1858 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 1859 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 1860 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1861 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 1862 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1863 // CHECK11: omp.body.continue: 1864 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1865 // CHECK11: omp.inner.for.inc: 1866 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1867 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1868 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1869 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1870 // CHECK11: omp.inner.for.end: 1871 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1872 // CHECK11: omp.loop.exit: 1873 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1874 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1875 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1876 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1877 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1878 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 1879 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1880 // CHECK11: arraydestroy.body: 1881 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1882 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1883 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1884 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1885 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1886 // CHECK11: arraydestroy.done7: 1887 // CHECK11-NEXT: ret void 1888 // 1889 // 1890 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1891 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1892 // CHECK11-NEXT: entry: 1893 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1894 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1895 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1896 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1897 // CHECK11-NEXT: ret void 1898 // 1899 // 1900 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1901 // CHECK11-SAME: () #[[ATTR3]] { 1902 // CHECK11-NEXT: entry: 1903 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1904 // CHECK11-NEXT: ret void 1905 // 1906 // 1907 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1908 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1909 // CHECK11-NEXT: entry: 1910 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1911 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1912 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1913 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1914 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1915 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1916 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1917 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1918 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1919 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 1920 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1921 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1922 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1923 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1924 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1925 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1926 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1927 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1928 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1929 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1930 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1931 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1932 // CHECK11: cond.true: 1933 // CHECK11-NEXT: br label [[COND_END:%.*]] 1934 // CHECK11: cond.false: 1935 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1936 // CHECK11-NEXT: br label [[COND_END]] 1937 // CHECK11: cond.end: 1938 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1939 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1940 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1941 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1942 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1943 // CHECK11: omp.inner.for.cond: 1944 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1945 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1946 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1947 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1948 // CHECK11: omp.inner.for.body: 1949 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1950 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1951 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1952 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1953 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1954 // CHECK11: omp.body.continue: 1955 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1956 // CHECK11: omp.inner.for.inc: 1957 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1958 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1959 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1960 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1961 // CHECK11: omp.inner.for.end: 1962 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1963 // CHECK11: omp.loop.exit: 1964 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1965 // CHECK11-NEXT: ret void 1966 // 1967 // 1968 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1969 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 1970 // CHECK11-NEXT: entry: 1971 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1972 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1973 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1974 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1975 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1976 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 1977 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1978 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1979 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1980 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1981 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1982 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1983 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1984 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1985 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 1986 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1987 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 1988 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1989 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1990 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1991 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1992 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1993 // CHECK11: omp_offload.failed: 1994 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1995 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1996 // CHECK11: omp_offload.cont: 1997 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1998 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1999 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2000 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2001 // CHECK11: arraydestroy.body: 2002 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2003 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2004 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2005 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2006 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2007 // CHECK11: arraydestroy.done2: 2008 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2009 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2010 // CHECK11-NEXT: ret i32 [[TMP4]] 2011 // 2012 // 2013 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2014 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2015 // CHECK11-NEXT: entry: 2016 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2017 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2018 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2019 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2020 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2021 // CHECK11-NEXT: ret void 2022 // 2023 // 2024 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2025 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2026 // CHECK11-NEXT: entry: 2027 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2028 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2029 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2030 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2031 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2032 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2033 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2034 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2035 // CHECK11-NEXT: ret void 2036 // 2037 // 2038 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2039 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2040 // CHECK11-NEXT: entry: 2041 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2042 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2043 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2044 // CHECK11-NEXT: ret void 2045 // 2046 // 2047 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2048 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2049 // CHECK11-NEXT: entry: 2050 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2051 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2052 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2053 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2054 // CHECK11-NEXT: ret void 2055 // 2056 // 2057 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2058 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2059 // CHECK11-NEXT: entry: 2060 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2061 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2062 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2063 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2064 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2065 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2066 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2067 // CHECK11-NEXT: ret void 2068 // 2069 // 2070 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2071 // CHECK11-SAME: () #[[ATTR3]] { 2072 // CHECK11-NEXT: entry: 2073 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2074 // CHECK11-NEXT: ret void 2075 // 2076 // 2077 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2078 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2079 // CHECK11-NEXT: entry: 2080 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2081 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2082 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2083 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2084 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2085 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2086 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2087 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2088 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2089 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2090 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2091 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2092 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2093 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2094 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2095 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2096 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2097 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2098 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2099 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2100 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2101 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2102 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2103 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2104 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2105 // CHECK11: arrayctor.loop: 2106 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2107 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2108 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2109 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2110 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2111 // CHECK11: arrayctor.cont: 2112 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2113 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2114 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2115 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2116 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2117 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2118 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2119 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2120 // CHECK11: cond.true: 2121 // CHECK11-NEXT: br label [[COND_END:%.*]] 2122 // CHECK11: cond.false: 2123 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2124 // CHECK11-NEXT: br label [[COND_END]] 2125 // CHECK11: cond.end: 2126 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2127 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2128 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2129 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2130 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2131 // CHECK11: omp.inner.for.cond: 2132 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2133 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2134 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2135 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2136 // CHECK11: omp.inner.for.cond.cleanup: 2137 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2138 // CHECK11: omp.inner.for.body: 2139 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2140 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2141 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2142 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2143 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2144 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2145 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2146 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2147 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 2148 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2149 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2150 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2151 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2152 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2153 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2154 // CHECK11: omp.body.continue: 2155 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2156 // CHECK11: omp.inner.for.inc: 2157 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2158 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2159 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2160 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2161 // CHECK11: omp.inner.for.end: 2162 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2163 // CHECK11: omp.loop.exit: 2164 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2165 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2166 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2167 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2168 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2169 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2170 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2171 // CHECK11: arraydestroy.body: 2172 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2173 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2174 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2175 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2176 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2177 // CHECK11: arraydestroy.done7: 2178 // CHECK11-NEXT: ret void 2179 // 2180 // 2181 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2182 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2183 // CHECK11-NEXT: entry: 2184 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2185 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2186 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2187 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2188 // CHECK11-NEXT: ret void 2189 // 2190 // 2191 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2192 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2193 // CHECK11-NEXT: entry: 2194 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2195 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2196 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2197 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2198 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2199 // CHECK11-NEXT: ret void 2200 // 2201 // 2202 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2203 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2204 // CHECK11-NEXT: entry: 2205 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2206 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2207 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2208 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2209 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2210 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2211 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2212 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2213 // CHECK11-NEXT: ret void 2214 // 2215 // 2216 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2217 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2218 // CHECK11-NEXT: entry: 2219 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2220 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2221 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2222 // CHECK11-NEXT: ret void 2223 // 2224 // 2225 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2226 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2227 // CHECK11-NEXT: entry: 2228 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2229 // CHECK11-NEXT: ret void 2230 // 2231 // 2232 // CHECK12-LABEL: define {{[^@]+}}@main 2233 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2234 // CHECK12-NEXT: entry: 2235 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2236 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2237 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2238 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2239 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2240 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2241 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2242 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2243 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2244 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2245 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2246 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2247 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2248 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2249 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2250 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2251 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2252 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2253 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2254 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2255 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2256 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2257 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2258 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2259 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2260 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2261 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2262 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2263 // CHECK12: omp_offload.failed: 2264 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 2265 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2266 // CHECK12: omp_offload.cont: 2267 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2268 // CHECK12-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2269 // CHECK12-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 2270 // CHECK12-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 2271 // CHECK12: omp_offload.failed3: 2272 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 2273 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT4]] 2274 // CHECK12: omp_offload.cont4: 2275 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2276 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2277 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2278 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2279 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2280 // CHECK12: arraydestroy.body: 2281 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2282 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2283 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2284 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2285 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2286 // CHECK12: arraydestroy.done5: 2287 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2288 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 2289 // CHECK12-NEXT: ret i32 [[TMP6]] 2290 // 2291 // 2292 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2293 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2294 // CHECK12-NEXT: entry: 2295 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2296 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2297 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2298 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2299 // CHECK12-NEXT: ret void 2300 // 2301 // 2302 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2303 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2304 // CHECK12-NEXT: entry: 2305 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2306 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2307 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2308 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2309 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2310 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2311 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2312 // CHECK12-NEXT: ret void 2313 // 2314 // 2315 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 2316 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 2317 // CHECK12-NEXT: entry: 2318 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2319 // CHECK12-NEXT: ret void 2320 // 2321 // 2322 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2323 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2324 // CHECK12-NEXT: entry: 2325 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2326 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2327 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2328 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2329 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2330 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2331 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2332 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2333 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2334 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2335 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2336 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2337 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2338 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2339 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2340 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2341 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2342 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2343 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2344 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2345 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2346 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2347 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2348 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2349 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2350 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2351 // CHECK12: arrayctor.loop: 2352 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2353 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2354 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2355 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2356 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2357 // CHECK12: arrayctor.cont: 2358 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2359 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2360 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2361 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2362 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2363 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2364 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2365 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2366 // CHECK12: cond.true: 2367 // CHECK12-NEXT: br label [[COND_END:%.*]] 2368 // CHECK12: cond.false: 2369 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2370 // CHECK12-NEXT: br label [[COND_END]] 2371 // CHECK12: cond.end: 2372 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2373 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2374 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2375 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2376 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2377 // CHECK12: omp.inner.for.cond: 2378 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2379 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2380 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2381 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2382 // CHECK12: omp.inner.for.cond.cleanup: 2383 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2384 // CHECK12: omp.inner.for.body: 2385 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2386 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2387 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2388 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2389 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2390 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2391 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2392 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2393 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 2394 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2395 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 2396 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 2397 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 2398 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2399 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2400 // CHECK12: omp.body.continue: 2401 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2402 // CHECK12: omp.inner.for.inc: 2403 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2404 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2405 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2406 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2407 // CHECK12: omp.inner.for.end: 2408 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2409 // CHECK12: omp.loop.exit: 2410 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2411 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2412 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2413 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2414 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2415 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2416 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2417 // CHECK12: arraydestroy.body: 2418 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2419 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2420 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2421 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2422 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2423 // CHECK12: arraydestroy.done7: 2424 // CHECK12-NEXT: ret void 2425 // 2426 // 2427 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2428 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2429 // CHECK12-NEXT: entry: 2430 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2431 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2432 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2433 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2434 // CHECK12-NEXT: ret void 2435 // 2436 // 2437 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2438 // CHECK12-SAME: () #[[ATTR3]] { 2439 // CHECK12-NEXT: entry: 2440 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 2441 // CHECK12-NEXT: ret void 2442 // 2443 // 2444 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2445 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2446 // CHECK12-NEXT: entry: 2447 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2448 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2449 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2450 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2451 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2452 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2453 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2454 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2455 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2456 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 2457 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2458 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2459 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2460 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2461 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2462 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2463 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2464 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2465 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2466 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2467 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2468 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2469 // CHECK12: cond.true: 2470 // CHECK12-NEXT: br label [[COND_END:%.*]] 2471 // CHECK12: cond.false: 2472 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2473 // CHECK12-NEXT: br label [[COND_END]] 2474 // CHECK12: cond.end: 2475 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2476 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2477 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2478 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2479 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2480 // CHECK12: omp.inner.for.cond: 2481 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2482 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2483 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2484 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2485 // CHECK12: omp.inner.for.body: 2486 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2487 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2488 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2489 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2490 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2491 // CHECK12: omp.body.continue: 2492 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2493 // CHECK12: omp.inner.for.inc: 2494 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2495 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 2496 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2497 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2498 // CHECK12: omp.inner.for.end: 2499 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2500 // CHECK12: omp.loop.exit: 2501 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2502 // CHECK12-NEXT: ret void 2503 // 2504 // 2505 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2506 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 2507 // CHECK12-NEXT: entry: 2508 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2509 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2510 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2511 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2512 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2513 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2514 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2515 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2516 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2517 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2518 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2519 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2520 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2521 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2522 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2523 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2524 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2525 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2526 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2527 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2528 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2529 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2530 // CHECK12: omp_offload.failed: 2531 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2532 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2533 // CHECK12: omp_offload.cont: 2534 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2535 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2536 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2537 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2538 // CHECK12: arraydestroy.body: 2539 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2540 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2541 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2542 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2543 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2544 // CHECK12: arraydestroy.done2: 2545 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2546 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2547 // CHECK12-NEXT: ret i32 [[TMP4]] 2548 // 2549 // 2550 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2551 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2552 // CHECK12-NEXT: entry: 2553 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2554 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2555 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2556 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2557 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 2558 // CHECK12-NEXT: ret void 2559 // 2560 // 2561 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2562 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2563 // CHECK12-NEXT: entry: 2564 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2565 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2566 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2567 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2568 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2569 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2570 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2571 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 2572 // CHECK12-NEXT: ret void 2573 // 2574 // 2575 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2576 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2577 // CHECK12-NEXT: entry: 2578 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2579 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2580 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2581 // CHECK12-NEXT: ret void 2582 // 2583 // 2584 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2585 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2586 // CHECK12-NEXT: entry: 2587 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2588 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2589 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2590 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2591 // CHECK12-NEXT: ret void 2592 // 2593 // 2594 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2595 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2596 // CHECK12-NEXT: entry: 2597 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2598 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2599 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2600 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2601 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2602 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2603 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2604 // CHECK12-NEXT: ret void 2605 // 2606 // 2607 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2608 // CHECK12-SAME: () #[[ATTR3]] { 2609 // CHECK12-NEXT: entry: 2610 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2611 // CHECK12-NEXT: ret void 2612 // 2613 // 2614 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 2615 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2616 // CHECK12-NEXT: entry: 2617 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2618 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2619 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2620 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2621 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2622 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2623 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2624 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2625 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2626 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2627 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2628 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2629 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2630 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2631 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2632 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2633 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2634 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2635 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2636 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2637 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2638 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2639 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2640 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2641 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2642 // CHECK12: arrayctor.loop: 2643 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2644 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2645 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2646 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2647 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2648 // CHECK12: arrayctor.cont: 2649 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2650 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2651 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2652 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2653 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2654 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2655 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2656 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2657 // CHECK12: cond.true: 2658 // CHECK12-NEXT: br label [[COND_END:%.*]] 2659 // CHECK12: cond.false: 2660 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2661 // CHECK12-NEXT: br label [[COND_END]] 2662 // CHECK12: cond.end: 2663 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2664 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2665 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2666 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2667 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2668 // CHECK12: omp.inner.for.cond: 2669 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2670 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2671 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2672 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2673 // CHECK12: omp.inner.for.cond.cleanup: 2674 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2675 // CHECK12: omp.inner.for.body: 2676 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2677 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2678 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2679 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2680 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2681 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2682 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2683 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2684 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 2685 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2686 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2687 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2688 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2689 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2690 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2691 // CHECK12: omp.body.continue: 2692 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2693 // CHECK12: omp.inner.for.inc: 2694 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2695 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2696 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2697 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2698 // CHECK12: omp.inner.for.end: 2699 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2700 // CHECK12: omp.loop.exit: 2701 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2702 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2703 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2704 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2705 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2706 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2707 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2708 // CHECK12: arraydestroy.body: 2709 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2710 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2711 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2712 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2713 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2714 // CHECK12: arraydestroy.done7: 2715 // CHECK12-NEXT: ret void 2716 // 2717 // 2718 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2719 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2720 // CHECK12-NEXT: entry: 2721 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2722 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2723 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2724 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2725 // CHECK12-NEXT: ret void 2726 // 2727 // 2728 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2729 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2730 // CHECK12-NEXT: entry: 2731 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2732 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2733 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2734 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2735 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 2736 // CHECK12-NEXT: ret void 2737 // 2738 // 2739 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2740 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2741 // CHECK12-NEXT: entry: 2742 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2743 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2744 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2745 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2746 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2747 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2748 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2749 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2750 // CHECK12-NEXT: ret void 2751 // 2752 // 2753 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2754 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2755 // CHECK12-NEXT: entry: 2756 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2757 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2758 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2759 // CHECK12-NEXT: ret void 2760 // 2761 // 2762 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2763 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 2764 // CHECK12-NEXT: entry: 2765 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 2766 // CHECK12-NEXT: ret void 2767 // 2768 // 2769 // CHECK13-LABEL: define {{[^@]+}}@main 2770 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2771 // CHECK13-NEXT: entry: 2772 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2773 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 2774 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 2775 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2776 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2777 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2778 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2779 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 2780 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2781 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 2782 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 2783 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 2784 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2785 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2786 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2787 // CHECK13-NEXT: [[I9:%.*]] = alloca i32, align 4 2788 // CHECK13-NEXT: [[I10:%.*]] = alloca i32, align 4 2789 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 2790 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 2791 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2792 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 2793 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2794 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2795 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2796 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2797 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2798 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2799 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 2800 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 2801 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2802 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2803 // CHECK13: arrayctor.loop: 2804 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2805 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2806 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 2807 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2808 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2809 // CHECK13: arrayctor.cont: 2810 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 2811 // CHECK13-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 2812 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 2813 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 2814 // CHECK13: for.cond: 2815 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2816 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2817 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2818 // CHECK13: for.body: 2819 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 2820 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2821 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 2822 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 2823 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 2824 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2825 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2826 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 2827 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 2828 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 2829 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 2830 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 2831 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 2832 // CHECK13: for.inc: 2833 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 2834 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 2835 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 2836 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2837 // CHECK13: for.end: 2838 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 2839 // CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 2840 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 2841 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2842 // CHECK13: arraydestroy.body: 2843 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2844 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2845 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2846 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 2847 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 2848 // CHECK13: arraydestroy.done8: 2849 // CHECK13-NEXT: store i32 0, i32* [[I10]], align 4 2850 // CHECK13-NEXT: br label [[FOR_COND11:%.*]] 2851 // CHECK13: for.cond11: 2852 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I10]], align 4 2853 // CHECK13-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP10]], 2 2854 // CHECK13-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END16:%.*]] 2855 // CHECK13: for.body13: 2856 // CHECK13-NEXT: br label [[FOR_INC14:%.*]] 2857 // CHECK13: for.inc14: 2858 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I10]], align 4 2859 // CHECK13-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP11]], 1 2860 // CHECK13-NEXT: store i32 [[INC15]], i32* [[I10]], align 4 2861 // CHECK13-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP4:![0-9]+]] 2862 // CHECK13: for.end16: 2863 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 2864 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2865 // CHECK13-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2866 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2 2867 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]] 2868 // CHECK13: arraydestroy.body18: 2869 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END16]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ] 2870 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1 2871 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]] 2872 // CHECK13-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]] 2873 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]] 2874 // CHECK13: arraydestroy.done22: 2875 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2876 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 2877 // CHECK13-NEXT: ret i32 [[TMP13]] 2878 // 2879 // 2880 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2881 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2882 // CHECK13-NEXT: entry: 2883 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2884 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2885 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2886 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2887 // CHECK13-NEXT: ret void 2888 // 2889 // 2890 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2891 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2892 // CHECK13-NEXT: entry: 2893 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2894 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2895 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2896 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2897 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2898 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2899 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2900 // CHECK13-NEXT: ret void 2901 // 2902 // 2903 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2904 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2905 // CHECK13-NEXT: entry: 2906 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2907 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2908 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2909 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2910 // CHECK13-NEXT: ret void 2911 // 2912 // 2913 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2914 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 2915 // CHECK13-NEXT: entry: 2916 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2917 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2918 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2919 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2920 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2921 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 2922 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2923 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 2924 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 2925 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 2926 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2927 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2928 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2929 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 2930 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2931 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2932 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2933 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 2934 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2935 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 2936 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2937 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 2938 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2939 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2940 // CHECK13: arrayctor.loop: 2941 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2942 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2943 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2944 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2945 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2946 // CHECK13: arrayctor.cont: 2947 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 2948 // CHECK13-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 2949 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 2950 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 2951 // CHECK13: for.cond: 2952 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2953 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2954 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2955 // CHECK13: for.body: 2956 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 2957 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2958 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 2959 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 2960 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 2961 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2962 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 2963 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 2964 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 2965 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 2966 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2967 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 2968 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 2969 // CHECK13: for.inc: 2970 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 2971 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 2972 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 2973 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2974 // CHECK13: for.end: 2975 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 2976 // CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 2977 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 2978 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2979 // CHECK13: arraydestroy.body: 2980 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2981 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2982 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2983 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 2984 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 2985 // CHECK13: arraydestroy.done8: 2986 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 2987 // CHECK13-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2988 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 2989 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 2990 // CHECK13: arraydestroy.body10: 2991 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 2992 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 2993 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 2994 // CHECK13-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 2995 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 2996 // CHECK13: arraydestroy.done14: 2997 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2998 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 2999 // CHECK13-NEXT: ret i32 [[TMP11]] 3000 // 3001 // 3002 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3003 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3004 // CHECK13-NEXT: entry: 3005 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3006 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3007 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3008 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3009 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3010 // CHECK13-NEXT: ret void 3011 // 3012 // 3013 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3014 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3015 // CHECK13-NEXT: entry: 3016 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3017 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3018 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3019 // CHECK13-NEXT: ret void 3020 // 3021 // 3022 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3023 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3024 // CHECK13-NEXT: entry: 3025 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3026 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3027 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3028 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3029 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3030 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3031 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3032 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3033 // CHECK13-NEXT: ret void 3034 // 3035 // 3036 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3037 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3038 // CHECK13-NEXT: entry: 3039 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3040 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3041 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3042 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3043 // CHECK13-NEXT: ret void 3044 // 3045 // 3046 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3047 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3048 // CHECK13-NEXT: entry: 3049 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3050 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3051 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3052 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3053 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3054 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3055 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3056 // CHECK13-NEXT: ret void 3057 // 3058 // 3059 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3060 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3061 // CHECK13-NEXT: entry: 3062 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3063 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3064 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3065 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3066 // CHECK13-NEXT: ret void 3067 // 3068 // 3069 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3070 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3071 // CHECK13-NEXT: entry: 3072 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3073 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3074 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3075 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3076 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3077 // CHECK13-NEXT: ret void 3078 // 3079 // 3080 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3081 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3082 // CHECK13-NEXT: entry: 3083 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3084 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3085 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3086 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3087 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3088 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3089 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3090 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3091 // CHECK13-NEXT: ret void 3092 // 3093 // 3094 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3095 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3096 // CHECK13-NEXT: entry: 3097 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3098 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3099 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3100 // CHECK13-NEXT: ret void 3101 // 3102 // 3103 // CHECK14-LABEL: define {{[^@]+}}@main 3104 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3105 // CHECK14-NEXT: entry: 3106 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3107 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3108 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3109 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3110 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3111 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3112 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3113 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3114 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3115 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3116 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3117 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3118 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3119 // CHECK14-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3120 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3121 // CHECK14-NEXT: [[I9:%.*]] = alloca i32, align 4 3122 // CHECK14-NEXT: [[I10:%.*]] = alloca i32, align 4 3123 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3124 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3125 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3126 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3127 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3128 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3129 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3130 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3131 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3132 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3133 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3134 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3135 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3136 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3137 // CHECK14: arrayctor.loop: 3138 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3139 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3140 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3141 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3142 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3143 // CHECK14: arrayctor.cont: 3144 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3145 // CHECK14-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 3146 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3147 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3148 // CHECK14: for.cond: 3149 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3150 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3151 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3152 // CHECK14: for.body: 3153 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3154 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3155 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 3156 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3157 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3158 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3159 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3160 // CHECK14-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 3161 // CHECK14-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 3162 // CHECK14-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 3163 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 3164 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 3165 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3166 // CHECK14: for.inc: 3167 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3168 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3169 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3170 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3171 // CHECK14: for.end: 3172 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3173 // CHECK14-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3174 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 3175 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3176 // CHECK14: arraydestroy.body: 3177 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3178 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3179 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3180 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 3181 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 3182 // CHECK14: arraydestroy.done8: 3183 // CHECK14-NEXT: store i32 0, i32* [[I10]], align 4 3184 // CHECK14-NEXT: br label [[FOR_COND11:%.*]] 3185 // CHECK14: for.cond11: 3186 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I10]], align 4 3187 // CHECK14-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP10]], 2 3188 // CHECK14-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END16:%.*]] 3189 // CHECK14: for.body13: 3190 // CHECK14-NEXT: br label [[FOR_INC14:%.*]] 3191 // CHECK14: for.inc14: 3192 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I10]], align 4 3193 // CHECK14-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP11]], 1 3194 // CHECK14-NEXT: store i32 [[INC15]], i32* [[I10]], align 4 3195 // CHECK14-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP4:![0-9]+]] 3196 // CHECK14: for.end16: 3197 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3198 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3199 // CHECK14-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3200 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2 3201 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]] 3202 // CHECK14: arraydestroy.body18: 3203 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END16]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ] 3204 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1 3205 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]] 3206 // CHECK14-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]] 3207 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]] 3208 // CHECK14: arraydestroy.done22: 3209 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3210 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3211 // CHECK14-NEXT: ret i32 [[TMP13]] 3212 // 3213 // 3214 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3215 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3216 // CHECK14-NEXT: entry: 3217 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3218 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3219 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3220 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3221 // CHECK14-NEXT: ret void 3222 // 3223 // 3224 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3225 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3226 // CHECK14-NEXT: entry: 3227 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3228 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3229 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3230 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3231 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3232 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3233 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3234 // CHECK14-NEXT: ret void 3235 // 3236 // 3237 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3238 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3239 // CHECK14-NEXT: entry: 3240 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3241 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3242 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3243 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3244 // CHECK14-NEXT: ret void 3245 // 3246 // 3247 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3248 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 3249 // CHECK14-NEXT: entry: 3250 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3251 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3252 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3253 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3254 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3255 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3256 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3257 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3258 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 3259 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 3260 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3261 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3262 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3263 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3264 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3265 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3266 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3267 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3268 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3269 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3270 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3271 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3272 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3273 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3274 // CHECK14: arrayctor.loop: 3275 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3276 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3277 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3278 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3279 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3280 // CHECK14: arrayctor.cont: 3281 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3282 // CHECK14-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 3283 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3284 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3285 // CHECK14: for.cond: 3286 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3287 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3288 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3289 // CHECK14: for.body: 3290 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3291 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3292 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 3293 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3294 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3295 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3296 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3297 // CHECK14-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 3298 // CHECK14-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 3299 // CHECK14-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 3300 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3301 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 3302 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3303 // CHECK14: for.inc: 3304 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3305 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3306 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3307 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3308 // CHECK14: for.end: 3309 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3310 // CHECK14-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3311 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 3312 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3313 // CHECK14: arraydestroy.body: 3314 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3315 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3316 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3317 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 3318 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 3319 // CHECK14: arraydestroy.done8: 3320 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3321 // CHECK14-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3322 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 3323 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 3324 // CHECK14: arraydestroy.body10: 3325 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 3326 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 3327 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 3328 // CHECK14-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 3329 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 3330 // CHECK14: arraydestroy.done14: 3331 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3332 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3333 // CHECK14-NEXT: ret i32 [[TMP11]] 3334 // 3335 // 3336 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3337 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3338 // CHECK14-NEXT: entry: 3339 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3340 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3341 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3342 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3343 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 3344 // CHECK14-NEXT: ret void 3345 // 3346 // 3347 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3348 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3349 // CHECK14-NEXT: entry: 3350 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3351 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3352 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3353 // CHECK14-NEXT: ret void 3354 // 3355 // 3356 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3357 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3358 // CHECK14-NEXT: entry: 3359 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3360 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3361 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3362 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3363 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3364 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3365 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3366 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 3367 // CHECK14-NEXT: ret void 3368 // 3369 // 3370 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3371 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3372 // CHECK14-NEXT: entry: 3373 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3374 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3375 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3376 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3377 // CHECK14-NEXT: ret void 3378 // 3379 // 3380 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3381 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3382 // CHECK14-NEXT: entry: 3383 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3384 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3385 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3386 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3387 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3388 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3389 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3390 // CHECK14-NEXT: ret void 3391 // 3392 // 3393 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3394 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3395 // CHECK14-NEXT: entry: 3396 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3397 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3398 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3399 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3400 // CHECK14-NEXT: ret void 3401 // 3402 // 3403 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3404 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3405 // CHECK14-NEXT: entry: 3406 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3407 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3408 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3409 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3410 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 3411 // CHECK14-NEXT: ret void 3412 // 3413 // 3414 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3415 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3416 // CHECK14-NEXT: entry: 3417 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3418 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3419 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3420 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3421 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3422 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3423 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3424 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3425 // CHECK14-NEXT: ret void 3426 // 3427 // 3428 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3429 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3430 // CHECK14-NEXT: entry: 3431 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3432 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3433 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3434 // CHECK14-NEXT: ret void 3435 // 3436 // 3437 // CHECK15-LABEL: define {{[^@]+}}@main 3438 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 3439 // CHECK15-NEXT: entry: 3440 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3441 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 3442 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 3443 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3444 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3445 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3446 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3447 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3448 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3449 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3450 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3451 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3452 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3453 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3454 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3455 // CHECK15-NEXT: [[I8:%.*]] = alloca i32, align 4 3456 // CHECK15-NEXT: [[I9:%.*]] = alloca i32, align 4 3457 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3458 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 3459 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3460 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 3461 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3462 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3463 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3464 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3465 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3466 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3467 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3468 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3469 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3470 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3471 // CHECK15: arrayctor.loop: 3472 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3473 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3474 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3475 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3476 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3477 // CHECK15: arrayctor.cont: 3478 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3479 // CHECK15-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 4 3480 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3481 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 3482 // CHECK15: for.cond: 3483 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3484 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3485 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3486 // CHECK15: for.body: 3487 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3488 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3489 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 3490 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3491 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3492 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3493 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP5]] 3494 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3495 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 3496 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 3497 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 3498 // CHECK15: for.inc: 3499 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3500 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3501 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 3502 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3503 // CHECK15: for.end: 3504 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3505 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3506 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 3507 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3508 // CHECK15: arraydestroy.body: 3509 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3510 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3511 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3512 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3513 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3514 // CHECK15: arraydestroy.done7: 3515 // CHECK15-NEXT: store i32 0, i32* [[I9]], align 4 3516 // CHECK15-NEXT: br label [[FOR_COND10:%.*]] 3517 // CHECK15: for.cond10: 3518 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I9]], align 4 3519 // CHECK15-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP10]], 2 3520 // CHECK15-NEXT: br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END15:%.*]] 3521 // CHECK15: for.body12: 3522 // CHECK15-NEXT: br label [[FOR_INC13:%.*]] 3523 // CHECK15: for.inc13: 3524 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I9]], align 4 3525 // CHECK15-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP11]], 1 3526 // CHECK15-NEXT: store i32 [[INC14]], i32* [[I9]], align 4 3527 // CHECK15-NEXT: br label [[FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]] 3528 // CHECK15: for.end15: 3529 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3530 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3531 // CHECK15-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3532 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i32 2 3533 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]] 3534 // CHECK15: arraydestroy.body17: 3535 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 3536 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1 3537 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]] 3538 // CHECK15-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]] 3539 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]] 3540 // CHECK15: arraydestroy.done21: 3541 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3542 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3543 // CHECK15-NEXT: ret i32 [[TMP13]] 3544 // 3545 // 3546 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3547 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3548 // CHECK15-NEXT: entry: 3549 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3550 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3551 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3552 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3553 // CHECK15-NEXT: ret void 3554 // 3555 // 3556 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3557 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3558 // CHECK15-NEXT: entry: 3559 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3560 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3561 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3562 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3563 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3564 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3565 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3566 // CHECK15-NEXT: ret void 3567 // 3568 // 3569 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3570 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3571 // CHECK15-NEXT: entry: 3572 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3573 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3574 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3575 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3576 // CHECK15-NEXT: ret void 3577 // 3578 // 3579 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3580 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 3581 // CHECK15-NEXT: entry: 3582 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3583 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3584 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3585 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3586 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3587 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3588 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3589 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3590 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 3591 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 3592 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3593 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3594 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3595 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 3596 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3597 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3598 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3599 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3600 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3601 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3602 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3603 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3604 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3605 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3606 // CHECK15: arrayctor.loop: 3607 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3608 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3609 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3610 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3611 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3612 // CHECK15: arrayctor.cont: 3613 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3614 // CHECK15-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 4 3615 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3616 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 3617 // CHECK15: for.cond: 3618 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3619 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3620 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3621 // CHECK15: for.body: 3622 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3623 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3624 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 3625 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3626 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3627 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3628 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP5]] 3629 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 3630 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3631 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 3632 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 3633 // CHECK15: for.inc: 3634 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3635 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3636 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 3637 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 3638 // CHECK15: for.end: 3639 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3640 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3641 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 3642 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3643 // CHECK15: arraydestroy.body: 3644 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3645 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3646 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3647 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3648 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3649 // CHECK15: arraydestroy.done7: 3650 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3651 // CHECK15-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3652 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 3653 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3654 // CHECK15: arraydestroy.body9: 3655 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3656 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 3657 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3658 // CHECK15-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3659 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3660 // CHECK15: arraydestroy.done13: 3661 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3662 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3663 // CHECK15-NEXT: ret i32 [[TMP11]] 3664 // 3665 // 3666 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3667 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3668 // CHECK15-NEXT: entry: 3669 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3670 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3671 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3672 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3673 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 3674 // CHECK15-NEXT: ret void 3675 // 3676 // 3677 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3678 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3679 // CHECK15-NEXT: entry: 3680 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3681 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3682 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3683 // CHECK15-NEXT: ret void 3684 // 3685 // 3686 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3687 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3688 // CHECK15-NEXT: entry: 3689 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3690 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3691 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3692 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3693 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3694 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3695 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3696 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 3697 // CHECK15-NEXT: ret void 3698 // 3699 // 3700 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3701 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3702 // CHECK15-NEXT: entry: 3703 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3704 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3705 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3706 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3707 // CHECK15-NEXT: ret void 3708 // 3709 // 3710 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3711 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3712 // CHECK15-NEXT: entry: 3713 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3714 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3715 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3716 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3717 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3718 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3719 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3720 // CHECK15-NEXT: ret void 3721 // 3722 // 3723 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3724 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3725 // CHECK15-NEXT: entry: 3726 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3727 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3728 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3729 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3730 // CHECK15-NEXT: ret void 3731 // 3732 // 3733 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3734 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3735 // CHECK15-NEXT: entry: 3736 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3737 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3738 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3739 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3740 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 3741 // CHECK15-NEXT: ret void 3742 // 3743 // 3744 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3745 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3746 // CHECK15-NEXT: entry: 3747 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3748 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3749 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3750 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3751 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3752 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3753 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3754 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3755 // CHECK15-NEXT: ret void 3756 // 3757 // 3758 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3759 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3760 // CHECK15-NEXT: entry: 3761 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3762 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3763 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3764 // CHECK15-NEXT: ret void 3765 // 3766 // 3767 // CHECK16-LABEL: define {{[^@]+}}@main 3768 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 3769 // CHECK16-NEXT: entry: 3770 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3771 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 3772 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 3773 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3774 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3775 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3776 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3777 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3778 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3779 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3780 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3781 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3782 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3783 // CHECK16-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3784 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 3785 // CHECK16-NEXT: [[I8:%.*]] = alloca i32, align 4 3786 // CHECK16-NEXT: [[I9:%.*]] = alloca i32, align 4 3787 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 3788 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 3789 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3790 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 3791 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3792 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3793 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3794 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3795 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3796 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3797 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3798 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3799 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3800 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3801 // CHECK16: arrayctor.loop: 3802 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3803 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3804 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3805 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3806 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3807 // CHECK16: arrayctor.cont: 3808 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3809 // CHECK16-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 4 3810 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 3811 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 3812 // CHECK16: for.cond: 3813 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3814 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3815 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3816 // CHECK16: for.body: 3817 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3818 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3819 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 3820 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3821 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3822 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3823 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP5]] 3824 // CHECK16-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 3825 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 3826 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 3827 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 3828 // CHECK16: for.inc: 3829 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3830 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3831 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 3832 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3833 // CHECK16: for.end: 3834 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3835 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3836 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 3837 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3838 // CHECK16: arraydestroy.body: 3839 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3840 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3841 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3842 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3843 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3844 // CHECK16: arraydestroy.done7: 3845 // CHECK16-NEXT: store i32 0, i32* [[I9]], align 4 3846 // CHECK16-NEXT: br label [[FOR_COND10:%.*]] 3847 // CHECK16: for.cond10: 3848 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I9]], align 4 3849 // CHECK16-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP10]], 2 3850 // CHECK16-NEXT: br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END15:%.*]] 3851 // CHECK16: for.body12: 3852 // CHECK16-NEXT: br label [[FOR_INC13:%.*]] 3853 // CHECK16: for.inc13: 3854 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I9]], align 4 3855 // CHECK16-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP11]], 1 3856 // CHECK16-NEXT: store i32 [[INC14]], i32* [[I9]], align 4 3857 // CHECK16-NEXT: br label [[FOR_COND10]], !llvm.loop [[LOOP5:![0-9]+]] 3858 // CHECK16: for.end15: 3859 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 3860 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3861 // CHECK16-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3862 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN16]], i32 2 3863 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]] 3864 // CHECK16: arraydestroy.body17: 3865 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 3866 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1 3867 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]] 3868 // CHECK16-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]] 3869 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]] 3870 // CHECK16: arraydestroy.done21: 3871 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3872 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 3873 // CHECK16-NEXT: ret i32 [[TMP13]] 3874 // 3875 // 3876 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3877 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3878 // CHECK16-NEXT: entry: 3879 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3880 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3881 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3882 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3883 // CHECK16-NEXT: ret void 3884 // 3885 // 3886 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3887 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3888 // CHECK16-NEXT: entry: 3889 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3890 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3891 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3892 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3893 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3894 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3895 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3896 // CHECK16-NEXT: ret void 3897 // 3898 // 3899 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3900 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3901 // CHECK16-NEXT: entry: 3902 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3903 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3904 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3905 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3906 // CHECK16-NEXT: ret void 3907 // 3908 // 3909 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3910 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 3911 // CHECK16-NEXT: entry: 3912 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3913 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3914 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3915 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3916 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3917 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3918 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3919 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3920 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 3921 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 3922 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3923 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 3924 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3925 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 3926 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3927 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3928 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3929 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3930 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3931 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3932 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3933 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3934 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3935 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3936 // CHECK16: arrayctor.loop: 3937 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3938 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3939 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3940 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3941 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3942 // CHECK16: arrayctor.cont: 3943 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3944 // CHECK16-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 4 3945 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 3946 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 3947 // CHECK16: for.cond: 3948 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3949 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3950 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3951 // CHECK16: for.body: 3952 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3953 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3954 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 3955 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3956 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3957 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3958 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP5]] 3959 // CHECK16-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 3960 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3961 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 3962 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 3963 // CHECK16: for.inc: 3964 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3965 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3966 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 3967 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 3968 // CHECK16: for.end: 3969 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3970 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3971 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 3972 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3973 // CHECK16: arraydestroy.body: 3974 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3975 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3976 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3977 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3978 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3979 // CHECK16: arraydestroy.done7: 3980 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 3981 // CHECK16-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3982 // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 3983 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 3984 // CHECK16: arraydestroy.body9: 3985 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 3986 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 3987 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 3988 // CHECK16-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 3989 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 3990 // CHECK16: arraydestroy.done13: 3991 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3992 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3993 // CHECK16-NEXT: ret i32 [[TMP11]] 3994 // 3995 // 3996 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3997 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3998 // CHECK16-NEXT: entry: 3999 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4000 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4001 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4002 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4003 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4004 // CHECK16-NEXT: ret void 4005 // 4006 // 4007 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4008 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4009 // CHECK16-NEXT: entry: 4010 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4011 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4012 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4013 // CHECK16-NEXT: ret void 4014 // 4015 // 4016 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4017 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4018 // CHECK16-NEXT: entry: 4019 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4020 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4021 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4022 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4023 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4024 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4025 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4026 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4027 // CHECK16-NEXT: ret void 4028 // 4029 // 4030 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4031 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4032 // CHECK16-NEXT: entry: 4033 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4034 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4035 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4036 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4037 // CHECK16-NEXT: ret void 4038 // 4039 // 4040 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4041 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4042 // CHECK16-NEXT: entry: 4043 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4044 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4045 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4046 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4047 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4048 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4049 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4050 // CHECK16-NEXT: ret void 4051 // 4052 // 4053 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4054 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4055 // CHECK16-NEXT: entry: 4056 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4057 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4058 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4059 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4060 // CHECK16-NEXT: ret void 4061 // 4062 // 4063 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4064 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4065 // CHECK16-NEXT: entry: 4066 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4067 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4068 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4069 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4070 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4071 // CHECK16-NEXT: ret void 4072 // 4073 // 4074 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4075 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4076 // CHECK16-NEXT: entry: 4077 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4078 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4079 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4080 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4081 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4082 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4083 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4084 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4085 // CHECK16-NEXT: ret void 4086 // 4087 // 4088 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4089 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4090 // CHECK16-NEXT: entry: 4091 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4092 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4093 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4094 // CHECK16-NEXT: ret void 4095 // 4096