1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 3; 75 sfvar = 4.0; 76 [&]() { 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 8.0; 81 82 }(); 83 } 84 }(); 85 return 0; 86 #else 87 S<float> test; 88 int t_var = 0; 89 int vec[] = {1, 2}; 90 S<float> s_arr[] = {1, 2}; 91 S<float> &var = test; 92 93 #pragma omp target 94 #pragma omp teams 95 #pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var, svar) 96 for (int i = 0; i < 2; ++i) { 97 vec[i] = t_var; 98 s_arr[i] = var; 99 } 100 int i; 101 102 #pragma omp target 103 #pragma omp teams 104 #pragma omp distribute private(i) 105 for (i = 0; i < 2; ++i) { 106 ; 107 } 108 return tmain<int>(); 109 #endif 110 } 111 112 113 114 115 116 #endif 117 // CHECK1-LABEL: define {{[^@]+}}@main 118 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 119 // CHECK1-NEXT: entry: 120 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 122 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 123 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 124 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 125 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 126 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 127 // CHECK1-NEXT: ret i32 0 128 // 129 // 130 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 131 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 132 // CHECK1-NEXT: entry: 133 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 134 // CHECK1-NEXT: ret void 135 // 136 // 137 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 138 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 141 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 145 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 146 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 150 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 151 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 152 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 154 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 156 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 157 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 158 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 160 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 163 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 164 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 166 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 169 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 170 // CHECK1: cond.true: 171 // CHECK1-NEXT: br label [[COND_END:%.*]] 172 // CHECK1: cond.false: 173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 174 // CHECK1-NEXT: br label [[COND_END]] 175 // CHECK1: cond.end: 176 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 177 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 179 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 181 // CHECK1: omp.inner.for.cond: 182 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 184 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 185 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 186 // CHECK1: omp.inner.for.body: 187 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 189 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 190 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 191 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8 192 // CHECK1-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 193 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 194 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4 195 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 196 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 197 // CHECK1-NEXT: store double* [[G]], double** [[TMP9]], align 8 198 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 199 // CHECK1-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 200 // CHECK1-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 201 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 202 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 203 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 204 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 205 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 206 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 207 // CHECK1: omp.body.continue: 208 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 209 // CHECK1: omp.inner.for.inc: 210 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 211 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 212 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 213 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 214 // CHECK1: omp.inner.for.end: 215 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 216 // CHECK1: omp.loop.exit: 217 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 218 // CHECK1-NEXT: ret void 219 // 220 // 221 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 222 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 223 // CHECK1-NEXT: entry: 224 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 225 // CHECK1-NEXT: ret void 226 // 227 // 228 // CHECK2-LABEL: define {{[^@]+}}@main 229 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 230 // CHECK2-NEXT: entry: 231 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 232 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 233 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 234 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 235 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 236 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 237 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 238 // CHECK2-NEXT: ret i32 0 239 // 240 // 241 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 242 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 243 // CHECK2-NEXT: entry: 244 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 245 // CHECK2-NEXT: ret void 246 // 247 // 248 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 249 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 250 // CHECK2-NEXT: entry: 251 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 252 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 253 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 254 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 255 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 256 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 257 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 258 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 259 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 260 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 261 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 262 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 263 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 264 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 265 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 266 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 267 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 268 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 269 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 270 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 271 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 272 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 273 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 274 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 275 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 276 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 277 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 278 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 279 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 280 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 281 // CHECK2: cond.true: 282 // CHECK2-NEXT: br label [[COND_END:%.*]] 283 // CHECK2: cond.false: 284 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 285 // CHECK2-NEXT: br label [[COND_END]] 286 // CHECK2: cond.end: 287 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 288 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 289 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 290 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 291 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 292 // CHECK2: omp.inner.for.cond: 293 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 294 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 295 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 296 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 297 // CHECK2: omp.inner.for.body: 298 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 299 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 300 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 301 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 302 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8 303 // CHECK2-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 304 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 305 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4 306 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 307 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 308 // CHECK2-NEXT: store double* [[G]], double** [[TMP9]], align 8 309 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 310 // CHECK2-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 311 // CHECK2-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 312 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 313 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 314 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 315 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 316 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 317 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 318 // CHECK2: omp.body.continue: 319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 320 // CHECK2: omp.inner.for.inc: 321 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 322 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 323 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 324 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 325 // CHECK2: omp.inner.for.end: 326 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 327 // CHECK2: omp.loop.exit: 328 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 329 // CHECK2-NEXT: ret void 330 // 331 // 332 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 333 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 334 // CHECK2-NEXT: entry: 335 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 336 // CHECK2-NEXT: ret void 337 // 338 // 339 // CHECK3-LABEL: define {{[^@]+}}@main 340 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 341 // CHECK3-NEXT: entry: 342 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 343 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 344 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 345 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 346 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 347 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 348 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 349 // CHECK3-NEXT: ret i32 0 350 // 351 // 352 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 353 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 354 // CHECK3-NEXT: entry: 355 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 356 // CHECK3-NEXT: ret void 357 // 358 // 359 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 360 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 361 // CHECK3-NEXT: entry: 362 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 363 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 364 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 365 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 366 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 367 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 368 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 369 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 370 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 371 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 372 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 373 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 374 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 375 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 376 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 377 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 378 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 379 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 380 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 381 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 382 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 383 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 384 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 385 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 386 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 387 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 388 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 389 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 390 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 391 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 392 // CHECK3: cond.true: 393 // CHECK3-NEXT: br label [[COND_END:%.*]] 394 // CHECK3: cond.false: 395 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 396 // CHECK3-NEXT: br label [[COND_END]] 397 // CHECK3: cond.end: 398 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 399 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 400 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 401 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 403 // CHECK3: omp.inner.for.cond: 404 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 405 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 406 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 407 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 408 // CHECK3: omp.inner.for.body: 409 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 410 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 411 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 412 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 413 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8 414 // CHECK3-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4 415 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4 416 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4 417 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 418 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 419 // CHECK3-NEXT: store double* [[G]], double** [[TMP9]], align 4 420 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 421 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4 422 // CHECK3-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4 423 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 424 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4 425 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 426 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4 427 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 428 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 429 // CHECK3: omp.body.continue: 430 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 431 // CHECK3: omp.inner.for.inc: 432 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 433 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 434 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 435 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 436 // CHECK3: omp.inner.for.end: 437 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 438 // CHECK3: omp.loop.exit: 439 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 440 // CHECK3-NEXT: ret void 441 // 442 // 443 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 444 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 445 // CHECK3-NEXT: entry: 446 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 447 // CHECK3-NEXT: ret void 448 // 449 // 450 // CHECK4-LABEL: define {{[^@]+}}@main 451 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 452 // CHECK4-NEXT: entry: 453 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 454 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 455 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 456 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 457 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 458 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 459 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 460 // CHECK4-NEXT: ret i32 0 461 // 462 // 463 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 464 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 465 // CHECK4-NEXT: entry: 466 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 467 // CHECK4-NEXT: ret void 468 // 469 // 470 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 471 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 472 // CHECK4-NEXT: entry: 473 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 474 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 475 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 476 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 477 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 478 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 479 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 480 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 481 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 482 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 483 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 484 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 485 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 486 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 487 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 488 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 489 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 490 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 491 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 492 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 493 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 494 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 495 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 496 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 497 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 498 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 499 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 500 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 501 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 502 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 503 // CHECK4: cond.true: 504 // CHECK4-NEXT: br label [[COND_END:%.*]] 505 // CHECK4: cond.false: 506 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 507 // CHECK4-NEXT: br label [[COND_END]] 508 // CHECK4: cond.end: 509 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 510 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 511 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 512 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 513 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 514 // CHECK4: omp.inner.for.cond: 515 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 516 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 517 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 518 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 519 // CHECK4: omp.inner.for.body: 520 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 521 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 522 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 523 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 524 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8 525 // CHECK4-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 4 526 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 4 527 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4 528 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 529 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 530 // CHECK4-NEXT: store double* [[G]], double** [[TMP9]], align 4 531 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 532 // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 4 533 // CHECK4-NEXT: store double* [[TMP11]], double** [[TMP10]], align 4 534 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 535 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 4 536 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 537 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 4 538 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 539 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 540 // CHECK4: omp.body.continue: 541 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 542 // CHECK4: omp.inner.for.inc: 543 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 544 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 545 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 546 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 547 // CHECK4: omp.inner.for.end: 548 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 549 // CHECK4: omp.loop.exit: 550 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 551 // CHECK4-NEXT: ret void 552 // 553 // 554 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 555 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 556 // CHECK4-NEXT: entry: 557 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 558 // CHECK4-NEXT: ret void 559 // 560 // 561 // CHECK9-LABEL: define {{[^@]+}}@main 562 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 563 // CHECK9-NEXT: entry: 564 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 565 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 566 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 567 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 568 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 569 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 570 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 571 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 572 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 573 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 574 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 575 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 576 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 577 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 578 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 579 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 580 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 581 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 582 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 583 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 584 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 585 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 586 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 587 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 588 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 589 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 590 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 591 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 592 // CHECK9: omp_offload.failed: 593 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 594 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 595 // CHECK9: omp_offload.cont: 596 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 597 // CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 598 // CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 599 // CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 600 // CHECK9: omp_offload.failed3: 601 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 602 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]] 603 // CHECK9: omp_offload.cont4: 604 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 605 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 606 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 607 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 608 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 609 // CHECK9: arraydestroy.body: 610 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 611 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 612 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 613 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 614 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 615 // CHECK9: arraydestroy.done5: 616 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 617 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 618 // CHECK9-NEXT: ret i32 [[TMP6]] 619 // 620 // 621 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 622 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 623 // CHECK9-NEXT: entry: 624 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 625 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 626 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 627 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 628 // CHECK9-NEXT: ret void 629 // 630 // 631 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 632 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 633 // CHECK9-NEXT: entry: 634 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 635 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 636 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 637 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 638 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 639 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 640 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 641 // CHECK9-NEXT: ret void 642 // 643 // 644 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 645 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 646 // CHECK9-NEXT: entry: 647 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 648 // CHECK9-NEXT: ret void 649 // 650 // 651 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 652 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 653 // CHECK9-NEXT: entry: 654 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 655 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 656 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 657 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 658 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 659 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 660 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 661 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 662 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 663 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 664 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 665 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 666 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 667 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 668 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 669 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 670 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 671 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 672 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 673 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 674 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 675 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 676 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 677 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 678 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 679 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 680 // CHECK9: arrayctor.loop: 681 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 682 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 683 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 684 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 685 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 686 // CHECK9: arrayctor.cont: 687 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 688 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 689 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 690 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 691 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 692 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 693 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 694 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 695 // CHECK9: cond.true: 696 // CHECK9-NEXT: br label [[COND_END:%.*]] 697 // CHECK9: cond.false: 698 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 699 // CHECK9-NEXT: br label [[COND_END]] 700 // CHECK9: cond.end: 701 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 702 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 703 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 704 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 705 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 706 // CHECK9: omp.inner.for.cond: 707 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 708 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 709 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 710 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 711 // CHECK9: omp.inner.for.cond.cleanup: 712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 713 // CHECK9: omp.inner.for.body: 714 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 715 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 716 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 717 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 718 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 719 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 720 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 721 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 722 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 723 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 724 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 725 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 726 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 727 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 728 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 729 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 730 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 731 // CHECK9: omp.body.continue: 732 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 733 // CHECK9: omp.inner.for.inc: 734 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 735 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 736 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 737 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 738 // CHECK9: omp.inner.for.end: 739 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 740 // CHECK9: omp.loop.exit: 741 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 742 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 743 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 744 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 745 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 746 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 747 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 748 // CHECK9: arraydestroy.body: 749 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 750 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 751 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 752 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 753 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 754 // CHECK9: arraydestroy.done8: 755 // CHECK9-NEXT: ret void 756 // 757 // 758 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 759 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 760 // CHECK9-NEXT: entry: 761 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 762 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 763 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 764 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 765 // CHECK9-NEXT: ret void 766 // 767 // 768 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 769 // CHECK9-SAME: () #[[ATTR3]] { 770 // CHECK9-NEXT: entry: 771 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 772 // CHECK9-NEXT: ret void 773 // 774 // 775 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 776 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 777 // CHECK9-NEXT: entry: 778 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 779 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 780 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 781 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 782 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 783 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 784 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 785 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 786 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 787 // CHECK9-NEXT: [[I1:%.*]] = alloca i32, align 4 788 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 789 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 790 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 791 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 792 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 793 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 794 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 795 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 796 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 797 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 798 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 799 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 800 // CHECK9: cond.true: 801 // CHECK9-NEXT: br label [[COND_END:%.*]] 802 // CHECK9: cond.false: 803 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 804 // CHECK9-NEXT: br label [[COND_END]] 805 // CHECK9: cond.end: 806 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 807 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 808 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 809 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 810 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 811 // CHECK9: omp.inner.for.cond: 812 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 813 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 814 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 815 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 816 // CHECK9: omp.inner.for.body: 817 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 818 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 819 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 820 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 821 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 822 // CHECK9: omp.body.continue: 823 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 824 // CHECK9: omp.inner.for.inc: 825 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 826 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 827 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 828 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 829 // CHECK9: omp.inner.for.end: 830 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 831 // CHECK9: omp.loop.exit: 832 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 833 // CHECK9-NEXT: ret void 834 // 835 // 836 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 837 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 838 // CHECK9-NEXT: entry: 839 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 840 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 841 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 842 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 843 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 844 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 845 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 846 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 847 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 848 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 849 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 850 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 851 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 852 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 853 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 854 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 855 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 856 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 857 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 858 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 859 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 860 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 861 // CHECK9: omp_offload.failed: 862 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 863 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 864 // CHECK9: omp_offload.cont: 865 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 866 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 867 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 868 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 869 // CHECK9: arraydestroy.body: 870 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 871 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 872 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 873 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 874 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 875 // CHECK9: arraydestroy.done2: 876 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 877 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 878 // CHECK9-NEXT: ret i32 [[TMP4]] 879 // 880 // 881 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 882 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 883 // CHECK9-NEXT: entry: 884 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 885 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 886 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 887 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 888 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 889 // CHECK9-NEXT: ret void 890 // 891 // 892 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 893 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 894 // CHECK9-NEXT: entry: 895 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 896 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 897 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 898 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 899 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 900 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 901 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 902 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 903 // CHECK9-NEXT: ret void 904 // 905 // 906 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 907 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 908 // CHECK9-NEXT: entry: 909 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 910 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 911 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 912 // CHECK9-NEXT: ret void 913 // 914 // 915 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 916 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 917 // CHECK9-NEXT: entry: 918 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 919 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 920 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 921 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 922 // CHECK9-NEXT: ret void 923 // 924 // 925 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 926 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 927 // CHECK9-NEXT: entry: 928 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 929 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 930 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 931 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 932 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 933 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 934 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 935 // CHECK9-NEXT: ret void 936 // 937 // 938 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 939 // CHECK9-SAME: () #[[ATTR3]] { 940 // CHECK9-NEXT: entry: 941 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 942 // CHECK9-NEXT: ret void 943 // 944 // 945 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 946 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 947 // CHECK9-NEXT: entry: 948 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 949 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 950 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 951 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 952 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 953 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 954 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 955 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 956 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 957 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 958 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 959 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 960 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 961 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 962 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 963 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 964 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 965 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 966 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 967 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 968 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 969 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 970 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 971 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 972 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 973 // CHECK9: arrayctor.loop: 974 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 975 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 976 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 977 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 978 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 979 // CHECK9: arrayctor.cont: 980 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 981 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 982 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 983 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 984 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 985 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 986 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 987 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 988 // CHECK9: cond.true: 989 // CHECK9-NEXT: br label [[COND_END:%.*]] 990 // CHECK9: cond.false: 991 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 992 // CHECK9-NEXT: br label [[COND_END]] 993 // CHECK9: cond.end: 994 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 995 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 996 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 997 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 998 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 999 // CHECK9: omp.inner.for.cond: 1000 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1001 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1002 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1003 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1004 // CHECK9: omp.inner.for.cond.cleanup: 1005 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1006 // CHECK9: omp.inner.for.body: 1007 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1008 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1009 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1010 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1011 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1012 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1013 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1014 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1015 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1016 // CHECK9-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 1017 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1018 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1019 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1020 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1021 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1022 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1023 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1024 // CHECK9: omp.body.continue: 1025 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1026 // CHECK9: omp.inner.for.inc: 1027 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1028 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1029 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1030 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1031 // CHECK9: omp.inner.for.end: 1032 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1033 // CHECK9: omp.loop.exit: 1034 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1035 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1036 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1037 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1038 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1039 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1040 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1041 // CHECK9: arraydestroy.body: 1042 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1043 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1044 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1045 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1046 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1047 // CHECK9: arraydestroy.done8: 1048 // CHECK9-NEXT: ret void 1049 // 1050 // 1051 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1052 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1053 // CHECK9-NEXT: entry: 1054 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1055 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1056 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1057 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1058 // CHECK9-NEXT: ret void 1059 // 1060 // 1061 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1062 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1063 // CHECK9-NEXT: entry: 1064 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1065 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1066 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1067 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1068 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1069 // CHECK9-NEXT: ret void 1070 // 1071 // 1072 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1073 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1074 // CHECK9-NEXT: entry: 1075 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1076 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1078 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1079 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1080 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1081 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1082 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1083 // CHECK9-NEXT: ret void 1084 // 1085 // 1086 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1087 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1088 // CHECK9-NEXT: entry: 1089 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1090 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1091 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1092 // CHECK9-NEXT: ret void 1093 // 1094 // 1095 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1096 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1097 // CHECK9-NEXT: entry: 1098 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1099 // CHECK9-NEXT: ret void 1100 // 1101 // 1102 // CHECK10-LABEL: define {{[^@]+}}@main 1103 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1104 // CHECK10-NEXT: entry: 1105 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1106 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1107 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1108 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1109 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1110 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1111 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1112 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1113 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1114 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1115 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1116 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1117 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1118 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1119 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1120 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1121 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1122 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1123 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1124 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1125 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1126 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1127 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1128 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1129 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1130 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1131 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1132 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1133 // CHECK10: omp_offload.failed: 1134 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1135 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1136 // CHECK10: omp_offload.cont: 1137 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1138 // CHECK10-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1139 // CHECK10-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 1140 // CHECK10-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1141 // CHECK10: omp_offload.failed3: 1142 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 1143 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1144 // CHECK10: omp_offload.cont4: 1145 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1146 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1147 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1148 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1149 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1150 // CHECK10: arraydestroy.body: 1151 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1152 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1153 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1154 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1155 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1156 // CHECK10: arraydestroy.done5: 1157 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1158 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1159 // CHECK10-NEXT: ret i32 [[TMP6]] 1160 // 1161 // 1162 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1163 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1164 // CHECK10-NEXT: entry: 1165 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1166 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1167 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1168 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1169 // CHECK10-NEXT: ret void 1170 // 1171 // 1172 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1173 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1174 // CHECK10-NEXT: entry: 1175 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1176 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1177 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1178 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1179 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1180 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1181 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1182 // CHECK10-NEXT: ret void 1183 // 1184 // 1185 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1186 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1187 // CHECK10-NEXT: entry: 1188 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1189 // CHECK10-NEXT: ret void 1190 // 1191 // 1192 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1193 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1194 // CHECK10-NEXT: entry: 1195 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1196 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1197 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1198 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1199 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1200 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1201 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1202 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1203 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1204 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1205 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1206 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1207 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1208 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1209 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1210 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1211 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1212 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1213 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1214 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1215 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1216 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1217 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1218 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1219 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1220 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1221 // CHECK10: arrayctor.loop: 1222 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1223 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1224 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1225 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1226 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1227 // CHECK10: arrayctor.cont: 1228 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1229 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1230 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1231 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1232 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1233 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1234 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1235 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1236 // CHECK10: cond.true: 1237 // CHECK10-NEXT: br label [[COND_END:%.*]] 1238 // CHECK10: cond.false: 1239 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1240 // CHECK10-NEXT: br label [[COND_END]] 1241 // CHECK10: cond.end: 1242 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1243 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1244 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1245 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1246 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1247 // CHECK10: omp.inner.for.cond: 1248 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1249 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1250 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1251 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1252 // CHECK10: omp.inner.for.cond.cleanup: 1253 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1254 // CHECK10: omp.inner.for.body: 1255 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1256 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1257 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1258 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1259 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1260 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1261 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1262 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1263 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1264 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 1265 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1266 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1267 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1268 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 1269 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1270 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1271 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1272 // CHECK10: omp.body.continue: 1273 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1274 // CHECK10: omp.inner.for.inc: 1275 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1276 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1277 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1278 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1279 // CHECK10: omp.inner.for.end: 1280 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1281 // CHECK10: omp.loop.exit: 1282 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1283 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1284 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1285 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1286 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1287 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 1288 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1289 // CHECK10: arraydestroy.body: 1290 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1291 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1292 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1293 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1294 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1295 // CHECK10: arraydestroy.done8: 1296 // CHECK10-NEXT: ret void 1297 // 1298 // 1299 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1300 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1301 // CHECK10-NEXT: entry: 1302 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1303 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1304 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1305 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1306 // CHECK10-NEXT: ret void 1307 // 1308 // 1309 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1310 // CHECK10-SAME: () #[[ATTR3]] { 1311 // CHECK10-NEXT: entry: 1312 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1313 // CHECK10-NEXT: ret void 1314 // 1315 // 1316 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1317 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1318 // CHECK10-NEXT: entry: 1319 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1320 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1321 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1322 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1323 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1324 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1325 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1326 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1327 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1328 // CHECK10-NEXT: [[I1:%.*]] = alloca i32, align 4 1329 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1330 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1331 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1332 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1333 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1334 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1335 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1336 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1337 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1338 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1339 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1340 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1341 // CHECK10: cond.true: 1342 // CHECK10-NEXT: br label [[COND_END:%.*]] 1343 // CHECK10: cond.false: 1344 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1345 // CHECK10-NEXT: br label [[COND_END]] 1346 // CHECK10: cond.end: 1347 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1348 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1349 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1350 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1351 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1352 // CHECK10: omp.inner.for.cond: 1353 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1354 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1355 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1356 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1357 // CHECK10: omp.inner.for.body: 1358 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1359 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1360 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1361 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1362 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1363 // CHECK10: omp.body.continue: 1364 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1365 // CHECK10: omp.inner.for.inc: 1366 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1367 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1368 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1369 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1370 // CHECK10: omp.inner.for.end: 1371 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1372 // CHECK10: omp.loop.exit: 1373 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1374 // CHECK10-NEXT: ret void 1375 // 1376 // 1377 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1378 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1379 // CHECK10-NEXT: entry: 1380 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1381 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1382 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1383 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1384 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1385 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1386 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1387 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1388 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1389 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1390 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1391 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1392 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1393 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1394 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1395 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1396 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1397 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1398 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1399 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1400 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1401 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1402 // CHECK10: omp_offload.failed: 1403 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1404 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1405 // CHECK10: omp_offload.cont: 1406 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1407 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1408 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1409 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1410 // CHECK10: arraydestroy.body: 1411 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1412 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1413 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1414 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1415 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1416 // CHECK10: arraydestroy.done2: 1417 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1418 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1419 // CHECK10-NEXT: ret i32 [[TMP4]] 1420 // 1421 // 1422 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1423 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1424 // CHECK10-NEXT: entry: 1425 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1426 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1427 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1428 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1429 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1430 // CHECK10-NEXT: ret void 1431 // 1432 // 1433 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1434 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1435 // CHECK10-NEXT: entry: 1436 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1437 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1438 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1439 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1440 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1441 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1442 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1443 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1444 // CHECK10-NEXT: ret void 1445 // 1446 // 1447 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1448 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1449 // CHECK10-NEXT: entry: 1450 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1451 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1452 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1453 // CHECK10-NEXT: ret void 1454 // 1455 // 1456 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1457 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1458 // CHECK10-NEXT: entry: 1459 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1460 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1461 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1462 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1463 // CHECK10-NEXT: ret void 1464 // 1465 // 1466 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1467 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1468 // CHECK10-NEXT: entry: 1469 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1470 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1471 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1472 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1473 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1474 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1475 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1476 // CHECK10-NEXT: ret void 1477 // 1478 // 1479 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1480 // CHECK10-SAME: () #[[ATTR3]] { 1481 // CHECK10-NEXT: entry: 1482 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1483 // CHECK10-NEXT: ret void 1484 // 1485 // 1486 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 1487 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1488 // CHECK10-NEXT: entry: 1489 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1490 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1491 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1492 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1493 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1494 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1495 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1496 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1497 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1498 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1499 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1500 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1501 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1502 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1503 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1504 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1505 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1506 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1507 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1508 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1509 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1510 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1511 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1512 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1513 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1514 // CHECK10: arrayctor.loop: 1515 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1516 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1517 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1518 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1519 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1520 // CHECK10: arrayctor.cont: 1521 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1522 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1523 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1524 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1525 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1526 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1527 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1528 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1529 // CHECK10: cond.true: 1530 // CHECK10-NEXT: br label [[COND_END:%.*]] 1531 // CHECK10: cond.false: 1532 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1533 // CHECK10-NEXT: br label [[COND_END]] 1534 // CHECK10: cond.end: 1535 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1536 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1537 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1538 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1539 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1540 // CHECK10: omp.inner.for.cond: 1541 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1542 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1543 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1544 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1545 // CHECK10: omp.inner.for.cond.cleanup: 1546 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1547 // CHECK10: omp.inner.for.body: 1548 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1549 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1550 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1551 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1552 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1553 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1554 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1555 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1556 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1557 // CHECK10-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 1558 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1559 // CHECK10-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1560 // CHECK10-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1561 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1562 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1563 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1564 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1565 // CHECK10: omp.body.continue: 1566 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1567 // CHECK10: omp.inner.for.inc: 1568 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1569 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1570 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1571 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1572 // CHECK10: omp.inner.for.end: 1573 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1574 // CHECK10: omp.loop.exit: 1575 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1576 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1577 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1578 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1579 // CHECK10-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1580 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1581 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1582 // CHECK10: arraydestroy.body: 1583 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1584 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1585 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1586 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1587 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1588 // CHECK10: arraydestroy.done8: 1589 // CHECK10-NEXT: ret void 1590 // 1591 // 1592 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1593 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1594 // CHECK10-NEXT: entry: 1595 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1596 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1597 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1598 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1599 // CHECK10-NEXT: ret void 1600 // 1601 // 1602 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1603 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1604 // CHECK10-NEXT: entry: 1605 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1606 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1607 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1608 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1609 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 1610 // CHECK10-NEXT: ret void 1611 // 1612 // 1613 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1614 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1615 // CHECK10-NEXT: entry: 1616 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1617 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1618 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1619 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1620 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1621 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1622 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1623 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1624 // CHECK10-NEXT: ret void 1625 // 1626 // 1627 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1628 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1629 // CHECK10-NEXT: entry: 1630 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1631 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1632 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1633 // CHECK10-NEXT: ret void 1634 // 1635 // 1636 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1637 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 1638 // CHECK10-NEXT: entry: 1639 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 1640 // CHECK10-NEXT: ret void 1641 // 1642 // 1643 // CHECK11-LABEL: define {{[^@]+}}@main 1644 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1645 // CHECK11-NEXT: entry: 1646 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1647 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1648 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 1649 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1650 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1651 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1652 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1653 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 1654 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1655 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1656 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1657 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1658 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1659 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 1660 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1661 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1662 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1663 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 1664 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1665 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1666 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 1667 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1668 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 1669 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1670 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 1671 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1672 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1673 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1674 // CHECK11: omp_offload.failed: 1675 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1676 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1677 // CHECK11: omp_offload.cont: 1678 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1679 // CHECK11-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1680 // CHECK11-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 1681 // CHECK11-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1682 // CHECK11: omp_offload.failed3: 1683 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 1684 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1685 // CHECK11: omp_offload.cont4: 1686 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1687 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1688 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1689 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1690 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1691 // CHECK11: arraydestroy.body: 1692 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1693 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1694 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1695 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1696 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1697 // CHECK11: arraydestroy.done5: 1698 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1699 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 1700 // CHECK11-NEXT: ret i32 [[TMP6]] 1701 // 1702 // 1703 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1704 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1705 // CHECK11-NEXT: entry: 1706 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1707 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1708 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1709 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1710 // CHECK11-NEXT: ret void 1711 // 1712 // 1713 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1714 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1715 // CHECK11-NEXT: entry: 1716 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1717 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1718 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1719 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1720 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1721 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1722 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1723 // CHECK11-NEXT: ret void 1724 // 1725 // 1726 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1727 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1728 // CHECK11-NEXT: entry: 1729 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1730 // CHECK11-NEXT: ret void 1731 // 1732 // 1733 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1734 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1735 // CHECK11-NEXT: entry: 1736 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1737 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1738 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1739 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1740 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 1741 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1742 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1743 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1744 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1745 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1746 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1747 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1748 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1749 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 1750 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1751 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1752 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1753 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1754 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 1755 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1756 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1757 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1758 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1759 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1760 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 1761 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1762 // CHECK11: arrayctor.loop: 1763 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1764 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1765 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 1766 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1767 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1768 // CHECK11: arrayctor.cont: 1769 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1770 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 1771 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1772 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1773 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1774 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1775 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1776 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1777 // CHECK11: cond.true: 1778 // CHECK11-NEXT: br label [[COND_END:%.*]] 1779 // CHECK11: cond.false: 1780 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1781 // CHECK11-NEXT: br label [[COND_END]] 1782 // CHECK11: cond.end: 1783 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1784 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1785 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1786 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1787 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1788 // CHECK11: omp.inner.for.cond: 1789 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1790 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1791 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1792 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1793 // CHECK11: omp.inner.for.cond.cleanup: 1794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1795 // CHECK11: omp.inner.for.body: 1796 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1797 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1798 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1799 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1800 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1801 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1802 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 1803 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1804 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 1805 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1806 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 1807 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 1808 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 1809 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 1810 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1811 // CHECK11: omp.body.continue: 1812 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1813 // CHECK11: omp.inner.for.inc: 1814 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1815 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1816 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1817 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1818 // CHECK11: omp.inner.for.end: 1819 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1820 // CHECK11: omp.loop.exit: 1821 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1822 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1823 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1824 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1825 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1826 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 1827 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1828 // CHECK11: arraydestroy.body: 1829 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1830 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1831 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1832 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1833 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1834 // CHECK11: arraydestroy.done7: 1835 // CHECK11-NEXT: ret void 1836 // 1837 // 1838 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1839 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1840 // CHECK11-NEXT: entry: 1841 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1842 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1843 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1844 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1845 // CHECK11-NEXT: ret void 1846 // 1847 // 1848 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1849 // CHECK11-SAME: () #[[ATTR3]] { 1850 // CHECK11-NEXT: entry: 1851 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 1852 // CHECK11-NEXT: ret void 1853 // 1854 // 1855 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1856 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1857 // CHECK11-NEXT: entry: 1858 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1859 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1860 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1861 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1862 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1863 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1864 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1865 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1866 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1867 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 1868 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1869 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1870 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1871 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1872 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1873 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1874 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1875 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1876 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1877 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1878 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1879 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1880 // CHECK11: cond.true: 1881 // CHECK11-NEXT: br label [[COND_END:%.*]] 1882 // CHECK11: cond.false: 1883 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1884 // CHECK11-NEXT: br label [[COND_END]] 1885 // CHECK11: cond.end: 1886 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1887 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1888 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1889 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1890 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1891 // CHECK11: omp.inner.for.cond: 1892 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1893 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1894 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1895 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1896 // CHECK11: omp.inner.for.body: 1897 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1898 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1899 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1900 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1901 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1902 // CHECK11: omp.body.continue: 1903 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1904 // CHECK11: omp.inner.for.inc: 1905 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1906 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 1907 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1908 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1909 // CHECK11: omp.inner.for.end: 1910 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1911 // CHECK11: omp.loop.exit: 1912 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1913 // CHECK11-NEXT: ret void 1914 // 1915 // 1916 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1917 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 1918 // CHECK11-NEXT: entry: 1919 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1920 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1921 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1922 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1923 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1924 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 1925 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1926 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 1927 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1928 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 1929 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1930 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1931 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1932 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 1933 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 1934 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1935 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 1936 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 1937 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 1938 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1939 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1940 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1941 // CHECK11: omp_offload.failed: 1942 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1943 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1944 // CHECK11: omp_offload.cont: 1945 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1946 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1947 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 1948 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1949 // CHECK11: arraydestroy.body: 1950 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1951 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1952 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1953 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1954 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1955 // CHECK11: arraydestroy.done2: 1956 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1957 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1958 // CHECK11-NEXT: ret i32 [[TMP4]] 1959 // 1960 // 1961 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1962 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1963 // CHECK11-NEXT: entry: 1964 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1965 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1966 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1967 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1968 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 1969 // CHECK11-NEXT: ret void 1970 // 1971 // 1972 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1973 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1974 // CHECK11-NEXT: entry: 1975 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1976 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1977 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1978 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1979 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1980 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1981 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1982 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 1983 // CHECK11-NEXT: ret void 1984 // 1985 // 1986 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1987 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1988 // CHECK11-NEXT: entry: 1989 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 1990 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 1991 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 1992 // CHECK11-NEXT: ret void 1993 // 1994 // 1995 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1996 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1997 // CHECK11-NEXT: entry: 1998 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 1999 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2000 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2001 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2002 // CHECK11-NEXT: ret void 2003 // 2004 // 2005 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2006 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2007 // CHECK11-NEXT: entry: 2008 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2009 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2010 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2011 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2012 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2013 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2014 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2015 // CHECK11-NEXT: ret void 2016 // 2017 // 2018 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2019 // CHECK11-SAME: () #[[ATTR3]] { 2020 // CHECK11-NEXT: entry: 2021 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2022 // CHECK11-NEXT: ret void 2023 // 2024 // 2025 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2026 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2027 // CHECK11-NEXT: entry: 2028 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2029 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2030 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2031 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2032 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2033 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2034 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2035 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2036 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2037 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2038 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2039 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2040 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2041 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2042 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2043 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2044 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2045 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2046 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2047 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2048 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2049 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2050 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2051 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2052 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2053 // CHECK11: arrayctor.loop: 2054 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2055 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2056 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2057 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2058 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2059 // CHECK11: arrayctor.cont: 2060 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2061 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2062 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2063 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2064 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2065 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2066 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2067 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2068 // CHECK11: cond.true: 2069 // CHECK11-NEXT: br label [[COND_END:%.*]] 2070 // CHECK11: cond.false: 2071 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2072 // CHECK11-NEXT: br label [[COND_END]] 2073 // CHECK11: cond.end: 2074 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2075 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2076 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2077 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2078 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2079 // CHECK11: omp.inner.for.cond: 2080 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2081 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2082 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2083 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2084 // CHECK11: omp.inner.for.cond.cleanup: 2085 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2086 // CHECK11: omp.inner.for.body: 2087 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2088 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2089 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2090 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2091 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2092 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2093 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2094 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2095 // CHECK11-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 2096 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2097 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2098 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2099 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2100 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2101 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2102 // CHECK11: omp.body.continue: 2103 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2104 // CHECK11: omp.inner.for.inc: 2105 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2106 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2107 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2108 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2109 // CHECK11: omp.inner.for.end: 2110 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2111 // CHECK11: omp.loop.exit: 2112 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2113 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2114 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2115 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2116 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2117 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2118 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2119 // CHECK11: arraydestroy.body: 2120 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2121 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2122 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2123 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2124 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2125 // CHECK11: arraydestroy.done7: 2126 // CHECK11-NEXT: ret void 2127 // 2128 // 2129 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2130 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2131 // CHECK11-NEXT: entry: 2132 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2133 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2134 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2135 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2136 // CHECK11-NEXT: ret void 2137 // 2138 // 2139 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2140 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2141 // CHECK11-NEXT: entry: 2142 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2143 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2144 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2145 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2146 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2147 // CHECK11-NEXT: ret void 2148 // 2149 // 2150 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2151 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2152 // CHECK11-NEXT: entry: 2153 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2154 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2155 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2156 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2157 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2158 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2159 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2160 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2161 // CHECK11-NEXT: ret void 2162 // 2163 // 2164 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2165 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2166 // CHECK11-NEXT: entry: 2167 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2168 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2169 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2170 // CHECK11-NEXT: ret void 2171 // 2172 // 2173 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2174 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2175 // CHECK11-NEXT: entry: 2176 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2177 // CHECK11-NEXT: ret void 2178 // 2179 // 2180 // CHECK12-LABEL: define {{[^@]+}}@main 2181 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2182 // CHECK12-NEXT: entry: 2183 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2184 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2185 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2186 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2187 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2188 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2189 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2190 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2191 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2192 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2193 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2194 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2195 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2196 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2197 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2198 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2199 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2200 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2201 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2202 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2203 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2204 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2205 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2206 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2207 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2) 2208 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2209 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2210 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2211 // CHECK12: omp_offload.failed: 2212 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 2213 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2214 // CHECK12: omp_offload.cont: 2215 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2216 // CHECK12-NEXT: [[TMP3:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2217 // CHECK12-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0 2218 // CHECK12-NEXT: br i1 [[TMP4]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 2219 // CHECK12: omp_offload.failed3: 2220 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]] 2221 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT4]] 2222 // CHECK12: omp_offload.cont4: 2223 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2224 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2225 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2226 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2227 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2228 // CHECK12: arraydestroy.body: 2229 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP5]], [[OMP_OFFLOAD_CONT4]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2230 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2231 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2232 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2233 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2234 // CHECK12: arraydestroy.done5: 2235 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2236 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[RETVAL]], align 4 2237 // CHECK12-NEXT: ret i32 [[TMP6]] 2238 // 2239 // 2240 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2241 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2242 // CHECK12-NEXT: entry: 2243 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2244 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2245 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2246 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2247 // CHECK12-NEXT: ret void 2248 // 2249 // 2250 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2251 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2252 // CHECK12-NEXT: entry: 2253 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2254 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2255 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2256 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2257 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2258 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2259 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2260 // CHECK12-NEXT: ret void 2261 // 2262 // 2263 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 2264 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 2265 // CHECK12-NEXT: entry: 2266 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2267 // CHECK12-NEXT: ret void 2268 // 2269 // 2270 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 2271 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2272 // CHECK12-NEXT: entry: 2273 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2274 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2275 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2276 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2277 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2278 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2279 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2280 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2281 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2282 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2283 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2284 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2285 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2286 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2287 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2288 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2289 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2290 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2291 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2292 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2293 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2294 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2295 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2296 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2297 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2298 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2299 // CHECK12: arrayctor.loop: 2300 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2301 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2302 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2303 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2304 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2305 // CHECK12: arrayctor.cont: 2306 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2307 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2308 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2309 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2310 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2311 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2312 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2313 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2314 // CHECK12: cond.true: 2315 // CHECK12-NEXT: br label [[COND_END:%.*]] 2316 // CHECK12: cond.false: 2317 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2318 // CHECK12-NEXT: br label [[COND_END]] 2319 // CHECK12: cond.end: 2320 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2321 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2322 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2323 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2324 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2325 // CHECK12: omp.inner.for.cond: 2326 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2327 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2328 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2329 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2330 // CHECK12: omp.inner.for.cond.cleanup: 2331 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2332 // CHECK12: omp.inner.for.body: 2333 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2334 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2335 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2336 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2337 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2338 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2339 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2340 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2341 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 2342 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2343 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP11]] 2344 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 2345 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 2346 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2347 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2348 // CHECK12: omp.body.continue: 2349 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2350 // CHECK12: omp.inner.for.inc: 2351 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2352 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2353 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2354 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2355 // CHECK12: omp.inner.for.end: 2356 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2357 // CHECK12: omp.loop.exit: 2358 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2359 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2360 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2361 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2362 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2363 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2364 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2365 // CHECK12: arraydestroy.body: 2366 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2367 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2368 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2369 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2370 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2371 // CHECK12: arraydestroy.done7: 2372 // CHECK12-NEXT: ret void 2373 // 2374 // 2375 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2376 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2377 // CHECK12-NEXT: entry: 2378 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2379 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2380 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2381 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2382 // CHECK12-NEXT: ret void 2383 // 2384 // 2385 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2386 // CHECK12-SAME: () #[[ATTR3]] { 2387 // CHECK12-NEXT: entry: 2388 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 2389 // CHECK12-NEXT: ret void 2390 // 2391 // 2392 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 2393 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2394 // CHECK12-NEXT: entry: 2395 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2396 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2397 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2398 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2399 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2400 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2401 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2402 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2403 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2404 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 2405 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2406 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2407 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2408 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2409 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2410 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2411 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2412 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2413 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2414 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2415 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2416 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2417 // CHECK12: cond.true: 2418 // CHECK12-NEXT: br label [[COND_END:%.*]] 2419 // CHECK12: cond.false: 2420 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2421 // CHECK12-NEXT: br label [[COND_END]] 2422 // CHECK12: cond.end: 2423 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2424 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2425 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2426 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2427 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2428 // CHECK12: omp.inner.for.cond: 2429 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2430 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2431 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2432 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2433 // CHECK12: omp.inner.for.body: 2434 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2435 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2436 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2437 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2438 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2439 // CHECK12: omp.body.continue: 2440 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2441 // CHECK12: omp.inner.for.inc: 2442 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2443 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 2444 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2445 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2446 // CHECK12: omp.inner.for.end: 2447 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2448 // CHECK12: omp.loop.exit: 2449 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2450 // CHECK12-NEXT: ret void 2451 // 2452 // 2453 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2454 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 2455 // CHECK12-NEXT: entry: 2456 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2457 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2458 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2459 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2460 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2461 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2462 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2463 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2464 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2465 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2466 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2467 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2468 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2469 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2470 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2471 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2472 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2473 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2474 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2) 2475 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2476 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2477 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2478 // CHECK12: omp_offload.failed: 2479 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2480 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2481 // CHECK12: omp_offload.cont: 2482 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2483 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2484 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2485 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2486 // CHECK12: arraydestroy.body: 2487 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2488 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2489 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2490 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2491 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2492 // CHECK12: arraydestroy.done2: 2493 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2494 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2495 // CHECK12-NEXT: ret i32 [[TMP4]] 2496 // 2497 // 2498 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2499 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2500 // CHECK12-NEXT: entry: 2501 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2502 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2503 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2504 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2505 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 2506 // CHECK12-NEXT: ret void 2507 // 2508 // 2509 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2510 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2511 // CHECK12-NEXT: entry: 2512 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2513 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2514 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2515 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2516 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2517 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2518 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2519 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 2520 // CHECK12-NEXT: ret void 2521 // 2522 // 2523 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2524 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2525 // CHECK12-NEXT: entry: 2526 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2527 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2528 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2529 // CHECK12-NEXT: ret void 2530 // 2531 // 2532 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2533 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2534 // CHECK12-NEXT: entry: 2535 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2536 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2537 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2538 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2539 // CHECK12-NEXT: ret void 2540 // 2541 // 2542 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2543 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2544 // CHECK12-NEXT: entry: 2545 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2546 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2547 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2548 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2549 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2550 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2551 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2552 // CHECK12-NEXT: ret void 2553 // 2554 // 2555 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2556 // CHECK12-SAME: () #[[ATTR3]] { 2557 // CHECK12-NEXT: entry: 2558 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2559 // CHECK12-NEXT: ret void 2560 // 2561 // 2562 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 2563 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2564 // CHECK12-NEXT: entry: 2565 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2566 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2567 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2568 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2569 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2570 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2571 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2572 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2573 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2574 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2575 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2576 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2577 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2578 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2579 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2580 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2581 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2582 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2583 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2584 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2585 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2586 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2587 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2588 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2589 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2590 // CHECK12: arrayctor.loop: 2591 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2592 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2593 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2594 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2595 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2596 // CHECK12: arrayctor.cont: 2597 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2598 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2599 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2600 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2601 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2602 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2603 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2604 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2605 // CHECK12: cond.true: 2606 // CHECK12-NEXT: br label [[COND_END:%.*]] 2607 // CHECK12: cond.false: 2608 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2609 // CHECK12-NEXT: br label [[COND_END]] 2610 // CHECK12: cond.end: 2611 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2612 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2613 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2614 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2615 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2616 // CHECK12: omp.inner.for.cond: 2617 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2618 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2619 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2620 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2621 // CHECK12: omp.inner.for.cond.cleanup: 2622 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2623 // CHECK12: omp.inner.for.body: 2624 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2625 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2626 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2627 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2628 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 2629 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2630 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP9]] 2631 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 2632 // CHECK12-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 2633 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2634 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP11]] 2635 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2636 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 2637 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 2638 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2639 // CHECK12: omp.body.continue: 2640 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2641 // CHECK12: omp.inner.for.inc: 2642 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2643 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2644 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2645 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2646 // CHECK12: omp.inner.for.end: 2647 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2648 // CHECK12: omp.loop.exit: 2649 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2650 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2651 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 2652 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2653 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2654 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2655 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2656 // CHECK12: arraydestroy.body: 2657 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2658 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2659 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2660 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2661 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2662 // CHECK12: arraydestroy.done7: 2663 // CHECK12-NEXT: ret void 2664 // 2665 // 2666 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2667 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2668 // CHECK12-NEXT: entry: 2669 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2670 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2671 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2672 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2673 // CHECK12-NEXT: ret void 2674 // 2675 // 2676 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2677 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2678 // CHECK12-NEXT: entry: 2679 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2680 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2681 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2682 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2683 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 2684 // CHECK12-NEXT: ret void 2685 // 2686 // 2687 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2688 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2689 // CHECK12-NEXT: entry: 2690 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2691 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2692 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2693 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2694 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2695 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2696 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2697 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2698 // CHECK12-NEXT: ret void 2699 // 2700 // 2701 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2702 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2703 // CHECK12-NEXT: entry: 2704 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2705 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2706 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2707 // CHECK12-NEXT: ret void 2708 // 2709 // 2710 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2711 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 2712 // CHECK12-NEXT: entry: 2713 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 2714 // CHECK12-NEXT: ret void 2715 // 2716