1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for simd private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 73 74 g = 1; 75 g1 = 1; 76 svar = 3; 77 sfvar = 4.0; 78 [&]() { 79 g = 2; 80 g1 = 2; 81 svar = 4; 82 sfvar = 8.0; 83 84 }(); 85 } 86 }(); 87 return 0; 88 #else 89 S<float> test; 90 int t_var = 0; 91 int vec[] = {1, 2}; 92 S<float> s_arr[] = {1, 2}; 93 S<float> &var = test; 94 95 #pragma omp target 96 #pragma omp teams 97 #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 return tmain<int>(); 103 #endif 104 } 105 106 107 108 // this is the ctor loop 109 110 // call destructors: var.. 111 112 // ..and s_arr 113 114 115 // By OpenMP specifications, private applies to both distribute and parallel for. 116 // However, the support for 'private' of 'parallel' is only used when 'parallel' 117 // is found alone. Therefore we only have one 'private' support for 'parallel for' 118 // in combination 119 // this is the ctor loop 120 121 // call destructors: var.. 122 123 // ..and s_arr 124 125 126 // template tmain with S_INT_TY 127 128 129 130 // this is the ctor loop 131 132 // call destructors: var.. 133 134 // ..and s_arr 135 136 137 #endif 138 // CHECK1-LABEL: define {{[^@]+}}@main 139 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 140 // CHECK1-NEXT: entry: 141 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 142 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 143 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 144 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 145 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 146 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 147 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 148 // CHECK1-NEXT: ret i32 0 149 // 150 // 151 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 152 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 153 // CHECK1-NEXT: entry: 154 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 155 // CHECK1-NEXT: ret void 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 159 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 162 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 163 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 166 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 171 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 172 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 173 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 175 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 176 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 177 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 178 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 184 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 185 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 186 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 187 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 188 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 189 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 190 // CHECK1: cond.true: 191 // CHECK1-NEXT: br label [[COND_END:%.*]] 192 // CHECK1: cond.false: 193 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 194 // CHECK1-NEXT: br label [[COND_END]] 195 // CHECK1: cond.end: 196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 197 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 199 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 201 // CHECK1: omp.inner.for.cond: 202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 203 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 204 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 205 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 206 // CHECK1: omp.inner.for.body: 207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4 208 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 209 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 210 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 211 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !4 212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 213 // CHECK1: omp.inner.for.inc: 214 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 215 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4 216 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 217 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 219 // CHECK1: omp.inner.for.end: 220 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 221 // CHECK1: omp.loop.exit: 222 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 223 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 224 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 225 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 226 // CHECK1: .omp.final.then: 227 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 228 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 229 // CHECK1: .omp.final.done: 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 234 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 238 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 239 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 240 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 243 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 248 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 249 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca double*, align 8 250 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 252 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 254 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 255 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 256 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 257 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 258 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 259 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 261 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 262 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 263 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 264 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 265 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 266 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 267 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 268 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 269 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP3]], align 8 270 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 271 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 272 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 273 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 275 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 276 // CHECK1: cond.true: 277 // CHECK1-NEXT: br label [[COND_END:%.*]] 278 // CHECK1: cond.false: 279 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: br label [[COND_END]] 281 // CHECK1: cond.end: 282 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 283 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 284 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 285 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 287 // CHECK1: omp.inner.for.cond: 288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 289 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 290 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 291 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 292 // CHECK1: omp.inner.for.body: 293 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 294 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 295 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 296 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 297 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !8 298 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8, !llvm.access.group !8 299 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8, !llvm.access.group !8 300 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !8 301 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !8 302 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 303 // CHECK1-NEXT: store double* [[G]], double** [[TMP11]], align 8, !llvm.access.group !8 304 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 305 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8, !llvm.access.group !8 306 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8, !llvm.access.group !8 307 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 308 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8, !llvm.access.group !8 309 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 310 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8, !llvm.access.group !8 311 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !8 312 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 313 // CHECK1: omp.body.continue: 314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 315 // CHECK1: omp.inner.for.inc: 316 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 317 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 318 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 320 // CHECK1: omp.inner.for.end: 321 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 322 // CHECK1: omp.loop.exit: 323 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 324 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 325 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 326 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 327 // CHECK1: .omp.final.then: 328 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 329 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 330 // CHECK1: .omp.final.done: 331 // CHECK1-NEXT: ret void 332 // 333 // 334 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 335 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 336 // CHECK1-NEXT: entry: 337 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK2-LABEL: define {{[^@]+}}@main 342 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 343 // CHECK2-NEXT: entry: 344 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 345 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 346 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 347 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 348 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 349 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 350 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 351 // CHECK2-NEXT: ret i32 0 352 // 353 // 354 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 355 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 356 // CHECK2-NEXT: entry: 357 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 358 // CHECK2-NEXT: ret void 359 // 360 // 361 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 362 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 363 // CHECK2-NEXT: entry: 364 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 365 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 366 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 367 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 368 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 369 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 370 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 371 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 372 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 373 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 374 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 375 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 376 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 377 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 378 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 379 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 380 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 381 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 382 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 383 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 384 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 385 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 386 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 387 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 388 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 389 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 390 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 391 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 392 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 393 // CHECK2: cond.true: 394 // CHECK2-NEXT: br label [[COND_END:%.*]] 395 // CHECK2: cond.false: 396 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 397 // CHECK2-NEXT: br label [[COND_END]] 398 // CHECK2: cond.end: 399 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 400 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 401 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 402 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 403 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 404 // CHECK2: omp.inner.for.cond: 405 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 406 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 407 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 408 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 409 // CHECK2: omp.inner.for.body: 410 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4 411 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 412 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 413 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 414 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !4 415 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 416 // CHECK2: omp.inner.for.inc: 417 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 418 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4 419 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 420 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 421 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 422 // CHECK2: omp.inner.for.end: 423 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 424 // CHECK2: omp.loop.exit: 425 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 426 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 427 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 428 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 429 // CHECK2: .omp.final.then: 430 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 431 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 432 // CHECK2: .omp.final.done: 433 // CHECK2-NEXT: ret void 434 // 435 // 436 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 437 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 438 // CHECK2-NEXT: entry: 439 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 440 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 441 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 442 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 443 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 444 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 445 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 446 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 447 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 448 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 449 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 450 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 451 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 452 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca double*, align 8 453 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 454 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 455 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 456 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 457 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 458 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 459 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 460 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 461 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 462 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 463 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 464 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 465 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 466 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 467 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 468 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 469 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 470 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 471 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 472 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP3]], align 8 473 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 474 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 475 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 476 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 477 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 478 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 479 // CHECK2: cond.true: 480 // CHECK2-NEXT: br label [[COND_END:%.*]] 481 // CHECK2: cond.false: 482 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 483 // CHECK2-NEXT: br label [[COND_END]] 484 // CHECK2: cond.end: 485 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 486 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 487 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 488 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 489 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 490 // CHECK2: omp.inner.for.cond: 491 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 492 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 493 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 494 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 495 // CHECK2: omp.inner.for.body: 496 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 497 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 498 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 499 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 500 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !8 501 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8, !llvm.access.group !8 502 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8, !llvm.access.group !8 503 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !8 504 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !8 505 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 506 // CHECK2-NEXT: store double* [[G]], double** [[TMP11]], align 8, !llvm.access.group !8 507 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 508 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8, !llvm.access.group !8 509 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8, !llvm.access.group !8 510 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 511 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8, !llvm.access.group !8 512 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 513 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8, !llvm.access.group !8 514 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !8 515 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 516 // CHECK2: omp.body.continue: 517 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 518 // CHECK2: omp.inner.for.inc: 519 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 520 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 521 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 522 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 523 // CHECK2: omp.inner.for.end: 524 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 525 // CHECK2: omp.loop.exit: 526 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 527 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 528 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 529 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 530 // CHECK2: .omp.final.then: 531 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 532 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 533 // CHECK2: .omp.final.done: 534 // CHECK2-NEXT: ret void 535 // 536 // 537 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 538 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 539 // CHECK2-NEXT: entry: 540 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 541 // CHECK2-NEXT: ret void 542 // 543 // 544 // CHECK3-LABEL: define {{[^@]+}}@main 545 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 546 // CHECK3-NEXT: entry: 547 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 548 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 549 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 550 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 551 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 552 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 553 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 554 // CHECK3-NEXT: ret i32 0 555 // 556 // 557 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 558 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 559 // CHECK3-NEXT: entry: 560 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 561 // CHECK3-NEXT: ret void 562 // 563 // 564 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 565 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 566 // CHECK3-NEXT: entry: 567 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 568 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 569 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 570 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 571 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 572 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 573 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 574 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 575 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 576 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 577 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 578 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 579 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 580 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 581 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 582 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 583 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 584 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 585 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 586 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 587 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 588 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 589 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 590 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 591 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 592 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 593 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 594 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 595 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 596 // CHECK3: cond.true: 597 // CHECK3-NEXT: br label [[COND_END:%.*]] 598 // CHECK3: cond.false: 599 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 600 // CHECK3-NEXT: br label [[COND_END]] 601 // CHECK3: cond.end: 602 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 603 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 604 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 605 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 606 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 607 // CHECK3: omp.inner.for.cond: 608 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 609 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 610 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 611 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 612 // CHECK3: omp.inner.for.body: 613 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 614 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 615 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !5 616 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 617 // CHECK3: omp.inner.for.inc: 618 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 619 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 620 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 621 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 622 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 623 // CHECK3: omp.inner.for.end: 624 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 625 // CHECK3: omp.loop.exit: 626 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 627 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 628 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 629 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 630 // CHECK3: .omp.final.then: 631 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 632 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 633 // CHECK3: .omp.final.done: 634 // CHECK3-NEXT: ret void 635 // 636 // 637 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 638 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 639 // CHECK3-NEXT: entry: 640 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 641 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 642 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 643 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 644 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 645 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 646 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 647 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 648 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 649 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 650 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 651 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 652 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 653 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 654 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 655 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 656 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 657 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 658 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 659 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 660 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 661 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 662 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 663 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 664 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 665 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 666 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 667 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 668 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 669 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 670 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 671 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 672 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 673 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 674 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 675 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 676 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 677 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 678 // CHECK3: cond.true: 679 // CHECK3-NEXT: br label [[COND_END:%.*]] 680 // CHECK3: cond.false: 681 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 682 // CHECK3-NEXT: br label [[COND_END]] 683 // CHECK3: cond.end: 684 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 685 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 686 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 687 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 688 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 689 // CHECK3: omp.inner.for.cond: 690 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 691 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 692 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 693 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 694 // CHECK3: omp.inner.for.body: 695 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 696 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 697 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 698 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 699 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !9 700 // CHECK3-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !9 701 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4, !llvm.access.group !9 702 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !9 703 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !9 704 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 705 // CHECK3-NEXT: store double* [[G]], double** [[TMP11]], align 4, !llvm.access.group !9 706 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 707 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !9 708 // CHECK3-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4, !llvm.access.group !9 709 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 710 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4, !llvm.access.group !9 711 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 712 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4, !llvm.access.group !9 713 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !9 714 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 715 // CHECK3: omp.body.continue: 716 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 717 // CHECK3: omp.inner.for.inc: 718 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 719 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1 720 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 721 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 722 // CHECK3: omp.inner.for.end: 723 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 724 // CHECK3: omp.loop.exit: 725 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 726 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 727 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 728 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 729 // CHECK3: .omp.final.then: 730 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 731 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 732 // CHECK3: .omp.final.done: 733 // CHECK3-NEXT: ret void 734 // 735 // 736 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 737 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 738 // CHECK3-NEXT: entry: 739 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 740 // CHECK3-NEXT: ret void 741 // 742 // 743 // CHECK4-LABEL: define {{[^@]+}}@main 744 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 745 // CHECK4-NEXT: entry: 746 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 747 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 748 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 749 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 750 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 751 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 752 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 753 // CHECK4-NEXT: ret i32 0 754 // 755 // 756 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 757 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 758 // CHECK4-NEXT: entry: 759 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 760 // CHECK4-NEXT: ret void 761 // 762 // 763 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 764 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 765 // CHECK4-NEXT: entry: 766 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 767 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 768 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 769 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 770 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 771 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 772 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 773 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 774 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 775 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 776 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 777 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 778 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 779 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 780 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 781 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 782 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 783 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 784 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 785 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 786 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 787 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 788 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 789 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 790 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 791 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 792 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 793 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 794 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 795 // CHECK4: cond.true: 796 // CHECK4-NEXT: br label [[COND_END:%.*]] 797 // CHECK4: cond.false: 798 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 799 // CHECK4-NEXT: br label [[COND_END]] 800 // CHECK4: cond.end: 801 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 802 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 803 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 804 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 805 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 806 // CHECK4: omp.inner.for.cond: 807 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 808 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 809 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 810 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 811 // CHECK4: omp.inner.for.body: 812 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 813 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 814 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !5 815 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 816 // CHECK4: omp.inner.for.inc: 817 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 818 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 819 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 820 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 821 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 822 // CHECK4: omp.inner.for.end: 823 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 824 // CHECK4: omp.loop.exit: 825 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 826 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 827 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 828 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 829 // CHECK4: .omp.final.then: 830 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 831 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 832 // CHECK4: .omp.final.done: 833 // CHECK4-NEXT: ret void 834 // 835 // 836 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 837 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 838 // CHECK4-NEXT: entry: 839 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 840 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 841 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 842 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 843 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 844 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 845 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 846 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 847 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 848 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 849 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 850 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 851 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 852 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 853 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 854 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 855 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 856 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 857 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 858 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 859 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 860 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 861 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 862 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 863 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 864 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 865 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 866 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 867 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 868 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 869 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 870 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 871 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 872 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 873 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 874 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 875 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 876 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 877 // CHECK4: cond.true: 878 // CHECK4-NEXT: br label [[COND_END:%.*]] 879 // CHECK4: cond.false: 880 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 881 // CHECK4-NEXT: br label [[COND_END]] 882 // CHECK4: cond.end: 883 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 884 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 885 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 886 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 887 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 888 // CHECK4: omp.inner.for.cond: 889 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 890 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 891 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 892 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 893 // CHECK4: omp.inner.for.body: 894 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 895 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 896 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 897 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 898 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !9 899 // CHECK4-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !9 900 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4, !llvm.access.group !9 901 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4, !llvm.access.group !9 902 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4, !llvm.access.group !9 903 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 904 // CHECK4-NEXT: store double* [[G]], double** [[TMP11]], align 4, !llvm.access.group !9 905 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 906 // CHECK4-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !9 907 // CHECK4-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4, !llvm.access.group !9 908 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 909 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4, !llvm.access.group !9 910 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 911 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4, !llvm.access.group !9 912 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !9 913 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 914 // CHECK4: omp.body.continue: 915 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 916 // CHECK4: omp.inner.for.inc: 917 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 918 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1 919 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 920 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 921 // CHECK4: omp.inner.for.end: 922 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 923 // CHECK4: omp.loop.exit: 924 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 925 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 926 // CHECK4-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 927 // CHECK4-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 928 // CHECK4: .omp.final.then: 929 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 930 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 931 // CHECK4: .omp.final.done: 932 // CHECK4-NEXT: ret void 933 // 934 // 935 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 936 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 937 // CHECK4-NEXT: entry: 938 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 939 // CHECK4-NEXT: ret void 940 // 941 // 942 // CHECK5-LABEL: define {{[^@]+}}@main 943 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 944 // CHECK5-NEXT: entry: 945 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 946 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 947 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 948 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 949 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 950 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 951 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 952 // CHECK5-NEXT: ret i32 0 953 // 954 // 955 // CHECK6-LABEL: define {{[^@]+}}@main 956 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 957 // CHECK6-NEXT: entry: 958 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 959 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 960 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 961 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 962 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 963 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 964 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 965 // CHECK6-NEXT: ret i32 0 966 // 967 // 968 // CHECK7-LABEL: define {{[^@]+}}@main 969 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 970 // CHECK7-NEXT: entry: 971 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 972 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 973 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 974 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 975 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 976 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 977 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 978 // CHECK7-NEXT: ret i32 0 979 // 980 // 981 // CHECK8-LABEL: define {{[^@]+}}@main 982 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 983 // CHECK8-NEXT: entry: 984 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 985 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 986 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 987 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 988 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 989 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 990 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 991 // CHECK8-NEXT: ret i32 0 992 // 993 // 994 // CHECK9-LABEL: define {{[^@]+}}@main 995 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 996 // CHECK9-NEXT: entry: 997 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 998 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 999 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 1000 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1001 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1002 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1003 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1004 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1005 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1006 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1007 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1008 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 1009 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1010 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1011 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1012 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1013 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1014 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1015 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1016 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1017 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1018 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1019 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1020 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1021 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1022 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1023 // CHECK9: omp_offload.failed: 1024 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 1025 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1026 // CHECK9: omp_offload.cont: 1027 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1028 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1029 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1030 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1031 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1032 // CHECK9: arraydestroy.body: 1033 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1034 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1035 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1036 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1037 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1038 // CHECK9: arraydestroy.done2: 1039 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1040 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1041 // CHECK9-NEXT: ret i32 [[TMP4]] 1042 // 1043 // 1044 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1045 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1046 // CHECK9-NEXT: entry: 1047 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1048 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1049 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1050 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1051 // CHECK9-NEXT: ret void 1052 // 1053 // 1054 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1055 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1056 // CHECK9-NEXT: entry: 1057 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1058 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1059 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1060 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1061 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1062 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1063 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1064 // CHECK9-NEXT: ret void 1065 // 1066 // 1067 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 1068 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 1069 // CHECK9-NEXT: entry: 1070 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1071 // CHECK9-NEXT: ret void 1072 // 1073 // 1074 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1075 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1076 // CHECK9-NEXT: entry: 1077 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1078 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1079 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1080 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1081 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1082 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1083 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1084 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1085 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1086 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1087 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1088 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1089 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1090 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1091 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1092 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1093 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1094 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1095 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1096 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1097 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1098 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1099 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1100 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1101 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1102 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1103 // CHECK9: arrayctor.loop: 1104 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1105 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1106 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1107 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1108 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1109 // CHECK9: arrayctor.cont: 1110 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1111 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1112 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1113 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1114 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1115 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1116 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1117 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1118 // CHECK9: cond.true: 1119 // CHECK9-NEXT: br label [[COND_END:%.*]] 1120 // CHECK9: cond.false: 1121 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1122 // CHECK9-NEXT: br label [[COND_END]] 1123 // CHECK9: cond.end: 1124 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1125 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1126 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1127 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1128 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1129 // CHECK9: omp.inner.for.cond: 1130 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1131 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1132 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1133 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1134 // CHECK9: omp.inner.for.cond.cleanup: 1135 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1136 // CHECK9: omp.inner.for.body: 1137 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 1138 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1139 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1140 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1141 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !5 1142 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1143 // CHECK9: omp.inner.for.inc: 1144 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1145 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 1146 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1147 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1148 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1149 // CHECK9: omp.inner.for.end: 1150 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1151 // CHECK9: omp.loop.exit: 1152 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1153 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1154 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1155 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1156 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1157 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1158 // CHECK9: .omp.final.then: 1159 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1160 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1161 // CHECK9: .omp.final.done: 1162 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1163 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1164 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 1165 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1166 // CHECK9: arraydestroy.body: 1167 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1168 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1169 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1170 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1171 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1172 // CHECK9: arraydestroy.done5: 1173 // CHECK9-NEXT: ret void 1174 // 1175 // 1176 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1177 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1178 // CHECK9-NEXT: entry: 1179 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1180 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1181 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1182 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1183 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1184 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1185 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1186 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1187 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1188 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1189 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1190 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1191 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1192 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1193 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1194 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8 1195 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1196 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1197 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1198 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1199 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1200 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1201 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1202 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1203 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1204 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1205 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1206 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1207 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1208 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1209 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1210 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1211 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1212 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1213 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1214 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1215 // CHECK9: arrayctor.loop: 1216 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1217 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1218 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1219 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1220 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1221 // CHECK9: arrayctor.cont: 1222 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1223 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8 1224 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1225 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1226 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1227 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1228 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1229 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1230 // CHECK9: cond.true: 1231 // CHECK9-NEXT: br label [[COND_END:%.*]] 1232 // CHECK9: cond.false: 1233 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1234 // CHECK9-NEXT: br label [[COND_END]] 1235 // CHECK9: cond.end: 1236 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1237 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1238 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1239 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1240 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1241 // CHECK9: omp.inner.for.cond: 1242 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1243 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1244 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1245 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1246 // CHECK9: omp.inner.for.cond.cleanup: 1247 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1248 // CHECK9: omp.inner.for.body: 1249 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1250 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1251 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1252 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1253 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !9 1254 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1255 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1256 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1257 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1258 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8, !llvm.access.group !9 1259 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1260 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1261 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1262 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1263 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 1264 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !9 1265 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1266 // CHECK9: omp.body.continue: 1267 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1268 // CHECK9: omp.inner.for.inc: 1269 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1270 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1271 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1272 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1273 // CHECK9: omp.inner.for.end: 1274 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1275 // CHECK9: omp.loop.exit: 1276 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1277 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1278 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1279 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1280 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1281 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1282 // CHECK9: .omp.final.then: 1283 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1284 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1285 // CHECK9: .omp.final.done: 1286 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1287 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1288 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1289 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1290 // CHECK9: arraydestroy.body: 1291 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1292 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1293 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1294 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1295 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1296 // CHECK9: arraydestroy.done9: 1297 // CHECK9-NEXT: ret void 1298 // 1299 // 1300 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1301 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1302 // CHECK9-NEXT: entry: 1303 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1304 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1305 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1306 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1307 // CHECK9-NEXT: ret void 1308 // 1309 // 1310 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1311 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1312 // CHECK9-NEXT: entry: 1313 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1314 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1315 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1316 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1317 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1318 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1319 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1320 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1321 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1322 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1323 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1324 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1325 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1326 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1327 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1328 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1329 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1330 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1331 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1332 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1333 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1334 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1335 // CHECK9: omp_offload.failed: 1336 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1337 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1338 // CHECK9: omp_offload.cont: 1339 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1340 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1341 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1342 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1343 // CHECK9: arraydestroy.body: 1344 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1345 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1346 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1347 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1348 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1349 // CHECK9: arraydestroy.done2: 1350 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1351 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1352 // CHECK9-NEXT: ret i32 [[TMP4]] 1353 // 1354 // 1355 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1356 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1357 // CHECK9-NEXT: entry: 1358 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1359 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1360 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1361 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1362 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1363 // CHECK9-NEXT: ret void 1364 // 1365 // 1366 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1367 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1368 // CHECK9-NEXT: entry: 1369 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1370 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1371 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1372 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1373 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1374 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1375 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1376 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1377 // CHECK9-NEXT: ret void 1378 // 1379 // 1380 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1381 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1382 // CHECK9-NEXT: entry: 1383 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1384 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1385 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1386 // CHECK9-NEXT: ret void 1387 // 1388 // 1389 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1390 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1391 // CHECK9-NEXT: entry: 1392 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1393 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1394 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1395 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1396 // CHECK9-NEXT: ret void 1397 // 1398 // 1399 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1400 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1401 // CHECK9-NEXT: entry: 1402 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1403 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1404 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1405 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1406 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1407 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1408 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1409 // CHECK9-NEXT: ret void 1410 // 1411 // 1412 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1413 // CHECK9-SAME: () #[[ATTR3]] { 1414 // CHECK9-NEXT: entry: 1415 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1416 // CHECK9-NEXT: ret void 1417 // 1418 // 1419 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1420 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1421 // CHECK9-NEXT: entry: 1422 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1423 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1424 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1425 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1426 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1427 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1428 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1429 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1430 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1431 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1432 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1433 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1434 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1435 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1436 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1437 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1438 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1439 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1440 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1441 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1442 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1443 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1444 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1445 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1446 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1447 // CHECK9: arrayctor.loop: 1448 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1449 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1450 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1451 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1452 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1453 // CHECK9: arrayctor.cont: 1454 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1455 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1456 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1457 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1458 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1459 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1460 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1461 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1462 // CHECK9: cond.true: 1463 // CHECK9-NEXT: br label [[COND_END:%.*]] 1464 // CHECK9: cond.false: 1465 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1466 // CHECK9-NEXT: br label [[COND_END]] 1467 // CHECK9: cond.end: 1468 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1469 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1470 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1471 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1472 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1473 // CHECK9: omp.inner.for.cond: 1474 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1475 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 1476 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1477 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1478 // CHECK9: omp.inner.for.cond.cleanup: 1479 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1480 // CHECK9: omp.inner.for.body: 1481 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14 1482 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1483 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 1484 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1485 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !14 1486 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1487 // CHECK9: omp.inner.for.inc: 1488 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1489 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14 1490 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1491 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1492 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1493 // CHECK9: omp.inner.for.end: 1494 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1495 // CHECK9: omp.loop.exit: 1496 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1497 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1498 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1499 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1500 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1501 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1502 // CHECK9: .omp.final.then: 1503 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1504 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1505 // CHECK9: .omp.final.done: 1506 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1507 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1508 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2 1509 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1510 // CHECK9: arraydestroy.body: 1511 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1512 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1513 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1514 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1515 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1516 // CHECK9: arraydestroy.done5: 1517 // CHECK9-NEXT: ret void 1518 // 1519 // 1520 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1521 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1522 // CHECK9-NEXT: entry: 1523 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1524 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1525 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1526 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1527 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1528 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1529 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1530 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1531 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1532 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1533 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1534 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1535 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1536 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1537 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1538 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8 1539 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1540 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1541 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1542 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1543 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1544 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1545 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1546 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1547 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1548 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1549 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1550 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1551 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1552 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1553 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1554 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1555 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1556 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1557 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1558 // CHECK9: arrayctor.loop: 1559 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1560 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1561 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1562 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1563 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1564 // CHECK9: arrayctor.cont: 1565 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1566 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8 1567 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1568 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1569 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1570 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1571 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1572 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1573 // CHECK9: cond.true: 1574 // CHECK9-NEXT: br label [[COND_END:%.*]] 1575 // CHECK9: cond.false: 1576 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1577 // CHECK9-NEXT: br label [[COND_END]] 1578 // CHECK9: cond.end: 1579 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1580 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1581 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1582 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1583 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1584 // CHECK9: omp.inner.for.cond: 1585 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 1586 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 1587 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1588 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1589 // CHECK9: omp.inner.for.cond.cleanup: 1590 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1591 // CHECK9: omp.inner.for.body: 1592 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 1593 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1594 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1595 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17 1596 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !17 1597 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 1598 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1599 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1600 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 1601 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8, !llvm.access.group !17 1602 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 1603 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1604 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1605 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 1606 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 1607 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !17 1608 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1609 // CHECK9: omp.body.continue: 1610 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1611 // CHECK9: omp.inner.for.inc: 1612 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 1613 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1614 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 1615 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 1616 // CHECK9: omp.inner.for.end: 1617 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1618 // CHECK9: omp.loop.exit: 1619 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1620 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1621 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1622 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1623 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1624 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1625 // CHECK9: .omp.final.then: 1626 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 1627 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1628 // CHECK9: .omp.final.done: 1629 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1630 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1631 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 1632 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1633 // CHECK9: arraydestroy.body: 1634 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1635 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1636 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1637 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1638 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1639 // CHECK9: arraydestroy.done9: 1640 // CHECK9-NEXT: ret void 1641 // 1642 // 1643 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1644 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1645 // CHECK9-NEXT: entry: 1646 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1647 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1648 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1649 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1650 // CHECK9-NEXT: ret void 1651 // 1652 // 1653 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1654 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1655 // CHECK9-NEXT: entry: 1656 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1657 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1658 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1659 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1660 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1661 // CHECK9-NEXT: ret void 1662 // 1663 // 1664 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1665 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1666 // CHECK9-NEXT: entry: 1667 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1668 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1669 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1670 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1671 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1672 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1673 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1674 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1675 // CHECK9-NEXT: ret void 1676 // 1677 // 1678 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1679 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1680 // CHECK9-NEXT: entry: 1681 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1682 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1683 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1684 // CHECK9-NEXT: ret void 1685 // 1686 // 1687 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1688 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1689 // CHECK9-NEXT: entry: 1690 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1691 // CHECK9-NEXT: ret void 1692 // 1693 // 1694 // CHECK10-LABEL: define {{[^@]+}}@main 1695 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1696 // CHECK10-NEXT: entry: 1697 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1698 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1699 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1700 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1701 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1702 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1703 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1704 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1705 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1706 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1707 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1708 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1709 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1710 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1711 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1712 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1713 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1714 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1715 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1716 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1717 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1718 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1719 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1720 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 1721 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1722 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1723 // CHECK10: omp_offload.failed: 1724 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 1725 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1726 // CHECK10: omp_offload.cont: 1727 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1728 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1729 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1730 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1731 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1732 // CHECK10: arraydestroy.body: 1733 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1734 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1735 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1736 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1737 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1738 // CHECK10: arraydestroy.done2: 1739 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1740 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1741 // CHECK10-NEXT: ret i32 [[TMP4]] 1742 // 1743 // 1744 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1745 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1746 // CHECK10-NEXT: entry: 1747 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1748 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1749 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1750 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1751 // CHECK10-NEXT: ret void 1752 // 1753 // 1754 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1755 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1756 // CHECK10-NEXT: entry: 1757 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1758 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1759 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1760 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1761 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1762 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1763 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1764 // CHECK10-NEXT: ret void 1765 // 1766 // 1767 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 1768 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1769 // CHECK10-NEXT: entry: 1770 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1771 // CHECK10-NEXT: ret void 1772 // 1773 // 1774 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1775 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1776 // CHECK10-NEXT: entry: 1777 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1778 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1779 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1780 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1781 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1782 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1783 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1784 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1785 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1786 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1787 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1788 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1789 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1790 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1791 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1792 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1793 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1794 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1795 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1796 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1797 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1798 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1799 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1800 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1801 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1802 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1803 // CHECK10: arrayctor.loop: 1804 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1805 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1806 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1807 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1808 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1809 // CHECK10: arrayctor.cont: 1810 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1811 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1812 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1813 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1814 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1815 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1816 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1817 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1818 // CHECK10: cond.true: 1819 // CHECK10-NEXT: br label [[COND_END:%.*]] 1820 // CHECK10: cond.false: 1821 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1822 // CHECK10-NEXT: br label [[COND_END]] 1823 // CHECK10: cond.end: 1824 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1825 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1826 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1827 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1828 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1829 // CHECK10: omp.inner.for.cond: 1830 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1831 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1832 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1833 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1834 // CHECK10: omp.inner.for.cond.cleanup: 1835 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1836 // CHECK10: omp.inner.for.body: 1837 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 1838 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1839 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1840 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1841 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !5 1842 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1843 // CHECK10: omp.inner.for.inc: 1844 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1845 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 1846 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1847 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1848 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1849 // CHECK10: omp.inner.for.end: 1850 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1851 // CHECK10: omp.loop.exit: 1852 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1853 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1854 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1855 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1856 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1857 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1858 // CHECK10: .omp.final.then: 1859 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1860 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1861 // CHECK10: .omp.final.done: 1862 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1863 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1864 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 1865 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1866 // CHECK10: arraydestroy.body: 1867 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1868 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1869 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1870 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1871 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1872 // CHECK10: arraydestroy.done5: 1873 // CHECK10-NEXT: ret void 1874 // 1875 // 1876 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1877 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1878 // CHECK10-NEXT: entry: 1879 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1880 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1881 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1882 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1883 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1884 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1885 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1886 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1887 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1888 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1889 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1890 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1891 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1892 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1893 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1894 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8 1895 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1896 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1897 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1898 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1899 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1900 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1901 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1902 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1903 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1904 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1905 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1906 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1907 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1908 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1909 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1910 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1911 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1912 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1913 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1914 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1915 // CHECK10: arrayctor.loop: 1916 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1917 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1918 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1919 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1920 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1921 // CHECK10: arrayctor.cont: 1922 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1923 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8 1924 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1925 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1926 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1927 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1928 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1929 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1930 // CHECK10: cond.true: 1931 // CHECK10-NEXT: br label [[COND_END:%.*]] 1932 // CHECK10: cond.false: 1933 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1934 // CHECK10-NEXT: br label [[COND_END]] 1935 // CHECK10: cond.end: 1936 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1937 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1938 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1939 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1940 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1941 // CHECK10: omp.inner.for.cond: 1942 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1943 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1944 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1945 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1946 // CHECK10: omp.inner.for.cond.cleanup: 1947 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1948 // CHECK10: omp.inner.for.body: 1949 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1950 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1951 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1952 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1953 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !9 1954 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1955 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1956 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1957 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1958 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8, !llvm.access.group !9 1959 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1960 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1961 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1962 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1963 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 1964 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !9 1965 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1966 // CHECK10: omp.body.continue: 1967 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1968 // CHECK10: omp.inner.for.inc: 1969 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1970 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1971 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1972 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1973 // CHECK10: omp.inner.for.end: 1974 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1975 // CHECK10: omp.loop.exit: 1976 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1977 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1978 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1979 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1980 // CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1981 // CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1982 // CHECK10: .omp.final.then: 1983 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 1984 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 1985 // CHECK10: .omp.final.done: 1986 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1987 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1988 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1989 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1990 // CHECK10: arraydestroy.body: 1991 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1992 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1993 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1994 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1995 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1996 // CHECK10: arraydestroy.done9: 1997 // CHECK10-NEXT: ret void 1998 // 1999 // 2000 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2001 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2002 // CHECK10-NEXT: entry: 2003 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2004 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2005 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2006 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2007 // CHECK10-NEXT: ret void 2008 // 2009 // 2010 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2011 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 2012 // CHECK10-NEXT: entry: 2013 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2014 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2015 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2016 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2017 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2018 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 2019 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2020 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2021 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2022 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 2023 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2024 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2025 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2026 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 2027 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2028 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2029 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2030 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 2031 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2032 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2033 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2034 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2035 // CHECK10: omp_offload.failed: 2036 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2037 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2038 // CHECK10: omp_offload.cont: 2039 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2040 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2041 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2042 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2043 // CHECK10: arraydestroy.body: 2044 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2045 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2046 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2047 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2048 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2049 // CHECK10: arraydestroy.done2: 2050 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2051 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2052 // CHECK10-NEXT: ret i32 [[TMP4]] 2053 // 2054 // 2055 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2056 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2057 // CHECK10-NEXT: entry: 2058 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2059 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2060 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2061 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2062 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 2063 // CHECK10-NEXT: ret void 2064 // 2065 // 2066 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2067 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2068 // CHECK10-NEXT: entry: 2069 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2070 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2071 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2072 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2073 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2074 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2075 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2076 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 2077 // CHECK10-NEXT: ret void 2078 // 2079 // 2080 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2081 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2082 // CHECK10-NEXT: entry: 2083 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2084 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2085 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2086 // CHECK10-NEXT: ret void 2087 // 2088 // 2089 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2090 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2091 // CHECK10-NEXT: entry: 2092 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2093 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2094 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2095 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2096 // CHECK10-NEXT: ret void 2097 // 2098 // 2099 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2100 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2101 // CHECK10-NEXT: entry: 2102 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2103 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2104 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2105 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2106 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2107 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2108 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2109 // CHECK10-NEXT: ret void 2110 // 2111 // 2112 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2113 // CHECK10-SAME: () #[[ATTR3]] { 2114 // CHECK10-NEXT: entry: 2115 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2116 // CHECK10-NEXT: ret void 2117 // 2118 // 2119 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2120 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2121 // CHECK10-NEXT: entry: 2122 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2123 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2124 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2125 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2126 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2127 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2128 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2129 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2130 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2131 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2132 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2133 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2134 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2135 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 2136 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2137 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2138 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2139 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 2140 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2141 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2142 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2143 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2144 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2145 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2146 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2147 // CHECK10: arrayctor.loop: 2148 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2149 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2150 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2151 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2152 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2153 // CHECK10: arrayctor.cont: 2154 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2155 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 2156 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2157 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2158 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2159 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2160 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2161 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2162 // CHECK10: cond.true: 2163 // CHECK10-NEXT: br label [[COND_END:%.*]] 2164 // CHECK10: cond.false: 2165 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2166 // CHECK10-NEXT: br label [[COND_END]] 2167 // CHECK10: cond.end: 2168 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2169 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2170 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2171 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2172 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2173 // CHECK10: omp.inner.for.cond: 2174 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2175 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 2176 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2177 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2178 // CHECK10: omp.inner.for.cond.cleanup: 2179 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2180 // CHECK10: omp.inner.for.body: 2181 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14 2182 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2183 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 2184 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2185 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !14 2186 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2187 // CHECK10: omp.inner.for.inc: 2188 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2189 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14 2190 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2191 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2192 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2193 // CHECK10: omp.inner.for.end: 2194 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2195 // CHECK10: omp.loop.exit: 2196 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2197 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2198 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 2199 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2200 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2201 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2202 // CHECK10: .omp.final.then: 2203 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 2204 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 2205 // CHECK10: .omp.final.done: 2206 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2207 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2208 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2 2209 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2210 // CHECK10: arraydestroy.body: 2211 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2212 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2213 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2214 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2215 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2216 // CHECK10: arraydestroy.done5: 2217 // CHECK10-NEXT: ret void 2218 // 2219 // 2220 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2221 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2222 // CHECK10-NEXT: entry: 2223 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2224 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2225 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2226 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2227 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2228 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2229 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2230 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2231 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2232 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2233 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2234 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2235 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2236 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2237 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2238 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8 2239 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2240 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2241 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2242 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2243 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2244 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 2245 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2246 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2247 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2248 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2249 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2250 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 2251 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2252 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2253 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2254 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2255 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2256 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2257 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2258 // CHECK10: arrayctor.loop: 2259 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2260 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2261 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2262 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2263 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2264 // CHECK10: arrayctor.cont: 2265 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2266 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8 2267 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2268 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2269 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2270 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2271 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2272 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2273 // CHECK10: cond.true: 2274 // CHECK10-NEXT: br label [[COND_END:%.*]] 2275 // CHECK10: cond.false: 2276 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2277 // CHECK10-NEXT: br label [[COND_END]] 2278 // CHECK10: cond.end: 2279 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2280 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2281 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2282 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2283 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2284 // CHECK10: omp.inner.for.cond: 2285 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2286 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 2287 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2288 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2289 // CHECK10: omp.inner.for.cond.cleanup: 2290 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2291 // CHECK10: omp.inner.for.body: 2292 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2293 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2294 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2295 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17 2296 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !17 2297 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 2298 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2299 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 2300 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 2301 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8, !llvm.access.group !17 2302 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 2303 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 2304 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 2305 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 2306 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2307 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !17 2308 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2309 // CHECK10: omp.body.continue: 2310 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2311 // CHECK10: omp.inner.for.inc: 2312 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2313 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 2314 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2315 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 2316 // CHECK10: omp.inner.for.end: 2317 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2318 // CHECK10: omp.loop.exit: 2319 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2320 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2321 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 2322 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2323 // CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 2324 // CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2325 // CHECK10: .omp.final.then: 2326 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 2327 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 2328 // CHECK10: .omp.final.done: 2329 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2330 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2331 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 2332 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2333 // CHECK10: arraydestroy.body: 2334 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2335 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2336 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2337 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 2338 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 2339 // CHECK10: arraydestroy.done9: 2340 // CHECK10-NEXT: ret void 2341 // 2342 // 2343 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2344 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2345 // CHECK10-NEXT: entry: 2346 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2347 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2348 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2349 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2350 // CHECK10-NEXT: ret void 2351 // 2352 // 2353 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2354 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2355 // CHECK10-NEXT: entry: 2356 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2357 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2358 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2359 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2360 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2361 // CHECK10-NEXT: ret void 2362 // 2363 // 2364 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2365 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2366 // CHECK10-NEXT: entry: 2367 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2368 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2369 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2370 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2371 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2372 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2373 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2374 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2375 // CHECK10-NEXT: ret void 2376 // 2377 // 2378 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2379 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2380 // CHECK10-NEXT: entry: 2381 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2382 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2383 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2384 // CHECK10-NEXT: ret void 2385 // 2386 // 2387 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2388 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2389 // CHECK10-NEXT: entry: 2390 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2391 // CHECK10-NEXT: ret void 2392 // 2393 // 2394 // CHECK11-LABEL: define {{[^@]+}}@main 2395 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2396 // CHECK11-NEXT: entry: 2397 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2398 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2399 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2400 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2401 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2402 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2403 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2404 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2405 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2406 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2407 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2408 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2409 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2410 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2411 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2412 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2413 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2414 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2415 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2416 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2417 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2418 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2419 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2420 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2421 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2422 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2423 // CHECK11: omp_offload.failed: 2424 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 2425 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2426 // CHECK11: omp_offload.cont: 2427 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2428 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2429 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2430 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2431 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2432 // CHECK11: arraydestroy.body: 2433 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2434 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2435 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2436 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2437 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2438 // CHECK11: arraydestroy.done2: 2439 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2440 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2441 // CHECK11-NEXT: ret i32 [[TMP4]] 2442 // 2443 // 2444 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2445 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2446 // CHECK11-NEXT: entry: 2447 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2448 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2449 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2450 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2451 // CHECK11-NEXT: ret void 2452 // 2453 // 2454 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2455 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2456 // CHECK11-NEXT: entry: 2457 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2458 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2459 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2460 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2461 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2462 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2463 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2464 // CHECK11-NEXT: ret void 2465 // 2466 // 2467 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 2468 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 2469 // CHECK11-NEXT: entry: 2470 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2471 // CHECK11-NEXT: ret void 2472 // 2473 // 2474 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2475 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2476 // CHECK11-NEXT: entry: 2477 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2478 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2479 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2480 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2481 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2482 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2483 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2484 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2485 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2486 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2487 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2488 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2489 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2490 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2491 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2492 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2493 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2494 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2495 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2496 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2497 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2498 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2499 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2500 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2501 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2502 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2503 // CHECK11: arrayctor.loop: 2504 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2505 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2506 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2507 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2508 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2509 // CHECK11: arrayctor.cont: 2510 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2511 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2512 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2513 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2514 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2515 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2516 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2517 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2518 // CHECK11: cond.true: 2519 // CHECK11-NEXT: br label [[COND_END:%.*]] 2520 // CHECK11: cond.false: 2521 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2522 // CHECK11-NEXT: br label [[COND_END]] 2523 // CHECK11: cond.end: 2524 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2525 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2526 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2527 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2528 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2529 // CHECK11: omp.inner.for.cond: 2530 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2531 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 2532 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2533 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2534 // CHECK11: omp.inner.for.cond.cleanup: 2535 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2536 // CHECK11: omp.inner.for.body: 2537 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 2538 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 2539 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !6 2540 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2541 // CHECK11: omp.inner.for.inc: 2542 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2543 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 2544 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2545 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 2546 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2547 // CHECK11: omp.inner.for.end: 2548 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2549 // CHECK11: omp.loop.exit: 2550 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2551 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2552 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2553 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2554 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2555 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2556 // CHECK11: .omp.final.then: 2557 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2558 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2559 // CHECK11: .omp.final.done: 2560 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2561 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2562 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 2563 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2564 // CHECK11: arraydestroy.body: 2565 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2566 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2567 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2568 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2569 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2570 // CHECK11: arraydestroy.done5: 2571 // CHECK11-NEXT: ret void 2572 // 2573 // 2574 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2575 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2576 // CHECK11-NEXT: entry: 2577 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2578 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2579 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2580 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2581 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2582 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2583 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2584 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2585 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2586 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2587 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2588 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2589 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2590 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2591 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2592 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2593 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2594 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2595 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2596 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2597 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2598 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2599 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2600 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2601 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2602 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2603 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2604 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 2605 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 2606 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2607 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2608 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2609 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2610 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2611 // CHECK11: arrayctor.loop: 2612 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2613 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2614 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2615 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2616 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2617 // CHECK11: arrayctor.cont: 2618 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2619 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2620 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2621 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2622 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2623 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2624 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2625 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2626 // CHECK11: cond.true: 2627 // CHECK11-NEXT: br label [[COND_END:%.*]] 2628 // CHECK11: cond.false: 2629 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2630 // CHECK11-NEXT: br label [[COND_END]] 2631 // CHECK11: cond.end: 2632 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2633 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2634 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2635 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2636 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2637 // CHECK11: omp.inner.for.cond: 2638 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2639 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2640 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2641 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2642 // CHECK11: omp.inner.for.cond.cleanup: 2643 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2644 // CHECK11: omp.inner.for.body: 2645 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2646 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2647 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2648 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 2649 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !10 2650 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 2651 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 2652 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2653 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !10 2654 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 2655 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]] 2656 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 2657 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 2658 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !10 2659 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2660 // CHECK11: omp.body.continue: 2661 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2662 // CHECK11: omp.inner.for.inc: 2663 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2664 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 2665 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2666 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2667 // CHECK11: omp.inner.for.end: 2668 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2669 // CHECK11: omp.loop.exit: 2670 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2671 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2672 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 2673 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2674 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 2675 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2676 // CHECK11: .omp.final.then: 2677 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2678 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2679 // CHECK11: .omp.final.done: 2680 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2681 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2682 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2683 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2684 // CHECK11: arraydestroy.body: 2685 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2686 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2687 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2688 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2689 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2690 // CHECK11: arraydestroy.done7: 2691 // CHECK11-NEXT: ret void 2692 // 2693 // 2694 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2695 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2696 // CHECK11-NEXT: entry: 2697 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2698 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2699 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2700 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2701 // CHECK11-NEXT: ret void 2702 // 2703 // 2704 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2705 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2706 // CHECK11-NEXT: entry: 2707 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2708 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2709 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2710 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2711 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2712 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2713 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2714 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2715 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2716 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2717 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2718 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2719 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2720 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2721 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2722 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2723 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2724 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2725 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2726 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 2727 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2728 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2729 // CHECK11: omp_offload.failed: 2730 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2731 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2732 // CHECK11: omp_offload.cont: 2733 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2734 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2735 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2736 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2737 // CHECK11: arraydestroy.body: 2738 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2739 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2740 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2741 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2742 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2743 // CHECK11: arraydestroy.done2: 2744 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2745 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2746 // CHECK11-NEXT: ret i32 [[TMP4]] 2747 // 2748 // 2749 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2750 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2751 // CHECK11-NEXT: entry: 2752 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2753 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2754 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2755 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2756 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2757 // CHECK11-NEXT: ret void 2758 // 2759 // 2760 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2761 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2762 // CHECK11-NEXT: entry: 2763 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2764 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2765 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2766 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2767 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2768 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2769 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2770 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2771 // CHECK11-NEXT: ret void 2772 // 2773 // 2774 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2775 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2776 // CHECK11-NEXT: entry: 2777 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2778 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2779 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2780 // CHECK11-NEXT: ret void 2781 // 2782 // 2783 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2784 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2785 // CHECK11-NEXT: entry: 2786 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2787 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2788 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2789 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2790 // CHECK11-NEXT: ret void 2791 // 2792 // 2793 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2794 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2795 // CHECK11-NEXT: entry: 2796 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2797 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2798 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2799 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2800 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2801 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2802 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2803 // CHECK11-NEXT: ret void 2804 // 2805 // 2806 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2807 // CHECK11-SAME: () #[[ATTR3]] { 2808 // CHECK11-NEXT: entry: 2809 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2810 // CHECK11-NEXT: ret void 2811 // 2812 // 2813 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2814 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2815 // CHECK11-NEXT: entry: 2816 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2817 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2818 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2819 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2820 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2821 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2822 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2823 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2824 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2825 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2826 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2827 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2828 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2829 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2830 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2831 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2832 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2833 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2834 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2835 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2836 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2837 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2838 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2839 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2840 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2841 // CHECK11: arrayctor.loop: 2842 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2843 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2844 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2845 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2846 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2847 // CHECK11: arrayctor.cont: 2848 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2849 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2850 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2851 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2852 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2853 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2854 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2855 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2856 // CHECK11: cond.true: 2857 // CHECK11-NEXT: br label [[COND_END:%.*]] 2858 // CHECK11: cond.false: 2859 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2860 // CHECK11-NEXT: br label [[COND_END]] 2861 // CHECK11: cond.end: 2862 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2863 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2864 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2865 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2866 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2867 // CHECK11: omp.inner.for.cond: 2868 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2869 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 2870 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2871 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2872 // CHECK11: omp.inner.for.cond.cleanup: 2873 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2874 // CHECK11: omp.inner.for.body: 2875 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15 2876 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 2877 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !15 2878 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2879 // CHECK11: omp.inner.for.inc: 2880 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2881 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15 2882 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2883 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2884 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2885 // CHECK11: omp.inner.for.end: 2886 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2887 // CHECK11: omp.loop.exit: 2888 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2889 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2890 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2891 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2892 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2893 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2894 // CHECK11: .omp.final.then: 2895 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 2896 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2897 // CHECK11: .omp.final.done: 2898 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2899 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2900 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2 2901 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2902 // CHECK11: arraydestroy.body: 2903 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2904 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2905 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2906 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2907 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2908 // CHECK11: arraydestroy.done5: 2909 // CHECK11-NEXT: ret void 2910 // 2911 // 2912 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 2913 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2914 // CHECK11-NEXT: entry: 2915 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2916 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2917 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2918 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2919 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2920 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2921 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2922 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2923 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2924 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2925 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2926 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2927 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2928 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2929 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2930 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2931 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2932 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2933 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2934 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2935 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2936 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2937 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2938 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2939 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2940 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2941 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 2942 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 2943 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2944 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2945 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2946 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2947 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2948 // CHECK11: arrayctor.loop: 2949 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2950 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2951 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2952 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2953 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2954 // CHECK11: arrayctor.cont: 2955 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2956 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2957 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2958 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2959 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2960 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2961 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2962 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2963 // CHECK11: cond.true: 2964 // CHECK11-NEXT: br label [[COND_END:%.*]] 2965 // CHECK11: cond.false: 2966 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2967 // CHECK11-NEXT: br label [[COND_END]] 2968 // CHECK11: cond.end: 2969 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2970 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2971 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2972 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2973 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2974 // CHECK11: omp.inner.for.cond: 2975 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2976 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 2977 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2978 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2979 // CHECK11: omp.inner.for.cond.cleanup: 2980 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2981 // CHECK11: omp.inner.for.body: 2982 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2983 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2984 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2985 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18 2986 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !18 2987 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 2988 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 2989 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 2990 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !18 2991 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 2992 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]] 2993 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2994 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2995 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !18 2996 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2997 // CHECK11: omp.body.continue: 2998 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2999 // CHECK11: omp.inner.for.inc: 3000 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3001 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 3002 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3003 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 3004 // CHECK11: omp.inner.for.end: 3005 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3006 // CHECK11: omp.loop.exit: 3007 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3008 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3009 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 3010 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3011 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 3012 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3013 // CHECK11: .omp.final.then: 3014 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 3015 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3016 // CHECK11: .omp.final.done: 3017 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3018 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3019 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 3020 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3021 // CHECK11: arraydestroy.body: 3022 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3023 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3024 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3025 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3026 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3027 // CHECK11: arraydestroy.done7: 3028 // CHECK11-NEXT: ret void 3029 // 3030 // 3031 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3032 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3033 // CHECK11-NEXT: entry: 3034 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3035 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3036 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3037 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3038 // CHECK11-NEXT: ret void 3039 // 3040 // 3041 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3042 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3043 // CHECK11-NEXT: entry: 3044 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3045 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3046 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3047 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3048 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 3049 // CHECK11-NEXT: ret void 3050 // 3051 // 3052 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3053 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3054 // CHECK11-NEXT: entry: 3055 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3056 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3057 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3058 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3059 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3060 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3061 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3062 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3063 // CHECK11-NEXT: ret void 3064 // 3065 // 3066 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3067 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3068 // CHECK11-NEXT: entry: 3069 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3070 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3071 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3072 // CHECK11-NEXT: ret void 3073 // 3074 // 3075 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3076 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 3077 // CHECK11-NEXT: entry: 3078 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3079 // CHECK11-NEXT: ret void 3080 // 3081 // 3082 // CHECK12-LABEL: define {{[^@]+}}@main 3083 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 3084 // CHECK12-NEXT: entry: 3085 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3086 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 3087 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 3088 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3089 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3090 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3091 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3092 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3093 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3094 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3095 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3096 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 3097 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3098 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3099 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3100 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3101 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3102 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3103 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3104 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3105 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3106 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3107 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 3108 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 3109 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 3110 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3111 // CHECK12: omp_offload.failed: 3112 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 3113 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3114 // CHECK12: omp_offload.cont: 3115 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3116 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3117 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3118 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3119 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3120 // CHECK12: arraydestroy.body: 3121 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3122 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3123 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3124 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3125 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3126 // CHECK12: arraydestroy.done2: 3127 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3128 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 3129 // CHECK12-NEXT: ret i32 [[TMP4]] 3130 // 3131 // 3132 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3133 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3134 // CHECK12-NEXT: entry: 3135 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3136 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3137 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3138 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3139 // CHECK12-NEXT: ret void 3140 // 3141 // 3142 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3143 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3144 // CHECK12-NEXT: entry: 3145 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3146 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3147 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3148 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3149 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3150 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3151 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3152 // CHECK12-NEXT: ret void 3153 // 3154 // 3155 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 3156 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 3157 // CHECK12-NEXT: entry: 3158 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 3159 // CHECK12-NEXT: ret void 3160 // 3161 // 3162 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3163 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3164 // CHECK12-NEXT: entry: 3165 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3166 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3167 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3168 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3169 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3170 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3171 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3172 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3173 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3174 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3175 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3176 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3177 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3178 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 3179 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3180 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3181 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3182 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3183 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3184 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3185 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3186 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3187 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3188 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3189 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3190 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3191 // CHECK12: arrayctor.loop: 3192 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3193 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3194 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3195 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3196 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3197 // CHECK12: arrayctor.cont: 3198 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 3199 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 3200 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3201 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3202 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3203 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3204 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 3205 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3206 // CHECK12: cond.true: 3207 // CHECK12-NEXT: br label [[COND_END:%.*]] 3208 // CHECK12: cond.false: 3209 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3210 // CHECK12-NEXT: br label [[COND_END]] 3211 // CHECK12: cond.end: 3212 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3213 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3214 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3215 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3216 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3217 // CHECK12: omp.inner.for.cond: 3218 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3219 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 3220 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3221 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3222 // CHECK12: omp.inner.for.cond.cleanup: 3223 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3224 // CHECK12: omp.inner.for.body: 3225 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 3226 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 3227 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !6 3228 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3229 // CHECK12: omp.inner.for.inc: 3230 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3231 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 3232 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 3233 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3234 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3235 // CHECK12: omp.inner.for.end: 3236 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3237 // CHECK12: omp.loop.exit: 3238 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3239 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3240 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 3241 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3242 // CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3243 // CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3244 // CHECK12: .omp.final.then: 3245 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3246 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3247 // CHECK12: .omp.final.done: 3248 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3249 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3250 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 3251 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3252 // CHECK12: arraydestroy.body: 3253 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3254 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3255 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3256 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3257 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3258 // CHECK12: arraydestroy.done5: 3259 // CHECK12-NEXT: ret void 3260 // 3261 // 3262 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3263 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 3264 // CHECK12-NEXT: entry: 3265 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3266 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3267 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3268 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3269 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3270 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3271 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3272 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3273 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3274 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3275 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3276 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3277 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3278 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3279 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3280 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 3281 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3282 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3283 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3284 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3285 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3286 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3287 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3288 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3289 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3290 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3291 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3292 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 3293 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 3294 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3295 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3296 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3297 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3298 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3299 // CHECK12: arrayctor.loop: 3300 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3301 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3302 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3303 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3304 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3305 // CHECK12: arrayctor.cont: 3306 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 3307 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 3308 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3309 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3310 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3311 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3312 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3313 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3314 // CHECK12: cond.true: 3315 // CHECK12-NEXT: br label [[COND_END:%.*]] 3316 // CHECK12: cond.false: 3317 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3318 // CHECK12-NEXT: br label [[COND_END]] 3319 // CHECK12: cond.end: 3320 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3321 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3322 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3323 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3324 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3325 // CHECK12: omp.inner.for.cond: 3326 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3327 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 3328 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3329 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3330 // CHECK12: omp.inner.for.cond.cleanup: 3331 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3332 // CHECK12: omp.inner.for.body: 3333 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3334 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3335 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3336 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 3337 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !10 3338 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3339 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 3340 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 3341 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !10 3342 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3343 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]] 3344 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 3345 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 3346 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !10 3347 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3348 // CHECK12: omp.body.continue: 3349 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3350 // CHECK12: omp.inner.for.inc: 3351 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3352 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 3353 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3354 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3355 // CHECK12: omp.inner.for.end: 3356 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3357 // CHECK12: omp.loop.exit: 3358 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3359 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3360 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 3361 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3362 // CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 3363 // CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3364 // CHECK12: .omp.final.then: 3365 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3366 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3367 // CHECK12: .omp.final.done: 3368 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3369 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3370 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 3371 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3372 // CHECK12: arraydestroy.body: 3373 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3374 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3375 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3376 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3377 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3378 // CHECK12: arraydestroy.done7: 3379 // CHECK12-NEXT: ret void 3380 // 3381 // 3382 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3383 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3384 // CHECK12-NEXT: entry: 3385 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3386 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3387 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3388 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3389 // CHECK12-NEXT: ret void 3390 // 3391 // 3392 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3393 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3394 // CHECK12-NEXT: entry: 3395 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3396 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3397 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3398 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3399 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3400 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3401 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3402 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3403 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3404 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3405 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3406 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3407 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3408 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3409 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3410 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3411 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3412 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3413 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 3414 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1) 3415 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 3416 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3417 // CHECK12: omp_offload.failed: 3418 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 3419 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3420 // CHECK12: omp_offload.cont: 3421 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3422 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3423 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3424 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3425 // CHECK12: arraydestroy.body: 3426 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3427 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3428 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3429 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3430 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3431 // CHECK12: arraydestroy.done2: 3432 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3433 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 3434 // CHECK12-NEXT: ret i32 [[TMP4]] 3435 // 3436 // 3437 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3438 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3439 // CHECK12-NEXT: entry: 3440 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3441 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3442 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3443 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3444 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3445 // CHECK12-NEXT: ret void 3446 // 3447 // 3448 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3449 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3450 // CHECK12-NEXT: entry: 3451 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3452 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3453 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3454 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3455 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3456 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3457 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3458 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3459 // CHECK12-NEXT: ret void 3460 // 3461 // 3462 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3463 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3464 // CHECK12-NEXT: entry: 3465 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3466 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3467 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3468 // CHECK12-NEXT: ret void 3469 // 3470 // 3471 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3472 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3473 // CHECK12-NEXT: entry: 3474 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3475 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3476 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3477 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3478 // CHECK12-NEXT: ret void 3479 // 3480 // 3481 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3482 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3483 // CHECK12-NEXT: entry: 3484 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3485 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3486 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3487 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3488 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3489 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3490 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3491 // CHECK12-NEXT: ret void 3492 // 3493 // 3494 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3495 // CHECK12-SAME: () #[[ATTR3]] { 3496 // CHECK12-NEXT: entry: 3497 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 3498 // CHECK12-NEXT: ret void 3499 // 3500 // 3501 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 3502 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3503 // CHECK12-NEXT: entry: 3504 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3505 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3506 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3507 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3508 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3509 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3510 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3511 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3512 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3513 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3514 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3515 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3516 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3517 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 3518 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3519 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3520 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3521 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3522 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3523 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3524 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3525 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3526 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3527 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3528 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3529 // CHECK12: arrayctor.loop: 3530 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3531 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3532 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3533 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3534 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3535 // CHECK12: arrayctor.cont: 3536 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 3537 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 3538 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3539 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3540 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3541 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3542 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 3543 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3544 // CHECK12: cond.true: 3545 // CHECK12-NEXT: br label [[COND_END:%.*]] 3546 // CHECK12: cond.false: 3547 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3548 // CHECK12-NEXT: br label [[COND_END]] 3549 // CHECK12: cond.end: 3550 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3551 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3552 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3553 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3554 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3555 // CHECK12: omp.inner.for.cond: 3556 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3557 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 3558 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3559 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3560 // CHECK12: omp.inner.for.cond.cleanup: 3561 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3562 // CHECK12: omp.inner.for.body: 3563 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15 3564 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 3565 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group !15 3566 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3567 // CHECK12: omp.inner.for.inc: 3568 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3569 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15 3570 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 3571 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3572 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 3573 // CHECK12: omp.inner.for.end: 3574 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3575 // CHECK12: omp.loop.exit: 3576 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3577 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3578 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 3579 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3580 // CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3581 // CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3582 // CHECK12: .omp.final.then: 3583 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3584 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3585 // CHECK12: .omp.final.done: 3586 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3587 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3588 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2 3589 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3590 // CHECK12: arraydestroy.body: 3591 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3592 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3593 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3594 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3595 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3596 // CHECK12: arraydestroy.done5: 3597 // CHECK12-NEXT: ret void 3598 // 3599 // 3600 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 3601 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 3602 // CHECK12-NEXT: entry: 3603 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3604 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3605 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3606 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3607 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3608 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3609 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3610 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3611 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3612 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3613 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3614 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3615 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3616 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3617 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3618 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 3619 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3620 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3621 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3622 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3623 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3624 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3625 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3626 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3627 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3628 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3629 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 3630 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 3631 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3632 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3633 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3634 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3635 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3636 // CHECK12: arrayctor.loop: 3637 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3638 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3639 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3640 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3641 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3642 // CHECK12: arrayctor.cont: 3643 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) 3644 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 3645 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3646 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3647 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3648 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3649 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3650 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3651 // CHECK12: cond.true: 3652 // CHECK12-NEXT: br label [[COND_END:%.*]] 3653 // CHECK12: cond.false: 3654 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3655 // CHECK12-NEXT: br label [[COND_END]] 3656 // CHECK12: cond.end: 3657 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3658 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3659 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3660 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3661 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3662 // CHECK12: omp.inner.for.cond: 3663 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3664 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 3665 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3666 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3667 // CHECK12: omp.inner.for.cond.cleanup: 3668 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3669 // CHECK12: omp.inner.for.body: 3670 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3671 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3672 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3673 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18 3674 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !18 3675 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 3676 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 3677 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 3678 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !18 3679 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 3680 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]] 3681 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 3682 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3683 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !18 3684 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3685 // CHECK12: omp.body.continue: 3686 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3687 // CHECK12: omp.inner.for.inc: 3688 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3689 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 3690 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3691 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 3692 // CHECK12: omp.inner.for.end: 3693 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3694 // CHECK12: omp.loop.exit: 3695 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3696 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3697 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 3698 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3699 // CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 3700 // CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3701 // CHECK12: .omp.final.then: 3702 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 3703 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 3704 // CHECK12: .omp.final.done: 3705 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3706 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3707 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 3708 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3709 // CHECK12: arraydestroy.body: 3710 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP21]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3711 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3712 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3713 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3714 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3715 // CHECK12: arraydestroy.done7: 3716 // CHECK12-NEXT: ret void 3717 // 3718 // 3719 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3720 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3721 // CHECK12-NEXT: entry: 3722 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3723 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3724 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3725 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3726 // CHECK12-NEXT: ret void 3727 // 3728 // 3729 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3730 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3731 // CHECK12-NEXT: entry: 3732 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3733 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3734 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3735 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3736 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3737 // CHECK12-NEXT: ret void 3738 // 3739 // 3740 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3741 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3742 // CHECK12-NEXT: entry: 3743 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3744 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3745 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3746 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3747 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3748 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3749 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3750 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3751 // CHECK12-NEXT: ret void 3752 // 3753 // 3754 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3755 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3756 // CHECK12-NEXT: entry: 3757 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3758 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3759 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3760 // CHECK12-NEXT: ret void 3761 // 3762 // 3763 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3764 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3765 // CHECK12-NEXT: entry: 3766 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3767 // CHECK12-NEXT: ret void 3768 // 3769 // 3770 // CHECK13-LABEL: define {{[^@]+}}@main 3771 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3772 // CHECK13-NEXT: entry: 3773 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3774 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3775 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3776 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3777 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3778 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3779 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3780 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3781 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3782 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 3783 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3784 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3785 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3786 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3787 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3788 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3789 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 3790 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 3791 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 3792 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3793 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3794 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3795 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3796 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3797 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3798 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3799 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3800 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3801 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3802 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3803 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3804 // CHECK13-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 3805 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3806 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3807 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3808 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3809 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3810 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3811 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3812 // CHECK13: arrayctor.loop: 3813 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3814 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3815 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3816 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3817 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3818 // CHECK13: arrayctor.cont: 3819 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3820 // CHECK13-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 3821 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3822 // CHECK13: omp.inner.for.cond: 3823 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3824 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3825 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3826 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3827 // CHECK13: omp.inner.for.cond.cleanup: 3828 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3829 // CHECK13: omp.inner.for.body: 3830 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3831 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3832 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3833 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 3834 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 3835 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3836 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3837 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3838 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3839 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 3840 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 3841 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3842 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3843 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3844 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 3845 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !2 3846 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3847 // CHECK13: omp.body.continue: 3848 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3849 // CHECK13: omp.inner.for.inc: 3850 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3851 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3852 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3853 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3854 // CHECK13: omp.inner.for.end: 3855 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3856 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 3857 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 3858 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 3859 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3860 // CHECK13: arraydestroy.body: 3861 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3862 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3863 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3864 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3865 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3866 // CHECK13: arraydestroy.done11: 3867 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 3868 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3869 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3870 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 3871 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 3872 // CHECK13: arraydestroy.body13: 3873 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 3874 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 3875 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 3876 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 3877 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 3878 // CHECK13: arraydestroy.done17: 3879 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3880 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 3881 // CHECK13-NEXT: ret i32 [[TMP14]] 3882 // 3883 // 3884 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3885 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3886 // CHECK13-NEXT: entry: 3887 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3888 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3889 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3890 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3891 // CHECK13-NEXT: ret void 3892 // 3893 // 3894 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3895 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3896 // CHECK13-NEXT: entry: 3897 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3898 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3899 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3900 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3901 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3902 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3903 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3904 // CHECK13-NEXT: ret void 3905 // 3906 // 3907 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3908 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3909 // CHECK13-NEXT: entry: 3910 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3911 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3912 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3913 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3914 // CHECK13-NEXT: ret void 3915 // 3916 // 3917 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3918 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3919 // CHECK13-NEXT: entry: 3920 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3921 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3922 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3923 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3924 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3925 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3926 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3927 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3928 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3929 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3930 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3931 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3932 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 3933 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 3934 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 3935 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 3936 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 3937 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3938 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3939 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3940 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3941 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3942 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 3943 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3944 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 3945 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3946 // CHECK13-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 3947 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3948 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3949 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3950 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 3951 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 3952 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3953 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3954 // CHECK13: arrayctor.loop: 3955 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3956 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3957 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3958 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3959 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3960 // CHECK13: arrayctor.cont: 3961 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 3962 // CHECK13-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 3963 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3964 // CHECK13: omp.inner.for.cond: 3965 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3966 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 3967 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3968 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3969 // CHECK13: omp.inner.for.cond.cleanup: 3970 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3971 // CHECK13: omp.inner.for.body: 3972 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3973 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3974 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3975 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 3976 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 3977 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3978 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 3979 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 3980 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 3981 // CHECK13-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6 3982 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 3983 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 3984 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 3985 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 3986 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 3987 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6 3988 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3989 // CHECK13: omp.body.continue: 3990 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3991 // CHECK13: omp.inner.for.inc: 3992 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3993 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 3994 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3995 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3996 // CHECK13: omp.inner.for.end: 3997 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 3998 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3999 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4000 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 4001 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4002 // CHECK13: arraydestroy.body: 4003 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4004 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4005 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4006 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4007 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4008 // CHECK13: arraydestroy.done11: 4009 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 4010 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4011 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 4012 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 4013 // CHECK13: arraydestroy.body13: 4014 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 4015 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 4016 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 4017 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 4018 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 4019 // CHECK13: arraydestroy.done17: 4020 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4021 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4022 // CHECK13-NEXT: ret i32 [[TMP14]] 4023 // 4024 // 4025 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4026 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4027 // CHECK13-NEXT: entry: 4028 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4029 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4030 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4031 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4032 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 4033 // CHECK13-NEXT: ret void 4034 // 4035 // 4036 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4037 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4038 // CHECK13-NEXT: entry: 4039 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4040 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4041 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4042 // CHECK13-NEXT: ret void 4043 // 4044 // 4045 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4046 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4047 // CHECK13-NEXT: entry: 4048 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4049 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4050 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4051 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4052 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4053 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4054 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4055 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 4056 // CHECK13-NEXT: ret void 4057 // 4058 // 4059 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4060 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4061 // CHECK13-NEXT: entry: 4062 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4063 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4064 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4065 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4066 // CHECK13-NEXT: ret void 4067 // 4068 // 4069 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4070 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4071 // CHECK13-NEXT: entry: 4072 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4073 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4074 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4075 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4076 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4077 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4078 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 4079 // CHECK13-NEXT: ret void 4080 // 4081 // 4082 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4083 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4084 // CHECK13-NEXT: entry: 4085 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4086 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4087 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4088 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4089 // CHECK13-NEXT: ret void 4090 // 4091 // 4092 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4093 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4094 // CHECK13-NEXT: entry: 4095 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4096 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4097 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4098 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4099 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 4100 // CHECK13-NEXT: ret void 4101 // 4102 // 4103 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4104 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4105 // CHECK13-NEXT: entry: 4106 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4107 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4108 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4109 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4110 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4111 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4112 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4113 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4114 // CHECK13-NEXT: ret void 4115 // 4116 // 4117 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4118 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4119 // CHECK13-NEXT: entry: 4120 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4121 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4122 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4123 // CHECK13-NEXT: ret void 4124 // 4125 // 4126 // CHECK14-LABEL: define {{[^@]+}}@main 4127 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 4128 // CHECK14-NEXT: entry: 4129 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4130 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 4131 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 4132 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4133 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4134 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4135 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4136 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 4137 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 4138 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 4139 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4140 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4141 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4142 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4143 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4144 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4145 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4146 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4147 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8 4148 // CHECK14-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4149 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4150 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 4151 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4152 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4153 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4154 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 4155 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 4156 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4157 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 4158 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4159 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 4160 // CHECK14-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 4161 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4162 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4163 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4164 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4165 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4166 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 4167 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4168 // CHECK14: arrayctor.loop: 4169 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4170 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4171 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 4172 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4173 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4174 // CHECK14: arrayctor.cont: 4175 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4176 // CHECK14-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8 4177 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4178 // CHECK14: omp.inner.for.cond: 4179 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4180 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 4181 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4182 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4183 // CHECK14: omp.inner.for.cond.cleanup: 4184 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4185 // CHECK14: omp.inner.for.body: 4186 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4187 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4188 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4189 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 4190 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2 4191 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 4192 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 4193 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 4194 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 4195 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2 4196 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 4197 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 4198 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 4199 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 4200 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4201 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !2 4202 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4203 // CHECK14: omp.body.continue: 4204 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4205 // CHECK14: omp.inner.for.inc: 4206 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4207 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 4208 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 4209 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4210 // CHECK14: omp.inner.for.end: 4211 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4212 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4213 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4214 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2 4215 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4216 // CHECK14: arraydestroy.body: 4217 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4218 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4219 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4220 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4221 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4222 // CHECK14: arraydestroy.done11: 4223 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 4224 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4225 // CHECK14-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4226 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 4227 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 4228 // CHECK14: arraydestroy.body13: 4229 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 4230 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 4231 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 4232 // CHECK14-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 4233 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 4234 // CHECK14: arraydestroy.done17: 4235 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4236 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4237 // CHECK14-NEXT: ret i32 [[TMP14]] 4238 // 4239 // 4240 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4241 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4242 // CHECK14-NEXT: entry: 4243 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4244 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4245 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4246 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4247 // CHECK14-NEXT: ret void 4248 // 4249 // 4250 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4251 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4252 // CHECK14-NEXT: entry: 4253 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4254 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4255 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4256 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4257 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4258 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4259 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4260 // CHECK14-NEXT: ret void 4261 // 4262 // 4263 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4264 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4265 // CHECK14-NEXT: entry: 4266 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4267 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4268 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4269 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4270 // CHECK14-NEXT: ret void 4271 // 4272 // 4273 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4274 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 4275 // CHECK14-NEXT: entry: 4276 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4277 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4278 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4279 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4280 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4281 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 4282 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 4283 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 4284 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4285 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4286 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4287 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4288 // CHECK14-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4289 // CHECK14-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4290 // CHECK14-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4291 // CHECK14-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4292 // CHECK14-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8 4293 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4294 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4295 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4296 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 4297 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 4298 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 4299 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 4300 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 4301 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 4302 // CHECK14-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 4303 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4304 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4305 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4306 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4307 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4308 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 4309 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4310 // CHECK14: arrayctor.loop: 4311 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4312 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4313 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 4314 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4315 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4316 // CHECK14: arrayctor.cont: 4317 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4318 // CHECK14-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8 4319 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4320 // CHECK14: omp.inner.for.cond: 4321 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4322 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 4323 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4324 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4325 // CHECK14: omp.inner.for.cond.cleanup: 4326 // CHECK14-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4327 // CHECK14: omp.inner.for.body: 4328 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4329 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4330 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4331 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 4332 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 4333 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4334 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64 4335 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] 4336 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 4337 // CHECK14-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6 4338 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 4339 // CHECK14-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP8]] to i64 4340 // CHECK14-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 4341 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4342 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4343 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group !6 4344 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4345 // CHECK14: omp.body.continue: 4346 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4347 // CHECK14: omp.inner.for.inc: 4348 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4349 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], 1 4350 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4351 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4352 // CHECK14: omp.inner.for.end: 4353 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 4354 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4355 // CHECK14-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4356 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 4357 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4358 // CHECK14: arraydestroy.body: 4359 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4360 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4361 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4362 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4363 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4364 // CHECK14: arraydestroy.done11: 4365 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4366 // CHECK14-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4367 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2 4368 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 4369 // CHECK14: arraydestroy.body13: 4370 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 4371 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 4372 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]] 4373 // CHECK14-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 4374 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 4375 // CHECK14: arraydestroy.done17: 4376 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4377 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4378 // CHECK14-NEXT: ret i32 [[TMP14]] 4379 // 4380 // 4381 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4382 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4383 // CHECK14-NEXT: entry: 4384 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4385 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4386 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4387 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4388 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4389 // CHECK14-NEXT: ret void 4390 // 4391 // 4392 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4393 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4394 // CHECK14-NEXT: entry: 4395 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4396 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4397 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4398 // CHECK14-NEXT: ret void 4399 // 4400 // 4401 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4402 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4403 // CHECK14-NEXT: entry: 4404 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4405 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4406 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4407 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4408 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4409 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4410 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4411 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4412 // CHECK14-NEXT: ret void 4413 // 4414 // 4415 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4416 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4417 // CHECK14-NEXT: entry: 4418 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4419 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4420 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4421 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4422 // CHECK14-NEXT: ret void 4423 // 4424 // 4425 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4426 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4427 // CHECK14-NEXT: entry: 4428 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4429 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4430 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4431 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4432 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4433 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4434 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 4435 // CHECK14-NEXT: ret void 4436 // 4437 // 4438 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4439 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4440 // CHECK14-NEXT: entry: 4441 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4442 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4443 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4444 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4445 // CHECK14-NEXT: ret void 4446 // 4447 // 4448 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4449 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4450 // CHECK14-NEXT: entry: 4451 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4452 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4453 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4454 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4455 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4456 // CHECK14-NEXT: ret void 4457 // 4458 // 4459 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4460 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4461 // CHECK14-NEXT: entry: 4462 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4463 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4464 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4465 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4466 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4467 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4468 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4469 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4470 // CHECK14-NEXT: ret void 4471 // 4472 // 4473 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4474 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4475 // CHECK14-NEXT: entry: 4476 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4477 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4478 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4479 // CHECK14-NEXT: ret void 4480 // 4481 // 4482 // CHECK15-LABEL: define {{[^@]+}}@main 4483 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4484 // CHECK15-NEXT: entry: 4485 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4486 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4487 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4488 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4489 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4490 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4491 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4492 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4493 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 4494 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4495 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4496 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4497 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4498 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4499 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4500 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4501 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4502 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4503 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4504 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4505 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4506 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4507 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4508 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4509 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4510 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4511 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4512 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4513 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4514 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4515 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4516 // CHECK15-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 4517 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4518 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4519 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4520 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4521 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4522 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4523 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4524 // CHECK15: arrayctor.loop: 4525 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4526 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4527 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4528 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4529 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4530 // CHECK15: arrayctor.cont: 4531 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4532 // CHECK15-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4533 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4534 // CHECK15: omp.inner.for.cond: 4535 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4536 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4537 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4538 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4539 // CHECK15: omp.inner.for.cond.cleanup: 4540 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4541 // CHECK15: omp.inner.for.body: 4542 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4543 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4544 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4545 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4546 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 4547 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4548 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 4549 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4550 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 4551 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4552 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP8]] 4553 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 4554 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4555 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !3 4556 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4557 // CHECK15: omp.body.continue: 4558 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4559 // CHECK15: omp.inner.for.inc: 4560 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4561 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 4562 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4563 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4564 // CHECK15: omp.inner.for.end: 4565 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4566 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4567 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4568 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 4569 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4570 // CHECK15: arraydestroy.body: 4571 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4572 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4573 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4574 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4575 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4576 // CHECK15: arraydestroy.done10: 4577 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4578 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4579 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4580 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4581 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 4582 // CHECK15: arraydestroy.body12: 4583 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 4584 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 4585 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 4586 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 4587 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 4588 // CHECK15: arraydestroy.done16: 4589 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4590 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4591 // CHECK15-NEXT: ret i32 [[TMP14]] 4592 // 4593 // 4594 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4595 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4596 // CHECK15-NEXT: entry: 4597 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4598 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4599 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4600 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4601 // CHECK15-NEXT: ret void 4602 // 4603 // 4604 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4605 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4606 // CHECK15-NEXT: entry: 4607 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4608 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4609 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4610 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4611 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4612 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4613 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4614 // CHECK15-NEXT: ret void 4615 // 4616 // 4617 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4618 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4619 // CHECK15-NEXT: entry: 4620 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4621 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4622 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4623 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4624 // CHECK15-NEXT: ret void 4625 // 4626 // 4627 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4628 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4629 // CHECK15-NEXT: entry: 4630 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4631 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4632 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4633 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4634 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4635 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4636 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 4637 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4638 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4639 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4640 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4641 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4642 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4643 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4644 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4645 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4646 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4647 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4648 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4649 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4650 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4651 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4652 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4653 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4654 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4655 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4656 // CHECK15-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 4657 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4658 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4659 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4660 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4661 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4662 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4663 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4664 // CHECK15: arrayctor.loop: 4665 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4666 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4667 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4668 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4669 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4670 // CHECK15: arrayctor.cont: 4671 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4672 // CHECK15-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4673 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4674 // CHECK15: omp.inner.for.cond: 4675 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4676 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 4677 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4678 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4679 // CHECK15: omp.inner.for.cond.cleanup: 4680 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4681 // CHECK15: omp.inner.for.body: 4682 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4683 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4684 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4685 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 4686 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7 4687 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4688 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 4689 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 4690 // CHECK15-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7 4691 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 4692 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]] 4693 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 4694 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 4695 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7 4696 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4697 // CHECK15: omp.body.continue: 4698 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4699 // CHECK15: omp.inner.for.inc: 4700 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4701 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 4702 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 4703 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 4704 // CHECK15: omp.inner.for.end: 4705 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 4706 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4707 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 4708 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 4709 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4710 // CHECK15: arraydestroy.body: 4711 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4712 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4713 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4714 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4715 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4716 // CHECK15: arraydestroy.done10: 4717 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4718 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4719 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 4720 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 4721 // CHECK15: arraydestroy.body12: 4722 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 4723 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 4724 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 4725 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 4726 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 4727 // CHECK15: arraydestroy.done16: 4728 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4729 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4730 // CHECK15-NEXT: ret i32 [[TMP14]] 4731 // 4732 // 4733 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4734 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4735 // CHECK15-NEXT: entry: 4736 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4737 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4738 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4739 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4740 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4741 // CHECK15-NEXT: ret void 4742 // 4743 // 4744 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4745 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4746 // CHECK15-NEXT: entry: 4747 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4748 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4749 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4750 // CHECK15-NEXT: ret void 4751 // 4752 // 4753 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4754 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4755 // CHECK15-NEXT: entry: 4756 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4757 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4758 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4759 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4760 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4761 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4762 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4763 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4764 // CHECK15-NEXT: ret void 4765 // 4766 // 4767 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4768 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4769 // CHECK15-NEXT: entry: 4770 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4771 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4772 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4773 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4774 // CHECK15-NEXT: ret void 4775 // 4776 // 4777 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4778 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4779 // CHECK15-NEXT: entry: 4780 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4781 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4782 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4783 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4784 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4785 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4786 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4787 // CHECK15-NEXT: ret void 4788 // 4789 // 4790 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4791 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4792 // CHECK15-NEXT: entry: 4793 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4794 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4795 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4796 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4797 // CHECK15-NEXT: ret void 4798 // 4799 // 4800 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4801 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4802 // CHECK15-NEXT: entry: 4803 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4804 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4805 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4806 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4807 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4808 // CHECK15-NEXT: ret void 4809 // 4810 // 4811 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4812 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4813 // CHECK15-NEXT: entry: 4814 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4815 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4816 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4817 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4818 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4819 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4820 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4821 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4822 // CHECK15-NEXT: ret void 4823 // 4824 // 4825 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4826 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4827 // CHECK15-NEXT: entry: 4828 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4829 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4830 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4831 // CHECK15-NEXT: ret void 4832 // 4833 // 4834 // CHECK16-LABEL: define {{[^@]+}}@main 4835 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4836 // CHECK16-NEXT: entry: 4837 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4838 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4839 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4840 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4841 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4842 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4843 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4844 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4845 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 4846 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4847 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4848 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4849 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4850 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4851 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4852 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4853 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 4854 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 4855 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4856 // CHECK16-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4857 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4858 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4859 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4860 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4861 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4862 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4863 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4864 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4865 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4866 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4867 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4868 // CHECK16-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 4869 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4870 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4871 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4872 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 4873 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4874 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4875 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4876 // CHECK16: arrayctor.loop: 4877 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4878 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4879 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4880 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4881 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4882 // CHECK16: arrayctor.cont: 4883 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 4884 // CHECK16-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4885 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4886 // CHECK16: omp.inner.for.cond: 4887 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4888 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 4889 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 4890 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4891 // CHECK16: omp.inner.for.cond.cleanup: 4892 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4893 // CHECK16: omp.inner.for.body: 4894 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4895 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4896 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4897 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 4898 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3 4899 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4900 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 4901 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 4902 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3 4903 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 4904 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP8]] 4905 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* 4906 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[TMP7]] to i8* 4907 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !3 4908 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4909 // CHECK16: omp.body.continue: 4910 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4911 // CHECK16: omp.inner.for.inc: 4912 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4913 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 4914 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 4915 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4916 // CHECK16: omp.inner.for.end: 4917 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 4918 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]] 4919 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 4920 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2 4921 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4922 // CHECK16: arraydestroy.body: 4923 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4924 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4925 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4926 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 4927 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 4928 // CHECK16: arraydestroy.done10: 4929 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4930 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4931 // CHECK16-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4932 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4933 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 4934 // CHECK16: arraydestroy.body12: 4935 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 4936 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 4937 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 4938 // CHECK16-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 4939 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 4940 // CHECK16: arraydestroy.done16: 4941 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4942 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 4943 // CHECK16-NEXT: ret i32 [[TMP14]] 4944 // 4945 // 4946 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4947 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4948 // CHECK16-NEXT: entry: 4949 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4950 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4951 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4952 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4953 // CHECK16-NEXT: ret void 4954 // 4955 // 4956 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4957 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4958 // CHECK16-NEXT: entry: 4959 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4960 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4961 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4962 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4963 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4964 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4965 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4966 // CHECK16-NEXT: ret void 4967 // 4968 // 4969 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4970 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4971 // CHECK16-NEXT: entry: 4972 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4973 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4974 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4975 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4976 // CHECK16-NEXT: ret void 4977 // 4978 // 4979 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4980 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4981 // CHECK16-NEXT: entry: 4982 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4983 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4984 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4985 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4986 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4987 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4988 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 4989 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4990 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4991 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4992 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4993 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4994 // CHECK16-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 4995 // CHECK16-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 4996 // CHECK16-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 4997 // CHECK16-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 4998 // CHECK16-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4999 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5000 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 5001 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5002 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 5003 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5004 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 5005 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 5006 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 5007 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 5008 // CHECK16-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 5009 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5010 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5011 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5012 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4 5013 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5014 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5015 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 5016 // CHECK16: arrayctor.loop: 5017 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 5018 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 5019 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 5020 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 5021 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 5022 // CHECK16: arrayctor.cont: 5023 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 5024 // CHECK16-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 5025 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5026 // CHECK16: omp.inner.for.cond: 5027 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5028 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 5029 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 5030 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5031 // CHECK16: omp.inner.for.cond.cleanup: 5032 // CHECK16-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5033 // CHECK16: omp.inner.for.body: 5034 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5035 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 5036 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5037 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 5038 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7 5039 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 5040 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP6]] 5041 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 5042 // CHECK16-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7 5043 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 5044 // CHECK16-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP8]] 5045 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8* 5046 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[TMP7]] to i8* 5047 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group !7 5048 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5049 // CHECK16: omp.body.continue: 5050 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5051 // CHECK16: omp.inner.for.inc: 5052 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5053 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1 5054 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 5055 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 5056 // CHECK16: omp.inner.for.end: 5057 // CHECK16-NEXT: store i32 2, i32* [[I]], align 4 5058 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5059 // CHECK16-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 5060 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 5061 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5062 // CHECK16: arraydestroy.body: 5063 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5064 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5065 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5066 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 5067 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 5068 // CHECK16: arraydestroy.done10: 5069 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 5070 // CHECK16-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5071 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2 5072 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 5073 // CHECK16: arraydestroy.body12: 5074 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi %struct.S.0* [ [[TMP13]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 5075 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 5076 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]] 5077 // CHECK16-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 5078 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 5079 // CHECK16: arraydestroy.done16: 5080 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5081 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 5082 // CHECK16-NEXT: ret i32 [[TMP14]] 5083 // 5084 // 5085 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5086 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5087 // CHECK16-NEXT: entry: 5088 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5089 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5090 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5091 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5092 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 5093 // CHECK16-NEXT: ret void 5094 // 5095 // 5096 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5097 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5098 // CHECK16-NEXT: entry: 5099 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5100 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5101 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5102 // CHECK16-NEXT: ret void 5103 // 5104 // 5105 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5106 // CHECK16-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5107 // CHECK16-NEXT: entry: 5108 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5109 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5110 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5111 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5112 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5113 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5114 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5115 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 5116 // CHECK16-NEXT: ret void 5117 // 5118 // 5119 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5120 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5121 // CHECK16-NEXT: entry: 5122 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5123 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5124 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5125 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5126 // CHECK16-NEXT: ret void 5127 // 5128 // 5129 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5130 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5131 // CHECK16-NEXT: entry: 5132 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5133 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5134 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5135 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5136 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5137 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5138 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 5139 // CHECK16-NEXT: ret void 5140 // 5141 // 5142 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5143 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5144 // CHECK16-NEXT: entry: 5145 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5146 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5147 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5148 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5149 // CHECK16-NEXT: ret void 5150 // 5151 // 5152 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5153 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5154 // CHECK16-NEXT: entry: 5155 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5156 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5157 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5158 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5159 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 5160 // CHECK16-NEXT: ret void 5161 // 5162 // 5163 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5164 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5165 // CHECK16-NEXT: entry: 5166 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5167 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5168 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5169 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5170 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5171 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5172 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5173 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5174 // CHECK16-NEXT: ret void 5175 // 5176 // 5177 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5178 // CHECK16-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5179 // CHECK16-NEXT: entry: 5180 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5181 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5182 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5183 // CHECK16-NEXT: ret void 5184 // 5185