1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 14 15 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 21 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 25 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 28 // expected-no-diagnostics 29 #ifndef HEADER 30 #define HEADER 31 32 template <class T> 33 struct S { 34 T f; 35 S(T a) : f(a) {} 36 S() : f() {} 37 operator T() { return T(); } 38 ~S() {} 39 }; 40 41 template <typename T> 42 T tmain() { 43 S<T> test; 44 T t_var = T(); 45 T vec[] = {1, 2}; 46 S<T> s_arr[] = {1, 2}; 47 S<T> &var = test; 48 #pragma omp target 49 #pragma omp teams 50 #pragma omp distribute parallel for simd firstprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams 69 #pragma omp distribute parallel for simd firstprivate(g, g1, svar, sfvar) 70 for (int i = 0; i < 2; ++i) { 71 72 // addr alloca's 73 74 // private alloca's 75 76 // transfer input parameters into addr alloca's 77 78 // init private alloca's with addr alloca's 79 // g 80 81 // g1 82 83 // svar 84 85 // sfvar 86 87 // pass firstprivate parameters to parallel outlined function 88 // g 89 90 // g1 91 92 // svar 93 94 // sfvar 95 96 97 98 // skip initial params 99 100 // addr alloca's 101 102 // private alloca's (only for 32-bit) 103 104 // transfer input parameters into addr alloca's 105 106 // prepare parameters for lambda 107 // g 108 109 // g1 110 111 // svar 112 113 // sfvar 114 115 g = 1; 116 g1 = 1; 117 svar = 3; 118 sfvar = 4.0; 119 120 // pass params to inner lambda 121 [&]() { 122 g = 2; 123 g1 = 2; 124 svar = 4; 125 sfvar = 8.0; 126 127 }(); 128 } 129 }(); 130 return 0; 131 #else 132 S<float> test; 133 int t_var = 0; 134 int vec[] = {1, 2}; 135 S<float> s_arr[] = {1, 2}; 136 S<float> &var = test; 137 138 #pragma omp target 139 #pragma omp teams 140 #pragma omp distribute parallel for simd firstprivate(t_var, vec, s_arr, s_arr, var, var, svar) 141 for (int i = 0; i < 2; ++i) { 142 vec[i] = t_var; 143 s_arr[i] = var; 144 } 145 return tmain<int>(); 146 #endif 147 } 148 149 150 151 152 // addr alloca's 153 154 // skip loop alloca's 155 156 // private alloca's 157 158 159 // init addr alloca's with input values 160 161 // init private alloca's with addr alloca's 162 // t-var 163 164 // vec 165 166 // s_arr 167 168 // var 169 170 // svar 171 172 // pass private alloca's to fork 173 // not dag to distinguish with S_VAR_CAST 174 175 // call destructors: var.. 176 177 // ..and s_arr 178 179 180 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for. 181 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' 182 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' 183 // in combination 184 185 // addr alloca's 186 187 // skip loop alloca's 188 189 // private alloca's 190 191 192 // init addr alloca's with input values 193 194 // init private alloca's with addr alloca's 195 // vec 196 197 // s_arr 198 199 // var 200 201 202 // call destructors: var.. 203 204 // ..and s_arr 205 206 207 // template tmain with S_INT_TY 208 209 210 211 // addr alloca's 212 213 // skip loop alloca's 214 215 // private alloca's 216 217 218 // init addr alloca's with input values 219 220 // init private alloca's with addr alloca's 221 // t-var 222 223 // vec 224 225 // s_arr 226 227 // var 228 229 // pass private alloca's to fork 230 // not dag to distinguish with S_VAR_CAST 231 232 // call destructors: var.. 233 234 // ..and s_arr 235 236 237 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for. 238 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel' 239 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for' 240 // in combination 241 242 // addr alloca's 243 244 // skip loop alloca's 245 246 // private alloca's 247 248 249 // init addr alloca's with input values 250 251 // init private alloca's with addr alloca's 252 // vec 253 254 // s_arr 255 256 // var 257 258 259 // call destructors: var.. 260 261 // ..and s_arr 262 263 264 #endif 265 // CHECK1-LABEL: define {{[^@]+}}@main 266 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 267 // CHECK1-NEXT: entry: 268 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 269 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 270 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 271 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 272 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 273 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 274 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 275 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8 276 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 277 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 278 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 279 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 280 // CHECK1-NEXT: ret i32 0 281 // 282 // 283 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 284 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 285 // CHECK1-NEXT: entry: 286 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 287 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 288 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 289 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 290 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 291 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 292 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 293 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 294 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 295 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 296 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 297 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 298 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 299 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 300 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 301 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 302 // CHECK1-NEXT: ret void 303 // 304 // 305 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 306 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 307 // CHECK1-NEXT: entry: 308 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 309 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 310 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 311 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 312 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 313 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 314 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 315 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 316 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 317 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 323 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 324 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 325 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 326 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 327 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 329 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 330 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 331 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 332 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 333 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 334 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 335 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 336 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 337 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 338 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 339 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 340 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 341 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 342 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 343 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 344 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 345 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 346 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 347 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 348 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 349 // CHECK1-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 350 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8 351 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 352 // CHECK1-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8 353 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8 354 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 356 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 357 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 358 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 359 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 360 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 361 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 362 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 363 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 364 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 365 // CHECK1: cond.true: 366 // CHECK1-NEXT: br label [[COND_END:%.*]] 367 // CHECK1: cond.false: 368 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 369 // CHECK1-NEXT: br label [[COND_END]] 370 // CHECK1: cond.end: 371 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 372 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 373 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 374 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 375 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 376 // CHECK1: omp.inner.for.cond: 377 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 378 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 379 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 380 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 381 // CHECK1: omp.inner.for.body: 382 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4 383 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 384 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 385 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 386 // CHECK1-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !4 387 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double* 388 // CHECK1-NEXT: store double [[TMP21]], double* [[CONV]], align 8, !llvm.access.group !4 389 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8, !llvm.access.group !4 390 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 391 // CHECK1-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8, !llvm.access.group !4 392 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double* 393 // CHECK1-NEXT: store double [[TMP24]], double* [[CONV9]], align 8, !llvm.access.group !4 394 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8, !llvm.access.group !4 395 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !4 396 // CHECK1-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 397 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4, !llvm.access.group !4 398 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !4 399 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !4 400 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 401 // CHECK1-NEXT: store float [[TMP28]], float* [[CONV11]], align 4, !llvm.access.group !4 402 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8, !llvm.access.group !4 403 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]]), !llvm.access.group !4 404 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 405 // CHECK1: omp.inner.for.inc: 406 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 407 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4 408 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 409 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 410 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 411 // CHECK1: omp.inner.for.end: 412 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 413 // CHECK1: omp.loop.exit: 414 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 415 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 416 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 417 // CHECK1-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 418 // CHECK1: .omp.final.then: 419 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 420 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 421 // CHECK1: .omp.final.done: 422 // CHECK1-NEXT: ret void 423 // 424 // 425 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 426 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 427 // CHECK1-NEXT: entry: 428 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 429 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 430 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 431 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 432 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 433 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 434 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 435 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 436 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 437 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 439 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 440 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 441 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 442 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 443 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 444 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 445 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 446 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 447 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 448 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 449 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 450 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 451 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 452 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 453 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 454 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 455 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 456 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 457 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 458 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 459 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 460 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 461 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32 462 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 463 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32 464 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4 466 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 467 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 468 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 469 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 470 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 471 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 472 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 473 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 474 // CHECK1: cond.true: 475 // CHECK1-NEXT: br label [[COND_END:%.*]] 476 // CHECK1: cond.false: 477 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 478 // CHECK1-NEXT: br label [[COND_END]] 479 // CHECK1: cond.end: 480 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 481 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 482 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 483 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 485 // CHECK1: omp.inner.for.cond: 486 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 487 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 488 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 489 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 490 // CHECK1: omp.inner.for.body: 491 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 492 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 493 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 494 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 495 // CHECK1-NEXT: store double 1.000000e+00, double* [[CONV]], align 8, !llvm.access.group !8 496 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8, !llvm.access.group !8 497 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8, !llvm.access.group !8 498 // CHECK1-NEXT: store i32 3, i32* [[CONV2]], align 4, !llvm.access.group !8 499 // CHECK1-NEXT: store float 4.000000e+00, float* [[CONV3]], align 4, !llvm.access.group !8 500 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 501 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP11]], align 8, !llvm.access.group !8 502 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 503 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8, !llvm.access.group !8 504 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8, !llvm.access.group !8 505 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 506 // CHECK1-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8, !llvm.access.group !8 507 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 508 // CHECK1-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8, !llvm.access.group !8 509 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !8 510 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 511 // CHECK1: omp.body.continue: 512 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 513 // CHECK1: omp.inner.for.inc: 514 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 515 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 516 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 517 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 518 // CHECK1: omp.inner.for.end: 519 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 520 // CHECK1: omp.loop.exit: 521 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 522 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 523 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 524 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 525 // CHECK1: .omp.final.then: 526 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4 527 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 528 // CHECK1: .omp.final.done: 529 // CHECK1-NEXT: ret void 530 // 531 // 532 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 533 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 534 // CHECK1-NEXT: entry: 535 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 536 // CHECK1-NEXT: ret void 537 // 538 // 539 // CHECK2-LABEL: define {{[^@]+}}@main 540 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 541 // CHECK2-NEXT: entry: 542 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 543 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 544 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 545 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 546 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 547 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 548 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 549 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8 550 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 551 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 552 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 553 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 554 // CHECK2-NEXT: ret i32 0 555 // 556 // 557 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 558 // CHECK2-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 559 // CHECK2-NEXT: entry: 560 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 561 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 562 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 563 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 564 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 565 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 566 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 567 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 568 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 569 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 570 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 571 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 572 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 573 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 574 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8 575 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]]) 576 // CHECK2-NEXT: ret void 577 // 578 // 579 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 580 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 581 // CHECK2-NEXT: entry: 582 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 583 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 584 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8 585 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8 586 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 587 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8 588 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 589 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 590 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 591 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 592 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 593 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 594 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 595 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 596 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8 597 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8 598 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8 599 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 600 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 601 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 602 // CHECK2-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 603 // CHECK2-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 604 // CHECK2-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 605 // CHECK2-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 606 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 607 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 608 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8 609 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8 610 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 611 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8 612 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8 613 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8 614 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 615 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8 616 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8 617 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8 618 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8 619 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 620 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 621 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 622 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 623 // CHECK2-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 624 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8 625 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8 626 // CHECK2-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8 627 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8 628 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8 629 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 630 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 631 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 632 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 633 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 634 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 635 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 636 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 637 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 638 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 639 // CHECK2: cond.true: 640 // CHECK2-NEXT: br label [[COND_END:%.*]] 641 // CHECK2: cond.false: 642 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 643 // CHECK2-NEXT: br label [[COND_END]] 644 // CHECK2: cond.end: 645 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 646 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 647 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 648 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 649 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 650 // CHECK2: omp.inner.for.cond: 651 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 652 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 653 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 654 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 655 // CHECK2: omp.inner.for.body: 656 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4 657 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 658 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4 659 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 660 // CHECK2-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8, !llvm.access.group !4 661 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double* 662 // CHECK2-NEXT: store double [[TMP21]], double* [[CONV]], align 8, !llvm.access.group !4 663 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8, !llvm.access.group !4 664 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8, !llvm.access.group !4 665 // CHECK2-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8, !llvm.access.group !4 666 // CHECK2-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double* 667 // CHECK2-NEXT: store double [[TMP24]], double* [[CONV9]], align 8, !llvm.access.group !4 668 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8, !llvm.access.group !4 669 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !4 670 // CHECK2-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 671 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4, !llvm.access.group !4 672 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !4 673 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !4 674 // CHECK2-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* 675 // CHECK2-NEXT: store float [[TMP28]], float* [[CONV11]], align 4, !llvm.access.group !4 676 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8, !llvm.access.group !4 677 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]]), !llvm.access.group !4 678 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 679 // CHECK2: omp.inner.for.inc: 680 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 681 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4 682 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 683 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 684 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 685 // CHECK2: omp.inner.for.end: 686 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 687 // CHECK2: omp.loop.exit: 688 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 689 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 690 // CHECK2-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 691 // CHECK2-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 692 // CHECK2: .omp.final.then: 693 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 694 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 695 // CHECK2: .omp.final.done: 696 // CHECK2-NEXT: ret void 697 // 698 // 699 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 700 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 701 // CHECK2-NEXT: entry: 702 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 703 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 704 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 705 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 706 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 707 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 708 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 709 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 710 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 711 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 712 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 713 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 714 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 715 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 716 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 717 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 718 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 719 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 720 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 721 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 722 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 723 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8 724 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8 725 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 726 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8 727 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double* 728 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double* 729 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 730 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float* 731 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8 732 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 733 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 734 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 735 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32 736 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 737 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32 738 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4 739 // CHECK2-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4 740 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 741 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 742 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 744 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 745 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 746 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 747 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 748 // CHECK2: cond.true: 749 // CHECK2-NEXT: br label [[COND_END:%.*]] 750 // CHECK2: cond.false: 751 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 752 // CHECK2-NEXT: br label [[COND_END]] 753 // CHECK2: cond.end: 754 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 755 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 756 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 757 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 758 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 759 // CHECK2: omp.inner.for.cond: 760 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 761 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 762 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 763 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 764 // CHECK2: omp.inner.for.body: 765 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 766 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 767 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 768 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 769 // CHECK2-NEXT: store double 1.000000e+00, double* [[CONV]], align 8, !llvm.access.group !8 770 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8, !llvm.access.group !8 771 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8, !llvm.access.group !8 772 // CHECK2-NEXT: store i32 3, i32* [[CONV2]], align 4, !llvm.access.group !8 773 // CHECK2-NEXT: store float 4.000000e+00, float* [[CONV3]], align 4, !llvm.access.group !8 774 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 775 // CHECK2-NEXT: store double* [[CONV]], double** [[TMP11]], align 8, !llvm.access.group !8 776 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 777 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8, !llvm.access.group !8 778 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8, !llvm.access.group !8 779 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 780 // CHECK2-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8, !llvm.access.group !8 781 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 782 // CHECK2-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8, !llvm.access.group !8 783 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !8 784 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 785 // CHECK2: omp.body.continue: 786 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 787 // CHECK2: omp.inner.for.inc: 788 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 789 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 790 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 791 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 792 // CHECK2: omp.inner.for.end: 793 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 794 // CHECK2: omp.loop.exit: 795 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 796 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 797 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 798 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 799 // CHECK2: .omp.final.then: 800 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4 801 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 802 // CHECK2: .omp.final.done: 803 // CHECK2-NEXT: ret void 804 // 805 // 806 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 807 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 808 // CHECK2-NEXT: entry: 809 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 810 // CHECK2-NEXT: ret void 811 // 812 // 813 // CHECK3-LABEL: define {{[^@]+}}@main 814 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 815 // CHECK3-NEXT: entry: 816 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 817 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 818 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 819 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 820 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 821 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 822 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 823 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4 824 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 825 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 826 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 827 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 828 // CHECK3-NEXT: ret i32 0 829 // 830 // 831 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 832 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 833 // CHECK3-NEXT: entry: 834 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 835 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 836 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 837 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 838 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 839 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 840 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 841 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 842 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 843 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 844 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 845 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 846 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 847 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 848 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 849 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 850 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 851 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8 852 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 853 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 854 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8 855 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 856 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 857 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 858 // CHECK3-NEXT: ret void 859 // 860 // 861 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 862 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 863 // CHECK3-NEXT: entry: 864 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 865 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 866 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 867 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 868 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 869 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 870 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 871 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 872 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 873 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 874 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 875 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 876 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 877 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 878 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 879 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8 880 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 881 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 882 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 883 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 884 // CHECK3-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4 885 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 886 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 887 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 888 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 889 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 890 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 891 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 892 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 893 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 894 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 895 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 896 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 897 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 898 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 899 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 900 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 901 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 902 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 903 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 904 // CHECK3-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 905 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8 906 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 907 // CHECK3-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4 908 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8 909 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 910 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 911 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 912 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 913 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 914 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 915 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 916 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 917 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 918 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 919 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 920 // CHECK3: cond.true: 921 // CHECK3-NEXT: br label [[COND_END:%.*]] 922 // CHECK3: cond.false: 923 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 924 // CHECK3-NEXT: br label [[COND_END]] 925 // CHECK3: cond.end: 926 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 927 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 928 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 929 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 930 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 931 // CHECK3: omp.inner.for.cond: 932 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 933 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 934 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 935 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 936 // CHECK3: omp.inner.for.body: 937 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 938 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 939 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 940 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4, !llvm.access.group !5 941 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double* 942 // CHECK3-NEXT: store double [[TMP20]], double* [[CONV]], align 4, !llvm.access.group !5 943 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4, !llvm.access.group !5 944 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !5 945 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5 946 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5 947 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !5 948 // CHECK3-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 949 // CHECK3-NEXT: store float [[TMP24]], float* [[CONV9]], align 4, !llvm.access.group !5 950 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4, !llvm.access.group !5 951 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]]), !llvm.access.group !5 952 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 953 // CHECK3: omp.inner.for.inc: 954 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 955 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 956 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 957 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 958 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 959 // CHECK3: omp.inner.for.end: 960 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 961 // CHECK3: omp.loop.exit: 962 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 963 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 964 // CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 965 // CHECK3-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 966 // CHECK3: .omp.final.then: 967 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 968 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 969 // CHECK3: .omp.final.done: 970 // CHECK3-NEXT: ret void 971 // 972 // 973 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 974 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 975 // CHECK3-NEXT: entry: 976 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 977 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 978 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 979 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 980 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 981 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4 982 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 983 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 984 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 985 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 986 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 987 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 988 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 989 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 990 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 991 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 992 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 993 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 994 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 995 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 996 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 997 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 998 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 999 // CHECK3-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4 1000 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1001 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1002 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1003 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double* 1004 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1005 // CHECK3-NEXT: store double* [[CONV]], double** [[TMP]], align 4 1006 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1007 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1008 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1009 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1010 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1011 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1012 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1013 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1014 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8 1015 // CHECK3-NEXT: store double [[TMP3]], double* [[G3]], align 8 1016 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1017 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1018 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1019 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1020 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1021 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1022 // CHECK3: cond.true: 1023 // CHECK3-NEXT: br label [[COND_END:%.*]] 1024 // CHECK3: cond.false: 1025 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1026 // CHECK3-NEXT: br label [[COND_END]] 1027 // CHECK3: cond.end: 1028 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1029 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1030 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1031 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1032 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1033 // CHECK3: omp.inner.for.cond: 1034 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1035 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1036 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1037 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1038 // CHECK3: omp.inner.for.body: 1039 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1040 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1041 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1042 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1043 // CHECK3-NEXT: store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !9 1044 // CHECK3-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4, !llvm.access.group !9 1045 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4, !llvm.access.group !9 1046 // CHECK3-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4, !llvm.access.group !9 1047 // CHECK3-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4, !llvm.access.group !9 1048 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1049 // CHECK3-NEXT: store double* [[G3]], double** [[TMP13]], align 4, !llvm.access.group !9 1050 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1051 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4, !llvm.access.group !9 1052 // CHECK3-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4, !llvm.access.group !9 1053 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1054 // CHECK3-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4, !llvm.access.group !9 1055 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1056 // CHECK3-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4, !llvm.access.group !9 1057 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !9 1058 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1059 // CHECK3: omp.body.continue: 1060 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1061 // CHECK3: omp.inner.for.inc: 1062 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1063 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1 1064 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1065 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1066 // CHECK3: omp.inner.for.end: 1067 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1068 // CHECK3: omp.loop.exit: 1069 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1070 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1071 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1072 // CHECK3-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1073 // CHECK3: .omp.final.then: 1074 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4 1075 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1076 // CHECK3: .omp.final.done: 1077 // CHECK3-NEXT: ret void 1078 // 1079 // 1080 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1081 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1082 // CHECK3-NEXT: entry: 1083 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1084 // CHECK3-NEXT: ret void 1085 // 1086 // 1087 // CHECK4-LABEL: define {{[^@]+}}@main 1088 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1089 // CHECK4-NEXT: entry: 1090 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1091 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 1092 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 1093 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1094 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1095 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 1096 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1097 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4 1098 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1099 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1100 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1101 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1102 // CHECK4-NEXT: ret i32 0 1103 // 1104 // 1105 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 1106 // CHECK4-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1107 // CHECK4-NEXT: entry: 1108 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1109 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1110 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1111 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 1112 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1113 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8 1114 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8 1115 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4 1116 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1117 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1118 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1119 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1120 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1121 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1122 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1123 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1124 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8 1125 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8 1126 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4 1127 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4 1128 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8 1129 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4 1130 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4 1131 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]]) 1132 // CHECK4-NEXT: ret void 1133 // 1134 // 1135 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1136 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 1137 // CHECK4-NEXT: entry: 1138 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1139 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1140 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1141 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 1142 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 1143 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4 1144 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1145 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 1146 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1147 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1148 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1149 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1150 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1151 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1152 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 1153 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8 1154 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4 1155 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 1156 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 1157 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1158 // CHECK4-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4 1159 // CHECK4-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1160 // CHECK4-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 1161 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1162 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1163 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1164 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4 1165 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 1166 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4 1167 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1168 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4 1169 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 1170 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4 1171 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4 1172 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4 1173 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4 1174 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1175 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1176 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1177 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1178 // CHECK4-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8 1179 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8 1180 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4 1181 // CHECK4-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4 1182 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8 1183 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4 1184 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4 1185 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4 1186 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4 1187 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4 1188 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1189 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1190 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1191 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1192 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 1193 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1194 // CHECK4: cond.true: 1195 // CHECK4-NEXT: br label [[COND_END:%.*]] 1196 // CHECK4: cond.false: 1197 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1198 // CHECK4-NEXT: br label [[COND_END]] 1199 // CHECK4: cond.end: 1200 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1201 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1202 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1203 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1204 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1205 // CHECK4: omp.inner.for.cond: 1206 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1207 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1208 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1209 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1210 // CHECK4: omp.inner.for.body: 1211 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 1212 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1213 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4, !llvm.access.group !5 1214 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4, !llvm.access.group !5 1215 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double* 1216 // CHECK4-NEXT: store double [[TMP20]], double* [[CONV]], align 4, !llvm.access.group !5 1217 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4, !llvm.access.group !5 1218 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4, !llvm.access.group !5 1219 // CHECK4-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5 1220 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5 1221 // CHECK4-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4, !llvm.access.group !5 1222 // CHECK4-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* 1223 // CHECK4-NEXT: store float [[TMP24]], float* [[CONV9]], align 4, !llvm.access.group !5 1224 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4, !llvm.access.group !5 1225 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]]), !llvm.access.group !5 1226 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1227 // CHECK4: omp.inner.for.inc: 1228 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1229 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 1230 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 1231 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1232 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1233 // CHECK4: omp.inner.for.end: 1234 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1235 // CHECK4: omp.loop.exit: 1236 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]]) 1237 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1238 // CHECK4-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 1239 // CHECK4-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1240 // CHECK4: .omp.final.then: 1241 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 1242 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 1243 // CHECK4: .omp.final.done: 1244 // CHECK4-NEXT: ret void 1245 // 1246 // 1247 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1248 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 1249 // CHECK4-NEXT: entry: 1250 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1251 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1252 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1253 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1254 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 1255 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4 1256 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1257 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 1258 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 1259 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1260 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1261 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1262 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1263 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1264 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1265 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8 1266 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1267 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 1268 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1269 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1270 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1271 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1272 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4 1273 // CHECK4-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4 1274 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 1275 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4 1276 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4 1277 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double* 1278 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float* 1279 // CHECK4-NEXT: store double* [[CONV]], double** [[TMP]], align 4 1280 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1281 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1282 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1283 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1284 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1285 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1286 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1287 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1288 // CHECK4-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8 1289 // CHECK4-NEXT: store double [[TMP3]], double* [[G3]], align 8 1290 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1291 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 1292 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1293 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1294 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1295 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1296 // CHECK4: cond.true: 1297 // CHECK4-NEXT: br label [[COND_END:%.*]] 1298 // CHECK4: cond.false: 1299 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1300 // CHECK4-NEXT: br label [[COND_END]] 1301 // CHECK4: cond.end: 1302 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1303 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1304 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1305 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1306 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1307 // CHECK4: omp.inner.for.cond: 1308 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1309 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1310 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1311 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1312 // CHECK4: omp.inner.for.body: 1313 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1314 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1315 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1316 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1317 // CHECK4-NEXT: store double 1.000000e+00, double* [[G3]], align 8, !llvm.access.group !9 1318 // CHECK4-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4, !llvm.access.group !9 1319 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4, !llvm.access.group !9 1320 // CHECK4-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4, !llvm.access.group !9 1321 // CHECK4-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4, !llvm.access.group !9 1322 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1323 // CHECK4-NEXT: store double* [[G3]], double** [[TMP13]], align 4, !llvm.access.group !9 1324 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1325 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4, !llvm.access.group !9 1326 // CHECK4-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4, !llvm.access.group !9 1327 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1328 // CHECK4-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4, !llvm.access.group !9 1329 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1330 // CHECK4-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4, !llvm.access.group !9 1331 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !9 1332 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1333 // CHECK4: omp.body.continue: 1334 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1335 // CHECK4: omp.inner.for.inc: 1336 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1337 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1 1338 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1339 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1340 // CHECK4: omp.inner.for.end: 1341 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1342 // CHECK4: omp.loop.exit: 1343 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 1344 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1345 // CHECK4-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1346 // CHECK4-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1347 // CHECK4: .omp.final.then: 1348 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4 1349 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 1350 // CHECK4: .omp.final.done: 1351 // CHECK4-NEXT: ret void 1352 // 1353 // 1354 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1355 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 1356 // CHECK4-NEXT: entry: 1357 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1358 // CHECK4-NEXT: ret void 1359 // 1360 // 1361 // CHECK5-LABEL: define {{[^@]+}}@main 1362 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1363 // CHECK5-NEXT: entry: 1364 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1365 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 1366 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 1367 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 1368 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1369 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 1370 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1371 // CHECK5-NEXT: store double* [[G]], double** [[TMP0]], align 8 1372 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1373 // CHECK5-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8 1374 // CHECK5-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8 1375 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1376 // CHECK5-NEXT: ret i32 0 1377 // 1378 // 1379 // CHECK6-LABEL: define {{[^@]+}}@main 1380 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1381 // CHECK6-NEXT: entry: 1382 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1383 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 1384 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 4 1385 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1386 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1387 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 4 1388 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1389 // CHECK6-NEXT: store double* [[G]], double** [[TMP0]], align 4 1390 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1391 // CHECK6-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1392 // CHECK6-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1393 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1394 // CHECK6-NEXT: ret i32 0 1395 // 1396 // 1397 // CHECK7-LABEL: define {{[^@]+}}@main 1398 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1399 // CHECK7-NEXT: entry: 1400 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1401 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 1402 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 1403 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 1404 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1405 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 1406 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 1407 // CHECK7-NEXT: store double* [[G]], double** [[TMP0]], align 4 1408 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 1409 // CHECK7-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4 1410 // CHECK7-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4 1411 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 1412 // CHECK7-NEXT: ret i32 0 1413 // 1414 // 1415 // CHECK8-LABEL: define {{[^@]+}}@main 1416 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1417 // CHECK8-NEXT: entry: 1418 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1419 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 1420 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 8 1421 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1422 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1423 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1424 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1425 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1426 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1427 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1428 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1429 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 1430 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 1431 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 1432 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1433 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1434 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 8 1435 // CHECK8-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1436 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4 1437 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1438 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1439 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1440 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1441 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1442 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1443 // CHECK8-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1444 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 1445 // CHECK8-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 1446 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1447 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1448 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1449 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1450 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1451 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 1452 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1453 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 1454 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 1455 // CHECK8-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1456 // CHECK8-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1457 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1458 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1459 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1460 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1461 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 1462 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 1463 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1464 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 8 1465 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1466 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1467 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1468 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1469 // CHECK8-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 1470 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 1471 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1472 // CHECK8-NEXT: store i8* null, i8** [[TMP18]], align 8 1473 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1474 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 1475 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 1476 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1477 // CHECK8-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 1478 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 1479 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1480 // CHECK8-NEXT: store i8* null, i8** [[TMP23]], align 8 1481 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1482 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 1483 // CHECK8-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 1484 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1485 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 1486 // CHECK8-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 1487 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1488 // CHECK8-NEXT: store i8* null, i8** [[TMP28]], align 8 1489 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1490 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 1491 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 1492 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1493 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 1494 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 1495 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 1496 // CHECK8-NEXT: store i8* null, i8** [[TMP33]], align 8 1497 // CHECK8-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1498 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1499 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1500 // CHECK8-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1501 // CHECK8-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1502 // CHECK8-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1503 // CHECK8: omp_offload.failed: 1504 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1505 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 1506 // CHECK8: omp_offload.cont: 1507 // CHECK8-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1508 // CHECK8-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1509 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1510 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1511 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1512 // CHECK8: arraydestroy.body: 1513 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1514 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1515 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1516 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1517 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1518 // CHECK8: arraydestroy.done3: 1519 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1520 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 1521 // CHECK8-NEXT: ret i32 [[TMP39]] 1522 // 1523 // 1524 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1525 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1526 // CHECK8-NEXT: entry: 1527 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1528 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1529 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1530 // CHECK8-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1531 // CHECK8-NEXT: ret void 1532 // 1533 // 1534 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1535 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1536 // CHECK8-NEXT: entry: 1537 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1538 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1539 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1540 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1541 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1542 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1543 // CHECK8-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1544 // CHECK8-NEXT: ret void 1545 // 1546 // 1547 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 1548 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1549 // CHECK8-NEXT: entry: 1550 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1551 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1552 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1553 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1554 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1555 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1556 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1557 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1558 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1559 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1560 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1561 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1562 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1563 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1564 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1565 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1566 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1567 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1568 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 1569 // CHECK8-NEXT: ret void 1570 // 1571 // 1572 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. 1573 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1574 // CHECK8-NEXT: entry: 1575 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1576 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1577 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1578 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1579 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1580 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1581 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 1582 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1583 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1584 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1585 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1586 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1587 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1588 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1589 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1590 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1591 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1592 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1593 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1594 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 1595 // CHECK8-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1596 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1597 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1598 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 1599 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1600 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1601 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1602 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1603 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1604 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1605 // CHECK8-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 1606 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1607 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1608 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1609 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1610 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 1611 // CHECK8-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 1612 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1613 // CHECK8-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 1614 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1615 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1616 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1617 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1618 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 1619 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 1620 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 1621 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 1622 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 1623 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1624 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 1625 // CHECK8-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1626 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 1627 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1628 // CHECK8: omp.arraycpy.body: 1629 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1630 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1631 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1632 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1633 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 1634 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1635 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1636 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 1637 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1638 // CHECK8: omp.arraycpy.done6: 1639 // CHECK8-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 1640 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 1641 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 1642 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1643 // CHECK8-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 1644 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 1645 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 1646 // CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1647 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1648 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1649 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1650 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 1651 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1652 // CHECK8: cond.true: 1653 // CHECK8-NEXT: br label [[COND_END:%.*]] 1654 // CHECK8: cond.false: 1655 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1656 // CHECK8-NEXT: br label [[COND_END]] 1657 // CHECK8: cond.end: 1658 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 1659 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1660 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1661 // CHECK8-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 1662 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1663 // CHECK8: omp.inner.for.cond: 1664 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1665 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1666 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 1667 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1668 // CHECK8: omp.inner.for.cond.cleanup: 1669 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1670 // CHECK8: omp.inner.for.body: 1671 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 1672 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 1673 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 1674 // CHECK8-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 1675 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 1676 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1677 // CHECK8-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4, !llvm.access.group !5 1678 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !5 1679 // CHECK8-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !5 1680 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4, !llvm.access.group !5 1681 // CHECK8-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 1682 // CHECK8-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4, !llvm.access.group !5 1683 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !5 1684 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]]), !llvm.access.group !5 1685 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1686 // CHECK8: omp.inner.for.inc: 1687 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1688 // CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 1689 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] 1690 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 1691 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 1692 // CHECK8: omp.inner.for.end: 1693 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1694 // CHECK8: omp.loop.exit: 1695 // CHECK8-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1696 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 1697 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 1698 // CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1699 // CHECK8-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 1700 // CHECK8-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1701 // CHECK8: .omp.final.then: 1702 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4 1703 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] 1704 // CHECK8: .omp.final.done: 1705 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1706 // CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 1707 // CHECK8-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 1708 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1709 // CHECK8: arraydestroy.body: 1710 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1711 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1712 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1713 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1714 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1715 // CHECK8: arraydestroy.done13: 1716 // CHECK8-NEXT: ret void 1717 // 1718 // 1719 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 1720 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 1721 // CHECK8-NEXT: entry: 1722 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1723 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1724 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1725 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1726 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1727 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1728 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1729 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1730 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 1731 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1732 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1733 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1734 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1735 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1736 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1737 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1738 // CHECK8-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4 1739 // CHECK8-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4 1740 // CHECK8-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1741 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8 1742 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1743 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1744 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1745 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1746 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1747 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1748 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 1749 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1750 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1751 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 1752 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1753 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 1754 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1755 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 1756 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 1757 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 1758 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1759 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1760 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1761 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32 1762 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1763 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32 1764 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 1765 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1766 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1767 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1768 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8* 1769 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 1770 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 1771 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 1772 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 1773 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1774 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 1775 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1776 // CHECK8: omp.arraycpy.body: 1777 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1778 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1779 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 1780 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 1781 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 1782 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1783 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1784 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 1785 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 1786 // CHECK8: omp.arraycpy.done7: 1787 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1788 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8* 1789 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 1790 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1791 // CHECK8-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8 1792 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1793 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1794 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1795 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1796 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 1797 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1798 // CHECK8: cond.true: 1799 // CHECK8-NEXT: br label [[COND_END:%.*]] 1800 // CHECK8: cond.false: 1801 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1802 // CHECK8-NEXT: br label [[COND_END]] 1803 // CHECK8: cond.end: 1804 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1805 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1806 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1807 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 1808 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1809 // CHECK8: omp.inner.for.cond: 1810 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1811 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1812 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 1813 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1814 // CHECK8: omp.inner.for.cond.cleanup: 1815 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1816 // CHECK8: omp.inner.for.body: 1817 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1818 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 1819 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1820 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1821 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !9 1822 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1823 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 1824 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]] 1825 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1826 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8, !llvm.access.group !9 1827 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1828 // CHECK8-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64 1829 // CHECK8-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]] 1830 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 1831 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 1832 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false), !llvm.access.group !9 1833 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1834 // CHECK8: omp.body.continue: 1835 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1836 // CHECK8: omp.inner.for.inc: 1837 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1838 // CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1 1839 // CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1840 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1841 // CHECK8: omp.inner.for.end: 1842 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1843 // CHECK8: omp.loop.exit: 1844 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1845 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 1846 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 1847 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1848 // CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1849 // CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1850 // CHECK8: .omp.final.then: 1851 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4 1852 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] 1853 // CHECK8: .omp.final.done: 1854 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]] 1855 // CHECK8-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 1856 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 1857 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1858 // CHECK8: arraydestroy.body: 1859 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1860 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1861 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1862 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 1863 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 1864 // CHECK8: arraydestroy.done15: 1865 // CHECK8-NEXT: ret void 1866 // 1867 // 1868 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1869 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1870 // CHECK8-NEXT: entry: 1871 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1872 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1873 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1874 // CHECK8-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1875 // CHECK8-NEXT: ret void 1876 // 1877 // 1878 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1879 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat { 1880 // CHECK8-NEXT: entry: 1881 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1882 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1883 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1884 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1885 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1886 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1887 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1888 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1889 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 1890 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 1891 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 1892 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1893 // CHECK8-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1894 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4 1895 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1896 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1897 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1898 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 1899 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1900 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1901 // CHECK8-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1902 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 1903 // CHECK8-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 1904 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 1905 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 1906 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1907 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 1908 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1909 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1910 // CHECK8-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1911 // CHECK8-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1912 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1913 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 1914 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1915 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1916 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 1917 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1918 // CHECK8-NEXT: store i8* null, i8** [[TMP11]], align 8 1919 // CHECK8-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1920 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 1921 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 1922 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1923 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 1924 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 1925 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1926 // CHECK8-NEXT: store i8* null, i8** [[TMP16]], align 8 1927 // CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1928 // CHECK8-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 1929 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 1930 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1931 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 1932 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 1933 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1934 // CHECK8-NEXT: store i8* null, i8** [[TMP21]], align 8 1935 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1936 // CHECK8-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 1937 // CHECK8-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 1938 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1939 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 1940 // CHECK8-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 1941 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1942 // CHECK8-NEXT: store i8* null, i8** [[TMP26]], align 8 1943 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1944 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1945 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1946 // CHECK8-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1947 // CHECK8-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1948 // CHECK8-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1949 // CHECK8: omp_offload.failed: 1950 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 1951 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 1952 // CHECK8: omp_offload.cont: 1953 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 1954 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1955 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1956 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1957 // CHECK8: arraydestroy.body: 1958 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1959 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1960 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1961 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1962 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1963 // CHECK8: arraydestroy.done2: 1964 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1965 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 1966 // CHECK8-NEXT: ret i32 [[TMP32]] 1967 // 1968 // 1969 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1970 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1971 // CHECK8-NEXT: entry: 1972 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1973 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1974 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1975 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1976 // CHECK8-NEXT: store float 0.000000e+00, float* [[F]], align 4 1977 // CHECK8-NEXT: ret void 1978 // 1979 // 1980 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1981 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1982 // CHECK8-NEXT: entry: 1983 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1984 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1985 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1986 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1987 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1988 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1989 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1990 // CHECK8-NEXT: store float [[TMP0]], float* [[F]], align 4 1991 // CHECK8-NEXT: ret void 1992 // 1993 // 1994 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1995 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1996 // CHECK8-NEXT: entry: 1997 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1998 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1999 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2000 // CHECK8-NEXT: ret void 2001 // 2002 // 2003 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2004 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2005 // CHECK8-NEXT: entry: 2006 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2007 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2008 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2009 // CHECK8-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2010 // CHECK8-NEXT: ret void 2011 // 2012 // 2013 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2014 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2015 // CHECK8-NEXT: entry: 2016 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2017 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2018 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2019 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2020 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2021 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2022 // CHECK8-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2023 // CHECK8-NEXT: ret void 2024 // 2025 // 2026 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 2027 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2028 // CHECK8-NEXT: entry: 2029 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2030 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2031 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2032 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2033 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2034 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2035 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2036 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2037 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2038 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2039 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2040 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2041 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2042 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2043 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2044 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 2045 // CHECK8-NEXT: ret void 2046 // 2047 // 2048 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 2049 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2050 // CHECK8-NEXT: entry: 2051 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2052 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2053 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2054 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2055 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2056 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2057 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2058 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2059 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2060 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2061 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2062 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2063 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2064 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2065 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2066 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2067 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2068 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2069 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2070 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2071 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2072 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2073 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2074 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2075 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2076 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2077 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2078 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2079 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2080 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2081 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2082 // CHECK8-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 2083 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2084 // CHECK8-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 2085 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2086 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2087 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2088 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2089 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2090 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 2091 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2092 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2093 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 2094 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2095 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 2096 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2097 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 2098 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2099 // CHECK8: omp.arraycpy.body: 2100 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2101 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2102 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2103 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2104 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 2105 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2106 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2107 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 2108 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2109 // CHECK8: omp.arraycpy.done6: 2110 // CHECK8-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 2111 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2112 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2113 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 2114 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2115 // CHECK8-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2116 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2117 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2118 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2119 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 2120 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2121 // CHECK8: cond.true: 2122 // CHECK8-NEXT: br label [[COND_END:%.*]] 2123 // CHECK8: cond.false: 2124 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2125 // CHECK8-NEXT: br label [[COND_END]] 2126 // CHECK8: cond.end: 2127 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2128 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2129 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2130 // CHECK8-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 2131 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2132 // CHECK8: omp.inner.for.cond: 2133 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2134 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 2135 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2136 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2137 // CHECK8: omp.inner.for.cond.cleanup: 2138 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2139 // CHECK8: omp.inner.for.body: 2140 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14 2141 // CHECK8-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 2142 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 2143 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 2144 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !14 2145 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2146 // CHECK8-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4, !llvm.access.group !14 2147 // CHECK8-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !14 2148 // CHECK8-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !14 2149 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]]), !llvm.access.group !14 2150 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2151 // CHECK8: omp.inner.for.inc: 2152 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2153 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14 2154 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 2155 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2156 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2157 // CHECK8: omp.inner.for.end: 2158 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2159 // CHECK8: omp.loop.exit: 2160 // CHECK8-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2161 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 2162 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 2163 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2164 // CHECK8-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 2165 // CHECK8-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2166 // CHECK8: .omp.final.then: 2167 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4 2168 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] 2169 // CHECK8: .omp.final.done: 2170 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2171 // CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2172 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 2173 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2174 // CHECK8: arraydestroy.body: 2175 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2176 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2177 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2178 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 2179 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 2180 // CHECK8: arraydestroy.done11: 2181 // CHECK8-NEXT: ret void 2182 // 2183 // 2184 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 2185 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2186 // CHECK8-NEXT: entry: 2187 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2188 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2189 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2190 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2191 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2192 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2193 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2194 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2195 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2196 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2197 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2198 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2199 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2200 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2201 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2202 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2203 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2204 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2205 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 2206 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2207 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2208 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2209 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2210 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2211 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2212 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2213 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2214 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2215 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2216 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2217 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2218 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2219 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 2220 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2221 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2222 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2223 // CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32 2224 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2225 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32 2226 // CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4 2227 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2228 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2229 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2230 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2231 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2232 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 2233 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2234 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 2235 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2236 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 2237 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2238 // CHECK8: omp.arraycpy.body: 2239 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2240 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2241 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2242 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2243 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 2244 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2245 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2246 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 2247 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2248 // CHECK8: omp.arraycpy.done6: 2249 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2250 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 2251 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 2252 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 2253 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 2254 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2255 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2256 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2257 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2258 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 2259 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2260 // CHECK8: cond.true: 2261 // CHECK8-NEXT: br label [[COND_END:%.*]] 2262 // CHECK8: cond.false: 2263 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2264 // CHECK8-NEXT: br label [[COND_END]] 2265 // CHECK8: cond.end: 2266 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2267 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2268 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2269 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2270 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2271 // CHECK8: omp.inner.for.cond: 2272 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2273 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 2274 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2275 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2276 // CHECK8: omp.inner.for.cond.cleanup: 2277 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2278 // CHECK8: omp.inner.for.body: 2279 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2280 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2281 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2282 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17 2283 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !17 2284 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 2285 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2286 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 2287 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 2288 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !17 2289 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 2290 // CHECK8-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64 2291 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 2292 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 2293 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 2294 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false), !llvm.access.group !17 2295 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2296 // CHECK8: omp.body.continue: 2297 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2298 // CHECK8: omp.inner.for.inc: 2299 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2300 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 2301 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 2302 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 2303 // CHECK8: omp.inner.for.end: 2304 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2305 // CHECK8: omp.loop.exit: 2306 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2307 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 2308 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 2309 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2310 // CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2311 // CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2312 // CHECK8: .omp.final.then: 2313 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4 2314 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] 2315 // CHECK8: .omp.final.done: 2316 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2317 // CHECK8-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 2318 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 2319 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2320 // CHECK8: arraydestroy.body: 2321 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2322 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2323 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2324 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2325 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2326 // CHECK8: arraydestroy.done14: 2327 // CHECK8-NEXT: ret void 2328 // 2329 // 2330 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2331 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2332 // CHECK8-NEXT: entry: 2333 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2334 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2335 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2336 // CHECK8-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2337 // CHECK8-NEXT: ret void 2338 // 2339 // 2340 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2341 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2342 // CHECK8-NEXT: entry: 2343 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2344 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2345 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2346 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2347 // CHECK8-NEXT: store i32 0, i32* [[F]], align 4 2348 // CHECK8-NEXT: ret void 2349 // 2350 // 2351 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2352 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2353 // CHECK8-NEXT: entry: 2354 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2355 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2356 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2357 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2358 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2359 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2360 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2361 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2362 // CHECK8-NEXT: ret void 2363 // 2364 // 2365 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2366 // CHECK8-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2367 // CHECK8-NEXT: entry: 2368 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2369 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2370 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2371 // CHECK8-NEXT: ret void 2372 // 2373 // 2374 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2375 // CHECK8-SAME: () #[[ATTR6:[0-9]+]] { 2376 // CHECK8-NEXT: entry: 2377 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) 2378 // CHECK8-NEXT: ret void 2379 // 2380 // 2381 // CHECK9-LABEL: define {{[^@]+}}@main 2382 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 2383 // CHECK9-NEXT: entry: 2384 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2385 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 2386 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 2387 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2388 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2389 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2390 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2391 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 2392 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2393 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2394 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 2395 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 2396 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 2397 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 2398 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2399 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2400 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 2401 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2402 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 2403 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2404 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 2405 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 2406 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 2407 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 2408 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2409 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 2410 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 2411 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 2412 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2413 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2414 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2415 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2416 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2417 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 2418 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 2419 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4 2420 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 2421 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2422 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2423 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2424 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2425 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2426 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2427 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64* 2428 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8 2429 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2430 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 2431 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2432 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2433 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2434 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2435 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 2436 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8 2437 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2438 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8 2439 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2440 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 2441 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8 2442 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2443 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 2444 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8 2445 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2446 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8 2447 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2448 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 2449 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8 2450 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2451 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 2452 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8 2453 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2454 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8 2455 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 2456 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64* 2457 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8 2458 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 2459 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64* 2460 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8 2461 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 2462 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8 2463 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2464 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2465 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2466 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2467 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2468 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2469 // CHECK9: omp_offload.failed: 2470 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 2471 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2472 // CHECK9: omp_offload.cont: 2473 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 2474 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2475 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2476 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2477 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2478 // CHECK9: arraydestroy.body: 2479 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2480 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2481 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2482 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2483 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2484 // CHECK9: arraydestroy.done3: 2485 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2486 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 2487 // CHECK9-NEXT: ret i32 [[TMP39]] 2488 // 2489 // 2490 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2491 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2492 // CHECK9-NEXT: entry: 2493 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2494 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2495 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2496 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2497 // CHECK9-NEXT: ret void 2498 // 2499 // 2500 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2501 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2502 // CHECK9-NEXT: entry: 2503 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2504 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2505 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2506 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2507 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2508 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2509 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2510 // CHECK9-NEXT: ret void 2511 // 2512 // 2513 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 2514 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 2515 // CHECK9-NEXT: entry: 2516 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2517 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2518 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2519 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2520 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 2521 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2522 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2523 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2524 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2525 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2526 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 2527 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2528 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2529 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2530 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2531 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 2532 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 2533 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2534 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]]) 2535 // CHECK9-NEXT: ret void 2536 // 2537 // 2538 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2539 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 2540 // CHECK9-NEXT: entry: 2541 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2542 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2543 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2544 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2545 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2546 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2547 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8 2548 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2549 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 2550 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2551 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2552 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2553 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2554 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2555 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2556 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2557 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2558 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2559 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2560 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8 2561 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 2562 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2563 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2564 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 2565 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2566 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2567 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2568 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2569 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2570 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2571 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8 2572 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2573 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2574 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2575 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2576 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8 2577 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8 2578 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2579 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8 2580 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2581 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2582 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2583 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2584 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 2585 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 2586 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 2587 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 2588 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false) 2589 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2590 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 2591 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2592 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 2593 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2594 // CHECK9: omp.arraycpy.body: 2595 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2596 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2597 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2598 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2599 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false) 2600 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2601 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2602 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 2603 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 2604 // CHECK9: omp.arraycpy.done6: 2605 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 2606 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 2607 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 2608 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 2609 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8 2610 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 2611 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 2612 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2613 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2614 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2615 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2616 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 2617 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2618 // CHECK9: cond.true: 2619 // CHECK9-NEXT: br label [[COND_END:%.*]] 2620 // CHECK9: cond.false: 2621 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2622 // CHECK9-NEXT: br label [[COND_END]] 2623 // CHECK9: cond.end: 2624 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 2625 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2626 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2627 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 2628 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2629 // CHECK9: omp.inner.for.cond: 2630 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 2631 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 2632 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 2633 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2634 // CHECK9: omp.inner.for.cond.cleanup: 2635 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2636 // CHECK9: omp.inner.for.body: 2637 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5 2638 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 2639 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5 2640 // CHECK9-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64 2641 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 2642 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2643 // CHECK9-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4, !llvm.access.group !5 2644 // CHECK9-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !5 2645 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8, !llvm.access.group !5 2646 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4, !llvm.access.group !5 2647 // CHECK9-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* 2648 // CHECK9-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4, !llvm.access.group !5 2649 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !5 2650 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]]), !llvm.access.group !5 2651 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2652 // CHECK9: omp.inner.for.inc: 2653 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 2654 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5 2655 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] 2656 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 2657 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 2658 // CHECK9: omp.inner.for.end: 2659 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2660 // CHECK9: omp.loop.exit: 2661 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2662 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 2663 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 2664 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2665 // CHECK9-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 2666 // CHECK9-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2667 // CHECK9: .omp.final.then: 2668 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 2669 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2670 // CHECK9: .omp.final.done: 2671 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 2672 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 2673 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2 2674 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2675 // CHECK9: arraydestroy.body: 2676 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2677 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2678 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2679 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2680 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2681 // CHECK9: arraydestroy.done13: 2682 // CHECK9-NEXT: ret void 2683 // 2684 // 2685 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2686 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 2687 // CHECK9-NEXT: entry: 2688 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2689 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2690 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2691 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2692 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2693 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2694 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2695 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2696 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 2697 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 2698 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2699 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2700 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2701 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2702 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2703 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2704 // CHECK9-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4 2705 // CHECK9-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4 2706 // CHECK9-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2707 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8 2708 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2709 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2710 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2711 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2712 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2713 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2714 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 2715 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2716 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2717 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8 2718 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2719 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 2720 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2721 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2722 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32* 2723 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8 2724 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2725 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2726 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2727 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32 2728 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2729 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32 2730 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4 2731 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 2732 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2733 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2734 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8* 2735 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 2736 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 2737 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 2738 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 2739 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2740 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 2741 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2742 // CHECK9: omp.arraycpy.body: 2743 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2744 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2745 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 2746 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 2747 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 2748 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2749 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2750 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 2751 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 2752 // CHECK9: omp.arraycpy.done7: 2753 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 2754 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8* 2755 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 2756 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 2757 // CHECK9-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8 2758 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2759 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2760 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2761 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2762 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 2763 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2764 // CHECK9: cond.true: 2765 // CHECK9-NEXT: br label [[COND_END:%.*]] 2766 // CHECK9: cond.false: 2767 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2768 // CHECK9-NEXT: br label [[COND_END]] 2769 // CHECK9: cond.end: 2770 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 2771 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2772 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2773 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2774 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2775 // CHECK9: omp.inner.for.cond: 2776 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2777 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 2778 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2779 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2780 // CHECK9: omp.inner.for.cond.cleanup: 2781 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2782 // CHECK9: omp.inner.for.body: 2783 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2784 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2785 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2786 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 2787 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !9 2788 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 2789 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2790 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]] 2791 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 2792 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8, !llvm.access.group !9 2793 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 2794 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64 2795 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]] 2796 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8* 2797 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 2798 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false), !llvm.access.group !9 2799 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2800 // CHECK9: omp.body.continue: 2801 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2802 // CHECK9: omp.inner.for.inc: 2803 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2804 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1 2805 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2806 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 2807 // CHECK9: omp.inner.for.end: 2808 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2809 // CHECK9: omp.loop.exit: 2810 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2811 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 2812 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 2813 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2814 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 2815 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2816 // CHECK9: .omp.final.then: 2817 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 2818 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2819 // CHECK9: .omp.final.done: 2820 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]] 2821 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0 2822 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2 2823 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2824 // CHECK9: arraydestroy.body: 2825 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2826 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2827 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2828 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 2829 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 2830 // CHECK9: arraydestroy.done15: 2831 // CHECK9-NEXT: ret void 2832 // 2833 // 2834 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2835 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2836 // CHECK9-NEXT: entry: 2837 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2838 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2839 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2840 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2841 // CHECK9-NEXT: ret void 2842 // 2843 // 2844 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2845 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 2846 // CHECK9-NEXT: entry: 2847 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2848 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2849 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2850 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2851 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2852 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 2853 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 2854 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 2855 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 2856 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 2857 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 2858 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2859 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2860 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 2861 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2862 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2863 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2864 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 2865 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2866 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2867 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 2868 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 2869 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 2870 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 2871 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 2872 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2873 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 2874 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2875 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2876 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 2877 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2878 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2879 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8 2880 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2881 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2882 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8 2883 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2884 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 2885 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2886 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 2887 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8 2888 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2889 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 2890 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8 2891 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2892 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 2893 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2894 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 2895 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8 2896 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2897 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 2898 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8 2899 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2900 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8 2901 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2902 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 2903 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8 2904 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2905 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 2906 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8 2907 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 2908 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8 2909 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2910 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2911 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2912 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2913 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2914 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2915 // CHECK9: omp_offload.failed: 2916 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 2917 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2918 // CHECK9: omp_offload.cont: 2919 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2920 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2921 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2922 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2923 // CHECK9: arraydestroy.body: 2924 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2925 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2926 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2927 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2928 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2929 // CHECK9: arraydestroy.done2: 2930 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2931 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 2932 // CHECK9-NEXT: ret i32 [[TMP32]] 2933 // 2934 // 2935 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2936 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2937 // CHECK9-NEXT: entry: 2938 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2939 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2940 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2941 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2942 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 2943 // CHECK9-NEXT: ret void 2944 // 2945 // 2946 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2947 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2948 // CHECK9-NEXT: entry: 2949 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2950 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2951 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2952 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2953 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2954 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2955 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2956 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 2957 // CHECK9-NEXT: ret void 2958 // 2959 // 2960 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2961 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2962 // CHECK9-NEXT: entry: 2963 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2964 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2965 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2966 // CHECK9-NEXT: ret void 2967 // 2968 // 2969 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2970 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2971 // CHECK9-NEXT: entry: 2972 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2973 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2974 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2975 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2976 // CHECK9-NEXT: ret void 2977 // 2978 // 2979 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2980 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2981 // CHECK9-NEXT: entry: 2982 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2983 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2984 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2985 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2986 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2987 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2988 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2989 // CHECK9-NEXT: ret void 2990 // 2991 // 2992 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 2993 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 2994 // CHECK9-NEXT: entry: 2995 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 2996 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2997 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2998 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2999 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3000 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 3001 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3002 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3003 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3004 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 3005 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3006 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3007 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3008 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 3009 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3010 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3011 // CHECK9-NEXT: ret void 3012 // 3013 // 3014 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 3015 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3016 // CHECK9-NEXT: entry: 3017 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3018 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3019 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 3020 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3021 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 3022 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 3023 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3024 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 3025 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3026 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3027 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3028 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3029 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3030 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3031 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3032 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3033 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3034 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3035 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 3036 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3037 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 3038 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3039 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3040 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 3041 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3042 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3043 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3044 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 3045 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3046 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3047 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3048 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8 3049 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3050 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8 3051 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3052 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3053 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3054 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3055 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3056 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 3057 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3058 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3059 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false) 3060 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3061 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 3062 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3063 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 3064 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3065 // CHECK9: omp.arraycpy.body: 3066 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3067 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3068 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3069 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3070 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false) 3071 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3072 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3073 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3074 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3075 // CHECK9: omp.arraycpy.done6: 3076 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 3077 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3078 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3079 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false) 3080 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 3081 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3082 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 3083 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3084 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3085 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 3086 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3087 // CHECK9: cond.true: 3088 // CHECK9-NEXT: br label [[COND_END:%.*]] 3089 // CHECK9: cond.false: 3090 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3091 // CHECK9-NEXT: br label [[COND_END]] 3092 // CHECK9: cond.end: 3093 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3094 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3095 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3096 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 3097 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3098 // CHECK9: omp.inner.for.cond: 3099 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3100 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 3101 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3102 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3103 // CHECK9: omp.inner.for.cond.cleanup: 3104 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3105 // CHECK9: omp.inner.for.body: 3106 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14 3107 // CHECK9-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 3108 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14 3109 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64 3110 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !14 3111 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 3112 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4, !llvm.access.group !14 3113 // CHECK9-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !14 3114 // CHECK9-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !14 3115 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]]), !llvm.access.group !14 3116 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3117 // CHECK9: omp.inner.for.inc: 3118 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3119 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14 3120 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 3121 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3122 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3123 // CHECK9: omp.inner.for.end: 3124 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3125 // CHECK9: omp.loop.exit: 3126 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3127 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 3128 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 3129 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3130 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 3131 // CHECK9-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3132 // CHECK9: .omp.final.then: 3133 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 3134 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3135 // CHECK9: .omp.final.done: 3136 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3137 // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3138 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 3139 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3140 // CHECK9: arraydestroy.body: 3141 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3142 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3143 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3144 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3145 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3146 // CHECK9: arraydestroy.done11: 3147 // CHECK9-NEXT: ret void 3148 // 3149 // 3150 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 3151 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3152 // CHECK9-NEXT: entry: 3153 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3154 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3155 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3156 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3157 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 3158 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 3159 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 3160 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 3161 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3162 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3163 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3164 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3165 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3166 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3167 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3168 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3169 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3170 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3171 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8 3172 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3173 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3174 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3175 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3176 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3177 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 3178 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 3179 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3180 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 3181 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 3182 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 3183 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 3184 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 3185 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8 3186 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3187 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3188 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3189 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32 3190 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3191 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32 3192 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4 3193 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3194 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3195 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3196 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3197 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3198 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false) 3199 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3200 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 3201 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3202 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 3203 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3204 // CHECK9: omp.arraycpy.body: 3205 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3206 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3207 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3208 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3209 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false) 3210 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3211 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3212 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 3213 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3214 // CHECK9: omp.arraycpy.done6: 3215 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3216 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 3217 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 3218 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 3219 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8 3220 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3221 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3222 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3223 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3224 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 3225 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3226 // CHECK9: cond.true: 3227 // CHECK9-NEXT: br label [[COND_END:%.*]] 3228 // CHECK9: cond.false: 3229 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3230 // CHECK9-NEXT: br label [[COND_END]] 3231 // CHECK9: cond.end: 3232 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3233 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3234 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3235 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3236 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3237 // CHECK9: omp.inner.for.cond: 3238 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 3239 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 3240 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3241 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3242 // CHECK9: omp.inner.for.cond.cleanup: 3243 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3244 // CHECK9: omp.inner.for.body: 3245 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 3246 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 3247 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3248 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17 3249 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !17 3250 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 3251 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 3252 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] 3253 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 3254 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !17 3255 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17 3256 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64 3257 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 3258 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8* 3259 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 3260 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false), !llvm.access.group !17 3261 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3262 // CHECK9: omp.body.continue: 3263 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3264 // CHECK9: omp.inner.for.inc: 3265 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 3266 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 3267 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 3268 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 3269 // CHECK9: omp.inner.for.end: 3270 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3271 // CHECK9: omp.loop.exit: 3272 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3273 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 3274 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 3275 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3276 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3277 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3278 // CHECK9: .omp.final.then: 3279 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4 3280 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3281 // CHECK9: .omp.final.done: 3282 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3283 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 3284 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 3285 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3286 // CHECK9: arraydestroy.body: 3287 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3288 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3289 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3290 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 3291 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 3292 // CHECK9: arraydestroy.done14: 3293 // CHECK9-NEXT: ret void 3294 // 3295 // 3296 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3297 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3298 // CHECK9-NEXT: entry: 3299 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3300 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3301 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3302 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3303 // CHECK9-NEXT: ret void 3304 // 3305 // 3306 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3307 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3308 // CHECK9-NEXT: entry: 3309 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3310 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3311 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3312 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3313 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 3314 // CHECK9-NEXT: ret void 3315 // 3316 // 3317 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3318 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3319 // CHECK9-NEXT: entry: 3320 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3321 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3322 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3323 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3324 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3325 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3326 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3327 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3328 // CHECK9-NEXT: ret void 3329 // 3330 // 3331 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3332 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3333 // CHECK9-NEXT: entry: 3334 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3335 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3336 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3337 // CHECK9-NEXT: ret void 3338 // 3339 // 3340 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3341 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 3342 // CHECK9-NEXT: entry: 3343 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 3344 // CHECK9-NEXT: ret void 3345 // 3346 // 3347 // CHECK10-LABEL: define {{[^@]+}}@main 3348 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 3349 // CHECK10-NEXT: entry: 3350 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3351 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 3352 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 4 3353 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3354 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3355 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3356 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3357 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 3358 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3359 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3360 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3361 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 3362 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 3363 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 3364 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3365 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3366 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 4 3367 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3368 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 3369 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3370 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 3371 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3372 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 3373 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 3374 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 3375 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 3376 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 3377 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 3378 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3379 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3380 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3381 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3382 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 3383 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 3384 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 3385 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3386 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3387 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3388 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3389 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3390 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3391 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 3392 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 3393 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3394 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 4 3395 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3396 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3397 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3398 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3399 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 3400 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 3401 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3402 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 4 3403 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3404 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 3405 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 3406 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3407 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 3408 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 3409 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3410 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 4 3411 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3412 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 3413 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 3414 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3415 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 3416 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 3417 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3418 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 4 3419 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 3420 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 3421 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 3422 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 3423 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 3424 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 3425 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 3426 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 4 3427 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3428 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3429 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 3430 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3431 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3432 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3433 // CHECK10: omp_offload.failed: 3434 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 3435 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3436 // CHECK10: omp_offload.cont: 3437 // CHECK10-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 3438 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3439 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3440 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3441 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3442 // CHECK10: arraydestroy.body: 3443 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3444 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3445 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3446 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3447 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3448 // CHECK10: arraydestroy.done2: 3449 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3450 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3451 // CHECK10-NEXT: ret i32 [[TMP39]] 3452 // 3453 // 3454 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3455 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3456 // CHECK10-NEXT: entry: 3457 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3458 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3459 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3460 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3461 // CHECK10-NEXT: ret void 3462 // 3463 // 3464 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3465 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3466 // CHECK10-NEXT: entry: 3467 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3468 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3469 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3470 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3471 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3472 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3473 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 3474 // CHECK10-NEXT: ret void 3475 // 3476 // 3477 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 3478 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 3479 // CHECK10-NEXT: entry: 3480 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3481 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3482 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3483 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3484 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3485 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3486 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3487 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3488 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3489 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3490 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3491 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3492 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3493 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3494 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3495 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3496 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 3497 // CHECK10-NEXT: ret void 3498 // 3499 // 3500 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 3501 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 3502 // CHECK10-NEXT: entry: 3503 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3504 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3505 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3506 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3507 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3508 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3509 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 3510 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3511 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3512 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3513 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3514 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3515 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3516 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3517 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3518 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3519 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3520 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 3521 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3522 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 3523 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 3524 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3525 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3526 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 3527 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3528 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3529 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3530 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3531 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3532 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3533 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 3534 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3535 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3536 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3537 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3538 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 3539 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 3540 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3541 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 3542 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3543 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3544 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3545 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3546 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 3547 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 3548 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 3549 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 3550 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 3551 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3552 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 3553 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3554 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 3555 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3556 // CHECK10: omp.arraycpy.body: 3557 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3558 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3559 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3560 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3561 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 3562 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3563 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3564 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 3565 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 3566 // CHECK10: omp.arraycpy.done6: 3567 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 3568 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 3569 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 3570 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3571 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 3572 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 3573 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 3574 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3575 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3576 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3577 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3578 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 3579 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3580 // CHECK10: cond.true: 3581 // CHECK10-NEXT: br label [[COND_END:%.*]] 3582 // CHECK10: cond.false: 3583 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3584 // CHECK10-NEXT: br label [[COND_END]] 3585 // CHECK10: cond.end: 3586 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 3587 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3588 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3589 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 3590 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3591 // CHECK10: omp.inner.for.cond: 3592 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3593 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 3594 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 3595 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3596 // CHECK10: omp.inner.for.cond.cleanup: 3597 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3598 // CHECK10: omp.inner.for.body: 3599 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 3600 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 3601 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6 3602 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6 3603 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6 3604 // CHECK10-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !6 3605 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4, !llvm.access.group !6 3606 // CHECK10-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6 3607 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6 3608 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]]), !llvm.access.group !6 3609 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3610 // CHECK10: omp.inner.for.inc: 3611 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3612 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 3613 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 3614 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 3615 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 3616 // CHECK10: omp.inner.for.end: 3617 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3618 // CHECK10: omp.loop.exit: 3619 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3620 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3621 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3622 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3623 // CHECK10-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 3624 // CHECK10-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3625 // CHECK10: .omp.final.then: 3626 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 3627 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3628 // CHECK10: .omp.final.done: 3629 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 3630 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 3631 // CHECK10-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 3632 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3633 // CHECK10: arraydestroy.body: 3634 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3635 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3636 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3637 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 3638 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 3639 // CHECK10: arraydestroy.done12: 3640 // CHECK10-NEXT: ret void 3641 // 3642 // 3643 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 3644 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 3645 // CHECK10-NEXT: entry: 3646 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3647 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3648 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3649 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3650 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3651 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3652 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 3653 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 3654 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 3655 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 3656 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3657 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3658 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3659 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3660 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3661 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3662 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3663 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3664 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3665 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 3666 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3667 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3668 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3669 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3670 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3671 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3672 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3673 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3674 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 3675 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 3676 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3677 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 3678 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 3679 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 3680 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3681 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3682 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3683 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3684 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 3685 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3686 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3687 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3688 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 3689 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 3690 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 3691 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3692 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 3693 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3694 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 3695 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3696 // CHECK10: omp.arraycpy.body: 3697 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3698 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3699 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 3700 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 3701 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 3702 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3703 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3704 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 3705 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 3706 // CHECK10: omp.arraycpy.done4: 3707 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 3708 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8* 3709 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 3710 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 3711 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 3712 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3713 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3714 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3715 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3716 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 3717 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3718 // CHECK10: cond.true: 3719 // CHECK10-NEXT: br label [[COND_END:%.*]] 3720 // CHECK10: cond.false: 3721 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3722 // CHECK10-NEXT: br label [[COND_END]] 3723 // CHECK10: cond.end: 3724 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 3725 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3726 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3727 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 3728 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3729 // CHECK10: omp.inner.for.cond: 3730 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3731 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 3732 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3733 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3734 // CHECK10: omp.inner.for.cond.cleanup: 3735 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3736 // CHECK10: omp.inner.for.body: 3737 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3738 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 3739 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3740 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 3741 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4, !llvm.access.group !10 3742 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3743 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 3744 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 3745 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !10 3746 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3747 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]] 3748 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 3749 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 3750 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false), !llvm.access.group !10 3751 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3752 // CHECK10: omp.body.continue: 3753 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3754 // CHECK10: omp.inner.for.inc: 3755 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3756 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 3757 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3758 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3759 // CHECK10: omp.inner.for.end: 3760 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3761 // CHECK10: omp.loop.exit: 3762 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3763 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 3764 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 3765 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3766 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 3767 // CHECK10-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3768 // CHECK10: .omp.final.then: 3769 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 3770 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3771 // CHECK10: .omp.final.done: 3772 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 3773 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3774 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 3775 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3776 // CHECK10: arraydestroy.body: 3777 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3778 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3779 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3780 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 3781 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 3782 // CHECK10: arraydestroy.done11: 3783 // CHECK10-NEXT: ret void 3784 // 3785 // 3786 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3787 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3788 // CHECK10-NEXT: entry: 3789 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3790 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3791 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3792 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3793 // CHECK10-NEXT: ret void 3794 // 3795 // 3796 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3797 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 3798 // CHECK10-NEXT: entry: 3799 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3800 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3801 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3802 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3803 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3804 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3805 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3806 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3807 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 3808 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 3809 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 3810 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3811 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 3812 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 3813 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3814 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3815 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3816 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 3817 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3818 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 3819 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3820 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 3821 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 3822 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 3823 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 3824 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 3825 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3826 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3827 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3828 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3829 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3830 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3831 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3832 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3833 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3834 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3835 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 4 3836 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3837 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 3838 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 3839 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3840 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 3841 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 3842 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3843 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 4 3844 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3845 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 3846 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 3847 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3848 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 3849 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 3850 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3851 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 4 3852 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3853 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 3854 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 3855 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3856 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 3857 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 3858 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 3859 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 4 3860 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3861 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3862 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 3863 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3864 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 3865 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3866 // CHECK10: omp_offload.failed: 3867 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 3868 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3869 // CHECK10: omp_offload.cont: 3870 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3871 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3872 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3873 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3874 // CHECK10: arraydestroy.body: 3875 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3876 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3877 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3878 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3879 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3880 // CHECK10: arraydestroy.done2: 3881 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3882 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 3883 // CHECK10-NEXT: ret i32 [[TMP32]] 3884 // 3885 // 3886 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3887 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3888 // CHECK10-NEXT: entry: 3889 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3890 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3891 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3892 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3893 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 3894 // CHECK10-NEXT: ret void 3895 // 3896 // 3897 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3898 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3899 // CHECK10-NEXT: entry: 3900 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3901 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3902 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3903 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3904 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3905 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3906 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3907 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 3908 // CHECK10-NEXT: ret void 3909 // 3910 // 3911 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3912 // CHECK10-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3913 // CHECK10-NEXT: entry: 3914 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3915 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3916 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3917 // CHECK10-NEXT: ret void 3918 // 3919 // 3920 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3921 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3922 // CHECK10-NEXT: entry: 3923 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3924 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3925 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3926 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 3927 // CHECK10-NEXT: ret void 3928 // 3929 // 3930 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3931 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3932 // CHECK10-NEXT: entry: 3933 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3934 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3935 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3936 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3937 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3938 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3939 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3940 // CHECK10-NEXT: ret void 3941 // 3942 // 3943 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 3944 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3945 // CHECK10-NEXT: entry: 3946 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 3947 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3948 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3949 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3950 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3951 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 3952 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3953 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3954 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3955 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3956 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3957 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3958 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 3959 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 3960 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 3961 // CHECK10-NEXT: ret void 3962 // 3963 // 3964 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 3965 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 3966 // CHECK10-NEXT: entry: 3967 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3968 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3969 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 3970 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 3971 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 3972 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 3973 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 3974 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3975 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3976 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3977 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3978 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3979 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3980 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3981 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 3982 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 3983 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 3984 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3985 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 3986 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3987 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 3988 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3989 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3990 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 3991 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 3992 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3993 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 3994 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 3995 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 3996 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 3997 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 3998 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 3999 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4000 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 4001 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4002 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4003 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4004 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4005 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 4006 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 4007 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 4008 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 4009 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 4010 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 4011 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 4012 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4013 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 4014 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4015 // CHECK10: omp.arraycpy.body: 4016 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4017 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4018 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4019 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4020 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4021 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4022 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4023 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 4024 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 4025 // CHECK10: omp.arraycpy.done6: 4026 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4027 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 4028 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 4029 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 4030 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 4031 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4032 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 4033 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4034 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4035 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 4036 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4037 // CHECK10: cond.true: 4038 // CHECK10-NEXT: br label [[COND_END:%.*]] 4039 // CHECK10: cond.false: 4040 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4041 // CHECK10-NEXT: br label [[COND_END]] 4042 // CHECK10: cond.end: 4043 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4044 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4045 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4046 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 4047 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4048 // CHECK10: omp.inner.for.cond: 4049 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4050 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 4051 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4052 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4053 // CHECK10: omp.inner.for.cond.cleanup: 4054 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4055 // CHECK10: omp.inner.for.body: 4056 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15 4057 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 4058 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !15 4059 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15 4060 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15 4061 // CHECK10-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !15 4062 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]]), !llvm.access.group !15 4063 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4064 // CHECK10: omp.inner.for.inc: 4065 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4066 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15 4067 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 4068 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4069 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 4070 // CHECK10: omp.inner.for.end: 4071 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4072 // CHECK10: omp.loop.exit: 4073 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4074 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4075 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4076 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4077 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4078 // CHECK10-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4079 // CHECK10: .omp.final.then: 4080 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 4081 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 4082 // CHECK10: .omp.final.done: 4083 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 4084 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 4085 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4086 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4087 // CHECK10: arraydestroy.body: 4088 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4089 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4090 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4091 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4092 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4093 // CHECK10: arraydestroy.done11: 4094 // CHECK10-NEXT: ret void 4095 // 4096 // 4097 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 4098 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4099 // CHECK10-NEXT: entry: 4100 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4101 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4102 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4103 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4104 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4105 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4106 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4107 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4108 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4109 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4110 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4111 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4112 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4113 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4114 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4115 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4116 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 4117 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4118 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 4119 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 4120 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4121 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4122 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4123 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4124 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4125 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4126 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4127 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4128 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4129 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4130 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4131 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4132 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4133 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4134 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4135 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4136 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 4137 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4138 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4139 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4140 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 4141 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4142 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 4143 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4144 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 4145 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4146 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 4147 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4148 // CHECK10: omp.arraycpy.body: 4149 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4150 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4151 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4152 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4153 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4154 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4155 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4156 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 4157 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4158 // CHECK10: omp.arraycpy.done4: 4159 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4160 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 4161 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 4162 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 4163 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 4164 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4165 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4166 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4167 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4168 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 4169 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4170 // CHECK10: cond.true: 4171 // CHECK10-NEXT: br label [[COND_END:%.*]] 4172 // CHECK10: cond.false: 4173 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4174 // CHECK10-NEXT: br label [[COND_END]] 4175 // CHECK10: cond.end: 4176 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 4177 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4178 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4179 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4180 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4181 // CHECK10: omp.inner.for.cond: 4182 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 4183 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 4184 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4185 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4186 // CHECK10: omp.inner.for.cond.cleanup: 4187 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4188 // CHECK10: omp.inner.for.body: 4189 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 4190 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4191 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4192 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18 4193 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4, !llvm.access.group !18 4194 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 4195 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 4196 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 4197 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !18 4198 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 4199 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]] 4200 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 4201 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 4202 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false), !llvm.access.group !18 4203 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4204 // CHECK10: omp.body.continue: 4205 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4206 // CHECK10: omp.inner.for.inc: 4207 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 4208 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 4209 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 4210 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 4211 // CHECK10: omp.inner.for.end: 4212 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4213 // CHECK10: omp.loop.exit: 4214 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4215 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4216 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4217 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4218 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4219 // CHECK10-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4220 // CHECK10: .omp.final.then: 4221 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4 4222 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 4223 // CHECK10: .omp.final.done: 4224 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4225 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4226 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 4227 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4228 // CHECK10: arraydestroy.body: 4229 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4230 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4231 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4232 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4233 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4234 // CHECK10: arraydestroy.done11: 4235 // CHECK10-NEXT: ret void 4236 // 4237 // 4238 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4239 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4240 // CHECK10-NEXT: entry: 4241 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4242 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4243 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4244 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4245 // CHECK10-NEXT: ret void 4246 // 4247 // 4248 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4249 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4250 // CHECK10-NEXT: entry: 4251 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4252 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4253 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4254 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4255 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 4256 // CHECK10-NEXT: ret void 4257 // 4258 // 4259 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4260 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4261 // CHECK10-NEXT: entry: 4262 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4263 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4264 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4265 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4266 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4267 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4268 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4269 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4270 // CHECK10-NEXT: ret void 4271 // 4272 // 4273 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4274 // CHECK10-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4275 // CHECK10-NEXT: entry: 4276 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4277 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4278 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4279 // CHECK10-NEXT: ret void 4280 // 4281 // 4282 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4283 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 4284 // CHECK10-NEXT: entry: 4285 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 4286 // CHECK10-NEXT: ret void 4287 // 4288 // 4289 // CHECK11-LABEL: define {{[^@]+}}@main 4290 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 4291 // CHECK11-NEXT: entry: 4292 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4293 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 4294 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 4295 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4296 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4297 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4298 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4299 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4300 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4301 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4302 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 4303 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 4304 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 4305 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 4306 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4307 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 4308 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 4309 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4310 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 4311 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4312 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4313 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4314 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 4315 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4316 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 4317 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4318 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 4319 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 4320 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4321 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4322 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4323 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4324 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4 4325 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4 4326 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 4327 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4328 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4329 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4330 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4331 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4332 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4333 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32* 4334 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4 4335 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4336 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 4337 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4338 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4339 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4340 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4341 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]** 4342 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4 4343 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4344 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4 4345 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4346 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]** 4347 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4 4348 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4349 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]** 4350 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4 4351 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4352 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4 4353 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4354 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S** 4355 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4 4356 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4357 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S** 4358 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4 4359 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4360 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4 4361 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 4362 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 4363 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4 4364 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 4365 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32* 4366 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4 4367 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 4368 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4 4369 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4370 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4371 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 4372 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4373 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4374 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4375 // CHECK11: omp_offload.failed: 4376 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]] 4377 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4378 // CHECK11: omp_offload.cont: 4379 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4380 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4381 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4382 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4383 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4384 // CHECK11: arraydestroy.body: 4385 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4386 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4387 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4388 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4389 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4390 // CHECK11: arraydestroy.done2: 4391 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4392 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 4393 // CHECK11-NEXT: ret i32 [[TMP39]] 4394 // 4395 // 4396 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4397 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4398 // CHECK11-NEXT: entry: 4399 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4400 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4401 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4402 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4403 // CHECK11-NEXT: ret void 4404 // 4405 // 4406 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4407 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4408 // CHECK11-NEXT: entry: 4409 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4410 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4411 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4412 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4413 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4414 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4415 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 4416 // CHECK11-NEXT: ret void 4417 // 4418 // 4419 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 4420 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 4421 // CHECK11-NEXT: entry: 4422 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4423 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4424 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4425 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4426 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 4427 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4428 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4429 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4430 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4431 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4432 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 4433 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4434 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4435 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4436 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 4437 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4438 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]]) 4439 // CHECK11-NEXT: ret void 4440 // 4441 // 4442 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 4443 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 4444 // CHECK11-NEXT: entry: 4445 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4446 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4447 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4448 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4449 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4450 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4451 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4 4452 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4453 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 4454 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4455 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4456 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4457 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4458 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4459 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4460 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 4461 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 4462 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 4463 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4464 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4 4465 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 4466 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4467 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4468 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 4469 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4470 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4471 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4472 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4473 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4474 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4475 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4 4476 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4477 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4478 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4479 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4480 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4 4481 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4 4482 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4483 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4 4484 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4485 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4486 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4487 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4488 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4 4489 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4 4490 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 4491 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 4492 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false) 4493 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 4494 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S* 4495 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4496 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]] 4497 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4498 // CHECK11: omp.arraycpy.body: 4499 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4500 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4501 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4502 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4503 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false) 4504 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4505 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4506 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]] 4507 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 4508 // CHECK11: omp.arraycpy.done6: 4509 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 4510 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8* 4511 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8* 4512 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 4513 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4 4514 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4 4515 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4 4516 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4517 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 4518 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4519 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4520 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1 4521 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4522 // CHECK11: cond.true: 4523 // CHECK11-NEXT: br label [[COND_END:%.*]] 4524 // CHECK11: cond.false: 4525 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4526 // CHECK11-NEXT: br label [[COND_END]] 4527 // CHECK11: cond.end: 4528 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ] 4529 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4530 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4531 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 4532 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4533 // CHECK11: omp.inner.for.cond: 4534 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4535 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 4536 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]] 4537 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4538 // CHECK11: omp.inner.for.cond.cleanup: 4539 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4540 // CHECK11: omp.inner.for.body: 4541 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6 4542 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6 4543 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !6 4544 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6 4545 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6 4546 // CHECK11-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4, !llvm.access.group !6 4547 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4, !llvm.access.group !6 4548 // CHECK11-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6 4549 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6 4550 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]]), !llvm.access.group !6 4551 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4552 // CHECK11: omp.inner.for.inc: 4553 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4554 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6 4555 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 4556 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 4557 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4558 // CHECK11: omp.inner.for.end: 4559 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4560 // CHECK11: omp.loop.exit: 4561 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4562 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 4563 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 4564 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4565 // CHECK11-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 4566 // CHECK11-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4567 // CHECK11: .omp.final.then: 4568 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 4569 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4570 // CHECK11: .omp.final.done: 4571 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 4572 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 4573 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2 4574 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4575 // CHECK11: arraydestroy.body: 4576 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4577 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4578 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4579 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 4580 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 4581 // CHECK11: arraydestroy.done12: 4582 // CHECK11-NEXT: ret void 4583 // 4584 // 4585 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 4586 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 4587 // CHECK11-NEXT: entry: 4588 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4589 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4590 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4591 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4592 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4593 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4594 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 4595 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 4596 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 4597 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4598 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4599 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4600 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4601 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4602 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4603 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4604 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4605 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 4606 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4607 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4 4608 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4609 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4610 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4611 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4612 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4613 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4614 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4615 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4616 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4 4617 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4 4618 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4619 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4 4620 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4 4621 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4 4622 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4623 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 4624 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4625 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4626 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 4627 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 4628 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4629 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4630 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 4631 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 4632 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 4633 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4634 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S* 4635 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4636 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]] 4637 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4638 // CHECK11: omp.arraycpy.body: 4639 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4640 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4641 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4642 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4643 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 4644 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4645 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4646 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 4647 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4648 // CHECK11: omp.arraycpy.done4: 4649 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4650 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8* 4651 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 4652 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 4653 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4 4654 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4655 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4656 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4657 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4658 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 4659 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4660 // CHECK11: cond.true: 4661 // CHECK11-NEXT: br label [[COND_END:%.*]] 4662 // CHECK11: cond.false: 4663 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4664 // CHECK11-NEXT: br label [[COND_END]] 4665 // CHECK11: cond.end: 4666 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 4667 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4668 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4669 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4670 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4671 // CHECK11: omp.inner.for.cond: 4672 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4673 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 4674 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4675 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4676 // CHECK11: omp.inner.for.cond.cleanup: 4677 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4678 // CHECK11: omp.inner.for.body: 4679 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4680 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4681 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4682 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 4683 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4, !llvm.access.group !10 4684 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 4685 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 4686 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 4687 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !10 4688 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 4689 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]] 4690 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8* 4691 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8* 4692 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false), !llvm.access.group !10 4693 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4694 // CHECK11: omp.body.continue: 4695 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4696 // CHECK11: omp.inner.for.inc: 4697 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4698 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 4699 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4700 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 4701 // CHECK11: omp.inner.for.end: 4702 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4703 // CHECK11: omp.loop.exit: 4704 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4705 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 4706 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 4707 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4708 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4709 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4710 // CHECK11: .omp.final.then: 4711 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 4712 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4713 // CHECK11: .omp.final.done: 4714 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 4715 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4716 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 4717 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4718 // CHECK11: arraydestroy.body: 4719 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4720 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4721 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4722 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 4723 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 4724 // CHECK11: arraydestroy.done11: 4725 // CHECK11-NEXT: ret void 4726 // 4727 // 4728 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4729 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4730 // CHECK11-NEXT: entry: 4731 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4732 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4733 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4734 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4735 // CHECK11-NEXT: ret void 4736 // 4737 // 4738 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4739 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 4740 // CHECK11-NEXT: entry: 4741 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4742 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4743 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4744 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4745 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4746 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4747 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4748 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4749 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 4750 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 4751 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 4752 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4753 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 4754 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 4755 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4756 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4757 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4758 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 4759 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4760 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 4761 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4762 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 4763 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 4764 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4 4765 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4 4766 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 4767 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4768 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4769 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4770 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4771 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4772 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4773 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4774 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4775 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4776 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4777 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 4778 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4779 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]** 4780 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4 4781 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4782 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]** 4783 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4 4784 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4785 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 4786 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4787 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]** 4788 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4 4789 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4790 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]** 4791 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4 4792 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4793 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 4794 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4795 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0** 4796 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4 4797 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4798 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0** 4799 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4 4800 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4801 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 4802 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4803 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4804 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 4805 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4806 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 4807 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4808 // CHECK11: omp_offload.failed: 4809 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]] 4810 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4811 // CHECK11: omp_offload.cont: 4812 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 4813 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4814 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4815 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4816 // CHECK11: arraydestroy.body: 4817 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4818 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4819 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4820 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 4821 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 4822 // CHECK11: arraydestroy.done2: 4823 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4824 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4 4825 // CHECK11-NEXT: ret i32 [[TMP32]] 4826 // 4827 // 4828 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4829 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4830 // CHECK11-NEXT: entry: 4831 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4832 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4833 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4834 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4835 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 4836 // CHECK11-NEXT: ret void 4837 // 4838 // 4839 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4840 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4841 // CHECK11-NEXT: entry: 4842 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4843 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4844 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4845 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4846 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4847 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4848 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4849 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 4850 // CHECK11-NEXT: ret void 4851 // 4852 // 4853 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4854 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4855 // CHECK11-NEXT: entry: 4856 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4857 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4858 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4859 // CHECK11-NEXT: ret void 4860 // 4861 // 4862 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4863 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4864 // CHECK11-NEXT: entry: 4865 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4866 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4867 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4868 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 4869 // CHECK11-NEXT: ret void 4870 // 4871 // 4872 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4873 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4874 // CHECK11-NEXT: entry: 4875 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4876 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4877 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4878 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4879 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4880 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4881 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4882 // CHECK11-NEXT: ret void 4883 // 4884 // 4885 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 4886 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4887 // CHECK11-NEXT: entry: 4888 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 4889 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4890 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4891 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4892 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4893 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 4894 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4895 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4896 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4897 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4898 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4899 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4900 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 4901 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4902 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]]) 4903 // CHECK11-NEXT: ret void 4904 // 4905 // 4906 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 4907 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 4908 // CHECK11-NEXT: entry: 4909 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4910 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4911 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 4912 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 4913 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 4914 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 4915 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4916 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 4917 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4918 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4919 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4920 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4921 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4922 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4923 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 4924 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 4925 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 4926 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4927 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4 4928 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4929 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 4930 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4931 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4932 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 4933 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 4934 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4935 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 4936 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 4937 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 4938 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 4939 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 4940 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4 4941 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4942 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4 4943 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4944 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 4945 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4946 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4947 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 4948 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4 4949 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8* 4950 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8* 4951 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false) 4952 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 4953 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0* 4954 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4955 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]] 4956 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4957 // CHECK11: omp.arraycpy.body: 4958 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4959 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4960 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 4961 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 4962 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false) 4963 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4964 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4965 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 4966 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 4967 // CHECK11: omp.arraycpy.done6: 4968 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 4969 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8* 4970 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 4971 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false) 4972 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4 4973 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4974 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 4975 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4976 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4977 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1 4978 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4979 // CHECK11: cond.true: 4980 // CHECK11-NEXT: br label [[COND_END:%.*]] 4981 // CHECK11: cond.false: 4982 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4983 // CHECK11-NEXT: br label [[COND_END]] 4984 // CHECK11: cond.end: 4985 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4986 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4987 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4988 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4 4989 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4990 // CHECK11: omp.inner.for.cond: 4991 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4992 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 4993 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4994 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 4995 // CHECK11: omp.inner.for.cond.cleanup: 4996 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 4997 // CHECK11: omp.inner.for.body: 4998 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15 4999 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15 5000 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !15 5001 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15 5002 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15 5003 // CHECK11-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4, !llvm.access.group !15 5004 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]]), !llvm.access.group !15 5005 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5006 // CHECK11: omp.inner.for.inc: 5007 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5008 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15 5009 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 5010 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5011 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 5012 // CHECK11: omp.inner.for.end: 5013 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5014 // CHECK11: omp.loop.exit: 5015 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5016 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5017 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5018 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5019 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5020 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5021 // CHECK11: .omp.final.then: 5022 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 5023 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5024 // CHECK11: .omp.final.done: 5025 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 5026 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0 5027 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 5028 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5029 // CHECK11: arraydestroy.body: 5030 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5031 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5032 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5033 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 5034 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 5035 // CHECK11: arraydestroy.done11: 5036 // CHECK11-NEXT: ret void 5037 // 5038 // 5039 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 5040 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 5041 // CHECK11-NEXT: entry: 5042 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5043 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5044 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5045 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5046 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 5047 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 5048 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 5049 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 5050 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5051 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5052 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5053 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5054 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5055 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5056 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5057 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 5058 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 5059 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5060 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4 5061 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 5062 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5063 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5064 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5065 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5066 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4 5067 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 5068 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 5069 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4 5070 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4 5071 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4 5072 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4 5073 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4 5074 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5075 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5076 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5077 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5078 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4 5079 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 5080 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5081 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5082 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8* 5083 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8* 5084 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false) 5085 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 5086 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0* 5087 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 5088 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]] 5089 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 5090 // CHECK11: omp.arraycpy.body: 5091 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5092 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 5093 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* 5094 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* 5095 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false) 5096 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 5097 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 5098 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]] 5099 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 5100 // CHECK11: omp.arraycpy.done4: 5101 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5102 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8* 5103 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 5104 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false) 5105 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4 5106 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5107 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 5108 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5109 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5110 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1 5111 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5112 // CHECK11: cond.true: 5113 // CHECK11-NEXT: br label [[COND_END:%.*]] 5114 // CHECK11: cond.false: 5115 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5116 // CHECK11-NEXT: br label [[COND_END]] 5117 // CHECK11: cond.end: 5118 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 5119 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5120 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5121 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 5122 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5123 // CHECK11: omp.inner.for.cond: 5124 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5125 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 5126 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 5127 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 5128 // CHECK11: omp.inner.for.cond.cleanup: 5129 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 5130 // CHECK11: omp.inner.for.body: 5131 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5132 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 5133 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5134 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18 5135 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4, !llvm.access.group !18 5136 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 5137 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]] 5138 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 5139 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !18 5140 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18 5141 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]] 5142 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* 5143 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8* 5144 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false), !llvm.access.group !18 5145 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5146 // CHECK11: omp.body.continue: 5147 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5148 // CHECK11: omp.inner.for.inc: 5149 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5150 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 5151 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5152 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 5153 // CHECK11: omp.inner.for.end: 5154 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5155 // CHECK11: omp.loop.exit: 5156 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5157 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5158 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5159 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5160 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5161 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5162 // CHECK11: .omp.final.then: 5163 // CHECK11-NEXT: store i32 2, i32* [[I]], align 4 5164 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5165 // CHECK11: .omp.final.done: 5166 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 5167 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 5168 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2 5169 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5170 // CHECK11: arraydestroy.body: 5171 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5172 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5173 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5174 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 5175 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 5176 // CHECK11: arraydestroy.done11: 5177 // CHECK11-NEXT: ret void 5178 // 5179 // 5180 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5181 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5182 // CHECK11-NEXT: entry: 5183 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5184 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5185 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5186 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5187 // CHECK11-NEXT: ret void 5188 // 5189 // 5190 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5191 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5192 // CHECK11-NEXT: entry: 5193 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5194 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5195 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5196 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5197 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 5198 // CHECK11-NEXT: ret void 5199 // 5200 // 5201 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5202 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5203 // CHECK11-NEXT: entry: 5204 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5205 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5206 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5207 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5208 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5209 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5210 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5211 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5212 // CHECK11-NEXT: ret void 5213 // 5214 // 5215 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5216 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5217 // CHECK11-NEXT: entry: 5218 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 5219 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 5220 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 5221 // CHECK11-NEXT: ret void 5222 // 5223 // 5224 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5225 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 5226 // CHECK11-NEXT: entry: 5227 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 5228 // CHECK11-NEXT: ret void 5229 // 5230 // 5231 // CHECK12-LABEL: define {{[^@]+}}@main 5232 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 5233 // CHECK12-NEXT: entry: 5234 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5235 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 5236 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 8 5237 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5238 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5239 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5240 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5241 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5242 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5243 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5244 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 5245 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5246 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5247 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5248 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5249 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5250 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 5251 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 8 5252 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5253 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 5254 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5255 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5256 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5257 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 5258 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5259 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 5260 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5261 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5262 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5263 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5264 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5265 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5266 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5267 // CHECK12-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 5268 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5269 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5270 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5271 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5272 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5273 // CHECK12: omp.inner.for.cond: 5274 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5275 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 5276 // CHECK12-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5277 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5278 // CHECK12: omp.inner.for.body: 5279 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5280 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5281 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5282 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 5283 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2 5284 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 5285 // CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 5286 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5287 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 5288 // CHECK12-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !2 5289 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 5290 // CHECK12-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 5291 // CHECK12-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 5292 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 5293 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 5294 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 5295 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5296 // CHECK12: omp.body.continue: 5297 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5298 // CHECK12: omp.inner.for.inc: 5299 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5300 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 5301 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5302 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5303 // CHECK12: omp.inner.for.end: 5304 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 5305 // CHECK12-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 5306 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5307 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5308 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5309 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5310 // CHECK12: arraydestroy.body: 5311 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5312 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5313 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5314 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5315 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 5316 // CHECK12: arraydestroy.done7: 5317 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5318 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5319 // CHECK12-NEXT: ret i32 [[TMP17]] 5320 // 5321 // 5322 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5323 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5324 // CHECK12-NEXT: entry: 5325 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5326 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5327 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5328 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5329 // CHECK12-NEXT: ret void 5330 // 5331 // 5332 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5333 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5334 // CHECK12-NEXT: entry: 5335 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5336 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5337 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5338 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5339 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5340 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5341 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 5342 // CHECK12-NEXT: ret void 5343 // 5344 // 5345 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5346 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] comdat { 5347 // CHECK12-NEXT: entry: 5348 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5349 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5350 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5351 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5352 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5353 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5354 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5355 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5356 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 5357 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5358 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5359 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5360 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5361 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5362 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5363 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 5364 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5365 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5366 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5367 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 5368 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5369 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 5370 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5371 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5372 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5373 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5374 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5375 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5376 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5377 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 5378 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5379 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5380 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5381 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5382 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5383 // CHECK12: omp.inner.for.cond: 5384 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5385 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 5386 // CHECK12-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5387 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5388 // CHECK12: omp.inner.for.body: 5389 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5390 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5391 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5392 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 5393 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 5394 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 5395 // CHECK12-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 5396 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5397 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 5398 // CHECK12-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !6 5399 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 5400 // CHECK12-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 5401 // CHECK12-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 5402 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 5403 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 5404 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 5405 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5406 // CHECK12: omp.body.continue: 5407 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5408 // CHECK12: omp.inner.for.inc: 5409 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5410 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 5411 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5412 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 5413 // CHECK12: omp.inner.for.end: 5414 // CHECK12-NEXT: store i32 2, i32* [[I]], align 4 5415 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 5416 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5417 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5418 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5419 // CHECK12: arraydestroy.body: 5420 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5421 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5422 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5423 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5424 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 5425 // CHECK12: arraydestroy.done7: 5426 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5427 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5428 // CHECK12-NEXT: ret i32 [[TMP17]] 5429 // 5430 // 5431 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5432 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5433 // CHECK12-NEXT: entry: 5434 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5435 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5436 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5437 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5438 // CHECK12-NEXT: ret void 5439 // 5440 // 5441 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5442 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5443 // CHECK12-NEXT: entry: 5444 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5445 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5446 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5447 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5448 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 5449 // CHECK12-NEXT: ret void 5450 // 5451 // 5452 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5453 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5454 // CHECK12-NEXT: entry: 5455 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5456 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5457 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5458 // CHECK12-NEXT: ret void 5459 // 5460 // 5461 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5462 // CHECK12-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5463 // CHECK12-NEXT: entry: 5464 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5465 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5466 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5467 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5468 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5469 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5470 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5471 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 5472 // CHECK12-NEXT: ret void 5473 // 5474 // 5475 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5476 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5477 // CHECK12-NEXT: entry: 5478 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5479 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5480 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5481 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5482 // CHECK12-NEXT: ret void 5483 // 5484 // 5485 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5486 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5487 // CHECK12-NEXT: entry: 5488 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5489 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5490 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5491 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5492 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5493 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5494 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 5495 // CHECK12-NEXT: ret void 5496 // 5497 // 5498 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5499 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5500 // CHECK12-NEXT: entry: 5501 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5502 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5503 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5504 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5505 // CHECK12-NEXT: ret void 5506 // 5507 // 5508 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5509 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5510 // CHECK12-NEXT: entry: 5511 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5512 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5513 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5514 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5515 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 5516 // CHECK12-NEXT: ret void 5517 // 5518 // 5519 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5520 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5521 // CHECK12-NEXT: entry: 5522 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5523 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5524 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5525 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5526 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5527 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5528 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5529 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5530 // CHECK12-NEXT: ret void 5531 // 5532 // 5533 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5534 // CHECK12-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5535 // CHECK12-NEXT: entry: 5536 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5537 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5538 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5539 // CHECK12-NEXT: ret void 5540 // 5541 // 5542 // CHECK13-LABEL: define {{[^@]+}}@main 5543 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 5544 // CHECK13-NEXT: entry: 5545 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5546 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 5547 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 5548 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5549 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5550 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5551 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5552 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 5553 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 5554 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 5555 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 5556 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5557 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5558 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5559 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5560 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5561 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5562 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 5563 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5564 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5565 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5566 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 5567 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 5568 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 5569 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 5570 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 5571 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 5572 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5573 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8 5574 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8 5575 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 5576 // CHECK13-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 8 5577 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 5578 // CHECK13-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 8 5579 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5580 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5581 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5582 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5583 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5584 // CHECK13: omp.inner.for.cond: 5585 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5586 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 5587 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5588 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5589 // CHECK13: omp.inner.for.body: 5590 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5591 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5592 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5593 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 5594 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !2 5595 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 5596 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 5597 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5598 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 5599 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8, !llvm.access.group !2 5600 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 5601 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 5602 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 5603 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 5604 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 5605 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !2 5606 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5607 // CHECK13: omp.body.continue: 5608 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5609 // CHECK13: omp.inner.for.inc: 5610 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5611 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 5612 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 5613 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5614 // CHECK13: omp.inner.for.end: 5615 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 5616 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 5617 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5618 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5619 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 5620 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5621 // CHECK13: arraydestroy.body: 5622 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5623 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5624 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5625 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5626 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 5627 // CHECK13: arraydestroy.done7: 5628 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5629 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5630 // CHECK13-NEXT: ret i32 [[TMP17]] 5631 // 5632 // 5633 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5634 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5635 // CHECK13-NEXT: entry: 5636 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5637 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5638 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5639 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5640 // CHECK13-NEXT: ret void 5641 // 5642 // 5643 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5644 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5645 // CHECK13-NEXT: entry: 5646 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5647 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5648 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5649 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5650 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5651 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5652 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 5653 // CHECK13-NEXT: ret void 5654 // 5655 // 5656 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5657 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 5658 // CHECK13-NEXT: entry: 5659 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5660 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5661 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5662 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5663 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5664 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 5665 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 5666 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 5667 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 5668 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5669 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5670 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5671 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5672 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5673 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5674 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 5675 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5676 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 5677 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 5678 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1) 5679 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 5680 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 5681 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 5682 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5683 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8 5684 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8 5685 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 5686 // CHECK13-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 8 5687 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 5688 // CHECK13-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 8 5689 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5690 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5691 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5692 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5693 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5694 // CHECK13: omp.inner.for.cond: 5695 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5696 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 5697 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5698 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5699 // CHECK13: omp.inner.for.body: 5700 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5701 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5702 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5703 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 5704 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !6 5705 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 5706 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 5707 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 5708 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 5709 // CHECK13-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8, !llvm.access.group !6 5710 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 5711 // CHECK13-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i64 5712 // CHECK13-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 5713 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 5714 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 5715 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group !6 5716 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5717 // CHECK13: omp.body.continue: 5718 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5719 // CHECK13: omp.inner.for.inc: 5720 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5721 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 5722 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 5723 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 5724 // CHECK13: omp.inner.for.end: 5725 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4 5726 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 5727 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5728 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 5729 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5730 // CHECK13: arraydestroy.body: 5731 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5732 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 5733 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 5734 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5735 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 5736 // CHECK13: arraydestroy.done7: 5737 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5738 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5739 // CHECK13-NEXT: ret i32 [[TMP17]] 5740 // 5741 // 5742 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 5743 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5744 // CHECK13-NEXT: entry: 5745 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5746 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5747 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5748 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5749 // CHECK13-NEXT: ret void 5750 // 5751 // 5752 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 5753 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5754 // CHECK13-NEXT: entry: 5755 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5756 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5757 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5758 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5759 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 5760 // CHECK13-NEXT: ret void 5761 // 5762 // 5763 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 5764 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5765 // CHECK13-NEXT: entry: 5766 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5767 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5768 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5769 // CHECK13-NEXT: ret void 5770 // 5771 // 5772 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 5773 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5774 // CHECK13-NEXT: entry: 5775 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5776 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5777 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5778 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5779 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5780 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 5781 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5782 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 5783 // CHECK13-NEXT: ret void 5784 // 5785 // 5786 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 5787 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5788 // CHECK13-NEXT: entry: 5789 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5790 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5791 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5792 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5793 // CHECK13-NEXT: ret void 5794 // 5795 // 5796 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 5797 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5798 // CHECK13-NEXT: entry: 5799 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5800 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5801 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5802 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5803 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5804 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5805 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 5806 // CHECK13-NEXT: ret void 5807 // 5808 // 5809 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 5810 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5811 // CHECK13-NEXT: entry: 5812 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5813 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5814 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5815 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 5816 // CHECK13-NEXT: ret void 5817 // 5818 // 5819 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 5820 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5821 // CHECK13-NEXT: entry: 5822 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5823 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5824 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5825 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5826 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 5827 // CHECK13-NEXT: ret void 5828 // 5829 // 5830 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 5831 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5832 // CHECK13-NEXT: entry: 5833 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5834 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 5835 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5836 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 5837 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5838 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 5839 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 5840 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 5841 // CHECK13-NEXT: ret void 5842 // 5843 // 5844 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 5845 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5846 // CHECK13-NEXT: entry: 5847 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 5848 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 5849 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 5850 // CHECK13-NEXT: ret void 5851 // 5852 // 5853 // CHECK14-LABEL: define {{[^@]+}}@main 5854 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 5855 // CHECK14-NEXT: entry: 5856 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5857 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 5858 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 4 5859 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 5860 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5861 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5862 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 5863 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 5864 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 5865 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 5866 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 5867 // CHECK14-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5868 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5869 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5870 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5871 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5872 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 5873 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 4 5874 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5875 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5876 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5877 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 5878 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5879 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 5880 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 5881 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 5882 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 5883 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5884 // CHECK14-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 5885 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 5886 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 5887 // CHECK14-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 5888 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 5889 // CHECK14-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 5890 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5891 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 5892 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5893 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5894 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5895 // CHECK14: omp.inner.for.cond: 5896 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5897 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 5898 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5899 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5900 // CHECK14: omp.inner.for.body: 5901 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5902 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5903 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5904 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 5905 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3 5906 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 5907 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 5908 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 5909 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !3 5910 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 5911 // CHECK14-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]] 5912 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 5913 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 5914 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 5915 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5916 // CHECK14: omp.body.continue: 5917 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5918 // CHECK14: omp.inner.for.inc: 5919 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5920 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 5921 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 5922 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5923 // CHECK14: omp.inner.for.end: 5924 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 5925 // CHECK14-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 5926 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5927 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 5928 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 5929 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 5930 // CHECK14: arraydestroy.body: 5931 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 5932 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 5933 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 5934 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 5935 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 5936 // CHECK14: arraydestroy.done6: 5937 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 5938 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 5939 // CHECK14-NEXT: ret i32 [[TMP17]] 5940 // 5941 // 5942 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 5943 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 5944 // CHECK14-NEXT: entry: 5945 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5946 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5947 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5948 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 5949 // CHECK14-NEXT: ret void 5950 // 5951 // 5952 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 5953 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 5954 // CHECK14-NEXT: entry: 5955 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 5956 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 5957 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 5958 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 5959 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 5960 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 5961 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 5962 // CHECK14-NEXT: ret void 5963 // 5964 // 5965 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5966 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 5967 // CHECK14-NEXT: entry: 5968 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5969 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 5970 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5971 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5972 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 5973 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 5974 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 5975 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 5976 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 5977 // CHECK14-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5978 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5979 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5980 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5981 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 5982 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 5983 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 5984 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 5985 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 5986 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 5987 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 5988 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 5989 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 5990 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 5991 // CHECK14-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5992 // CHECK14-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 5993 // CHECK14-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 5994 // CHECK14-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 5995 // CHECK14-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 5996 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 5997 // CHECK14-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 5998 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5999 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 6000 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6001 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6002 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6003 // CHECK14: omp.inner.for.cond: 6004 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6005 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 6006 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6007 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6008 // CHECK14: omp.inner.for.body: 6009 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6010 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 6011 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6012 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 6013 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 6014 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 6015 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 6016 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 6017 // CHECK14-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !7 6018 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 6019 // CHECK14-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP12]] 6020 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 6021 // CHECK14-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 6022 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 6023 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6024 // CHECK14: omp.body.continue: 6025 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6026 // CHECK14: omp.inner.for.inc: 6027 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6028 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 6029 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6030 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 6031 // CHECK14: omp.inner.for.end: 6032 // CHECK14-NEXT: store i32 2, i32* [[I]], align 4 6033 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 6034 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6035 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 6036 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6037 // CHECK14: arraydestroy.body: 6038 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6039 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6040 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 6041 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6042 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 6043 // CHECK14: arraydestroy.done6: 6044 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 6045 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 6046 // CHECK14-NEXT: ret i32 [[TMP17]] 6047 // 6048 // 6049 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 6050 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6051 // CHECK14-NEXT: entry: 6052 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6053 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6054 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6055 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6056 // CHECK14-NEXT: ret void 6057 // 6058 // 6059 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 6060 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6061 // CHECK14-NEXT: entry: 6062 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6063 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6064 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6065 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6066 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 6067 // CHECK14-NEXT: ret void 6068 // 6069 // 6070 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 6071 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6072 // CHECK14-NEXT: entry: 6073 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6074 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6075 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6076 // CHECK14-NEXT: ret void 6077 // 6078 // 6079 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 6080 // CHECK14-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6081 // CHECK14-NEXT: entry: 6082 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6083 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6084 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6085 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6086 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6087 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6088 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6089 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 6090 // CHECK14-NEXT: ret void 6091 // 6092 // 6093 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 6094 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6095 // CHECK14-NEXT: entry: 6096 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6097 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6098 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6099 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 6100 // CHECK14-NEXT: ret void 6101 // 6102 // 6103 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 6104 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6105 // CHECK14-NEXT: entry: 6106 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6107 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6108 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6109 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6110 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6111 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6112 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 6113 // CHECK14-NEXT: ret void 6114 // 6115 // 6116 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 6117 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6118 // CHECK14-NEXT: entry: 6119 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6120 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6121 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6122 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6123 // CHECK14-NEXT: ret void 6124 // 6125 // 6126 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 6127 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6128 // CHECK14-NEXT: entry: 6129 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6130 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6131 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6132 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6133 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 6134 // CHECK14-NEXT: ret void 6135 // 6136 // 6137 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 6138 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6139 // CHECK14-NEXT: entry: 6140 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6141 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6142 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6143 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6144 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6145 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6146 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6147 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 6148 // CHECK14-NEXT: ret void 6149 // 6150 // 6151 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 6152 // CHECK14-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6153 // CHECK14-NEXT: entry: 6154 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6155 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6156 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6157 // CHECK14-NEXT: ret void 6158 // 6159 // 6160 // CHECK15-LABEL: define {{[^@]+}}@main 6161 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 6162 // CHECK15-NEXT: entry: 6163 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6164 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 6165 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 6166 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 6167 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 6168 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 6169 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 6170 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 6171 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 6172 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 6173 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 6174 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 6175 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6176 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6177 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6178 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6179 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 6180 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 6181 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 6182 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 6183 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 6184 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 6185 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 6186 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 6187 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 6188 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 6189 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 6190 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 6191 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4 6192 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4 6193 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 6194 // CHECK15-NEXT: store %struct.S* [[TMP3]], %struct.S** [[_TMP1]], align 4 6195 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4 6196 // CHECK15-NEXT: store %struct.S* [[TMP4]], %struct.S** [[_TMP2]], align 4 6197 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6198 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 6199 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6200 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6201 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6202 // CHECK15: omp.inner.for.cond: 6203 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6204 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 6205 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6206 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6207 // CHECK15: omp.inner.for.body: 6208 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6209 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 6210 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6211 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 6212 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !3 6213 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 6214 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 6215 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 6216 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4, !llvm.access.group !3 6217 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 6218 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP12]] 6219 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 6220 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[TMP11]] to i8* 6221 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !3 6222 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6223 // CHECK15: omp.body.continue: 6224 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6225 // CHECK15: omp.inner.for.inc: 6226 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6227 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 6228 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6229 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 6230 // CHECK15: omp.inner.for.end: 6231 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 6232 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 6233 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6234 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 6235 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 6236 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6237 // CHECK15: arraydestroy.body: 6238 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6239 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6240 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 6241 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6242 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 6243 // CHECK15: arraydestroy.done6: 6244 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 6245 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 6246 // CHECK15-NEXT: ret i32 [[TMP17]] 6247 // 6248 // 6249 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 6250 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 6251 // CHECK15-NEXT: entry: 6252 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6253 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6254 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6255 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 6256 // CHECK15-NEXT: ret void 6257 // 6258 // 6259 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 6260 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6261 // CHECK15-NEXT: entry: 6262 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6263 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6264 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6265 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6266 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6267 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6268 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 6269 // CHECK15-NEXT: ret void 6270 // 6271 // 6272 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 6273 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 6274 // CHECK15-NEXT: entry: 6275 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6276 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 6277 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 6278 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 6279 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 6280 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 6281 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 6282 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 6283 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 6284 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 6285 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6286 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6287 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6288 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6289 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 6290 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 6291 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 6292 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 6293 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6294 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 6295 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 6296 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 6297 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 6298 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6299 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4 6300 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4 6301 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 6302 // CHECK15-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[_TMP1]], align 4 6303 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4 6304 // CHECK15-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP2]], align 4 6305 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6306 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 6307 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6308 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6309 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6310 // CHECK15: omp.inner.for.cond: 6311 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6312 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 6313 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6314 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6315 // CHECK15: omp.inner.for.body: 6316 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6317 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 6318 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6319 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 6320 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR]], align 4, !llvm.access.group !7 6321 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 6322 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP10]] 6323 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 6324 // CHECK15-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4, !llvm.access.group !7 6325 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 6326 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP12]] 6327 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 6328 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8* 6329 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group !7 6330 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6331 // CHECK15: omp.body.continue: 6332 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6333 // CHECK15: omp.inner.for.inc: 6334 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6335 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 6336 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 6337 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 6338 // CHECK15: omp.inner.for.end: 6339 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4 6340 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 6341 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 6342 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 6343 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 6344 // CHECK15: arraydestroy.body: 6345 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP16]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 6346 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 6347 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 6348 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 6349 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 6350 // CHECK15: arraydestroy.done6: 6351 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 6352 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 6353 // CHECK15-NEXT: ret i32 [[TMP17]] 6354 // 6355 // 6356 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 6357 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6358 // CHECK15-NEXT: entry: 6359 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6360 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6361 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6362 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6363 // CHECK15-NEXT: ret void 6364 // 6365 // 6366 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 6367 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6368 // CHECK15-NEXT: entry: 6369 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6370 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6371 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6372 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6373 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 6374 // CHECK15-NEXT: ret void 6375 // 6376 // 6377 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 6378 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6379 // CHECK15-NEXT: entry: 6380 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6381 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6382 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6383 // CHECK15-NEXT: ret void 6384 // 6385 // 6386 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 6387 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6388 // CHECK15-NEXT: entry: 6389 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 6390 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 6391 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 6392 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 6393 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 6394 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 6395 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 6396 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 6397 // CHECK15-NEXT: ret void 6398 // 6399 // 6400 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 6401 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6402 // CHECK15-NEXT: entry: 6403 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6404 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6405 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6406 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 6407 // CHECK15-NEXT: ret void 6408 // 6409 // 6410 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 6411 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6412 // CHECK15-NEXT: entry: 6413 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6414 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6415 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6416 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6417 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6418 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6419 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 6420 // CHECK15-NEXT: ret void 6421 // 6422 // 6423 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 6424 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6425 // CHECK15-NEXT: entry: 6426 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6427 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6428 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6429 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 6430 // CHECK15-NEXT: ret void 6431 // 6432 // 6433 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 6434 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6435 // CHECK15-NEXT: entry: 6436 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6437 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6438 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6439 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6440 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 6441 // CHECK15-NEXT: ret void 6442 // 6443 // 6444 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 6445 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6446 // CHECK15-NEXT: entry: 6447 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6448 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 6449 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6450 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 6451 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6452 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 6453 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 6454 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 6455 // CHECK15-NEXT: ret void 6456 // 6457 // 6458 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 6459 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 6460 // CHECK15-NEXT: entry: 6461 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 6462 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 6463 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 6464 // CHECK15-NEXT: ret void 6465 // 6466