1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // add -fopenmp-targets
3 
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // expected-no-diagnostics
12 #ifndef HEADER
13 #define HEADER
14 
15 typedef __INTPTR_TYPE__ intptr_t;
16 
17 
18 void foo();
19 
20 struct S {
21   intptr_t a, b, c;
22   S(intptr_t a) : a(a) {}
23   operator char() { return a; }
24   ~S() {}
25 };
26 
27 template <typename T>
28 T tmain() {
29 #pragma omp target
30 #pragma omp teams
31 #pragma omp distribute parallel for proc_bind(master)
32   for(int i = 0; i < 1000; i++) {}
33   return T();
34 }
35 
36 int main() {
37 #pragma omp target
38 #pragma omp teams
39 #pragma omp distribute parallel for proc_bind(spread)
40   for(int i = 0; i < 1000; i++) {}
41 #pragma omp target
42 #pragma omp teams
43 #pragma omp distribute parallel for proc_bind(close)
44   for(int i = 0; i < 1000; i++) {}
45   return tmain<int>();
46 }
47 
48 
49 
50 
51 
52 
53 
54 
55 #endif
56 // CHECK1-LABEL: define {{[^@]+}}@main
57 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
58 // CHECK1-NEXT:  entry:
59 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
60 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
61 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
62 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
63 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
64 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
65 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
66 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
67 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
68 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
69 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
70 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
71 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
72 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
73 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
74 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
75 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
76 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
77 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
78 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
79 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
80 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
81 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
82 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
83 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
84 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
85 // CHECK1:       omp_offload.failed:
86 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37() #[[ATTR2:[0-9]+]]
87 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
88 // CHECK1:       omp_offload.cont:
89 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
90 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
91 // CHECK1-NEXT:    store i32 1, i32* [[TMP11]], align 4
92 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
93 // CHECK1-NEXT:    store i32 0, i32* [[TMP12]], align 4
94 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
95 // CHECK1-NEXT:    store i8** null, i8*** [[TMP13]], align 8
96 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
97 // CHECK1-NEXT:    store i8** null, i8*** [[TMP14]], align 8
98 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
99 // CHECK1-NEXT:    store i64* null, i64** [[TMP15]], align 8
100 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
101 // CHECK1-NEXT:    store i64* null, i64** [[TMP16]], align 8
102 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
103 // CHECK1-NEXT:    store i8** null, i8*** [[TMP17]], align 8
104 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
105 // CHECK1-NEXT:    store i8** null, i8*** [[TMP18]], align 8
106 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
107 // CHECK1-NEXT:    store i64 1000, i64* [[TMP19]], align 8
108 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
109 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
110 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
111 // CHECK1:       omp_offload.failed3:
112 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41() #[[ATTR2]]
113 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
114 // CHECK1:       omp_offload.cont4:
115 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
116 // CHECK1-NEXT:    ret i32 [[CALL]]
117 //
118 //
119 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37
120 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
121 // CHECK1-NEXT:  entry:
122 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
123 // CHECK1-NEXT:    ret void
124 //
125 //
126 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
127 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
128 // CHECK1-NEXT:  entry:
129 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
130 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
131 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
132 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
133 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
134 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
135 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
136 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
137 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
138 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
139 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
140 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
141 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
142 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
143 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
144 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
145 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
146 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
147 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
148 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
149 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
150 // CHECK1:       cond.true:
151 // CHECK1-NEXT:    br label [[COND_END:%.*]]
152 // CHECK1:       cond.false:
153 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
154 // CHECK1-NEXT:    br label [[COND_END]]
155 // CHECK1:       cond.end:
156 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
157 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
158 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
159 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
160 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
161 // CHECK1:       omp.inner.for.cond:
162 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
163 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
164 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
165 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
166 // CHECK1:       omp.inner.for.body:
167 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 4)
168 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
169 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
170 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
171 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
172 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
173 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
174 // CHECK1:       omp.inner.for.inc:
175 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
176 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
177 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
178 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
179 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
180 // CHECK1:       omp.inner.for.end:
181 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
182 // CHECK1:       omp.loop.exit:
183 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
184 // CHECK1-NEXT:    ret void
185 //
186 //
187 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
188 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
189 // CHECK1-NEXT:  entry:
190 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
191 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
192 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
193 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
194 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
199 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
201 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
202 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
203 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
204 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
205 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
206 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
207 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
208 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
209 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
210 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
211 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
212 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
213 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
214 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
215 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
216 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
217 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
218 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
219 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
220 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
221 // CHECK1:       cond.true:
222 // CHECK1-NEXT:    br label [[COND_END:%.*]]
223 // CHECK1:       cond.false:
224 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
225 // CHECK1-NEXT:    br label [[COND_END]]
226 // CHECK1:       cond.end:
227 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
228 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
229 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
230 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
231 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
232 // CHECK1:       omp.inner.for.cond:
233 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
234 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
235 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
236 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
237 // CHECK1:       omp.inner.for.body:
238 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
239 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
240 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
241 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
242 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
243 // CHECK1:       omp.body.continue:
244 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
245 // CHECK1:       omp.inner.for.inc:
246 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
247 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
248 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
249 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
250 // CHECK1:       omp.inner.for.end:
251 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
252 // CHECK1:       omp.loop.exit:
253 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
254 // CHECK1-NEXT:    ret void
255 //
256 //
257 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41
258 // CHECK1-SAME: () #[[ATTR1]] {
259 // CHECK1-NEXT:  entry:
260 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
261 // CHECK1-NEXT:    ret void
262 //
263 //
264 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
265 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
266 // CHECK1-NEXT:  entry:
267 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
268 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
269 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
272 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
273 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
274 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
275 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
276 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
277 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
278 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
279 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
280 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
281 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
282 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
283 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
284 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
285 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
286 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
287 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
288 // CHECK1:       cond.true:
289 // CHECK1-NEXT:    br label [[COND_END:%.*]]
290 // CHECK1:       cond.false:
291 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
292 // CHECK1-NEXT:    br label [[COND_END]]
293 // CHECK1:       cond.end:
294 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
295 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
296 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
297 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
298 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
299 // CHECK1:       omp.inner.for.cond:
300 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
301 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
302 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
303 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
304 // CHECK1:       omp.inner.for.body:
305 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 3)
306 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
307 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
308 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
309 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
310 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
311 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
312 // CHECK1:       omp.inner.for.inc:
313 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
314 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
315 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
316 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
317 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
318 // CHECK1:       omp.inner.for.end:
319 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
320 // CHECK1:       omp.loop.exit:
321 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
322 // CHECK1-NEXT:    ret void
323 //
324 //
325 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
326 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
327 // CHECK1-NEXT:  entry:
328 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
329 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
330 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
331 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
332 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
334 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
335 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
336 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
337 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
338 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
339 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
340 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
341 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
342 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
343 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
344 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
345 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
346 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
347 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
348 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
349 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
350 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
351 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
352 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
353 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
354 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
355 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
356 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
357 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
358 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
359 // CHECK1:       cond.true:
360 // CHECK1-NEXT:    br label [[COND_END:%.*]]
361 // CHECK1:       cond.false:
362 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
363 // CHECK1-NEXT:    br label [[COND_END]]
364 // CHECK1:       cond.end:
365 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
366 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
367 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
368 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
369 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
370 // CHECK1:       omp.inner.for.cond:
371 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
372 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
373 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
374 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
375 // CHECK1:       omp.inner.for.body:
376 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
377 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
378 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
379 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
380 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
381 // CHECK1:       omp.body.continue:
382 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
383 // CHECK1:       omp.inner.for.inc:
384 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
385 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
386 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
387 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
388 // CHECK1:       omp.inner.for.end:
389 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
390 // CHECK1:       omp.loop.exit:
391 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
392 // CHECK1-NEXT:    ret void
393 //
394 //
395 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
396 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat {
397 // CHECK1-NEXT:  entry:
398 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
399 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
400 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
401 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
402 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
403 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
404 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
405 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
406 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
407 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
408 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
409 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
410 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
411 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
412 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
413 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
414 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
415 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
416 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
417 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
418 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
419 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
420 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
421 // CHECK1:       omp_offload.failed:
422 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29() #[[ATTR2]]
423 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
424 // CHECK1:       omp_offload.cont:
425 // CHECK1-NEXT:    ret i32 0
426 //
427 //
428 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29
429 // CHECK1-SAME: () #[[ATTR1]] {
430 // CHECK1-NEXT:  entry:
431 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
432 // CHECK1-NEXT:    ret void
433 //
434 //
435 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
436 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
437 // CHECK1-NEXT:  entry:
438 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
439 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
440 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
446 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
448 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
449 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
450 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
451 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
452 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
453 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
454 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
455 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
456 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
457 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
458 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
459 // CHECK1:       cond.true:
460 // CHECK1-NEXT:    br label [[COND_END:%.*]]
461 // CHECK1:       cond.false:
462 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
463 // CHECK1-NEXT:    br label [[COND_END]]
464 // CHECK1:       cond.end:
465 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
466 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
467 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
468 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
470 // CHECK1:       omp.inner.for.cond:
471 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
472 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
473 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
474 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
475 // CHECK1:       omp.inner.for.body:
476 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
477 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
478 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
479 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
480 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
481 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
482 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
483 // CHECK1:       omp.inner.for.inc:
484 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
485 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
486 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
487 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
488 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
489 // CHECK1:       omp.inner.for.end:
490 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
491 // CHECK1:       omp.loop.exit:
492 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
493 // CHECK1-NEXT:    ret void
494 //
495 //
496 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
497 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
498 // CHECK1-NEXT:  entry:
499 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
500 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
501 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
502 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
503 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
505 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
506 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
507 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
508 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
509 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
510 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
511 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
512 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
513 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
514 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
515 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
516 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
517 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
518 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
519 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
520 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
521 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
522 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
523 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
524 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
525 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
526 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
527 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
528 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
529 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
530 // CHECK1:       cond.true:
531 // CHECK1-NEXT:    br label [[COND_END:%.*]]
532 // CHECK1:       cond.false:
533 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
534 // CHECK1-NEXT:    br label [[COND_END]]
535 // CHECK1:       cond.end:
536 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
537 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
538 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
539 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
540 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
541 // CHECK1:       omp.inner.for.cond:
542 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
543 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
544 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
545 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
546 // CHECK1:       omp.inner.for.body:
547 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
548 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
549 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
550 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
551 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
552 // CHECK1:       omp.body.continue:
553 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
554 // CHECK1:       omp.inner.for.inc:
555 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
556 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
557 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
558 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
559 // CHECK1:       omp.inner.for.end:
560 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
561 // CHECK1:       omp.loop.exit:
562 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
563 // CHECK1-NEXT:    ret void
564 //
565 //
566 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
567 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
568 // CHECK1-NEXT:  entry:
569 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
570 // CHECK1-NEXT:    ret void
571 //
572