1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // add -fopenmp-targets
3 
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // expected-no-diagnostics
12 #ifndef HEADER
13 #define HEADER
14 
15 typedef __INTPTR_TYPE__ intptr_t;
16 
17 
18 void foo();
19 
20 struct S {
21   intptr_t a, b, c;
22   S(intptr_t a) : a(a) {}
23   operator char() { return a; }
24   ~S() {}
25 };
26 
27 template <typename T>
28 T tmain() {
29 #pragma omp target
30 #pragma omp teams
31 #pragma omp distribute parallel for proc_bind(master)
32   for(int i = 0; i < 1000; i++) {}
33   return T();
34 }
35 
36 int main() {
37 #pragma omp target
38 #pragma omp teams
39 #pragma omp distribute parallel for proc_bind(spread)
40   for(int i = 0; i < 1000; i++) {}
41 #pragma omp target
42 #pragma omp teams
43 #pragma omp distribute parallel for proc_bind(close)
44   for(int i = 0; i < 1000; i++) {}
45   return tmain<int>();
46 }
47 
48 
49 
50 
51 
52 
53 
54 
55 #endif
56 // CHECK1-LABEL: define {{[^@]+}}@main
57 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
58 // CHECK1-NEXT:  entry:
59 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
60 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
61 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
62 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
63 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 1000)
64 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
65 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
66 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
67 // CHECK1:       omp_offload.failed:
68 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37() #[[ATTR2:[0-9]+]]
69 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
70 // CHECK1:       omp_offload.cont:
71 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 1000)
72 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
73 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
74 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
75 // CHECK1:       omp_offload.failed2:
76 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41() #[[ATTR2]]
77 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
78 // CHECK1:       omp_offload.cont3:
79 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
80 // CHECK1-NEXT:    ret i32 [[CALL]]
81 //
82 //
83 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37
84 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
85 // CHECK1-NEXT:  entry:
86 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
87 // CHECK1-NEXT:    ret void
88 //
89 //
90 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
91 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
92 // CHECK1-NEXT:  entry:
93 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
94 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
95 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
96 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
97 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
98 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
99 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
101 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
102 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
103 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
104 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
105 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
106 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
107 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
108 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
109 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
110 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
111 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
112 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
113 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
114 // CHECK1:       cond.true:
115 // CHECK1-NEXT:    br label [[COND_END:%.*]]
116 // CHECK1:       cond.false:
117 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
118 // CHECK1-NEXT:    br label [[COND_END]]
119 // CHECK1:       cond.end:
120 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
121 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
122 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
123 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
124 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
125 // CHECK1:       omp.inner.for.cond:
126 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
127 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
128 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
129 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
130 // CHECK1:       omp.inner.for.body:
131 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 4)
132 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
133 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
134 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
135 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
136 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
137 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
138 // CHECK1:       omp.inner.for.inc:
139 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
140 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
141 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
142 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
143 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
144 // CHECK1:       omp.inner.for.end:
145 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
146 // CHECK1:       omp.loop.exit:
147 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
148 // CHECK1-NEXT:    ret void
149 //
150 //
151 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
152 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
153 // CHECK1-NEXT:  entry:
154 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
155 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
156 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
157 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
158 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
159 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
160 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
161 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
162 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
163 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
164 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
165 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
166 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
167 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
168 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
169 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
170 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
171 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
172 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
173 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
174 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
175 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
176 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
177 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
178 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
179 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
180 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
181 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
182 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
183 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
184 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
185 // CHECK1:       cond.true:
186 // CHECK1-NEXT:    br label [[COND_END:%.*]]
187 // CHECK1:       cond.false:
188 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
189 // CHECK1-NEXT:    br label [[COND_END]]
190 // CHECK1:       cond.end:
191 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
192 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
193 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
194 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
195 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
196 // CHECK1:       omp.inner.for.cond:
197 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
198 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
199 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
200 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
201 // CHECK1:       omp.inner.for.body:
202 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
203 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
204 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
205 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
206 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
207 // CHECK1:       omp.body.continue:
208 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
209 // CHECK1:       omp.inner.for.inc:
210 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
211 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
212 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
213 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
214 // CHECK1:       omp.inner.for.end:
215 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
216 // CHECK1:       omp.loop.exit:
217 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
218 // CHECK1-NEXT:    ret void
219 //
220 //
221 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41
222 // CHECK1-SAME: () #[[ATTR1]] {
223 // CHECK1-NEXT:  entry:
224 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
225 // CHECK1-NEXT:    ret void
226 //
227 //
228 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
229 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
230 // CHECK1-NEXT:  entry:
231 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
232 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
233 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
234 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
236 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
241 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
242 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
243 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
244 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
245 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
246 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
247 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
248 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
249 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
250 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
251 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
252 // CHECK1:       cond.true:
253 // CHECK1-NEXT:    br label [[COND_END:%.*]]
254 // CHECK1:       cond.false:
255 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
256 // CHECK1-NEXT:    br label [[COND_END]]
257 // CHECK1:       cond.end:
258 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
259 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
260 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
261 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
262 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
263 // CHECK1:       omp.inner.for.cond:
264 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
265 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
266 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
267 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
268 // CHECK1:       omp.inner.for.body:
269 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 3)
270 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
271 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
272 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
273 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
274 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
275 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
276 // CHECK1:       omp.inner.for.inc:
277 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
278 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
279 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
280 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
281 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
282 // CHECK1:       omp.inner.for.end:
283 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
284 // CHECK1:       omp.loop.exit:
285 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
286 // CHECK1-NEXT:    ret void
287 //
288 //
289 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
290 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
291 // CHECK1-NEXT:  entry:
292 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
293 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
294 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
295 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
296 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
297 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
298 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
299 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
300 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
301 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
302 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
303 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
304 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
305 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
306 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
307 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
308 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
309 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
310 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
311 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
312 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
313 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
314 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
315 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
316 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
317 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
318 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
319 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
320 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
321 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
322 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
323 // CHECK1:       cond.true:
324 // CHECK1-NEXT:    br label [[COND_END:%.*]]
325 // CHECK1:       cond.false:
326 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
327 // CHECK1-NEXT:    br label [[COND_END]]
328 // CHECK1:       cond.end:
329 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
330 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
331 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
332 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
333 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
334 // CHECK1:       omp.inner.for.cond:
335 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
336 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
337 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
338 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
339 // CHECK1:       omp.inner.for.body:
340 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
341 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
342 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
343 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
344 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
345 // CHECK1:       omp.body.continue:
346 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
347 // CHECK1:       omp.inner.for.inc:
348 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
349 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
350 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
351 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
352 // CHECK1:       omp.inner.for.end:
353 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
354 // CHECK1:       omp.loop.exit:
355 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
356 // CHECK1-NEXT:    ret void
357 //
358 //
359 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
360 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat {
361 // CHECK1-NEXT:  entry:
362 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 1000)
364 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
365 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
366 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
367 // CHECK1:       omp_offload.failed:
368 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29() #[[ATTR2]]
369 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
370 // CHECK1:       omp_offload.cont:
371 // CHECK1-NEXT:    ret i32 0
372 //
373 //
374 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29
375 // CHECK1-SAME: () #[[ATTR1]] {
376 // CHECK1-NEXT:  entry:
377 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
378 // CHECK1-NEXT:    ret void
379 //
380 //
381 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
382 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
383 // CHECK1-NEXT:  entry:
384 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
385 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
386 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
387 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
388 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
389 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
390 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
391 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
392 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
393 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
394 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
395 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
396 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
397 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
398 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
399 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
400 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
401 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
402 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
403 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
404 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
405 // CHECK1:       cond.true:
406 // CHECK1-NEXT:    br label [[COND_END:%.*]]
407 // CHECK1:       cond.false:
408 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
409 // CHECK1-NEXT:    br label [[COND_END]]
410 // CHECK1:       cond.end:
411 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
412 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
413 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
414 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
415 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
416 // CHECK1:       omp.inner.for.cond:
417 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
418 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
419 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
420 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
421 // CHECK1:       omp.inner.for.body:
422 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
423 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
424 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
425 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
426 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
427 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
428 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
429 // CHECK1:       omp.inner.for.inc:
430 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
431 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
432 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
433 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
434 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
435 // CHECK1:       omp.inner.for.end:
436 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
437 // CHECK1:       omp.loop.exit:
438 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
439 // CHECK1-NEXT:    ret void
440 //
441 //
442 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
443 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
444 // CHECK1-NEXT:  entry:
445 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
446 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
447 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
448 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
449 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
450 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
451 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
454 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
457 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
458 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
459 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
460 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
461 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
462 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
463 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
464 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
465 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
466 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
467 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
468 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
469 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
470 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
471 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
472 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
473 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
474 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
475 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
476 // CHECK1:       cond.true:
477 // CHECK1-NEXT:    br label [[COND_END:%.*]]
478 // CHECK1:       cond.false:
479 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
480 // CHECK1-NEXT:    br label [[COND_END]]
481 // CHECK1:       cond.end:
482 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
483 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
484 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
485 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
486 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
487 // CHECK1:       omp.inner.for.cond:
488 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
489 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
490 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
491 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
492 // CHECK1:       omp.inner.for.body:
493 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
494 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
495 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
496 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
497 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
498 // CHECK1:       omp.body.continue:
499 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
500 // CHECK1:       omp.inner.for.inc:
501 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
502 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
503 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
504 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
505 // CHECK1:       omp.inner.for.end:
506 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
507 // CHECK1:       omp.loop.exit:
508 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
509 // CHECK1-NEXT:    ret void
510 //
511 //
512 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
513 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
514 // CHECK1-NEXT:  entry:
515 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
516 // CHECK1-NEXT:    ret void
517 //
518