1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute parallel for private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 73 74 g = 1; 75 g1 = 1; 76 svar = 3; 77 sfvar = 4.0; 78 [&]() { 79 g = 2; 80 g1 = 2; 81 svar = 4; 82 sfvar = 8.0; 83 84 }(); 85 } 86 }(); 87 return 0; 88 #else 89 S<float> test; 90 int t_var = 0; 91 int vec[] = {1, 2}; 92 S<float> s_arr[] = {1, 2}; 93 S<float> &var = test; 94 95 #pragma omp target 96 #pragma omp teams 97 #pragma omp distribute parallel for private(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 return tmain<int>(); 103 #endif 104 } 105 106 107 108 // this is the ctor loop 109 110 // call destructors: var.. 111 112 // ..and s_arr 113 114 115 // By OpenMP specifications, private applies to both distribute and parallel for. 116 // However, the support for 'private' of 'parallel' is only used when 'parallel' 117 // is found alone. Therefore we only have one 'private' support for 'parallel for' 118 // in combination 119 // this is the ctor loop 120 121 // call destructors: var.. 122 123 // ..and s_arr 124 125 126 // template tmain with S_INT_TY 127 128 129 130 // this is the ctor loop 131 132 // call destructors: var.. 133 134 // ..and s_arr 135 136 137 #endif 138 // CHECK1-LABEL: define {{[^@]+}}@main 139 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 140 // CHECK1-NEXT: entry: 141 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 142 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 143 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8 144 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 145 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 146 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8 147 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 148 // CHECK1-NEXT: ret i32 0 149 // 150 // 151 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 152 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 153 // CHECK1-NEXT: entry: 154 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 155 // CHECK1-NEXT: ret void 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 159 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 162 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 163 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 166 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 171 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 172 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 173 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 175 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 176 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 177 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 178 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 184 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 185 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 186 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 187 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 188 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 189 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 190 // CHECK1: cond.true: 191 // CHECK1-NEXT: br label [[COND_END:%.*]] 192 // CHECK1: cond.false: 193 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 194 // CHECK1-NEXT: br label [[COND_END]] 195 // CHECK1: cond.end: 196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 197 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 199 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 201 // CHECK1: omp.inner.for.cond: 202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 203 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 204 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 205 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 206 // CHECK1: omp.inner.for.body: 207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 208 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 209 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 210 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 211 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 213 // CHECK1: omp.inner.for.inc: 214 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 215 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 216 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 217 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 219 // CHECK1: omp.inner.for.end: 220 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 221 // CHECK1: omp.loop.exit: 222 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 223 // CHECK1-NEXT: ret void 224 // 225 // 226 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 227 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 228 // CHECK1-NEXT: entry: 229 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 230 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 231 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 232 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 233 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 236 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 241 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 242 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca double*, align 8 243 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 245 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 247 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 248 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 249 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 250 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 251 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8 252 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 253 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 254 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 255 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 256 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 257 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 258 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 259 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 262 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP3]], align 8 263 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 264 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 265 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 266 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 267 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 268 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 269 // CHECK1: cond.true: 270 // CHECK1-NEXT: br label [[COND_END:%.*]] 271 // CHECK1: cond.false: 272 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 273 // CHECK1-NEXT: br label [[COND_END]] 274 // CHECK1: cond.end: 275 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 276 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 277 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 278 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 280 // CHECK1: omp.inner.for.cond: 281 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 283 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 284 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 285 // CHECK1: omp.inner.for.body: 286 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 288 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 289 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 290 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8 291 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8 292 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8 293 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4 294 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 295 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 296 // CHECK1-NEXT: store double* [[G]], double** [[TMP11]], align 8 297 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 298 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8 299 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8 300 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 301 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8 302 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 303 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8 304 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 305 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 306 // CHECK1: omp.body.continue: 307 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 308 // CHECK1: omp.inner.for.inc: 309 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 310 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 311 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 312 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 313 // CHECK1: omp.inner.for.end: 314 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 315 // CHECK1: omp.loop.exit: 316 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 317 // CHECK1-NEXT: ret void 318 // 319 // 320 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 321 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 322 // CHECK1-NEXT: entry: 323 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 324 // CHECK1-NEXT: ret void 325 // 326 // 327 // CHECK2-LABEL: define {{[^@]+}}@main 328 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 329 // CHECK2-NEXT: entry: 330 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 331 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 332 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8 333 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 334 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 335 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8 336 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 337 // CHECK2-NEXT: ret i32 0 338 // 339 // 340 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 341 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] { 342 // CHECK2-NEXT: entry: 343 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 344 // CHECK2-NEXT: ret void 345 // 346 // 347 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 348 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 349 // CHECK2-NEXT: entry: 350 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 351 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 352 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 353 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 354 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 355 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 356 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 357 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 358 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 359 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 360 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 361 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 362 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 363 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 364 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 365 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 366 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 367 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 368 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 369 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 370 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 371 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 372 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 373 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 374 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 375 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 376 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 377 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 378 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 379 // CHECK2: cond.true: 380 // CHECK2-NEXT: br label [[COND_END:%.*]] 381 // CHECK2: cond.false: 382 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 383 // CHECK2-NEXT: br label [[COND_END]] 384 // CHECK2: cond.end: 385 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 386 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 387 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 388 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 389 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 390 // CHECK2: omp.inner.for.cond: 391 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 392 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 393 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 394 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 395 // CHECK2: omp.inner.for.body: 396 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 397 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 398 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 399 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 400 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 401 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 402 // CHECK2: omp.inner.for.inc: 403 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 404 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 405 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 406 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 407 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 408 // CHECK2: omp.inner.for.end: 409 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 410 // CHECK2: omp.loop.exit: 411 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 412 // CHECK2-NEXT: ret void 413 // 414 // 415 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 416 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 417 // CHECK2-NEXT: entry: 418 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 419 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 420 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 421 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 422 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 423 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 424 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 425 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 426 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 427 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 428 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 429 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8 430 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8 431 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca double*, align 8 432 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 433 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4 434 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 435 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 436 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 437 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 438 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 439 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 440 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8 441 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 442 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 443 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 444 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 445 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 446 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 447 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 448 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 449 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 450 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 451 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP3]], align 8 452 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 453 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 454 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 455 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 456 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 457 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 458 // CHECK2: cond.true: 459 // CHECK2-NEXT: br label [[COND_END:%.*]] 460 // CHECK2: cond.false: 461 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 462 // CHECK2-NEXT: br label [[COND_END]] 463 // CHECK2: cond.end: 464 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 465 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 466 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 467 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 468 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 469 // CHECK2: omp.inner.for.cond: 470 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 471 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 472 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 473 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 474 // CHECK2: omp.inner.for.body: 475 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 476 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 477 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 478 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 479 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8 480 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8 481 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8 482 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4 483 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 484 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 485 // CHECK2-NEXT: store double* [[G]], double** [[TMP11]], align 8 486 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 487 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8 488 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8 489 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 490 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8 491 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 492 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8 493 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 494 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 495 // CHECK2: omp.body.continue: 496 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 497 // CHECK2: omp.inner.for.inc: 498 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 499 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 500 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 501 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 502 // CHECK2: omp.inner.for.end: 503 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 504 // CHECK2: omp.loop.exit: 505 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 506 // CHECK2-NEXT: ret void 507 // 508 // 509 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 510 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 511 // CHECK2-NEXT: entry: 512 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 513 // CHECK2-NEXT: ret void 514 // 515 // 516 // CHECK3-LABEL: define {{[^@]+}}@main 517 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 518 // CHECK3-NEXT: entry: 519 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 520 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 521 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4 522 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 523 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 524 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4 525 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 526 // CHECK3-NEXT: ret i32 0 527 // 528 // 529 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 530 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 531 // CHECK3-NEXT: entry: 532 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 533 // CHECK3-NEXT: ret void 534 // 535 // 536 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 537 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 538 // CHECK3-NEXT: entry: 539 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 540 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 541 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 542 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 543 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 544 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 545 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 546 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 547 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 548 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 549 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 550 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 551 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 552 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 553 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 554 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 555 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 556 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 557 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 558 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 559 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 560 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 561 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 562 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 563 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 564 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 565 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 566 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 567 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 568 // CHECK3: cond.true: 569 // CHECK3-NEXT: br label [[COND_END:%.*]] 570 // CHECK3: cond.false: 571 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 572 // CHECK3-NEXT: br label [[COND_END]] 573 // CHECK3: cond.end: 574 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 575 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 576 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 577 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 579 // CHECK3: omp.inner.for.cond: 580 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 581 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 582 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 583 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 584 // CHECK3: omp.inner.for.body: 585 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 586 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 587 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 588 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 589 // CHECK3: omp.inner.for.inc: 590 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 591 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 592 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 593 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 594 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 595 // CHECK3: omp.inner.for.end: 596 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 597 // CHECK3: omp.loop.exit: 598 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 599 // CHECK3-NEXT: ret void 600 // 601 // 602 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 603 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 604 // CHECK3-NEXT: entry: 605 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 606 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 607 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 608 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 609 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 610 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 611 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 612 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 613 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 614 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 615 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 616 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 617 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 618 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 619 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 620 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 621 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 622 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 623 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 624 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 625 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 626 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 627 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4 628 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 629 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 630 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 631 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 632 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 633 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 634 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 635 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 636 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 637 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 638 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 639 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 640 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 641 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 642 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 643 // CHECK3: cond.true: 644 // CHECK3-NEXT: br label [[COND_END:%.*]] 645 // CHECK3: cond.false: 646 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 647 // CHECK3-NEXT: br label [[COND_END]] 648 // CHECK3: cond.end: 649 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 650 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 651 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 652 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 654 // CHECK3: omp.inner.for.cond: 655 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 656 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 657 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 658 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 659 // CHECK3: omp.inner.for.body: 660 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 661 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 662 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 663 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 664 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8 665 // CHECK3-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4 666 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4 667 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4 668 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 669 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 670 // CHECK3-NEXT: store double* [[G]], double** [[TMP11]], align 4 671 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 672 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4 673 // CHECK3-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4 674 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 675 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4 676 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 677 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4 678 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 679 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 680 // CHECK3: omp.body.continue: 681 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 682 // CHECK3: omp.inner.for.inc: 683 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 684 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1 685 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 686 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 687 // CHECK3: omp.inner.for.end: 688 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 689 // CHECK3: omp.loop.exit: 690 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 691 // CHECK3-NEXT: ret void 692 // 693 // 694 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 695 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 696 // CHECK3-NEXT: entry: 697 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 698 // CHECK3-NEXT: ret void 699 // 700 // 701 // CHECK4-LABEL: define {{[^@]+}}@main 702 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 703 // CHECK4-NEXT: entry: 704 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 705 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 706 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4 707 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 708 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 709 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4 710 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 711 // CHECK4-NEXT: ret i32 0 712 // 713 // 714 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 715 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] { 716 // CHECK4-NEXT: entry: 717 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 718 // CHECK4-NEXT: ret void 719 // 720 // 721 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 722 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 723 // CHECK4-NEXT: entry: 724 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 725 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 726 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 727 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 728 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 729 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 730 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 731 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 732 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 733 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 734 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 735 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 736 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 737 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 738 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 739 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 740 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 741 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 742 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 743 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 744 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 745 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 746 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 747 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 748 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 749 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 750 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 751 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 752 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 753 // CHECK4: cond.true: 754 // CHECK4-NEXT: br label [[COND_END:%.*]] 755 // CHECK4: cond.false: 756 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 757 // CHECK4-NEXT: br label [[COND_END]] 758 // CHECK4: cond.end: 759 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 760 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 761 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 762 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 763 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 764 // CHECK4: omp.inner.for.cond: 765 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 766 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 767 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 768 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 769 // CHECK4: omp.inner.for.body: 770 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 771 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 772 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 773 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 774 // CHECK4: omp.inner.for.inc: 775 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 776 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 777 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 778 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 779 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 780 // CHECK4: omp.inner.for.end: 781 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 782 // CHECK4: omp.loop.exit: 783 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 784 // CHECK4-NEXT: ret void 785 // 786 // 787 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 788 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 789 // CHECK4-NEXT: entry: 790 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 791 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 792 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 793 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 794 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 795 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 796 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4 797 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 798 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 799 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 800 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 801 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 802 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 803 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4 804 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 805 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 806 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 807 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 808 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 809 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 810 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 811 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 812 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4 813 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 814 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 815 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 816 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 817 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 818 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 819 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 820 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 821 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4 822 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 823 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 824 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 825 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 826 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 827 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 828 // CHECK4: cond.true: 829 // CHECK4-NEXT: br label [[COND_END:%.*]] 830 // CHECK4: cond.false: 831 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 832 // CHECK4-NEXT: br label [[COND_END]] 833 // CHECK4: cond.end: 834 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 835 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 836 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 837 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 838 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 839 // CHECK4: omp.inner.for.cond: 840 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 841 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 842 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 843 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 844 // CHECK4: omp.inner.for.body: 845 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 846 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 847 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 848 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 849 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8 850 // CHECK4-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4 851 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4 852 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4 853 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 854 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 855 // CHECK4-NEXT: store double* [[G]], double** [[TMP11]], align 4 856 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 857 // CHECK4-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4 858 // CHECK4-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4 859 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 860 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4 861 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 862 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4 863 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 864 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 865 // CHECK4: omp.body.continue: 866 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 867 // CHECK4: omp.inner.for.inc: 868 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 869 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1 870 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 871 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 872 // CHECK4: omp.inner.for.end: 873 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 874 // CHECK4: omp.loop.exit: 875 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 876 // CHECK4-NEXT: ret void 877 // 878 // 879 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 880 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 881 // CHECK4-NEXT: entry: 882 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 883 // CHECK4-NEXT: ret void 884 // 885 // 886 // CHECK5-LABEL: define {{[^@]+}}@main 887 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 888 // CHECK5-NEXT: entry: 889 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 890 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 891 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8 892 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 893 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 894 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8 895 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 896 // CHECK5-NEXT: ret i32 0 897 // 898 // 899 // CHECK6-LABEL: define {{[^@]+}}@main 900 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 901 // CHECK6-NEXT: entry: 902 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 903 // CHECK6-NEXT: [[G:%.*]] = alloca double, align 8 904 // CHECK6-NEXT: [[G1:%.*]] = alloca double*, align 8 905 // CHECK6-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 906 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 907 // CHECK6-NEXT: store double* [[G]], double** [[G1]], align 8 908 // CHECK6-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 909 // CHECK6-NEXT: ret i32 0 910 // 911 // 912 // CHECK7-LABEL: define {{[^@]+}}@main 913 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 914 // CHECK7-NEXT: entry: 915 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 916 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 917 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4 918 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 919 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 920 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4 921 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 922 // CHECK7-NEXT: ret i32 0 923 // 924 // 925 // CHECK8-LABEL: define {{[^@]+}}@main 926 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 927 // CHECK8-NEXT: entry: 928 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 929 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 930 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 4 931 // CHECK8-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 932 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 933 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 4 934 // CHECK8-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 935 // CHECK8-NEXT: ret i32 0 936 // 937 // 938 // CHECK9-LABEL: define {{[^@]+}}@main 939 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 940 // CHECK9-NEXT: entry: 941 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 942 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 943 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8 944 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 945 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 946 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 947 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 948 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 949 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 950 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 951 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 952 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8 953 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 954 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 955 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 956 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 957 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 958 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 959 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 960 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 961 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 962 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 963 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 964 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 965 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 966 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 967 // CHECK9: omp_offload.failed: 968 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 969 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 970 // CHECK9: omp_offload.cont: 971 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 972 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 973 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 974 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 975 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 976 // CHECK9: arraydestroy.body: 977 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 978 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 979 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 980 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 981 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 982 // CHECK9: arraydestroy.done2: 983 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 984 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 985 // CHECK9-NEXT: ret i32 [[TMP4]] 986 // 987 // 988 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 989 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 990 // CHECK9-NEXT: entry: 991 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 992 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 993 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 994 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 995 // CHECK9-NEXT: ret void 996 // 997 // 998 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 999 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1000 // CHECK9-NEXT: entry: 1001 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1002 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1003 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1004 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1005 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1006 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1007 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1008 // CHECK9-NEXT: ret void 1009 // 1010 // 1011 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 1012 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 1013 // CHECK9-NEXT: entry: 1014 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1015 // CHECK9-NEXT: ret void 1016 // 1017 // 1018 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1019 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1020 // CHECK9-NEXT: entry: 1021 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1022 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1023 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1024 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1025 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1026 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1027 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1028 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1029 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1030 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1031 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1032 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1033 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1034 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1035 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1036 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1037 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1038 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1039 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1040 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1041 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1042 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1043 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1044 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1045 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1046 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1047 // CHECK9: arrayctor.loop: 1048 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1049 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1050 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1051 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1052 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1053 // CHECK9: arrayctor.cont: 1054 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1055 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1056 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1057 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1058 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1059 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1060 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1061 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1062 // CHECK9: cond.true: 1063 // CHECK9-NEXT: br label [[COND_END:%.*]] 1064 // CHECK9: cond.false: 1065 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1066 // CHECK9-NEXT: br label [[COND_END]] 1067 // CHECK9: cond.end: 1068 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1069 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1070 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1071 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1072 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1073 // CHECK9: omp.inner.for.cond: 1074 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1075 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1076 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1077 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1078 // CHECK9: omp.inner.for.cond.cleanup: 1079 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1080 // CHECK9: omp.inner.for.body: 1081 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1082 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1083 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1084 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1085 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1086 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1087 // CHECK9: omp.inner.for.inc: 1088 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1089 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1090 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1091 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1092 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1093 // CHECK9: omp.inner.for.end: 1094 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1095 // CHECK9: omp.loop.exit: 1096 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1097 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1098 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1099 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1100 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1101 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 1102 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1103 // CHECK9: arraydestroy.body: 1104 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1105 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1106 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1107 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1108 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1109 // CHECK9: arraydestroy.done5: 1110 // CHECK9-NEXT: ret void 1111 // 1112 // 1113 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1114 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1115 // CHECK9-NEXT: entry: 1116 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1117 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1118 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1119 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1120 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1121 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1122 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1123 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1124 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1125 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1126 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1127 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1128 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1129 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1130 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1131 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8 1132 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1133 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1134 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1135 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1136 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1137 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1138 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1139 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1140 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1141 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1142 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1143 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1144 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1145 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1146 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1147 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1148 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1149 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1150 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1151 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1152 // CHECK9: arrayctor.loop: 1153 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1154 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1155 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1156 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1157 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1158 // CHECK9: arrayctor.cont: 1159 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1160 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8 1161 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1162 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1163 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1164 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1165 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1166 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1167 // CHECK9: cond.true: 1168 // CHECK9-NEXT: br label [[COND_END:%.*]] 1169 // CHECK9: cond.false: 1170 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1171 // CHECK9-NEXT: br label [[COND_END]] 1172 // CHECK9: cond.end: 1173 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1174 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1175 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1176 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1177 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1178 // CHECK9: omp.inner.for.cond: 1179 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1180 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1181 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1182 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1183 // CHECK9: omp.inner.for.cond.cleanup: 1184 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1185 // CHECK9: omp.inner.for.body: 1186 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1187 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1188 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1189 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1190 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 1191 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1192 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1193 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1194 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 1195 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8 1196 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1197 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1198 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1199 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1200 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 1201 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1202 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1203 // CHECK9: omp.body.continue: 1204 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1205 // CHECK9: omp.inner.for.inc: 1206 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1207 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1208 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1209 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1210 // CHECK9: omp.inner.for.end: 1211 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1212 // CHECK9: omp.loop.exit: 1213 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1214 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1215 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1216 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1217 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1218 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1219 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1220 // CHECK9: arraydestroy.body: 1221 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1222 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1223 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1224 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1225 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1226 // CHECK9: arraydestroy.done9: 1227 // CHECK9-NEXT: ret void 1228 // 1229 // 1230 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1231 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1232 // CHECK9-NEXT: entry: 1233 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1234 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1235 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1236 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1237 // CHECK9-NEXT: ret void 1238 // 1239 // 1240 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1241 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { 1242 // CHECK9-NEXT: entry: 1243 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1244 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1245 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1246 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1247 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1248 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1249 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1250 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1251 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1252 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4 1253 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1254 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1255 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1256 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1257 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1258 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1259 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1260 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1261 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1262 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1263 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1264 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1265 // CHECK9: omp_offload.failed: 1266 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1267 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1268 // CHECK9: omp_offload.cont: 1269 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1270 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1271 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1272 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1273 // CHECK9: arraydestroy.body: 1274 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1275 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1276 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1277 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1278 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1279 // CHECK9: arraydestroy.done2: 1280 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1281 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1282 // CHECK9-NEXT: ret i32 [[TMP4]] 1283 // 1284 // 1285 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1286 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1287 // CHECK9-NEXT: entry: 1288 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1289 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1290 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1291 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1292 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4 1293 // CHECK9-NEXT: ret void 1294 // 1295 // 1296 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1297 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1298 // CHECK9-NEXT: entry: 1299 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1300 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1301 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1302 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1303 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1304 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1305 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1306 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4 1307 // CHECK9-NEXT: ret void 1308 // 1309 // 1310 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1311 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1312 // CHECK9-NEXT: entry: 1313 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1314 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1315 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1316 // CHECK9-NEXT: ret void 1317 // 1318 // 1319 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1320 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1321 // CHECK9-NEXT: entry: 1322 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1323 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1324 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1325 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1326 // CHECK9-NEXT: ret void 1327 // 1328 // 1329 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1330 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1331 // CHECK9-NEXT: entry: 1332 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1333 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1334 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1335 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1336 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1337 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1338 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 1339 // CHECK9-NEXT: ret void 1340 // 1341 // 1342 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1343 // CHECK9-SAME: () #[[ATTR3]] { 1344 // CHECK9-NEXT: entry: 1345 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1346 // CHECK9-NEXT: ret void 1347 // 1348 // 1349 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1350 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1351 // CHECK9-NEXT: entry: 1352 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1353 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1354 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1355 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1356 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1357 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1358 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1359 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1360 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1361 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1362 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1363 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1364 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1365 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 1366 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1367 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1368 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1369 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1370 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1371 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1372 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1373 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1374 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1375 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1376 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1377 // CHECK9: arrayctor.loop: 1378 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1379 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1380 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1381 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1382 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1383 // CHECK9: arrayctor.cont: 1384 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 1385 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 1386 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1387 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1388 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1389 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1390 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1391 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1392 // CHECK9: cond.true: 1393 // CHECK9-NEXT: br label [[COND_END:%.*]] 1394 // CHECK9: cond.false: 1395 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1396 // CHECK9-NEXT: br label [[COND_END]] 1397 // CHECK9: cond.end: 1398 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1399 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1400 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1401 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1402 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1403 // CHECK9: omp.inner.for.cond: 1404 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1405 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1406 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1407 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1408 // CHECK9: omp.inner.for.cond.cleanup: 1409 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1410 // CHECK9: omp.inner.for.body: 1411 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1412 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1413 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1414 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1415 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1416 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1417 // CHECK9: omp.inner.for.inc: 1418 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1419 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1420 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1421 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1422 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1423 // CHECK9: omp.inner.for.end: 1424 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1425 // CHECK9: omp.loop.exit: 1426 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1427 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1428 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1429 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1430 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1431 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2 1432 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1433 // CHECK9: arraydestroy.body: 1434 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1435 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1436 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1437 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1438 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1439 // CHECK9: arraydestroy.done5: 1440 // CHECK9-NEXT: ret void 1441 // 1442 // 1443 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1444 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1445 // CHECK9-NEXT: entry: 1446 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1447 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1448 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1449 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1450 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1451 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1452 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1453 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1454 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1455 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1456 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1457 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1458 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1459 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1460 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1461 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8 1462 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1463 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1464 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1465 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1466 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1467 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1468 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1469 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1470 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1471 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1472 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1473 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1474 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1475 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1476 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1477 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1478 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1479 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1480 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1481 // CHECK9: arrayctor.loop: 1482 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1483 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1484 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1485 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1486 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1487 // CHECK9: arrayctor.cont: 1488 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 1489 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8 1490 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1491 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1492 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1493 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1494 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1495 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1496 // CHECK9: cond.true: 1497 // CHECK9-NEXT: br label [[COND_END:%.*]] 1498 // CHECK9: cond.false: 1499 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1500 // CHECK9-NEXT: br label [[COND_END]] 1501 // CHECK9: cond.end: 1502 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1503 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1504 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1505 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1506 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1507 // CHECK9: omp.inner.for.cond: 1508 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1509 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1510 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1511 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1512 // CHECK9: omp.inner.for.cond.cleanup: 1513 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1514 // CHECK9: omp.inner.for.body: 1515 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1516 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1517 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1518 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1519 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 1520 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1521 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1522 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1523 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 1524 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8 1525 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1526 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1527 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1528 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 1529 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 1530 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1531 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1532 // CHECK9: omp.body.continue: 1533 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1534 // CHECK9: omp.inner.for.inc: 1535 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1536 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1537 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1538 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1539 // CHECK9: omp.inner.for.end: 1540 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1541 // CHECK9: omp.loop.exit: 1542 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1543 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1544 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1545 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1546 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1547 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 1548 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1549 // CHECK9: arraydestroy.body: 1550 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1551 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1552 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1553 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1554 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1555 // CHECK9: arraydestroy.done9: 1556 // CHECK9-NEXT: ret void 1557 // 1558 // 1559 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1560 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1561 // CHECK9-NEXT: entry: 1562 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1563 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1564 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1565 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1566 // CHECK9-NEXT: ret void 1567 // 1568 // 1569 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1570 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1571 // CHECK9-NEXT: entry: 1572 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1573 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1574 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1575 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1576 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4 1577 // CHECK9-NEXT: ret void 1578 // 1579 // 1580 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1581 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1582 // CHECK9-NEXT: entry: 1583 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1584 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1585 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1586 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1587 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1588 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1589 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1590 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1591 // CHECK9-NEXT: ret void 1592 // 1593 // 1594 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1595 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK9-NEXT: entry: 1597 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1598 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1599 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1600 // CHECK9-NEXT: ret void 1601 // 1602 // 1603 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1604 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1605 // CHECK9-NEXT: entry: 1606 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1607 // CHECK9-NEXT: ret void 1608 // 1609 // 1610 // CHECK10-LABEL: define {{[^@]+}}@main 1611 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 1612 // CHECK10-NEXT: entry: 1613 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1614 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8 1615 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8 1616 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1617 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1618 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1619 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1620 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1621 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1622 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1623 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1624 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8 1625 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1626 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1627 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1628 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1629 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1630 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1631 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1632 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1633 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1634 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1635 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 1636 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1637 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1638 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1639 // CHECK10: omp_offload.failed: 1640 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 1641 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1642 // CHECK10: omp_offload.cont: 1643 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 1644 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1645 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1646 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1647 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1648 // CHECK10: arraydestroy.body: 1649 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1650 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1651 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1652 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1653 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1654 // CHECK10: arraydestroy.done2: 1655 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1656 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1657 // CHECK10-NEXT: ret i32 [[TMP4]] 1658 // 1659 // 1660 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1661 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1662 // CHECK10-NEXT: entry: 1663 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1664 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1665 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1666 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 1667 // CHECK10-NEXT: ret void 1668 // 1669 // 1670 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1671 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1672 // CHECK10-NEXT: entry: 1673 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1674 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1675 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1676 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1677 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1678 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1679 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 1680 // CHECK10-NEXT: ret void 1681 // 1682 // 1683 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 1684 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 1685 // CHECK10-NEXT: entry: 1686 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1687 // CHECK10-NEXT: ret void 1688 // 1689 // 1690 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 1691 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1692 // CHECK10-NEXT: entry: 1693 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1694 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1695 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1696 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1697 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1698 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1699 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1700 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1701 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1702 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1703 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1704 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1705 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1706 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 1707 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1708 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1709 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1710 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1711 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1712 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1713 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1714 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1715 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1716 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1717 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1718 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1719 // CHECK10: arrayctor.loop: 1720 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1721 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1722 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1723 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1724 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1725 // CHECK10: arrayctor.cont: 1726 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1727 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 1728 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1729 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1730 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1731 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1732 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1733 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1734 // CHECK10: cond.true: 1735 // CHECK10-NEXT: br label [[COND_END:%.*]] 1736 // CHECK10: cond.false: 1737 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1738 // CHECK10-NEXT: br label [[COND_END]] 1739 // CHECK10: cond.end: 1740 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1741 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1742 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1743 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1744 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1745 // CHECK10: omp.inner.for.cond: 1746 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1747 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1748 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1749 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1750 // CHECK10: omp.inner.for.cond.cleanup: 1751 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1752 // CHECK10: omp.inner.for.body: 1753 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1754 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1755 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1756 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1757 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1758 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1759 // CHECK10: omp.inner.for.inc: 1760 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1761 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1762 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1763 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1764 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1765 // CHECK10: omp.inner.for.end: 1766 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1767 // CHECK10: omp.loop.exit: 1768 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1769 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 1770 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 1771 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1772 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1773 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2 1774 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1775 // CHECK10: arraydestroy.body: 1776 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1777 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1778 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1779 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1780 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1781 // CHECK10: arraydestroy.done5: 1782 // CHECK10-NEXT: ret void 1783 // 1784 // 1785 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 1786 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1787 // CHECK10-NEXT: entry: 1788 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1789 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1790 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1791 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1792 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1793 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1794 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 1795 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1796 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1797 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1798 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1799 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1800 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1801 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1802 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1803 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8 1804 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1805 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1806 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1807 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1808 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1809 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1810 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 1811 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1812 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1813 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1814 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1815 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1816 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1817 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1818 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 1819 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1820 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1821 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1822 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1823 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1824 // CHECK10: arrayctor.loop: 1825 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1826 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1827 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1828 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1829 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1830 // CHECK10: arrayctor.cont: 1831 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 1832 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8 1833 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1834 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1835 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1836 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1837 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1838 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1839 // CHECK10: cond.true: 1840 // CHECK10-NEXT: br label [[COND_END:%.*]] 1841 // CHECK10: cond.false: 1842 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1843 // CHECK10-NEXT: br label [[COND_END]] 1844 // CHECK10: cond.end: 1845 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1846 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1847 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1848 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1849 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1850 // CHECK10: omp.inner.for.cond: 1851 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1852 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1853 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1854 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1855 // CHECK10: omp.inner.for.cond.cleanup: 1856 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1857 // CHECK10: omp.inner.for.body: 1858 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1859 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1860 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1861 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1862 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 1863 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1864 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1865 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1866 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 1867 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8 1868 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 1869 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1870 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1871 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1872 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 1873 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 1874 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1875 // CHECK10: omp.body.continue: 1876 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1877 // CHECK10: omp.inner.for.inc: 1878 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1879 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1880 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1881 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1882 // CHECK10: omp.inner.for.end: 1883 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1884 // CHECK10: omp.loop.exit: 1885 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1886 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1887 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 1888 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1889 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1890 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2 1891 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1892 // CHECK10: arraydestroy.body: 1893 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1894 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1895 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1896 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1897 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1898 // CHECK10: arraydestroy.done9: 1899 // CHECK10-NEXT: ret void 1900 // 1901 // 1902 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1903 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1904 // CHECK10-NEXT: entry: 1905 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1906 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1907 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1908 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1909 // CHECK10-NEXT: ret void 1910 // 1911 // 1912 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1913 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { 1914 // CHECK10-NEXT: entry: 1915 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1916 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1917 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1918 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1919 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1920 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1921 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1922 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 1923 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 1924 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4 1925 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1926 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1927 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1928 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 1929 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1930 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 1931 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1932 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 1933 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 1934 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1935 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 1936 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1937 // CHECK10: omp_offload.failed: 1938 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1939 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 1940 // CHECK10: omp_offload.cont: 1941 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 1942 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1943 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1944 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1945 // CHECK10: arraydestroy.body: 1946 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1947 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1948 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1949 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1950 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1951 // CHECK10: arraydestroy.done2: 1952 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1953 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 1954 // CHECK10-NEXT: ret i32 [[TMP4]] 1955 // 1956 // 1957 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1958 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1959 // CHECK10-NEXT: entry: 1960 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1961 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1962 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1963 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1964 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4 1965 // CHECK10-NEXT: ret void 1966 // 1967 // 1968 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1969 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1970 // CHECK10-NEXT: entry: 1971 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1972 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1973 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1974 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1975 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1976 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1977 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1978 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4 1979 // CHECK10-NEXT: ret void 1980 // 1981 // 1982 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1983 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1984 // CHECK10-NEXT: entry: 1985 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1986 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1987 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1988 // CHECK10-NEXT: ret void 1989 // 1990 // 1991 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1992 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1993 // CHECK10-NEXT: entry: 1994 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1995 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1996 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1997 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 1998 // CHECK10-NEXT: ret void 1999 // 2000 // 2001 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2002 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2003 // CHECK10-NEXT: entry: 2004 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2005 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2006 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2007 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2008 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2009 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2010 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 2011 // CHECK10-NEXT: ret void 2012 // 2013 // 2014 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2015 // CHECK10-SAME: () #[[ATTR3]] { 2016 // CHECK10-NEXT: entry: 2017 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2018 // CHECK10-NEXT: ret void 2019 // 2020 // 2021 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 2022 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2023 // CHECK10-NEXT: entry: 2024 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2025 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2026 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2027 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2028 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2029 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2030 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2031 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2032 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2033 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2034 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2035 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2036 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2037 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 2038 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2039 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2040 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2041 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 2042 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2043 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2044 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2045 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2046 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2047 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2048 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2049 // CHECK10: arrayctor.loop: 2050 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2051 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2052 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2053 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2054 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2055 // CHECK10: arrayctor.cont: 2056 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2057 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 2058 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2059 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2060 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2061 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2062 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2063 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2064 // CHECK10: cond.true: 2065 // CHECK10-NEXT: br label [[COND_END:%.*]] 2066 // CHECK10: cond.false: 2067 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2068 // CHECK10-NEXT: br label [[COND_END]] 2069 // CHECK10: cond.end: 2070 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2071 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2072 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2073 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2074 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2075 // CHECK10: omp.inner.for.cond: 2076 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2077 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2078 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2079 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2080 // CHECK10: omp.inner.for.cond.cleanup: 2081 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2082 // CHECK10: omp.inner.for.body: 2083 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2084 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2085 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2086 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2087 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2088 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2089 // CHECK10: omp.inner.for.inc: 2090 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2091 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2092 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2093 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2094 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2095 // CHECK10: omp.inner.for.end: 2096 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2097 // CHECK10: omp.loop.exit: 2098 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2099 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2100 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]]) 2101 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2102 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2103 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2 2104 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2105 // CHECK10: arraydestroy.body: 2106 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2107 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2108 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2109 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2110 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2111 // CHECK10: arraydestroy.done5: 2112 // CHECK10-NEXT: ret void 2113 // 2114 // 2115 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 2116 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2117 // CHECK10-NEXT: entry: 2118 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2119 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2120 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2121 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2122 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2123 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2124 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 2125 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2126 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2127 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2128 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2129 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2130 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2131 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2132 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2133 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8 2134 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2135 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2136 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2137 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2138 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2139 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 2140 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2141 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2142 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2143 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2144 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2145 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 2146 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2147 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 2148 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2149 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2150 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2151 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2152 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2153 // CHECK10: arrayctor.loop: 2154 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2155 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2156 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 2157 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2158 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2159 // CHECK10: arrayctor.cont: 2160 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2161 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8 2162 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2163 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2164 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2165 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2166 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2167 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2168 // CHECK10: cond.true: 2169 // CHECK10-NEXT: br label [[COND_END:%.*]] 2170 // CHECK10: cond.false: 2171 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2172 // CHECK10-NEXT: br label [[COND_END]] 2173 // CHECK10: cond.end: 2174 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2175 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2176 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2177 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2178 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2179 // CHECK10: omp.inner.for.cond: 2180 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2181 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2182 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2183 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2184 // CHECK10: omp.inner.for.cond.cleanup: 2185 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2186 // CHECK10: omp.inner.for.body: 2187 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2188 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2189 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2190 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2191 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 2192 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2193 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2194 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 2195 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 2196 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8 2197 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2198 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 2199 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] 2200 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 2201 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2202 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 2203 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2204 // CHECK10: omp.body.continue: 2205 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2206 // CHECK10: omp.inner.for.inc: 2207 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2208 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 2209 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 2210 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2211 // CHECK10: omp.inner.for.end: 2212 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2213 // CHECK10: omp.loop.exit: 2214 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2215 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2216 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 2217 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2218 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2219 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2 2220 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2221 // CHECK10: arraydestroy.body: 2222 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2223 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2224 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2225 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 2226 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 2227 // CHECK10: arraydestroy.done9: 2228 // CHECK10-NEXT: ret void 2229 // 2230 // 2231 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2232 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2233 // CHECK10-NEXT: entry: 2234 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2235 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2236 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2237 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2238 // CHECK10-NEXT: ret void 2239 // 2240 // 2241 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2242 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2243 // CHECK10-NEXT: entry: 2244 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2245 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2246 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2247 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2248 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4 2249 // CHECK10-NEXT: ret void 2250 // 2251 // 2252 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2253 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2254 // CHECK10-NEXT: entry: 2255 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2256 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2257 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2258 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2259 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2260 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2261 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2262 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2263 // CHECK10-NEXT: ret void 2264 // 2265 // 2266 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2267 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2268 // CHECK10-NEXT: entry: 2269 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2270 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2271 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2272 // CHECK10-NEXT: ret void 2273 // 2274 // 2275 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2276 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 2277 // CHECK10-NEXT: entry: 2278 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 2279 // CHECK10-NEXT: ret void 2280 // 2281 // 2282 // CHECK11-LABEL: define {{[^@]+}}@main 2283 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2284 // CHECK11-NEXT: entry: 2285 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2286 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 2287 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4 2288 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2289 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2290 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2291 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2292 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2293 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2294 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2295 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2296 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4 2297 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2298 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2299 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2300 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2301 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2302 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2303 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2304 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2305 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2306 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2307 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2308 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2309 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2310 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2311 // CHECK11: omp_offload.failed: 2312 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 2313 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2314 // CHECK11: omp_offload.cont: 2315 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2316 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2317 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2318 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2319 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2320 // CHECK11: arraydestroy.body: 2321 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2322 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2323 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2324 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2325 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2326 // CHECK11: arraydestroy.done2: 2327 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2328 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2329 // CHECK11-NEXT: ret i32 [[TMP4]] 2330 // 2331 // 2332 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2333 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2334 // CHECK11-NEXT: entry: 2335 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2336 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2337 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2338 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2339 // CHECK11-NEXT: ret void 2340 // 2341 // 2342 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2343 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2344 // CHECK11-NEXT: entry: 2345 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2346 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2347 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2348 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2349 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2350 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2351 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2352 // CHECK11-NEXT: ret void 2353 // 2354 // 2355 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 2356 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 2357 // CHECK11-NEXT: entry: 2358 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2359 // CHECK11-NEXT: ret void 2360 // 2361 // 2362 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2363 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2364 // CHECK11-NEXT: entry: 2365 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2366 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2367 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2368 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2369 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2370 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2371 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2372 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2373 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2374 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2375 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2376 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2377 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2378 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2379 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2380 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2381 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2382 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2383 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2384 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2385 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2386 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2387 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2388 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2389 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2390 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2391 // CHECK11: arrayctor.loop: 2392 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2393 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2394 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2395 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2396 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2397 // CHECK11: arrayctor.cont: 2398 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2399 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2400 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2401 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2402 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2403 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2404 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2405 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2406 // CHECK11: cond.true: 2407 // CHECK11-NEXT: br label [[COND_END:%.*]] 2408 // CHECK11: cond.false: 2409 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2410 // CHECK11-NEXT: br label [[COND_END]] 2411 // CHECK11: cond.end: 2412 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2413 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2414 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2415 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2416 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2417 // CHECK11: omp.inner.for.cond: 2418 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2419 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2420 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2421 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2422 // CHECK11: omp.inner.for.cond.cleanup: 2423 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2424 // CHECK11: omp.inner.for.body: 2425 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2426 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2427 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 2428 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2429 // CHECK11: omp.inner.for.inc: 2430 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2431 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2432 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2433 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2434 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2435 // CHECK11: omp.inner.for.end: 2436 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2437 // CHECK11: omp.loop.exit: 2438 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2439 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2440 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2441 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2442 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2443 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 2444 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2445 // CHECK11: arraydestroy.body: 2446 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2447 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2448 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2449 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2450 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2451 // CHECK11: arraydestroy.done5: 2452 // CHECK11-NEXT: ret void 2453 // 2454 // 2455 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2456 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2457 // CHECK11-NEXT: entry: 2458 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2459 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2460 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2461 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2462 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2463 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2464 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2465 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2466 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2467 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2468 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2469 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2470 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2471 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2472 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2473 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 2474 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2475 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2476 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2477 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2478 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2479 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2480 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2481 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2482 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2483 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2484 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2485 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 2486 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 2487 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2488 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2489 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2490 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2491 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2492 // CHECK11: arrayctor.loop: 2493 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2494 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2495 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 2496 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2497 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2498 // CHECK11: arrayctor.cont: 2499 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2500 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 2501 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2502 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2503 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2504 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2505 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2506 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2507 // CHECK11: cond.true: 2508 // CHECK11-NEXT: br label [[COND_END:%.*]] 2509 // CHECK11: cond.false: 2510 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2511 // CHECK11-NEXT: br label [[COND_END]] 2512 // CHECK11: cond.end: 2513 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2514 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2515 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2516 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2517 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2518 // CHECK11: omp.inner.for.cond: 2519 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2520 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2521 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2522 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2523 // CHECK11: omp.inner.for.cond.cleanup: 2524 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2525 // CHECK11: omp.inner.for.body: 2526 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2527 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2528 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2529 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2530 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 2531 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2532 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 2533 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 2534 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 2535 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2536 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]] 2537 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 2538 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 2539 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 2540 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2541 // CHECK11: omp.body.continue: 2542 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2543 // CHECK11: omp.inner.for.inc: 2544 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2545 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 2546 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2547 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2548 // CHECK11: omp.inner.for.end: 2549 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2550 // CHECK11: omp.loop.exit: 2551 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2552 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2553 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 2554 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2555 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2556 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 2557 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2558 // CHECK11: arraydestroy.body: 2559 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2560 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2561 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2562 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2563 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2564 // CHECK11: arraydestroy.done7: 2565 // CHECK11-NEXT: ret void 2566 // 2567 // 2568 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2569 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2570 // CHECK11-NEXT: entry: 2571 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2572 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2573 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2574 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2575 // CHECK11-NEXT: ret void 2576 // 2577 // 2578 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2579 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { 2580 // CHECK11-NEXT: entry: 2581 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2582 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2583 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2584 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2585 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2586 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 2587 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2588 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2589 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 2590 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4 2591 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2592 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2593 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2594 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2595 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 2596 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2597 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 2598 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2599 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 2600 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2601 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2602 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2603 // CHECK11: omp_offload.failed: 2604 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 2605 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2606 // CHECK11: omp_offload.cont: 2607 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2608 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2609 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2610 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2611 // CHECK11: arraydestroy.body: 2612 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2613 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2614 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2615 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2616 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2617 // CHECK11: arraydestroy.done2: 2618 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2619 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2620 // CHECK11-NEXT: ret i32 [[TMP4]] 2621 // 2622 // 2623 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2624 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2625 // CHECK11-NEXT: entry: 2626 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2627 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2628 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2629 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2630 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4 2631 // CHECK11-NEXT: ret void 2632 // 2633 // 2634 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2635 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2636 // CHECK11-NEXT: entry: 2637 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2638 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2639 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2640 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2641 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2642 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2643 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2644 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4 2645 // CHECK11-NEXT: ret void 2646 // 2647 // 2648 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2649 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2650 // CHECK11-NEXT: entry: 2651 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2652 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2653 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2654 // CHECK11-NEXT: ret void 2655 // 2656 // 2657 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2658 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2659 // CHECK11-NEXT: entry: 2660 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2661 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2662 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2663 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 2664 // CHECK11-NEXT: ret void 2665 // 2666 // 2667 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2668 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2669 // CHECK11-NEXT: entry: 2670 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2671 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2672 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2673 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2674 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2675 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2676 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2677 // CHECK11-NEXT: ret void 2678 // 2679 // 2680 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 2681 // CHECK11-SAME: () #[[ATTR3]] { 2682 // CHECK11-NEXT: entry: 2683 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 2684 // CHECK11-NEXT: ret void 2685 // 2686 // 2687 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 2688 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2689 // CHECK11-NEXT: entry: 2690 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2691 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2692 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2693 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2694 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2695 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2696 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2697 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2698 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2699 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2700 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2701 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2702 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2703 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2704 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2705 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2706 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2707 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2708 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2709 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2710 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2711 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2712 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2713 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2714 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2715 // CHECK11: arrayctor.loop: 2716 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2717 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2718 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2719 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2720 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2721 // CHECK11: arrayctor.cont: 2722 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2723 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2724 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2725 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2726 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2727 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2728 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2729 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2730 // CHECK11: cond.true: 2731 // CHECK11-NEXT: br label [[COND_END:%.*]] 2732 // CHECK11: cond.false: 2733 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2734 // CHECK11-NEXT: br label [[COND_END]] 2735 // CHECK11: cond.end: 2736 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2737 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2738 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2739 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2740 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2741 // CHECK11: omp.inner.for.cond: 2742 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2743 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2744 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2745 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2746 // CHECK11: omp.inner.for.cond.cleanup: 2747 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2748 // CHECK11: omp.inner.for.body: 2749 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2750 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2751 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 2752 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2753 // CHECK11: omp.inner.for.inc: 2754 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2755 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2756 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2757 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2758 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2759 // CHECK11: omp.inner.for.end: 2760 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2761 // CHECK11: omp.loop.exit: 2762 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2763 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2764 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2765 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2766 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2767 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2 2768 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2769 // CHECK11: arraydestroy.body: 2770 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2771 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2772 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2773 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2774 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2775 // CHECK11: arraydestroy.done5: 2776 // CHECK11-NEXT: ret void 2777 // 2778 // 2779 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 2780 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 2781 // CHECK11-NEXT: entry: 2782 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2783 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2784 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2785 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2786 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2787 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2788 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 2789 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2790 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2791 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2792 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2793 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2794 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2795 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2796 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2797 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 2798 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2799 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2800 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2801 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2802 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2803 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 2804 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2805 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2806 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2807 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2808 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 2809 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 2810 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2811 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2812 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2813 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 2814 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2815 // CHECK11: arrayctor.loop: 2816 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2817 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2818 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 2819 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2820 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2821 // CHECK11: arrayctor.cont: 2822 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 2823 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 2824 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2825 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2826 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2827 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2828 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2829 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2830 // CHECK11: cond.true: 2831 // CHECK11-NEXT: br label [[COND_END:%.*]] 2832 // CHECK11: cond.false: 2833 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2834 // CHECK11-NEXT: br label [[COND_END]] 2835 // CHECK11: cond.end: 2836 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2837 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2838 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2839 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2840 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2841 // CHECK11: omp.inner.for.cond: 2842 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2843 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2844 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2845 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2846 // CHECK11: omp.inner.for.cond.cleanup: 2847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2848 // CHECK11: omp.inner.for.body: 2849 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2850 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2851 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2852 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2853 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 2854 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2855 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 2856 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 2857 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 2858 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 2859 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]] 2860 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 2861 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 2862 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 2863 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2864 // CHECK11: omp.body.continue: 2865 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2866 // CHECK11: omp.inner.for.inc: 2867 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2868 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 2869 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2870 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2871 // CHECK11: omp.inner.for.end: 2872 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2873 // CHECK11: omp.loop.exit: 2874 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2875 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2876 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 2877 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 2878 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2879 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 2880 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2881 // CHECK11: arraydestroy.body: 2882 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2883 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2884 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2885 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2886 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2887 // CHECK11: arraydestroy.done7: 2888 // CHECK11-NEXT: ret void 2889 // 2890 // 2891 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2892 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2893 // CHECK11-NEXT: entry: 2894 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2895 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2896 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2897 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 2898 // CHECK11-NEXT: ret void 2899 // 2900 // 2901 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2902 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2903 // CHECK11-NEXT: entry: 2904 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2905 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2906 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2907 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2908 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4 2909 // CHECK11-NEXT: ret void 2910 // 2911 // 2912 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2913 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2914 // CHECK11-NEXT: entry: 2915 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2916 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2917 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2918 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2919 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2920 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2921 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2922 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2923 // CHECK11-NEXT: ret void 2924 // 2925 // 2926 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2927 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2928 // CHECK11-NEXT: entry: 2929 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 2930 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 2931 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 2932 // CHECK11-NEXT: ret void 2933 // 2934 // 2935 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2936 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2937 // CHECK11-NEXT: entry: 2938 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2939 // CHECK11-NEXT: ret void 2940 // 2941 // 2942 // CHECK12-LABEL: define {{[^@]+}}@main 2943 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 2944 // CHECK12-NEXT: entry: 2945 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2946 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8 2947 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4 2948 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2949 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2950 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2951 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2952 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 2953 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2954 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 2955 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 2956 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4 2957 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 2958 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 2959 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2960 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 2961 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2962 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 2963 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 2964 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 2965 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 2966 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 2967 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2) 2968 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2969 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 2970 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2971 // CHECK12: omp_offload.failed: 2972 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 2973 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 2974 // CHECK12: omp_offload.cont: 2975 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2976 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2977 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2978 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 2979 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2980 // CHECK12: arraydestroy.body: 2981 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2982 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2983 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 2984 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2985 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 2986 // CHECK12: arraydestroy.done2: 2987 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 2988 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 2989 // CHECK12-NEXT: ret i32 [[TMP4]] 2990 // 2991 // 2992 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2993 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2994 // CHECK12-NEXT: entry: 2995 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 2996 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 2997 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 2998 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2999 // CHECK12-NEXT: ret void 3000 // 3001 // 3002 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3003 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3004 // CHECK12-NEXT: entry: 3005 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3006 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3007 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3008 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3009 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3010 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3011 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3012 // CHECK12-NEXT: ret void 3013 // 3014 // 3015 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 3016 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] { 3017 // CHECK12-NEXT: entry: 3018 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 3019 // CHECK12-NEXT: ret void 3020 // 3021 // 3022 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 3023 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3024 // CHECK12-NEXT: entry: 3025 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3026 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3027 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3028 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3029 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3030 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3031 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3032 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3033 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3034 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3035 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3036 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3037 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3038 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 3039 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3040 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3041 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3042 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3043 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3044 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3045 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3046 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3047 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3048 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3049 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3050 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3051 // CHECK12: arrayctor.loop: 3052 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3053 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3054 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3055 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3056 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3057 // CHECK12: arrayctor.cont: 3058 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 3059 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 3060 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3061 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3062 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3063 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3064 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 3065 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3066 // CHECK12: cond.true: 3067 // CHECK12-NEXT: br label [[COND_END:%.*]] 3068 // CHECK12: cond.false: 3069 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3070 // CHECK12-NEXT: br label [[COND_END]] 3071 // CHECK12: cond.end: 3072 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3073 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3074 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3075 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3076 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3077 // CHECK12: omp.inner.for.cond: 3078 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3079 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3080 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3081 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3082 // CHECK12: omp.inner.for.cond.cleanup: 3083 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3084 // CHECK12: omp.inner.for.body: 3085 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3086 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3087 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 3088 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3089 // CHECK12: omp.inner.for.inc: 3090 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3091 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3092 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 3093 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3094 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3095 // CHECK12: omp.inner.for.end: 3096 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3097 // CHECK12: omp.loop.exit: 3098 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3099 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3100 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 3101 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3102 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3103 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2 3104 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3105 // CHECK12: arraydestroy.body: 3106 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3107 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3108 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3109 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3110 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3111 // CHECK12: arraydestroy.done5: 3112 // CHECK12-NEXT: ret void 3113 // 3114 // 3115 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 3116 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 3117 // CHECK12-NEXT: entry: 3118 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3119 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3120 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3121 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3122 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3123 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3124 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4 3125 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3126 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3127 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3128 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3129 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3130 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3131 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3132 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3133 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4 3134 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3135 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3136 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3137 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3138 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3139 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3140 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4 3141 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3142 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3143 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3144 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3145 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 3146 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 3147 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3148 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3149 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3150 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 3151 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3152 // CHECK12: arrayctor.loop: 3153 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3154 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3155 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 3156 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3157 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3158 // CHECK12: arrayctor.cont: 3159 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 3160 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4 3161 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3162 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3163 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3164 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3165 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3166 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3167 // CHECK12: cond.true: 3168 // CHECK12-NEXT: br label [[COND_END:%.*]] 3169 // CHECK12: cond.false: 3170 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3171 // CHECK12-NEXT: br label [[COND_END]] 3172 // CHECK12: cond.end: 3173 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3174 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3175 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3176 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3177 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3178 // CHECK12: omp.inner.for.cond: 3179 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3180 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3181 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3182 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3183 // CHECK12: omp.inner.for.cond.cleanup: 3184 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3185 // CHECK12: omp.inner.for.body: 3186 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3187 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3188 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3189 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3190 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 3191 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3192 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 3193 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 3194 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4 3195 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3196 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]] 3197 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8* 3198 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8* 3199 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3200 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3201 // CHECK12: omp.body.continue: 3202 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3203 // CHECK12: omp.inner.for.inc: 3204 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3205 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 3206 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3207 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3208 // CHECK12: omp.inner.for.end: 3209 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3210 // CHECK12: omp.loop.exit: 3211 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3212 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3213 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 3214 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3215 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3216 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 3217 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3218 // CHECK12: arraydestroy.body: 3219 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3220 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3221 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3222 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3223 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3224 // CHECK12: arraydestroy.done7: 3225 // CHECK12-NEXT: ret void 3226 // 3227 // 3228 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3229 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3230 // CHECK12-NEXT: entry: 3231 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3232 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3233 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3234 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3235 // CHECK12-NEXT: ret void 3236 // 3237 // 3238 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3239 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat { 3240 // CHECK12-NEXT: entry: 3241 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3242 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3243 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3244 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3245 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3246 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 3247 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3248 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3249 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3250 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4 3251 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3252 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 3253 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3254 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 3255 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 3256 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 3257 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 3258 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3259 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2) 3260 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3261 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 3262 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3263 // CHECK12: omp_offload.failed: 3264 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 3265 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 3266 // CHECK12: omp_offload.cont: 3267 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3268 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3269 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3270 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3271 // CHECK12: arraydestroy.body: 3272 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3273 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3274 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3275 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 3276 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 3277 // CHECK12: arraydestroy.done2: 3278 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3279 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4 3280 // CHECK12-NEXT: ret i32 [[TMP4]] 3281 // 3282 // 3283 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3284 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3285 // CHECK12-NEXT: entry: 3286 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3287 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3288 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3289 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3290 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4 3291 // CHECK12-NEXT: ret void 3292 // 3293 // 3294 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3295 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3296 // CHECK12-NEXT: entry: 3297 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3298 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3299 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3300 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3301 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3302 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3303 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3304 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4 3305 // CHECK12-NEXT: ret void 3306 // 3307 // 3308 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3309 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3310 // CHECK12-NEXT: entry: 3311 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 3312 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 3313 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 3314 // CHECK12-NEXT: ret void 3315 // 3316 // 3317 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3318 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3319 // CHECK12-NEXT: entry: 3320 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3321 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3322 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3323 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3324 // CHECK12-NEXT: ret void 3325 // 3326 // 3327 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3328 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3329 // CHECK12-NEXT: entry: 3330 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3331 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3332 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3333 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3334 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3335 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3336 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3337 // CHECK12-NEXT: ret void 3338 // 3339 // 3340 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3341 // CHECK12-SAME: () #[[ATTR3]] { 3342 // CHECK12-NEXT: entry: 3343 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 3344 // CHECK12-NEXT: ret void 3345 // 3346 // 3347 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 3348 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3349 // CHECK12-NEXT: entry: 3350 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3351 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3352 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3353 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3354 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3355 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3356 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3357 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3358 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3359 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3360 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3361 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3362 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3363 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 3364 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3365 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3366 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3367 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3368 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3369 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 3370 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3371 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3372 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3373 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3374 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3375 // CHECK12: arrayctor.loop: 3376 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3377 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3378 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3379 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3380 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3381 // CHECK12: arrayctor.cont: 3382 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 3383 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 3384 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3385 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3386 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3387 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3388 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 3389 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3390 // CHECK12: cond.true: 3391 // CHECK12-NEXT: br label [[COND_END:%.*]] 3392 // CHECK12: cond.false: 3393 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3394 // CHECK12-NEXT: br label [[COND_END]] 3395 // CHECK12: cond.end: 3396 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3397 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3398 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3399 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3400 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3401 // CHECK12: omp.inner.for.cond: 3402 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3403 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3404 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3405 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3406 // CHECK12: omp.inner.for.cond.cleanup: 3407 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3408 // CHECK12: omp.inner.for.body: 3409 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3410 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3411 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]]) 3412 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3413 // CHECK12: omp.inner.for.inc: 3414 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3415 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3416 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 3417 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3418 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3419 // CHECK12: omp.inner.for.end: 3420 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3421 // CHECK12: omp.loop.exit: 3422 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3423 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3424 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 3425 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3426 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3427 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2 3428 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3429 // CHECK12: arraydestroy.body: 3430 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3431 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3432 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3433 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 3434 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 3435 // CHECK12: arraydestroy.done5: 3436 // CHECK12-NEXT: ret void 3437 // 3438 // 3439 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 3440 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 3441 // CHECK12-NEXT: entry: 3442 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3443 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3444 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3445 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3446 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3447 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 3448 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4 3449 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3450 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3451 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3452 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3453 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3454 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3455 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3456 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3457 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4 3458 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 3459 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3460 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3461 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3462 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3463 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4 3464 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3465 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 3466 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3467 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3468 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 3469 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 3470 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3471 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3472 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3473 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 3474 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3475 // CHECK12: arrayctor.loop: 3476 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3477 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3478 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 3479 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3480 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3481 // CHECK12: arrayctor.cont: 3482 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) 3483 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4 3484 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3485 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3486 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3487 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3488 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3489 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3490 // CHECK12: cond.true: 3491 // CHECK12-NEXT: br label [[COND_END:%.*]] 3492 // CHECK12: cond.false: 3493 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3494 // CHECK12-NEXT: br label [[COND_END]] 3495 // CHECK12: cond.end: 3496 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3497 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3498 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3499 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3500 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3501 // CHECK12: omp.inner.for.cond: 3502 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3503 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3504 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3505 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 3506 // CHECK12: omp.inner.for.cond.cleanup: 3507 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 3508 // CHECK12: omp.inner.for.body: 3509 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3510 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3511 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3512 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3513 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4 3514 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3515 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]] 3516 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4 3517 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4 3518 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4 3519 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]] 3520 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8* 3521 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8* 3522 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false) 3523 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3524 // CHECK12: omp.body.continue: 3525 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3526 // CHECK12: omp.inner.for.inc: 3527 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3528 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 3529 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3530 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 3531 // CHECK12: omp.inner.for.end: 3532 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3533 // CHECK12: omp.loop.exit: 3534 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3535 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3536 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]]) 3537 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 3538 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3539 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 3540 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3541 // CHECK12: arraydestroy.body: 3542 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3543 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 3544 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3545 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 3546 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 3547 // CHECK12: arraydestroy.done7: 3548 // CHECK12-NEXT: ret void 3549 // 3550 // 3551 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3552 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3553 // CHECK12-NEXT: entry: 3554 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3555 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3556 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3557 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3558 // CHECK12-NEXT: ret void 3559 // 3560 // 3561 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3562 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3563 // CHECK12-NEXT: entry: 3564 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3565 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3566 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3567 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3568 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4 3569 // CHECK12-NEXT: ret void 3570 // 3571 // 3572 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3573 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3574 // CHECK12-NEXT: entry: 3575 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3576 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3577 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3578 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3579 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3580 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3581 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3582 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3583 // CHECK12-NEXT: ret void 3584 // 3585 // 3586 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3587 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3588 // CHECK12-NEXT: entry: 3589 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 3590 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 3591 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 3592 // CHECK12-NEXT: ret void 3593 // 3594 // 3595 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3596 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 3597 // CHECK12-NEXT: entry: 3598 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 3599 // CHECK12-NEXT: ret void 3600 // 3601 // 3602 // CHECK13-LABEL: define {{[^@]+}}@main 3603 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 3604 // CHECK13-NEXT: entry: 3605 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3606 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 3607 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8 3608 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3609 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3610 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3611 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3612 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3613 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3614 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3615 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3616 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3617 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3618 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3619 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3620 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3621 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8 3622 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3623 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3624 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3625 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3626 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3627 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3628 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3629 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3630 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3631 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3632 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3633 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3634 // CHECK13: arrayctor.loop: 3635 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3636 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3637 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3638 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3639 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3640 // CHECK13: arrayctor.cont: 3641 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3642 // CHECK13-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 3643 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3644 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3645 // CHECK13: for.cond: 3646 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3647 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3648 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3649 // CHECK13: for.body: 3650 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3651 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3652 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 3653 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3654 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3655 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3656 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3657 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 3658 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 3659 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 3660 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 3661 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 3662 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3663 // CHECK13: for.inc: 3664 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3665 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3666 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3667 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3668 // CHECK13: for.end: 3669 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3670 // CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3671 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 3672 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3673 // CHECK13: arraydestroy.body: 3674 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3675 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3676 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3677 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 3678 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 3679 // CHECK13: arraydestroy.done8: 3680 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3681 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3682 // CHECK13-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 3683 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i64 2 3684 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 3685 // CHECK13: arraydestroy.body10: 3686 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 3687 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 3688 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 3689 // CHECK13-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 3690 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 3691 // CHECK13: arraydestroy.done14: 3692 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3693 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3694 // CHECK13-NEXT: ret i32 [[TMP11]] 3695 // 3696 // 3697 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 3698 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3699 // CHECK13-NEXT: entry: 3700 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3701 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3702 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3703 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 3704 // CHECK13-NEXT: ret void 3705 // 3706 // 3707 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 3708 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3709 // CHECK13-NEXT: entry: 3710 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3711 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3712 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3713 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3714 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3715 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3716 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 3717 // CHECK13-NEXT: ret void 3718 // 3719 // 3720 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 3721 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3722 // CHECK13-NEXT: entry: 3723 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3724 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3725 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3726 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3727 // CHECK13-NEXT: ret void 3728 // 3729 // 3730 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 3731 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { 3732 // CHECK13-NEXT: entry: 3733 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3734 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 3735 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3736 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3737 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 3738 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 3739 // CHECK13-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3740 // CHECK13-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3741 // CHECK13-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 3742 // CHECK13-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 3743 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 3744 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3745 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 3746 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4 3747 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3748 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 3749 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 3750 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 3751 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 3752 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 3753 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 3754 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3755 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 3756 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3757 // CHECK13: arrayctor.loop: 3758 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3759 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3760 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 3761 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3762 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3763 // CHECK13: arrayctor.cont: 3764 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 3765 // CHECK13-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 3766 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3767 // CHECK13-NEXT: br label [[FOR_COND:%.*]] 3768 // CHECK13: for.cond: 3769 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3770 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3771 // CHECK13-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3772 // CHECK13: for.body: 3773 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3774 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3775 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 3776 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3777 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3778 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 3779 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3780 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 3781 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 3782 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 3783 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 3784 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 3785 // CHECK13-NEXT: br label [[FOR_INC:%.*]] 3786 // CHECK13: for.inc: 3787 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3788 // CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3789 // CHECK13-NEXT: store i32 [[INC]], i32* [[I]], align 4 3790 // CHECK13-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3791 // CHECK13: for.end: 3792 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 3793 // CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 3794 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 3795 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3796 // CHECK13: arraydestroy.body: 3797 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3798 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3799 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3800 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 3801 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 3802 // CHECK13: arraydestroy.done8: 3803 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3804 // CHECK13-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 3805 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 3806 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 3807 // CHECK13: arraydestroy.body10: 3808 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 3809 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 3810 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 3811 // CHECK13-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 3812 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 3813 // CHECK13: arraydestroy.done14: 3814 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 3815 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 3816 // CHECK13-NEXT: ret i32 [[TMP11]] 3817 // 3818 // 3819 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 3820 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3821 // CHECK13-NEXT: entry: 3822 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3823 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3824 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3825 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3826 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4 3827 // CHECK13-NEXT: ret void 3828 // 3829 // 3830 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 3831 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3832 // CHECK13-NEXT: entry: 3833 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3834 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3835 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3836 // CHECK13-NEXT: ret void 3837 // 3838 // 3839 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 3840 // CHECK13-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3841 // CHECK13-NEXT: entry: 3842 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3843 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 3844 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3845 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4 3846 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3847 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3848 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 3849 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4 3850 // CHECK13-NEXT: ret void 3851 // 3852 // 3853 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 3854 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3855 // CHECK13-NEXT: entry: 3856 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3857 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3858 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3859 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 3860 // CHECK13-NEXT: ret void 3861 // 3862 // 3863 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 3864 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3865 // CHECK13-NEXT: entry: 3866 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3867 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3868 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3869 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3870 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3871 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3872 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 3873 // CHECK13-NEXT: ret void 3874 // 3875 // 3876 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3877 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3878 // CHECK13-NEXT: entry: 3879 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3880 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3881 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3882 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 3883 // CHECK13-NEXT: ret void 3884 // 3885 // 3886 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3887 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3888 // CHECK13-NEXT: entry: 3889 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3890 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3891 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3892 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3893 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4 3894 // CHECK13-NEXT: ret void 3895 // 3896 // 3897 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3898 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3899 // CHECK13-NEXT: entry: 3900 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3901 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3902 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3903 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3904 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3905 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3906 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3907 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3908 // CHECK13-NEXT: ret void 3909 // 3910 // 3911 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3912 // CHECK13-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 3913 // CHECK13-NEXT: entry: 3914 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3915 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3916 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3917 // CHECK13-NEXT: ret void 3918 // 3919 // 3920 // CHECK14-LABEL: define {{[^@]+}}@main 3921 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 3922 // CHECK14-NEXT: entry: 3923 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3924 // CHECK14-NEXT: [[G:%.*]] = alloca double, align 8 3925 // CHECK14-NEXT: [[G1:%.*]] = alloca double*, align 8 3926 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 3927 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 3928 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 3929 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 3930 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 3931 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3932 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 3933 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 3934 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 3935 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 3936 // CHECK14-NEXT: [[SVAR:%.*]] = alloca i32, align 4 3937 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 3938 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 3939 // CHECK14-NEXT: store double* [[G]], double** [[G1]], align 8 3940 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 3941 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 3942 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 3943 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 3944 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 3945 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 3946 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 3947 // CHECK14-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 3948 // CHECK14-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 3949 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3950 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 3951 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 3952 // CHECK14: arrayctor.loop: 3953 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 3954 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 3955 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 3956 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 3957 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 3958 // CHECK14: arrayctor.cont: 3959 // CHECK14-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 3960 // CHECK14-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 3961 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 3962 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 3963 // CHECK14: for.cond: 3964 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 3965 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 3966 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 3967 // CHECK14: for.body: 3968 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 3969 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 3970 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 3971 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 3972 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 3973 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 3974 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 3975 // CHECK14-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 3976 // CHECK14-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 3977 // CHECK14-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 3978 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 3979 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 3980 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 3981 // CHECK14: for.inc: 3982 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 3983 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 3984 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 3985 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3986 // CHECK14: for.end: 3987 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 3988 // CHECK14-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 3989 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 3990 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 3991 // CHECK14: arraydestroy.body: 3992 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 3993 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 3994 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 3995 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 3996 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 3997 // CHECK14: arraydestroy.done8: 3998 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 3999 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4000 // CHECK14-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4001 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i64 2 4002 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 4003 // CHECK14: arraydestroy.body10: 4004 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 4005 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 4006 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 4007 // CHECK14-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 4008 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 4009 // CHECK14: arraydestroy.done14: 4010 // CHECK14-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4011 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4012 // CHECK14-NEXT: ret i32 [[TMP11]] 4013 // 4014 // 4015 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4016 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4017 // CHECK14-NEXT: entry: 4018 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4019 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4020 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4021 // CHECK14-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4022 // CHECK14-NEXT: ret void 4023 // 4024 // 4025 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4026 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4027 // CHECK14-NEXT: entry: 4028 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4029 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4030 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4031 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4032 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4033 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4034 // CHECK14-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4035 // CHECK14-NEXT: ret void 4036 // 4037 // 4038 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4039 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4040 // CHECK14-NEXT: entry: 4041 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4042 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4043 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4044 // CHECK14-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4045 // CHECK14-NEXT: ret void 4046 // 4047 // 4048 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4049 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { 4050 // CHECK14-NEXT: entry: 4051 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4052 // CHECK14-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4053 // CHECK14-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4054 // CHECK14-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4055 // CHECK14-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4056 // CHECK14-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 4057 // CHECK14-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4058 // CHECK14-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4059 // CHECK14-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 4060 // CHECK14-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 4061 // CHECK14-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 4062 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 4063 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4064 // CHECK14-NEXT: store i32 0, i32* [[T_VAR]], align 4 4065 // CHECK14-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4066 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 4067 // CHECK14-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 4068 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1) 4069 // CHECK14-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 4070 // CHECK14-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2) 4071 // CHECK14-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 4072 // CHECK14-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4073 // CHECK14-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 4074 // CHECK14-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4075 // CHECK14: arrayctor.loop: 4076 // CHECK14-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4077 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4078 // CHECK14-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 4079 // CHECK14-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4080 // CHECK14-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4081 // CHECK14: arrayctor.cont: 4082 // CHECK14-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 4083 // CHECK14-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 4084 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 4085 // CHECK14-NEXT: br label [[FOR_COND:%.*]] 4086 // CHECK14: for.cond: 4087 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4088 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 4089 // CHECK14-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4090 // CHECK14: for.body: 4091 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 4092 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4093 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 4094 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 4095 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 4096 // CHECK14-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 4097 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4098 // CHECK14-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 4099 // CHECK14-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 4100 // CHECK14-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 4101 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 4102 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 4103 // CHECK14-NEXT: br label [[FOR_INC:%.*]] 4104 // CHECK14: for.inc: 4105 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4106 // CHECK14-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 4107 // CHECK14-NEXT: store i32 [[INC]], i32* [[I]], align 4 4108 // CHECK14-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4109 // CHECK14: for.end: 4110 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 4111 // CHECK14-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4112 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 4113 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4114 // CHECK14: arraydestroy.body: 4115 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4116 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 4117 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4118 // CHECK14-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 4119 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 4120 // CHECK14: arraydestroy.done8: 4121 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 4122 // CHECK14-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4123 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 4124 // CHECK14-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 4125 // CHECK14: arraydestroy.body10: 4126 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 4127 // CHECK14-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 4128 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 4129 // CHECK14-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 4130 // CHECK14-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 4131 // CHECK14: arraydestroy.done14: 4132 // CHECK14-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4133 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4134 // CHECK14-NEXT: ret i32 [[TMP11]] 4135 // 4136 // 4137 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4138 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4139 // CHECK14-NEXT: entry: 4140 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4141 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4142 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4143 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4144 // CHECK14-NEXT: store float 0.000000e+00, float* [[F]], align 4 4145 // CHECK14-NEXT: ret void 4146 // 4147 // 4148 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4149 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4150 // CHECK14-NEXT: entry: 4151 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4152 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4153 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4154 // CHECK14-NEXT: ret void 4155 // 4156 // 4157 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4158 // CHECK14-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4159 // CHECK14-NEXT: entry: 4160 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4161 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4162 // CHECK14-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4163 // CHECK14-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4164 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4165 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4166 // CHECK14-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4167 // CHECK14-NEXT: store float [[TMP0]], float* [[F]], align 4 4168 // CHECK14-NEXT: ret void 4169 // 4170 // 4171 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4172 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4173 // CHECK14-NEXT: entry: 4174 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4175 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4176 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4177 // CHECK14-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4178 // CHECK14-NEXT: ret void 4179 // 4180 // 4181 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4182 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4183 // CHECK14-NEXT: entry: 4184 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4185 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4186 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4187 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4188 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4189 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4190 // CHECK14-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]]) 4191 // CHECK14-NEXT: ret void 4192 // 4193 // 4194 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4195 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4196 // CHECK14-NEXT: entry: 4197 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4198 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4199 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4200 // CHECK14-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4201 // CHECK14-NEXT: ret void 4202 // 4203 // 4204 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4205 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4206 // CHECK14-NEXT: entry: 4207 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4208 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4209 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4210 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4211 // CHECK14-NEXT: store i32 0, i32* [[F]], align 4 4212 // CHECK14-NEXT: ret void 4213 // 4214 // 4215 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4216 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4217 // CHECK14-NEXT: entry: 4218 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4219 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4220 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4221 // CHECK14-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4222 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4223 // CHECK14-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4224 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4225 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4226 // CHECK14-NEXT: ret void 4227 // 4228 // 4229 // CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4230 // CHECK14-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4231 // CHECK14-NEXT: entry: 4232 // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 4233 // CHECK14-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 4234 // CHECK14-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 4235 // CHECK14-NEXT: ret void 4236 // 4237 // 4238 // CHECK15-LABEL: define {{[^@]+}}@main 4239 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 4240 // CHECK15-NEXT: entry: 4241 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4242 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 4243 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4 4244 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4245 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4246 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4247 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4248 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4249 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4250 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4251 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 4252 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 4253 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4254 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4255 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4256 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4257 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4 4258 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4259 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4260 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4261 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4262 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4263 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4264 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4265 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4266 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4267 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4268 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4269 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4270 // CHECK15: arrayctor.loop: 4271 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4272 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4273 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4274 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4275 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4276 // CHECK15: arrayctor.cont: 4277 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 4278 // CHECK15-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 4 4279 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4280 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4281 // CHECK15: for.cond: 4282 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4283 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 4284 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4285 // CHECK15: for.body: 4286 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 4287 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4288 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 4289 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 4290 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4291 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4292 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP5]] 4293 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 4294 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 4295 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 4296 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4297 // CHECK15: for.inc: 4298 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4299 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 4300 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4301 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4302 // CHECK15: for.end: 4303 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 4304 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4305 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 4306 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4307 // CHECK15: arraydestroy.body: 4308 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4309 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4310 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4311 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4312 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4313 // CHECK15: arraydestroy.done7: 4314 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4315 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4316 // CHECK15-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4317 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i32 2 4318 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4319 // CHECK15: arraydestroy.body9: 4320 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4321 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4322 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4323 // CHECK15-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4324 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4325 // CHECK15: arraydestroy.done13: 4326 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4327 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4328 // CHECK15-NEXT: ret i32 [[TMP11]] 4329 // 4330 // 4331 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4332 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4333 // CHECK15-NEXT: entry: 4334 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4335 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4336 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4337 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4338 // CHECK15-NEXT: ret void 4339 // 4340 // 4341 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4342 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4343 // CHECK15-NEXT: entry: 4344 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4345 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4346 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4347 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4348 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4349 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4350 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4351 // CHECK15-NEXT: ret void 4352 // 4353 // 4354 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4355 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4356 // CHECK15-NEXT: entry: 4357 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4358 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4359 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4360 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4361 // CHECK15-NEXT: ret void 4362 // 4363 // 4364 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4365 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { 4366 // CHECK15-NEXT: entry: 4367 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4368 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4369 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4370 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4371 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4372 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4373 // CHECK15-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4374 // CHECK15-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4375 // CHECK15-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 4376 // CHECK15-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 4377 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4378 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 4379 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4380 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4 4381 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4382 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4383 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4384 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4385 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4386 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4387 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4388 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4389 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4390 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4391 // CHECK15: arrayctor.loop: 4392 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4393 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4394 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4395 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4396 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4397 // CHECK15: arrayctor.cont: 4398 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 4399 // CHECK15-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 4 4400 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 4401 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 4402 // CHECK15: for.cond: 4403 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4404 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 4405 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4406 // CHECK15: for.body: 4407 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 4408 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4409 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 4410 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 4411 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4412 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4413 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP5]] 4414 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 4415 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 4416 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 4417 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 4418 // CHECK15: for.inc: 4419 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4420 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 4421 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 4422 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4423 // CHECK15: for.end: 4424 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 4425 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4426 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 4427 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4428 // CHECK15: arraydestroy.body: 4429 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4430 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4431 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4432 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4433 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4434 // CHECK15: arraydestroy.done7: 4435 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 4436 // CHECK15-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4437 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 4438 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4439 // CHECK15: arraydestroy.body9: 4440 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4441 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4442 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4443 // CHECK15-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4444 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4445 // CHECK15: arraydestroy.done13: 4446 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4447 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4448 // CHECK15-NEXT: ret i32 [[TMP11]] 4449 // 4450 // 4451 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4452 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4453 // CHECK15-NEXT: entry: 4454 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4455 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4456 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4457 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4458 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4 4459 // CHECK15-NEXT: ret void 4460 // 4461 // 4462 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4463 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4464 // CHECK15-NEXT: entry: 4465 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4466 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4467 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4468 // CHECK15-NEXT: ret void 4469 // 4470 // 4471 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4472 // CHECK15-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4473 // CHECK15-NEXT: entry: 4474 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4475 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4476 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4477 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4478 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4479 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4480 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4481 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4 4482 // CHECK15-NEXT: ret void 4483 // 4484 // 4485 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4486 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4487 // CHECK15-NEXT: entry: 4488 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4489 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4490 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4491 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4492 // CHECK15-NEXT: ret void 4493 // 4494 // 4495 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4496 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4497 // CHECK15-NEXT: entry: 4498 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4499 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4500 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4501 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4502 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4503 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4504 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4505 // CHECK15-NEXT: ret void 4506 // 4507 // 4508 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4509 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4510 // CHECK15-NEXT: entry: 4511 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4512 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4513 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4514 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4515 // CHECK15-NEXT: ret void 4516 // 4517 // 4518 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4519 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4520 // CHECK15-NEXT: entry: 4521 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4522 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4523 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4524 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4525 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4 4526 // CHECK15-NEXT: ret void 4527 // 4528 // 4529 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4530 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4531 // CHECK15-NEXT: entry: 4532 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4533 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4534 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4535 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4536 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4537 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4538 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4539 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4540 // CHECK15-NEXT: ret void 4541 // 4542 // 4543 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4544 // CHECK15-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4545 // CHECK15-NEXT: entry: 4546 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4547 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4548 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4549 // CHECK15-NEXT: ret void 4550 // 4551 // 4552 // CHECK16-LABEL: define {{[^@]+}}@main 4553 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 4554 // CHECK16-NEXT: entry: 4555 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4556 // CHECK16-NEXT: [[G:%.*]] = alloca double, align 8 4557 // CHECK16-NEXT: [[G1:%.*]] = alloca double*, align 4 4558 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 4559 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4560 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4561 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 4562 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4 4563 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4564 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4565 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 4566 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 4567 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4 4568 // CHECK16-NEXT: [[SVAR:%.*]] = alloca i32, align 4 4569 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4570 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4571 // CHECK16-NEXT: store double* [[G]], double** [[G1]], align 4 4572 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 4573 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4574 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4575 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false) 4576 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4577 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 4578 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1 4579 // CHECK16-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 4580 // CHECK16-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4 4581 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4582 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2 4583 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4584 // CHECK16: arrayctor.loop: 4585 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4586 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4587 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1 4588 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4589 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4590 // CHECK16: arrayctor.cont: 4591 // CHECK16-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) 4592 // CHECK16-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 4 4593 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4594 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4595 // CHECK16: for.cond: 4596 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4597 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 4598 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4599 // CHECK16: for.body: 4600 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 4601 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4602 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 4603 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 4604 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4 4605 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4606 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP5]] 4607 // CHECK16-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 4608 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 4609 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 4610 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4611 // CHECK16: for.inc: 4612 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4613 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 4614 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4615 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4616 // CHECK16: for.end: 4617 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 4618 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 4619 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2 4620 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4621 // CHECK16: arraydestroy.body: 4622 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4623 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4624 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4625 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4626 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4627 // CHECK16: arraydestroy.done7: 4628 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 4629 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4630 // CHECK16-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 4631 // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i32 2 4632 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4633 // CHECK16: arraydestroy.body9: 4634 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4635 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4636 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4637 // CHECK16-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4638 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4639 // CHECK16: arraydestroy.done13: 4640 // CHECK16-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4641 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4642 // CHECK16-NEXT: ret i32 [[TMP11]] 4643 // 4644 // 4645 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 4646 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 4647 // CHECK16-NEXT: entry: 4648 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4649 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4650 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4651 // CHECK16-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 4652 // CHECK16-NEXT: ret void 4653 // 4654 // 4655 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 4656 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4657 // CHECK16-NEXT: entry: 4658 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4659 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4660 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4661 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4662 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4663 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4664 // CHECK16-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 4665 // CHECK16-NEXT: ret void 4666 // 4667 // 4668 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 4669 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4670 // CHECK16-NEXT: entry: 4671 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4672 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4673 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4674 // CHECK16-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4675 // CHECK16-NEXT: ret void 4676 // 4677 // 4678 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 4679 // CHECK16-SAME: () #[[ATTR3:[0-9]+]] comdat { 4680 // CHECK16-NEXT: entry: 4681 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4682 // CHECK16-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 4683 // CHECK16-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 4684 // CHECK16-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 4685 // CHECK16-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 4686 // CHECK16-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4 4687 // CHECK16-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 4688 // CHECK16-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 4689 // CHECK16-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 4690 // CHECK16-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 4691 // CHECK16-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 4692 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 4693 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 4694 // CHECK16-NEXT: store i32 0, i32* [[T_VAR]], align 4 4695 // CHECK16-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 4696 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 4697 // CHECK16-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4698 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 4699 // CHECK16-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1 4700 // CHECK16-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 4701 // CHECK16-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4 4702 // CHECK16-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4703 // CHECK16-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2 4704 // CHECK16-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 4705 // CHECK16: arrayctor.loop: 4706 // CHECK16-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 4707 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 4708 // CHECK16-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1 4709 // CHECK16-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 4710 // CHECK16-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 4711 // CHECK16: arrayctor.cont: 4712 // CHECK16-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) 4713 // CHECK16-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 4 4714 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 4715 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 4716 // CHECK16: for.cond: 4717 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 4718 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 4719 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 4720 // CHECK16: for.body: 4721 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 4722 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 4723 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP3]] 4724 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 4725 // CHECK16-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 4726 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 4727 // CHECK16-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP5]] 4728 // CHECK16-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 4729 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 4730 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 4, i1 false) 4731 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 4732 // CHECK16: for.inc: 4733 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 4734 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 4735 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 4736 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 4737 // CHECK16: for.end: 4738 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]] 4739 // CHECK16-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 4740 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2 4741 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 4742 // CHECK16: arraydestroy.body: 4743 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 4744 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 4745 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 4746 // CHECK16-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 4747 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 4748 // CHECK16: arraydestroy.done7: 4749 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 4750 // CHECK16-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 4751 // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2 4752 // CHECK16-NEXT: br label [[ARRAYDESTROY_BODY9:%.*]] 4753 // CHECK16: arraydestroy.body9: 4754 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE7]] ], [ [[ARRAYDESTROY_ELEMENT11:%.*]], [[ARRAYDESTROY_BODY9]] ] 4755 // CHECK16-NEXT: [[ARRAYDESTROY_ELEMENT11]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST10]], i32 -1 4756 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT11]]) #[[ATTR4]] 4757 // CHECK16-NEXT: [[ARRAYDESTROY_DONE12:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT11]], [[ARRAY_BEGIN8]] 4758 // CHECK16-NEXT: br i1 [[ARRAYDESTROY_DONE12]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY9]] 4759 // CHECK16: arraydestroy.done13: 4760 // CHECK16-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 4761 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 4762 // CHECK16-NEXT: ret i32 [[TMP11]] 4763 // 4764 // 4765 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 4766 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4767 // CHECK16-NEXT: entry: 4768 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4769 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4770 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4771 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4772 // CHECK16-NEXT: store float 0.000000e+00, float* [[F]], align 4 4773 // CHECK16-NEXT: ret void 4774 // 4775 // 4776 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 4777 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4778 // CHECK16-NEXT: entry: 4779 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4780 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4781 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4782 // CHECK16-NEXT: ret void 4783 // 4784 // 4785 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 4786 // CHECK16-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4787 // CHECK16-NEXT: entry: 4788 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 4789 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 4790 // CHECK16-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 4791 // CHECK16-NEXT: store float [[A]], float* [[A_ADDR]], align 4 4792 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4 4793 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4794 // CHECK16-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 4795 // CHECK16-NEXT: store float [[TMP0]], float* [[F]], align 4 4796 // CHECK16-NEXT: ret void 4797 // 4798 // 4799 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 4800 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4801 // CHECK16-NEXT: entry: 4802 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4803 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4804 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4805 // CHECK16-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 4806 // CHECK16-NEXT: ret void 4807 // 4808 // 4809 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 4810 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4811 // CHECK16-NEXT: entry: 4812 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4813 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4814 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4815 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4816 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4817 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4818 // CHECK16-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4819 // CHECK16-NEXT: ret void 4820 // 4821 // 4822 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 4823 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4824 // CHECK16-NEXT: entry: 4825 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4826 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4827 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4828 // CHECK16-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 4829 // CHECK16-NEXT: ret void 4830 // 4831 // 4832 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 4833 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4834 // CHECK16-NEXT: entry: 4835 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4836 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4837 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4838 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4839 // CHECK16-NEXT: store i32 0, i32* [[F]], align 4 4840 // CHECK16-NEXT: ret void 4841 // 4842 // 4843 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 4844 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4845 // CHECK16-NEXT: entry: 4846 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4847 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 4848 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4849 // CHECK16-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 4850 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4851 // CHECK16-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 4852 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 4853 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 4854 // CHECK16-NEXT: ret void 4855 // 4856 // 4857 // CHECK16-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 4858 // CHECK16-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 4859 // CHECK16-NEXT: entry: 4860 // CHECK16-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 4861 // CHECK16-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 4862 // CHECK16-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4 4863 // CHECK16-NEXT: ret void 4864 // 4865