1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 20 21 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 25 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 26 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 28 29 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 32 33 // expected-no-diagnostics 34 #ifndef HEADER 35 #define HEADER 36 37 void fn1(); 38 void fn2(); 39 void fn3(); 40 void fn4(); 41 void fn5(); 42 void fn6(); 43 44 int Arg; 45 46 void gtid_test() { 47 #pragma omp target 48 #pragma omp teams 49 #pragma omp distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for if (parallel: false) 55 for(int i = 0 ; i < 100; i++) { 56 gtid_test(); 57 } 58 } 59 60 61 template <typename T> 62 int tmain(T Arg) { 63 #pragma omp target 64 #pragma omp teams 65 #pragma omp distribute parallel for if (true) 66 for(int i = 0 ; i < 100; i++) { 67 fn1(); 68 } 69 #pragma omp target 70 #pragma omp teams 71 #pragma omp distribute parallel for if (false) 72 for(int i = 0 ; i < 100; i++) { 73 fn2(); 74 } 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for if (parallel: Arg) 78 for(int i = 0 ; i < 100; i++) { 79 fn3(); 80 } 81 return 0; 82 } 83 84 int main() { 85 #pragma omp target 86 #pragma omp teams 87 #pragma omp distribute parallel for if (true) 88 for(int i = 0 ; i < 100; i++) { 89 90 91 fn4(); 92 } 93 94 #pragma omp target 95 #pragma omp teams 96 #pragma omp distribute parallel for if (false) 97 for(int i = 0 ; i < 100; i++) { 98 99 100 fn5(); 101 } 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute parallel for if (Arg) 106 for(int i = 0 ; i < 100; i++) { 107 108 109 fn6(); 110 } 111 112 return tmain(Arg); 113 } 114 115 116 117 118 119 120 // call void [[T_OUTLINE_FUN_3:@.+]]( 121 122 #endif 123 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 124 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 125 // CHECK1-NEXT: entry: 126 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 128 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 129 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 130 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 131 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 132 // CHECK1: omp_offload.failed: 133 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 134 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 135 // CHECK1: omp_offload.cont: 136 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 137 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 138 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 139 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 140 // CHECK1: omp_offload.failed2: 141 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 142 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 143 // CHECK1: omp_offload.cont3: 144 // CHECK1-NEXT: ret void 145 // 146 // 147 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 148 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 149 // CHECK1-NEXT: entry: 150 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 151 // CHECK1-NEXT: ret void 152 // 153 // 154 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 155 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 156 // CHECK1-NEXT: entry: 157 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 158 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 159 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 167 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 168 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 169 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 170 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 171 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 172 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 173 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 174 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 175 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 176 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 177 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 178 // CHECK1: cond.true: 179 // CHECK1-NEXT: br label [[COND_END:%.*]] 180 // CHECK1: cond.false: 181 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 182 // CHECK1-NEXT: br label [[COND_END]] 183 // CHECK1: cond.end: 184 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 185 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 187 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 189 // CHECK1: omp.inner.for.cond: 190 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 191 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 192 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 193 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 194 // CHECK1: omp.inner.for.body: 195 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 196 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 197 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 199 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 201 // CHECK1: omp.inner.for.inc: 202 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 203 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 204 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 205 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 206 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 207 // CHECK1: omp.inner.for.end: 208 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 209 // CHECK1: omp.loop.exit: 210 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 211 // CHECK1-NEXT: ret void 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 215 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 218 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 219 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 220 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 221 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 223 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 224 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 225 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 226 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 228 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 230 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 231 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 232 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 233 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 234 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 235 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 236 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 237 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 238 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 239 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 240 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 242 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 243 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 244 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 245 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 246 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 247 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 248 // CHECK1: cond.true: 249 // CHECK1-NEXT: br label [[COND_END:%.*]] 250 // CHECK1: cond.false: 251 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 252 // CHECK1-NEXT: br label [[COND_END]] 253 // CHECK1: cond.end: 254 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 255 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 256 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 257 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 259 // CHECK1: omp.inner.for.cond: 260 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 262 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 263 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 264 // CHECK1: omp.inner.for.body: 265 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 266 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 267 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 268 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 269 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 270 // CHECK1: omp.body.continue: 271 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 272 // CHECK1: omp.inner.for.inc: 273 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 275 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 276 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 277 // CHECK1: omp.inner.for.end: 278 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 279 // CHECK1: omp.loop.exit: 280 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 281 // CHECK1-NEXT: ret void 282 // 283 // 284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 285 // CHECK1-SAME: () #[[ATTR1]] { 286 // CHECK1-NEXT: entry: 287 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 288 // CHECK1-NEXT: ret void 289 // 290 // 291 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 292 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 293 // CHECK1-NEXT: entry: 294 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 295 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 296 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 305 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 306 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 307 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 308 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 309 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 310 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 311 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 312 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 313 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 314 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 315 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 316 // CHECK1: cond.true: 317 // CHECK1-NEXT: br label [[COND_END:%.*]] 318 // CHECK1: cond.false: 319 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 320 // CHECK1-NEXT: br label [[COND_END]] 321 // CHECK1: cond.end: 322 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 323 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 324 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 325 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 326 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 327 // CHECK1: omp.inner.for.cond: 328 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 329 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 330 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 331 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 332 // CHECK1: omp.inner.for.body: 333 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 334 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 335 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 336 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 337 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 338 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 339 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 340 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 341 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 342 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 343 // CHECK1: omp.inner.for.inc: 344 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 345 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 346 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 347 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 348 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 349 // CHECK1: omp.inner.for.end: 350 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 351 // CHECK1: omp.loop.exit: 352 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 353 // CHECK1-NEXT: ret void 354 // 355 // 356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 357 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 358 // CHECK1-NEXT: entry: 359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 362 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 363 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 370 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 371 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 372 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 373 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 374 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 375 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 376 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 377 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 378 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 379 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 380 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 381 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 382 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 383 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 384 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 385 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 386 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 387 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 388 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 389 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 390 // CHECK1: cond.true: 391 // CHECK1-NEXT: br label [[COND_END:%.*]] 392 // CHECK1: cond.false: 393 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 394 // CHECK1-NEXT: br label [[COND_END]] 395 // CHECK1: cond.end: 396 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 397 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 398 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 399 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 401 // CHECK1: omp.inner.for.cond: 402 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 403 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 404 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 405 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 406 // CHECK1: omp.inner.for.body: 407 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 411 // CHECK1-NEXT: call void @_Z9gtid_testv() 412 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 413 // CHECK1: omp.body.continue: 414 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 415 // CHECK1: omp.inner.for.inc: 416 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 417 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 418 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 420 // CHECK1: omp.inner.for.end: 421 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 422 // CHECK1: omp.loop.exit: 423 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 424 // CHECK1-NEXT: ret void 425 // 426 // 427 // CHECK1-LABEL: define {{[^@]+}}@main 428 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 429 // CHECK1-NEXT: entry: 430 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 434 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 435 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 436 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 437 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 439 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 440 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 441 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 442 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 443 // CHECK1: omp_offload.failed: 444 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 445 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 446 // CHECK1: omp_offload.cont: 447 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 448 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 449 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 450 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 451 // CHECK1: omp_offload.failed2: 452 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 453 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 454 // CHECK1: omp_offload.cont3: 455 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 456 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 457 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 458 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 459 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 460 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 461 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 462 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 463 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 464 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 465 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 466 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 467 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 468 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 469 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 470 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 471 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 472 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 473 // CHECK1: omp_offload.failed5: 474 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 475 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 476 // CHECK1: omp_offload.cont6: 477 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 478 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]]) 479 // CHECK1-NEXT: ret i32 [[CALL]] 480 // 481 // 482 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 483 // CHECK1-SAME: () #[[ATTR1]] { 484 // CHECK1-NEXT: entry: 485 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 486 // CHECK1-NEXT: ret void 487 // 488 // 489 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 490 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 491 // CHECK1-NEXT: entry: 492 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 493 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 494 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 498 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 499 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 500 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 501 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 502 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 503 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 504 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 505 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 506 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 507 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 508 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 509 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 510 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 511 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 512 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 513 // CHECK1: cond.true: 514 // CHECK1-NEXT: br label [[COND_END:%.*]] 515 // CHECK1: cond.false: 516 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 517 // CHECK1-NEXT: br label [[COND_END]] 518 // CHECK1: cond.end: 519 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 520 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 521 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 522 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 523 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 524 // CHECK1: omp.inner.for.cond: 525 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 526 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 527 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 528 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 529 // CHECK1: omp.inner.for.body: 530 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 531 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 532 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 533 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 534 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 535 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 536 // CHECK1: omp.inner.for.inc: 537 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 538 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 539 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 540 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 541 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 542 // CHECK1: omp.inner.for.end: 543 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 544 // CHECK1: omp.loop.exit: 545 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 546 // CHECK1-NEXT: ret void 547 // 548 // 549 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 550 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 551 // CHECK1-NEXT: entry: 552 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 553 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 554 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 555 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 556 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 557 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 559 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 560 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 561 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 563 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 564 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 565 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 566 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 567 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 568 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 569 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 570 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 571 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 572 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 573 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 574 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 575 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 576 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 577 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 578 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 579 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 580 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 581 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 582 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 583 // CHECK1: cond.true: 584 // CHECK1-NEXT: br label [[COND_END:%.*]] 585 // CHECK1: cond.false: 586 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 587 // CHECK1-NEXT: br label [[COND_END]] 588 // CHECK1: cond.end: 589 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 590 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 591 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 592 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 593 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 594 // CHECK1: omp.inner.for.cond: 595 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 596 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 597 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 598 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 599 // CHECK1: omp.inner.for.body: 600 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 601 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 602 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 603 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 604 // CHECK1-NEXT: call void @_Z3fn4v() 605 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 606 // CHECK1: omp.body.continue: 607 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 608 // CHECK1: omp.inner.for.inc: 609 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 610 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 611 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 612 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 613 // CHECK1: omp.inner.for.end: 614 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 615 // CHECK1: omp.loop.exit: 616 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 617 // CHECK1-NEXT: ret void 618 // 619 // 620 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 621 // CHECK1-SAME: () #[[ATTR1]] { 622 // CHECK1-NEXT: entry: 623 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 624 // CHECK1-NEXT: ret void 625 // 626 // 627 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 628 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 629 // CHECK1-NEXT: entry: 630 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 631 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 632 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 633 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 637 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 638 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 639 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 641 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 642 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 643 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 644 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 645 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 646 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 647 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 648 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 649 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 650 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 651 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 652 // CHECK1: cond.true: 653 // CHECK1-NEXT: br label [[COND_END:%.*]] 654 // CHECK1: cond.false: 655 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 656 // CHECK1-NEXT: br label [[COND_END]] 657 // CHECK1: cond.end: 658 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 659 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 660 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 661 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 663 // CHECK1: omp.inner.for.cond: 664 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 665 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 666 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 667 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 668 // CHECK1: omp.inner.for.body: 669 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 670 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 671 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 672 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 673 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 674 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 675 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 676 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 677 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 678 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 679 // CHECK1: omp.inner.for.inc: 680 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 681 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 682 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 683 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 685 // CHECK1: omp.inner.for.end: 686 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 687 // CHECK1: omp.loop.exit: 688 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 689 // CHECK1-NEXT: ret void 690 // 691 // 692 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 693 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 694 // CHECK1-NEXT: entry: 695 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 696 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 697 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 698 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 699 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 700 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 701 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 702 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 703 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 705 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 707 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 708 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 709 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 710 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 711 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 712 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 713 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 714 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 715 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 716 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 717 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 718 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 719 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 720 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 721 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 722 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 723 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 724 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 725 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 726 // CHECK1: cond.true: 727 // CHECK1-NEXT: br label [[COND_END:%.*]] 728 // CHECK1: cond.false: 729 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 730 // CHECK1-NEXT: br label [[COND_END]] 731 // CHECK1: cond.end: 732 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 733 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 734 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 735 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 736 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 737 // CHECK1: omp.inner.for.cond: 738 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 740 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 741 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 742 // CHECK1: omp.inner.for.body: 743 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 744 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 745 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 746 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 747 // CHECK1-NEXT: call void @_Z3fn5v() 748 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 749 // CHECK1: omp.body.continue: 750 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 751 // CHECK1: omp.inner.for.inc: 752 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 753 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 754 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 755 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 756 // CHECK1: omp.inner.for.end: 757 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 758 // CHECK1: omp.loop.exit: 759 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 760 // CHECK1-NEXT: ret void 761 // 762 // 763 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 764 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 765 // CHECK1-NEXT: entry: 766 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 767 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 768 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 769 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 770 // CHECK1-NEXT: ret void 771 // 772 // 773 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 774 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 775 // CHECK1-NEXT: entry: 776 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 777 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 778 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 779 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 780 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 781 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 782 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 783 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 784 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 785 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 786 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 787 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 788 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 789 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 790 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 791 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 792 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 793 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 794 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 795 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 796 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 797 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 798 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 799 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 800 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 801 // CHECK1: cond.true: 802 // CHECK1-NEXT: br label [[COND_END:%.*]] 803 // CHECK1: cond.false: 804 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 805 // CHECK1-NEXT: br label [[COND_END]] 806 // CHECK1: cond.end: 807 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 808 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 809 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 810 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 811 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 812 // CHECK1: omp.inner.for.cond: 813 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 814 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 815 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 816 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 817 // CHECK1: omp.inner.for.body: 818 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 819 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 820 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 821 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 822 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 823 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 824 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 825 // CHECK1: omp_if.then: 826 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 827 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 828 // CHECK1: omp_if.else: 829 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 830 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 831 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 832 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 833 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 834 // CHECK1-NEXT: br label [[OMP_IF_END]] 835 // CHECK1: omp_if.end: 836 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 837 // CHECK1: omp.inner.for.inc: 838 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 839 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 840 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 841 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 842 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 843 // CHECK1: omp.inner.for.end: 844 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 845 // CHECK1: omp.loop.exit: 846 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 847 // CHECK1-NEXT: ret void 848 // 849 // 850 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 851 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 852 // CHECK1-NEXT: entry: 853 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 854 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 855 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 856 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 857 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 858 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 859 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 860 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 861 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 862 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 863 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 864 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 865 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 866 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 867 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 868 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 869 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 870 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 871 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 872 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 873 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 874 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 875 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 876 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 877 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 878 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 879 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 880 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 881 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 882 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 883 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 884 // CHECK1: cond.true: 885 // CHECK1-NEXT: br label [[COND_END:%.*]] 886 // CHECK1: cond.false: 887 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 888 // CHECK1-NEXT: br label [[COND_END]] 889 // CHECK1: cond.end: 890 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 891 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 892 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 893 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 895 // CHECK1: omp.inner.for.cond: 896 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 897 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 898 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 899 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 900 // CHECK1: omp.inner.for.body: 901 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 902 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 903 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 904 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 905 // CHECK1-NEXT: call void @_Z3fn6v() 906 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 907 // CHECK1: omp.body.continue: 908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 909 // CHECK1: omp.inner.for.inc: 910 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 911 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 912 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 913 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 914 // CHECK1: omp.inner.for.end: 915 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 916 // CHECK1: omp.loop.exit: 917 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 918 // CHECK1-NEXT: ret void 919 // 920 // 921 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 922 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 923 // CHECK1-NEXT: entry: 924 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 928 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 929 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 930 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 931 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 932 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 933 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 934 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 935 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 936 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 937 // CHECK1: omp_offload.failed: 938 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 939 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 940 // CHECK1: omp_offload.cont: 941 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 942 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 943 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 944 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 945 // CHECK1: omp_offload.failed2: 946 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 947 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 948 // CHECK1: omp_offload.cont3: 949 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 950 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 951 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 952 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 953 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 954 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 955 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 956 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 957 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 958 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 959 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 960 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 961 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 962 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 963 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 964 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 965 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 966 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 967 // CHECK1: omp_offload.failed5: 968 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 969 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 970 // CHECK1: omp_offload.cont6: 971 // CHECK1-NEXT: ret i32 0 972 // 973 // 974 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 975 // CHECK1-SAME: () #[[ATTR1]] { 976 // CHECK1-NEXT: entry: 977 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 978 // CHECK1-NEXT: ret void 979 // 980 // 981 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 982 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 983 // CHECK1-NEXT: entry: 984 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 985 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 986 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 992 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 993 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 994 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 995 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 996 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 997 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 998 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 999 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1000 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1001 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1002 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1003 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1004 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1005 // CHECK1: cond.true: 1006 // CHECK1-NEXT: br label [[COND_END:%.*]] 1007 // CHECK1: cond.false: 1008 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1009 // CHECK1-NEXT: br label [[COND_END]] 1010 // CHECK1: cond.end: 1011 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1012 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1013 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1014 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1016 // CHECK1: omp.inner.for.cond: 1017 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1019 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1020 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1021 // CHECK1: omp.inner.for.body: 1022 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1023 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1024 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1025 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1026 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1027 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1028 // CHECK1: omp.inner.for.inc: 1029 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1030 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1031 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1032 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1033 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1034 // CHECK1: omp.inner.for.end: 1035 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1036 // CHECK1: omp.loop.exit: 1037 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1038 // CHECK1-NEXT: ret void 1039 // 1040 // 1041 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1042 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1043 // CHECK1-NEXT: entry: 1044 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1047 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1048 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1049 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1050 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1056 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1057 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1058 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1059 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1060 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1061 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1062 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1063 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1064 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1065 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1066 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1067 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1068 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1069 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1070 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1071 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1072 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1073 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1074 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1075 // CHECK1: cond.true: 1076 // CHECK1-NEXT: br label [[COND_END:%.*]] 1077 // CHECK1: cond.false: 1078 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1079 // CHECK1-NEXT: br label [[COND_END]] 1080 // CHECK1: cond.end: 1081 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1082 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1083 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1084 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1085 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1086 // CHECK1: omp.inner.for.cond: 1087 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1088 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1089 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1090 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1091 // CHECK1: omp.inner.for.body: 1092 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1093 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1094 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1095 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1096 // CHECK1-NEXT: call void @_Z3fn1v() 1097 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1098 // CHECK1: omp.body.continue: 1099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1100 // CHECK1: omp.inner.for.inc: 1101 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1102 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1103 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1104 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1105 // CHECK1: omp.inner.for.end: 1106 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1107 // CHECK1: omp.loop.exit: 1108 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1109 // CHECK1-NEXT: ret void 1110 // 1111 // 1112 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 1113 // CHECK1-SAME: () #[[ATTR1]] { 1114 // CHECK1-NEXT: entry: 1115 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 1116 // CHECK1-NEXT: ret void 1117 // 1118 // 1119 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1120 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1121 // CHECK1-NEXT: entry: 1122 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1123 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1124 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1125 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1126 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1127 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1128 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1129 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1130 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1131 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1132 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1133 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1134 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1135 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1136 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1137 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1138 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1139 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1140 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1141 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1142 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1143 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1144 // CHECK1: cond.true: 1145 // CHECK1-NEXT: br label [[COND_END:%.*]] 1146 // CHECK1: cond.false: 1147 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1148 // CHECK1-NEXT: br label [[COND_END]] 1149 // CHECK1: cond.end: 1150 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1151 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1152 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1153 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1154 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1155 // CHECK1: omp.inner.for.cond: 1156 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1157 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1158 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1159 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1160 // CHECK1: omp.inner.for.body: 1161 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1162 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1163 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1164 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1165 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1166 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1167 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1168 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1169 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1170 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1171 // CHECK1: omp.inner.for.inc: 1172 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1173 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1174 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1175 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1177 // CHECK1: omp.inner.for.end: 1178 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1179 // CHECK1: omp.loop.exit: 1180 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1181 // CHECK1-NEXT: ret void 1182 // 1183 // 1184 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 1185 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1186 // CHECK1-NEXT: entry: 1187 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1188 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1189 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1190 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1191 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1192 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1193 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1194 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1195 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1196 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1197 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1198 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1199 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1200 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1201 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1202 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1203 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1204 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1205 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1206 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1207 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1208 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1209 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1210 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1211 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1212 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1213 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1214 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1215 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1216 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1217 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1218 // CHECK1: cond.true: 1219 // CHECK1-NEXT: br label [[COND_END:%.*]] 1220 // CHECK1: cond.false: 1221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1222 // CHECK1-NEXT: br label [[COND_END]] 1223 // CHECK1: cond.end: 1224 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1225 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1226 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1227 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1228 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1229 // CHECK1: omp.inner.for.cond: 1230 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1231 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1232 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1233 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1234 // CHECK1: omp.inner.for.body: 1235 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1236 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1237 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1238 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1239 // CHECK1-NEXT: call void @_Z3fn2v() 1240 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1241 // CHECK1: omp.body.continue: 1242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1243 // CHECK1: omp.inner.for.inc: 1244 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1245 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1246 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1248 // CHECK1: omp.inner.for.end: 1249 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1250 // CHECK1: omp.loop.exit: 1251 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1252 // CHECK1-NEXT: ret void 1253 // 1254 // 1255 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 1256 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1257 // CHECK1-NEXT: entry: 1258 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1259 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 1260 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 1261 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 1262 // CHECK1-NEXT: ret void 1263 // 1264 // 1265 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1266 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 1267 // CHECK1-NEXT: entry: 1268 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1269 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1270 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 1271 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1272 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1273 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1274 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1275 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1276 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1277 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1278 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1279 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1280 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1281 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 1282 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 1283 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1284 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1285 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1286 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1287 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1288 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1289 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1290 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1291 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1292 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1293 // CHECK1: cond.true: 1294 // CHECK1-NEXT: br label [[COND_END:%.*]] 1295 // CHECK1: cond.false: 1296 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1297 // CHECK1-NEXT: br label [[COND_END]] 1298 // CHECK1: cond.end: 1299 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1300 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1301 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1302 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1304 // CHECK1: omp.inner.for.cond: 1305 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1306 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1307 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1308 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1309 // CHECK1: omp.inner.for.body: 1310 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1311 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1312 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1313 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1314 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 1315 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 1316 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1317 // CHECK1: omp_if.then: 1318 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1319 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1320 // CHECK1: omp_if.else: 1321 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1322 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1323 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1324 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 1325 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1326 // CHECK1-NEXT: br label [[OMP_IF_END]] 1327 // CHECK1: omp_if.end: 1328 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1329 // CHECK1: omp.inner.for.inc: 1330 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1331 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1332 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1333 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1334 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1335 // CHECK1: omp.inner.for.end: 1336 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1337 // CHECK1: omp.loop.exit: 1338 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1339 // CHECK1-NEXT: ret void 1340 // 1341 // 1342 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1343 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1344 // CHECK1-NEXT: entry: 1345 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1346 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1347 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1348 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1349 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1350 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1351 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1352 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1353 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1354 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1355 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1356 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1357 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1358 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1359 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1360 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1361 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1362 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1363 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1364 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1365 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1366 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1367 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1368 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1369 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1370 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1371 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1372 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1373 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1374 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1375 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1376 // CHECK1: cond.true: 1377 // CHECK1-NEXT: br label [[COND_END:%.*]] 1378 // CHECK1: cond.false: 1379 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1380 // CHECK1-NEXT: br label [[COND_END]] 1381 // CHECK1: cond.end: 1382 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1383 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1384 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1385 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1386 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1387 // CHECK1: omp.inner.for.cond: 1388 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1389 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1390 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1391 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1392 // CHECK1: omp.inner.for.body: 1393 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1394 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1395 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1396 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1397 // CHECK1-NEXT: call void @_Z3fn3v() 1398 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1399 // CHECK1: omp.body.continue: 1400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1401 // CHECK1: omp.inner.for.inc: 1402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1403 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1404 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1406 // CHECK1: omp.inner.for.end: 1407 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1408 // CHECK1: omp.loop.exit: 1409 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1410 // CHECK1-NEXT: ret void 1411 // 1412 // 1413 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1414 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1415 // CHECK1-NEXT: entry: 1416 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1417 // CHECK1-NEXT: ret void 1418 // 1419