1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 9 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 13 14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 17 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 20 21 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 22 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 24 25 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 28 29 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 32 33 // expected-no-diagnostics 34 #ifndef HEADER 35 #define HEADER 36 37 void fn1(); 38 void fn2(); 39 void fn3(); 40 void fn4(); 41 void fn5(); 42 void fn6(); 43 44 int Arg; 45 46 void gtid_test() { 47 #pragma omp target 48 #pragma omp teams 49 #pragma omp distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for if (parallel: false) 55 for(int i = 0 ; i < 100; i++) { 56 gtid_test(); 57 } 58 } 59 60 61 template <typename T> 62 int tmain(T Arg) { 63 #pragma omp target 64 #pragma omp teams 65 #pragma omp distribute parallel for if (true) 66 for(int i = 0 ; i < 100; i++) { 67 fn1(); 68 } 69 #pragma omp target 70 #pragma omp teams 71 #pragma omp distribute parallel for if (false) 72 for(int i = 0 ; i < 100; i++) { 73 fn2(); 74 } 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for if (parallel: Arg) 78 for(int i = 0 ; i < 100; i++) { 79 fn3(); 80 } 81 return 0; 82 } 83 84 int main() { 85 #pragma omp target 86 #pragma omp teams 87 #pragma omp distribute parallel for if (true) 88 for(int i = 0 ; i < 100; i++) { 89 90 91 fn4(); 92 } 93 94 #pragma omp target 95 #pragma omp teams 96 #pragma omp distribute parallel for if (false) 97 for(int i = 0 ; i < 100; i++) { 98 99 100 fn5(); 101 } 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute parallel for if (Arg) 106 for(int i = 0 ; i < 100; i++) { 107 108 109 fn6(); 110 } 111 112 return tmain(Arg); 113 } 114 115 116 117 118 119 120 // call void [[T_OUTLINE_FUN_3:@.+]]( 121 122 #endif 123 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 124 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 125 // CHECK1-NEXT: entry: 126 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 128 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 129 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 130 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 131 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 132 // CHECK1: omp_offload.failed: 133 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 134 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 135 // CHECK1: omp_offload.cont: 136 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 137 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 138 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 139 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 140 // CHECK1: omp_offload.failed2: 141 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 142 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 143 // CHECK1: omp_offload.cont3: 144 // CHECK1-NEXT: ret void 145 // 146 // 147 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 148 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 149 // CHECK1-NEXT: entry: 150 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 151 // CHECK1-NEXT: ret void 152 // 153 // 154 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 155 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 156 // CHECK1-NEXT: entry: 157 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 158 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 159 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 167 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 168 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 169 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 170 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 171 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 172 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 173 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 174 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 175 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 176 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 177 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 178 // CHECK1: cond.true: 179 // CHECK1-NEXT: br label [[COND_END:%.*]] 180 // CHECK1: cond.false: 181 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 182 // CHECK1-NEXT: br label [[COND_END]] 183 // CHECK1: cond.end: 184 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 185 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 187 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 188 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 189 // CHECK1: omp.inner.for.cond: 190 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 191 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 192 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 193 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 194 // CHECK1: omp.inner.for.body: 195 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 196 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 197 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 199 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 201 // CHECK1: omp.inner.for.inc: 202 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 203 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 204 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 205 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 206 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 207 // CHECK1: omp.inner.for.end: 208 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 209 // CHECK1: omp.loop.exit: 210 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 211 // CHECK1-NEXT: ret void 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 215 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 218 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 219 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 220 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 221 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 223 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 224 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 225 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 226 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 228 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 230 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 231 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 232 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 233 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 234 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 235 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 236 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 237 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 238 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 239 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 240 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 242 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 243 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 244 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 245 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 246 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 247 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 248 // CHECK1: cond.true: 249 // CHECK1-NEXT: br label [[COND_END:%.*]] 250 // CHECK1: cond.false: 251 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 252 // CHECK1-NEXT: br label [[COND_END]] 253 // CHECK1: cond.end: 254 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 255 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 256 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 257 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 259 // CHECK1: omp.inner.for.cond: 260 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 262 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 263 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 264 // CHECK1: omp.inner.for.body: 265 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 266 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 267 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 268 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 269 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 270 // CHECK1: omp.body.continue: 271 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 272 // CHECK1: omp.inner.for.inc: 273 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 275 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 276 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 277 // CHECK1: omp.inner.for.end: 278 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 279 // CHECK1: omp.loop.exit: 280 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 281 // CHECK1-NEXT: ret void 282 // 283 // 284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 285 // CHECK1-SAME: () #[[ATTR1]] { 286 // CHECK1-NEXT: entry: 287 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 288 // CHECK1-NEXT: ret void 289 // 290 // 291 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 292 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 293 // CHECK1-NEXT: entry: 294 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 295 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 296 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 305 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 306 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 307 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 308 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 309 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 310 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 311 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 312 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 313 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 314 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 315 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 316 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 317 // CHECK1: cond.true: 318 // CHECK1-NEXT: br label [[COND_END:%.*]] 319 // CHECK1: cond.false: 320 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 321 // CHECK1-NEXT: br label [[COND_END]] 322 // CHECK1: cond.end: 323 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 324 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 325 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 326 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 327 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 328 // CHECK1: omp.inner.for.cond: 329 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 331 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 332 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 333 // CHECK1: omp.inner.for.body: 334 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 335 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 336 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 337 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 338 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 339 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 340 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 341 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 342 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 343 // CHECK1: omp.inner.for.inc: 344 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 345 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 346 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 347 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 348 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 349 // CHECK1: omp.inner.for.end: 350 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 351 // CHECK1: omp.loop.exit: 352 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 353 // CHECK1-NEXT: ret void 354 // 355 // 356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 357 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 358 // CHECK1-NEXT: entry: 359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 362 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 363 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 370 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 371 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 372 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 373 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 374 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 375 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 376 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 377 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 378 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 379 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 380 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 381 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 382 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 383 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 384 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 385 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 386 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 387 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 388 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 389 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 390 // CHECK1: cond.true: 391 // CHECK1-NEXT: br label [[COND_END:%.*]] 392 // CHECK1: cond.false: 393 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 394 // CHECK1-NEXT: br label [[COND_END]] 395 // CHECK1: cond.end: 396 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 397 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 398 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 399 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 401 // CHECK1: omp.inner.for.cond: 402 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 403 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 404 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 405 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 406 // CHECK1: omp.inner.for.body: 407 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 411 // CHECK1-NEXT: call void @_Z9gtid_testv() 412 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 413 // CHECK1: omp.body.continue: 414 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 415 // CHECK1: omp.inner.for.inc: 416 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 417 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 418 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 420 // CHECK1: omp.inner.for.end: 421 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 422 // CHECK1: omp.loop.exit: 423 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 424 // CHECK1-NEXT: ret void 425 // 426 // 427 // CHECK1-LABEL: define {{[^@]+}}@main 428 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 429 // CHECK1-NEXT: entry: 430 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 434 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 435 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 436 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 437 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 439 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 440 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 441 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 442 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 443 // CHECK1: omp_offload.failed: 444 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 445 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 446 // CHECK1: omp_offload.cont: 447 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 448 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 449 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 450 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 451 // CHECK1: omp_offload.failed2: 452 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 453 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 454 // CHECK1: omp_offload.cont3: 455 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 456 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 457 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 458 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 459 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 460 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 461 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 462 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 463 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 464 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 465 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 466 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 467 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 468 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 469 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 470 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 471 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 472 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 473 // CHECK1: omp_offload.failed5: 474 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 475 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 476 // CHECK1: omp_offload.cont6: 477 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 478 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 479 // CHECK1-NEXT: ret i32 [[CALL]] 480 // 481 // 482 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 483 // CHECK1-SAME: () #[[ATTR1]] { 484 // CHECK1-NEXT: entry: 485 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 486 // CHECK1-NEXT: ret void 487 // 488 // 489 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 490 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 491 // CHECK1-NEXT: entry: 492 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 493 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 494 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 498 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 499 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 500 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 501 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 502 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 503 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 504 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 505 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 506 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 507 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 508 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 509 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 510 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 511 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 512 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 513 // CHECK1: cond.true: 514 // CHECK1-NEXT: br label [[COND_END:%.*]] 515 // CHECK1: cond.false: 516 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 517 // CHECK1-NEXT: br label [[COND_END]] 518 // CHECK1: cond.end: 519 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 520 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 521 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 522 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 523 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 524 // CHECK1: omp.inner.for.cond: 525 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 526 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 527 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 528 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 529 // CHECK1: omp.inner.for.body: 530 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 531 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 532 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 533 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 534 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 535 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 536 // CHECK1: omp.inner.for.inc: 537 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 538 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 539 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 540 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 541 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 542 // CHECK1: omp.inner.for.end: 543 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 544 // CHECK1: omp.loop.exit: 545 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 546 // CHECK1-NEXT: ret void 547 // 548 // 549 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 550 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 551 // CHECK1-NEXT: entry: 552 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 553 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 554 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 555 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 556 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 557 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 559 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 560 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 561 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 563 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 564 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 565 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 566 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 567 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 568 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 569 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 570 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 571 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 572 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 573 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 574 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 575 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 576 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 577 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 578 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 579 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 580 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 581 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 582 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 583 // CHECK1: cond.true: 584 // CHECK1-NEXT: br label [[COND_END:%.*]] 585 // CHECK1: cond.false: 586 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 587 // CHECK1-NEXT: br label [[COND_END]] 588 // CHECK1: cond.end: 589 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 590 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 591 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 592 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 593 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 594 // CHECK1: omp.inner.for.cond: 595 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 596 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 597 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 598 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 599 // CHECK1: omp.inner.for.body: 600 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 601 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 602 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 603 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 604 // CHECK1-NEXT: call void @_Z3fn4v() 605 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 606 // CHECK1: omp.body.continue: 607 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 608 // CHECK1: omp.inner.for.inc: 609 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 610 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 611 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 612 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 613 // CHECK1: omp.inner.for.end: 614 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 615 // CHECK1: omp.loop.exit: 616 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 617 // CHECK1-NEXT: ret void 618 // 619 // 620 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 621 // CHECK1-SAME: () #[[ATTR1]] { 622 // CHECK1-NEXT: entry: 623 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 624 // CHECK1-NEXT: ret void 625 // 626 // 627 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 628 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 629 // CHECK1-NEXT: entry: 630 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 631 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 632 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 633 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 637 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 638 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 639 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 641 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 642 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 643 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 644 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 645 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 646 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 647 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 648 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 649 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 650 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 651 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 652 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 653 // CHECK1: cond.true: 654 // CHECK1-NEXT: br label [[COND_END:%.*]] 655 // CHECK1: cond.false: 656 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 657 // CHECK1-NEXT: br label [[COND_END]] 658 // CHECK1: cond.end: 659 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 660 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 661 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 662 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 663 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 664 // CHECK1: omp.inner.for.cond: 665 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 666 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 667 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 668 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 669 // CHECK1: omp.inner.for.body: 670 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 671 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 672 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 673 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 674 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 675 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 677 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 678 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 679 // CHECK1: omp.inner.for.inc: 680 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 681 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 682 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 683 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 685 // CHECK1: omp.inner.for.end: 686 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 687 // CHECK1: omp.loop.exit: 688 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 689 // CHECK1-NEXT: ret void 690 // 691 // 692 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 693 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 694 // CHECK1-NEXT: entry: 695 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 696 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 697 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 698 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 699 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 700 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 701 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 702 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 703 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 705 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 707 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 708 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 709 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 710 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 711 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 712 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 713 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 714 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 715 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 716 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 717 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 718 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 719 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 720 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 721 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 722 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 723 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 724 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 725 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 726 // CHECK1: cond.true: 727 // CHECK1-NEXT: br label [[COND_END:%.*]] 728 // CHECK1: cond.false: 729 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 730 // CHECK1-NEXT: br label [[COND_END]] 731 // CHECK1: cond.end: 732 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 733 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 734 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 735 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 736 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 737 // CHECK1: omp.inner.for.cond: 738 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 739 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 740 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 741 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 742 // CHECK1: omp.inner.for.body: 743 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 744 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 745 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 746 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 747 // CHECK1-NEXT: call void @_Z3fn5v() 748 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 749 // CHECK1: omp.body.continue: 750 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 751 // CHECK1: omp.inner.for.inc: 752 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 753 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 754 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 755 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 756 // CHECK1: omp.inner.for.end: 757 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 758 // CHECK1: omp.loop.exit: 759 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 760 // CHECK1-NEXT: ret void 761 // 762 // 763 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 764 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 765 // CHECK1-NEXT: entry: 766 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 767 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 768 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 769 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 770 // CHECK1-NEXT: ret void 771 // 772 // 773 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 774 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 775 // CHECK1-NEXT: entry: 776 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 777 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 778 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 779 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 780 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 781 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 782 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 783 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 784 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 785 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 786 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 787 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 788 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 789 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 790 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 791 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 792 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 793 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 794 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 795 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 796 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 797 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 798 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 799 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 800 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 801 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 802 // CHECK1: cond.true: 803 // CHECK1-NEXT: br label [[COND_END:%.*]] 804 // CHECK1: cond.false: 805 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 806 // CHECK1-NEXT: br label [[COND_END]] 807 // CHECK1: cond.end: 808 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 809 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 810 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 811 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 812 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 813 // CHECK1: omp.inner.for.cond: 814 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 815 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 816 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 817 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 818 // CHECK1: omp.inner.for.body: 819 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 820 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 821 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 822 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 823 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 824 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 825 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 826 // CHECK1: omp_if.then: 827 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 828 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 829 // CHECK1: omp_if.else: 830 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 831 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 832 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 833 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 834 // CHECK1-NEXT: br label [[OMP_IF_END]] 835 // CHECK1: omp_if.end: 836 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 837 // CHECK1: omp.inner.for.inc: 838 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 839 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 840 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 841 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 842 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 843 // CHECK1: omp.inner.for.end: 844 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 845 // CHECK1: omp.loop.exit: 846 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 847 // CHECK1-NEXT: ret void 848 // 849 // 850 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 851 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 852 // CHECK1-NEXT: entry: 853 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 854 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 855 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 856 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 857 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 858 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 859 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 860 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 861 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 862 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 863 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 864 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 865 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 866 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 867 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 868 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 869 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 870 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 871 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 872 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 873 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 874 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 875 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 876 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 877 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 878 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 879 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 880 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 881 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 882 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 883 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 884 // CHECK1: cond.true: 885 // CHECK1-NEXT: br label [[COND_END:%.*]] 886 // CHECK1: cond.false: 887 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 888 // CHECK1-NEXT: br label [[COND_END]] 889 // CHECK1: cond.end: 890 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 891 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 892 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 893 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 895 // CHECK1: omp.inner.for.cond: 896 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 897 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 898 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 899 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 900 // CHECK1: omp.inner.for.body: 901 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 902 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 903 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 904 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 905 // CHECK1-NEXT: call void @_Z3fn6v() 906 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 907 // CHECK1: omp.body.continue: 908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 909 // CHECK1: omp.inner.for.inc: 910 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 911 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 912 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 913 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 914 // CHECK1: omp.inner.for.end: 915 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 916 // CHECK1: omp.loop.exit: 917 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 918 // CHECK1-NEXT: ret void 919 // 920 // 921 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 922 // CHECK1-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 923 // CHECK1-NEXT: entry: 924 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 928 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 929 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 930 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 931 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 932 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 933 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 934 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 935 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 936 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 937 // CHECK1: omp_offload.failed: 938 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 939 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 940 // CHECK1: omp_offload.cont: 941 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 942 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 943 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 944 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 945 // CHECK1: omp_offload.failed2: 946 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 947 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 948 // CHECK1: omp_offload.cont3: 949 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 950 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 951 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 952 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 953 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 954 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 955 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 956 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 957 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 958 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 959 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 960 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8 961 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 962 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 963 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 964 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 965 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 966 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 967 // CHECK1: omp_offload.failed5: 968 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 969 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 970 // CHECK1: omp_offload.cont6: 971 // CHECK1-NEXT: ret i32 0 972 // 973 // 974 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 975 // CHECK1-SAME: () #[[ATTR1]] { 976 // CHECK1-NEXT: entry: 977 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 978 // CHECK1-NEXT: ret void 979 // 980 // 981 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 982 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 983 // CHECK1-NEXT: entry: 984 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 985 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 986 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 992 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 993 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 994 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 995 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 996 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 997 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 998 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 999 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1000 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1001 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1002 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1003 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1004 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1005 // CHECK1: cond.true: 1006 // CHECK1-NEXT: br label [[COND_END:%.*]] 1007 // CHECK1: cond.false: 1008 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1009 // CHECK1-NEXT: br label [[COND_END]] 1010 // CHECK1: cond.end: 1011 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1012 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1013 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1014 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1016 // CHECK1: omp.inner.for.cond: 1017 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1019 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1020 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1021 // CHECK1: omp.inner.for.body: 1022 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1023 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1024 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1025 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1026 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1027 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1028 // CHECK1: omp.inner.for.inc: 1029 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1030 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1031 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1032 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1033 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1034 // CHECK1: omp.inner.for.end: 1035 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1036 // CHECK1: omp.loop.exit: 1037 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1038 // CHECK1-NEXT: ret void 1039 // 1040 // 1041 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1042 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1043 // CHECK1-NEXT: entry: 1044 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1047 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1048 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1049 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1050 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1056 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1057 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1058 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1059 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1060 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1061 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1062 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1063 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1064 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1065 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1066 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1067 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1068 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1069 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1070 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1071 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1072 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1073 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1074 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1075 // CHECK1: cond.true: 1076 // CHECK1-NEXT: br label [[COND_END:%.*]] 1077 // CHECK1: cond.false: 1078 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1079 // CHECK1-NEXT: br label [[COND_END]] 1080 // CHECK1: cond.end: 1081 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1082 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1083 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1084 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1085 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1086 // CHECK1: omp.inner.for.cond: 1087 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1088 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1089 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1090 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1091 // CHECK1: omp.inner.for.body: 1092 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1093 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1094 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1095 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1096 // CHECK1-NEXT: call void @_Z3fn1v() 1097 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1098 // CHECK1: omp.body.continue: 1099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1100 // CHECK1: omp.inner.for.inc: 1101 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1102 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1103 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1104 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1105 // CHECK1: omp.inner.for.end: 1106 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1107 // CHECK1: omp.loop.exit: 1108 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1109 // CHECK1-NEXT: ret void 1110 // 1111 // 1112 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 1113 // CHECK1-SAME: () #[[ATTR1]] { 1114 // CHECK1-NEXT: entry: 1115 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 1116 // CHECK1-NEXT: ret void 1117 // 1118 // 1119 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1120 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1121 // CHECK1-NEXT: entry: 1122 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1123 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1124 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1125 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1126 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1127 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1128 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1129 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1130 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1131 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1132 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1133 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1134 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1135 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1136 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1137 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1138 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1139 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1140 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1141 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1142 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1143 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1144 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1145 // CHECK1: cond.true: 1146 // CHECK1-NEXT: br label [[COND_END:%.*]] 1147 // CHECK1: cond.false: 1148 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1149 // CHECK1-NEXT: br label [[COND_END]] 1150 // CHECK1: cond.end: 1151 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1152 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1153 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1154 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1155 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1156 // CHECK1: omp.inner.for.cond: 1157 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1158 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1159 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1160 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1161 // CHECK1: omp.inner.for.body: 1162 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1163 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1164 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1165 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1166 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1167 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1168 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1169 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1170 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1171 // CHECK1: omp.inner.for.inc: 1172 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1173 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1174 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1175 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1177 // CHECK1: omp.inner.for.end: 1178 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1179 // CHECK1: omp.loop.exit: 1180 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1181 // CHECK1-NEXT: ret void 1182 // 1183 // 1184 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 1185 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1186 // CHECK1-NEXT: entry: 1187 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1188 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1189 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1190 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1191 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1192 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1193 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1194 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1195 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1196 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1197 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1198 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1199 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1200 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1201 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1202 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1203 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1204 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1205 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1206 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1207 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1208 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1209 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1210 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1211 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1212 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1213 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1214 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1215 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1216 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1217 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1218 // CHECK1: cond.true: 1219 // CHECK1-NEXT: br label [[COND_END:%.*]] 1220 // CHECK1: cond.false: 1221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1222 // CHECK1-NEXT: br label [[COND_END]] 1223 // CHECK1: cond.end: 1224 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1225 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1226 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1227 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1228 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1229 // CHECK1: omp.inner.for.cond: 1230 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1231 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1232 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1233 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1234 // CHECK1: omp.inner.for.body: 1235 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1236 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1237 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1238 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1239 // CHECK1-NEXT: call void @_Z3fn2v() 1240 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1241 // CHECK1: omp.body.continue: 1242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1243 // CHECK1: omp.inner.for.inc: 1244 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1245 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1246 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1248 // CHECK1: omp.inner.for.end: 1249 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1250 // CHECK1: omp.loop.exit: 1251 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1252 // CHECK1-NEXT: ret void 1253 // 1254 // 1255 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 1256 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 1257 // CHECK1-NEXT: entry: 1258 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1259 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 1260 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 1261 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 1262 // CHECK1-NEXT: ret void 1263 // 1264 // 1265 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1266 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 1267 // CHECK1-NEXT: entry: 1268 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1269 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1270 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 1271 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1272 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1273 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1274 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1275 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1276 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1277 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1278 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1279 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1280 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1281 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1282 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 1283 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 1284 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1285 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1286 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1287 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1288 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1289 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1290 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1291 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1292 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1293 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1294 // CHECK1: cond.true: 1295 // CHECK1-NEXT: br label [[COND_END:%.*]] 1296 // CHECK1: cond.false: 1297 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1298 // CHECK1-NEXT: br label [[COND_END]] 1299 // CHECK1: cond.end: 1300 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1301 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1302 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1303 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1305 // CHECK1: omp.inner.for.cond: 1306 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1307 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1308 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1309 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1310 // CHECK1: omp.inner.for.body: 1311 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1312 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1313 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1314 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1315 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 1316 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 1317 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1318 // CHECK1: omp_if.then: 1319 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1320 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1321 // CHECK1: omp_if.else: 1322 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1323 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1324 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 1325 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1326 // CHECK1-NEXT: br label [[OMP_IF_END]] 1327 // CHECK1: omp_if.end: 1328 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1329 // CHECK1: omp.inner.for.inc: 1330 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1331 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1332 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1333 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1334 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1335 // CHECK1: omp.inner.for.end: 1336 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1337 // CHECK1: omp.loop.exit: 1338 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1339 // CHECK1-NEXT: ret void 1340 // 1341 // 1342 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1343 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1344 // CHECK1-NEXT: entry: 1345 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1346 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1347 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1348 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1349 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1350 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1351 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1352 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1353 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1354 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1355 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1356 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1357 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1358 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1359 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1360 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1361 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1362 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1363 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1364 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1365 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1366 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1367 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1368 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1369 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1370 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1371 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1372 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1373 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1374 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1375 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1376 // CHECK1: cond.true: 1377 // CHECK1-NEXT: br label [[COND_END:%.*]] 1378 // CHECK1: cond.false: 1379 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1380 // CHECK1-NEXT: br label [[COND_END]] 1381 // CHECK1: cond.end: 1382 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1383 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1384 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1385 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1386 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1387 // CHECK1: omp.inner.for.cond: 1388 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1389 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1390 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1391 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1392 // CHECK1: omp.inner.for.body: 1393 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1394 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1395 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1396 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1397 // CHECK1-NEXT: call void @_Z3fn3v() 1398 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1399 // CHECK1: omp.body.continue: 1400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1401 // CHECK1: omp.inner.for.inc: 1402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1403 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1404 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1406 // CHECK1: omp.inner.for.end: 1407 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1408 // CHECK1: omp.loop.exit: 1409 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1410 // CHECK1-NEXT: ret void 1411 // 1412 // 1413 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1414 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1415 // CHECK1-NEXT: entry: 1416 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1417 // CHECK1-NEXT: ret void 1418 // 1419 // 1420 // CHECK2-LABEL: define {{[^@]+}}@_Z9gtid_testv 1421 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 1422 // CHECK2-NEXT: entry: 1423 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1424 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1425 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 1426 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1427 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1428 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1429 // CHECK2: omp_offload.failed: 1430 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 1431 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1432 // CHECK2: omp_offload.cont: 1433 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1434 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1435 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1436 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1437 // CHECK2: omp_offload.failed2: 1438 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 1439 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1440 // CHECK2: omp_offload.cont3: 1441 // CHECK2-NEXT: ret void 1442 // 1443 // 1444 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 1445 // CHECK2-SAME: () #[[ATTR1:[0-9]+]] { 1446 // CHECK2-NEXT: entry: 1447 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1448 // CHECK2-NEXT: ret void 1449 // 1450 // 1451 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1452 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1453 // CHECK2-NEXT: entry: 1454 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1455 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1456 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1457 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1458 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1459 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1460 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1461 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1462 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1463 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1464 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1465 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1466 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1467 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1468 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1469 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1470 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1471 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1472 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1473 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1474 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1475 // CHECK2: cond.true: 1476 // CHECK2-NEXT: br label [[COND_END:%.*]] 1477 // CHECK2: cond.false: 1478 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1479 // CHECK2-NEXT: br label [[COND_END]] 1480 // CHECK2: cond.end: 1481 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1482 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1483 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1484 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1485 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1486 // CHECK2: omp.inner.for.cond: 1487 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1488 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1489 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1490 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1491 // CHECK2: omp.inner.for.body: 1492 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1493 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1494 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1495 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1496 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1497 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1498 // CHECK2: omp.inner.for.inc: 1499 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1500 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1501 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1502 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1503 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1504 // CHECK2: omp.inner.for.end: 1505 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1506 // CHECK2: omp.loop.exit: 1507 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1508 // CHECK2-NEXT: ret void 1509 // 1510 // 1511 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1512 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1513 // CHECK2-NEXT: entry: 1514 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1515 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1516 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1517 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1518 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1519 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1520 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1521 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1522 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1523 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1524 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1525 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1526 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1527 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1528 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1529 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1530 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1531 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1532 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1533 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1534 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1535 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1536 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1537 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1538 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1539 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1540 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1541 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1542 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1543 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1544 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1545 // CHECK2: cond.true: 1546 // CHECK2-NEXT: br label [[COND_END:%.*]] 1547 // CHECK2: cond.false: 1548 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1549 // CHECK2-NEXT: br label [[COND_END]] 1550 // CHECK2: cond.end: 1551 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1552 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1553 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1554 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1555 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1556 // CHECK2: omp.inner.for.cond: 1557 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1558 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1559 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1560 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1561 // CHECK2: omp.inner.for.body: 1562 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1563 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1564 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1565 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1566 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1567 // CHECK2: omp.body.continue: 1568 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1569 // CHECK2: omp.inner.for.inc: 1570 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1571 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1572 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1573 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1574 // CHECK2: omp.inner.for.end: 1575 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1576 // CHECK2: omp.loop.exit: 1577 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1578 // CHECK2-NEXT: ret void 1579 // 1580 // 1581 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 1582 // CHECK2-SAME: () #[[ATTR1]] { 1583 // CHECK2-NEXT: entry: 1584 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 1585 // CHECK2-NEXT: ret void 1586 // 1587 // 1588 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1589 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1590 // CHECK2-NEXT: entry: 1591 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1592 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1593 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1594 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1595 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1596 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1597 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1598 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1599 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1600 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1601 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1602 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1603 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1604 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1605 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1606 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1607 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1608 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1609 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1610 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1611 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1612 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1613 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1614 // CHECK2: cond.true: 1615 // CHECK2-NEXT: br label [[COND_END:%.*]] 1616 // CHECK2: cond.false: 1617 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1618 // CHECK2-NEXT: br label [[COND_END]] 1619 // CHECK2: cond.end: 1620 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1621 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1622 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1623 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1624 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1625 // CHECK2: omp.inner.for.cond: 1626 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1627 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1628 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1629 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1630 // CHECK2: omp.inner.for.body: 1631 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1632 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1633 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1634 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1635 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1636 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1637 // CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1638 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1639 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1640 // CHECK2: omp.inner.for.inc: 1641 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1642 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1643 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1644 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1645 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1646 // CHECK2: omp.inner.for.end: 1647 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1648 // CHECK2: omp.loop.exit: 1649 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1650 // CHECK2-NEXT: ret void 1651 // 1652 // 1653 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1654 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1655 // CHECK2-NEXT: entry: 1656 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1657 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1658 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1659 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1660 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1661 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1662 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1663 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1664 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1665 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1666 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1667 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1668 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1669 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1670 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1671 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1672 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1673 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1674 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1675 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1676 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1677 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1678 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1679 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1680 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1681 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1682 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1683 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1684 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1685 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1686 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1687 // CHECK2: cond.true: 1688 // CHECK2-NEXT: br label [[COND_END:%.*]] 1689 // CHECK2: cond.false: 1690 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1691 // CHECK2-NEXT: br label [[COND_END]] 1692 // CHECK2: cond.end: 1693 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1694 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1695 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1696 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1697 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1698 // CHECK2: omp.inner.for.cond: 1699 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1700 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1701 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1702 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1703 // CHECK2: omp.inner.for.body: 1704 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1705 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1706 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1707 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1708 // CHECK2-NEXT: call void @_Z9gtid_testv() 1709 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1710 // CHECK2: omp.body.continue: 1711 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1712 // CHECK2: omp.inner.for.inc: 1713 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1714 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1715 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1716 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1717 // CHECK2: omp.inner.for.end: 1718 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1719 // CHECK2: omp.loop.exit: 1720 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1721 // CHECK2-NEXT: ret void 1722 // 1723 // 1724 // CHECK2-LABEL: define {{[^@]+}}@main 1725 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 1726 // CHECK2-NEXT: entry: 1727 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1728 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1729 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1730 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1731 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1732 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1733 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1734 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1735 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1736 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1737 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1738 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1739 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1740 // CHECK2: omp_offload.failed: 1741 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 1742 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1743 // CHECK2: omp_offload.cont: 1744 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1745 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1746 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1747 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1748 // CHECK2: omp_offload.failed2: 1749 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 1750 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1751 // CHECK2: omp_offload.cont3: 1752 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 1753 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 1754 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 1755 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 1756 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1757 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 1758 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 1759 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1760 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 1761 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 1762 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1763 // CHECK2-NEXT: store i8* null, i8** [[TMP10]], align 8 1764 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1765 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1766 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1767 // CHECK2-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1768 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1769 // CHECK2-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1770 // CHECK2: omp_offload.failed5: 1771 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 1772 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1773 // CHECK2: omp_offload.cont6: 1774 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 1775 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 1776 // CHECK2-NEXT: ret i32 [[CALL]] 1777 // 1778 // 1779 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 1780 // CHECK2-SAME: () #[[ATTR1]] { 1781 // CHECK2-NEXT: entry: 1782 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1783 // CHECK2-NEXT: ret void 1784 // 1785 // 1786 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1787 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1788 // CHECK2-NEXT: entry: 1789 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1790 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1791 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1792 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1793 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1794 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1795 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1796 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1797 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1798 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1799 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1800 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1801 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1802 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1803 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1804 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1805 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1806 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1807 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1808 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1809 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1810 // CHECK2: cond.true: 1811 // CHECK2-NEXT: br label [[COND_END:%.*]] 1812 // CHECK2: cond.false: 1813 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1814 // CHECK2-NEXT: br label [[COND_END]] 1815 // CHECK2: cond.end: 1816 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1817 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1818 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1819 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1820 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1821 // CHECK2: omp.inner.for.cond: 1822 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1823 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1824 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1825 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1826 // CHECK2: omp.inner.for.body: 1827 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1828 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1829 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1830 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1831 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1832 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1833 // CHECK2: omp.inner.for.inc: 1834 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1835 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1836 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1837 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1838 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1839 // CHECK2: omp.inner.for.end: 1840 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1841 // CHECK2: omp.loop.exit: 1842 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1843 // CHECK2-NEXT: ret void 1844 // 1845 // 1846 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1847 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1848 // CHECK2-NEXT: entry: 1849 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1850 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1851 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1852 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1853 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1854 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1855 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1856 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1857 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1858 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1859 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1860 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1861 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1862 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1863 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1864 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1865 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1866 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1867 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1868 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1869 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1870 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1871 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1872 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1873 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1874 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1875 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1876 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1877 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1878 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1879 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1880 // CHECK2: cond.true: 1881 // CHECK2-NEXT: br label [[COND_END:%.*]] 1882 // CHECK2: cond.false: 1883 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1884 // CHECK2-NEXT: br label [[COND_END]] 1885 // CHECK2: cond.end: 1886 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1887 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1888 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1889 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1890 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1891 // CHECK2: omp.inner.for.cond: 1892 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1893 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1894 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1895 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1896 // CHECK2: omp.inner.for.body: 1897 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1898 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1899 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1900 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1901 // CHECK2-NEXT: call void @_Z3fn4v() 1902 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1903 // CHECK2: omp.body.continue: 1904 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1905 // CHECK2: omp.inner.for.inc: 1906 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1907 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1908 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1909 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1910 // CHECK2: omp.inner.for.end: 1911 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1912 // CHECK2: omp.loop.exit: 1913 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1914 // CHECK2-NEXT: ret void 1915 // 1916 // 1917 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1918 // CHECK2-SAME: () #[[ATTR1]] { 1919 // CHECK2-NEXT: entry: 1920 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 1921 // CHECK2-NEXT: ret void 1922 // 1923 // 1924 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 1925 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1926 // CHECK2-NEXT: entry: 1927 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1928 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1929 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1930 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1931 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1932 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1933 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1934 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1935 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1936 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1937 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1938 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1939 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1940 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1941 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1942 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1943 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1944 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1945 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1946 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1947 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1948 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1949 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1950 // CHECK2: cond.true: 1951 // CHECK2-NEXT: br label [[COND_END:%.*]] 1952 // CHECK2: cond.false: 1953 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1954 // CHECK2-NEXT: br label [[COND_END]] 1955 // CHECK2: cond.end: 1956 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1957 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1958 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1959 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1960 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1961 // CHECK2: omp.inner.for.cond: 1962 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1963 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1964 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1965 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1966 // CHECK2: omp.inner.for.body: 1967 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1968 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1969 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1970 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1971 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1972 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1973 // CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1974 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1975 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1976 // CHECK2: omp.inner.for.inc: 1977 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1978 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1979 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1980 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1981 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1982 // CHECK2: omp.inner.for.end: 1983 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1984 // CHECK2: omp.loop.exit: 1985 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1986 // CHECK2-NEXT: ret void 1987 // 1988 // 1989 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1990 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1991 // CHECK2-NEXT: entry: 1992 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1993 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1994 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1995 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1996 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1997 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1998 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1999 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2000 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2001 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2002 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2003 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2004 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2005 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2006 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2007 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2008 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2009 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2010 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2011 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2012 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2013 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2014 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2015 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2016 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2017 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2018 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2019 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2020 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2021 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2022 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2023 // CHECK2: cond.true: 2024 // CHECK2-NEXT: br label [[COND_END:%.*]] 2025 // CHECK2: cond.false: 2026 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2027 // CHECK2-NEXT: br label [[COND_END]] 2028 // CHECK2: cond.end: 2029 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2030 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2031 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2032 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2033 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2034 // CHECK2: omp.inner.for.cond: 2035 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2036 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2037 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2038 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2039 // CHECK2: omp.inner.for.body: 2040 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2041 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2042 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2043 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2044 // CHECK2-NEXT: call void @_Z3fn5v() 2045 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2046 // CHECK2: omp.body.continue: 2047 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2048 // CHECK2: omp.inner.for.inc: 2049 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2050 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2051 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2052 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2053 // CHECK2: omp.inner.for.end: 2054 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2055 // CHECK2: omp.loop.exit: 2056 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2057 // CHECK2-NEXT: ret void 2058 // 2059 // 2060 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 2061 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 2062 // CHECK2-NEXT: entry: 2063 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 2064 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 2065 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 2066 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 2067 // CHECK2-NEXT: ret void 2068 // 2069 // 2070 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 2071 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 2072 // CHECK2-NEXT: entry: 2073 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2074 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2075 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 2076 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2077 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2078 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2079 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2080 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2081 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2082 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2083 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2084 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 2085 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2086 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2087 // CHECK2-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 2088 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 2089 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2090 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2091 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2092 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2093 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2094 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2095 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2096 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2097 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 2098 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2099 // CHECK2: cond.true: 2100 // CHECK2-NEXT: br label [[COND_END:%.*]] 2101 // CHECK2: cond.false: 2102 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2103 // CHECK2-NEXT: br label [[COND_END]] 2104 // CHECK2: cond.end: 2105 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2106 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2107 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2108 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2109 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2110 // CHECK2: omp.inner.for.cond: 2111 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2112 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2113 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2114 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2115 // CHECK2: omp.inner.for.body: 2116 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2117 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2118 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2119 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2120 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 2121 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 2122 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2123 // CHECK2: omp_if.then: 2124 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 2125 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2126 // CHECK2: omp_if.else: 2127 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 2128 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2129 // CHECK2-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 2130 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 2131 // CHECK2-NEXT: br label [[OMP_IF_END]] 2132 // CHECK2: omp_if.end: 2133 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2134 // CHECK2: omp.inner.for.inc: 2135 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2136 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2137 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 2138 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2139 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2140 // CHECK2: omp.inner.for.end: 2141 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2142 // CHECK2: omp.loop.exit: 2143 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2144 // CHECK2-NEXT: ret void 2145 // 2146 // 2147 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9 2148 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2149 // CHECK2-NEXT: entry: 2150 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2151 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2152 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2153 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2154 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2155 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2156 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2157 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2158 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2159 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2160 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2161 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2162 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2163 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2164 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2165 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2166 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2167 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2168 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2169 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2170 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2171 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2172 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2173 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2174 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2175 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2176 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2177 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2178 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2179 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2180 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2181 // CHECK2: cond.true: 2182 // CHECK2-NEXT: br label [[COND_END:%.*]] 2183 // CHECK2: cond.false: 2184 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2185 // CHECK2-NEXT: br label [[COND_END]] 2186 // CHECK2: cond.end: 2187 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2188 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2189 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2190 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2191 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2192 // CHECK2: omp.inner.for.cond: 2193 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2194 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2195 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2196 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2197 // CHECK2: omp.inner.for.body: 2198 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2199 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2200 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2201 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2202 // CHECK2-NEXT: call void @_Z3fn6v() 2203 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2204 // CHECK2: omp.body.continue: 2205 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2206 // CHECK2: omp.inner.for.inc: 2207 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2208 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2209 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2210 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2211 // CHECK2: omp.inner.for.end: 2212 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2213 // CHECK2: omp.loop.exit: 2214 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2215 // CHECK2-NEXT: ret void 2216 // 2217 // 2218 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 2219 // CHECK2-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 2220 // CHECK2-NEXT: entry: 2221 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 2222 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2223 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2224 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 2225 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2226 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2227 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2228 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2229 // CHECK2-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 2230 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2231 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2232 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2233 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2234 // CHECK2: omp_offload.failed: 2235 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 2236 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 2237 // CHECK2: omp_offload.cont: 2238 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2239 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2240 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2241 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2242 // CHECK2: omp_offload.failed2: 2243 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 2244 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2245 // CHECK2: omp_offload.cont3: 2246 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 2247 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 2248 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 2249 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 2250 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2251 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 2252 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 2253 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2254 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 2255 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 2256 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2257 // CHECK2-NEXT: store i8* null, i8** [[TMP10]], align 8 2258 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2259 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2260 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2261 // CHECK2-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2262 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2263 // CHECK2-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2264 // CHECK2: omp_offload.failed5: 2265 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 2266 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2267 // CHECK2: omp_offload.cont6: 2268 // CHECK2-NEXT: ret i32 0 2269 // 2270 // 2271 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 2272 // CHECK2-SAME: () #[[ATTR1]] { 2273 // CHECK2-NEXT: entry: 2274 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 2275 // CHECK2-NEXT: ret void 2276 // 2277 // 2278 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 2279 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 2280 // CHECK2-NEXT: entry: 2281 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2282 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2283 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2284 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2285 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2286 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2287 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2288 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2289 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2290 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2291 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2292 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2293 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2294 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2295 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2296 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2297 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2298 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2299 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2300 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2301 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2302 // CHECK2: cond.true: 2303 // CHECK2-NEXT: br label [[COND_END:%.*]] 2304 // CHECK2: cond.false: 2305 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2306 // CHECK2-NEXT: br label [[COND_END]] 2307 // CHECK2: cond.end: 2308 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2309 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2310 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2311 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2312 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2313 // CHECK2: omp.inner.for.cond: 2314 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2315 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2316 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2317 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2318 // CHECK2: omp.inner.for.body: 2319 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2320 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2321 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2322 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2323 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2324 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2325 // CHECK2: omp.inner.for.inc: 2326 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2327 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2328 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2329 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2330 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2331 // CHECK2: omp.inner.for.end: 2332 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2333 // CHECK2: omp.loop.exit: 2334 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2335 // CHECK2-NEXT: ret void 2336 // 2337 // 2338 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 2339 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2340 // CHECK2-NEXT: entry: 2341 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2342 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2343 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2344 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2345 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2346 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2347 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2348 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2349 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2350 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2351 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2352 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2353 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2354 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2355 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2356 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2357 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2358 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2359 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2360 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2361 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2362 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2363 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2364 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2365 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2366 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2367 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2368 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2369 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2370 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2371 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2372 // CHECK2: cond.true: 2373 // CHECK2-NEXT: br label [[COND_END:%.*]] 2374 // CHECK2: cond.false: 2375 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2376 // CHECK2-NEXT: br label [[COND_END]] 2377 // CHECK2: cond.end: 2378 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2379 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2380 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2381 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2382 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2383 // CHECK2: omp.inner.for.cond: 2384 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2385 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2386 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2387 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2388 // CHECK2: omp.inner.for.body: 2389 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2390 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2391 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2392 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2393 // CHECK2-NEXT: call void @_Z3fn1v() 2394 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2395 // CHECK2: omp.body.continue: 2396 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2397 // CHECK2: omp.inner.for.inc: 2398 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2399 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2400 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2401 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2402 // CHECK2: omp.inner.for.end: 2403 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2404 // CHECK2: omp.loop.exit: 2405 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2406 // CHECK2-NEXT: ret void 2407 // 2408 // 2409 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 2410 // CHECK2-SAME: () #[[ATTR1]] { 2411 // CHECK2-NEXT: entry: 2412 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 2413 // CHECK2-NEXT: ret void 2414 // 2415 // 2416 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12 2417 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 2418 // CHECK2-NEXT: entry: 2419 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2420 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2421 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2422 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2423 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2424 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2425 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2426 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2427 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2428 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2429 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 2430 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2431 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2432 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2433 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2434 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2435 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2436 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2437 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2438 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2439 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2440 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2441 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2442 // CHECK2: cond.true: 2443 // CHECK2-NEXT: br label [[COND_END:%.*]] 2444 // CHECK2: cond.false: 2445 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2446 // CHECK2-NEXT: br label [[COND_END]] 2447 // CHECK2: cond.end: 2448 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2449 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2450 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2451 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2452 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2453 // CHECK2: omp.inner.for.cond: 2454 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2455 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2456 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2457 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2458 // CHECK2: omp.inner.for.body: 2459 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2460 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2461 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2462 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2463 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 2464 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2465 // CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 2466 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 2467 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2468 // CHECK2: omp.inner.for.inc: 2469 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2470 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2471 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2472 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2473 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2474 // CHECK2: omp.inner.for.end: 2475 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2476 // CHECK2: omp.loop.exit: 2477 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2478 // CHECK2-NEXT: ret void 2479 // 2480 // 2481 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..13 2482 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2483 // CHECK2-NEXT: entry: 2484 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2485 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2486 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2487 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2488 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2489 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2490 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2491 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2492 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2493 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2494 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2495 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2496 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2497 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2498 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2499 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2500 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2501 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2502 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2503 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2504 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2505 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2506 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2507 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2508 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2509 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2510 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2511 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2512 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2513 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2514 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2515 // CHECK2: cond.true: 2516 // CHECK2-NEXT: br label [[COND_END:%.*]] 2517 // CHECK2: cond.false: 2518 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2519 // CHECK2-NEXT: br label [[COND_END]] 2520 // CHECK2: cond.end: 2521 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2522 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2523 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2524 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2525 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2526 // CHECK2: omp.inner.for.cond: 2527 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2528 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2529 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2530 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2531 // CHECK2: omp.inner.for.body: 2532 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2533 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2534 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2535 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2536 // CHECK2-NEXT: call void @_Z3fn2v() 2537 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2538 // CHECK2: omp.body.continue: 2539 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2540 // CHECK2: omp.inner.for.inc: 2541 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2542 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2543 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2544 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2545 // CHECK2: omp.inner.for.end: 2546 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2547 // CHECK2: omp.loop.exit: 2548 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2549 // CHECK2-NEXT: ret void 2550 // 2551 // 2552 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 2553 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 2554 // CHECK2-NEXT: entry: 2555 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 2556 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 2557 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 2558 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 2559 // CHECK2-NEXT: ret void 2560 // 2561 // 2562 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 2563 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 2564 // CHECK2-NEXT: entry: 2565 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2566 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2567 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 2568 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2569 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2570 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2571 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2572 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2573 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2574 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2575 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2576 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 2577 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2578 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2579 // CHECK2-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 2580 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 2581 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2582 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2583 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2584 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2585 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2586 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2587 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2588 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2589 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 2590 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2591 // CHECK2: cond.true: 2592 // CHECK2-NEXT: br label [[COND_END:%.*]] 2593 // CHECK2: cond.false: 2594 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2595 // CHECK2-NEXT: br label [[COND_END]] 2596 // CHECK2: cond.end: 2597 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2598 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2599 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2600 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2601 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2602 // CHECK2: omp.inner.for.cond: 2603 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2604 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2605 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2606 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2607 // CHECK2: omp.inner.for.body: 2608 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2609 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2610 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2611 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2612 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 2613 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 2614 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2615 // CHECK2: omp_if.then: 2616 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 2617 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 2618 // CHECK2: omp_if.else: 2619 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 2620 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2621 // CHECK2-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 2622 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 2623 // CHECK2-NEXT: br label [[OMP_IF_END]] 2624 // CHECK2: omp_if.end: 2625 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2626 // CHECK2: omp.inner.for.inc: 2627 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2628 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2629 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 2630 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2631 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2632 // CHECK2: omp.inner.for.end: 2633 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2634 // CHECK2: omp.loop.exit: 2635 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2636 // CHECK2-NEXT: ret void 2637 // 2638 // 2639 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 2640 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2641 // CHECK2-NEXT: entry: 2642 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2643 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2644 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2645 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2646 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2647 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2648 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2649 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2650 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2651 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2652 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2653 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2654 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2655 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2656 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2657 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2658 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2659 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2660 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2661 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2662 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2663 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2664 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2665 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2666 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2667 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2668 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2669 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2670 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2671 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2672 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2673 // CHECK2: cond.true: 2674 // CHECK2-NEXT: br label [[COND_END:%.*]] 2675 // CHECK2: cond.false: 2676 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2677 // CHECK2-NEXT: br label [[COND_END]] 2678 // CHECK2: cond.end: 2679 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2680 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2681 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2682 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2683 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2684 // CHECK2: omp.inner.for.cond: 2685 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2686 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2687 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2688 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2689 // CHECK2: omp.inner.for.body: 2690 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2691 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2692 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2693 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2694 // CHECK2-NEXT: call void @_Z3fn3v() 2695 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2696 // CHECK2: omp.body.continue: 2697 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2698 // CHECK2: omp.inner.for.inc: 2699 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2700 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2701 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2702 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2703 // CHECK2: omp.inner.for.end: 2704 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2705 // CHECK2: omp.loop.exit: 2706 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2707 // CHECK2-NEXT: ret void 2708 // 2709 // 2710 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2711 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 2712 // CHECK2-NEXT: entry: 2713 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2714 // CHECK2-NEXT: ret void 2715 // 2716 // 2717 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv 2718 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2719 // CHECK3-NEXT: entry: 2720 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2721 // CHECK3-NEXT: [[I1:%.*]] = alloca i32, align 4 2722 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2723 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2724 // CHECK3: for.cond: 2725 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2726 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2727 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2728 // CHECK3: for.body: 2729 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2730 // CHECK3: for.inc: 2731 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2732 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2733 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2734 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2735 // CHECK3: for.end: 2736 // CHECK3-NEXT: store i32 0, i32* [[I1]], align 4 2737 // CHECK3-NEXT: br label [[FOR_COND2:%.*]] 2738 // CHECK3: for.cond2: 2739 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2740 // CHECK3-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2741 // CHECK3-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2742 // CHECK3: for.body4: 2743 // CHECK3-NEXT: call void @_Z9gtid_testv() 2744 // CHECK3-NEXT: br label [[FOR_INC5:%.*]] 2745 // CHECK3: for.inc5: 2746 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2747 // CHECK3-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2748 // CHECK3-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2749 // CHECK3-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 2750 // CHECK3: for.end7: 2751 // CHECK3-NEXT: ret void 2752 // 2753 // 2754 // CHECK3-LABEL: define {{[^@]+}}@main 2755 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] { 2756 // CHECK3-NEXT: entry: 2757 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2758 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2759 // CHECK3-NEXT: [[I1:%.*]] = alloca i32, align 4 2760 // CHECK3-NEXT: [[I8:%.*]] = alloca i32, align 4 2761 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 2762 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2763 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2764 // CHECK3: for.cond: 2765 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2766 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2767 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2768 // CHECK3: for.body: 2769 // CHECK3-NEXT: call void @_Z3fn4v() 2770 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2771 // CHECK3: for.inc: 2772 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2773 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2774 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2775 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2776 // CHECK3: for.end: 2777 // CHECK3-NEXT: store i32 0, i32* [[I1]], align 4 2778 // CHECK3-NEXT: br label [[FOR_COND2:%.*]] 2779 // CHECK3: for.cond2: 2780 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2781 // CHECK3-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2782 // CHECK3-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2783 // CHECK3: for.body4: 2784 // CHECK3-NEXT: call void @_Z3fn5v() 2785 // CHECK3-NEXT: br label [[FOR_INC5:%.*]] 2786 // CHECK3: for.inc5: 2787 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2788 // CHECK3-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2789 // CHECK3-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2790 // CHECK3-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 2791 // CHECK3: for.end7: 2792 // CHECK3-NEXT: store i32 0, i32* [[I8]], align 4 2793 // CHECK3-NEXT: br label [[FOR_COND9:%.*]] 2794 // CHECK3: for.cond9: 2795 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 2796 // CHECK3-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 2797 // CHECK3-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 2798 // CHECK3: for.body11: 2799 // CHECK3-NEXT: call void @_Z3fn6v() 2800 // CHECK3-NEXT: br label [[FOR_INC12:%.*]] 2801 // CHECK3: for.inc12: 2802 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 2803 // CHECK3-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 2804 // CHECK3-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 2805 // CHECK3-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]] 2806 // CHECK3: for.end14: 2807 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 2808 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 2809 // CHECK3-NEXT: ret i32 [[CALL]] 2810 // 2811 // 2812 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 2813 // CHECK3-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 2814 // CHECK3-NEXT: entry: 2815 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 2816 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2817 // CHECK3-NEXT: [[I1:%.*]] = alloca i32, align 4 2818 // CHECK3-NEXT: [[I8:%.*]] = alloca i32, align 4 2819 // CHECK3-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 2820 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2821 // CHECK3-NEXT: br label [[FOR_COND:%.*]] 2822 // CHECK3: for.cond: 2823 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2824 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2825 // CHECK3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2826 // CHECK3: for.body: 2827 // CHECK3-NEXT: call void @_Z3fn1v() 2828 // CHECK3-NEXT: br label [[FOR_INC:%.*]] 2829 // CHECK3: for.inc: 2830 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2831 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2832 // CHECK3-NEXT: store i32 [[INC]], i32* [[I]], align 4 2833 // CHECK3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2834 // CHECK3: for.end: 2835 // CHECK3-NEXT: store i32 0, i32* [[I1]], align 4 2836 // CHECK3-NEXT: br label [[FOR_COND2:%.*]] 2837 // CHECK3: for.cond2: 2838 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2839 // CHECK3-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2840 // CHECK3-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2841 // CHECK3: for.body4: 2842 // CHECK3-NEXT: call void @_Z3fn2v() 2843 // CHECK3-NEXT: br label [[FOR_INC5:%.*]] 2844 // CHECK3: for.inc5: 2845 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2846 // CHECK3-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2847 // CHECK3-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2848 // CHECK3-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]] 2849 // CHECK3: for.end7: 2850 // CHECK3-NEXT: store i32 0, i32* [[I8]], align 4 2851 // CHECK3-NEXT: br label [[FOR_COND9:%.*]] 2852 // CHECK3: for.cond9: 2853 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 2854 // CHECK3-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 2855 // CHECK3-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 2856 // CHECK3: for.body11: 2857 // CHECK3-NEXT: call void @_Z3fn3v() 2858 // CHECK3-NEXT: br label [[FOR_INC12:%.*]] 2859 // CHECK3: for.inc12: 2860 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 2861 // CHECK3-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 2862 // CHECK3-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 2863 // CHECK3-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]] 2864 // CHECK3: for.end14: 2865 // CHECK3-NEXT: ret i32 0 2866 // 2867 // 2868 // CHECK4-LABEL: define {{[^@]+}}@_Z9gtid_testv 2869 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 2870 // CHECK4-NEXT: entry: 2871 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2872 // CHECK4-NEXT: [[I1:%.*]] = alloca i32, align 4 2873 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2874 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2875 // CHECK4: for.cond: 2876 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2877 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2878 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2879 // CHECK4: for.body: 2880 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2881 // CHECK4: for.inc: 2882 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2883 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2884 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2885 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2886 // CHECK4: for.end: 2887 // CHECK4-NEXT: store i32 0, i32* [[I1]], align 4 2888 // CHECK4-NEXT: br label [[FOR_COND2:%.*]] 2889 // CHECK4: for.cond2: 2890 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2891 // CHECK4-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2892 // CHECK4-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2893 // CHECK4: for.body4: 2894 // CHECK4-NEXT: call void @_Z9gtid_testv() 2895 // CHECK4-NEXT: br label [[FOR_INC5:%.*]] 2896 // CHECK4: for.inc5: 2897 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2898 // CHECK4-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2899 // CHECK4-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2900 // CHECK4-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 2901 // CHECK4: for.end7: 2902 // CHECK4-NEXT: ret void 2903 // 2904 // 2905 // CHECK4-LABEL: define {{[^@]+}}@main 2906 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 2907 // CHECK4-NEXT: entry: 2908 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2909 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2910 // CHECK4-NEXT: [[I1:%.*]] = alloca i32, align 4 2911 // CHECK4-NEXT: [[I8:%.*]] = alloca i32, align 4 2912 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 2913 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2914 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2915 // CHECK4: for.cond: 2916 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2917 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2918 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2919 // CHECK4: for.body: 2920 // CHECK4-NEXT: call void @_Z3fn4v() 2921 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2922 // CHECK4: for.inc: 2923 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2924 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2925 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2926 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2927 // CHECK4: for.end: 2928 // CHECK4-NEXT: store i32 0, i32* [[I1]], align 4 2929 // CHECK4-NEXT: br label [[FOR_COND2:%.*]] 2930 // CHECK4: for.cond2: 2931 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2932 // CHECK4-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2933 // CHECK4-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2934 // CHECK4: for.body4: 2935 // CHECK4-NEXT: call void @_Z3fn5v() 2936 // CHECK4-NEXT: br label [[FOR_INC5:%.*]] 2937 // CHECK4: for.inc5: 2938 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2939 // CHECK4-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2940 // CHECK4-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2941 // CHECK4-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 2942 // CHECK4: for.end7: 2943 // CHECK4-NEXT: store i32 0, i32* [[I8]], align 4 2944 // CHECK4-NEXT: br label [[FOR_COND9:%.*]] 2945 // CHECK4: for.cond9: 2946 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 2947 // CHECK4-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 2948 // CHECK4-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 2949 // CHECK4: for.body11: 2950 // CHECK4-NEXT: call void @_Z3fn6v() 2951 // CHECK4-NEXT: br label [[FOR_INC12:%.*]] 2952 // CHECK4: for.inc12: 2953 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 2954 // CHECK4-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 2955 // CHECK4-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 2956 // CHECK4-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]] 2957 // CHECK4: for.end14: 2958 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 2959 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 2960 // CHECK4-NEXT: ret i32 [[CALL]] 2961 // 2962 // 2963 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 2964 // CHECK4-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 2965 // CHECK4-NEXT: entry: 2966 // CHECK4-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 2967 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2968 // CHECK4-NEXT: [[I1:%.*]] = alloca i32, align 4 2969 // CHECK4-NEXT: [[I8:%.*]] = alloca i32, align 4 2970 // CHECK4-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 2971 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 2972 // CHECK4-NEXT: br label [[FOR_COND:%.*]] 2973 // CHECK4: for.cond: 2974 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2975 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 2976 // CHECK4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2977 // CHECK4: for.body: 2978 // CHECK4-NEXT: call void @_Z3fn1v() 2979 // CHECK4-NEXT: br label [[FOR_INC:%.*]] 2980 // CHECK4: for.inc: 2981 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2982 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 2983 // CHECK4-NEXT: store i32 [[INC]], i32* [[I]], align 4 2984 // CHECK4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2985 // CHECK4: for.end: 2986 // CHECK4-NEXT: store i32 0, i32* [[I1]], align 4 2987 // CHECK4-NEXT: br label [[FOR_COND2:%.*]] 2988 // CHECK4: for.cond2: 2989 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 2990 // CHECK4-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 2991 // CHECK4-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 2992 // CHECK4: for.body4: 2993 // CHECK4-NEXT: call void @_Z3fn2v() 2994 // CHECK4-NEXT: br label [[FOR_INC5:%.*]] 2995 // CHECK4: for.inc5: 2996 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 2997 // CHECK4-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 2998 // CHECK4-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 2999 // CHECK4-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]] 3000 // CHECK4: for.end7: 3001 // CHECK4-NEXT: store i32 0, i32* [[I8]], align 4 3002 // CHECK4-NEXT: br label [[FOR_COND9:%.*]] 3003 // CHECK4: for.cond9: 3004 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 3005 // CHECK4-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 3006 // CHECK4-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 3007 // CHECK4: for.body11: 3008 // CHECK4-NEXT: call void @_Z3fn3v() 3009 // CHECK4-NEXT: br label [[FOR_INC12:%.*]] 3010 // CHECK4: for.inc12: 3011 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 3012 // CHECK4-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 3013 // CHECK4-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 3014 // CHECK4-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]] 3015 // CHECK4: for.end14: 3016 // CHECK4-NEXT: ret i32 0 3017 // 3018 // 3019 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv 3020 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 3021 // CHECK5-NEXT: entry: 3022 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3023 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3024 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 3025 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3026 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3027 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3028 // CHECK5: omp_offload.failed: 3029 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 3030 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3031 // CHECK5: omp_offload.cont: 3032 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3033 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3034 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3035 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3036 // CHECK5: omp_offload.failed2: 3037 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 3038 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3039 // CHECK5: omp_offload.cont3: 3040 // CHECK5-NEXT: ret void 3041 // 3042 // 3043 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 3044 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] { 3045 // CHECK5-NEXT: entry: 3046 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 3047 // CHECK5-NEXT: ret void 3048 // 3049 // 3050 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 3051 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3052 // CHECK5-NEXT: entry: 3053 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3054 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3055 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3056 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3057 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3058 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3059 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3060 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3061 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3062 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3063 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3064 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3065 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3066 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3067 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3068 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3069 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3070 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3071 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3072 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3073 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3074 // CHECK5: cond.true: 3075 // CHECK5-NEXT: br label [[COND_END:%.*]] 3076 // CHECK5: cond.false: 3077 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3078 // CHECK5-NEXT: br label [[COND_END]] 3079 // CHECK5: cond.end: 3080 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3081 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3082 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3083 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3084 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3085 // CHECK5: omp.inner.for.cond: 3086 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3087 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3088 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3089 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3090 // CHECK5: omp.inner.for.body: 3091 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3092 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3093 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3094 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3095 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3096 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3097 // CHECK5: omp.inner.for.inc: 3098 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3099 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3100 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3101 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3102 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3103 // CHECK5: omp.inner.for.end: 3104 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3105 // CHECK5: omp.loop.exit: 3106 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3107 // CHECK5-NEXT: ret void 3108 // 3109 // 3110 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 3111 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3112 // CHECK5-NEXT: entry: 3113 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3114 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3115 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3116 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3117 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3118 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3119 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3120 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3121 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3122 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3123 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3124 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3125 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3126 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3127 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3128 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3129 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3130 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3131 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3132 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3133 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3134 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3135 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3136 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3137 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3138 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3139 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3140 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3141 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3142 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3143 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3144 // CHECK5: cond.true: 3145 // CHECK5-NEXT: br label [[COND_END:%.*]] 3146 // CHECK5: cond.false: 3147 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3148 // CHECK5-NEXT: br label [[COND_END]] 3149 // CHECK5: cond.end: 3150 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3151 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3152 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3153 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3154 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3155 // CHECK5: omp.inner.for.cond: 3156 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3157 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3158 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3159 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3160 // CHECK5: omp.inner.for.body: 3161 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3162 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3163 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3164 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3165 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3166 // CHECK5: omp.body.continue: 3167 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3168 // CHECK5: omp.inner.for.inc: 3169 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3170 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3171 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3172 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3173 // CHECK5: omp.inner.for.end: 3174 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3175 // CHECK5: omp.loop.exit: 3176 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3177 // CHECK5-NEXT: ret void 3178 // 3179 // 3180 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 3181 // CHECK5-SAME: () #[[ATTR1]] { 3182 // CHECK5-NEXT: entry: 3183 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 3184 // CHECK5-NEXT: ret void 3185 // 3186 // 3187 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 3188 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3189 // CHECK5-NEXT: entry: 3190 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3191 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3192 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3193 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3194 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3195 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3196 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3197 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3198 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3199 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 3200 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 3201 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3202 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3203 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3204 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3205 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3206 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3207 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3208 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3209 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3210 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3211 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3212 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3213 // CHECK5: cond.true: 3214 // CHECK5-NEXT: br label [[COND_END:%.*]] 3215 // CHECK5: cond.false: 3216 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3217 // CHECK5-NEXT: br label [[COND_END]] 3218 // CHECK5: cond.end: 3219 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3220 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3221 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3222 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3223 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3224 // CHECK5: omp.inner.for.cond: 3225 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3226 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3227 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3228 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3229 // CHECK5: omp.inner.for.body: 3230 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3231 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3232 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3233 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3234 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 3235 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3236 // CHECK5-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 3237 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 3238 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3239 // CHECK5: omp.inner.for.inc: 3240 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3241 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3242 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3243 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3244 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3245 // CHECK5: omp.inner.for.end: 3246 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3247 // CHECK5: omp.loop.exit: 3248 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3249 // CHECK5-NEXT: ret void 3250 // 3251 // 3252 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 3253 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3254 // CHECK5-NEXT: entry: 3255 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3256 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3257 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3258 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3259 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3260 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3261 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3262 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3263 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3264 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3265 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3266 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3267 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3268 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3269 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3270 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3271 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3272 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3273 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3274 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3275 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3276 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3277 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3278 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3279 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3280 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3281 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3282 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3283 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3284 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3285 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3286 // CHECK5: cond.true: 3287 // CHECK5-NEXT: br label [[COND_END:%.*]] 3288 // CHECK5: cond.false: 3289 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3290 // CHECK5-NEXT: br label [[COND_END]] 3291 // CHECK5: cond.end: 3292 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3293 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3294 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3295 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3296 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3297 // CHECK5: omp.inner.for.cond: 3298 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3299 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3300 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3301 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3302 // CHECK5: omp.inner.for.body: 3303 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3304 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3305 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3306 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3307 // CHECK5-NEXT: call void @_Z9gtid_testv() 3308 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3309 // CHECK5: omp.body.continue: 3310 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3311 // CHECK5: omp.inner.for.inc: 3312 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3313 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3314 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3315 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3316 // CHECK5: omp.inner.for.end: 3317 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3318 // CHECK5: omp.loop.exit: 3319 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3320 // CHECK5-NEXT: ret void 3321 // 3322 // 3323 // CHECK5-LABEL: define {{[^@]+}}@main 3324 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 3325 // CHECK5-NEXT: entry: 3326 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3327 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3328 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3329 // CHECK5-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 3330 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3331 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3332 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3333 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3334 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 3335 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3336 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3337 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3338 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3339 // CHECK5: omp_offload.failed: 3340 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 3341 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3342 // CHECK5: omp_offload.cont: 3343 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3344 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3345 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3346 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3347 // CHECK5: omp_offload.failed2: 3348 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 3349 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3350 // CHECK5: omp_offload.cont3: 3351 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 3352 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 3353 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 3354 // CHECK5-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 3355 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3356 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3357 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 3358 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3359 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 3360 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 3361 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3362 // CHECK5-NEXT: store i8* null, i8** [[TMP10]], align 8 3363 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3364 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3365 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3366 // CHECK5-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3367 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3368 // CHECK5-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3369 // CHECK5: omp_offload.failed5: 3370 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 3371 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3372 // CHECK5: omp_offload.cont6: 3373 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 3374 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 3375 // CHECK5-NEXT: ret i32 [[CALL]] 3376 // 3377 // 3378 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 3379 // CHECK5-SAME: () #[[ATTR1]] { 3380 // CHECK5-NEXT: entry: 3381 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 3382 // CHECK5-NEXT: ret void 3383 // 3384 // 3385 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 3386 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3387 // CHECK5-NEXT: entry: 3388 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3389 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3390 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3391 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3392 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3393 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3394 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3395 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3396 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3397 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3398 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3399 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3400 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3401 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3402 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3403 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3404 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3405 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3406 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3407 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3408 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3409 // CHECK5: cond.true: 3410 // CHECK5-NEXT: br label [[COND_END:%.*]] 3411 // CHECK5: cond.false: 3412 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3413 // CHECK5-NEXT: br label [[COND_END]] 3414 // CHECK5: cond.end: 3415 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3416 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3417 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3418 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3419 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3420 // CHECK5: omp.inner.for.cond: 3421 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3422 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3423 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3424 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3425 // CHECK5: omp.inner.for.body: 3426 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3427 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3428 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3429 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3430 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3431 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3432 // CHECK5: omp.inner.for.inc: 3433 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3434 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3435 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3436 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3437 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3438 // CHECK5: omp.inner.for.end: 3439 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3440 // CHECK5: omp.loop.exit: 3441 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3442 // CHECK5-NEXT: ret void 3443 // 3444 // 3445 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 3446 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3447 // CHECK5-NEXT: entry: 3448 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3449 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3450 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3451 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3452 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3453 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3454 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3455 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3456 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3457 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3458 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3459 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3460 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3461 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3462 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3463 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3464 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3465 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3466 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3467 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3468 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3469 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3470 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3471 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3472 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3473 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3474 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3475 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3476 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3477 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3478 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3479 // CHECK5: cond.true: 3480 // CHECK5-NEXT: br label [[COND_END:%.*]] 3481 // CHECK5: cond.false: 3482 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3483 // CHECK5-NEXT: br label [[COND_END]] 3484 // CHECK5: cond.end: 3485 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3486 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3487 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3488 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3489 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3490 // CHECK5: omp.inner.for.cond: 3491 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3492 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3493 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3494 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3495 // CHECK5: omp.inner.for.body: 3496 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3497 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3498 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3499 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3500 // CHECK5-NEXT: call void @_Z3fn4v() 3501 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3502 // CHECK5: omp.body.continue: 3503 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3504 // CHECK5: omp.inner.for.inc: 3505 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3506 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3507 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3508 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3509 // CHECK5: omp.inner.for.end: 3510 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3511 // CHECK5: omp.loop.exit: 3512 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3513 // CHECK5-NEXT: ret void 3514 // 3515 // 3516 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 3517 // CHECK5-SAME: () #[[ATTR1]] { 3518 // CHECK5-NEXT: entry: 3519 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 3520 // CHECK5-NEXT: ret void 3521 // 3522 // 3523 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 3524 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3525 // CHECK5-NEXT: entry: 3526 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3527 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3528 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3529 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3530 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3531 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3532 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3533 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3534 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3535 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 3536 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 3537 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3538 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3539 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3540 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3541 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3542 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3543 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3544 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3545 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3546 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3547 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3548 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3549 // CHECK5: cond.true: 3550 // CHECK5-NEXT: br label [[COND_END:%.*]] 3551 // CHECK5: cond.false: 3552 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3553 // CHECK5-NEXT: br label [[COND_END]] 3554 // CHECK5: cond.end: 3555 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3556 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3557 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3558 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3559 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3560 // CHECK5: omp.inner.for.cond: 3561 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3562 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3563 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3564 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3565 // CHECK5: omp.inner.for.body: 3566 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3567 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3568 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3569 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3570 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 3571 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3572 // CHECK5-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 3573 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 3574 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3575 // CHECK5: omp.inner.for.inc: 3576 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3577 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3578 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3579 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3580 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3581 // CHECK5: omp.inner.for.end: 3582 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3583 // CHECK5: omp.loop.exit: 3584 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3585 // CHECK5-NEXT: ret void 3586 // 3587 // 3588 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 3589 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3590 // CHECK5-NEXT: entry: 3591 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3592 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3593 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3594 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3595 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3596 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3597 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3598 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3599 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3600 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3601 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3602 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3603 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3604 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3605 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3606 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3607 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3608 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3609 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3610 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3611 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3612 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3613 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3614 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3615 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3616 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3617 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3618 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3619 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3620 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3621 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3622 // CHECK5: cond.true: 3623 // CHECK5-NEXT: br label [[COND_END:%.*]] 3624 // CHECK5: cond.false: 3625 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3626 // CHECK5-NEXT: br label [[COND_END]] 3627 // CHECK5: cond.end: 3628 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3629 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3630 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3631 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3632 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3633 // CHECK5: omp.inner.for.cond: 3634 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3635 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3636 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3637 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3638 // CHECK5: omp.inner.for.body: 3639 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3640 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3641 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3642 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3643 // CHECK5-NEXT: call void @_Z3fn5v() 3644 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3645 // CHECK5: omp.body.continue: 3646 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3647 // CHECK5: omp.inner.for.inc: 3648 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3649 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3650 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3651 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3652 // CHECK5: omp.inner.for.end: 3653 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3654 // CHECK5: omp.loop.exit: 3655 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3656 // CHECK5-NEXT: ret void 3657 // 3658 // 3659 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 3660 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 3661 // CHECK5-NEXT: entry: 3662 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 3663 // CHECK5-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 3664 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 3665 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 3666 // CHECK5-NEXT: ret void 3667 // 3668 // 3669 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 3670 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 3671 // CHECK5-NEXT: entry: 3672 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3673 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3674 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 3675 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3676 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3677 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3678 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3679 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3680 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3681 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3682 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 3683 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 3684 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3685 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3686 // CHECK5-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 3687 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 3688 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3689 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3690 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3691 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3692 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3693 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3694 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3695 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3696 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 3697 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3698 // CHECK5: cond.true: 3699 // CHECK5-NEXT: br label [[COND_END:%.*]] 3700 // CHECK5: cond.false: 3701 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3702 // CHECK5-NEXT: br label [[COND_END]] 3703 // CHECK5: cond.end: 3704 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3705 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3706 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3707 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3708 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3709 // CHECK5: omp.inner.for.cond: 3710 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3711 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3712 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3713 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3714 // CHECK5: omp.inner.for.body: 3715 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3716 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3717 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3718 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3719 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 3720 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3721 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3722 // CHECK5: omp_if.then: 3723 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 3724 // CHECK5-NEXT: br label [[OMP_IF_END:%.*]] 3725 // CHECK5: omp_if.else: 3726 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 3727 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3728 // CHECK5-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 3729 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 3730 // CHECK5-NEXT: br label [[OMP_IF_END]] 3731 // CHECK5: omp_if.end: 3732 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3733 // CHECK5: omp.inner.for.inc: 3734 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3735 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3736 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 3737 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3738 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3739 // CHECK5: omp.inner.for.end: 3740 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3741 // CHECK5: omp.loop.exit: 3742 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3743 // CHECK5-NEXT: ret void 3744 // 3745 // 3746 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 3747 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3748 // CHECK5-NEXT: entry: 3749 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3750 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3751 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3752 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3753 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3754 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3755 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3756 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3757 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3758 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3759 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3760 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3761 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3762 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3763 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3764 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3765 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3766 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3767 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3768 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3769 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3770 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3771 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3772 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3773 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3774 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3775 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3776 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3777 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3778 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3779 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3780 // CHECK5: cond.true: 3781 // CHECK5-NEXT: br label [[COND_END:%.*]] 3782 // CHECK5: cond.false: 3783 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3784 // CHECK5-NEXT: br label [[COND_END]] 3785 // CHECK5: cond.end: 3786 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3787 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3788 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3789 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3790 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3791 // CHECK5: omp.inner.for.cond: 3792 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3793 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3794 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3795 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3796 // CHECK5: omp.inner.for.body: 3797 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3798 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3799 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3800 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3801 // CHECK5-NEXT: call void @_Z3fn6v() 3802 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3803 // CHECK5: omp.body.continue: 3804 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3805 // CHECK5: omp.inner.for.inc: 3806 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3807 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3808 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3809 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3810 // CHECK5: omp.inner.for.end: 3811 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3812 // CHECK5: omp.loop.exit: 3813 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3814 // CHECK5-NEXT: ret void 3815 // 3816 // 3817 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 3818 // CHECK5-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 3819 // CHECK5-NEXT: entry: 3820 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 3821 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3822 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3823 // CHECK5-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 3824 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3825 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3826 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3827 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3828 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 3829 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3830 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3831 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3832 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3833 // CHECK5: omp_offload.failed: 3834 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 3835 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3836 // CHECK5: omp_offload.cont: 3837 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3838 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3839 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3840 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3841 // CHECK5: omp_offload.failed2: 3842 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 3843 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3844 // CHECK5: omp_offload.cont3: 3845 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 3846 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 3847 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 3848 // CHECK5-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 3849 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3850 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 3851 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 3852 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3853 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 3854 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 3855 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3856 // CHECK5-NEXT: store i8* null, i8** [[TMP10]], align 8 3857 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3858 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3859 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3860 // CHECK5-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3861 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3862 // CHECK5-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3863 // CHECK5: omp_offload.failed5: 3864 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 3865 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3866 // CHECK5: omp_offload.cont6: 3867 // CHECK5-NEXT: ret i32 0 3868 // 3869 // 3870 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 3871 // CHECK5-SAME: () #[[ATTR1]] { 3872 // CHECK5-NEXT: entry: 3873 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 3874 // CHECK5-NEXT: ret void 3875 // 3876 // 3877 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 3878 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3879 // CHECK5-NEXT: entry: 3880 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3881 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3882 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3883 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3884 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3885 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3886 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3887 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3888 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3889 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3890 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3891 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3892 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3893 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3894 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3895 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3896 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3897 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3898 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3899 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3900 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3901 // CHECK5: cond.true: 3902 // CHECK5-NEXT: br label [[COND_END:%.*]] 3903 // CHECK5: cond.false: 3904 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3905 // CHECK5-NEXT: br label [[COND_END]] 3906 // CHECK5: cond.end: 3907 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3908 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3909 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3910 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3911 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3912 // CHECK5: omp.inner.for.cond: 3913 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3914 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3915 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3916 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3917 // CHECK5: omp.inner.for.body: 3918 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3919 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3920 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3921 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3922 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3923 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3924 // CHECK5: omp.inner.for.inc: 3925 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3926 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3927 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3928 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3929 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3930 // CHECK5: omp.inner.for.end: 3931 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3932 // CHECK5: omp.loop.exit: 3933 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3934 // CHECK5-NEXT: ret void 3935 // 3936 // 3937 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 3938 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3939 // CHECK5-NEXT: entry: 3940 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3941 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3942 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3943 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3944 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3945 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3946 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3947 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3948 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3949 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3950 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3951 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3952 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3953 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3954 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3955 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3956 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3957 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3958 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3959 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3960 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3961 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3962 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3963 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3964 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3965 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3966 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3967 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3968 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3969 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3970 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3971 // CHECK5: cond.true: 3972 // CHECK5-NEXT: br label [[COND_END:%.*]] 3973 // CHECK5: cond.false: 3974 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3975 // CHECK5-NEXT: br label [[COND_END]] 3976 // CHECK5: cond.end: 3977 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3978 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3979 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3980 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3981 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3982 // CHECK5: omp.inner.for.cond: 3983 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3984 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3985 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3986 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3987 // CHECK5: omp.inner.for.body: 3988 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3989 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3990 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3991 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3992 // CHECK5-NEXT: call void @_Z3fn1v() 3993 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3994 // CHECK5: omp.body.continue: 3995 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3996 // CHECK5: omp.inner.for.inc: 3997 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3998 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3999 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4000 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4001 // CHECK5: omp.inner.for.end: 4002 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4003 // CHECK5: omp.loop.exit: 4004 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4005 // CHECK5-NEXT: ret void 4006 // 4007 // 4008 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 4009 // CHECK5-SAME: () #[[ATTR1]] { 4010 // CHECK5-NEXT: entry: 4011 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 4012 // CHECK5-NEXT: ret void 4013 // 4014 // 4015 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..12 4016 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4017 // CHECK5-NEXT: entry: 4018 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4019 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4020 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4021 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4022 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4023 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4024 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4025 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4026 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4027 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4028 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 4029 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4030 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4031 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4032 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4033 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4034 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4035 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4036 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4037 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4038 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4039 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4040 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4041 // CHECK5: cond.true: 4042 // CHECK5-NEXT: br label [[COND_END:%.*]] 4043 // CHECK5: cond.false: 4044 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4045 // CHECK5-NEXT: br label [[COND_END]] 4046 // CHECK5: cond.end: 4047 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4048 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4049 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4050 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4051 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4052 // CHECK5: omp.inner.for.cond: 4053 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4054 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4055 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4056 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4057 // CHECK5: omp.inner.for.body: 4058 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4059 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4060 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4061 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4062 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4063 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4064 // CHECK5-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 4065 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4066 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4067 // CHECK5: omp.inner.for.inc: 4068 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4069 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4070 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4071 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4072 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4073 // CHECK5: omp.inner.for.end: 4074 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4075 // CHECK5: omp.loop.exit: 4076 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4077 // CHECK5-NEXT: ret void 4078 // 4079 // 4080 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..13 4081 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4082 // CHECK5-NEXT: entry: 4083 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4084 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4085 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4086 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4087 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4088 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4089 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4090 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4091 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4092 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4093 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4094 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4095 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4096 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4097 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4098 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4099 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4100 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4101 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4102 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4103 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4104 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4105 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4106 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4107 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4108 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4109 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4110 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4111 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4112 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4113 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4114 // CHECK5: cond.true: 4115 // CHECK5-NEXT: br label [[COND_END:%.*]] 4116 // CHECK5: cond.false: 4117 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4118 // CHECK5-NEXT: br label [[COND_END]] 4119 // CHECK5: cond.end: 4120 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4121 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4122 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4123 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4124 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4125 // CHECK5: omp.inner.for.cond: 4126 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4127 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4128 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4129 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4130 // CHECK5: omp.inner.for.body: 4131 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4132 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4133 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4134 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4135 // CHECK5-NEXT: call void @_Z3fn2v() 4136 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4137 // CHECK5: omp.body.continue: 4138 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4139 // CHECK5: omp.inner.for.inc: 4140 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4141 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4142 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4143 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4144 // CHECK5: omp.inner.for.end: 4145 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4146 // CHECK5: omp.loop.exit: 4147 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4148 // CHECK5-NEXT: ret void 4149 // 4150 // 4151 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 4152 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 4153 // CHECK5-NEXT: entry: 4154 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 4155 // CHECK5-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 4156 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 4157 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 4158 // CHECK5-NEXT: ret void 4159 // 4160 // 4161 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14 4162 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 4163 // CHECK5-NEXT: entry: 4164 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4165 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4166 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 4167 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4168 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4169 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4170 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4171 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4172 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4173 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4174 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4175 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 4176 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4177 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4178 // CHECK5-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 4179 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 4180 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4181 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4182 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4183 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4184 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4185 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4186 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4187 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4188 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 4189 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4190 // CHECK5: cond.true: 4191 // CHECK5-NEXT: br label [[COND_END:%.*]] 4192 // CHECK5: cond.false: 4193 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4194 // CHECK5-NEXT: br label [[COND_END]] 4195 // CHECK5: cond.end: 4196 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4197 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4198 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4199 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4200 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4201 // CHECK5: omp.inner.for.cond: 4202 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4203 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4204 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4205 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4206 // CHECK5: omp.inner.for.body: 4207 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4208 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4209 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4210 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4211 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 4212 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 4213 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4214 // CHECK5: omp_if.then: 4215 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 4216 // CHECK5-NEXT: br label [[OMP_IF_END:%.*]] 4217 // CHECK5: omp_if.else: 4218 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 4219 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4220 // CHECK5-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 4221 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 4222 // CHECK5-NEXT: br label [[OMP_IF_END]] 4223 // CHECK5: omp_if.end: 4224 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4225 // CHECK5: omp.inner.for.inc: 4226 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4227 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4228 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 4229 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4230 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4231 // CHECK5: omp.inner.for.end: 4232 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4233 // CHECK5: omp.loop.exit: 4234 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4235 // CHECK5-NEXT: ret void 4236 // 4237 // 4238 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15 4239 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4240 // CHECK5-NEXT: entry: 4241 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4242 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4243 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4244 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4245 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4246 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4247 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4248 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4249 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4250 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4251 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4252 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4253 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4254 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4255 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4256 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4257 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4258 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4259 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4260 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4261 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4262 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4263 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4264 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4265 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4266 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4267 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4268 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4269 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4270 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4271 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4272 // CHECK5: cond.true: 4273 // CHECK5-NEXT: br label [[COND_END:%.*]] 4274 // CHECK5: cond.false: 4275 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4276 // CHECK5-NEXT: br label [[COND_END]] 4277 // CHECK5: cond.end: 4278 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4279 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4280 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4281 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4282 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4283 // CHECK5: omp.inner.for.cond: 4284 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4285 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4286 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4287 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4288 // CHECK5: omp.inner.for.body: 4289 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4290 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4291 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4292 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4293 // CHECK5-NEXT: call void @_Z3fn3v() 4294 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4295 // CHECK5: omp.body.continue: 4296 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4297 // CHECK5: omp.inner.for.inc: 4298 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4299 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4300 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4301 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4302 // CHECK5: omp.inner.for.end: 4303 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4304 // CHECK5: omp.loop.exit: 4305 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4306 // CHECK5-NEXT: ret void 4307 // 4308 // 4309 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4310 // CHECK5-SAME: () #[[ATTR5:[0-9]+]] { 4311 // CHECK5-NEXT: entry: 4312 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 4313 // CHECK5-NEXT: ret void 4314 // 4315 // 4316 // CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv 4317 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 4318 // CHECK6-NEXT: entry: 4319 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4320 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4321 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 4322 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4323 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 4324 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4325 // CHECK6: omp_offload.failed: 4326 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 4327 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4328 // CHECK6: omp_offload.cont: 4329 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4330 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4331 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 4332 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4333 // CHECK6: omp_offload.failed2: 4334 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 4335 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4336 // CHECK6: omp_offload.cont3: 4337 // CHECK6-NEXT: ret void 4338 // 4339 // 4340 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 4341 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] { 4342 // CHECK6-NEXT: entry: 4343 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 4344 // CHECK6-NEXT: ret void 4345 // 4346 // 4347 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 4348 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4349 // CHECK6-NEXT: entry: 4350 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4351 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4352 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4353 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4354 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4355 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4356 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4357 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4358 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4359 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4360 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4361 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4362 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4363 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4364 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4365 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4366 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4367 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4368 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4369 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4370 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4371 // CHECK6: cond.true: 4372 // CHECK6-NEXT: br label [[COND_END:%.*]] 4373 // CHECK6: cond.false: 4374 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4375 // CHECK6-NEXT: br label [[COND_END]] 4376 // CHECK6: cond.end: 4377 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4378 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4379 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4380 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4381 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4382 // CHECK6: omp.inner.for.cond: 4383 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4384 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4385 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4386 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4387 // CHECK6: omp.inner.for.body: 4388 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4389 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4390 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4391 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4392 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4393 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4394 // CHECK6: omp.inner.for.inc: 4395 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4396 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4397 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4398 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4399 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4400 // CHECK6: omp.inner.for.end: 4401 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4402 // CHECK6: omp.loop.exit: 4403 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4404 // CHECK6-NEXT: ret void 4405 // 4406 // 4407 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 4408 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4409 // CHECK6-NEXT: entry: 4410 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4411 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4412 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4413 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4414 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4415 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4416 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4417 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4418 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4419 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4420 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4421 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4422 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4423 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4424 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4425 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4426 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4427 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4428 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4429 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4430 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4431 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4432 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4433 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4434 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4435 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4436 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4437 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4438 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4439 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4440 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4441 // CHECK6: cond.true: 4442 // CHECK6-NEXT: br label [[COND_END:%.*]] 4443 // CHECK6: cond.false: 4444 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4445 // CHECK6-NEXT: br label [[COND_END]] 4446 // CHECK6: cond.end: 4447 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4448 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4449 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4450 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4451 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4452 // CHECK6: omp.inner.for.cond: 4453 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4454 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4455 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4456 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4457 // CHECK6: omp.inner.for.body: 4458 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4459 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4460 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4461 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4462 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4463 // CHECK6: omp.body.continue: 4464 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4465 // CHECK6: omp.inner.for.inc: 4466 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4467 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4468 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4469 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4470 // CHECK6: omp.inner.for.end: 4471 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4472 // CHECK6: omp.loop.exit: 4473 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4474 // CHECK6-NEXT: ret void 4475 // 4476 // 4477 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 4478 // CHECK6-SAME: () #[[ATTR1]] { 4479 // CHECK6-NEXT: entry: 4480 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 4481 // CHECK6-NEXT: ret void 4482 // 4483 // 4484 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 4485 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4486 // CHECK6-NEXT: entry: 4487 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4488 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4489 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4490 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4491 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4492 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4493 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4494 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4495 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4496 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4497 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 4498 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4499 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4500 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4501 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4502 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4503 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4504 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4505 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4506 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4507 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4508 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4509 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4510 // CHECK6: cond.true: 4511 // CHECK6-NEXT: br label [[COND_END:%.*]] 4512 // CHECK6: cond.false: 4513 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4514 // CHECK6-NEXT: br label [[COND_END]] 4515 // CHECK6: cond.end: 4516 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4517 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4518 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4519 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4520 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4521 // CHECK6: omp.inner.for.cond: 4522 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4523 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4524 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4525 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4526 // CHECK6: omp.inner.for.body: 4527 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4528 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4529 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4530 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4531 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4532 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4533 // CHECK6-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 4534 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4535 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4536 // CHECK6: omp.inner.for.inc: 4537 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4538 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4539 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4540 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4541 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4542 // CHECK6: omp.inner.for.end: 4543 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4544 // CHECK6: omp.loop.exit: 4545 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4546 // CHECK6-NEXT: ret void 4547 // 4548 // 4549 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 4550 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4551 // CHECK6-NEXT: entry: 4552 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4553 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4554 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4555 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4556 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4557 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4558 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4559 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4560 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4561 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4562 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4563 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4564 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4565 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4566 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4567 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4568 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4569 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4570 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4571 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4572 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4573 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4574 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4575 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4576 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4577 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4578 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4579 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4580 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4581 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4582 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4583 // CHECK6: cond.true: 4584 // CHECK6-NEXT: br label [[COND_END:%.*]] 4585 // CHECK6: cond.false: 4586 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4587 // CHECK6-NEXT: br label [[COND_END]] 4588 // CHECK6: cond.end: 4589 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4590 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4591 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4592 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4593 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4594 // CHECK6: omp.inner.for.cond: 4595 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4596 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4597 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4598 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4599 // CHECK6: omp.inner.for.body: 4600 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4601 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4602 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4603 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4604 // CHECK6-NEXT: call void @_Z9gtid_testv() 4605 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4606 // CHECK6: omp.body.continue: 4607 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4608 // CHECK6: omp.inner.for.inc: 4609 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4610 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4611 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4612 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4613 // CHECK6: omp.inner.for.end: 4614 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4615 // CHECK6: omp.loop.exit: 4616 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4617 // CHECK6-NEXT: ret void 4618 // 4619 // 4620 // CHECK6-LABEL: define {{[^@]+}}@main 4621 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { 4622 // CHECK6-NEXT: entry: 4623 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4624 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4625 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4626 // CHECK6-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 4627 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4628 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4629 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4630 // CHECK6-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4631 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 4632 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4633 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4634 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 4635 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4636 // CHECK6: omp_offload.failed: 4637 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 4638 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4639 // CHECK6: omp_offload.cont: 4640 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4641 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 4642 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 4643 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 4644 // CHECK6: omp_offload.failed2: 4645 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 4646 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 4647 // CHECK6: omp_offload.cont3: 4648 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 4649 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 4650 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 4651 // CHECK6-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 4652 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4653 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 4654 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 4655 // CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4656 // CHECK6-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 4657 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 4658 // CHECK6-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4659 // CHECK6-NEXT: store i8* null, i8** [[TMP10]], align 8 4660 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4661 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4662 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 4663 // CHECK6-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4664 // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4665 // CHECK6-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 4666 // CHECK6: omp_offload.failed5: 4667 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 4668 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT6]] 4669 // CHECK6: omp_offload.cont6: 4670 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 4671 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 4672 // CHECK6-NEXT: ret i32 [[CALL]] 4673 // 4674 // 4675 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 4676 // CHECK6-SAME: () #[[ATTR1]] { 4677 // CHECK6-NEXT: entry: 4678 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 4679 // CHECK6-NEXT: ret void 4680 // 4681 // 4682 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4 4683 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4684 // CHECK6-NEXT: entry: 4685 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4686 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4687 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4688 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4689 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4690 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4691 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4692 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4693 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4694 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4695 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4696 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4697 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4698 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4699 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4700 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4701 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4702 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4703 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4704 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4705 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4706 // CHECK6: cond.true: 4707 // CHECK6-NEXT: br label [[COND_END:%.*]] 4708 // CHECK6: cond.false: 4709 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4710 // CHECK6-NEXT: br label [[COND_END]] 4711 // CHECK6: cond.end: 4712 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4713 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4714 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4715 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4716 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4717 // CHECK6: omp.inner.for.cond: 4718 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4719 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4720 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4721 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4722 // CHECK6: omp.inner.for.body: 4723 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4724 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4725 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4726 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4727 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4728 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4729 // CHECK6: omp.inner.for.inc: 4730 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4731 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4732 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4733 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4734 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4735 // CHECK6: omp.inner.for.end: 4736 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4737 // CHECK6: omp.loop.exit: 4738 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4739 // CHECK6-NEXT: ret void 4740 // 4741 // 4742 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5 4743 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4744 // CHECK6-NEXT: entry: 4745 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4746 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4747 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4748 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4749 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4750 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4751 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4752 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4753 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4754 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4755 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4756 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4757 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4758 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4759 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4760 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4761 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4762 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4763 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4764 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4765 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4766 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4767 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4768 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4769 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4770 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4771 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4772 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4773 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4774 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4775 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4776 // CHECK6: cond.true: 4777 // CHECK6-NEXT: br label [[COND_END:%.*]] 4778 // CHECK6: cond.false: 4779 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4780 // CHECK6-NEXT: br label [[COND_END]] 4781 // CHECK6: cond.end: 4782 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4783 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4784 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4785 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4786 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4787 // CHECK6: omp.inner.for.cond: 4788 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4789 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4790 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4791 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4792 // CHECK6: omp.inner.for.body: 4793 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4794 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4795 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4796 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4797 // CHECK6-NEXT: call void @_Z3fn4v() 4798 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4799 // CHECK6: omp.body.continue: 4800 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4801 // CHECK6: omp.inner.for.inc: 4802 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4803 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4804 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4805 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4806 // CHECK6: omp.inner.for.end: 4807 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4808 // CHECK6: omp.loop.exit: 4809 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4810 // CHECK6-NEXT: ret void 4811 // 4812 // 4813 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 4814 // CHECK6-SAME: () #[[ATTR1]] { 4815 // CHECK6-NEXT: entry: 4816 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 4817 // CHECK6-NEXT: ret void 4818 // 4819 // 4820 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 4821 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4822 // CHECK6-NEXT: entry: 4823 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4824 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4825 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4826 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4827 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4828 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4829 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4830 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4831 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4832 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4833 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 4834 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4835 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4836 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4837 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4838 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4839 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4840 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4841 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4842 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4843 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4844 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4845 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4846 // CHECK6: cond.true: 4847 // CHECK6-NEXT: br label [[COND_END:%.*]] 4848 // CHECK6: cond.false: 4849 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4850 // CHECK6-NEXT: br label [[COND_END]] 4851 // CHECK6: cond.end: 4852 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4853 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4854 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4855 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4856 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4857 // CHECK6: omp.inner.for.cond: 4858 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4859 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4860 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4861 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4862 // CHECK6: omp.inner.for.body: 4863 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4864 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4865 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4866 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4867 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4868 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4869 // CHECK6-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 4870 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 4871 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4872 // CHECK6: omp.inner.for.inc: 4873 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4874 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4875 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4876 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4877 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4878 // CHECK6: omp.inner.for.end: 4879 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4880 // CHECK6: omp.loop.exit: 4881 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4882 // CHECK6-NEXT: ret void 4883 // 4884 // 4885 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 4886 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4887 // CHECK6-NEXT: entry: 4888 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4889 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4890 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4891 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4892 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4893 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4894 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4895 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4896 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4897 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4898 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4899 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4900 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4901 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4902 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4903 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4904 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4905 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4906 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4907 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4908 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4909 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4910 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4911 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4912 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4913 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4914 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4915 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4916 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4917 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4918 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4919 // CHECK6: cond.true: 4920 // CHECK6-NEXT: br label [[COND_END:%.*]] 4921 // CHECK6: cond.false: 4922 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4923 // CHECK6-NEXT: br label [[COND_END]] 4924 // CHECK6: cond.end: 4925 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4926 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4927 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4928 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4929 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4930 // CHECK6: omp.inner.for.cond: 4931 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4932 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4933 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4934 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4935 // CHECK6: omp.inner.for.body: 4936 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4937 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4938 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4939 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4940 // CHECK6-NEXT: call void @_Z3fn5v() 4941 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4942 // CHECK6: omp.body.continue: 4943 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4944 // CHECK6: omp.inner.for.inc: 4945 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4946 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4947 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4948 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4949 // CHECK6: omp.inner.for.end: 4950 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4951 // CHECK6: omp.loop.exit: 4952 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4953 // CHECK6-NEXT: ret void 4954 // 4955 // 4956 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 4957 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 4958 // CHECK6-NEXT: entry: 4959 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 4960 // CHECK6-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 4961 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 4962 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 4963 // CHECK6-NEXT: ret void 4964 // 4965 // 4966 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8 4967 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 4968 // CHECK6-NEXT: entry: 4969 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4970 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4971 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 4972 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4973 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4974 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4975 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4976 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4977 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4978 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4979 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4980 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 4981 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4982 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4983 // CHECK6-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 4984 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 4985 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4986 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4987 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4988 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4989 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4990 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4991 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4992 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4993 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 4994 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4995 // CHECK6: cond.true: 4996 // CHECK6-NEXT: br label [[COND_END:%.*]] 4997 // CHECK6: cond.false: 4998 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4999 // CHECK6-NEXT: br label [[COND_END]] 5000 // CHECK6: cond.end: 5001 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5002 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5003 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5004 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5005 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5006 // CHECK6: omp.inner.for.cond: 5007 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5008 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5009 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5010 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5011 // CHECK6: omp.inner.for.body: 5012 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5013 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5014 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5015 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5016 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 5017 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 5018 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 5019 // CHECK6: omp_if.then: 5020 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 5021 // CHECK6-NEXT: br label [[OMP_IF_END:%.*]] 5022 // CHECK6: omp_if.else: 5023 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 5024 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5025 // CHECK6-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 5026 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 5027 // CHECK6-NEXT: br label [[OMP_IF_END]] 5028 // CHECK6: omp_if.end: 5029 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5030 // CHECK6: omp.inner.for.inc: 5031 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5032 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5033 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 5034 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5035 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5036 // CHECK6: omp.inner.for.end: 5037 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5038 // CHECK6: omp.loop.exit: 5039 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5040 // CHECK6-NEXT: ret void 5041 // 5042 // 5043 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9 5044 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5045 // CHECK6-NEXT: entry: 5046 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5047 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5048 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5049 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5050 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5051 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5052 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5053 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5054 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5055 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5056 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5057 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5058 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5059 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5060 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5061 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5062 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5063 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5064 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5065 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5066 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5067 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5068 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5069 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5070 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5071 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5072 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5073 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5074 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5075 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5076 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5077 // CHECK6: cond.true: 5078 // CHECK6-NEXT: br label [[COND_END:%.*]] 5079 // CHECK6: cond.false: 5080 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5081 // CHECK6-NEXT: br label [[COND_END]] 5082 // CHECK6: cond.end: 5083 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5084 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5085 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5086 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5087 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5088 // CHECK6: omp.inner.for.cond: 5089 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5090 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5091 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5092 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5093 // CHECK6: omp.inner.for.body: 5094 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5095 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5096 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5097 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5098 // CHECK6-NEXT: call void @_Z3fn6v() 5099 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5100 // CHECK6: omp.body.continue: 5101 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5102 // CHECK6: omp.inner.for.inc: 5103 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5104 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5105 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5106 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5107 // CHECK6: omp.inner.for.end: 5108 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5109 // CHECK6: omp.loop.exit: 5110 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5111 // CHECK6-NEXT: ret void 5112 // 5113 // 5114 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 5115 // CHECK6-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 5116 // CHECK6-NEXT: entry: 5117 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 5118 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5119 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5120 // CHECK6-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 5121 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 5122 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 5123 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 5124 // CHECK6-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 5125 // CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 5126 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5127 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5128 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5129 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5130 // CHECK6: omp_offload.failed: 5131 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 5132 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 5133 // CHECK6: omp_offload.cont: 5134 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5135 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5136 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 5137 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5138 // CHECK6: omp_offload.failed2: 5139 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 5140 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5141 // CHECK6: omp_offload.cont3: 5142 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 5143 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 5144 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 5145 // CHECK6-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 5146 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5147 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 5148 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 5149 // CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5150 // CHECK6-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 5151 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 5152 // CHECK6-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5153 // CHECK6-NEXT: store i8* null, i8** [[TMP10]], align 8 5154 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5155 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5156 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5157 // CHECK6-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5158 // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 5159 // CHECK6-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 5160 // CHECK6: omp_offload.failed5: 5161 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 5162 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT6]] 5163 // CHECK6: omp_offload.cont6: 5164 // CHECK6-NEXT: ret i32 0 5165 // 5166 // 5167 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 5168 // CHECK6-SAME: () #[[ATTR1]] { 5169 // CHECK6-NEXT: entry: 5170 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 5171 // CHECK6-NEXT: ret void 5172 // 5173 // 5174 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 5175 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 5176 // CHECK6-NEXT: entry: 5177 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5178 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5179 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5180 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5181 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5182 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5183 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5184 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5185 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5186 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5187 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5188 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5189 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5190 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5191 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5192 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5193 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5194 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5195 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5196 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5197 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5198 // CHECK6: cond.true: 5199 // CHECK6-NEXT: br label [[COND_END:%.*]] 5200 // CHECK6: cond.false: 5201 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5202 // CHECK6-NEXT: br label [[COND_END]] 5203 // CHECK6: cond.end: 5204 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5205 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5206 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5207 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5208 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5209 // CHECK6: omp.inner.for.cond: 5210 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5211 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5212 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5213 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5214 // CHECK6: omp.inner.for.body: 5215 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5216 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5217 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5218 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5219 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5220 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5221 // CHECK6: omp.inner.for.inc: 5222 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5223 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5224 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5225 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5226 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5227 // CHECK6: omp.inner.for.end: 5228 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5229 // CHECK6: omp.loop.exit: 5230 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5231 // CHECK6-NEXT: ret void 5232 // 5233 // 5234 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 5235 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5236 // CHECK6-NEXT: entry: 5237 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5238 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5239 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5240 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5241 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5242 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5243 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5244 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5245 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5246 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5247 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5248 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5249 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5250 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5251 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5252 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5253 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5254 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5255 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5256 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5257 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5258 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5259 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5260 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5261 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5262 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5263 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5264 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5265 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5266 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5267 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5268 // CHECK6: cond.true: 5269 // CHECK6-NEXT: br label [[COND_END:%.*]] 5270 // CHECK6: cond.false: 5271 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5272 // CHECK6-NEXT: br label [[COND_END]] 5273 // CHECK6: cond.end: 5274 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5275 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5276 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5277 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5278 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5279 // CHECK6: omp.inner.for.cond: 5280 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5281 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5282 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5283 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5284 // CHECK6: omp.inner.for.body: 5285 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5286 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5287 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5288 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5289 // CHECK6-NEXT: call void @_Z3fn1v() 5290 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5291 // CHECK6: omp.body.continue: 5292 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5293 // CHECK6: omp.inner.for.inc: 5294 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5295 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5296 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5297 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5298 // CHECK6: omp.inner.for.end: 5299 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5300 // CHECK6: omp.loop.exit: 5301 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5302 // CHECK6-NEXT: ret void 5303 // 5304 // 5305 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 5306 // CHECK6-SAME: () #[[ATTR1]] { 5307 // CHECK6-NEXT: entry: 5308 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 5309 // CHECK6-NEXT: ret void 5310 // 5311 // 5312 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..12 5313 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 5314 // CHECK6-NEXT: entry: 5315 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5316 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5317 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5318 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5319 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5320 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5321 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5322 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5323 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5324 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 5325 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 5326 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5327 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5328 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5329 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5330 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5331 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5332 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5333 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5334 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5335 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5336 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5337 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5338 // CHECK6: cond.true: 5339 // CHECK6-NEXT: br label [[COND_END:%.*]] 5340 // CHECK6: cond.false: 5341 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5342 // CHECK6-NEXT: br label [[COND_END]] 5343 // CHECK6: cond.end: 5344 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5345 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5346 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5347 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5348 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5349 // CHECK6: omp.inner.for.cond: 5350 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5351 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5352 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5353 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5354 // CHECK6: omp.inner.for.body: 5355 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5356 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5357 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5358 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5359 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 5360 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5361 // CHECK6-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 5362 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 5363 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5364 // CHECK6: omp.inner.for.inc: 5365 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5366 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5367 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5368 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5369 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5370 // CHECK6: omp.inner.for.end: 5371 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5372 // CHECK6: omp.loop.exit: 5373 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 5374 // CHECK6-NEXT: ret void 5375 // 5376 // 5377 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..13 5378 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5379 // CHECK6-NEXT: entry: 5380 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5381 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5382 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5383 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5384 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5385 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5386 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5387 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5388 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5389 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5390 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5391 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5392 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5393 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5394 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5395 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5396 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5397 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5398 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5399 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5400 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5401 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5402 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5403 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5404 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5405 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5406 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5407 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5408 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5409 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5410 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5411 // CHECK6: cond.true: 5412 // CHECK6-NEXT: br label [[COND_END:%.*]] 5413 // CHECK6: cond.false: 5414 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5415 // CHECK6-NEXT: br label [[COND_END]] 5416 // CHECK6: cond.end: 5417 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5418 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5419 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5420 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5421 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5422 // CHECK6: omp.inner.for.cond: 5423 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5424 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5425 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5426 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5427 // CHECK6: omp.inner.for.body: 5428 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5429 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5430 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5431 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5432 // CHECK6-NEXT: call void @_Z3fn2v() 5433 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5434 // CHECK6: omp.body.continue: 5435 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5436 // CHECK6: omp.inner.for.inc: 5437 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5438 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5439 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5440 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5441 // CHECK6: omp.inner.for.end: 5442 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5443 // CHECK6: omp.loop.exit: 5444 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5445 // CHECK6-NEXT: ret void 5446 // 5447 // 5448 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 5449 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 5450 // CHECK6-NEXT: entry: 5451 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 5452 // CHECK6-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 5453 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 5454 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 5455 // CHECK6-NEXT: ret void 5456 // 5457 // 5458 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14 5459 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 5460 // CHECK6-NEXT: entry: 5461 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5462 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5463 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 5464 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5465 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5466 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5467 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5468 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5469 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5470 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5471 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 5472 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 5473 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5474 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5475 // CHECK6-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 5476 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 5477 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5478 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5479 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5480 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5481 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5482 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5483 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5484 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5485 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 5486 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5487 // CHECK6: cond.true: 5488 // CHECK6-NEXT: br label [[COND_END:%.*]] 5489 // CHECK6: cond.false: 5490 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5491 // CHECK6-NEXT: br label [[COND_END]] 5492 // CHECK6: cond.end: 5493 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5494 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5495 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5496 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5497 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5498 // CHECK6: omp.inner.for.cond: 5499 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5500 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5501 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5502 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5503 // CHECK6: omp.inner.for.body: 5504 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5505 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5506 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5507 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5508 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 5509 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 5510 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 5511 // CHECK6: omp_if.then: 5512 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 5513 // CHECK6-NEXT: br label [[OMP_IF_END:%.*]] 5514 // CHECK6: omp_if.else: 5515 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 5516 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5517 // CHECK6-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 5518 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 5519 // CHECK6-NEXT: br label [[OMP_IF_END]] 5520 // CHECK6: omp_if.end: 5521 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5522 // CHECK6: omp.inner.for.inc: 5523 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5524 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5525 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 5526 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5527 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5528 // CHECK6: omp.inner.for.end: 5529 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5530 // CHECK6: omp.loop.exit: 5531 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5532 // CHECK6-NEXT: ret void 5533 // 5534 // 5535 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15 5536 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5537 // CHECK6-NEXT: entry: 5538 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5539 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5540 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5541 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5542 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5543 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5544 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5545 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5546 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5547 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5548 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5549 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5550 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5551 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5552 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5553 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5554 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 5555 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5556 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5557 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5558 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5559 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5560 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5561 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5562 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5563 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5564 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 5565 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5566 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5567 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5568 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5569 // CHECK6: cond.true: 5570 // CHECK6-NEXT: br label [[COND_END:%.*]] 5571 // CHECK6: cond.false: 5572 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5573 // CHECK6-NEXT: br label [[COND_END]] 5574 // CHECK6: cond.end: 5575 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5576 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5577 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5578 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 5579 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5580 // CHECK6: omp.inner.for.cond: 5581 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5582 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5583 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5584 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5585 // CHECK6: omp.inner.for.body: 5586 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5587 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5588 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5589 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5590 // CHECK6-NEXT: call void @_Z3fn3v() 5591 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5592 // CHECK6: omp.body.continue: 5593 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5594 // CHECK6: omp.inner.for.inc: 5595 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5596 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5597 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5598 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5599 // CHECK6: omp.inner.for.end: 5600 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5601 // CHECK6: omp.loop.exit: 5602 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 5603 // CHECK6-NEXT: ret void 5604 // 5605 // 5606 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5607 // CHECK6-SAME: () #[[ATTR5:[0-9]+]] { 5608 // CHECK6-NEXT: entry: 5609 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) 5610 // CHECK6-NEXT: ret void 5611 // 5612 // 5613 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv 5614 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 5615 // CHECK7-NEXT: entry: 5616 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5617 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 5618 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5619 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5620 // CHECK7: for.cond: 5621 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5622 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5623 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5624 // CHECK7: for.body: 5625 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5626 // CHECK7: for.inc: 5627 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5628 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5629 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5630 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5631 // CHECK7: for.end: 5632 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 5633 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 5634 // CHECK7: for.cond2: 5635 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5636 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5637 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5638 // CHECK7: for.body4: 5639 // CHECK7-NEXT: call void @_Z9gtid_testv() 5640 // CHECK7-NEXT: br label [[FOR_INC5:%.*]] 5641 // CHECK7: for.inc5: 5642 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5643 // CHECK7-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5644 // CHECK7-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5645 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 5646 // CHECK7: for.end7: 5647 // CHECK7-NEXT: ret void 5648 // 5649 // 5650 // CHECK7-LABEL: define {{[^@]+}}@main 5651 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] { 5652 // CHECK7-NEXT: entry: 5653 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5654 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5655 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 5656 // CHECK7-NEXT: [[I8:%.*]] = alloca i32, align 4 5657 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 5658 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5659 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5660 // CHECK7: for.cond: 5661 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5662 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5663 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5664 // CHECK7: for.body: 5665 // CHECK7-NEXT: call void @_Z3fn4v() 5666 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5667 // CHECK7: for.inc: 5668 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5669 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5670 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5671 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5672 // CHECK7: for.end: 5673 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 5674 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 5675 // CHECK7: for.cond2: 5676 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5677 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5678 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5679 // CHECK7: for.body4: 5680 // CHECK7-NEXT: call void @_Z3fn5v() 5681 // CHECK7-NEXT: br label [[FOR_INC5:%.*]] 5682 // CHECK7: for.inc5: 5683 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5684 // CHECK7-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5685 // CHECK7-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5686 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 5687 // CHECK7: for.end7: 5688 // CHECK7-NEXT: store i32 0, i32* [[I8]], align 4 5689 // CHECK7-NEXT: br label [[FOR_COND9:%.*]] 5690 // CHECK7: for.cond9: 5691 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 5692 // CHECK7-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 5693 // CHECK7-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 5694 // CHECK7: for.body11: 5695 // CHECK7-NEXT: call void @_Z3fn6v() 5696 // CHECK7-NEXT: br label [[FOR_INC12:%.*]] 5697 // CHECK7: for.inc12: 5698 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 5699 // CHECK7-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 5700 // CHECK7-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 5701 // CHECK7-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]] 5702 // CHECK7: for.end14: 5703 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 5704 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 5705 // CHECK7-NEXT: ret i32 [[CALL]] 5706 // 5707 // 5708 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 5709 // CHECK7-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 5710 // CHECK7-NEXT: entry: 5711 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 5712 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5713 // CHECK7-NEXT: [[I1:%.*]] = alloca i32, align 4 5714 // CHECK7-NEXT: [[I8:%.*]] = alloca i32, align 4 5715 // CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 5716 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 5717 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 5718 // CHECK7: for.cond: 5719 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5720 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5721 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5722 // CHECK7: for.body: 5723 // CHECK7-NEXT: call void @_Z3fn1v() 5724 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 5725 // CHECK7: for.inc: 5726 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5727 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5728 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 5729 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 5730 // CHECK7: for.end: 5731 // CHECK7-NEXT: store i32 0, i32* [[I1]], align 4 5732 // CHECK7-NEXT: br label [[FOR_COND2:%.*]] 5733 // CHECK7: for.cond2: 5734 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5735 // CHECK7-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5736 // CHECK7-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5737 // CHECK7: for.body4: 5738 // CHECK7-NEXT: call void @_Z3fn2v() 5739 // CHECK7-NEXT: br label [[FOR_INC5:%.*]] 5740 // CHECK7: for.inc5: 5741 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5742 // CHECK7-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5743 // CHECK7-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5744 // CHECK7-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]] 5745 // CHECK7: for.end7: 5746 // CHECK7-NEXT: store i32 0, i32* [[I8]], align 4 5747 // CHECK7-NEXT: br label [[FOR_COND9:%.*]] 5748 // CHECK7: for.cond9: 5749 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 5750 // CHECK7-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 5751 // CHECK7-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 5752 // CHECK7: for.body11: 5753 // CHECK7-NEXT: call void @_Z3fn3v() 5754 // CHECK7-NEXT: br label [[FOR_INC12:%.*]] 5755 // CHECK7: for.inc12: 5756 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 5757 // CHECK7-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 5758 // CHECK7-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 5759 // CHECK7-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]] 5760 // CHECK7: for.end14: 5761 // CHECK7-NEXT: ret i32 0 5762 // 5763 // 5764 // CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv 5765 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 5766 // CHECK8-NEXT: entry: 5767 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5768 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 5769 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5770 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5771 // CHECK8: for.cond: 5772 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5773 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5774 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5775 // CHECK8: for.body: 5776 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5777 // CHECK8: for.inc: 5778 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5779 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5780 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5781 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 5782 // CHECK8: for.end: 5783 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 5784 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 5785 // CHECK8: for.cond2: 5786 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5787 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5788 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5789 // CHECK8: for.body4: 5790 // CHECK8-NEXT: call void @_Z9gtid_testv() 5791 // CHECK8-NEXT: br label [[FOR_INC5:%.*]] 5792 // CHECK8: for.inc5: 5793 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5794 // CHECK8-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5795 // CHECK8-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5796 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]] 5797 // CHECK8: for.end7: 5798 // CHECK8-NEXT: ret void 5799 // 5800 // 5801 // CHECK8-LABEL: define {{[^@]+}}@main 5802 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] { 5803 // CHECK8-NEXT: entry: 5804 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5805 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5806 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 5807 // CHECK8-NEXT: [[I8:%.*]] = alloca i32, align 4 5808 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 5809 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5810 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5811 // CHECK8: for.cond: 5812 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5813 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5814 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5815 // CHECK8: for.body: 5816 // CHECK8-NEXT: call void @_Z3fn4v() 5817 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5818 // CHECK8: for.inc: 5819 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5820 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5821 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5822 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 5823 // CHECK8: for.end: 5824 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 5825 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 5826 // CHECK8: for.cond2: 5827 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5828 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5829 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5830 // CHECK8: for.body4: 5831 // CHECK8-NEXT: call void @_Z3fn5v() 5832 // CHECK8-NEXT: br label [[FOR_INC5:%.*]] 5833 // CHECK8: for.inc5: 5834 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5835 // CHECK8-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5836 // CHECK8-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5837 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP6:![0-9]+]] 5838 // CHECK8: for.end7: 5839 // CHECK8-NEXT: store i32 0, i32* [[I8]], align 4 5840 // CHECK8-NEXT: br label [[FOR_COND9:%.*]] 5841 // CHECK8: for.cond9: 5842 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 5843 // CHECK8-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 5844 // CHECK8-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 5845 // CHECK8: for.body11: 5846 // CHECK8-NEXT: call void @_Z3fn6v() 5847 // CHECK8-NEXT: br label [[FOR_INC12:%.*]] 5848 // CHECK8: for.inc12: 5849 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 5850 // CHECK8-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 5851 // CHECK8-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 5852 // CHECK8-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP7:![0-9]+]] 5853 // CHECK8: for.end14: 5854 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 5855 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 5856 // CHECK8-NEXT: ret i32 [[CALL]] 5857 // 5858 // 5859 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 5860 // CHECK8-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 5861 // CHECK8-NEXT: entry: 5862 // CHECK8-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 5863 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 5864 // CHECK8-NEXT: [[I1:%.*]] = alloca i32, align 4 5865 // CHECK8-NEXT: [[I8:%.*]] = alloca i32, align 4 5866 // CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 5867 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 5868 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 5869 // CHECK8: for.cond: 5870 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 5871 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 5872 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 5873 // CHECK8: for.body: 5874 // CHECK8-NEXT: call void @_Z3fn1v() 5875 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 5876 // CHECK8: for.inc: 5877 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 5878 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 5879 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 5880 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 5881 // CHECK8: for.end: 5882 // CHECK8-NEXT: store i32 0, i32* [[I1]], align 4 5883 // CHECK8-NEXT: br label [[FOR_COND2:%.*]] 5884 // CHECK8: for.cond2: 5885 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 5886 // CHECK8-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 5887 // CHECK8-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 5888 // CHECK8: for.body4: 5889 // CHECK8-NEXT: call void @_Z3fn2v() 5890 // CHECK8-NEXT: br label [[FOR_INC5:%.*]] 5891 // CHECK8: for.inc5: 5892 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 5893 // CHECK8-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 5894 // CHECK8-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 5895 // CHECK8-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]] 5896 // CHECK8: for.end7: 5897 // CHECK8-NEXT: store i32 0, i32* [[I8]], align 4 5898 // CHECK8-NEXT: br label [[FOR_COND9:%.*]] 5899 // CHECK8: for.cond9: 5900 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 5901 // CHECK8-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 5902 // CHECK8-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 5903 // CHECK8: for.body11: 5904 // CHECK8-NEXT: call void @_Z3fn3v() 5905 // CHECK8-NEXT: br label [[FOR_INC12:%.*]] 5906 // CHECK8: for.inc12: 5907 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 5908 // CHECK8-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 5909 // CHECK8-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 5910 // CHECK8-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP10:![0-9]+]] 5911 // CHECK8: for.end14: 5912 // CHECK8-NEXT: ret i32 0 5913 // 5914 // 5915 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv 5916 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 5917 // CHECK9-NEXT: entry: 5918 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5919 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5920 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 5921 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5922 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 5923 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5924 // CHECK9: omp_offload.failed: 5925 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 5926 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 5927 // CHECK9: omp_offload.cont: 5928 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 5929 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 5930 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 5931 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 5932 // CHECK9: omp_offload.failed2: 5933 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 5934 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 5935 // CHECK9: omp_offload.cont3: 5936 // CHECK9-NEXT: ret void 5937 // 5938 // 5939 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 5940 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] { 5941 // CHECK9-NEXT: entry: 5942 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 5943 // CHECK9-NEXT: ret void 5944 // 5945 // 5946 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 5947 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 5948 // CHECK9-NEXT: entry: 5949 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5950 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5951 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5952 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5953 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5954 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5955 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5956 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5957 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5958 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5959 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5960 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5961 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 5962 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5963 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5964 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5965 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 5966 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5967 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5968 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5969 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5970 // CHECK9: cond.true: 5971 // CHECK9-NEXT: br label [[COND_END:%.*]] 5972 // CHECK9: cond.false: 5973 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5974 // CHECK9-NEXT: br label [[COND_END]] 5975 // CHECK9: cond.end: 5976 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5977 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5978 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5979 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 5980 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5981 // CHECK9: omp.inner.for.cond: 5982 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5983 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5984 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5985 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5986 // CHECK9: omp.inner.for.body: 5987 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5988 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5989 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5990 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5991 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 5992 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5993 // CHECK9: omp.inner.for.inc: 5994 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5995 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5996 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5997 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5998 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5999 // CHECK9: omp.inner.for.end: 6000 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6001 // CHECK9: omp.loop.exit: 6002 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6003 // CHECK9-NEXT: ret void 6004 // 6005 // 6006 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 6007 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6008 // CHECK9-NEXT: entry: 6009 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6010 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6011 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6012 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6013 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6014 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6015 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6016 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6017 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6018 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6019 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6020 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6021 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6022 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6023 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6024 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6025 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6026 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6027 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6028 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6029 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6030 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6031 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6032 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6033 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6034 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6035 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6036 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6037 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6038 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6039 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6040 // CHECK9: cond.true: 6041 // CHECK9-NEXT: br label [[COND_END:%.*]] 6042 // CHECK9: cond.false: 6043 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6044 // CHECK9-NEXT: br label [[COND_END]] 6045 // CHECK9: cond.end: 6046 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6047 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6048 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6049 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6050 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6051 // CHECK9: omp.inner.for.cond: 6052 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6053 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6054 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6055 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6056 // CHECK9: omp.inner.for.body: 6057 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6058 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6059 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6060 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6061 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6062 // CHECK9: omp.body.continue: 6063 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6064 // CHECK9: omp.inner.for.inc: 6065 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6066 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6067 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6068 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6069 // CHECK9: omp.inner.for.end: 6070 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6071 // CHECK9: omp.loop.exit: 6072 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6073 // CHECK9-NEXT: ret void 6074 // 6075 // 6076 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 6077 // CHECK9-SAME: () #[[ATTR1]] { 6078 // CHECK9-NEXT: entry: 6079 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 6080 // CHECK9-NEXT: ret void 6081 // 6082 // 6083 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 6084 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6085 // CHECK9-NEXT: entry: 6086 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6087 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6088 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6089 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6090 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6091 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6092 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6093 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6094 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6095 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6096 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 6097 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6098 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6099 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6100 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6101 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6102 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6103 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6104 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6105 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6106 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6107 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6108 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6109 // CHECK9: cond.true: 6110 // CHECK9-NEXT: br label [[COND_END:%.*]] 6111 // CHECK9: cond.false: 6112 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6113 // CHECK9-NEXT: br label [[COND_END]] 6114 // CHECK9: cond.end: 6115 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6116 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6117 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6118 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6119 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6120 // CHECK9: omp.inner.for.cond: 6121 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6122 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6123 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6124 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6125 // CHECK9: omp.inner.for.body: 6126 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6127 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6128 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6129 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6130 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6131 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6132 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 6133 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6134 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6135 // CHECK9: omp.inner.for.inc: 6136 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6137 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6138 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6139 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6140 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6141 // CHECK9: omp.inner.for.end: 6142 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6143 // CHECK9: omp.loop.exit: 6144 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6145 // CHECK9-NEXT: ret void 6146 // 6147 // 6148 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 6149 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6150 // CHECK9-NEXT: entry: 6151 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6152 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6153 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6154 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6155 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6156 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6157 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6158 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6159 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6160 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6161 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6162 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6163 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6164 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6165 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6166 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6167 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6168 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6169 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6170 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6171 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6172 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6173 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6174 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6175 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6176 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6177 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6178 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6179 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6180 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6181 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6182 // CHECK9: cond.true: 6183 // CHECK9-NEXT: br label [[COND_END:%.*]] 6184 // CHECK9: cond.false: 6185 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6186 // CHECK9-NEXT: br label [[COND_END]] 6187 // CHECK9: cond.end: 6188 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6189 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6190 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6191 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6192 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6193 // CHECK9: omp.inner.for.cond: 6194 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6195 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6196 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6197 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6198 // CHECK9: omp.inner.for.body: 6199 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6200 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6201 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6202 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6203 // CHECK9-NEXT: call void @_Z9gtid_testv() 6204 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6205 // CHECK9: omp.body.continue: 6206 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6207 // CHECK9: omp.inner.for.inc: 6208 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6209 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6210 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6211 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6212 // CHECK9: omp.inner.for.end: 6213 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6214 // CHECK9: omp.loop.exit: 6215 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6216 // CHECK9-NEXT: ret void 6217 // 6218 // 6219 // CHECK9-LABEL: define {{[^@]+}}@main 6220 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 6221 // CHECK9-NEXT: entry: 6222 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6223 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6224 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6225 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 6226 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 6227 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 6228 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 6229 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 6230 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 6231 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6232 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6233 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6234 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6235 // CHECK9: omp_offload.failed: 6236 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 6237 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 6238 // CHECK9: omp_offload.cont: 6239 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6240 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6241 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6242 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6243 // CHECK9: omp_offload.failed2: 6244 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 6245 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6246 // CHECK9: omp_offload.cont3: 6247 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 6248 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 6249 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 6250 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 6251 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6252 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 6253 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 6254 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6255 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 6256 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 6257 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6258 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8 6259 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6260 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6261 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6262 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6263 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 6264 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 6265 // CHECK9: omp_offload.failed5: 6266 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 6267 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 6268 // CHECK9: omp_offload.cont6: 6269 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 6270 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 6271 // CHECK9-NEXT: ret i32 [[CALL]] 6272 // 6273 // 6274 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 6275 // CHECK9-SAME: () #[[ATTR1]] { 6276 // CHECK9-NEXT: entry: 6277 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 6278 // CHECK9-NEXT: ret void 6279 // 6280 // 6281 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 6282 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6283 // CHECK9-NEXT: entry: 6284 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6285 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6286 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6287 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6288 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6289 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6290 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6291 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6292 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6293 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6294 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6295 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6296 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6297 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6298 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6299 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6300 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6301 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6302 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6303 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6304 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6305 // CHECK9: cond.true: 6306 // CHECK9-NEXT: br label [[COND_END:%.*]] 6307 // CHECK9: cond.false: 6308 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6309 // CHECK9-NEXT: br label [[COND_END]] 6310 // CHECK9: cond.end: 6311 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6312 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6313 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6314 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6315 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6316 // CHECK9: omp.inner.for.cond: 6317 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6318 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6319 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6320 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6321 // CHECK9: omp.inner.for.body: 6322 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6323 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6324 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6325 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6326 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6327 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6328 // CHECK9: omp.inner.for.inc: 6329 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6330 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6331 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6332 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6333 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6334 // CHECK9: omp.inner.for.end: 6335 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6336 // CHECK9: omp.loop.exit: 6337 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6338 // CHECK9-NEXT: ret void 6339 // 6340 // 6341 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 6342 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6343 // CHECK9-NEXT: entry: 6344 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6345 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6346 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6347 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6348 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6349 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6350 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6351 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6352 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6353 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6354 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6355 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6356 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6357 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6358 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6359 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6360 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6361 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6362 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6363 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6364 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6365 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6366 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6367 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6368 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6369 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6370 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6371 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6372 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6373 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6374 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6375 // CHECK9: cond.true: 6376 // CHECK9-NEXT: br label [[COND_END:%.*]] 6377 // CHECK9: cond.false: 6378 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6379 // CHECK9-NEXT: br label [[COND_END]] 6380 // CHECK9: cond.end: 6381 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6382 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6383 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6384 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6385 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6386 // CHECK9: omp.inner.for.cond: 6387 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6388 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6389 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6390 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6391 // CHECK9: omp.inner.for.body: 6392 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6393 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6394 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6395 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6396 // CHECK9-NEXT: call void @_Z3fn4v() 6397 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6398 // CHECK9: omp.body.continue: 6399 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6400 // CHECK9: omp.inner.for.inc: 6401 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6402 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6403 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6404 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6405 // CHECK9: omp.inner.for.end: 6406 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6407 // CHECK9: omp.loop.exit: 6408 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6409 // CHECK9-NEXT: ret void 6410 // 6411 // 6412 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 6413 // CHECK9-SAME: () #[[ATTR1]] { 6414 // CHECK9-NEXT: entry: 6415 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 6416 // CHECK9-NEXT: ret void 6417 // 6418 // 6419 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 6420 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6421 // CHECK9-NEXT: entry: 6422 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6423 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6424 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6425 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6426 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6427 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6428 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6429 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6430 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6431 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6432 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 6433 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6434 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6435 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6436 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6437 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6438 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6439 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6440 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6441 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6442 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6443 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6444 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6445 // CHECK9: cond.true: 6446 // CHECK9-NEXT: br label [[COND_END:%.*]] 6447 // CHECK9: cond.false: 6448 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6449 // CHECK9-NEXT: br label [[COND_END]] 6450 // CHECK9: cond.end: 6451 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6452 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6453 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6454 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6455 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6456 // CHECK9: omp.inner.for.cond: 6457 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6458 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6459 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6460 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6461 // CHECK9: omp.inner.for.body: 6462 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6463 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6464 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6465 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6466 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6467 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6468 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 6469 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6470 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6471 // CHECK9: omp.inner.for.inc: 6472 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6473 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6474 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6475 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6476 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6477 // CHECK9: omp.inner.for.end: 6478 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6479 // CHECK9: omp.loop.exit: 6480 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6481 // CHECK9-NEXT: ret void 6482 // 6483 // 6484 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 6485 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6486 // CHECK9-NEXT: entry: 6487 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6488 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6489 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6490 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6491 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6492 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6493 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6494 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6495 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6496 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6497 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6498 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6499 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6500 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6501 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6502 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6503 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6504 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6505 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6506 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6507 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6508 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6509 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6510 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6511 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6512 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6513 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6514 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6515 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6516 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6517 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6518 // CHECK9: cond.true: 6519 // CHECK9-NEXT: br label [[COND_END:%.*]] 6520 // CHECK9: cond.false: 6521 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6522 // CHECK9-NEXT: br label [[COND_END]] 6523 // CHECK9: cond.end: 6524 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6525 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6526 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6527 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6528 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6529 // CHECK9: omp.inner.for.cond: 6530 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6531 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6532 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6533 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6534 // CHECK9: omp.inner.for.body: 6535 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6536 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6537 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6538 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6539 // CHECK9-NEXT: call void @_Z3fn5v() 6540 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6541 // CHECK9: omp.body.continue: 6542 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6543 // CHECK9: omp.inner.for.inc: 6544 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6545 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6546 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6547 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6548 // CHECK9: omp.inner.for.end: 6549 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6550 // CHECK9: omp.loop.exit: 6551 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6552 // CHECK9-NEXT: ret void 6553 // 6554 // 6555 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 6556 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 6557 // CHECK9-NEXT: entry: 6558 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 6559 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 6560 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 6561 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 6562 // CHECK9-NEXT: ret void 6563 // 6564 // 6565 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 6566 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 6567 // CHECK9-NEXT: entry: 6568 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6569 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6570 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 6571 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6572 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6573 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6574 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6575 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6576 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6577 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6578 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6579 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 6580 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6581 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6582 // CHECK9-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 6583 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 6584 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6585 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6586 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6587 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6588 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6589 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6590 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6591 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6592 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 6593 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6594 // CHECK9: cond.true: 6595 // CHECK9-NEXT: br label [[COND_END:%.*]] 6596 // CHECK9: cond.false: 6597 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6598 // CHECK9-NEXT: br label [[COND_END]] 6599 // CHECK9: cond.end: 6600 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6601 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6602 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6603 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6604 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6605 // CHECK9: omp.inner.for.cond: 6606 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6607 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6608 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6609 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6610 // CHECK9: omp.inner.for.body: 6611 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6612 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6613 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6614 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6615 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 6616 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 6617 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6618 // CHECK9: omp_if.then: 6619 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 6620 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 6621 // CHECK9: omp_if.else: 6622 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 6623 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6624 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 6625 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 6626 // CHECK9-NEXT: br label [[OMP_IF_END]] 6627 // CHECK9: omp_if.end: 6628 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6629 // CHECK9: omp.inner.for.inc: 6630 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6631 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6632 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6633 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6634 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6635 // CHECK9: omp.inner.for.end: 6636 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6637 // CHECK9: omp.loop.exit: 6638 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6639 // CHECK9-NEXT: ret void 6640 // 6641 // 6642 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 6643 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6644 // CHECK9-NEXT: entry: 6645 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6646 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6647 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6648 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6649 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6650 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6651 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6652 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6653 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6654 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6655 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6656 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6657 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6658 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6659 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6660 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6661 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6662 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6663 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6664 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6665 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6666 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6667 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6668 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6669 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6670 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6671 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6672 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6673 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6674 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6675 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6676 // CHECK9: cond.true: 6677 // CHECK9-NEXT: br label [[COND_END:%.*]] 6678 // CHECK9: cond.false: 6679 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6680 // CHECK9-NEXT: br label [[COND_END]] 6681 // CHECK9: cond.end: 6682 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6683 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6684 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6685 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6686 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6687 // CHECK9: omp.inner.for.cond: 6688 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6689 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6690 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6691 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6692 // CHECK9: omp.inner.for.body: 6693 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6694 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6695 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6696 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6697 // CHECK9-NEXT: call void @_Z3fn6v() 6698 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6699 // CHECK9: omp.body.continue: 6700 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6701 // CHECK9: omp.inner.for.inc: 6702 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6703 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6704 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6705 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6706 // CHECK9: omp.inner.for.end: 6707 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6708 // CHECK9: omp.loop.exit: 6709 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6710 // CHECK9-NEXT: ret void 6711 // 6712 // 6713 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 6714 // CHECK9-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 6715 // CHECK9-NEXT: entry: 6716 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 6717 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6718 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 6719 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 6720 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 6721 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 6722 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 6723 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 6724 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 6725 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6726 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6727 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 6728 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6729 // CHECK9: omp_offload.failed: 6730 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 6731 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 6732 // CHECK9: omp_offload.cont: 6733 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6734 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 6735 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 6736 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 6737 // CHECK9: omp_offload.failed2: 6738 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 6739 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 6740 // CHECK9: omp_offload.cont3: 6741 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 6742 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 6743 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 6744 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 6745 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6746 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 6747 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 6748 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6749 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 6750 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 6751 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6752 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8 6753 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6754 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6755 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 6756 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6757 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 6758 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 6759 // CHECK9: omp_offload.failed5: 6760 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 6761 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 6762 // CHECK9: omp_offload.cont6: 6763 // CHECK9-NEXT: ret i32 0 6764 // 6765 // 6766 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 6767 // CHECK9-SAME: () #[[ATTR1]] { 6768 // CHECK9-NEXT: entry: 6769 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 6770 // CHECK9-NEXT: ret void 6771 // 6772 // 6773 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 6774 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6775 // CHECK9-NEXT: entry: 6776 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6777 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6778 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6779 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6780 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6781 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6782 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6783 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6784 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6785 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6786 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6787 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6788 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6789 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6790 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6791 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6792 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6793 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6794 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6795 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6796 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6797 // CHECK9: cond.true: 6798 // CHECK9-NEXT: br label [[COND_END:%.*]] 6799 // CHECK9: cond.false: 6800 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6801 // CHECK9-NEXT: br label [[COND_END]] 6802 // CHECK9: cond.end: 6803 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6804 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6805 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6806 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6807 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6808 // CHECK9: omp.inner.for.cond: 6809 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6810 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6811 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6812 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6813 // CHECK9: omp.inner.for.body: 6814 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6815 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6816 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6817 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6818 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 6819 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6820 // CHECK9: omp.inner.for.inc: 6821 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6822 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6823 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6824 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6825 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6826 // CHECK9: omp.inner.for.end: 6827 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6828 // CHECK9: omp.loop.exit: 6829 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6830 // CHECK9-NEXT: ret void 6831 // 6832 // 6833 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 6834 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6835 // CHECK9-NEXT: entry: 6836 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6837 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6838 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6839 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6840 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6841 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6842 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6843 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6844 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6845 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6846 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6847 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6848 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6849 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6850 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6851 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6852 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6853 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6854 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6855 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6856 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6857 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6858 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6859 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6860 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6861 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6862 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 6863 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6864 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6865 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6866 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6867 // CHECK9: cond.true: 6868 // CHECK9-NEXT: br label [[COND_END:%.*]] 6869 // CHECK9: cond.false: 6870 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6871 // CHECK9-NEXT: br label [[COND_END]] 6872 // CHECK9: cond.end: 6873 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6874 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6875 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6876 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6877 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6878 // CHECK9: omp.inner.for.cond: 6879 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6880 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6881 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6882 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6883 // CHECK9: omp.inner.for.body: 6884 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6885 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6886 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6887 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6888 // CHECK9-NEXT: call void @_Z3fn1v() 6889 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6890 // CHECK9: omp.body.continue: 6891 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6892 // CHECK9: omp.inner.for.inc: 6893 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6894 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6895 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6896 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6897 // CHECK9: omp.inner.for.end: 6898 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6899 // CHECK9: omp.loop.exit: 6900 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 6901 // CHECK9-NEXT: ret void 6902 // 6903 // 6904 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 6905 // CHECK9-SAME: () #[[ATTR1]] { 6906 // CHECK9-NEXT: entry: 6907 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 6908 // CHECK9-NEXT: ret void 6909 // 6910 // 6911 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12 6912 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6913 // CHECK9-NEXT: entry: 6914 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6915 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6916 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6917 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6918 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6919 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6920 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6921 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6922 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6923 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6924 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 6925 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6926 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6927 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6928 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 6929 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6930 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6931 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6932 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 6933 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6934 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6935 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6936 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6937 // CHECK9: cond.true: 6938 // CHECK9-NEXT: br label [[COND_END:%.*]] 6939 // CHECK9: cond.false: 6940 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6941 // CHECK9-NEXT: br label [[COND_END]] 6942 // CHECK9: cond.end: 6943 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6944 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6945 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6946 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 6947 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6948 // CHECK9: omp.inner.for.cond: 6949 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6950 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6951 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6952 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6953 // CHECK9: omp.inner.for.body: 6954 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6955 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6956 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6957 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6958 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6959 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6960 // CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 6961 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 6962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6963 // CHECK9: omp.inner.for.inc: 6964 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6965 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6966 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6967 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6968 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6969 // CHECK9: omp.inner.for.end: 6970 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6971 // CHECK9: omp.loop.exit: 6972 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 6973 // CHECK9-NEXT: ret void 6974 // 6975 // 6976 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 6977 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6978 // CHECK9-NEXT: entry: 6979 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6980 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6981 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6982 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6983 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6984 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6985 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6986 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6987 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6988 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6989 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6990 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6991 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6992 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6993 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6994 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6995 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 6996 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6997 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6998 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6999 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7000 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7001 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7002 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7003 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7004 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7005 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7006 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7007 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7008 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7009 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7010 // CHECK9: cond.true: 7011 // CHECK9-NEXT: br label [[COND_END:%.*]] 7012 // CHECK9: cond.false: 7013 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7014 // CHECK9-NEXT: br label [[COND_END]] 7015 // CHECK9: cond.end: 7016 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7017 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7018 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7019 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7020 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7021 // CHECK9: omp.inner.for.cond: 7022 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7023 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7024 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7025 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7026 // CHECK9: omp.inner.for.body: 7027 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7028 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7029 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7030 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7031 // CHECK9-NEXT: call void @_Z3fn2v() 7032 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7033 // CHECK9: omp.body.continue: 7034 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7035 // CHECK9: omp.inner.for.inc: 7036 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7037 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7038 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7039 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7040 // CHECK9: omp.inner.for.end: 7041 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7042 // CHECK9: omp.loop.exit: 7043 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7044 // CHECK9-NEXT: ret void 7045 // 7046 // 7047 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 7048 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 7049 // CHECK9-NEXT: entry: 7050 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 7051 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 7052 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 7053 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 7054 // CHECK9-NEXT: ret void 7055 // 7056 // 7057 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 7058 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 7059 // CHECK9-NEXT: entry: 7060 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7061 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7062 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 7063 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7064 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7065 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7066 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7067 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7068 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7069 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7070 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7071 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 7072 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7073 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7074 // CHECK9-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 7075 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 7076 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7077 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7078 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7079 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7080 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7081 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7082 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7083 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7084 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 7085 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7086 // CHECK9: cond.true: 7087 // CHECK9-NEXT: br label [[COND_END:%.*]] 7088 // CHECK9: cond.false: 7089 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7090 // CHECK9-NEXT: br label [[COND_END]] 7091 // CHECK9: cond.end: 7092 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7093 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7094 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7095 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7096 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7097 // CHECK9: omp.inner.for.cond: 7098 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7099 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7100 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7101 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7102 // CHECK9: omp.inner.for.body: 7103 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7104 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7105 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7106 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7107 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 7108 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 7109 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7110 // CHECK9: omp_if.then: 7111 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 7112 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 7113 // CHECK9: omp_if.else: 7114 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 7115 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7116 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 7117 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 7118 // CHECK9-NEXT: br label [[OMP_IF_END]] 7119 // CHECK9: omp_if.end: 7120 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7121 // CHECK9: omp.inner.for.inc: 7122 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7123 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7124 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7125 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7126 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7127 // CHECK9: omp.inner.for.end: 7128 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7129 // CHECK9: omp.loop.exit: 7130 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7131 // CHECK9-NEXT: ret void 7132 // 7133 // 7134 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 7135 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7136 // CHECK9-NEXT: entry: 7137 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7138 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7139 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7140 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7141 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7142 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7143 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7144 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7145 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7146 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7147 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7148 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7149 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7150 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7151 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7152 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7153 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7154 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7155 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7156 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7157 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7158 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7159 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7160 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7161 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7162 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7163 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7164 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7165 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7166 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7167 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7168 // CHECK9: cond.true: 7169 // CHECK9-NEXT: br label [[COND_END:%.*]] 7170 // CHECK9: cond.false: 7171 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7172 // CHECK9-NEXT: br label [[COND_END]] 7173 // CHECK9: cond.end: 7174 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7175 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7176 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7177 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7178 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7179 // CHECK9: omp.inner.for.cond: 7180 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7181 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7182 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7183 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7184 // CHECK9: omp.inner.for.body: 7185 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7186 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7187 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7188 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7189 // CHECK9-NEXT: call void @_Z3fn3v() 7190 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7191 // CHECK9: omp.body.continue: 7192 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7193 // CHECK9: omp.inner.for.inc: 7194 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7195 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7196 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7197 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7198 // CHECK9: omp.inner.for.end: 7199 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7200 // CHECK9: omp.loop.exit: 7201 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7202 // CHECK9-NEXT: ret void 7203 // 7204 // 7205 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7206 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { 7207 // CHECK9-NEXT: entry: 7208 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 7209 // CHECK9-NEXT: ret void 7210 // 7211 // 7212 // CHECK10-LABEL: define {{[^@]+}}@_Z9gtid_testv 7213 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 7214 // CHECK10-NEXT: entry: 7215 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7216 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7217 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 7218 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7219 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7220 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7221 // CHECK10: omp_offload.failed: 7222 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 7223 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 7224 // CHECK10: omp_offload.cont: 7225 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7226 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7227 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7228 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7229 // CHECK10: omp_offload.failed2: 7230 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 7231 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7232 // CHECK10: omp_offload.cont3: 7233 // CHECK10-NEXT: ret void 7234 // 7235 // 7236 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 7237 // CHECK10-SAME: () #[[ATTR1:[0-9]+]] { 7238 // CHECK10-NEXT: entry: 7239 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 7240 // CHECK10-NEXT: ret void 7241 // 7242 // 7243 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 7244 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7245 // CHECK10-NEXT: entry: 7246 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7247 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7248 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7249 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7250 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7251 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7252 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7253 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7254 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7255 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7256 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7257 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7258 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7259 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7260 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7261 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7262 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7263 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7264 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7265 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7266 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7267 // CHECK10: cond.true: 7268 // CHECK10-NEXT: br label [[COND_END:%.*]] 7269 // CHECK10: cond.false: 7270 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7271 // CHECK10-NEXT: br label [[COND_END]] 7272 // CHECK10: cond.end: 7273 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7274 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7275 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7276 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7277 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7278 // CHECK10: omp.inner.for.cond: 7279 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7280 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7281 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7282 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7283 // CHECK10: omp.inner.for.body: 7284 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7285 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7286 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7287 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7288 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7289 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7290 // CHECK10: omp.inner.for.inc: 7291 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7292 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7293 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7294 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7295 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7296 // CHECK10: omp.inner.for.end: 7297 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7298 // CHECK10: omp.loop.exit: 7299 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7300 // CHECK10-NEXT: ret void 7301 // 7302 // 7303 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 7304 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7305 // CHECK10-NEXT: entry: 7306 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7307 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7308 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7309 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7310 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7311 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7312 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7313 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7314 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7315 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7316 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7317 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7318 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7319 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7320 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7321 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7322 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7323 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7324 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7325 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7326 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7327 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7328 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7329 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7330 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7331 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7332 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7333 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7334 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7335 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7336 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7337 // CHECK10: cond.true: 7338 // CHECK10-NEXT: br label [[COND_END:%.*]] 7339 // CHECK10: cond.false: 7340 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7341 // CHECK10-NEXT: br label [[COND_END]] 7342 // CHECK10: cond.end: 7343 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7344 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7345 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7346 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7347 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7348 // CHECK10: omp.inner.for.cond: 7349 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7350 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7351 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7352 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7353 // CHECK10: omp.inner.for.body: 7354 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7355 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7356 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7357 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7358 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7359 // CHECK10: omp.body.continue: 7360 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7361 // CHECK10: omp.inner.for.inc: 7362 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7363 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7364 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7365 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7366 // CHECK10: omp.inner.for.end: 7367 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7368 // CHECK10: omp.loop.exit: 7369 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7370 // CHECK10-NEXT: ret void 7371 // 7372 // 7373 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 7374 // CHECK10-SAME: () #[[ATTR1]] { 7375 // CHECK10-NEXT: entry: 7376 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 7377 // CHECK10-NEXT: ret void 7378 // 7379 // 7380 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 7381 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7382 // CHECK10-NEXT: entry: 7383 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7384 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7385 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7386 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7387 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7388 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7389 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7390 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7391 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7392 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7393 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 7394 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7395 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7396 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7397 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7398 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7399 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7400 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7401 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7402 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7403 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7404 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7405 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7406 // CHECK10: cond.true: 7407 // CHECK10-NEXT: br label [[COND_END:%.*]] 7408 // CHECK10: cond.false: 7409 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7410 // CHECK10-NEXT: br label [[COND_END]] 7411 // CHECK10: cond.end: 7412 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7413 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7414 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7415 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7416 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7417 // CHECK10: omp.inner.for.cond: 7418 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7419 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7420 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7421 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7422 // CHECK10: omp.inner.for.body: 7423 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7424 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7425 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7426 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7427 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 7428 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7429 // CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 7430 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 7431 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7432 // CHECK10: omp.inner.for.inc: 7433 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7434 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7435 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7436 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7437 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7438 // CHECK10: omp.inner.for.end: 7439 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7440 // CHECK10: omp.loop.exit: 7441 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7442 // CHECK10-NEXT: ret void 7443 // 7444 // 7445 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 7446 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7447 // CHECK10-NEXT: entry: 7448 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7449 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7450 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7451 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7452 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7453 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7454 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7455 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7456 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7457 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7458 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7459 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7460 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7461 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7462 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7463 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7464 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7465 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7466 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7467 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7468 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7469 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7470 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7471 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7472 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7473 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7474 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7475 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7476 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7477 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7478 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7479 // CHECK10: cond.true: 7480 // CHECK10-NEXT: br label [[COND_END:%.*]] 7481 // CHECK10: cond.false: 7482 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7483 // CHECK10-NEXT: br label [[COND_END]] 7484 // CHECK10: cond.end: 7485 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7486 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7487 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7488 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7489 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7490 // CHECK10: omp.inner.for.cond: 7491 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7492 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7493 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7494 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7495 // CHECK10: omp.inner.for.body: 7496 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7497 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7498 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7499 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7500 // CHECK10-NEXT: call void @_Z9gtid_testv() 7501 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7502 // CHECK10: omp.body.continue: 7503 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7504 // CHECK10: omp.inner.for.inc: 7505 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7506 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7507 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7508 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7509 // CHECK10: omp.inner.for.end: 7510 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7511 // CHECK10: omp.loop.exit: 7512 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7513 // CHECK10-NEXT: ret void 7514 // 7515 // 7516 // CHECK10-LABEL: define {{[^@]+}}@main 7517 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] { 7518 // CHECK10-NEXT: entry: 7519 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7520 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7521 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 7522 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 7523 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 7524 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 7525 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 7526 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 7527 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 7528 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7529 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7530 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 7531 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7532 // CHECK10: omp_offload.failed: 7533 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 7534 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 7535 // CHECK10: omp_offload.cont: 7536 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7537 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 7538 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 7539 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 7540 // CHECK10: omp_offload.failed2: 7541 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 7542 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 7543 // CHECK10: omp_offload.cont3: 7544 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 7545 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 7546 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 7547 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 7548 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7549 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 7550 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 7551 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7552 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 7553 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 7554 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7555 // CHECK10-NEXT: store i8* null, i8** [[TMP10]], align 8 7556 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7557 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7558 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 7559 // CHECK10-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7560 // CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 7561 // CHECK10-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 7562 // CHECK10: omp_offload.failed5: 7563 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 7564 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]] 7565 // CHECK10: omp_offload.cont6: 7566 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 7567 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 7568 // CHECK10-NEXT: ret i32 [[CALL]] 7569 // 7570 // 7571 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 7572 // CHECK10-SAME: () #[[ATTR1]] { 7573 // CHECK10-NEXT: entry: 7574 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 7575 // CHECK10-NEXT: ret void 7576 // 7577 // 7578 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 7579 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7580 // CHECK10-NEXT: entry: 7581 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7582 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7583 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7584 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7585 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7586 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7587 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7588 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7589 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7590 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7591 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7592 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7593 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7594 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7595 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7596 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7597 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7598 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7599 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7600 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7601 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7602 // CHECK10: cond.true: 7603 // CHECK10-NEXT: br label [[COND_END:%.*]] 7604 // CHECK10: cond.false: 7605 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7606 // CHECK10-NEXT: br label [[COND_END]] 7607 // CHECK10: cond.end: 7608 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7609 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7610 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7611 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7612 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7613 // CHECK10: omp.inner.for.cond: 7614 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7615 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7616 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7617 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7618 // CHECK10: omp.inner.for.body: 7619 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7620 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7621 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7622 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7623 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 7624 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7625 // CHECK10: omp.inner.for.inc: 7626 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7627 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7628 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7629 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7630 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7631 // CHECK10: omp.inner.for.end: 7632 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7633 // CHECK10: omp.loop.exit: 7634 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7635 // CHECK10-NEXT: ret void 7636 // 7637 // 7638 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5 7639 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7640 // CHECK10-NEXT: entry: 7641 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7642 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7643 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7644 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7645 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7646 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7647 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7648 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7649 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7650 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7651 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7652 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7653 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7654 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7655 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7656 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7657 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7658 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7659 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7660 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7661 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7662 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7663 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7664 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7665 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7666 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7667 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7668 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7669 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7670 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7671 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7672 // CHECK10: cond.true: 7673 // CHECK10-NEXT: br label [[COND_END:%.*]] 7674 // CHECK10: cond.false: 7675 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7676 // CHECK10-NEXT: br label [[COND_END]] 7677 // CHECK10: cond.end: 7678 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7679 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7680 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7681 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7682 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7683 // CHECK10: omp.inner.for.cond: 7684 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7685 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7686 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7687 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7688 // CHECK10: omp.inner.for.body: 7689 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7690 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7691 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7692 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7693 // CHECK10-NEXT: call void @_Z3fn4v() 7694 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7695 // CHECK10: omp.body.continue: 7696 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7697 // CHECK10: omp.inner.for.inc: 7698 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7699 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7700 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7701 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7702 // CHECK10: omp.inner.for.end: 7703 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7704 // CHECK10: omp.loop.exit: 7705 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7706 // CHECK10-NEXT: ret void 7707 // 7708 // 7709 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 7710 // CHECK10-SAME: () #[[ATTR1]] { 7711 // CHECK10-NEXT: entry: 7712 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 7713 // CHECK10-NEXT: ret void 7714 // 7715 // 7716 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 7717 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7718 // CHECK10-NEXT: entry: 7719 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7720 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7721 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7722 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7723 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7724 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7725 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7726 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7727 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7728 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7729 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 7730 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7731 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7732 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7733 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7734 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7735 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7736 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7737 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 7738 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7739 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7740 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7741 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7742 // CHECK10: cond.true: 7743 // CHECK10-NEXT: br label [[COND_END:%.*]] 7744 // CHECK10: cond.false: 7745 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7746 // CHECK10-NEXT: br label [[COND_END]] 7747 // CHECK10: cond.end: 7748 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7749 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7750 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7751 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 7752 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7753 // CHECK10: omp.inner.for.cond: 7754 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7755 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7756 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7757 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7758 // CHECK10: omp.inner.for.body: 7759 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7760 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7761 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7762 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7763 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 7764 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7765 // CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 7766 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 7767 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7768 // CHECK10: omp.inner.for.inc: 7769 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7770 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7771 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7772 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7773 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7774 // CHECK10: omp.inner.for.end: 7775 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7776 // CHECK10: omp.loop.exit: 7777 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 7778 // CHECK10-NEXT: ret void 7779 // 7780 // 7781 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 7782 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7783 // CHECK10-NEXT: entry: 7784 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7785 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7786 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7787 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7788 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7789 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7790 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7791 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7792 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7793 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7794 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7795 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7796 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7797 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7798 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7799 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7800 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7801 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7802 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7803 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7804 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7805 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7806 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7807 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7808 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7809 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7810 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7811 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7812 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7813 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7814 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7815 // CHECK10: cond.true: 7816 // CHECK10-NEXT: br label [[COND_END:%.*]] 7817 // CHECK10: cond.false: 7818 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7819 // CHECK10-NEXT: br label [[COND_END]] 7820 // CHECK10: cond.end: 7821 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7822 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7823 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7824 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7825 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7826 // CHECK10: omp.inner.for.cond: 7827 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7828 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7829 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7830 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7831 // CHECK10: omp.inner.for.body: 7832 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7833 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7834 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7835 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7836 // CHECK10-NEXT: call void @_Z3fn5v() 7837 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7838 // CHECK10: omp.body.continue: 7839 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7840 // CHECK10: omp.inner.for.inc: 7841 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7842 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7843 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7844 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7845 // CHECK10: omp.inner.for.end: 7846 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7847 // CHECK10: omp.loop.exit: 7848 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 7849 // CHECK10-NEXT: ret void 7850 // 7851 // 7852 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 7853 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 7854 // CHECK10-NEXT: entry: 7855 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 7856 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 7857 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 7858 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 7859 // CHECK10-NEXT: ret void 7860 // 7861 // 7862 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8 7863 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 7864 // CHECK10-NEXT: entry: 7865 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7866 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7867 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 7868 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7869 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7870 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7871 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7872 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7873 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7874 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7875 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7876 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 7877 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7878 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7879 // CHECK10-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 7880 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 7881 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7882 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 7883 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7884 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7885 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7886 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7887 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7888 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7889 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 7890 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7891 // CHECK10: cond.true: 7892 // CHECK10-NEXT: br label [[COND_END:%.*]] 7893 // CHECK10: cond.false: 7894 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7895 // CHECK10-NEXT: br label [[COND_END]] 7896 // CHECK10: cond.end: 7897 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7898 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7899 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7900 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7901 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7902 // CHECK10: omp.inner.for.cond: 7903 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7904 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7905 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7906 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7907 // CHECK10: omp.inner.for.body: 7908 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7909 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7910 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7911 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7912 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 7913 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 7914 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7915 // CHECK10: omp_if.then: 7916 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 7917 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]] 7918 // CHECK10: omp_if.else: 7919 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 7920 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7921 // CHECK10-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 7922 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 7923 // CHECK10-NEXT: br label [[OMP_IF_END]] 7924 // CHECK10: omp_if.end: 7925 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7926 // CHECK10: omp.inner.for.inc: 7927 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7928 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7929 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7930 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7931 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 7932 // CHECK10: omp.inner.for.end: 7933 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7934 // CHECK10: omp.loop.exit: 7935 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7936 // CHECK10-NEXT: ret void 7937 // 7938 // 7939 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9 7940 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7941 // CHECK10-NEXT: entry: 7942 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7943 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7944 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7945 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7946 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7947 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 7948 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7949 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7950 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7951 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7952 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 7953 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7954 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7955 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7956 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7957 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7958 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 7959 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7960 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7961 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7962 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7963 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7964 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 7965 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7966 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7967 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7968 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 7969 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7970 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7971 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7972 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7973 // CHECK10: cond.true: 7974 // CHECK10-NEXT: br label [[COND_END:%.*]] 7975 // CHECK10: cond.false: 7976 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7977 // CHECK10-NEXT: br label [[COND_END]] 7978 // CHECK10: cond.end: 7979 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7980 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7981 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7982 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7983 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7984 // CHECK10: omp.inner.for.cond: 7985 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7986 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7987 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7988 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7989 // CHECK10: omp.inner.for.body: 7990 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7991 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7992 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7993 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7994 // CHECK10-NEXT: call void @_Z3fn6v() 7995 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7996 // CHECK10: omp.body.continue: 7997 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7998 // CHECK10: omp.inner.for.inc: 7999 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8000 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8001 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8002 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8003 // CHECK10: omp.inner.for.end: 8004 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8005 // CHECK10: omp.loop.exit: 8006 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8007 // CHECK10-NEXT: ret void 8008 // 8009 // 8010 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 8011 // CHECK10-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 8012 // CHECK10-NEXT: entry: 8013 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 8014 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8015 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8016 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 8017 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 8018 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 8019 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 8020 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 8021 // CHECK10-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 8022 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8023 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8024 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8025 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8026 // CHECK10: omp_offload.failed: 8027 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 8028 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 8029 // CHECK10: omp_offload.cont: 8030 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8031 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8032 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8033 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8034 // CHECK10: omp_offload.failed2: 8035 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 8036 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8037 // CHECK10: omp_offload.cont3: 8038 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 8039 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 8040 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 8041 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 8042 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8043 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 8044 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 8045 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8046 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 8047 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 8048 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8049 // CHECK10-NEXT: store i8* null, i8** [[TMP10]], align 8 8050 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8051 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8052 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8053 // CHECK10-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8054 // CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 8055 // CHECK10-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 8056 // CHECK10: omp_offload.failed5: 8057 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 8058 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]] 8059 // CHECK10: omp_offload.cont6: 8060 // CHECK10-NEXT: ret i32 0 8061 // 8062 // 8063 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 8064 // CHECK10-SAME: () #[[ATTR1]] { 8065 // CHECK10-NEXT: entry: 8066 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 8067 // CHECK10-NEXT: ret void 8068 // 8069 // 8070 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 8071 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 8072 // CHECK10-NEXT: entry: 8073 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8074 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8075 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8076 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8077 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8078 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8079 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8080 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8081 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8082 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8083 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8084 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8085 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8086 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8087 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8088 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8089 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8090 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8091 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8092 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8093 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8094 // CHECK10: cond.true: 8095 // CHECK10-NEXT: br label [[COND_END:%.*]] 8096 // CHECK10: cond.false: 8097 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8098 // CHECK10-NEXT: br label [[COND_END]] 8099 // CHECK10: cond.end: 8100 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8101 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8102 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8103 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8104 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8105 // CHECK10: omp.inner.for.cond: 8106 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8107 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8108 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8109 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8110 // CHECK10: omp.inner.for.body: 8111 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8112 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8113 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8114 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8115 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8116 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8117 // CHECK10: omp.inner.for.inc: 8118 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8119 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8120 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8121 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8122 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8123 // CHECK10: omp.inner.for.end: 8124 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8125 // CHECK10: omp.loop.exit: 8126 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8127 // CHECK10-NEXT: ret void 8128 // 8129 // 8130 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11 8131 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 8132 // CHECK10-NEXT: entry: 8133 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8134 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8135 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8136 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8137 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8138 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8139 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8140 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8141 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8142 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8143 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8144 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8145 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8146 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8147 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8148 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8149 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8150 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8151 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8152 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8153 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8154 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8155 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8156 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8157 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8158 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8159 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8160 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8161 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8162 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8163 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8164 // CHECK10: cond.true: 8165 // CHECK10-NEXT: br label [[COND_END:%.*]] 8166 // CHECK10: cond.false: 8167 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8168 // CHECK10-NEXT: br label [[COND_END]] 8169 // CHECK10: cond.end: 8170 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8171 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8172 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8173 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8174 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8175 // CHECK10: omp.inner.for.cond: 8176 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8177 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8178 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8179 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8180 // CHECK10: omp.inner.for.body: 8181 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8182 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8183 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8184 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8185 // CHECK10-NEXT: call void @_Z3fn1v() 8186 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8187 // CHECK10: omp.body.continue: 8188 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8189 // CHECK10: omp.inner.for.inc: 8190 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8191 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8192 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8193 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8194 // CHECK10: omp.inner.for.end: 8195 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8196 // CHECK10: omp.loop.exit: 8197 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8198 // CHECK10-NEXT: ret void 8199 // 8200 // 8201 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 8202 // CHECK10-SAME: () #[[ATTR1]] { 8203 // CHECK10-NEXT: entry: 8204 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 8205 // CHECK10-NEXT: ret void 8206 // 8207 // 8208 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..12 8209 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 8210 // CHECK10-NEXT: entry: 8211 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8212 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8213 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8214 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8215 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8216 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8217 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8218 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8219 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8220 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 8221 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 8222 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8223 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8224 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8225 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8226 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8227 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8228 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8229 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8230 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8231 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8232 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8233 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8234 // CHECK10: cond.true: 8235 // CHECK10-NEXT: br label [[COND_END:%.*]] 8236 // CHECK10: cond.false: 8237 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8238 // CHECK10-NEXT: br label [[COND_END]] 8239 // CHECK10: cond.end: 8240 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8241 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8242 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8243 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8244 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8245 // CHECK10: omp.inner.for.cond: 8246 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8247 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8248 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8249 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8250 // CHECK10: omp.inner.for.body: 8251 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8252 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8253 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8254 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8255 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 8256 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8257 // CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 8258 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 8259 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8260 // CHECK10: omp.inner.for.inc: 8261 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8262 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8263 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 8264 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8265 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8266 // CHECK10: omp.inner.for.end: 8267 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8268 // CHECK10: omp.loop.exit: 8269 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8270 // CHECK10-NEXT: ret void 8271 // 8272 // 8273 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13 8274 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 8275 // CHECK10-NEXT: entry: 8276 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8277 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8278 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8279 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8280 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8281 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8282 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8283 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8284 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8285 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8286 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8287 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8288 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8289 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8290 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8291 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8292 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8293 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8294 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8295 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8296 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8297 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8298 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8299 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8300 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8301 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8302 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8303 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8304 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8305 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8306 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8307 // CHECK10: cond.true: 8308 // CHECK10-NEXT: br label [[COND_END:%.*]] 8309 // CHECK10: cond.false: 8310 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8311 // CHECK10-NEXT: br label [[COND_END]] 8312 // CHECK10: cond.end: 8313 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8314 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8315 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8316 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8317 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8318 // CHECK10: omp.inner.for.cond: 8319 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8320 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8321 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8322 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8323 // CHECK10: omp.inner.for.body: 8324 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8325 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8326 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8327 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8328 // CHECK10-NEXT: call void @_Z3fn2v() 8329 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8330 // CHECK10: omp.body.continue: 8331 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8332 // CHECK10: omp.inner.for.inc: 8333 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8334 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8335 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8336 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8337 // CHECK10: omp.inner.for.end: 8338 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8339 // CHECK10: omp.loop.exit: 8340 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8341 // CHECK10-NEXT: ret void 8342 // 8343 // 8344 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 8345 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 8346 // CHECK10-NEXT: entry: 8347 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 8348 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 8349 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 8350 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 8351 // CHECK10-NEXT: ret void 8352 // 8353 // 8354 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..14 8355 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 8356 // CHECK10-NEXT: entry: 8357 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8358 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8359 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 8360 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8361 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8362 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8363 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8364 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8365 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8366 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8367 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 8368 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 8369 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8370 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8371 // CHECK10-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 8372 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 8373 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8374 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8375 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8376 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8377 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8378 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8379 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8380 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8381 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 8382 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8383 // CHECK10: cond.true: 8384 // CHECK10-NEXT: br label [[COND_END:%.*]] 8385 // CHECK10: cond.false: 8386 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8387 // CHECK10-NEXT: br label [[COND_END]] 8388 // CHECK10: cond.end: 8389 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8390 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8391 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8392 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8393 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8394 // CHECK10: omp.inner.for.cond: 8395 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8396 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8397 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8398 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8399 // CHECK10: omp.inner.for.body: 8400 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8401 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 8402 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8403 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 8404 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 8405 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 8406 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 8407 // CHECK10: omp_if.then: 8408 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 8409 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]] 8410 // CHECK10: omp_if.else: 8411 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 8412 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8413 // CHECK10-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 8414 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 8415 // CHECK10-NEXT: br label [[OMP_IF_END]] 8416 // CHECK10: omp_if.end: 8417 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8418 // CHECK10: omp.inner.for.inc: 8419 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8420 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8421 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 8422 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8423 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8424 // CHECK10: omp.inner.for.end: 8425 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8426 // CHECK10: omp.loop.exit: 8427 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8428 // CHECK10-NEXT: ret void 8429 // 8430 // 8431 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..15 8432 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 8433 // CHECK10-NEXT: entry: 8434 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8435 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8436 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8437 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8438 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8439 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 8440 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8441 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8442 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8443 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8444 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 8445 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8446 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8447 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8448 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8449 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8450 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8451 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8452 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8453 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8454 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8455 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8456 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8457 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8458 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8459 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8460 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8461 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8462 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8463 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8464 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8465 // CHECK10: cond.true: 8466 // CHECK10-NEXT: br label [[COND_END:%.*]] 8467 // CHECK10: cond.false: 8468 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8469 // CHECK10-NEXT: br label [[COND_END]] 8470 // CHECK10: cond.end: 8471 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8472 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8473 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8474 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8475 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8476 // CHECK10: omp.inner.for.cond: 8477 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8478 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8479 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8480 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8481 // CHECK10: omp.inner.for.body: 8482 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8483 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8484 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8485 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8486 // CHECK10-NEXT: call void @_Z3fn3v() 8487 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8488 // CHECK10: omp.body.continue: 8489 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8490 // CHECK10: omp.inner.for.inc: 8491 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8492 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8493 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8494 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 8495 // CHECK10: omp.inner.for.end: 8496 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8497 // CHECK10: omp.loop.exit: 8498 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8499 // CHECK10-NEXT: ret void 8500 // 8501 // 8502 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 8503 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] { 8504 // CHECK10-NEXT: entry: 8505 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 8506 // CHECK10-NEXT: ret void 8507 // 8508 // 8509 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv 8510 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 8511 // CHECK11-NEXT: entry: 8512 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8513 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 8514 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 8515 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 8516 // CHECK11: for.cond: 8517 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8518 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8519 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8520 // CHECK11: for.body: 8521 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 8522 // CHECK11: for.inc: 8523 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8524 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8525 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 8526 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 8527 // CHECK11: for.end: 8528 // CHECK11-NEXT: store i32 0, i32* [[I1]], align 4 8529 // CHECK11-NEXT: br label [[FOR_COND2:%.*]] 8530 // CHECK11: for.cond2: 8531 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8532 // CHECK11-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8533 // CHECK11-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8534 // CHECK11: for.body4: 8535 // CHECK11-NEXT: call void @_Z9gtid_testv() 8536 // CHECK11-NEXT: br label [[FOR_INC5:%.*]] 8537 // CHECK11: for.inc5: 8538 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8539 // CHECK11-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8540 // CHECK11-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8541 // CHECK11-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 8542 // CHECK11: for.end7: 8543 // CHECK11-NEXT: ret void 8544 // 8545 // 8546 // CHECK11-LABEL: define {{[^@]+}}@main 8547 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] { 8548 // CHECK11-NEXT: entry: 8549 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8550 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8551 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 8552 // CHECK11-NEXT: [[I8:%.*]] = alloca i32, align 4 8553 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 8554 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 8555 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 8556 // CHECK11: for.cond: 8557 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8558 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8559 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8560 // CHECK11: for.body: 8561 // CHECK11-NEXT: call void @_Z3fn4v() 8562 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 8563 // CHECK11: for.inc: 8564 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8565 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8566 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 8567 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 8568 // CHECK11: for.end: 8569 // CHECK11-NEXT: store i32 0, i32* [[I1]], align 4 8570 // CHECK11-NEXT: br label [[FOR_COND2:%.*]] 8571 // CHECK11: for.cond2: 8572 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8573 // CHECK11-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8574 // CHECK11-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8575 // CHECK11: for.body4: 8576 // CHECK11-NEXT: call void @_Z3fn5v() 8577 // CHECK11-NEXT: br label [[FOR_INC5:%.*]] 8578 // CHECK11: for.inc5: 8579 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8580 // CHECK11-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8581 // CHECK11-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8582 // CHECK11-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 8583 // CHECK11: for.end7: 8584 // CHECK11-NEXT: store i32 0, i32* [[I8]], align 4 8585 // CHECK11-NEXT: br label [[FOR_COND9:%.*]] 8586 // CHECK11: for.cond9: 8587 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 8588 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 8589 // CHECK11-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 8590 // CHECK11: for.body11: 8591 // CHECK11-NEXT: call void @_Z3fn6v() 8592 // CHECK11-NEXT: br label [[FOR_INC12:%.*]] 8593 // CHECK11: for.inc12: 8594 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 8595 // CHECK11-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 8596 // CHECK11-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 8597 // CHECK11-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]] 8598 // CHECK11: for.end14: 8599 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 8600 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 8601 // CHECK11-NEXT: ret i32 [[CALL]] 8602 // 8603 // 8604 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 8605 // CHECK11-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 8606 // CHECK11-NEXT: entry: 8607 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 8608 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 8609 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 8610 // CHECK11-NEXT: [[I8:%.*]] = alloca i32, align 4 8611 // CHECK11-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 8612 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 8613 // CHECK11-NEXT: br label [[FOR_COND:%.*]] 8614 // CHECK11: for.cond: 8615 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8616 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8617 // CHECK11-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8618 // CHECK11: for.body: 8619 // CHECK11-NEXT: call void @_Z3fn1v() 8620 // CHECK11-NEXT: br label [[FOR_INC:%.*]] 8621 // CHECK11: for.inc: 8622 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8623 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8624 // CHECK11-NEXT: store i32 [[INC]], i32* [[I]], align 4 8625 // CHECK11-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 8626 // CHECK11: for.end: 8627 // CHECK11-NEXT: store i32 0, i32* [[I1]], align 4 8628 // CHECK11-NEXT: br label [[FOR_COND2:%.*]] 8629 // CHECK11: for.cond2: 8630 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8631 // CHECK11-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8632 // CHECK11-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8633 // CHECK11: for.body4: 8634 // CHECK11-NEXT: call void @_Z3fn2v() 8635 // CHECK11-NEXT: br label [[FOR_INC5:%.*]] 8636 // CHECK11: for.inc5: 8637 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8638 // CHECK11-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8639 // CHECK11-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8640 // CHECK11-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]] 8641 // CHECK11: for.end7: 8642 // CHECK11-NEXT: store i32 0, i32* [[I8]], align 4 8643 // CHECK11-NEXT: br label [[FOR_COND9:%.*]] 8644 // CHECK11: for.cond9: 8645 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 8646 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 8647 // CHECK11-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 8648 // CHECK11: for.body11: 8649 // CHECK11-NEXT: call void @_Z3fn3v() 8650 // CHECK11-NEXT: br label [[FOR_INC12:%.*]] 8651 // CHECK11: for.inc12: 8652 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 8653 // CHECK11-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 8654 // CHECK11-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 8655 // CHECK11-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]] 8656 // CHECK11: for.end14: 8657 // CHECK11-NEXT: ret i32 0 8658 // 8659 // 8660 // CHECK12-LABEL: define {{[^@]+}}@_Z9gtid_testv 8661 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 8662 // CHECK12-NEXT: entry: 8663 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8664 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 8665 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8666 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8667 // CHECK12: for.cond: 8668 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8669 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8670 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8671 // CHECK12: for.body: 8672 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8673 // CHECK12: for.inc: 8674 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8675 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8676 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8677 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 8678 // CHECK12: for.end: 8679 // CHECK12-NEXT: store i32 0, i32* [[I1]], align 4 8680 // CHECK12-NEXT: br label [[FOR_COND2:%.*]] 8681 // CHECK12: for.cond2: 8682 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8683 // CHECK12-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8684 // CHECK12-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8685 // CHECK12: for.body4: 8686 // CHECK12-NEXT: call void @_Z9gtid_testv() 8687 // CHECK12-NEXT: br label [[FOR_INC5:%.*]] 8688 // CHECK12: for.inc5: 8689 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8690 // CHECK12-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8691 // CHECK12-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8692 // CHECK12-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 8693 // CHECK12: for.end7: 8694 // CHECK12-NEXT: ret void 8695 // 8696 // 8697 // CHECK12-LABEL: define {{[^@]+}}@main 8698 // CHECK12-SAME: () #[[ATTR1:[0-9]+]] { 8699 // CHECK12-NEXT: entry: 8700 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8701 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8702 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 8703 // CHECK12-NEXT: [[I8:%.*]] = alloca i32, align 4 8704 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 8705 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8706 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8707 // CHECK12: for.cond: 8708 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8709 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8710 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8711 // CHECK12: for.body: 8712 // CHECK12-NEXT: call void @_Z3fn4v() 8713 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8714 // CHECK12: for.inc: 8715 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8716 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8717 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8718 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 8719 // CHECK12: for.end: 8720 // CHECK12-NEXT: store i32 0, i32* [[I1]], align 4 8721 // CHECK12-NEXT: br label [[FOR_COND2:%.*]] 8722 // CHECK12: for.cond2: 8723 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8724 // CHECK12-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8725 // CHECK12-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8726 // CHECK12: for.body4: 8727 // CHECK12-NEXT: call void @_Z3fn5v() 8728 // CHECK12-NEXT: br label [[FOR_INC5:%.*]] 8729 // CHECK12: for.inc5: 8730 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8731 // CHECK12-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8732 // CHECK12-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8733 // CHECK12-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 8734 // CHECK12: for.end7: 8735 // CHECK12-NEXT: store i32 0, i32* [[I8]], align 4 8736 // CHECK12-NEXT: br label [[FOR_COND9:%.*]] 8737 // CHECK12: for.cond9: 8738 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 8739 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 8740 // CHECK12-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 8741 // CHECK12: for.body11: 8742 // CHECK12-NEXT: call void @_Z3fn6v() 8743 // CHECK12-NEXT: br label [[FOR_INC12:%.*]] 8744 // CHECK12: for.inc12: 8745 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 8746 // CHECK12-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 8747 // CHECK12-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 8748 // CHECK12-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]] 8749 // CHECK12: for.end14: 8750 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 8751 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 8752 // CHECK12-NEXT: ret i32 [[CALL]] 8753 // 8754 // 8755 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 8756 // CHECK12-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 8757 // CHECK12-NEXT: entry: 8758 // CHECK12-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 8759 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 8760 // CHECK12-NEXT: [[I1:%.*]] = alloca i32, align 4 8761 // CHECK12-NEXT: [[I8:%.*]] = alloca i32, align 4 8762 // CHECK12-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 8763 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 8764 // CHECK12-NEXT: br label [[FOR_COND:%.*]] 8765 // CHECK12: for.cond: 8766 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 8767 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 8768 // CHECK12-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 8769 // CHECK12: for.body: 8770 // CHECK12-NEXT: call void @_Z3fn1v() 8771 // CHECK12-NEXT: br label [[FOR_INC:%.*]] 8772 // CHECK12: for.inc: 8773 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 8774 // CHECK12-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 8775 // CHECK12-NEXT: store i32 [[INC]], i32* [[I]], align 4 8776 // CHECK12-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 8777 // CHECK12: for.end: 8778 // CHECK12-NEXT: store i32 0, i32* [[I1]], align 4 8779 // CHECK12-NEXT: br label [[FOR_COND2:%.*]] 8780 // CHECK12: for.cond2: 8781 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 8782 // CHECK12-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 8783 // CHECK12-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 8784 // CHECK12: for.body4: 8785 // CHECK12-NEXT: call void @_Z3fn2v() 8786 // CHECK12-NEXT: br label [[FOR_INC5:%.*]] 8787 // CHECK12: for.inc5: 8788 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 8789 // CHECK12-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 8790 // CHECK12-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 8791 // CHECK12-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]] 8792 // CHECK12: for.end7: 8793 // CHECK12-NEXT: store i32 0, i32* [[I8]], align 4 8794 // CHECK12-NEXT: br label [[FOR_COND9:%.*]] 8795 // CHECK12: for.cond9: 8796 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 8797 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 8798 // CHECK12-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 8799 // CHECK12: for.body11: 8800 // CHECK12-NEXT: call void @_Z3fn3v() 8801 // CHECK12-NEXT: br label [[FOR_INC12:%.*]] 8802 // CHECK12: for.inc12: 8803 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 8804 // CHECK12-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 8805 // CHECK12-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 8806 // CHECK12-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]] 8807 // CHECK12: for.end14: 8808 // CHECK12-NEXT: ret i32 0 8809 // 8810 // 8811 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv 8812 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 8813 // CHECK13-NEXT: entry: 8814 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8815 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 8816 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 8817 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8818 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 8819 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8820 // CHECK13: omp_offload.failed: 8821 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 8822 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8823 // CHECK13: omp_offload.cont: 8824 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 8825 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 8826 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 8827 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 8828 // CHECK13: omp_offload.failed2: 8829 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 8830 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 8831 // CHECK13: omp_offload.cont3: 8832 // CHECK13-NEXT: ret void 8833 // 8834 // 8835 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 8836 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] { 8837 // CHECK13-NEXT: entry: 8838 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 8839 // CHECK13-NEXT: ret void 8840 // 8841 // 8842 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 8843 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 8844 // CHECK13-NEXT: entry: 8845 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8846 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8847 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8848 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8849 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8850 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8851 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8852 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8853 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8854 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8855 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8856 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8857 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8858 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8859 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8860 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8861 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 8862 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8863 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8864 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 8865 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8866 // CHECK13: cond.true: 8867 // CHECK13-NEXT: br label [[COND_END:%.*]] 8868 // CHECK13: cond.false: 8869 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8870 // CHECK13-NEXT: br label [[COND_END]] 8871 // CHECK13: cond.end: 8872 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 8873 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8874 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8875 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 8876 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8877 // CHECK13: omp.inner.for.cond: 8878 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8879 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8880 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 8881 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8882 // CHECK13: omp.inner.for.body: 8883 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8884 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 8885 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8886 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 8887 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 8888 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8889 // CHECK13: omp.inner.for.inc: 8890 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8891 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8892 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 8893 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8894 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8895 // CHECK13: omp.inner.for.end: 8896 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8897 // CHECK13: omp.loop.exit: 8898 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 8899 // CHECK13-NEXT: ret void 8900 // 8901 // 8902 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 8903 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 8904 // CHECK13-NEXT: entry: 8905 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8906 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8907 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8908 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8909 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8910 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8911 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8912 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8913 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8914 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8915 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8916 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8917 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8918 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8919 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8920 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8921 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 8922 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8923 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 8924 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8925 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 8926 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8927 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 8928 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8929 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8930 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8931 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 8932 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8933 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8934 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 8935 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8936 // CHECK13: cond.true: 8937 // CHECK13-NEXT: br label [[COND_END:%.*]] 8938 // CHECK13: cond.false: 8939 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8940 // CHECK13-NEXT: br label [[COND_END]] 8941 // CHECK13: cond.end: 8942 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 8943 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8944 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8945 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 8946 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8947 // CHECK13: omp.inner.for.cond: 8948 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8949 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8950 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 8951 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8952 // CHECK13: omp.inner.for.body: 8953 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8954 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 8955 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8956 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8957 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8958 // CHECK13: omp.body.continue: 8959 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8960 // CHECK13: omp.inner.for.inc: 8961 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8962 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 8963 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8964 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8965 // CHECK13: omp.inner.for.end: 8966 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8967 // CHECK13: omp.loop.exit: 8968 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 8969 // CHECK13-NEXT: ret void 8970 // 8971 // 8972 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 8973 // CHECK13-SAME: () #[[ATTR1]] { 8974 // CHECK13-NEXT: entry: 8975 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 8976 // CHECK13-NEXT: ret void 8977 // 8978 // 8979 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 8980 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 8981 // CHECK13-NEXT: entry: 8982 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8983 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8984 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8985 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8986 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8987 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8988 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8989 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8990 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8991 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 8992 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 8993 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8994 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8995 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8996 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 8997 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8998 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8999 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9000 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9001 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9002 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9003 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9004 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9005 // CHECK13: cond.true: 9006 // CHECK13-NEXT: br label [[COND_END:%.*]] 9007 // CHECK13: cond.false: 9008 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9009 // CHECK13-NEXT: br label [[COND_END]] 9010 // CHECK13: cond.end: 9011 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9012 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9013 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9014 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9015 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9016 // CHECK13: omp.inner.for.cond: 9017 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9018 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9019 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9020 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9021 // CHECK13: omp.inner.for.body: 9022 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9023 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9024 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9025 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9026 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9027 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9028 // CHECK13-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 9029 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9030 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9031 // CHECK13: omp.inner.for.inc: 9032 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9033 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9034 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9035 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9036 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9037 // CHECK13: omp.inner.for.end: 9038 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9039 // CHECK13: omp.loop.exit: 9040 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9041 // CHECK13-NEXT: ret void 9042 // 9043 // 9044 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 9045 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9046 // CHECK13-NEXT: entry: 9047 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9048 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9049 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9050 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9051 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9052 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9053 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9054 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9055 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9056 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9057 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9058 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9059 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9060 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9061 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9062 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9063 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9064 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9065 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9066 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9067 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9068 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9069 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9070 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9071 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9072 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9073 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9074 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9075 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9076 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9077 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9078 // CHECK13: cond.true: 9079 // CHECK13-NEXT: br label [[COND_END:%.*]] 9080 // CHECK13: cond.false: 9081 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9082 // CHECK13-NEXT: br label [[COND_END]] 9083 // CHECK13: cond.end: 9084 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9085 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9086 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9087 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9088 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9089 // CHECK13: omp.inner.for.cond: 9090 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9091 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9092 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9093 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9094 // CHECK13: omp.inner.for.body: 9095 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9096 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9097 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9098 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9099 // CHECK13-NEXT: call void @_Z9gtid_testv() 9100 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9101 // CHECK13: omp.body.continue: 9102 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9103 // CHECK13: omp.inner.for.inc: 9104 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9105 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9106 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9107 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9108 // CHECK13: omp.inner.for.end: 9109 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9110 // CHECK13: omp.loop.exit: 9111 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9112 // CHECK13-NEXT: ret void 9113 // 9114 // 9115 // CHECK13-LABEL: define {{[^@]+}}@main 9116 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { 9117 // CHECK13-NEXT: entry: 9118 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9119 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9120 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 9121 // CHECK13-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 9122 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 9123 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 9124 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 9125 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 9126 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 9127 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9128 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9129 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 9130 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9131 // CHECK13: omp_offload.failed: 9132 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 9133 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 9134 // CHECK13: omp_offload.cont: 9135 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9136 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9137 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 9138 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 9139 // CHECK13: omp_offload.failed2: 9140 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 9141 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 9142 // CHECK13: omp_offload.cont3: 9143 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 9144 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 9145 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 9146 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 9147 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9148 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 9149 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 9150 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9151 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 9152 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 9153 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9154 // CHECK13-NEXT: store i8* null, i8** [[TMP10]], align 8 9155 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9156 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9157 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9158 // CHECK13-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9159 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 9160 // CHECK13-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 9161 // CHECK13: omp_offload.failed5: 9162 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 9163 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] 9164 // CHECK13: omp_offload.cont6: 9165 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 9166 // CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 9167 // CHECK13-NEXT: ret i32 [[CALL]] 9168 // 9169 // 9170 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 9171 // CHECK13-SAME: () #[[ATTR1]] { 9172 // CHECK13-NEXT: entry: 9173 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 9174 // CHECK13-NEXT: ret void 9175 // 9176 // 9177 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 9178 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 9179 // CHECK13-NEXT: entry: 9180 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9181 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9182 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9183 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9184 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9185 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9186 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9187 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9188 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9189 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9190 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9191 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9192 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9193 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9194 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9195 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9196 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9197 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9198 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9199 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9200 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9201 // CHECK13: cond.true: 9202 // CHECK13-NEXT: br label [[COND_END:%.*]] 9203 // CHECK13: cond.false: 9204 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9205 // CHECK13-NEXT: br label [[COND_END]] 9206 // CHECK13: cond.end: 9207 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9208 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9209 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9210 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9211 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9212 // CHECK13: omp.inner.for.cond: 9213 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9214 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9215 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9216 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9217 // CHECK13: omp.inner.for.body: 9218 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9219 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9220 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9221 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9222 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9223 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9224 // CHECK13: omp.inner.for.inc: 9225 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9226 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9227 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9228 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9229 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9230 // CHECK13: omp.inner.for.end: 9231 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9232 // CHECK13: omp.loop.exit: 9233 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9234 // CHECK13-NEXT: ret void 9235 // 9236 // 9237 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 9238 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9239 // CHECK13-NEXT: entry: 9240 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9241 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9242 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9243 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9244 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9245 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9246 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9247 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9248 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9249 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9250 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9251 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9252 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9253 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9254 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9255 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9256 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9257 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9258 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9259 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9260 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9261 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9262 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9263 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9264 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9265 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9266 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9267 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9268 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9269 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9270 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9271 // CHECK13: cond.true: 9272 // CHECK13-NEXT: br label [[COND_END:%.*]] 9273 // CHECK13: cond.false: 9274 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9275 // CHECK13-NEXT: br label [[COND_END]] 9276 // CHECK13: cond.end: 9277 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9278 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9279 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9280 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9281 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9282 // CHECK13: omp.inner.for.cond: 9283 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9284 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9285 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9286 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9287 // CHECK13: omp.inner.for.body: 9288 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9289 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9290 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9291 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9292 // CHECK13-NEXT: call void @_Z3fn4v() 9293 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9294 // CHECK13: omp.body.continue: 9295 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9296 // CHECK13: omp.inner.for.inc: 9297 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9298 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9299 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9301 // CHECK13: omp.inner.for.end: 9302 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9303 // CHECK13: omp.loop.exit: 9304 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9305 // CHECK13-NEXT: ret void 9306 // 9307 // 9308 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 9309 // CHECK13-SAME: () #[[ATTR1]] { 9310 // CHECK13-NEXT: entry: 9311 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 9312 // CHECK13-NEXT: ret void 9313 // 9314 // 9315 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 9316 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 9317 // CHECK13-NEXT: entry: 9318 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9319 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9320 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9321 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9322 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9323 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9324 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9325 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9326 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9327 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 9328 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 9329 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9330 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9331 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9332 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9333 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9334 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9335 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9336 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9337 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9338 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9339 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9340 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9341 // CHECK13: cond.true: 9342 // CHECK13-NEXT: br label [[COND_END:%.*]] 9343 // CHECK13: cond.false: 9344 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9345 // CHECK13-NEXT: br label [[COND_END]] 9346 // CHECK13: cond.end: 9347 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9348 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9349 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9350 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9351 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9352 // CHECK13: omp.inner.for.cond: 9353 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9354 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9355 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9356 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9357 // CHECK13: omp.inner.for.body: 9358 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9359 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9360 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9361 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9362 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9363 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9364 // CHECK13-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 9365 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9366 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9367 // CHECK13: omp.inner.for.inc: 9368 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9369 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9370 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9371 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9372 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9373 // CHECK13: omp.inner.for.end: 9374 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9375 // CHECK13: omp.loop.exit: 9376 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9377 // CHECK13-NEXT: ret void 9378 // 9379 // 9380 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 9381 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9382 // CHECK13-NEXT: entry: 9383 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9384 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9385 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9386 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9387 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9388 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9389 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9390 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9391 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9392 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9393 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9394 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9395 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9396 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9397 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9398 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9399 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9400 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9401 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9402 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9403 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9404 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9405 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9406 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9407 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9408 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9409 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9410 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9411 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9412 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9413 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9414 // CHECK13: cond.true: 9415 // CHECK13-NEXT: br label [[COND_END:%.*]] 9416 // CHECK13: cond.false: 9417 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9418 // CHECK13-NEXT: br label [[COND_END]] 9419 // CHECK13: cond.end: 9420 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9421 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9422 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9423 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9424 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9425 // CHECK13: omp.inner.for.cond: 9426 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9427 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9428 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9429 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9430 // CHECK13: omp.inner.for.body: 9431 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9432 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9433 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9434 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9435 // CHECK13-NEXT: call void @_Z3fn5v() 9436 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9437 // CHECK13: omp.body.continue: 9438 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9439 // CHECK13: omp.inner.for.inc: 9440 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9441 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9442 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9443 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9444 // CHECK13: omp.inner.for.end: 9445 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9446 // CHECK13: omp.loop.exit: 9447 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9448 // CHECK13-NEXT: ret void 9449 // 9450 // 9451 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 9452 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 9453 // CHECK13-NEXT: entry: 9454 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 9455 // CHECK13-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 9456 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 9457 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 9458 // CHECK13-NEXT: ret void 9459 // 9460 // 9461 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 9462 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 9463 // CHECK13-NEXT: entry: 9464 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9465 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9466 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 9467 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9468 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9469 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9470 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9471 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9472 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9473 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9474 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 9475 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 9476 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9477 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9478 // CHECK13-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 9479 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 9480 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9481 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9482 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9483 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9484 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9485 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9486 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9487 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9488 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 9489 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9490 // CHECK13: cond.true: 9491 // CHECK13-NEXT: br label [[COND_END:%.*]] 9492 // CHECK13: cond.false: 9493 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9494 // CHECK13-NEXT: br label [[COND_END]] 9495 // CHECK13: cond.end: 9496 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9497 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9498 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9499 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9500 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9501 // CHECK13: omp.inner.for.cond: 9502 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9503 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9504 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9505 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9506 // CHECK13: omp.inner.for.body: 9507 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9508 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9509 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9510 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9511 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 9512 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 9513 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 9514 // CHECK13: omp_if.then: 9515 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 9516 // CHECK13-NEXT: br label [[OMP_IF_END:%.*]] 9517 // CHECK13: omp_if.else: 9518 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 9519 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9520 // CHECK13-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 9521 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 9522 // CHECK13-NEXT: br label [[OMP_IF_END]] 9523 // CHECK13: omp_if.end: 9524 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9525 // CHECK13: omp.inner.for.inc: 9526 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9527 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9528 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9529 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9530 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9531 // CHECK13: omp.inner.for.end: 9532 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9533 // CHECK13: omp.loop.exit: 9534 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9535 // CHECK13-NEXT: ret void 9536 // 9537 // 9538 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 9539 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9540 // CHECK13-NEXT: entry: 9541 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9542 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9543 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9544 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9545 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9546 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9547 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9548 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9549 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9550 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9551 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9552 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9553 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9554 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9555 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9556 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9557 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9558 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9559 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9560 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9561 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9562 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9563 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9564 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9565 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9566 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9567 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9568 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9569 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9570 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9571 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9572 // CHECK13: cond.true: 9573 // CHECK13-NEXT: br label [[COND_END:%.*]] 9574 // CHECK13: cond.false: 9575 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9576 // CHECK13-NEXT: br label [[COND_END]] 9577 // CHECK13: cond.end: 9578 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9579 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9580 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9581 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9582 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9583 // CHECK13: omp.inner.for.cond: 9584 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9585 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9586 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9587 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9588 // CHECK13: omp.inner.for.body: 9589 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9590 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9591 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9592 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9593 // CHECK13-NEXT: call void @_Z3fn6v() 9594 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9595 // CHECK13: omp.body.continue: 9596 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9597 // CHECK13: omp.inner.for.inc: 9598 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9599 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9600 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9601 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9602 // CHECK13: omp.inner.for.end: 9603 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9604 // CHECK13: omp.loop.exit: 9605 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9606 // CHECK13-NEXT: ret void 9607 // 9608 // 9609 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 9610 // CHECK13-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 9611 // CHECK13-NEXT: entry: 9612 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 9613 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9614 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 9615 // CHECK13-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 9616 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 9617 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 9618 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 9619 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 9620 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 9621 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9622 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9623 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 9624 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9625 // CHECK13: omp_offload.failed: 9626 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 9627 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 9628 // CHECK13: omp_offload.cont: 9629 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9630 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 9631 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 9632 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 9633 // CHECK13: omp_offload.failed2: 9634 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 9635 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 9636 // CHECK13: omp_offload.cont3: 9637 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 9638 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 9639 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 9640 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 9641 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9642 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 9643 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 9644 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9645 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 9646 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 9647 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9648 // CHECK13-NEXT: store i8* null, i8** [[TMP10]], align 8 9649 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9650 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9651 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 9652 // CHECK13-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9653 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 9654 // CHECK13-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 9655 // CHECK13: omp_offload.failed5: 9656 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 9657 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] 9658 // CHECK13: omp_offload.cont6: 9659 // CHECK13-NEXT: ret i32 0 9660 // 9661 // 9662 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 9663 // CHECK13-SAME: () #[[ATTR1]] { 9664 // CHECK13-NEXT: entry: 9665 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 9666 // CHECK13-NEXT: ret void 9667 // 9668 // 9669 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 9670 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 9671 // CHECK13-NEXT: entry: 9672 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9673 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9674 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9675 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9676 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9677 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9678 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9679 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9680 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9681 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9682 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9683 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9684 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9685 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9686 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9687 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9688 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9689 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9690 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9691 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9692 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9693 // CHECK13: cond.true: 9694 // CHECK13-NEXT: br label [[COND_END:%.*]] 9695 // CHECK13: cond.false: 9696 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9697 // CHECK13-NEXT: br label [[COND_END]] 9698 // CHECK13: cond.end: 9699 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9700 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9701 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9702 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9703 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9704 // CHECK13: omp.inner.for.cond: 9705 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9706 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9707 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9708 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9709 // CHECK13: omp.inner.for.body: 9710 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9711 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9712 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9713 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9714 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 9715 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9716 // CHECK13: omp.inner.for.inc: 9717 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9718 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9719 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 9720 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9721 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9722 // CHECK13: omp.inner.for.end: 9723 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9724 // CHECK13: omp.loop.exit: 9725 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9726 // CHECK13-NEXT: ret void 9727 // 9728 // 9729 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 9730 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9731 // CHECK13-NEXT: entry: 9732 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9733 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9734 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9735 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9736 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9737 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9738 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9739 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9740 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9741 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9742 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9743 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9744 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9745 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9746 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9747 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9748 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9749 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9750 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9751 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9752 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9753 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9754 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9755 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9756 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9757 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9758 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9759 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9760 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9761 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9762 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9763 // CHECK13: cond.true: 9764 // CHECK13-NEXT: br label [[COND_END:%.*]] 9765 // CHECK13: cond.false: 9766 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9767 // CHECK13-NEXT: br label [[COND_END]] 9768 // CHECK13: cond.end: 9769 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9770 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9771 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9772 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9773 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9774 // CHECK13: omp.inner.for.cond: 9775 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9776 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9777 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9778 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9779 // CHECK13: omp.inner.for.body: 9780 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9781 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9782 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9783 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9784 // CHECK13-NEXT: call void @_Z3fn1v() 9785 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9786 // CHECK13: omp.body.continue: 9787 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9788 // CHECK13: omp.inner.for.inc: 9789 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9790 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9791 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9792 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9793 // CHECK13: omp.inner.for.end: 9794 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9795 // CHECK13: omp.loop.exit: 9796 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9797 // CHECK13-NEXT: ret void 9798 // 9799 // 9800 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 9801 // CHECK13-SAME: () #[[ATTR1]] { 9802 // CHECK13-NEXT: entry: 9803 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 9804 // CHECK13-NEXT: ret void 9805 // 9806 // 9807 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12 9808 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 9809 // CHECK13-NEXT: entry: 9810 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9811 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9812 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9813 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9814 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9815 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9816 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9817 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9818 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9819 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 9820 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 9821 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9822 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9823 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9824 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9825 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9826 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9827 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9828 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 9829 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9830 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9831 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 9832 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9833 // CHECK13: cond.true: 9834 // CHECK13-NEXT: br label [[COND_END:%.*]] 9835 // CHECK13: cond.false: 9836 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9837 // CHECK13-NEXT: br label [[COND_END]] 9838 // CHECK13: cond.end: 9839 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 9840 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9841 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9842 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 9843 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9844 // CHECK13: omp.inner.for.cond: 9845 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9846 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9847 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 9848 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9849 // CHECK13: omp.inner.for.body: 9850 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9851 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 9852 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9853 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 9854 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9855 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9856 // CHECK13-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 9857 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 9858 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9859 // CHECK13: omp.inner.for.inc: 9860 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9861 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9862 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9863 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9864 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9865 // CHECK13: omp.inner.for.end: 9866 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9867 // CHECK13: omp.loop.exit: 9868 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 9869 // CHECK13-NEXT: ret void 9870 // 9871 // 9872 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..13 9873 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 9874 // CHECK13-NEXT: entry: 9875 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9876 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9877 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9878 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9879 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9880 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9881 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9882 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9883 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9884 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9885 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9886 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9887 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9888 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9889 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9890 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9891 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 9892 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9893 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 9894 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9895 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9896 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9897 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9898 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9899 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9900 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9901 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 9902 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9903 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9904 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 9905 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9906 // CHECK13: cond.true: 9907 // CHECK13-NEXT: br label [[COND_END:%.*]] 9908 // CHECK13: cond.false: 9909 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9910 // CHECK13-NEXT: br label [[COND_END]] 9911 // CHECK13: cond.end: 9912 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 9913 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9914 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9915 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 9916 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9917 // CHECK13: omp.inner.for.cond: 9918 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9919 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9920 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 9921 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9922 // CHECK13: omp.inner.for.body: 9923 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9924 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 9925 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9926 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9927 // CHECK13-NEXT: call void @_Z3fn2v() 9928 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9929 // CHECK13: omp.body.continue: 9930 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9931 // CHECK13: omp.inner.for.inc: 9932 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9933 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 9934 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9935 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9936 // CHECK13: omp.inner.for.end: 9937 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9938 // CHECK13: omp.loop.exit: 9939 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 9940 // CHECK13-NEXT: ret void 9941 // 9942 // 9943 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 9944 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 9945 // CHECK13-NEXT: entry: 9946 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 9947 // CHECK13-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 9948 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 9949 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 9950 // CHECK13-NEXT: ret void 9951 // 9952 // 9953 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14 9954 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 9955 // CHECK13-NEXT: entry: 9956 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9957 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9958 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 9959 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9960 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9961 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9962 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9963 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9964 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9965 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9966 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 9967 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 9968 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9969 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9970 // CHECK13-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 9971 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 9972 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9973 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 9974 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9975 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9976 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9977 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9978 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9979 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9980 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 9981 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9982 // CHECK13: cond.true: 9983 // CHECK13-NEXT: br label [[COND_END:%.*]] 9984 // CHECK13: cond.false: 9985 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9986 // CHECK13-NEXT: br label [[COND_END]] 9987 // CHECK13: cond.end: 9988 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9989 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9990 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9991 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9992 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9993 // CHECK13: omp.inner.for.cond: 9994 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9995 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9996 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9997 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9998 // CHECK13: omp.inner.for.body: 9999 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10000 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10001 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10002 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10003 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 10004 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 10005 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10006 // CHECK13: omp_if.then: 10007 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 10008 // CHECK13-NEXT: br label [[OMP_IF_END:%.*]] 10009 // CHECK13: omp_if.else: 10010 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 10011 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10012 // CHECK13-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 10013 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 10014 // CHECK13-NEXT: br label [[OMP_IF_END]] 10015 // CHECK13: omp_if.end: 10016 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10017 // CHECK13: omp.inner.for.inc: 10018 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10019 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10020 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 10021 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10022 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 10023 // CHECK13: omp.inner.for.end: 10024 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10025 // CHECK13: omp.loop.exit: 10026 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10027 // CHECK13-NEXT: ret void 10028 // 10029 // 10030 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15 10031 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10032 // CHECK13-NEXT: entry: 10033 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10034 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10035 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10036 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10037 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10038 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 10039 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10040 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10041 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10042 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10043 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 10044 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10045 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10046 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10047 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10048 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10049 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10050 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10051 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10052 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10053 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10054 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10055 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10056 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10057 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10058 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10059 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10060 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10061 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10062 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10063 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10064 // CHECK13: cond.true: 10065 // CHECK13-NEXT: br label [[COND_END:%.*]] 10066 // CHECK13: cond.false: 10067 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10068 // CHECK13-NEXT: br label [[COND_END]] 10069 // CHECK13: cond.end: 10070 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10071 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10072 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10073 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10074 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10075 // CHECK13: omp.inner.for.cond: 10076 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10077 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10078 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10079 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10080 // CHECK13: omp.inner.for.body: 10081 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10082 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10083 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10084 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10085 // CHECK13-NEXT: call void @_Z3fn3v() 10086 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10087 // CHECK13: omp.body.continue: 10088 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10089 // CHECK13: omp.inner.for.inc: 10090 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10091 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10092 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10093 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 10094 // CHECK13: omp.inner.for.end: 10095 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10096 // CHECK13: omp.loop.exit: 10097 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10098 // CHECK13-NEXT: ret void 10099 // 10100 // 10101 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 10102 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] { 10103 // CHECK13-NEXT: entry: 10104 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 10105 // CHECK13-NEXT: ret void 10106 // 10107 // 10108 // CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv 10109 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { 10110 // CHECK14-NEXT: entry: 10111 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10112 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 10113 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 10114 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10115 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 10116 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10117 // CHECK14: omp_offload.failed: 10118 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 10119 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 10120 // CHECK14: omp_offload.cont: 10121 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10122 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10123 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 10124 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 10125 // CHECK14: omp_offload.failed2: 10126 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 10127 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 10128 // CHECK14: omp_offload.cont3: 10129 // CHECK14-NEXT: ret void 10130 // 10131 // 10132 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 10133 // CHECK14-SAME: () #[[ATTR1:[0-9]+]] { 10134 // CHECK14-NEXT: entry: 10135 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 10136 // CHECK14-NEXT: ret void 10137 // 10138 // 10139 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 10140 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 10141 // CHECK14-NEXT: entry: 10142 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10143 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10144 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10145 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10146 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10147 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10148 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10149 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10150 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10151 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10152 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10153 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10154 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10155 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10156 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10157 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10158 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10159 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10160 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10161 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10162 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10163 // CHECK14: cond.true: 10164 // CHECK14-NEXT: br label [[COND_END:%.*]] 10165 // CHECK14: cond.false: 10166 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10167 // CHECK14-NEXT: br label [[COND_END]] 10168 // CHECK14: cond.end: 10169 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10170 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10171 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10172 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10173 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10174 // CHECK14: omp.inner.for.cond: 10175 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10176 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10177 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10178 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10179 // CHECK14: omp.inner.for.body: 10180 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10181 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10182 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10183 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10184 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 10185 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10186 // CHECK14: omp.inner.for.inc: 10187 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10188 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10189 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 10190 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10191 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10192 // CHECK14: omp.inner.for.end: 10193 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10194 // CHECK14: omp.loop.exit: 10195 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10196 // CHECK14-NEXT: ret void 10197 // 10198 // 10199 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 10200 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10201 // CHECK14-NEXT: entry: 10202 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10203 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10204 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10205 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10206 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10207 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10208 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10209 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10210 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10211 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10212 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10213 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10214 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10215 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10216 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10217 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10218 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10219 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10220 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10221 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10222 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10223 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10224 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10225 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10226 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10227 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10228 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10229 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10230 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10231 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10232 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10233 // CHECK14: cond.true: 10234 // CHECK14-NEXT: br label [[COND_END:%.*]] 10235 // CHECK14: cond.false: 10236 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10237 // CHECK14-NEXT: br label [[COND_END]] 10238 // CHECK14: cond.end: 10239 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10240 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10241 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10242 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10243 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10244 // CHECK14: omp.inner.for.cond: 10245 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10246 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10247 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10248 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10249 // CHECK14: omp.inner.for.body: 10250 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10251 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10252 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10253 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10254 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10255 // CHECK14: omp.body.continue: 10256 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10257 // CHECK14: omp.inner.for.inc: 10258 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10259 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10260 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10261 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10262 // CHECK14: omp.inner.for.end: 10263 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10264 // CHECK14: omp.loop.exit: 10265 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10266 // CHECK14-NEXT: ret void 10267 // 10268 // 10269 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 10270 // CHECK14-SAME: () #[[ATTR1]] { 10271 // CHECK14-NEXT: entry: 10272 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 10273 // CHECK14-NEXT: ret void 10274 // 10275 // 10276 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 10277 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 10278 // CHECK14-NEXT: entry: 10279 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10280 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10281 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10282 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10283 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10284 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10285 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10286 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10287 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10288 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 10289 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 10290 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10291 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10292 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10293 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10294 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10295 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10296 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10297 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10298 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10299 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10300 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10301 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10302 // CHECK14: cond.true: 10303 // CHECK14-NEXT: br label [[COND_END:%.*]] 10304 // CHECK14: cond.false: 10305 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10306 // CHECK14-NEXT: br label [[COND_END]] 10307 // CHECK14: cond.end: 10308 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10309 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10310 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10311 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10312 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10313 // CHECK14: omp.inner.for.cond: 10314 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10315 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10316 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10317 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10318 // CHECK14: omp.inner.for.body: 10319 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10320 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10321 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10322 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10323 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 10324 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10325 // CHECK14-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 10326 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 10327 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10328 // CHECK14: omp.inner.for.inc: 10329 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10330 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10331 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10332 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10333 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10334 // CHECK14: omp.inner.for.end: 10335 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10336 // CHECK14: omp.loop.exit: 10337 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10338 // CHECK14-NEXT: ret void 10339 // 10340 // 10341 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 10342 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10343 // CHECK14-NEXT: entry: 10344 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10345 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10346 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10347 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10348 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10349 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10350 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10351 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10352 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10353 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10354 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10355 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10356 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10357 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10358 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10359 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10360 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10361 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10362 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10363 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10364 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10365 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10366 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10367 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10368 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10369 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10370 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10371 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10372 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10373 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10374 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10375 // CHECK14: cond.true: 10376 // CHECK14-NEXT: br label [[COND_END:%.*]] 10377 // CHECK14: cond.false: 10378 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10379 // CHECK14-NEXT: br label [[COND_END]] 10380 // CHECK14: cond.end: 10381 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10382 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10383 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10384 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10385 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10386 // CHECK14: omp.inner.for.cond: 10387 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10388 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10389 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10390 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10391 // CHECK14: omp.inner.for.body: 10392 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10393 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10394 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10395 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10396 // CHECK14-NEXT: call void @_Z9gtid_testv() 10397 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10398 // CHECK14: omp.body.continue: 10399 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10400 // CHECK14: omp.inner.for.inc: 10401 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10402 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10403 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10404 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10405 // CHECK14: omp.inner.for.end: 10406 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10407 // CHECK14: omp.loop.exit: 10408 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10409 // CHECK14-NEXT: ret void 10410 // 10411 // 10412 // CHECK14-LABEL: define {{[^@]+}}@main 10413 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] { 10414 // CHECK14-NEXT: entry: 10415 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 10416 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10417 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 10418 // CHECK14-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 10419 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 10420 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 10421 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 10422 // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 10423 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 10424 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10425 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10426 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 10427 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10428 // CHECK14: omp_offload.failed: 10429 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 10430 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 10431 // CHECK14: omp_offload.cont: 10432 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10433 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10434 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 10435 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 10436 // CHECK14: omp_offload.failed2: 10437 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 10438 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 10439 // CHECK14: omp_offload.cont3: 10440 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4 10441 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 10442 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 10443 // CHECK14-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 10444 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10445 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 10446 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 10447 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10448 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 10449 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 10450 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10451 // CHECK14-NEXT: store i8* null, i8** [[TMP10]], align 8 10452 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10453 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10454 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10455 // CHECK14-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10456 // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 10457 // CHECK14-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 10458 // CHECK14: omp_offload.failed5: 10459 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP5]]) #[[ATTR2]] 10460 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]] 10461 // CHECK14: omp_offload.cont6: 10462 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4 10463 // CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP15]]) 10464 // CHECK14-NEXT: ret i32 [[CALL]] 10465 // 10466 // 10467 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 10468 // CHECK14-SAME: () #[[ATTR1]] { 10469 // CHECK14-NEXT: entry: 10470 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 10471 // CHECK14-NEXT: ret void 10472 // 10473 // 10474 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4 10475 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 10476 // CHECK14-NEXT: entry: 10477 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10478 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10479 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10480 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10481 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10482 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10483 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10484 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10485 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10486 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10487 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10488 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10489 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10490 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10491 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10492 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10493 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10494 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10495 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10496 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10497 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10498 // CHECK14: cond.true: 10499 // CHECK14-NEXT: br label [[COND_END:%.*]] 10500 // CHECK14: cond.false: 10501 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10502 // CHECK14-NEXT: br label [[COND_END]] 10503 // CHECK14: cond.end: 10504 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10505 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10506 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10507 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10508 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10509 // CHECK14: omp.inner.for.cond: 10510 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10511 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10512 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10513 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10514 // CHECK14: omp.inner.for.body: 10515 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10516 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10517 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10518 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10519 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 10520 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10521 // CHECK14: omp.inner.for.inc: 10522 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10523 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10524 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 10525 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10526 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10527 // CHECK14: omp.inner.for.end: 10528 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10529 // CHECK14: omp.loop.exit: 10530 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10531 // CHECK14-NEXT: ret void 10532 // 10533 // 10534 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5 10535 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10536 // CHECK14-NEXT: entry: 10537 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10538 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10539 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10540 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10541 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10542 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10543 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10544 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10545 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10546 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10547 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10548 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10549 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10550 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10551 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10552 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10553 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10554 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10555 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10556 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10557 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10558 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10559 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10560 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10561 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10562 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10563 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10564 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10565 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10566 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10567 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10568 // CHECK14: cond.true: 10569 // CHECK14-NEXT: br label [[COND_END:%.*]] 10570 // CHECK14: cond.false: 10571 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10572 // CHECK14-NEXT: br label [[COND_END]] 10573 // CHECK14: cond.end: 10574 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10575 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10576 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10577 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10578 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10579 // CHECK14: omp.inner.for.cond: 10580 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10581 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10582 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10583 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10584 // CHECK14: omp.inner.for.body: 10585 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10586 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10587 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10588 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10589 // CHECK14-NEXT: call void @_Z3fn4v() 10590 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10591 // CHECK14: omp.body.continue: 10592 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10593 // CHECK14: omp.inner.for.inc: 10594 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10595 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10596 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10597 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10598 // CHECK14: omp.inner.for.end: 10599 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10600 // CHECK14: omp.loop.exit: 10601 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10602 // CHECK14-NEXT: ret void 10603 // 10604 // 10605 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 10606 // CHECK14-SAME: () #[[ATTR1]] { 10607 // CHECK14-NEXT: entry: 10608 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 10609 // CHECK14-NEXT: ret void 10610 // 10611 // 10612 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 10613 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 10614 // CHECK14-NEXT: entry: 10615 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10616 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10617 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10618 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10619 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10620 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10621 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10622 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10623 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10624 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 10625 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 10626 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10627 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10628 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10629 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10630 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10631 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10632 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10633 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10634 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10635 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10636 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10637 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10638 // CHECK14: cond.true: 10639 // CHECK14-NEXT: br label [[COND_END:%.*]] 10640 // CHECK14: cond.false: 10641 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10642 // CHECK14-NEXT: br label [[COND_END]] 10643 // CHECK14: cond.end: 10644 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10645 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10646 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10647 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 10648 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10649 // CHECK14: omp.inner.for.cond: 10650 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10651 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10652 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 10653 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10654 // CHECK14: omp.inner.for.body: 10655 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10656 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 10657 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10658 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 10659 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 10660 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10661 // CHECK14-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 10662 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 10663 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10664 // CHECK14: omp.inner.for.inc: 10665 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10666 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10667 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10668 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10669 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10670 // CHECK14: omp.inner.for.end: 10671 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10672 // CHECK14: omp.loop.exit: 10673 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 10674 // CHECK14-NEXT: ret void 10675 // 10676 // 10677 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7 10678 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10679 // CHECK14-NEXT: entry: 10680 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10681 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10682 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10683 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10684 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10685 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10686 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10687 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10688 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10689 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10690 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10691 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10692 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10693 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10694 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10695 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10696 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10697 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10698 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10699 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10700 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10701 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10702 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10703 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10704 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10705 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10706 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10707 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10708 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10709 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10710 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10711 // CHECK14: cond.true: 10712 // CHECK14-NEXT: br label [[COND_END:%.*]] 10713 // CHECK14: cond.false: 10714 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10715 // CHECK14-NEXT: br label [[COND_END]] 10716 // CHECK14: cond.end: 10717 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10718 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10719 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10720 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10721 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10722 // CHECK14: omp.inner.for.cond: 10723 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10724 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10725 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10726 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10727 // CHECK14: omp.inner.for.body: 10728 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10729 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10730 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10731 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10732 // CHECK14-NEXT: call void @_Z3fn5v() 10733 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10734 // CHECK14: omp.body.continue: 10735 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10736 // CHECK14: omp.inner.for.inc: 10737 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10738 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10739 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10740 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10741 // CHECK14: omp.inner.for.end: 10742 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10743 // CHECK14: omp.loop.exit: 10744 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10745 // CHECK14-NEXT: ret void 10746 // 10747 // 10748 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 10749 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 10750 // CHECK14-NEXT: entry: 10751 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 10752 // CHECK14-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 10753 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 10754 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 10755 // CHECK14-NEXT: ret void 10756 // 10757 // 10758 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8 10759 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 10760 // CHECK14-NEXT: entry: 10761 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10762 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10763 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 10764 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10765 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10766 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10767 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10768 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10769 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10770 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10771 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 10772 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 10773 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10774 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10775 // CHECK14-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 10776 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 10777 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10778 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10779 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10780 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10781 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10782 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10783 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10784 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10785 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 10786 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10787 // CHECK14: cond.true: 10788 // CHECK14-NEXT: br label [[COND_END:%.*]] 10789 // CHECK14: cond.false: 10790 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10791 // CHECK14-NEXT: br label [[COND_END]] 10792 // CHECK14: cond.end: 10793 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10794 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10795 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10796 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10797 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10798 // CHECK14: omp.inner.for.cond: 10799 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10800 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10801 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10802 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10803 // CHECK14: omp.inner.for.body: 10804 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10805 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10806 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10807 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10808 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 10809 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 10810 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 10811 // CHECK14: omp_if.then: 10812 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 10813 // CHECK14-NEXT: br label [[OMP_IF_END:%.*]] 10814 // CHECK14: omp_if.else: 10815 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 10816 // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10817 // CHECK14-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 10818 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 10819 // CHECK14-NEXT: br label [[OMP_IF_END]] 10820 // CHECK14: omp_if.end: 10821 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10822 // CHECK14: omp.inner.for.inc: 10823 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10824 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10825 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 10826 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10827 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10828 // CHECK14: omp.inner.for.end: 10829 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10830 // CHECK14: omp.loop.exit: 10831 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10832 // CHECK14-NEXT: ret void 10833 // 10834 // 10835 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9 10836 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 10837 // CHECK14-NEXT: entry: 10838 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10839 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10840 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10841 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10842 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10843 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10844 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10845 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10846 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10847 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10848 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10849 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10850 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10851 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10852 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10853 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10854 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 10855 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10856 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 10857 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10858 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10859 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10860 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10861 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10862 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10863 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10864 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 10865 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10866 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10867 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 10868 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10869 // CHECK14: cond.true: 10870 // CHECK14-NEXT: br label [[COND_END:%.*]] 10871 // CHECK14: cond.false: 10872 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10873 // CHECK14-NEXT: br label [[COND_END]] 10874 // CHECK14: cond.end: 10875 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 10876 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10877 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10878 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 10879 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10880 // CHECK14: omp.inner.for.cond: 10881 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10882 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10883 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 10884 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10885 // CHECK14: omp.inner.for.body: 10886 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10887 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 10888 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10889 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10890 // CHECK14-NEXT: call void @_Z3fn6v() 10891 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10892 // CHECK14: omp.body.continue: 10893 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10894 // CHECK14: omp.inner.for.inc: 10895 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10896 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 10897 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10898 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10899 // CHECK14: omp.inner.for.end: 10900 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10901 // CHECK14: omp.loop.exit: 10902 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 10903 // CHECK14-NEXT: ret void 10904 // 10905 // 10906 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 10907 // CHECK14-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 10908 // CHECK14-NEXT: entry: 10909 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 10910 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10911 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 10912 // CHECK14-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 10913 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 10914 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 10915 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 10916 // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 10917 // CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 10918 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10919 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10920 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 10921 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10922 // CHECK14: omp_offload.failed: 10923 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 10924 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 10925 // CHECK14: omp_offload.cont: 10926 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10927 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 10928 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 10929 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 10930 // CHECK14: omp_offload.failed2: 10931 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 10932 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]] 10933 // CHECK14: omp_offload.cont3: 10934 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 10935 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 10936 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4 10937 // CHECK14-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 10938 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10939 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 10940 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8 10941 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10942 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 10943 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8 10944 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10945 // CHECK14-NEXT: store i8* null, i8** [[TMP10]], align 8 10946 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10947 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10948 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 10949 // CHECK14-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10950 // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 10951 // CHECK14-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 10952 // CHECK14: omp_offload.failed5: 10953 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP5]]) #[[ATTR2]] 10954 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]] 10955 // CHECK14: omp_offload.cont6: 10956 // CHECK14-NEXT: ret i32 0 10957 // 10958 // 10959 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 10960 // CHECK14-SAME: () #[[ATTR1]] { 10961 // CHECK14-NEXT: entry: 10962 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 10963 // CHECK14-NEXT: ret void 10964 // 10965 // 10966 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10 10967 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 10968 // CHECK14-NEXT: entry: 10969 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10970 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10971 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10972 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10973 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10974 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10975 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10976 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10977 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10978 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10979 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10980 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10981 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 10982 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10983 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10984 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10985 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 10986 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10987 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10988 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 10989 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10990 // CHECK14: cond.true: 10991 // CHECK14-NEXT: br label [[COND_END:%.*]] 10992 // CHECK14: cond.false: 10993 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10994 // CHECK14-NEXT: br label [[COND_END]] 10995 // CHECK14: cond.end: 10996 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 10997 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10998 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10999 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 11000 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11001 // CHECK14: omp.inner.for.cond: 11002 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11003 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11004 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 11005 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11006 // CHECK14: omp.inner.for.body: 11007 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11008 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 11009 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11010 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 11011 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 11012 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11013 // CHECK14: omp.inner.for.inc: 11014 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11015 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11016 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 11017 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11018 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11019 // CHECK14: omp.inner.for.end: 11020 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11021 // CHECK14: omp.loop.exit: 11022 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 11023 // CHECK14-NEXT: ret void 11024 // 11025 // 11026 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 11027 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 11028 // CHECK14-NEXT: entry: 11029 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11030 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11031 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11032 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11033 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11034 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11035 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11036 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11037 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11038 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11039 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11040 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11041 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11042 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11043 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11044 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11045 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 11046 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11047 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 11048 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11049 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11050 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11051 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11052 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11053 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11054 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11055 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 11056 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11057 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11058 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 11059 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11060 // CHECK14: cond.true: 11061 // CHECK14-NEXT: br label [[COND_END:%.*]] 11062 // CHECK14: cond.false: 11063 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11064 // CHECK14-NEXT: br label [[COND_END]] 11065 // CHECK14: cond.end: 11066 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 11067 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11068 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11069 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 11070 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11071 // CHECK14: omp.inner.for.cond: 11072 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11073 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11074 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 11075 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11076 // CHECK14: omp.inner.for.body: 11077 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11078 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 11079 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11080 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11081 // CHECK14-NEXT: call void @_Z3fn1v() 11082 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11083 // CHECK14: omp.body.continue: 11084 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11085 // CHECK14: omp.inner.for.inc: 11086 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11087 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 11088 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11089 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11090 // CHECK14: omp.inner.for.end: 11091 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11092 // CHECK14: omp.loop.exit: 11093 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 11094 // CHECK14-NEXT: ret void 11095 // 11096 // 11097 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 11098 // CHECK14-SAME: () #[[ATTR1]] { 11099 // CHECK14-NEXT: entry: 11100 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 11101 // CHECK14-NEXT: ret void 11102 // 11103 // 11104 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12 11105 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 11106 // CHECK14-NEXT: entry: 11107 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11108 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11109 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11110 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11111 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11112 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11113 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11114 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11115 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11116 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 11117 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 11118 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11119 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11120 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11121 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 11122 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11123 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11124 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11125 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 11126 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11127 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11128 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 11129 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11130 // CHECK14: cond.true: 11131 // CHECK14-NEXT: br label [[COND_END:%.*]] 11132 // CHECK14: cond.false: 11133 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11134 // CHECK14-NEXT: br label [[COND_END]] 11135 // CHECK14: cond.end: 11136 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 11137 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11138 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11139 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 11140 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11141 // CHECK14: omp.inner.for.cond: 11142 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11143 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11144 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 11145 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11146 // CHECK14: omp.inner.for.body: 11147 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11148 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 11149 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11150 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 11151 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 11152 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11153 // CHECK14-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 11154 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 11155 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11156 // CHECK14: omp.inner.for.inc: 11157 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11158 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11159 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11160 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11161 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11162 // CHECK14: omp.inner.for.end: 11163 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11164 // CHECK14: omp.loop.exit: 11165 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 11166 // CHECK14-NEXT: ret void 11167 // 11168 // 11169 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..13 11170 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 11171 // CHECK14-NEXT: entry: 11172 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11173 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11174 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11175 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11176 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11177 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11178 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11179 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11180 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11181 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11182 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11183 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11184 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11185 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11186 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11187 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11188 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 11189 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11190 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 11191 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11192 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11193 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11194 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11195 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11196 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11197 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11198 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 11199 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11200 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11201 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 11202 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11203 // CHECK14: cond.true: 11204 // CHECK14-NEXT: br label [[COND_END:%.*]] 11205 // CHECK14: cond.false: 11206 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11207 // CHECK14-NEXT: br label [[COND_END]] 11208 // CHECK14: cond.end: 11209 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 11210 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11211 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11212 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 11213 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11214 // CHECK14: omp.inner.for.cond: 11215 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11216 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11217 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 11218 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11219 // CHECK14: omp.inner.for.body: 11220 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11221 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 11222 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11223 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11224 // CHECK14-NEXT: call void @_Z3fn2v() 11225 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11226 // CHECK14: omp.body.continue: 11227 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11228 // CHECK14: omp.inner.for.inc: 11229 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11230 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 11231 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11232 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11233 // CHECK14: omp.inner.for.end: 11234 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11235 // CHECK14: omp.loop.exit: 11236 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 11237 // CHECK14-NEXT: ret void 11238 // 11239 // 11240 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 11241 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] { 11242 // CHECK14-NEXT: entry: 11243 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 11244 // CHECK14-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 11245 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 11246 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 11247 // CHECK14-NEXT: ret void 11248 // 11249 // 11250 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14 11251 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 11252 // CHECK14-NEXT: entry: 11253 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11254 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11255 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 11256 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11257 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11258 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11259 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11260 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11261 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11262 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11263 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 11264 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 11265 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11266 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11267 // CHECK14-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 11268 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 11269 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11270 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 11271 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11272 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11273 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11274 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11275 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11276 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11277 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 11278 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11279 // CHECK14: cond.true: 11280 // CHECK14-NEXT: br label [[COND_END:%.*]] 11281 // CHECK14: cond.false: 11282 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11283 // CHECK14-NEXT: br label [[COND_END]] 11284 // CHECK14: cond.end: 11285 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11286 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11287 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11288 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11289 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11290 // CHECK14: omp.inner.for.cond: 11291 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11292 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11293 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11294 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11295 // CHECK14: omp.inner.for.body: 11296 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11297 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11298 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11299 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11300 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 11301 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 11302 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 11303 // CHECK14: omp_if.then: 11304 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 11305 // CHECK14-NEXT: br label [[OMP_IF_END:%.*]] 11306 // CHECK14: omp_if.else: 11307 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 11308 // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11309 // CHECK14-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 11310 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 11311 // CHECK14-NEXT: br label [[OMP_IF_END]] 11312 // CHECK14: omp_if.end: 11313 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11314 // CHECK14: omp.inner.for.inc: 11315 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11316 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11317 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 11318 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11319 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11320 // CHECK14: omp.inner.for.end: 11321 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11322 // CHECK14: omp.loop.exit: 11323 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11324 // CHECK14-NEXT: ret void 11325 // 11326 // 11327 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15 11328 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 11329 // CHECK14-NEXT: entry: 11330 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11331 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11332 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11333 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11334 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11335 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11336 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11337 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11338 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11339 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11340 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11341 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11342 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11343 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11344 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11345 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11346 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 11347 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11348 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 11349 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11350 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11351 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11352 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11353 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11354 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11355 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11356 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 11357 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11358 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11359 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 11360 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11361 // CHECK14: cond.true: 11362 // CHECK14-NEXT: br label [[COND_END:%.*]] 11363 // CHECK14: cond.false: 11364 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11365 // CHECK14-NEXT: br label [[COND_END]] 11366 // CHECK14: cond.end: 11367 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 11368 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11369 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11370 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 11371 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11372 // CHECK14: omp.inner.for.cond: 11373 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11374 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11375 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 11376 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11377 // CHECK14: omp.inner.for.body: 11378 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11379 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 11380 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11381 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11382 // CHECK14-NEXT: call void @_Z3fn3v() 11383 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11384 // CHECK14: omp.body.continue: 11385 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11386 // CHECK14: omp.inner.for.inc: 11387 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11388 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 11389 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11390 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11391 // CHECK14: omp.inner.for.end: 11392 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11393 // CHECK14: omp.loop.exit: 11394 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 11395 // CHECK14-NEXT: ret void 11396 // 11397 // 11398 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 11399 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] { 11400 // CHECK14-NEXT: entry: 11401 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) 11402 // CHECK14-NEXT: ret void 11403 // 11404 // 11405 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv 11406 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 11407 // CHECK15-NEXT: entry: 11408 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 11409 // CHECK15-NEXT: [[I1:%.*]] = alloca i32, align 4 11410 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 11411 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 11412 // CHECK15: for.cond: 11413 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11414 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11415 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11416 // CHECK15: for.body: 11417 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 11418 // CHECK15: for.inc: 11419 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11420 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11421 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 11422 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 11423 // CHECK15: for.end: 11424 // CHECK15-NEXT: store i32 0, i32* [[I1]], align 4 11425 // CHECK15-NEXT: br label [[FOR_COND2:%.*]] 11426 // CHECK15: for.cond2: 11427 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11428 // CHECK15-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11429 // CHECK15-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11430 // CHECK15: for.body4: 11431 // CHECK15-NEXT: call void @_Z9gtid_testv() 11432 // CHECK15-NEXT: br label [[FOR_INC5:%.*]] 11433 // CHECK15: for.inc5: 11434 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11435 // CHECK15-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11436 // CHECK15-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11437 // CHECK15-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 11438 // CHECK15: for.end7: 11439 // CHECK15-NEXT: ret void 11440 // 11441 // 11442 // CHECK15-LABEL: define {{[^@]+}}@main 11443 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] { 11444 // CHECK15-NEXT: entry: 11445 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 11446 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 11447 // CHECK15-NEXT: [[I1:%.*]] = alloca i32, align 4 11448 // CHECK15-NEXT: [[I8:%.*]] = alloca i32, align 4 11449 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 11450 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 11451 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 11452 // CHECK15: for.cond: 11453 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11454 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11455 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11456 // CHECK15: for.body: 11457 // CHECK15-NEXT: call void @_Z3fn4v() 11458 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 11459 // CHECK15: for.inc: 11460 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11461 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11462 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 11463 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 11464 // CHECK15: for.end: 11465 // CHECK15-NEXT: store i32 0, i32* [[I1]], align 4 11466 // CHECK15-NEXT: br label [[FOR_COND2:%.*]] 11467 // CHECK15: for.cond2: 11468 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11469 // CHECK15-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11470 // CHECK15-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11471 // CHECK15: for.body4: 11472 // CHECK15-NEXT: call void @_Z3fn5v() 11473 // CHECK15-NEXT: br label [[FOR_INC5:%.*]] 11474 // CHECK15: for.inc5: 11475 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11476 // CHECK15-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11477 // CHECK15-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11478 // CHECK15-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 11479 // CHECK15: for.end7: 11480 // CHECK15-NEXT: store i32 0, i32* [[I8]], align 4 11481 // CHECK15-NEXT: br label [[FOR_COND9:%.*]] 11482 // CHECK15: for.cond9: 11483 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 11484 // CHECK15-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 11485 // CHECK15-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 11486 // CHECK15: for.body11: 11487 // CHECK15-NEXT: call void @_Z3fn6v() 11488 // CHECK15-NEXT: br label [[FOR_INC12:%.*]] 11489 // CHECK15: for.inc12: 11490 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 11491 // CHECK15-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 11492 // CHECK15-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 11493 // CHECK15-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]] 11494 // CHECK15: for.end14: 11495 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 11496 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 11497 // CHECK15-NEXT: ret i32 [[CALL]] 11498 // 11499 // 11500 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 11501 // CHECK15-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 11502 // CHECK15-NEXT: entry: 11503 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 11504 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 11505 // CHECK15-NEXT: [[I1:%.*]] = alloca i32, align 4 11506 // CHECK15-NEXT: [[I8:%.*]] = alloca i32, align 4 11507 // CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 11508 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 11509 // CHECK15-NEXT: br label [[FOR_COND:%.*]] 11510 // CHECK15: for.cond: 11511 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11512 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11513 // CHECK15-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11514 // CHECK15: for.body: 11515 // CHECK15-NEXT: call void @_Z3fn1v() 11516 // CHECK15-NEXT: br label [[FOR_INC:%.*]] 11517 // CHECK15: for.inc: 11518 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11519 // CHECK15-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11520 // CHECK15-NEXT: store i32 [[INC]], i32* [[I]], align 4 11521 // CHECK15-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 11522 // CHECK15: for.end: 11523 // CHECK15-NEXT: store i32 0, i32* [[I1]], align 4 11524 // CHECK15-NEXT: br label [[FOR_COND2:%.*]] 11525 // CHECK15: for.cond2: 11526 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11527 // CHECK15-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11528 // CHECK15-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11529 // CHECK15: for.body4: 11530 // CHECK15-NEXT: call void @_Z3fn2v() 11531 // CHECK15-NEXT: br label [[FOR_INC5:%.*]] 11532 // CHECK15: for.inc5: 11533 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11534 // CHECK15-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11535 // CHECK15-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11536 // CHECK15-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]] 11537 // CHECK15: for.end7: 11538 // CHECK15-NEXT: store i32 0, i32* [[I8]], align 4 11539 // CHECK15-NEXT: br label [[FOR_COND9:%.*]] 11540 // CHECK15: for.cond9: 11541 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 11542 // CHECK15-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 11543 // CHECK15-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 11544 // CHECK15: for.body11: 11545 // CHECK15-NEXT: call void @_Z3fn3v() 11546 // CHECK15-NEXT: br label [[FOR_INC12:%.*]] 11547 // CHECK15: for.inc12: 11548 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 11549 // CHECK15-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 11550 // CHECK15-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 11551 // CHECK15-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]] 11552 // CHECK15: for.end14: 11553 // CHECK15-NEXT: ret i32 0 11554 // 11555 // 11556 // CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv 11557 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] { 11558 // CHECK16-NEXT: entry: 11559 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 11560 // CHECK16-NEXT: [[I1:%.*]] = alloca i32, align 4 11561 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 11562 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 11563 // CHECK16: for.cond: 11564 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11565 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11566 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11567 // CHECK16: for.body: 11568 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 11569 // CHECK16: for.inc: 11570 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11571 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11572 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 11573 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 11574 // CHECK16: for.end: 11575 // CHECK16-NEXT: store i32 0, i32* [[I1]], align 4 11576 // CHECK16-NEXT: br label [[FOR_COND2:%.*]] 11577 // CHECK16: for.cond2: 11578 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11579 // CHECK16-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11580 // CHECK16-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11581 // CHECK16: for.body4: 11582 // CHECK16-NEXT: call void @_Z9gtid_testv() 11583 // CHECK16-NEXT: br label [[FOR_INC5:%.*]] 11584 // CHECK16: for.inc5: 11585 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11586 // CHECK16-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11587 // CHECK16-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11588 // CHECK16-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP8:![0-9]+]] 11589 // CHECK16: for.end7: 11590 // CHECK16-NEXT: ret void 11591 // 11592 // 11593 // CHECK16-LABEL: define {{[^@]+}}@main 11594 // CHECK16-SAME: () #[[ATTR1:[0-9]+]] { 11595 // CHECK16-NEXT: entry: 11596 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 11597 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 11598 // CHECK16-NEXT: [[I1:%.*]] = alloca i32, align 4 11599 // CHECK16-NEXT: [[I8:%.*]] = alloca i32, align 4 11600 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 11601 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 11602 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 11603 // CHECK16: for.cond: 11604 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11605 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11606 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11607 // CHECK16: for.body: 11608 // CHECK16-NEXT: call void @_Z3fn4v() 11609 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 11610 // CHECK16: for.inc: 11611 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11612 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11613 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 11614 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 11615 // CHECK16: for.end: 11616 // CHECK16-NEXT: store i32 0, i32* [[I1]], align 4 11617 // CHECK16-NEXT: br label [[FOR_COND2:%.*]] 11618 // CHECK16: for.cond2: 11619 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11620 // CHECK16-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11621 // CHECK16-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11622 // CHECK16: for.body4: 11623 // CHECK16-NEXT: call void @_Z3fn5v() 11624 // CHECK16-NEXT: br label [[FOR_INC5:%.*]] 11625 // CHECK16: for.inc5: 11626 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11627 // CHECK16-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11628 // CHECK16-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11629 // CHECK16-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]] 11630 // CHECK16: for.end7: 11631 // CHECK16-NEXT: store i32 0, i32* [[I8]], align 4 11632 // CHECK16-NEXT: br label [[FOR_COND9:%.*]] 11633 // CHECK16: for.cond9: 11634 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 11635 // CHECK16-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 11636 // CHECK16-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 11637 // CHECK16: for.body11: 11638 // CHECK16-NEXT: call void @_Z3fn6v() 11639 // CHECK16-NEXT: br label [[FOR_INC12:%.*]] 11640 // CHECK16: for.inc12: 11641 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 11642 // CHECK16-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 11643 // CHECK16-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 11644 // CHECK16-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP11:![0-9]+]] 11645 // CHECK16: for.end14: 11646 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* @Arg, align 4 11647 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP6]]) 11648 // CHECK16-NEXT: ret i32 [[CALL]] 11649 // 11650 // 11651 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 11652 // CHECK16-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat { 11653 // CHECK16-NEXT: entry: 11654 // CHECK16-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 11655 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 11656 // CHECK16-NEXT: [[I1:%.*]] = alloca i32, align 4 11657 // CHECK16-NEXT: [[I8:%.*]] = alloca i32, align 4 11658 // CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 11659 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 11660 // CHECK16-NEXT: br label [[FOR_COND:%.*]] 11661 // CHECK16: for.cond: 11662 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 11663 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 11664 // CHECK16-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 11665 // CHECK16: for.body: 11666 // CHECK16-NEXT: call void @_Z3fn1v() 11667 // CHECK16-NEXT: br label [[FOR_INC:%.*]] 11668 // CHECK16: for.inc: 11669 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 11670 // CHECK16-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 11671 // CHECK16-NEXT: store i32 [[INC]], i32* [[I]], align 4 11672 // CHECK16-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 11673 // CHECK16: for.end: 11674 // CHECK16-NEXT: store i32 0, i32* [[I1]], align 4 11675 // CHECK16-NEXT: br label [[FOR_COND2:%.*]] 11676 // CHECK16: for.cond2: 11677 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[I1]], align 4 11678 // CHECK16-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 11679 // CHECK16-NEXT: br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END7:%.*]] 11680 // CHECK16: for.body4: 11681 // CHECK16-NEXT: call void @_Z3fn2v() 11682 // CHECK16-NEXT: br label [[FOR_INC5:%.*]] 11683 // CHECK16: for.inc5: 11684 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[I1]], align 4 11685 // CHECK16-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 11686 // CHECK16-NEXT: store i32 [[INC6]], i32* [[I1]], align 4 11687 // CHECK16-NEXT: br label [[FOR_COND2]], !llvm.loop [[LOOP13:![0-9]+]] 11688 // CHECK16: for.end7: 11689 // CHECK16-NEXT: store i32 0, i32* [[I8]], align 4 11690 // CHECK16-NEXT: br label [[FOR_COND9:%.*]] 11691 // CHECK16: for.cond9: 11692 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I8]], align 4 11693 // CHECK16-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP4]], 100 11694 // CHECK16-NEXT: br i1 [[CMP10]], label [[FOR_BODY11:%.*]], label [[FOR_END14:%.*]] 11695 // CHECK16: for.body11: 11696 // CHECK16-NEXT: call void @_Z3fn3v() 11697 // CHECK16-NEXT: br label [[FOR_INC12:%.*]] 11698 // CHECK16: for.inc12: 11699 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[I8]], align 4 11700 // CHECK16-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP5]], 1 11701 // CHECK16-NEXT: store i32 [[INC13]], i32* [[I8]], align 4 11702 // CHECK16-NEXT: br label [[FOR_COND9]], !llvm.loop [[LOOP14:![0-9]+]] 11703 // CHECK16: for.end14: 11704 // CHECK16-NEXT: ret i32 0 11705 // 11706