1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 20 21 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 25 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 26 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 28 29 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 32 33 // expected-no-diagnostics 34 #ifndef HEADER 35 #define HEADER 36 37 void fn1(); 38 void fn2(); 39 void fn3(); 40 void fn4(); 41 void fn5(); 42 void fn6(); 43 44 int Arg; 45 46 void gtid_test() { 47 #pragma omp target 48 #pragma omp teams 49 #pragma omp distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for if (parallel: false) 55 for(int i = 0 ; i < 100; i++) { 56 gtid_test(); 57 } 58 } 59 60 61 template <typename T> 62 int tmain(T Arg) { 63 #pragma omp target 64 #pragma omp teams 65 #pragma omp distribute parallel for if (true) 66 for(int i = 0 ; i < 100; i++) { 67 fn1(); 68 } 69 #pragma omp target 70 #pragma omp teams 71 #pragma omp distribute parallel for if (false) 72 for(int i = 0 ; i < 100; i++) { 73 fn2(); 74 } 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for if (parallel: Arg) 78 for(int i = 0 ; i < 100; i++) { 79 fn3(); 80 } 81 return 0; 82 } 83 84 int main() { 85 #pragma omp target 86 #pragma omp teams 87 #pragma omp distribute parallel for if (true) 88 for(int i = 0 ; i < 100; i++) { 89 90 91 fn4(); 92 } 93 94 #pragma omp target 95 #pragma omp teams 96 #pragma omp distribute parallel for if (false) 97 for(int i = 0 ; i < 100; i++) { 98 99 100 fn5(); 101 } 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute parallel for if (Arg) 106 for(int i = 0 ; i < 100; i++) { 107 108 109 fn6(); 110 } 111 112 return tmain(Arg); 113 } 114 115 116 117 118 119 120 // call void [[T_OUTLINE_FUN_3:@.+]]( 121 122 #endif 123 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 124 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 125 // CHECK1-NEXT: entry: 126 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 128 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 129 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 130 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 131 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 132 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 133 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 134 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 135 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 136 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 137 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 138 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 139 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 140 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 141 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 142 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 143 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 144 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 145 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 146 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 147 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 148 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 149 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 150 // CHECK1: omp_offload.failed: 151 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 152 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 153 // CHECK1: omp_offload.cont: 154 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 155 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 156 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 157 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 158 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 159 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 160 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 161 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 162 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 163 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 164 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 165 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 166 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 167 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 168 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 169 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 170 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 171 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 172 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 173 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 174 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 175 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 176 // CHECK1: omp_offload.failed3: 177 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 178 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 179 // CHECK1: omp_offload.cont4: 180 // CHECK1-NEXT: ret void 181 // 182 // 183 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 184 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 185 // CHECK1-NEXT: entry: 186 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 187 // CHECK1-NEXT: ret void 188 // 189 // 190 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 191 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 192 // CHECK1-NEXT: entry: 193 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 194 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 195 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 203 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 204 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 205 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 206 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 207 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 208 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 209 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 210 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 211 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 212 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 213 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 214 // CHECK1: cond.true: 215 // CHECK1-NEXT: br label [[COND_END:%.*]] 216 // CHECK1: cond.false: 217 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 218 // CHECK1-NEXT: br label [[COND_END]] 219 // CHECK1: cond.end: 220 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 221 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 222 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 223 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 224 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 225 // CHECK1: omp.inner.for.cond: 226 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 227 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 228 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 229 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 230 // CHECK1: omp.inner.for.body: 231 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 232 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 233 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 234 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 235 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 236 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 237 // CHECK1: omp.inner.for.inc: 238 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 239 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 240 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 241 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 243 // CHECK1: omp.inner.for.end: 244 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 245 // CHECK1: omp.loop.exit: 246 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 247 // CHECK1-NEXT: ret void 248 // 249 // 250 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 251 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 252 // CHECK1-NEXT: entry: 253 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 254 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 255 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 256 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 257 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 264 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 265 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 266 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 267 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 268 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 269 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 270 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 271 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 272 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 273 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 274 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 275 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 276 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 277 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 278 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 279 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 280 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 281 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 282 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 283 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 284 // CHECK1: cond.true: 285 // CHECK1-NEXT: br label [[COND_END:%.*]] 286 // CHECK1: cond.false: 287 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 288 // CHECK1-NEXT: br label [[COND_END]] 289 // CHECK1: cond.end: 290 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 291 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 292 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 293 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 294 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 295 // CHECK1: omp.inner.for.cond: 296 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 297 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 298 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 299 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 300 // CHECK1: omp.inner.for.body: 301 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 302 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 303 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 304 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 305 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 306 // CHECK1: omp.body.continue: 307 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 308 // CHECK1: omp.inner.for.inc: 309 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 310 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 311 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 312 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 313 // CHECK1: omp.inner.for.end: 314 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 315 // CHECK1: omp.loop.exit: 316 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 317 // CHECK1-NEXT: ret void 318 // 319 // 320 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 321 // CHECK1-SAME: () #[[ATTR1]] { 322 // CHECK1-NEXT: entry: 323 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 324 // CHECK1-NEXT: ret void 325 // 326 // 327 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 328 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 329 // CHECK1-NEXT: entry: 330 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 331 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 332 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 333 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 334 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 335 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 336 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 337 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 338 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 340 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 341 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 342 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 343 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 344 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 345 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 346 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 347 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 348 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 349 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 350 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 351 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 352 // CHECK1: cond.true: 353 // CHECK1-NEXT: br label [[COND_END:%.*]] 354 // CHECK1: cond.false: 355 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 356 // CHECK1-NEXT: br label [[COND_END]] 357 // CHECK1: cond.end: 358 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 359 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 360 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 361 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 363 // CHECK1: omp.inner.for.cond: 364 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 365 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 366 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 367 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 368 // CHECK1: omp.inner.for.body: 369 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 370 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 371 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 372 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 373 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 375 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 376 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 377 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 378 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 379 // CHECK1: omp.inner.for.inc: 380 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 381 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 382 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 383 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 384 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 385 // CHECK1: omp.inner.for.end: 386 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 387 // CHECK1: omp.loop.exit: 388 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 389 // CHECK1-NEXT: ret void 390 // 391 // 392 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 393 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 394 // CHECK1-NEXT: entry: 395 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 396 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 397 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 398 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 399 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 407 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 408 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 409 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 410 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 411 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 412 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 413 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 414 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 415 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 416 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 417 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 418 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 419 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 420 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 421 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 422 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 423 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 424 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 425 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 426 // CHECK1: cond.true: 427 // CHECK1-NEXT: br label [[COND_END:%.*]] 428 // CHECK1: cond.false: 429 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 430 // CHECK1-NEXT: br label [[COND_END]] 431 // CHECK1: cond.end: 432 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 433 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 434 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 435 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 436 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 437 // CHECK1: omp.inner.for.cond: 438 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 439 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 440 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 441 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 442 // CHECK1: omp.inner.for.body: 443 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 444 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 445 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 446 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 447 // CHECK1-NEXT: call void @_Z9gtid_testv() 448 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 449 // CHECK1: omp.body.continue: 450 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 451 // CHECK1: omp.inner.for.inc: 452 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 453 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 454 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 455 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 456 // CHECK1: omp.inner.for.end: 457 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 458 // CHECK1: omp.loop.exit: 459 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 460 // CHECK1-NEXT: ret void 461 // 462 // 463 // CHECK1-LABEL: define {{[^@]+}}@main 464 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 465 // CHECK1-NEXT: entry: 466 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 470 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 471 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 472 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 473 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 475 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 476 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 477 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 478 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 479 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 480 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 481 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 482 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 483 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 484 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 485 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 486 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 487 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 488 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 489 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 490 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 491 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 492 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 493 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 494 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 495 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 496 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 497 // CHECK1: omp_offload.failed: 498 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 499 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 500 // CHECK1: omp_offload.cont: 501 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 502 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 503 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 504 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 505 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 506 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 507 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 508 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 509 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 510 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 511 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 512 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 513 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 514 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 515 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 516 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 517 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 518 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 519 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 520 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 521 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 522 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 523 // CHECK1: omp_offload.failed3: 524 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 525 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 526 // CHECK1: omp_offload.cont4: 527 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4 528 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 529 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4 530 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 531 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 532 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 533 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8 534 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 535 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 536 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8 537 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 538 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 539 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 540 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 541 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 542 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0 543 // CHECK1-NEXT: store i32 1, i32* [[TMP31]], align 4 544 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1 545 // CHECK1-NEXT: store i32 1, i32* [[TMP32]], align 4 546 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2 547 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8 548 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3 549 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8 550 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4 551 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP35]], align 8 552 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5 553 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP36]], align 8 554 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6 555 // CHECK1-NEXT: store i8** null, i8*** [[TMP37]], align 8 556 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7 557 // CHECK1-NEXT: store i8** null, i8*** [[TMP38]], align 8 558 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8 559 // CHECK1-NEXT: store i64 100, i64* [[TMP39]], align 8 560 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]]) 561 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 562 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 563 // CHECK1: omp_offload.failed7: 564 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP23]]) #[[ATTR2]] 565 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 566 // CHECK1: omp_offload.cont8: 567 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* @Arg, align 4 568 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 569 // CHECK1-NEXT: ret i32 [[CALL]] 570 // 571 // 572 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 573 // CHECK1-SAME: () #[[ATTR1]] { 574 // CHECK1-NEXT: entry: 575 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 576 // CHECK1-NEXT: ret void 577 // 578 // 579 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 580 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 581 // CHECK1-NEXT: entry: 582 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 583 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 584 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 585 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 586 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 587 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 588 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 589 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 590 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 591 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 592 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 593 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 594 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 595 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 596 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 597 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 598 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 599 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 600 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 601 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 602 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 603 // CHECK1: cond.true: 604 // CHECK1-NEXT: br label [[COND_END:%.*]] 605 // CHECK1: cond.false: 606 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 607 // CHECK1-NEXT: br label [[COND_END]] 608 // CHECK1: cond.end: 609 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 610 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 611 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 612 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 613 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 614 // CHECK1: omp.inner.for.cond: 615 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 616 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 617 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 618 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 619 // CHECK1: omp.inner.for.body: 620 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 621 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 622 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 623 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 624 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 625 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 626 // CHECK1: omp.inner.for.inc: 627 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 628 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 629 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 630 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 631 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 632 // CHECK1: omp.inner.for.end: 633 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 634 // CHECK1: omp.loop.exit: 635 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 636 // CHECK1-NEXT: ret void 637 // 638 // 639 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 640 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 641 // CHECK1-NEXT: entry: 642 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 643 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 644 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 645 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 646 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 647 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 648 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 649 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 650 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 651 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 652 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 653 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 654 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 655 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 656 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 657 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 658 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 659 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 660 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 661 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 662 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 663 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 664 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 665 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 666 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 667 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 668 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 669 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 670 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 671 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 672 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 673 // CHECK1: cond.true: 674 // CHECK1-NEXT: br label [[COND_END:%.*]] 675 // CHECK1: cond.false: 676 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 677 // CHECK1-NEXT: br label [[COND_END]] 678 // CHECK1: cond.end: 679 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 680 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 681 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 682 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 683 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 684 // CHECK1: omp.inner.for.cond: 685 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 686 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 687 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 688 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 689 // CHECK1: omp.inner.for.body: 690 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 691 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 692 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 693 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 694 // CHECK1-NEXT: call void @_Z3fn4v() 695 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 696 // CHECK1: omp.body.continue: 697 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 698 // CHECK1: omp.inner.for.inc: 699 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 700 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 701 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 702 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 703 // CHECK1: omp.inner.for.end: 704 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 705 // CHECK1: omp.loop.exit: 706 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 707 // CHECK1-NEXT: ret void 708 // 709 // 710 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 711 // CHECK1-SAME: () #[[ATTR1]] { 712 // CHECK1-NEXT: entry: 713 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 714 // CHECK1-NEXT: ret void 715 // 716 // 717 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 718 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 719 // CHECK1-NEXT: entry: 720 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 721 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 722 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 723 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 724 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 725 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 726 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 727 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 728 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 729 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 731 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 732 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 733 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 734 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 735 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 736 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 737 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 738 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 739 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 740 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 741 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 742 // CHECK1: cond.true: 743 // CHECK1-NEXT: br label [[COND_END:%.*]] 744 // CHECK1: cond.false: 745 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 746 // CHECK1-NEXT: br label [[COND_END]] 747 // CHECK1: cond.end: 748 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 749 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 750 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 751 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 752 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 753 // CHECK1: omp.inner.for.cond: 754 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 755 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 756 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 757 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 758 // CHECK1: omp.inner.for.body: 759 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 760 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 761 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 762 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 763 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 764 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 765 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 766 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 767 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 768 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 769 // CHECK1: omp.inner.for.inc: 770 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 771 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 772 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 773 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 774 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 775 // CHECK1: omp.inner.for.end: 776 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 777 // CHECK1: omp.loop.exit: 778 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 779 // CHECK1-NEXT: ret void 780 // 781 // 782 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 783 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 784 // CHECK1-NEXT: entry: 785 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 786 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 787 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 788 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 789 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 790 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 791 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 792 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 793 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 794 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 795 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 796 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 797 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 798 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 799 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 800 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 801 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 802 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 803 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 804 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 805 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 806 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 807 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 808 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 809 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 810 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 811 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 812 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 813 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 814 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 815 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 816 // CHECK1: cond.true: 817 // CHECK1-NEXT: br label [[COND_END:%.*]] 818 // CHECK1: cond.false: 819 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 820 // CHECK1-NEXT: br label [[COND_END]] 821 // CHECK1: cond.end: 822 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 823 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 824 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 825 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 826 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 827 // CHECK1: omp.inner.for.cond: 828 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 829 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 830 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 831 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 832 // CHECK1: omp.inner.for.body: 833 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 834 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 835 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 836 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 837 // CHECK1-NEXT: call void @_Z3fn5v() 838 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 839 // CHECK1: omp.body.continue: 840 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 841 // CHECK1: omp.inner.for.inc: 842 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 843 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 844 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 845 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 846 // CHECK1: omp.inner.for.end: 847 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 848 // CHECK1: omp.loop.exit: 849 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 850 // CHECK1-NEXT: ret void 851 // 852 // 853 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 854 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 855 // CHECK1-NEXT: entry: 856 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 857 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 858 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 859 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]]) 860 // CHECK1-NEXT: ret void 861 // 862 // 863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 864 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 865 // CHECK1-NEXT: entry: 866 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 867 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 868 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 869 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 870 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 871 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 872 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 873 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 874 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 875 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 876 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 877 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 878 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 879 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 880 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 881 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 882 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 883 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 884 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 885 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 886 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 887 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 888 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 889 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 890 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 891 // CHECK1: cond.true: 892 // CHECK1-NEXT: br label [[COND_END:%.*]] 893 // CHECK1: cond.false: 894 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 895 // CHECK1-NEXT: br label [[COND_END]] 896 // CHECK1: cond.end: 897 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 898 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 899 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 900 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 901 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 902 // CHECK1: omp.inner.for.cond: 903 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 904 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 905 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 906 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 907 // CHECK1: omp.inner.for.body: 908 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 909 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 910 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 911 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 912 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 913 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 914 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 915 // CHECK1: omp_if.then: 916 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 917 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 918 // CHECK1: omp_if.else: 919 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 920 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 921 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 922 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 923 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 924 // CHECK1-NEXT: br label [[OMP_IF_END]] 925 // CHECK1: omp_if.end: 926 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 927 // CHECK1: omp.inner.for.inc: 928 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 929 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 930 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 931 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 932 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 933 // CHECK1: omp.inner.for.end: 934 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 935 // CHECK1: omp.loop.exit: 936 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 937 // CHECK1-NEXT: ret void 938 // 939 // 940 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 941 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 942 // CHECK1-NEXT: entry: 943 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 944 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 945 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 946 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 947 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 948 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 949 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 950 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 951 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 952 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 953 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 954 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 955 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 956 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 957 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 958 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 959 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 960 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 961 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 962 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 963 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 964 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 965 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 966 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 967 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 968 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 969 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 970 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 971 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 972 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 973 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 974 // CHECK1: cond.true: 975 // CHECK1-NEXT: br label [[COND_END:%.*]] 976 // CHECK1: cond.false: 977 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 978 // CHECK1-NEXT: br label [[COND_END]] 979 // CHECK1: cond.end: 980 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 981 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 982 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 983 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 984 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 985 // CHECK1: omp.inner.for.cond: 986 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 987 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 988 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 989 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 990 // CHECK1: omp.inner.for.body: 991 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 992 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 993 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 994 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 995 // CHECK1-NEXT: call void @_Z3fn6v() 996 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 997 // CHECK1: omp.body.continue: 998 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 999 // CHECK1: omp.inner.for.inc: 1000 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1001 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1002 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1003 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1004 // CHECK1: omp.inner.for.end: 1005 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1006 // CHECK1: omp.loop.exit: 1007 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1008 // CHECK1-NEXT: ret void 1009 // 1010 // 1011 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 1012 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 1013 // CHECK1-NEXT: entry: 1014 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 1015 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1016 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1017 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1018 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1019 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1020 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1021 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 1022 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4 1023 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1024 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0 1025 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4 1026 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1 1027 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4 1028 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2 1029 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8 1030 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3 1031 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8 1032 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4 1033 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8 1034 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5 1035 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8 1036 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6 1037 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8 1038 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7 1039 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8 1040 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8 1041 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8 1042 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]]) 1043 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1044 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1045 // CHECK1: omp_offload.failed: 1046 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 1047 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1048 // CHECK1: omp_offload.cont: 1049 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1050 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0 1051 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4 1052 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1 1053 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4 1054 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2 1055 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8 1056 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3 1057 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8 1058 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4 1059 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8 1060 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5 1061 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8 1062 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6 1063 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8 1064 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7 1065 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8 1066 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8 1067 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8 1068 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]]) 1069 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1070 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1071 // CHECK1: omp_offload.failed3: 1072 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 1073 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1074 // CHECK1: omp_offload.cont4: 1075 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4 1076 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32* 1077 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4 1078 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8 1079 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1080 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64* 1081 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8 1082 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1083 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64* 1084 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8 1085 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1086 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8 1087 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1088 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1089 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1090 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0 1091 // CHECK1-NEXT: store i32 1, i32* [[TMP31]], align 4 1092 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1 1093 // CHECK1-NEXT: store i32 1, i32* [[TMP32]], align 4 1094 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2 1095 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8 1096 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3 1097 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8 1098 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4 1099 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP35]], align 8 1100 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5 1101 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP36]], align 8 1102 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6 1103 // CHECK1-NEXT: store i8** null, i8*** [[TMP37]], align 8 1104 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7 1105 // CHECK1-NEXT: store i8** null, i8*** [[TMP38]], align 8 1106 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8 1107 // CHECK1-NEXT: store i64 100, i64* [[TMP39]], align 8 1108 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]]) 1109 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 1110 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1111 // CHECK1: omp_offload.failed7: 1112 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP23]]) #[[ATTR2]] 1113 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1114 // CHECK1: omp_offload.cont8: 1115 // CHECK1-NEXT: ret i32 0 1116 // 1117 // 1118 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 1119 // CHECK1-SAME: () #[[ATTR1]] { 1120 // CHECK1-NEXT: entry: 1121 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1122 // CHECK1-NEXT: ret void 1123 // 1124 // 1125 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1126 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1127 // CHECK1-NEXT: entry: 1128 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1129 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1130 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1131 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1132 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1133 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1134 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1135 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1136 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1137 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1138 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1139 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1140 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1141 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1142 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1143 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1144 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1145 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1146 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1147 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1148 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1149 // CHECK1: cond.true: 1150 // CHECK1-NEXT: br label [[COND_END:%.*]] 1151 // CHECK1: cond.false: 1152 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1153 // CHECK1-NEXT: br label [[COND_END]] 1154 // CHECK1: cond.end: 1155 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1156 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1157 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1158 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1159 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1160 // CHECK1: omp.inner.for.cond: 1161 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1162 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1163 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1164 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1165 // CHECK1: omp.inner.for.body: 1166 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1167 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1168 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1169 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1170 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1171 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1172 // CHECK1: omp.inner.for.inc: 1173 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1174 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1175 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1176 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1177 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1178 // CHECK1: omp.inner.for.end: 1179 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1180 // CHECK1: omp.loop.exit: 1181 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1182 // CHECK1-NEXT: ret void 1183 // 1184 // 1185 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1186 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1187 // CHECK1-NEXT: entry: 1188 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1189 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1190 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1191 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1192 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1193 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1194 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1195 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1196 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1197 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1198 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1199 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1200 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1201 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1202 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1203 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1204 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1205 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1206 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1207 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1208 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1209 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1210 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1211 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1212 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1213 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1214 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1215 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1216 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1217 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1218 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1219 // CHECK1: cond.true: 1220 // CHECK1-NEXT: br label [[COND_END:%.*]] 1221 // CHECK1: cond.false: 1222 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1223 // CHECK1-NEXT: br label [[COND_END]] 1224 // CHECK1: cond.end: 1225 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1226 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1227 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1228 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1230 // CHECK1: omp.inner.for.cond: 1231 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1232 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1233 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1234 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1235 // CHECK1: omp.inner.for.body: 1236 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1237 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1238 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1239 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1240 // CHECK1-NEXT: call void @_Z3fn1v() 1241 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1242 // CHECK1: omp.body.continue: 1243 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1244 // CHECK1: omp.inner.for.inc: 1245 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1246 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1247 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1248 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1249 // CHECK1: omp.inner.for.end: 1250 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1251 // CHECK1: omp.loop.exit: 1252 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1253 // CHECK1-NEXT: ret void 1254 // 1255 // 1256 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 1257 // CHECK1-SAME: () #[[ATTR1]] { 1258 // CHECK1-NEXT: entry: 1259 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*)) 1260 // CHECK1-NEXT: ret void 1261 // 1262 // 1263 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 1264 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1265 // CHECK1-NEXT: entry: 1266 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1267 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1268 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1269 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1270 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1271 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1272 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1273 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1274 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1275 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1276 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1277 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1278 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1279 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1280 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1281 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1282 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1283 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1284 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1285 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1286 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1287 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1288 // CHECK1: cond.true: 1289 // CHECK1-NEXT: br label [[COND_END:%.*]] 1290 // CHECK1: cond.false: 1291 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1292 // CHECK1-NEXT: br label [[COND_END]] 1293 // CHECK1: cond.end: 1294 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1295 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1296 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1297 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1299 // CHECK1: omp.inner.for.cond: 1300 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1301 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1302 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1303 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1304 // CHECK1: omp.inner.for.body: 1305 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1306 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1307 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1308 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1309 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1310 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1311 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1312 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1313 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) 1314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1315 // CHECK1: omp.inner.for.inc: 1316 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1317 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1318 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1319 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1321 // CHECK1: omp.inner.for.end: 1322 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1323 // CHECK1: omp.loop.exit: 1324 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1325 // CHECK1-NEXT: ret void 1326 // 1327 // 1328 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 1329 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1330 // CHECK1-NEXT: entry: 1331 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1332 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1333 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1334 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1335 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1336 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1337 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1338 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1339 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1340 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1341 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1342 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1343 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1344 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1345 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1346 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1347 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1348 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1349 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1350 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1351 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1352 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1353 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1354 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1355 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1356 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1357 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1358 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1359 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1360 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1361 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1362 // CHECK1: cond.true: 1363 // CHECK1-NEXT: br label [[COND_END:%.*]] 1364 // CHECK1: cond.false: 1365 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1366 // CHECK1-NEXT: br label [[COND_END]] 1367 // CHECK1: cond.end: 1368 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1369 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1370 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1371 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1372 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1373 // CHECK1: omp.inner.for.cond: 1374 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1375 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1376 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1377 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1378 // CHECK1: omp.inner.for.body: 1379 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1380 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1381 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1382 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1383 // CHECK1-NEXT: call void @_Z3fn2v() 1384 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1385 // CHECK1: omp.body.continue: 1386 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1387 // CHECK1: omp.inner.for.inc: 1388 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1389 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1390 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1391 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1392 // CHECK1: omp.inner.for.end: 1393 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1394 // CHECK1: omp.loop.exit: 1395 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1396 // CHECK1-NEXT: ret void 1397 // 1398 // 1399 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 1400 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1401 // CHECK1-NEXT: entry: 1402 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1403 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8 1404 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32* 1405 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]]) 1406 // CHECK1-NEXT: ret void 1407 // 1408 // 1409 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1410 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 1411 // CHECK1-NEXT: entry: 1412 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1413 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1414 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8 1415 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1416 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1417 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1418 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1419 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1420 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1421 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1422 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1423 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1424 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1425 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8 1426 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8 1427 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1428 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1429 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1430 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1431 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1432 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1433 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1434 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1435 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1436 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1437 // CHECK1: cond.true: 1438 // CHECK1-NEXT: br label [[COND_END:%.*]] 1439 // CHECK1: cond.false: 1440 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1441 // CHECK1-NEXT: br label [[COND_END]] 1442 // CHECK1: cond.end: 1443 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1444 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1445 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1446 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1448 // CHECK1: omp.inner.for.cond: 1449 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1450 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1451 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1452 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1453 // CHECK1: omp.inner.for.body: 1454 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1455 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1456 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1457 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1458 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4 1459 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 1460 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1461 // CHECK1: omp_if.then: 1462 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1463 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1464 // CHECK1: omp_if.else: 1465 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1466 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1467 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1468 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 1469 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]) 1470 // CHECK1-NEXT: br label [[OMP_IF_END]] 1471 // CHECK1: omp_if.end: 1472 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1473 // CHECK1: omp.inner.for.inc: 1474 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1475 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1476 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1477 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1479 // CHECK1: omp.inner.for.end: 1480 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1481 // CHECK1: omp.loop.exit: 1482 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1483 // CHECK1-NEXT: ret void 1484 // 1485 // 1486 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1487 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1488 // CHECK1-NEXT: entry: 1489 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1490 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1491 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1492 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1493 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1494 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1495 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1496 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1497 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1498 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1499 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1500 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1501 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1502 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1503 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1504 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1505 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1506 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1507 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1508 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1509 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1510 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1511 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1512 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1513 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1514 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1515 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1516 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1517 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1518 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1519 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1520 // CHECK1: cond.true: 1521 // CHECK1-NEXT: br label [[COND_END:%.*]] 1522 // CHECK1: cond.false: 1523 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1524 // CHECK1-NEXT: br label [[COND_END]] 1525 // CHECK1: cond.end: 1526 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1527 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1528 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1529 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1530 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1531 // CHECK1: omp.inner.for.cond: 1532 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1533 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1534 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1535 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1536 // CHECK1: omp.inner.for.body: 1537 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1538 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1539 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1540 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1541 // CHECK1-NEXT: call void @_Z3fn3v() 1542 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1543 // CHECK1: omp.body.continue: 1544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1545 // CHECK1: omp.inner.for.inc: 1546 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1547 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1548 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1549 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1550 // CHECK1: omp.inner.for.end: 1551 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1552 // CHECK1: omp.loop.exit: 1553 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1554 // CHECK1-NEXT: ret void 1555 // 1556 // 1557 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1558 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 1559 // CHECK1-NEXT: entry: 1560 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1561 // CHECK1-NEXT: ret void 1562 // 1563