1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host code gen 3 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 6 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 9 10 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 20 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 23 24 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 28 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 // expected-no-diagnostics 31 #ifndef HEADER 32 #define HEADER 33 34 35 template <typename T> 36 T tmain() { 37 T *a, *b, *c; 38 int n = 10000; 39 int ch = 100; 40 41 // no schedule clauses 42 #pragma omp target 43 #pragma omp teams 44 #pragma omp distribute parallel for 45 for (int i = 0; i < n; ++i) { 46 #pragma omp cancel for 47 a[i] = b[i] + c[i]; 48 } 49 50 // dist_schedule: static no chunk 51 #pragma omp target 52 #pragma omp teams 53 #pragma omp distribute parallel for dist_schedule(static) 54 for (int i = 0; i < n; ++i) { 55 a[i] = b[i] + c[i]; 56 } 57 58 // dist_schedule: static chunk 59 #pragma omp target 60 #pragma omp teams 61 #pragma omp distribute parallel for dist_schedule(static, ch) 62 for (int i = 0; i < n; ++i) { 63 a[i] = b[i] + c[i]; 64 } 65 66 // schedule: static no chunk 67 #pragma omp target 68 #pragma omp teams 69 #pragma omp distribute parallel for schedule(static) 70 for (int i = 0; i < n; ++i) { 71 a[i] = b[i] + c[i]; 72 } 73 74 // schedule: static chunk 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for schedule(static, ch) 78 for (int i = 0; i < n; ++i) { 79 a[i] = b[i] + c[i]; 80 } 81 82 // schedule: dynamic no chunk 83 #pragma omp target 84 #pragma omp teams 85 #pragma omp distribute parallel for schedule(dynamic) 86 for (int i = 0; i < n; ++i) { 87 a[i] = b[i] + c[i]; 88 } 89 90 // schedule: dynamic chunk 91 #pragma omp target 92 #pragma omp teams 93 #pragma omp distribute parallel for schedule(dynamic, ch) 94 for (int i = 0; i < n; ++i) { 95 a[i] = b[i] + c[i]; 96 } 97 98 return T(); 99 } 100 101 int main() { 102 double *a, *b, *c; 103 int n = 10000; 104 int ch = 100; 105 106 #ifdef LAMBDA 107 [&]() { 108 109 110 111 112 113 114 115 116 // no schedule clauses 117 #pragma omp target 118 #pragma omp teams 119 120 #pragma omp distribute parallel for 121 for (int i = 0; i < n; ++i) { 122 a[i] = b[i] + c[i]; 123 124 125 // check EUB for distribute 126 127 // initialize omp.iv 128 129 // check exit condition 130 131 // check that PrevLB and PrevUB are passed to the 'for' 132 // check that distlb and distub are properly passed to fork_call 133 134 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 135 136 137 // implementation of 'parallel for' 138 139 140 // initialize lb and ub to PrevLB and PrevUB 141 142 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 143 // In this case we use EUB 144 145 // initialize omp.iv 146 147 // check exit condition 148 149 // check that PrevLB and PrevUB are passed to the 'for' 150 151 // check stride 1 for 'for' in 'distribute parallel for' 152 153 154 [&]() { 155 a[i] = b[i] + c[i]; 156 }(); 157 } 158 159 // dist_schedule: static no chunk (same sa default - no dist_schedule) 160 #pragma omp target 161 #pragma omp teams 162 163 #pragma omp distribute parallel for dist_schedule(static) 164 for (int i = 0; i < n; ++i) { 165 a[i] = b[i] + c[i]; 166 167 168 // check EUB for distribute 169 170 // initialize omp.iv 171 172 // check exit condition 173 174 // check that PrevLB and PrevUB are passed to the 'for' 175 // check that distlb and distub are properly passed to fork_call 176 177 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 178 179 180 // implementation of 'parallel for' 181 182 183 // initialize lb and ub to PrevLB and PrevUB 184 185 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 186 // In this case we use EUB 187 188 // initialize omp.iv 189 190 // check exit condition 191 192 // check that PrevLB and PrevUB are passed to the 'for' 193 194 // check stride 1 for 'for' in 'distribute parallel for' 195 196 [&]() { 197 a[i] = b[i] + c[i]; 198 }(); 199 } 200 201 // dist_schedule: static chunk 202 #pragma omp target 203 #pragma omp teams 204 205 #pragma omp distribute parallel for dist_schedule(static, ch) 206 for (int i = 0; i < n; ++i) { 207 a[i] = b[i] + c[i]; 208 209 210 // check EUB for distribute 211 212 // initialize omp.iv 213 214 // check exit condition 215 216 // check that PrevLB and PrevUB are passed to the 'for' 217 // check that distlb and distub are properly passed to fork_call 218 219 // check DistInc 220 221 // Update UB 222 223 // Store LB in IV 224 225 226 // loop exit 227 228 // skip implementation of 'parallel for': using default scheduling and was tested above 229 [&]() { 230 a[i] = b[i] + c[i]; 231 }(); 232 } 233 234 // schedule: static no chunk 235 #pragma omp target 236 #pragma omp teams 237 238 #pragma omp distribute parallel for schedule(static) 239 for (int i = 0; i < n; ++i) { 240 a[i] = b[i] + c[i]; 241 242 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 243 244 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 245 246 247 // initialize lb and ub to PrevLB and PrevUB 248 249 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 250 // In this case we use EUB 251 252 // initialize omp.iv 253 254 // check exit condition 255 256 // check that PrevLB and PrevUB are passed to the 'for' 257 258 // check stride 1 for 'for' in 'distribute parallel for' 259 260 261 [&]() { 262 a[i] = b[i] + c[i]; 263 }(); 264 } 265 266 // schedule: static chunk 267 #pragma omp target 268 #pragma omp teams 269 270 #pragma omp distribute parallel for schedule(static, ch) 271 for (int i = 0; i < n; ++i) { 272 a[i] = b[i] + c[i]; 273 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 274 275 // 'parallel for' implementation using outer and inner loops and PrevEUB 276 277 // initialize lb and ub to PrevLB and PrevUB 278 279 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 280 281 // initialize omp.iv (IV = LB) 282 283 // outer loop: while (IV < UB) { 284 285 286 287 // skip body branch 288 289 // IV = IV + 1 and inner loop latch 290 291 // check NextLB and NextUB 292 293 294 [&]() { 295 a[i] = b[i] + c[i]; 296 }(); 297 } 298 299 // schedule: dynamic no chunk 300 #pragma omp target 301 #pragma omp teams 302 303 #pragma omp distribute parallel for schedule(dynamic) 304 for (int i = 0; i < n; ++i) { 305 a[i] = b[i] + c[i]; 306 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 307 308 // 'parallel for' implementation using outer and inner loops and PrevEUB 309 310 // initialize lb and ub to PrevLB and PrevUB 311 312 313 // initialize omp.iv (IV = LB) 314 315 316 // skip body branch 317 318 // IV = IV + 1 and inner loop latch 319 320 // check NextLB and NextUB 321 322 323 [&]() { 324 a[i] = b[i] + c[i]; 325 }(); 326 } 327 328 // schedule: dynamic chunk 329 #pragma omp target 330 #pragma omp teams 331 332 #pragma omp distribute parallel for schedule(dynamic, ch) 333 for (int i = 0; i < n; ++i) { 334 a[i] = b[i] + c[i]; 335 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 336 337 // 'parallel for' implementation using outer and inner loops and PrevEUB 338 339 // initialize lb and ub to PrevLB and PrevUB 340 341 342 // initialize omp.iv (IV = LB) 343 344 345 // skip body branch 346 347 // IV = IV + 1 and inner loop latch 348 349 // check NextLB and NextUB 350 351 352 [&]() { 353 a[i] = b[i] + c[i]; 354 }(); 355 } 356 }(); 357 return 0; 358 #else 359 360 361 362 363 364 365 366 367 368 // no schedule clauses 369 #pragma omp target 370 #pragma omp teams 371 372 #pragma omp distribute parallel for 373 for (int i = 0; i < n; ++i) { 374 a[i] = b[i] + c[i]; 375 376 377 // check EUB for distribute 378 379 // initialize omp.iv 380 381 // check exit condition 382 383 // check that PrevLB and PrevUB are passed to the 'for' 384 // check that distlb and distub are properly passed to fork_call 385 386 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 387 388 389 // implementation of 'parallel for' 390 391 392 // initialize lb and ub to PrevLB and PrevUB 393 394 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 395 // In this case we use EUB 396 397 // initialize omp.iv 398 399 // check exit condition 400 401 // check that PrevLB and PrevUB are passed to the 'for' 402 403 // check stride 1 for 'for' in 'distribute parallel for' 404 405 } 406 407 // dist_schedule: static no chunk 408 #pragma omp target 409 #pragma omp teams 410 411 #pragma omp distribute parallel for dist_schedule(static) 412 for (int i = 0; i < n; ++i) { 413 a[i] = b[i] + c[i]; 414 415 416 // check EUB for distribute 417 418 // initialize omp.iv 419 420 // check exit condition 421 422 // check that PrevLB and PrevUB are passed to the 'for' 423 // check that distlb and distub are properly passed to fork_call 424 425 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 426 427 428 // implementation of 'parallel for' 429 430 431 // initialize lb and ub to PrevLB and PrevUB 432 433 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 434 // In this case we use EUB 435 436 // initialize omp.iv 437 438 // check exit condition 439 440 // check that PrevLB and PrevUB are passed to the 'for' 441 442 // check stride 1 for 'for' in 'distribute parallel for' 443 444 } 445 446 // dist_schedule: static chunk 447 #pragma omp target 448 #pragma omp teams 449 450 #pragma omp distribute parallel for dist_schedule(static, ch) 451 for (int i = 0; i < n; ++i) { 452 a[i] = b[i] + c[i]; 453 454 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 455 456 // check EUB for distribute 457 458 // initialize omp.iv 459 460 // check exit condition 461 462 // check that PrevLB and PrevUB are passed to the 'for' 463 // check that distlb and distub are properly passed to fork_call 464 465 // check DistInc 466 467 // Update UB 468 469 // Store LB in IV 470 471 472 // loop exit 473 474 // skip implementation of 'parallel for': using default scheduling and was tested above 475 } 476 477 // schedule: static no chunk 478 #pragma omp target 479 #pragma omp teams 480 481 #pragma omp distribute parallel for schedule(static) 482 for (int i = 0; i < n; ++i) { 483 a[i] = b[i] + c[i]; 484 485 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 486 487 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 488 489 490 // initialize lb and ub to PrevLB and PrevUB 491 492 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 493 // In this case we use EUB 494 495 // initialize omp.iv 496 497 // check exit condition 498 499 // check that PrevLB and PrevUB are passed to the 'for' 500 501 // check stride 1 for 'for' in 'distribute parallel for' 502 503 } 504 505 // schedule: static chunk 506 #pragma omp target 507 #pragma omp teams 508 509 #pragma omp distribute parallel for schedule(static, ch) 510 for (int i = 0; i < n; ++i) { 511 a[i] = b[i] + c[i]; 512 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 513 514 // 'parallel for' implementation using outer and inner loops and PrevEUB 515 516 // initialize lb and ub to PrevLB and PrevUB 517 518 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 519 520 // initialize omp.iv (IV = LB) 521 522 // outer loop: while (IV < UB) { 523 524 525 526 // skip body branch 527 528 // IV = IV + 1 and inner loop latch 529 530 // check NextLB and NextUB 531 532 533 } 534 535 // schedule: dynamic no chunk 536 #pragma omp target 537 #pragma omp teams 538 539 #pragma omp distribute parallel for schedule(dynamic) 540 for (int i = 0; i < n; ++i) { 541 a[i] = b[i] + c[i]; 542 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 543 544 // 'parallel for' implementation using outer and inner loops and PrevEUB 545 546 // initialize lb and ub to PrevLB and PrevUB 547 548 549 // initialize omp.iv (IV = LB) 550 551 552 // skip body branch 553 554 // IV = IV + 1 and inner loop latch 555 556 // check NextLB and NextUB 557 558 559 } 560 561 // schedule: dynamic chunk 562 #pragma omp target 563 #pragma omp teams 564 565 #pragma omp distribute parallel for schedule(dynamic, ch) 566 for (int i = 0; i < n; ++i) { 567 a[i] = b[i] + c[i]; 568 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 569 570 // 'parallel for' implementation using outer and inner loops and PrevEUB 571 572 // initialize lb and ub to PrevLB and PrevUB 573 574 575 // initialize omp.iv (IV = LB) 576 577 578 // skip body branch 579 580 // IV = IV + 1 and inner loop latch 581 582 // check NextLB and NextUB 583 584 585 } 586 587 return tmain<int>(); 588 #endif 589 } 590 591 // check code 592 593 594 595 596 597 598 599 600 601 602 603 // check EUB for distribute 604 605 // initialize omp.iv 606 607 // check exit condition 608 609 // check that PrevLB and PrevUB are passed to the 'for' 610 // check that distlb and distub are properly passed to fork_call 611 612 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 613 614 615 // implementation of 'parallel for' 616 617 618 // initialize lb and ub to PrevLB and PrevUB 619 620 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 621 // In this case we use EUB 622 623 // initialize omp.iv 624 625 // check exit condition 626 627 // check that PrevLB and PrevUB are passed to the 'for' 628 629 // check stride 1 for 'for' in 'distribute parallel for' 630 631 632 633 634 635 // check EUB for distribute 636 637 // initialize omp.iv 638 639 // check exit condition 640 641 // check that PrevLB and PrevUB are passed to the 'for' 642 // check that distlb and distub are properly passed to fork_call 643 644 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 645 646 647 // implementation of 'parallel for' 648 649 650 // initialize lb and ub to PrevLB and PrevUB 651 652 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 653 // In this case we use EUB 654 655 // initialize omp.iv 656 657 // check exit condition 658 659 // check that PrevLB and PrevUB are passed to the 'for' 660 661 // check stride 1 for 'for' in 'distribute parallel for' 662 663 664 665 666 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 667 668 // check EUB for distribute 669 670 // initialize omp.iv 671 672 // check exit condition 673 674 // check that PrevLB and PrevUB are passed to the 'for' 675 // check that distlb and distub are properly passed to fork_call 676 677 // check DistInc 678 679 // Update UB 680 681 // Store LB in IV 682 683 684 // loop exit 685 686 // skip implementation of 'parallel for': using default scheduling and was tested above 687 688 689 690 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 691 692 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 693 694 695 // initialize lb and ub to PrevLB and PrevUB 696 697 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 698 // In this case we use EUB 699 700 // initialize omp.iv 701 702 // check exit condition 703 704 // check that PrevLB and PrevUB are passed to the 'for' 705 706 // check stride 1 for 'for' in 'distribute parallel for' 707 708 709 710 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 711 712 // 'parallel for' implementation using outer and inner loops and PrevEUB 713 714 // initialize lb and ub to PrevLB and PrevUB 715 716 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 717 718 // initialize omp.iv (IV = LB) 719 720 // outer loop: while (IV < UB) { 721 722 723 724 // skip body branch 725 726 // IV = IV + 1 and inner loop latch 727 728 // check NextLB and NextUB 729 730 731 732 733 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 734 735 // 'parallel for' implementation using outer and inner loops and PrevEUB 736 737 // initialize lb and ub to PrevLB and PrevUB 738 739 740 // initialize omp.iv (IV = LB) 741 742 743 // skip body branch 744 745 // IV = IV + 1 and inner loop latch 746 747 // check NextLB and NextUB 748 749 750 751 752 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 753 754 // 'parallel for' implementation using outer and inner loops and PrevEUB 755 756 // initialize lb and ub to PrevLB and PrevUB 757 758 759 // initialize omp.iv (IV = LB) 760 761 762 // skip body branch 763 764 // IV = IV + 1 and inner loop latch 765 766 // check NextLB and NextUB 767 768 769 #endif 770 // CHECK1-LABEL: define {{[^@]+}}@main 771 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 772 // CHECK1-NEXT: entry: 773 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 774 // CHECK1-NEXT: [[A:%.*]] = alloca double*, align 8 775 // CHECK1-NEXT: [[B:%.*]] = alloca double*, align 8 776 // CHECK1-NEXT: [[C:%.*]] = alloca double*, align 8 777 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 778 // CHECK1-NEXT: [[CH:%.*]] = alloca i32, align 4 779 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 780 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 781 // CHECK1-NEXT: store i32 10000, i32* [[N]], align 4 782 // CHECK1-NEXT: store i32 100, i32* [[CH]], align 4 783 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 784 // CHECK1-NEXT: store i32* [[N]], i32** [[TMP0]], align 8 785 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 786 // CHECK1-NEXT: store double** [[A]], double*** [[TMP1]], align 8 787 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 788 // CHECK1-NEXT: store double** [[B]], double*** [[TMP2]], align 8 789 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 790 // CHECK1-NEXT: store double** [[C]], double*** [[TMP3]], align 8 791 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 792 // CHECK1-NEXT: store i32* [[CH]], i32** [[TMP4]], align 8 793 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(40) [[REF_TMP]]) 794 // CHECK1-NEXT: ret i32 0 795 // 796 // 797 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 798 // CHECK1-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2:[0-9]+]] { 799 // CHECK1-NEXT: entry: 800 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 801 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 802 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 803 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 804 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 805 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 806 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 807 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 808 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 809 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 810 // CHECK1-NEXT: ret void 811 // 812 // 813 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 814 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 815 // CHECK1-NEXT: entry: 816 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 817 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 818 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 819 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 820 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 821 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 822 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 823 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 824 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 825 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 826 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 827 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 828 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 829 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 830 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 831 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 832 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 833 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 834 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 835 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 836 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 837 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 838 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 839 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 840 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 841 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 842 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 843 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 844 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 845 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 846 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 847 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 848 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 849 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 850 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 851 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 852 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 853 // CHECK1: omp.precond.then: 854 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 855 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 856 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 857 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 858 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 859 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 860 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 861 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 862 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 863 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 864 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 865 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 866 // CHECK1: cond.true: 867 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 868 // CHECK1-NEXT: br label [[COND_END:%.*]] 869 // CHECK1: cond.false: 870 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK1-NEXT: br label [[COND_END]] 872 // CHECK1: cond.end: 873 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 874 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 875 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 876 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 877 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 878 // CHECK1: omp.inner.for.cond: 879 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 880 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 881 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 882 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 883 // CHECK1: omp.inner.for.body: 884 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 885 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 886 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 887 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 888 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 889 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 890 // CHECK1: omp.inner.for.inc: 891 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 892 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 893 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 894 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 895 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 896 // CHECK1: omp.inner.for.end: 897 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 898 // CHECK1: omp.loop.exit: 899 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 900 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 901 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 902 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 903 // CHECK1: omp.precond.end: 904 // CHECK1-NEXT: ret void 905 // 906 // 907 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 908 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 909 // CHECK1-NEXT: entry: 910 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 911 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 912 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 913 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 914 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 915 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 916 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 917 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 918 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 919 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 920 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 921 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 922 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 923 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 924 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 928 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 929 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 930 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 931 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 932 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 933 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 934 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 935 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 936 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 937 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 938 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 939 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 940 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 941 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 942 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 943 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 944 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 945 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 946 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 947 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 948 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 949 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 950 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 951 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 952 // CHECK1: omp.precond.then: 953 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 954 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 955 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 956 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 957 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 958 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 959 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 960 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 961 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 962 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 963 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 964 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 965 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 966 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 967 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 968 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 969 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 970 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 971 // CHECK1: cond.true: 972 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 973 // CHECK1-NEXT: br label [[COND_END:%.*]] 974 // CHECK1: cond.false: 975 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 976 // CHECK1-NEXT: br label [[COND_END]] 977 // CHECK1: cond.end: 978 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 979 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 980 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 981 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 982 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 983 // CHECK1: omp.inner.for.cond: 984 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 985 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 986 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 987 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 988 // CHECK1: omp.inner.for.body: 989 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 990 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 991 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 992 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 993 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 994 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 995 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 996 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 997 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 998 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 999 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1000 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1001 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1002 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1003 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1004 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1005 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1006 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1007 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1008 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1009 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1010 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1011 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1012 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1013 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1014 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1015 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1016 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1017 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1018 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1019 // CHECK1: omp.body.continue: 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1021 // CHECK1: omp.inner.for.inc: 1022 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1023 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1024 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1025 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1026 // CHECK1: omp.inner.for.end: 1027 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1028 // CHECK1: omp.loop.exit: 1029 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1030 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1031 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1032 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1033 // CHECK1: omp.precond.end: 1034 // CHECK1-NEXT: ret void 1035 // 1036 // 1037 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 1038 // CHECK1-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 1039 // CHECK1-NEXT: entry: 1040 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1041 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1042 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1043 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1044 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1045 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1046 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1047 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1048 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1049 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1050 // CHECK1-NEXT: ret void 1051 // 1052 // 1053 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 1054 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1055 // CHECK1-NEXT: entry: 1056 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1057 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1058 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1059 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1060 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1061 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1062 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1063 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1064 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1065 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1066 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1067 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1068 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1069 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1070 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1071 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1072 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1073 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1074 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1075 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1076 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1077 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1078 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1079 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1080 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1081 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1082 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1083 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1084 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1085 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1086 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1087 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1088 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1089 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1090 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1091 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1092 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1093 // CHECK1: omp.precond.then: 1094 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1095 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1096 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1097 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1098 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1099 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1100 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1101 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1102 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1103 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1104 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1105 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1106 // CHECK1: cond.true: 1107 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1108 // CHECK1-NEXT: br label [[COND_END:%.*]] 1109 // CHECK1: cond.false: 1110 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1111 // CHECK1-NEXT: br label [[COND_END]] 1112 // CHECK1: cond.end: 1113 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1114 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1115 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1116 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1117 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1118 // CHECK1: omp.inner.for.cond: 1119 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1120 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1121 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1122 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1123 // CHECK1: omp.inner.for.body: 1124 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1125 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1126 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1127 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1128 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 1129 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1130 // CHECK1: omp.inner.for.inc: 1131 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1132 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1133 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1134 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1135 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1136 // CHECK1: omp.inner.for.end: 1137 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1138 // CHECK1: omp.loop.exit: 1139 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1140 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1141 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1142 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1143 // CHECK1: omp.precond.end: 1144 // CHECK1-NEXT: ret void 1145 // 1146 // 1147 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 1148 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1149 // CHECK1-NEXT: entry: 1150 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1151 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1152 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1153 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1154 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1155 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1156 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1157 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1158 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1159 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1160 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1161 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1162 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1163 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1164 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1165 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1166 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1167 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1168 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1169 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1170 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1171 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1172 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1173 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1174 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1175 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1176 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1177 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1178 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1179 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1180 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1181 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1182 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1184 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1185 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1186 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1187 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1188 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1189 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1190 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1191 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1192 // CHECK1: omp.precond.then: 1193 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1194 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1195 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1196 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1197 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1198 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1199 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1200 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1201 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1202 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1203 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1204 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1205 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1206 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1207 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1208 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1209 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1210 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1211 // CHECK1: cond.true: 1212 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1213 // CHECK1-NEXT: br label [[COND_END:%.*]] 1214 // CHECK1: cond.false: 1215 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1216 // CHECK1-NEXT: br label [[COND_END]] 1217 // CHECK1: cond.end: 1218 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1219 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1220 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1221 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1223 // CHECK1: omp.inner.for.cond: 1224 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1225 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1226 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1227 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1228 // CHECK1: omp.inner.for.body: 1229 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1230 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1231 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1232 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1233 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1234 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1235 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1236 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1237 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1238 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1239 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1240 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1241 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1242 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1243 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1244 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1245 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1246 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1247 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1248 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1249 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1250 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1251 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1252 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1253 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 1254 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1255 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 1256 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1257 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1258 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1259 // CHECK1: omp.body.continue: 1260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1261 // CHECK1: omp.inner.for.inc: 1262 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1263 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1264 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1265 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1266 // CHECK1: omp.inner.for.end: 1267 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1268 // CHECK1: omp.loop.exit: 1269 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1270 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1271 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1272 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1273 // CHECK1: omp.precond.end: 1274 // CHECK1-NEXT: ret void 1275 // 1276 // 1277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 1278 // CHECK1-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 1279 // CHECK1-NEXT: entry: 1280 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1281 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1282 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1283 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1284 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1285 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 1286 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1287 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1288 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1289 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1290 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 1291 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1292 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1293 // CHECK1-NEXT: ret void 1294 // 1295 // 1296 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1297 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1298 // CHECK1-NEXT: entry: 1299 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1300 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1301 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 1302 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1303 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1304 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1305 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1306 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1307 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1308 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1309 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1310 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1311 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1312 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1313 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1314 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1315 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1316 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1317 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1318 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 1319 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1320 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1321 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1322 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1323 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 1324 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1325 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 1326 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 1327 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 1328 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 1329 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1330 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1331 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1332 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1333 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1334 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1335 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1336 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1337 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1338 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1339 // CHECK1: omp.precond.then: 1340 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1341 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1342 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 1343 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1344 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1345 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 1346 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1347 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1348 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 1349 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1350 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1351 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1352 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1353 // CHECK1: cond.true: 1354 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1355 // CHECK1-NEXT: br label [[COND_END:%.*]] 1356 // CHECK1: cond.false: 1357 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1358 // CHECK1-NEXT: br label [[COND_END]] 1359 // CHECK1: cond.end: 1360 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1361 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1362 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1363 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1365 // CHECK1: omp.inner.for.cond: 1366 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1367 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1368 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 1369 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 1370 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1371 // CHECK1: omp.inner.for.body: 1372 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1373 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1374 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1375 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 1377 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1378 // CHECK1: omp.inner.for.inc: 1379 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1380 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1381 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1382 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1383 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1384 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1385 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1386 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 1387 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1388 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1389 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 1390 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 1391 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1392 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1393 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 1394 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 1395 // CHECK1: cond.true10: 1396 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1397 // CHECK1-NEXT: br label [[COND_END12:%.*]] 1398 // CHECK1: cond.false11: 1399 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1400 // CHECK1-NEXT: br label [[COND_END12]] 1401 // CHECK1: cond.end12: 1402 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 1403 // CHECK1-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 1404 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1405 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 1406 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1407 // CHECK1: omp.inner.for.end: 1408 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1409 // CHECK1: omp.loop.exit: 1410 // CHECK1-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1411 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 1412 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 1413 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1414 // CHECK1: omp.precond.end: 1415 // CHECK1-NEXT: ret void 1416 // 1417 // 1418 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 1419 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1420 // CHECK1-NEXT: entry: 1421 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1422 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1423 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1424 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1425 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1426 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1427 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1428 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1429 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1430 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1431 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1432 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1434 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1435 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1436 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1437 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1438 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1439 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8 1440 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1441 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1442 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1443 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1444 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1445 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1446 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1447 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1448 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1449 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1450 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1451 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1452 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1453 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1454 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1455 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1456 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1457 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1458 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1459 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1460 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1461 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1462 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1463 // CHECK1: omp.precond.then: 1464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1465 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1466 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1467 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1468 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1469 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1470 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1471 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1472 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1473 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1475 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1476 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1477 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1478 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1479 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1480 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1481 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1482 // CHECK1: cond.true: 1483 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1484 // CHECK1-NEXT: br label [[COND_END:%.*]] 1485 // CHECK1: cond.false: 1486 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1487 // CHECK1-NEXT: br label [[COND_END]] 1488 // CHECK1: cond.end: 1489 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1490 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1491 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1492 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1494 // CHECK1: omp.inner.for.cond: 1495 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1496 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1497 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1498 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1499 // CHECK1: omp.inner.for.body: 1500 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1501 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1502 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1503 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1504 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1505 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1506 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1507 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1508 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1509 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1510 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1511 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1512 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1513 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1514 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1515 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1516 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1517 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1518 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1519 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1520 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 1521 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1522 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 1523 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1524 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 1525 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1526 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 1527 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1528 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1529 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1530 // CHECK1: omp.body.continue: 1531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1532 // CHECK1: omp.inner.for.inc: 1533 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1534 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1535 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1536 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1537 // CHECK1: omp.inner.for.end: 1538 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1539 // CHECK1: omp.loop.exit: 1540 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1541 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1542 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1543 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1544 // CHECK1: omp.precond.end: 1545 // CHECK1-NEXT: ret void 1546 // 1547 // 1548 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 1549 // CHECK1-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 1550 // CHECK1-NEXT: entry: 1551 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1552 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1553 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1554 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1555 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1556 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1557 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1558 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1559 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1560 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1561 // CHECK1-NEXT: ret void 1562 // 1563 // 1564 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1565 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1566 // CHECK1-NEXT: entry: 1567 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1568 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1569 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1570 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1571 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1572 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1573 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1574 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1575 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1576 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1577 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1578 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1579 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1580 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1581 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1582 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1583 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1584 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1585 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1586 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1587 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1588 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1589 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1590 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1591 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1592 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1593 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1594 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1595 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1596 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1597 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1598 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1599 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1600 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1601 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1602 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1603 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1604 // CHECK1: omp.precond.then: 1605 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1606 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1607 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1608 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1609 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1610 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1611 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1612 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1613 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1614 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1615 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1616 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1617 // CHECK1: cond.true: 1618 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1619 // CHECK1-NEXT: br label [[COND_END:%.*]] 1620 // CHECK1: cond.false: 1621 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1622 // CHECK1-NEXT: br label [[COND_END]] 1623 // CHECK1: cond.end: 1624 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1625 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1626 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1627 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1628 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1629 // CHECK1: omp.inner.for.cond: 1630 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1631 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1632 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1633 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1634 // CHECK1: omp.inner.for.body: 1635 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1636 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1637 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1638 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1639 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 1640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1641 // CHECK1: omp.inner.for.inc: 1642 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1643 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1644 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1645 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1647 // CHECK1: omp.inner.for.end: 1648 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1649 // CHECK1: omp.loop.exit: 1650 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1651 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1652 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1653 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1654 // CHECK1: omp.precond.end: 1655 // CHECK1-NEXT: ret void 1656 // 1657 // 1658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1659 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1660 // CHECK1-NEXT: entry: 1661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1663 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1664 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1665 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1666 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1667 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1668 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1669 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1670 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1671 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1672 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1673 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1674 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1675 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1676 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1677 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1678 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1679 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 8 1680 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1681 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1682 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1683 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1684 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1685 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1686 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1687 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1688 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1689 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1690 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1691 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1693 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1694 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1695 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1696 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1697 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1698 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1699 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1700 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1701 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1702 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1703 // CHECK1: omp.precond.then: 1704 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1705 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1706 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1707 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1708 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1709 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1710 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1711 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1712 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1713 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1714 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1715 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1716 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1717 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1718 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1719 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1720 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1721 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1722 // CHECK1: cond.true: 1723 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1724 // CHECK1-NEXT: br label [[COND_END:%.*]] 1725 // CHECK1: cond.false: 1726 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1727 // CHECK1-NEXT: br label [[COND_END]] 1728 // CHECK1: cond.end: 1729 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1730 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1731 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1732 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1734 // CHECK1: omp.inner.for.cond: 1735 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1736 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1737 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1738 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1739 // CHECK1: omp.inner.for.body: 1740 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1741 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1742 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1743 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1744 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1745 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1746 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1747 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1748 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1749 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1750 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1751 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1752 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1753 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1754 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1755 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1756 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1757 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1758 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1759 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1760 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 1761 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1762 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 1763 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1764 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 1765 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1766 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 1767 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1768 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1769 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1770 // CHECK1: omp.body.continue: 1771 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1772 // CHECK1: omp.inner.for.inc: 1773 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1774 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1775 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1776 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1777 // CHECK1: omp.inner.for.end: 1778 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1779 // CHECK1: omp.loop.exit: 1780 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1781 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1782 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1783 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1784 // CHECK1: omp.precond.end: 1785 // CHECK1-NEXT: ret void 1786 // 1787 // 1788 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 1789 // CHECK1-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 1790 // CHECK1-NEXT: entry: 1791 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1792 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1793 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1794 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1795 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1796 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 1797 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1798 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1799 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1800 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1801 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 1802 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1803 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1804 // CHECK1-NEXT: ret void 1805 // 1806 // 1807 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1808 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1809 // CHECK1-NEXT: entry: 1810 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1811 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1812 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 1813 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1814 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1815 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1816 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1817 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1818 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1819 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1820 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1821 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1822 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1823 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1824 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1825 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1826 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1827 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1828 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1829 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1830 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1831 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 1832 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1833 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1834 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1835 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1836 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 1837 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1838 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 1839 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 1840 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 1841 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1842 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1843 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1844 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1845 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1846 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1847 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1848 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1849 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1850 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1851 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1852 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1853 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1854 // CHECK1: omp.precond.then: 1855 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1856 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1857 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 1858 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1859 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1860 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1861 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1862 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1863 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1864 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1865 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1866 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1867 // CHECK1: cond.true: 1868 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1869 // CHECK1-NEXT: br label [[COND_END:%.*]] 1870 // CHECK1: cond.false: 1871 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1872 // CHECK1-NEXT: br label [[COND_END]] 1873 // CHECK1: cond.end: 1874 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1875 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1876 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1877 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1878 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1879 // CHECK1: omp.inner.for.cond: 1880 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1881 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1882 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1883 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1884 // CHECK1: omp.inner.for.body: 1885 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1886 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1887 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1888 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1889 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1890 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1891 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 1892 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1893 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 1894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1895 // CHECK1: omp.inner.for.inc: 1896 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1897 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1898 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1899 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1900 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1901 // CHECK1: omp.inner.for.end: 1902 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1903 // CHECK1: omp.loop.exit: 1904 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1905 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1906 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 1907 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1908 // CHECK1: omp.precond.end: 1909 // CHECK1-NEXT: ret void 1910 // 1911 // 1912 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1913 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1914 // CHECK1-NEXT: entry: 1915 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1916 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1917 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1918 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1919 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1920 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1921 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1922 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1923 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1924 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1925 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1926 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1927 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1928 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1929 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1930 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1931 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1932 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1933 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 1934 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 1935 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1936 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1937 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1938 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1939 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1940 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1941 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1942 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1943 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1944 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1945 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1946 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1947 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1948 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1949 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1950 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1951 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1952 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1953 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1954 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1955 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1956 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1957 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1958 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1959 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1960 // CHECK1: omp.precond.then: 1961 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1962 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1963 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1964 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1965 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 1966 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1967 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 1968 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 1969 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 1970 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1971 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1972 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 1973 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1974 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1975 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 1976 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1977 // CHECK1: omp.dispatch.cond: 1978 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1979 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1980 // CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 1981 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 1982 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1983 // CHECK1: cond.true: 1984 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1985 // CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 1986 // CHECK1-NEXT: br label [[COND_END:%.*]] 1987 // CHECK1: cond.false: 1988 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1989 // CHECK1-NEXT: br label [[COND_END]] 1990 // CHECK1: cond.end: 1991 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 1992 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1993 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1994 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 1995 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1996 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1997 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1998 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1999 // CHECK1: omp.dispatch.body: 2000 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2001 // CHECK1: omp.inner.for.cond: 2002 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2003 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2004 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2005 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2006 // CHECK1: omp.inner.for.body: 2007 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2008 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2009 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2010 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 2011 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 2012 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 2013 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2014 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 2015 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 2016 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 2017 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 2018 // CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 2019 // CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 2020 // CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 2021 // CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 2022 // CHECK1-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 2023 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 2024 // CHECK1-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 2025 // CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 2026 // CHECK1-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 2027 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 2028 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8 2029 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 2030 // CHECK1-NEXT: store i32* [[I6]], i32** [[TMP32]], align 8 2031 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 2032 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 8 2033 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 2034 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 8 2035 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 2036 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2037 // CHECK1: omp.body.continue: 2038 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2039 // CHECK1: omp.inner.for.inc: 2040 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2041 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 2042 // CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2043 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2044 // CHECK1: omp.inner.for.end: 2045 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2046 // CHECK1: omp.dispatch.inc: 2047 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2048 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2049 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 2050 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 2051 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2052 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2053 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 2054 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 2055 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2056 // CHECK1: omp.dispatch.end: 2057 // CHECK1-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2058 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 2059 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 2060 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2061 // CHECK1: omp.precond.end: 2062 // CHECK1-NEXT: ret void 2063 // 2064 // 2065 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 2066 // CHECK1-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 2067 // CHECK1-NEXT: entry: 2068 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2069 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2070 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2071 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2072 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2073 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2074 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2075 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2076 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2077 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2078 // CHECK1-NEXT: ret void 2079 // 2080 // 2081 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18 2082 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2083 // CHECK1-NEXT: entry: 2084 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2085 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2086 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2087 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2088 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2089 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2090 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2091 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2092 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2093 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2094 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2095 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2096 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2097 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2098 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2099 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 2100 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2101 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2102 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2103 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2104 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2105 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2107 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2108 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2109 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2110 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2111 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2112 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2113 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2114 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2115 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2116 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2117 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2118 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2119 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2120 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2121 // CHECK1: omp.precond.then: 2122 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2123 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2124 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2125 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2126 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2127 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2128 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2129 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2130 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2131 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2132 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2133 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2134 // CHECK1: cond.true: 2135 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2136 // CHECK1-NEXT: br label [[COND_END:%.*]] 2137 // CHECK1: cond.false: 2138 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2139 // CHECK1-NEXT: br label [[COND_END]] 2140 // CHECK1: cond.end: 2141 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2142 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2143 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2144 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2145 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2146 // CHECK1: omp.inner.for.cond: 2147 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2148 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2149 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2150 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2151 // CHECK1: omp.inner.for.body: 2152 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2153 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2154 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2155 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2157 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2158 // CHECK1: omp.inner.for.inc: 2159 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2160 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2161 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2162 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2163 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2164 // CHECK1: omp.inner.for.end: 2165 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2166 // CHECK1: omp.loop.exit: 2167 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2168 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2169 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2170 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2171 // CHECK1: omp.precond.end: 2172 // CHECK1-NEXT: ret void 2173 // 2174 // 2175 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..19 2176 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2177 // CHECK1-NEXT: entry: 2178 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2179 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2180 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2181 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2182 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2183 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2184 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2185 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2186 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2187 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2188 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2189 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2190 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2191 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2192 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2193 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2194 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2195 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2196 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 8 2197 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2198 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2199 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2200 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2201 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2202 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2203 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2204 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2206 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2207 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2208 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2209 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2210 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2211 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2212 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2213 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2214 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2215 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2216 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2217 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2218 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2219 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2220 // CHECK1: omp.precond.then: 2221 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2222 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2223 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2224 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2225 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2226 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2227 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 2228 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2229 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2230 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2231 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2232 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2233 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2234 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2235 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2236 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 2237 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2238 // CHECK1: omp.dispatch.cond: 2239 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2240 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2241 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2242 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 2243 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2244 // CHECK1: omp.dispatch.body: 2245 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2246 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 2247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2248 // CHECK1: omp.inner.for.cond: 2249 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2250 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2251 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 2252 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2253 // CHECK1: omp.inner.for.body: 2254 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2255 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 2256 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2257 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 2258 // CHECK1-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !12 2259 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2260 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 2261 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 2262 // CHECK1-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !12 2263 // CHECK1-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !12 2264 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2265 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 2266 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 2267 // CHECK1-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !12 2268 // CHECK1-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 2269 // CHECK1-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !12 2270 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2271 // CHECK1-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 2272 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 2273 // CHECK1-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !12 2274 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 2275 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 8, !llvm.access.group !12 2276 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 2277 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP30]], align 8, !llvm.access.group !12 2278 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 2279 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 8, !llvm.access.group !12 2280 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 2281 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 8, !llvm.access.group !12 2282 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !12 2283 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2284 // CHECK1: omp.body.continue: 2285 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2286 // CHECK1: omp.inner.for.inc: 2287 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2288 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP33]], 1 2289 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2290 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2291 // CHECK1: omp.inner.for.end: 2292 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2293 // CHECK1: omp.dispatch.inc: 2294 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2295 // CHECK1: omp.dispatch.end: 2296 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2297 // CHECK1: omp.precond.end: 2298 // CHECK1-NEXT: ret void 2299 // 2300 // 2301 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 2302 // CHECK1-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 2303 // CHECK1-NEXT: entry: 2304 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 2305 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2306 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2307 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2308 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2309 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 2310 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2311 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2312 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2313 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2314 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 2315 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2316 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2317 // CHECK1-NEXT: ret void 2318 // 2319 // 2320 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22 2321 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2322 // CHECK1-NEXT: entry: 2323 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2324 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2325 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 2326 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2327 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2328 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2329 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2330 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2331 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2332 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2333 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2334 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2335 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2336 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2337 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2338 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2339 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2340 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2341 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2342 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2343 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2344 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 2345 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2346 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2347 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2348 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2349 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 2350 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2351 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 2352 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 2353 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 2354 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2355 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2356 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2357 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2358 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2359 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2360 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2361 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2362 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2363 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2364 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2365 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2366 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2367 // CHECK1: omp.precond.then: 2368 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2369 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2370 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 2371 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2372 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2373 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2375 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2376 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2377 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2378 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2379 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2380 // CHECK1: cond.true: 2381 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2382 // CHECK1-NEXT: br label [[COND_END:%.*]] 2383 // CHECK1: cond.false: 2384 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2385 // CHECK1-NEXT: br label [[COND_END]] 2386 // CHECK1: cond.end: 2387 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2388 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2389 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2390 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 2391 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2392 // CHECK1: omp.inner.for.cond: 2393 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2394 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2395 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2396 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2397 // CHECK1: omp.inner.for.body: 2398 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2399 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2400 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2401 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 2402 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2403 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2404 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 2405 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2406 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 2407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2408 // CHECK1: omp.inner.for.inc: 2409 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2410 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2411 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 2412 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2414 // CHECK1: omp.inner.for.end: 2415 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2416 // CHECK1: omp.loop.exit: 2417 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2418 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 2419 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 2420 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2421 // CHECK1: omp.precond.end: 2422 // CHECK1-NEXT: ret void 2423 // 2424 // 2425 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..23 2426 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2427 // CHECK1-NEXT: entry: 2428 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2429 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2430 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2431 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2432 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2433 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2434 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2435 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2436 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2437 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2438 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2439 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2440 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2441 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2446 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 2447 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 8 2448 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2449 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2450 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2451 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2452 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2453 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2454 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2455 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2456 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2457 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2458 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2459 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2460 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2461 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2462 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2463 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2464 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2465 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2466 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2467 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2468 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2469 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2470 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2471 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2472 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2473 // CHECK1: omp.precond.then: 2474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2475 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2476 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2477 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2478 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 2479 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2480 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 2481 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 2482 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 2483 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2484 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2485 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 2486 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2487 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2488 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2489 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2490 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 2491 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2492 // CHECK1: omp.dispatch.cond: 2493 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2494 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2495 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2496 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 2497 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2498 // CHECK1: omp.dispatch.body: 2499 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2500 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2502 // CHECK1: omp.inner.for.cond: 2503 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2504 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 2505 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2506 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2507 // CHECK1: omp.inner.for.body: 2508 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !15 2512 // CHECK1-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !15 2513 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2514 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2515 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 2516 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !15 2517 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !15 2518 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2519 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 2520 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 2521 // CHECK1-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !15 2522 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 2523 // CHECK1-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !15 2524 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2525 // CHECK1-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 2526 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 2527 // CHECK1-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !15 2528 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 2529 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 8, !llvm.access.group !15 2530 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 2531 // CHECK1-NEXT: store i32* [[I6]], i32** [[TMP31]], align 8, !llvm.access.group !15 2532 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 2533 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 8, !llvm.access.group !15 2534 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 2535 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 8, !llvm.access.group !15 2536 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !15 2537 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2538 // CHECK1: omp.body.continue: 2539 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2540 // CHECK1: omp.inner.for.inc: 2541 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2542 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], 1 2543 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2545 // CHECK1: omp.inner.for.end: 2546 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2547 // CHECK1: omp.dispatch.inc: 2548 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2549 // CHECK1: omp.dispatch.end: 2550 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2551 // CHECK1: omp.precond.end: 2552 // CHECK1-NEXT: ret void 2553 // 2554 // 2555 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2556 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 2557 // CHECK1-NEXT: entry: 2558 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 2559 // CHECK1-NEXT: ret void 2560 // 2561 // 2562 // CHECK2-LABEL: define {{[^@]+}}@main 2563 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 2564 // CHECK2-NEXT: entry: 2565 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2566 // CHECK2-NEXT: [[A:%.*]] = alloca double*, align 8 2567 // CHECK2-NEXT: [[B:%.*]] = alloca double*, align 8 2568 // CHECK2-NEXT: [[C:%.*]] = alloca double*, align 8 2569 // CHECK2-NEXT: [[N:%.*]] = alloca i32, align 4 2570 // CHECK2-NEXT: [[CH:%.*]] = alloca i32, align 4 2571 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 2572 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 2573 // CHECK2-NEXT: store i32 10000, i32* [[N]], align 4 2574 // CHECK2-NEXT: store i32 100, i32* [[CH]], align 4 2575 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 2576 // CHECK2-NEXT: store i32* [[N]], i32** [[TMP0]], align 8 2577 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 2578 // CHECK2-NEXT: store double** [[A]], double*** [[TMP1]], align 8 2579 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 2580 // CHECK2-NEXT: store double** [[B]], double*** [[TMP2]], align 8 2581 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 2582 // CHECK2-NEXT: store double** [[C]], double*** [[TMP3]], align 8 2583 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 2584 // CHECK2-NEXT: store i32* [[CH]], i32** [[TMP4]], align 8 2585 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(40) [[REF_TMP]]) 2586 // CHECK2-NEXT: ret i32 0 2587 // 2588 // 2589 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 2590 // CHECK2-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2:[0-9]+]] { 2591 // CHECK2-NEXT: entry: 2592 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2593 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2594 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2595 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2596 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2597 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2598 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2599 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2600 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2601 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2602 // CHECK2-NEXT: ret void 2603 // 2604 // 2605 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 2606 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2607 // CHECK2-NEXT: entry: 2608 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2609 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2610 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2611 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2612 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2613 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2614 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2615 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2616 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2617 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2618 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2619 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2620 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2621 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2622 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2623 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 2624 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2625 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2626 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2627 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2628 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2629 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2630 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2631 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2632 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2633 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2634 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2635 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2636 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2637 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2638 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2639 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2640 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2641 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 2642 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2643 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2644 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2645 // CHECK2: omp.precond.then: 2646 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2647 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2648 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2649 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2650 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2651 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2652 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2653 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2654 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2655 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2656 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2657 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2658 // CHECK2: cond.true: 2659 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2660 // CHECK2-NEXT: br label [[COND_END:%.*]] 2661 // CHECK2: cond.false: 2662 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2663 // CHECK2-NEXT: br label [[COND_END]] 2664 // CHECK2: cond.end: 2665 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2666 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2667 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2668 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2669 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2670 // CHECK2: omp.inner.for.cond: 2671 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2672 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2673 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2674 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2675 // CHECK2: omp.inner.for.body: 2676 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2677 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2678 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2679 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2680 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2681 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2682 // CHECK2: omp.inner.for.inc: 2683 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2684 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2685 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2686 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2687 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2688 // CHECK2: omp.inner.for.end: 2689 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2690 // CHECK2: omp.loop.exit: 2691 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2692 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2693 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2694 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 2695 // CHECK2: omp.precond.end: 2696 // CHECK2-NEXT: ret void 2697 // 2698 // 2699 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 2700 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2701 // CHECK2-NEXT: entry: 2702 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2703 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2704 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2705 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2706 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2707 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2708 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2709 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2710 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2711 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2712 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2713 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2714 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2715 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2716 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2717 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2718 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2719 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 2720 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2721 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2722 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2723 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2724 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2725 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2726 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2727 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2728 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2729 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2730 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2731 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2732 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2733 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2734 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2735 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2736 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2737 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2738 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2739 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2740 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 2741 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2742 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2743 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2744 // CHECK2: omp.precond.then: 2745 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2746 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2747 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2748 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2749 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2750 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2751 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 2752 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2753 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2754 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2755 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2756 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2757 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2758 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2759 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2760 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2761 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2762 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2763 // CHECK2: cond.true: 2764 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2765 // CHECK2-NEXT: br label [[COND_END:%.*]] 2766 // CHECK2: cond.false: 2767 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2768 // CHECK2-NEXT: br label [[COND_END]] 2769 // CHECK2: cond.end: 2770 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2771 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2772 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2773 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 2774 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2775 // CHECK2: omp.inner.for.cond: 2776 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2777 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2778 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2779 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2780 // CHECK2: omp.inner.for.body: 2781 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2782 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2783 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2784 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 2785 // CHECK2-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 2786 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 2787 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 2788 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 2789 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 2790 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 2791 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 2792 // CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 2793 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 2794 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 2795 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 2796 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 2797 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 2798 // CHECK2-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 2799 // CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 2800 // CHECK2-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 2801 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2802 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 2803 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 2804 // CHECK2-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 2805 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 2806 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 2807 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 2808 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 2809 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 2810 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2811 // CHECK2: omp.body.continue: 2812 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2813 // CHECK2: omp.inner.for.inc: 2814 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2815 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 2816 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 2817 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2818 // CHECK2: omp.inner.for.end: 2819 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2820 // CHECK2: omp.loop.exit: 2821 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2822 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2823 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2824 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 2825 // CHECK2: omp.precond.end: 2826 // CHECK2-NEXT: ret void 2827 // 2828 // 2829 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 2830 // CHECK2-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 2831 // CHECK2-NEXT: entry: 2832 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2833 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2834 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2835 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2836 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2837 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2838 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2839 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2840 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2841 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2842 // CHECK2-NEXT: ret void 2843 // 2844 // 2845 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 2846 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2847 // CHECK2-NEXT: entry: 2848 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2849 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2850 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2851 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2852 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2853 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2854 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2855 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2856 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2857 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2858 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2859 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2860 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2861 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2862 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2863 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 2864 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2865 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2866 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2867 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2868 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2869 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2870 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2871 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2872 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2873 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2874 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2875 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2876 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2877 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2878 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2879 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2880 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2881 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 2882 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2883 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2884 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2885 // CHECK2: omp.precond.then: 2886 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2887 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2888 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2889 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2890 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2891 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2892 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2893 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2894 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2895 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2896 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2897 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2898 // CHECK2: cond.true: 2899 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2900 // CHECK2-NEXT: br label [[COND_END:%.*]] 2901 // CHECK2: cond.false: 2902 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2903 // CHECK2-NEXT: br label [[COND_END]] 2904 // CHECK2: cond.end: 2905 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2906 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2907 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2908 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2909 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2910 // CHECK2: omp.inner.for.cond: 2911 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2912 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2913 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2914 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2915 // CHECK2: omp.inner.for.body: 2916 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2917 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2918 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2919 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2920 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2921 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2922 // CHECK2: omp.inner.for.inc: 2923 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2924 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2925 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2926 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2927 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2928 // CHECK2: omp.inner.for.end: 2929 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2930 // CHECK2: omp.loop.exit: 2931 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2932 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2933 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2934 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 2935 // CHECK2: omp.precond.end: 2936 // CHECK2-NEXT: ret void 2937 // 2938 // 2939 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 2940 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2941 // CHECK2-NEXT: entry: 2942 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2943 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2944 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2945 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2946 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2947 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2948 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2949 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2950 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2951 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2952 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2953 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2954 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2955 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2956 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2957 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2958 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2959 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 2960 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 2961 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2962 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2963 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2964 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2965 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2966 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2967 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2968 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2969 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2970 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2971 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2972 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2973 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2974 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2975 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2976 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2977 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2978 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2979 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2980 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 2981 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2982 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2983 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2984 // CHECK2: omp.precond.then: 2985 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2986 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2987 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2988 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2989 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2990 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2991 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 2992 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2993 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2994 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2995 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2996 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2997 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2998 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2999 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3000 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3001 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3002 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3003 // CHECK2: cond.true: 3004 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3005 // CHECK2-NEXT: br label [[COND_END:%.*]] 3006 // CHECK2: cond.false: 3007 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3008 // CHECK2-NEXT: br label [[COND_END]] 3009 // CHECK2: cond.end: 3010 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3011 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3012 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3013 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3014 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3015 // CHECK2: omp.inner.for.cond: 3016 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3017 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3018 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3019 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3020 // CHECK2: omp.inner.for.body: 3021 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3022 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3023 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3024 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 3025 // CHECK2-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 3026 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 3027 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 3028 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 3029 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 3030 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 3031 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 3032 // CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 3033 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 3034 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 3035 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 3036 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 3037 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 3038 // CHECK2-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 3039 // CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 3040 // CHECK2-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 3041 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 3042 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 3043 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 3044 // CHECK2-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 3045 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 3046 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 3047 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 3048 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 3049 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3050 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3051 // CHECK2: omp.body.continue: 3052 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3053 // CHECK2: omp.inner.for.inc: 3054 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3055 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 3056 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3057 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3058 // CHECK2: omp.inner.for.end: 3059 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3060 // CHECK2: omp.loop.exit: 3061 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3062 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3063 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3064 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3065 // CHECK2: omp.precond.end: 3066 // CHECK2-NEXT: ret void 3067 // 3068 // 3069 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 3070 // CHECK2-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 3071 // CHECK2-NEXT: entry: 3072 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 3073 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3074 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 3075 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 3076 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 3077 // CHECK2-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 3078 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3079 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 3080 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 3081 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 3082 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 3083 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3084 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3085 // CHECK2-NEXT: ret void 3086 // 3087 // 3088 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 3089 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3090 // CHECK2-NEXT: entry: 3091 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3092 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3093 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 3094 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3095 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3096 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3097 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3098 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3099 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3100 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3101 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3102 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3103 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3104 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3105 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3106 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3107 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 3108 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3109 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3110 // CHECK2-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 3111 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3112 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3113 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3114 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3115 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 3116 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3117 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 3118 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 3119 // CHECK2-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 3120 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 3121 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3122 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3123 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3124 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3125 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3126 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3127 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3128 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3129 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3130 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3131 // CHECK2: omp.precond.then: 3132 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3133 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3134 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 3135 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3136 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3137 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 3138 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3139 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3140 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 3141 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3142 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3143 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3144 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3145 // CHECK2: cond.true: 3146 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3147 // CHECK2-NEXT: br label [[COND_END:%.*]] 3148 // CHECK2: cond.false: 3149 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3150 // CHECK2-NEXT: br label [[COND_END]] 3151 // CHECK2: cond.end: 3152 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3153 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3154 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3155 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3156 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3157 // CHECK2: omp.inner.for.cond: 3158 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3159 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3160 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3161 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3162 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3163 // CHECK2: omp.inner.for.body: 3164 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3165 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3166 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3167 // CHECK2-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 3168 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 3169 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3170 // CHECK2: omp.inner.for.inc: 3171 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3172 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3173 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3174 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3175 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3176 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3177 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 3178 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 3179 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3180 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3181 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 3182 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 3183 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3184 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3185 // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 3186 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 3187 // CHECK2: cond.true10: 3188 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3189 // CHECK2-NEXT: br label [[COND_END12:%.*]] 3190 // CHECK2: cond.false11: 3191 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3192 // CHECK2-NEXT: br label [[COND_END12]] 3193 // CHECK2: cond.end12: 3194 // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 3195 // CHECK2-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 3196 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3197 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 3198 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3199 // CHECK2: omp.inner.for.end: 3200 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3201 // CHECK2: omp.loop.exit: 3202 // CHECK2-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3203 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 3204 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 3205 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3206 // CHECK2: omp.precond.end: 3207 // CHECK2-NEXT: ret void 3208 // 3209 // 3210 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 3211 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3212 // CHECK2-NEXT: entry: 3213 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3214 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3215 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3216 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3217 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3218 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3219 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3220 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3221 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3222 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3223 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3224 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3225 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3226 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3227 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3228 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3229 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3230 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 3231 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8 3232 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3233 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3234 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3235 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3236 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3237 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3238 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3239 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3240 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3241 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3242 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 3243 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 3244 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3245 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3246 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3247 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3248 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3249 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3250 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3251 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3252 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3253 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3254 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3255 // CHECK2: omp.precond.then: 3256 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3257 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3258 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3259 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3260 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 3261 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3262 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 3263 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3264 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3265 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3266 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3267 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3268 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3269 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3270 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3271 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3272 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3273 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3274 // CHECK2: cond.true: 3275 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3276 // CHECK2-NEXT: br label [[COND_END:%.*]] 3277 // CHECK2: cond.false: 3278 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3279 // CHECK2-NEXT: br label [[COND_END]] 3280 // CHECK2: cond.end: 3281 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3282 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3283 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3284 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3285 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3286 // CHECK2: omp.inner.for.cond: 3287 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3288 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3289 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3290 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3291 // CHECK2: omp.inner.for.body: 3292 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3293 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3294 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3295 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 3296 // CHECK2-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 3297 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 3298 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 3299 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 3300 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 3301 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 3302 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 3303 // CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 3304 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 3305 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 3306 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 3307 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 3308 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 3309 // CHECK2-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 3310 // CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 3311 // CHECK2-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 3312 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 3313 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 3314 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 3315 // CHECK2-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 3316 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 3317 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 3318 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 3319 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 3320 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3321 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3322 // CHECK2: omp.body.continue: 3323 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3324 // CHECK2: omp.inner.for.inc: 3325 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3326 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 3327 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3328 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3329 // CHECK2: omp.inner.for.end: 3330 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3331 // CHECK2: omp.loop.exit: 3332 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3333 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3334 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3335 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3336 // CHECK2: omp.precond.end: 3337 // CHECK2-NEXT: ret void 3338 // 3339 // 3340 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 3341 // CHECK2-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 3342 // CHECK2-NEXT: entry: 3343 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3344 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 3345 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 3346 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 3347 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3348 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 3349 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 3350 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 3351 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3352 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3353 // CHECK2-NEXT: ret void 3354 // 3355 // 3356 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 3357 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3358 // CHECK2-NEXT: entry: 3359 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3360 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3361 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3362 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3363 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3364 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3365 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3366 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3367 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3368 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3369 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3370 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3371 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3372 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3373 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3374 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 3375 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3376 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3377 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3378 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3379 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3380 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3381 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3382 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3383 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 3384 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 3385 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3386 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3387 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3388 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3389 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3390 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3391 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3392 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3393 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3394 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3395 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3396 // CHECK2: omp.precond.then: 3397 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3398 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3399 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3400 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3401 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3402 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3403 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3404 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3405 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3406 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3407 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3408 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3409 // CHECK2: cond.true: 3410 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3411 // CHECK2-NEXT: br label [[COND_END:%.*]] 3412 // CHECK2: cond.false: 3413 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3414 // CHECK2-NEXT: br label [[COND_END]] 3415 // CHECK2: cond.end: 3416 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3417 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3418 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3419 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3420 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3421 // CHECK2: omp.inner.for.cond: 3422 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3423 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3424 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3425 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3426 // CHECK2: omp.inner.for.body: 3427 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3428 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 3429 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3430 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3431 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 3432 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3433 // CHECK2: omp.inner.for.inc: 3434 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3435 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3436 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3437 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3438 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3439 // CHECK2: omp.inner.for.end: 3440 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3441 // CHECK2: omp.loop.exit: 3442 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3443 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3444 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 3445 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3446 // CHECK2: omp.precond.end: 3447 // CHECK2-NEXT: ret void 3448 // 3449 // 3450 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 3451 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3452 // CHECK2-NEXT: entry: 3453 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3454 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3455 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3456 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3457 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3458 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3459 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3460 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3461 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3462 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3463 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3464 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3465 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3466 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3467 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3468 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3469 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3470 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 3471 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 8 3472 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3473 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3474 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3475 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3476 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3477 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3478 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3479 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3480 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3481 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3482 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 3483 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 3484 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3485 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3486 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3487 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3488 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3489 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3490 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3491 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3492 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3493 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3494 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3495 // CHECK2: omp.precond.then: 3496 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3497 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3498 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3499 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3500 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 3501 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3502 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 3503 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3504 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 3505 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3506 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3507 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3508 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3509 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3510 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3511 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3512 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3513 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3514 // CHECK2: cond.true: 3515 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3516 // CHECK2-NEXT: br label [[COND_END:%.*]] 3517 // CHECK2: cond.false: 3518 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3519 // CHECK2-NEXT: br label [[COND_END]] 3520 // CHECK2: cond.end: 3521 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3522 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3523 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3524 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3525 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3526 // CHECK2: omp.inner.for.cond: 3527 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3528 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3529 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3530 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3531 // CHECK2: omp.inner.for.body: 3532 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3533 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3534 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3535 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 3536 // CHECK2-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 3537 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 3538 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 3539 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 3540 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 3541 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 3542 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 3543 // CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 3544 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 3545 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 3546 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 3547 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 3548 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 3549 // CHECK2-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 3550 // CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 3551 // CHECK2-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 3552 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 3553 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 3554 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 3555 // CHECK2-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 3556 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 3557 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 3558 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 3559 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 3560 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3561 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3562 // CHECK2: omp.body.continue: 3563 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3564 // CHECK2: omp.inner.for.inc: 3565 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3566 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 3567 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 3568 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3569 // CHECK2: omp.inner.for.end: 3570 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3571 // CHECK2: omp.loop.exit: 3572 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3573 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3574 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3575 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3576 // CHECK2: omp.precond.end: 3577 // CHECK2-NEXT: ret void 3578 // 3579 // 3580 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 3581 // CHECK2-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 3582 // CHECK2-NEXT: entry: 3583 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 3584 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3585 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 3586 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 3587 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 3588 // CHECK2-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 3589 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3590 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 3591 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 3592 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 3593 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 3594 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3595 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3596 // CHECK2-NEXT: ret void 3597 // 3598 // 3599 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 3600 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3601 // CHECK2-NEXT: entry: 3602 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3603 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3604 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 3605 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3606 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3607 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3608 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3609 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3610 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3611 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3612 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3613 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3614 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3615 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3616 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3617 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3618 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3619 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 3620 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3621 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3622 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3623 // CHECK2-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 3624 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3625 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3626 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3627 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3628 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 3629 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3630 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 3631 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 3632 // CHECK2-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 3633 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3634 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3635 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3636 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3637 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3638 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3639 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3640 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3641 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3642 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3643 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3644 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 3645 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3646 // CHECK2: omp.precond.then: 3647 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3648 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3649 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 3650 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3651 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3652 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3653 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3654 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3655 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3656 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3657 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3658 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3659 // CHECK2: cond.true: 3660 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3661 // CHECK2-NEXT: br label [[COND_END:%.*]] 3662 // CHECK2: cond.false: 3663 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3664 // CHECK2-NEXT: br label [[COND_END]] 3665 // CHECK2: cond.end: 3666 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3667 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3668 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3669 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3670 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3671 // CHECK2: omp.inner.for.cond: 3672 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3673 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3674 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3675 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3676 // CHECK2: omp.inner.for.body: 3677 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3678 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3679 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3680 // CHECK2-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 3681 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3682 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 3683 // CHECK2-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 3684 // CHECK2-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 3685 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 3686 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3687 // CHECK2: omp.inner.for.inc: 3688 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3689 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3690 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 3691 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3692 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3693 // CHECK2: omp.inner.for.end: 3694 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3695 // CHECK2: omp.loop.exit: 3696 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3697 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 3698 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 3699 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3700 // CHECK2: omp.precond.end: 3701 // CHECK2-NEXT: ret void 3702 // 3703 // 3704 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 3705 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3706 // CHECK2-NEXT: entry: 3707 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3708 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3709 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3710 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3711 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3712 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3713 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3714 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3715 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3716 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3717 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3718 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3719 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3720 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3721 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3722 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3723 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3724 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3725 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4 3726 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 3727 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3728 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3729 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3730 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3731 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3732 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3733 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3734 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3735 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 3736 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3737 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3738 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 3739 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 3740 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 3741 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3742 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3743 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3744 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3745 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3746 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3747 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3748 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3749 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3750 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3751 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3752 // CHECK2: omp.precond.then: 3753 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3754 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3755 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3756 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3757 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 3758 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3759 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 3760 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 3761 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 3762 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3763 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3764 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 3765 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3766 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3767 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 3768 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3769 // CHECK2: omp.dispatch.cond: 3770 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3771 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3772 // CHECK2-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 3773 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 3774 // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3775 // CHECK2: cond.true: 3776 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3777 // CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 3778 // CHECK2-NEXT: br label [[COND_END:%.*]] 3779 // CHECK2: cond.false: 3780 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3781 // CHECK2-NEXT: br label [[COND_END]] 3782 // CHECK2: cond.end: 3783 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 3784 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3785 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3786 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 3787 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3788 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3789 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3790 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3791 // CHECK2: omp.dispatch.body: 3792 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3793 // CHECK2: omp.inner.for.cond: 3794 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3795 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3796 // CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3797 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3798 // CHECK2: omp.inner.for.body: 3799 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3800 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3801 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3802 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 3803 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 3804 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 3805 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 3806 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 3807 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 3808 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 3809 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 3810 // CHECK2-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 3811 // CHECK2-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 3812 // CHECK2-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 3813 // CHECK2-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 3814 // CHECK2-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 3815 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 3816 // CHECK2-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 3817 // CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 3818 // CHECK2-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 3819 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 3820 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8 3821 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 3822 // CHECK2-NEXT: store i32* [[I6]], i32** [[TMP32]], align 8 3823 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 3824 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 8 3825 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 3826 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 8 3827 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3828 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3829 // CHECK2: omp.body.continue: 3830 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3831 // CHECK2: omp.inner.for.inc: 3832 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3833 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 3834 // CHECK2-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 3835 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3836 // CHECK2: omp.inner.for.end: 3837 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3838 // CHECK2: omp.dispatch.inc: 3839 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3840 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3841 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 3842 // CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 3843 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3844 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3845 // CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 3846 // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 3847 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 3848 // CHECK2: omp.dispatch.end: 3849 // CHECK2-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3850 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 3851 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 3852 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3853 // CHECK2: omp.precond.end: 3854 // CHECK2-NEXT: ret void 3855 // 3856 // 3857 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 3858 // CHECK2-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 3859 // CHECK2-NEXT: entry: 3860 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3861 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 3862 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 3863 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 3864 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3865 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 3866 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 3867 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 3868 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3869 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3870 // CHECK2-NEXT: ret void 3871 // 3872 // 3873 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..18 3874 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3875 // CHECK2-NEXT: entry: 3876 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3877 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3878 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3879 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3880 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3881 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3882 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3883 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3884 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3885 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3886 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3887 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3888 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3889 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3890 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3891 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 3892 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3893 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3894 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3895 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3896 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3897 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3898 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3899 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3900 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 3901 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 3902 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3903 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3904 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3905 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3906 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3907 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3908 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3909 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 3910 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3911 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3912 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3913 // CHECK2: omp.precond.then: 3914 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3915 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3916 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3917 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3918 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3919 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3920 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3921 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3922 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3923 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3924 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3925 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3926 // CHECK2: cond.true: 3927 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3928 // CHECK2-NEXT: br label [[COND_END:%.*]] 3929 // CHECK2: cond.false: 3930 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3931 // CHECK2-NEXT: br label [[COND_END]] 3932 // CHECK2: cond.end: 3933 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3934 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3935 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3936 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3937 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3938 // CHECK2: omp.inner.for.cond: 3939 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3940 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3941 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3942 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3943 // CHECK2: omp.inner.for.body: 3944 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3945 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 3946 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3947 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3948 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 3949 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3950 // CHECK2: omp.inner.for.inc: 3951 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3952 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3953 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3954 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3955 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 3956 // CHECK2: omp.inner.for.end: 3957 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3958 // CHECK2: omp.loop.exit: 3959 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3960 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3961 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 3962 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 3963 // CHECK2: omp.precond.end: 3964 // CHECK2-NEXT: ret void 3965 // 3966 // 3967 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..19 3968 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 3969 // CHECK2-NEXT: entry: 3970 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3971 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3972 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3973 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3974 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 3975 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 3976 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 3977 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 3978 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3979 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 3980 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3981 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3982 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 3983 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3984 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3985 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3986 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3987 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 3988 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 8 3989 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3990 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3991 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3992 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3993 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 3994 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 3995 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 3996 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 3997 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 3998 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 3999 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 4000 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 4001 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4002 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4003 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4004 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4005 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4006 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4007 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4008 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 4009 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4010 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4011 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4012 // CHECK2: omp.precond.then: 4013 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4014 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4015 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4016 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4017 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 4018 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4019 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 4020 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4021 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 4022 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4023 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4024 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4025 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4026 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4027 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 4028 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 4029 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4030 // CHECK2: omp.dispatch.cond: 4031 // CHECK2-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4032 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4033 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4034 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 4035 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4036 // CHECK2: omp.dispatch.body: 4037 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4038 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 4039 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4040 // CHECK2: omp.inner.for.cond: 4041 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4042 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 4043 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 4044 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4045 // CHECK2: omp.inner.for.body: 4046 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4047 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 4048 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4049 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 4050 // CHECK2-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !12 4051 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 4052 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 4053 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 4054 // CHECK2-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !12 4055 // CHECK2-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !12 4056 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 4057 // CHECK2-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 4058 // CHECK2-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 4059 // CHECK2-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !12 4060 // CHECK2-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 4061 // CHECK2-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !12 4062 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 4063 // CHECK2-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 4064 // CHECK2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 4065 // CHECK2-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !12 4066 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 4067 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 8, !llvm.access.group !12 4068 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 4069 // CHECK2-NEXT: store i32* [[I4]], i32** [[TMP30]], align 8, !llvm.access.group !12 4070 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 4071 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 8, !llvm.access.group !12 4072 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 4073 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 8, !llvm.access.group !12 4074 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !12 4075 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4076 // CHECK2: omp.body.continue: 4077 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4078 // CHECK2: omp.inner.for.inc: 4079 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4080 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP33]], 1 4081 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4082 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4083 // CHECK2: omp.inner.for.end: 4084 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4085 // CHECK2: omp.dispatch.inc: 4086 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 4087 // CHECK2: omp.dispatch.end: 4088 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 4089 // CHECK2: omp.precond.end: 4090 // CHECK2-NEXT: ret void 4091 // 4092 // 4093 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 4094 // CHECK2-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 4095 // CHECK2-NEXT: entry: 4096 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 4097 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4098 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 4099 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 4100 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 4101 // CHECK2-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 4102 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4103 // CHECK2-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 4104 // CHECK2-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 4105 // CHECK2-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 4106 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 4107 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4108 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4109 // CHECK2-NEXT: ret void 4110 // 4111 // 4112 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..22 4113 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 4114 // CHECK2-NEXT: entry: 4115 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4116 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4117 // CHECK2-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 4118 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4119 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 4120 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 4121 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 4122 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4123 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4124 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 4125 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4126 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4127 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 4128 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4129 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4130 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4131 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4132 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 4133 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4134 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4135 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4136 // CHECK2-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 4137 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4138 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 4139 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 4140 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 4141 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 4142 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4143 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 4144 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 4145 // CHECK2-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 4146 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 4147 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 4148 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 4149 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4150 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4151 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 4152 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4153 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4154 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4155 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 4156 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4157 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 4158 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4159 // CHECK2: omp.precond.then: 4160 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4161 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4162 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 4163 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4164 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4165 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4166 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4167 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4168 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4169 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4170 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4171 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4172 // CHECK2: cond.true: 4173 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4174 // CHECK2-NEXT: br label [[COND_END:%.*]] 4175 // CHECK2: cond.false: 4176 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4177 // CHECK2-NEXT: br label [[COND_END]] 4178 // CHECK2: cond.end: 4179 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4180 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4181 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4182 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4183 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4184 // CHECK2: omp.inner.for.cond: 4185 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4186 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4187 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4188 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4189 // CHECK2: omp.inner.for.body: 4190 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4191 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 4192 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4193 // CHECK2-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 4194 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4195 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 4196 // CHECK2-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 4197 // CHECK2-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 4198 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 4199 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4200 // CHECK2: omp.inner.for.inc: 4201 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4202 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4203 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 4204 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4205 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 4206 // CHECK2: omp.inner.for.end: 4207 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4208 // CHECK2: omp.loop.exit: 4209 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4210 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 4211 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 4212 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 4213 // CHECK2: omp.precond.end: 4214 // CHECK2-NEXT: ret void 4215 // 4216 // 4217 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..23 4218 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4219 // CHECK2-NEXT: entry: 4220 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4221 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4222 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4223 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4224 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4225 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 4226 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 4227 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 4228 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 4229 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4230 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 4231 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4232 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4233 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 4234 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4235 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4236 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4237 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4238 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4 4239 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 8 4240 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4241 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4242 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4243 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4244 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4245 // CHECK2-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 4246 // CHECK2-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 4247 // CHECK2-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 4248 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 4249 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4250 // CHECK2-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 4251 // CHECK2-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 4252 // CHECK2-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 4253 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 4254 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4255 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4256 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4257 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4258 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4259 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4260 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4261 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4 4262 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4263 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4264 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4265 // CHECK2: omp.precond.then: 4266 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4267 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4268 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4269 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4270 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 4271 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4272 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 4273 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 4274 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 4275 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4276 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4277 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 4278 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4279 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4280 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4281 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 4282 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 4283 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4284 // CHECK2: omp.dispatch.cond: 4285 // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4286 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 4287 // CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4288 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 4289 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4290 // CHECK2: omp.dispatch.body: 4291 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4292 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4293 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4294 // CHECK2: omp.inner.for.cond: 4295 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4296 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 4297 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4298 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4299 // CHECK2: omp.inner.for.body: 4300 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4301 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4302 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4303 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !15 4304 // CHECK2-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !15 4305 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 4306 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 4307 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 4308 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !15 4309 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !15 4310 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 4311 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 4312 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 4313 // CHECK2-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !15 4314 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 4315 // CHECK2-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !15 4316 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 4317 // CHECK2-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 4318 // CHECK2-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 4319 // CHECK2-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !15 4320 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 4321 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 8, !llvm.access.group !15 4322 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 4323 // CHECK2-NEXT: store i32* [[I6]], i32** [[TMP31]], align 8, !llvm.access.group !15 4324 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 4325 // CHECK2-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 8, !llvm.access.group !15 4326 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 4327 // CHECK2-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 8, !llvm.access.group !15 4328 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !15 4329 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4330 // CHECK2: omp.body.continue: 4331 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4332 // CHECK2: omp.inner.for.inc: 4333 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4334 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], 1 4335 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4336 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 4337 // CHECK2: omp.inner.for.end: 4338 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4339 // CHECK2: omp.dispatch.inc: 4340 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 4341 // CHECK2: omp.dispatch.end: 4342 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 4343 // CHECK2: omp.precond.end: 4344 // CHECK2-NEXT: ret void 4345 // 4346 // 4347 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4348 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 4349 // CHECK2-NEXT: entry: 4350 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 4351 // CHECK2-NEXT: ret void 4352 // 4353 // 4354 // CHECK3-LABEL: define {{[^@]+}}@main 4355 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 4356 // CHECK3-NEXT: entry: 4357 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4358 // CHECK3-NEXT: [[A:%.*]] = alloca double*, align 4 4359 // CHECK3-NEXT: [[B:%.*]] = alloca double*, align 4 4360 // CHECK3-NEXT: [[C:%.*]] = alloca double*, align 4 4361 // CHECK3-NEXT: [[N:%.*]] = alloca i32, align 4 4362 // CHECK3-NEXT: [[CH:%.*]] = alloca i32, align 4 4363 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 4364 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 4365 // CHECK3-NEXT: store i32 10000, i32* [[N]], align 4 4366 // CHECK3-NEXT: store i32 100, i32* [[CH]], align 4 4367 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 4368 // CHECK3-NEXT: store i32* [[N]], i32** [[TMP0]], align 4 4369 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 4370 // CHECK3-NEXT: store double** [[A]], double*** [[TMP1]], align 4 4371 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 4372 // CHECK3-NEXT: store double** [[B]], double*** [[TMP2]], align 4 4373 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 4374 // CHECK3-NEXT: store double** [[C]], double*** [[TMP3]], align 4 4375 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 4376 // CHECK3-NEXT: store i32* [[CH]], i32** [[TMP4]], align 4 4377 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(20) [[REF_TMP]]) 4378 // CHECK3-NEXT: ret i32 0 4379 // 4380 // 4381 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 4382 // CHECK3-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2:[0-9]+]] { 4383 // CHECK3-NEXT: entry: 4384 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4385 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 4386 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 4387 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 4388 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4389 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 4390 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 4391 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 4392 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4393 // CHECK3-NEXT: ret void 4394 // 4395 // 4396 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 4397 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4398 // CHECK3-NEXT: entry: 4399 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4400 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4401 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4402 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4403 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4404 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4405 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4406 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4407 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4408 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4409 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4410 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4411 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4412 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4413 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4414 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4415 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4416 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4417 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4418 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4419 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4420 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4421 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4422 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 4423 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 4424 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 4425 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4426 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4427 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4428 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4429 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4430 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4431 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4432 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4433 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4434 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4435 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4436 // CHECK3: omp.precond.then: 4437 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4438 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4439 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 4440 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4441 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4442 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4443 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4444 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4445 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4446 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4447 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4448 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4449 // CHECK3: cond.true: 4450 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4451 // CHECK3-NEXT: br label [[COND_END:%.*]] 4452 // CHECK3: cond.false: 4453 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4454 // CHECK3-NEXT: br label [[COND_END]] 4455 // CHECK3: cond.end: 4456 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4457 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4458 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4459 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4460 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4461 // CHECK3: omp.inner.for.cond: 4462 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4463 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4464 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4465 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4466 // CHECK3: omp.inner.for.body: 4467 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4468 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4469 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 4470 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4471 // CHECK3: omp.inner.for.inc: 4472 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4473 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4474 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4475 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4477 // CHECK3: omp.inner.for.end: 4478 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4479 // CHECK3: omp.loop.exit: 4480 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4481 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4482 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4483 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4484 // CHECK3: omp.precond.end: 4485 // CHECK3-NEXT: ret void 4486 // 4487 // 4488 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 4489 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4490 // CHECK3-NEXT: entry: 4491 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4492 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4493 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4494 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4495 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4496 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4497 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4498 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4499 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4500 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4501 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4502 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4503 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4504 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4505 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4506 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4507 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4508 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4509 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 4510 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4511 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4512 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4513 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4514 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4515 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4516 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4517 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4518 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4519 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 4520 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 4521 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 4522 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4523 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4524 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4525 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4526 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4527 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4528 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4529 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4530 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4531 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4532 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4533 // CHECK3: omp.precond.then: 4534 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4535 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4536 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4537 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4538 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4539 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 4540 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 4541 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4542 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4543 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4544 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4545 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4546 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4547 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4548 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4549 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4550 // CHECK3: cond.true: 4551 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4552 // CHECK3-NEXT: br label [[COND_END:%.*]] 4553 // CHECK3: cond.false: 4554 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4555 // CHECK3-NEXT: br label [[COND_END]] 4556 // CHECK3: cond.end: 4557 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4558 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4559 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4560 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4561 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4562 // CHECK3: omp.inner.for.cond: 4563 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4564 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4565 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4566 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4567 // CHECK3: omp.inner.for.body: 4568 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4569 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 4570 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4571 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4572 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 4573 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 4574 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 4575 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 4576 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 4577 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 4578 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 4579 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 4580 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 4581 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 4582 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 4583 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 4584 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 4585 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 4586 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 4587 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 4588 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 4589 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 4590 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 4591 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 4592 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 4593 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 4594 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4595 // CHECK3: omp.body.continue: 4596 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4597 // CHECK3: omp.inner.for.inc: 4598 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4599 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 4600 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4601 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4602 // CHECK3: omp.inner.for.end: 4603 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4604 // CHECK3: omp.loop.exit: 4605 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4606 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 4607 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 4608 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4609 // CHECK3: omp.precond.end: 4610 // CHECK3-NEXT: ret void 4611 // 4612 // 4613 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 4614 // CHECK3-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 4615 // CHECK3-NEXT: entry: 4616 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4617 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 4618 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 4619 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 4620 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4621 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 4622 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 4623 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 4624 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4625 // CHECK3-NEXT: ret void 4626 // 4627 // 4628 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 4629 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4630 // CHECK3-NEXT: entry: 4631 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4632 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4633 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4634 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4635 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4636 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4637 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4638 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4639 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4640 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4641 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4642 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4643 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4644 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4645 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4646 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4647 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4648 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4649 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4650 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4651 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4652 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4653 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4654 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 4655 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 4656 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 4657 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4658 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4659 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4660 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4661 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4662 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4663 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4664 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4665 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4666 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4667 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4668 // CHECK3: omp.precond.then: 4669 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4670 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4671 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 4672 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4673 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4674 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4675 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4676 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4677 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4678 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4679 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4680 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4681 // CHECK3: cond.true: 4682 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4683 // CHECK3-NEXT: br label [[COND_END:%.*]] 4684 // CHECK3: cond.false: 4685 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4686 // CHECK3-NEXT: br label [[COND_END]] 4687 // CHECK3: cond.end: 4688 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4689 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4690 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4691 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4692 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4693 // CHECK3: omp.inner.for.cond: 4694 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4695 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4696 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4697 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4698 // CHECK3: omp.inner.for.body: 4699 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4700 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4701 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 4702 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4703 // CHECK3: omp.inner.for.inc: 4704 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4705 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4706 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4707 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4708 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4709 // CHECK3: omp.inner.for.end: 4710 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4711 // CHECK3: omp.loop.exit: 4712 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4713 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4714 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4715 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4716 // CHECK3: omp.precond.end: 4717 // CHECK3-NEXT: ret void 4718 // 4719 // 4720 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 4721 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4722 // CHECK3-NEXT: entry: 4723 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4724 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4725 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4726 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4727 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4728 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4729 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4730 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4731 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4732 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4733 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4734 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4735 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4736 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4737 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4738 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4739 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4740 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4741 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 4742 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4743 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4744 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4745 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4746 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4747 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4748 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4749 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4750 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4751 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 4752 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 4753 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 4754 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4755 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4756 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4757 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4758 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4759 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4760 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4761 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4762 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4763 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4764 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4765 // CHECK3: omp.precond.then: 4766 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4767 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4768 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4769 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4770 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4771 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 4772 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 4773 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4774 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4775 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4776 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4777 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4778 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4779 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4780 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4781 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4782 // CHECK3: cond.true: 4783 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4784 // CHECK3-NEXT: br label [[COND_END:%.*]] 4785 // CHECK3: cond.false: 4786 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4787 // CHECK3-NEXT: br label [[COND_END]] 4788 // CHECK3: cond.end: 4789 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4790 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4791 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4792 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4793 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4794 // CHECK3: omp.inner.for.cond: 4795 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4796 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4797 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4798 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4799 // CHECK3: omp.inner.for.body: 4800 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4801 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 4802 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4803 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4804 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 4805 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 4806 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 4807 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 4808 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 4809 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 4810 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 4811 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 4812 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 4813 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 4814 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 4815 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 4816 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 4817 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 4818 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 4819 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 4820 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 4821 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 4822 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 4823 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 4824 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 4825 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 4826 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4827 // CHECK3: omp.body.continue: 4828 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4829 // CHECK3: omp.inner.for.inc: 4830 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4831 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 4832 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4833 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4834 // CHECK3: omp.inner.for.end: 4835 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4836 // CHECK3: omp.loop.exit: 4837 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4838 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 4839 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 4840 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4841 // CHECK3: omp.precond.end: 4842 // CHECK3-NEXT: ret void 4843 // 4844 // 4845 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 4846 // CHECK3-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 4847 // CHECK3-NEXT: entry: 4848 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 4849 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4850 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 4851 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 4852 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 4853 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 4854 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4855 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 4856 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 4857 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 4858 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4859 // CHECK3-NEXT: ret void 4860 // 4861 // 4862 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 4863 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4864 // CHECK3-NEXT: entry: 4865 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4866 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4867 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 4868 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4869 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4870 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4871 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4872 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4873 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4874 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4875 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4876 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4877 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4878 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4879 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4880 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4881 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4882 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4883 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4884 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 4885 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4886 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4887 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4888 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4889 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 4890 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4891 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 4892 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 4893 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 4894 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 4895 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 4896 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4897 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 4898 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4899 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4900 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4901 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4902 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4903 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 4904 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4905 // CHECK3: omp.precond.then: 4906 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4907 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4908 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 4909 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4910 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4911 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 4912 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4913 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4914 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 4915 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4916 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4917 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4918 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4919 // CHECK3: cond.true: 4920 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4921 // CHECK3-NEXT: br label [[COND_END:%.*]] 4922 // CHECK3: cond.false: 4923 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4924 // CHECK3-NEXT: br label [[COND_END]] 4925 // CHECK3: cond.end: 4926 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4927 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4928 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4929 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4930 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4931 // CHECK3: omp.inner.for.cond: 4932 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4933 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4934 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 4935 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 4936 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4937 // CHECK3: omp.inner.for.body: 4938 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4939 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4940 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 4941 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4942 // CHECK3: omp.inner.for.inc: 4943 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4944 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4945 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4946 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4947 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4948 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4949 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4950 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 4951 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4952 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4953 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 4954 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 4955 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4956 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4957 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 4958 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 4959 // CHECK3: cond.true10: 4960 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4961 // CHECK3-NEXT: br label [[COND_END12:%.*]] 4962 // CHECK3: cond.false11: 4963 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4964 // CHECK3-NEXT: br label [[COND_END12]] 4965 // CHECK3: cond.end12: 4966 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 4967 // CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 4968 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4969 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 4970 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4971 // CHECK3: omp.inner.for.end: 4972 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4973 // CHECK3: omp.loop.exit: 4974 // CHECK3-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4975 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 4976 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 4977 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4978 // CHECK3: omp.precond.end: 4979 // CHECK3-NEXT: ret void 4980 // 4981 // 4982 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 4983 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4984 // CHECK3-NEXT: entry: 4985 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4986 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4987 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4988 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4989 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4990 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4991 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4992 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4993 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4994 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4995 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4996 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4997 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4998 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4999 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5000 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5001 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5002 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 5003 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 4 5004 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5005 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5006 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5007 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5008 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5009 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5010 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5011 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5012 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5013 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5014 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5015 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5016 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5017 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5018 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5019 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5020 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5021 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5022 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5023 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5024 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5025 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5026 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5027 // CHECK3: omp.precond.then: 5028 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5029 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5030 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5031 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5032 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5033 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 5034 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 5035 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5036 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5037 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5038 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5039 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5040 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5041 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5042 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5043 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5044 // CHECK3: cond.true: 5045 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5046 // CHECK3-NEXT: br label [[COND_END:%.*]] 5047 // CHECK3: cond.false: 5048 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5049 // CHECK3-NEXT: br label [[COND_END]] 5050 // CHECK3: cond.end: 5051 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5052 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5053 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5054 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5055 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5056 // CHECK3: omp.inner.for.cond: 5057 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5058 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5059 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5060 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5061 // CHECK3: omp.inner.for.body: 5062 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5063 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5064 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5065 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 5066 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 5067 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 5068 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 5069 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 5070 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 5071 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 5072 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 5073 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 5074 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 5075 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 5076 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 5077 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 5078 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 5079 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 5080 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 5081 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 5082 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 5083 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 5084 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 5085 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 5086 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 5087 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 5088 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5089 // CHECK3: omp.body.continue: 5090 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5091 // CHECK3: omp.inner.for.inc: 5092 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5093 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 5094 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 5095 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5096 // CHECK3: omp.inner.for.end: 5097 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5098 // CHECK3: omp.loop.exit: 5099 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5100 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 5101 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 5102 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5103 // CHECK3: omp.precond.end: 5104 // CHECK3-NEXT: ret void 5105 // 5106 // 5107 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 5108 // CHECK3-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 5109 // CHECK3-NEXT: entry: 5110 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5111 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 5112 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 5113 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 5114 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5115 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 5116 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 5117 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 5118 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5119 // CHECK3-NEXT: ret void 5120 // 5121 // 5122 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 5123 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5124 // CHECK3-NEXT: entry: 5125 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5126 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5127 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5128 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5129 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5130 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5131 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5132 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5133 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5134 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5135 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5136 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5137 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5138 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5139 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5140 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 5141 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5142 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5143 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5144 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5145 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5146 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5147 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5148 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5149 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5150 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5151 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5152 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5153 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5154 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5155 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5156 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5157 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5158 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5159 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5160 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5161 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5162 // CHECK3: omp.precond.then: 5163 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5164 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5165 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 5166 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5167 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5168 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5169 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 5170 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5171 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5172 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5173 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5174 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5175 // CHECK3: cond.true: 5176 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5177 // CHECK3-NEXT: br label [[COND_END:%.*]] 5178 // CHECK3: cond.false: 5179 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5180 // CHECK3-NEXT: br label [[COND_END]] 5181 // CHECK3: cond.end: 5182 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5183 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5184 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5185 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 5186 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5187 // CHECK3: omp.inner.for.cond: 5188 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5189 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5190 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5191 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5192 // CHECK3: omp.inner.for.body: 5193 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5194 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5195 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 5196 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5197 // CHECK3: omp.inner.for.inc: 5198 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5199 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5200 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 5201 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5202 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5203 // CHECK3: omp.inner.for.end: 5204 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5205 // CHECK3: omp.loop.exit: 5206 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5207 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 5208 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 5209 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5210 // CHECK3: omp.precond.end: 5211 // CHECK3-NEXT: ret void 5212 // 5213 // 5214 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 5215 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5216 // CHECK3-NEXT: entry: 5217 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5218 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5219 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5220 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5221 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5222 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5223 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5224 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5225 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5226 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5227 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5228 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5229 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5230 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5231 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5232 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5233 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5234 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 5235 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 4 5236 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5237 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5238 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5239 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5240 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5241 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5242 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5243 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5244 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5245 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5246 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5247 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5248 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5249 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5250 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5251 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5252 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5253 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5254 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5255 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5256 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5257 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5258 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5259 // CHECK3: omp.precond.then: 5260 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5261 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5262 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5263 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5264 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5265 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 5266 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 5267 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5268 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5269 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5270 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5271 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5272 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5273 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5274 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5275 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5276 // CHECK3: cond.true: 5277 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5278 // CHECK3-NEXT: br label [[COND_END:%.*]] 5279 // CHECK3: cond.false: 5280 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5281 // CHECK3-NEXT: br label [[COND_END]] 5282 // CHECK3: cond.end: 5283 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5284 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5285 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5286 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5287 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5288 // CHECK3: omp.inner.for.cond: 5289 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5290 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5291 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5292 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5293 // CHECK3: omp.inner.for.body: 5294 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5295 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5296 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5297 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 5298 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 5299 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 5300 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 5301 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 5302 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 5303 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 5304 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 5305 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 5306 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 5307 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 5308 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 5309 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 5310 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 5311 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 5312 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 5313 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 5314 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 5315 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 5316 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 5317 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 5318 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 5319 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 5320 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5321 // CHECK3: omp.body.continue: 5322 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5323 // CHECK3: omp.inner.for.inc: 5324 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5325 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 5326 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 5327 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5328 // CHECK3: omp.inner.for.end: 5329 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5330 // CHECK3: omp.loop.exit: 5331 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5332 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 5333 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 5334 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5335 // CHECK3: omp.precond.end: 5336 // CHECK3-NEXT: ret void 5337 // 5338 // 5339 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 5340 // CHECK3-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 5341 // CHECK3-NEXT: entry: 5342 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 5343 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5344 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 5345 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 5346 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 5347 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 5348 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5349 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 5350 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 5351 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 5352 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5353 // CHECK3-NEXT: ret void 5354 // 5355 // 5356 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 5357 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5358 // CHECK3-NEXT: entry: 5359 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5360 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5361 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 5362 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5363 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5364 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5365 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5366 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5367 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5368 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5369 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5370 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5372 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5373 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5374 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5375 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5376 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 5377 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 5378 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5379 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5380 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 5381 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5382 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5383 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5384 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5385 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 5386 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5387 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 5388 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 5389 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 5390 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 5391 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 5392 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 5393 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5394 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5395 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 5396 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5397 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5398 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5399 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5400 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5401 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 5402 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5403 // CHECK3: omp.precond.then: 5404 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5405 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5406 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 5407 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5408 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5409 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5410 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5411 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5412 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5413 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5414 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5415 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5416 // CHECK3: cond.true: 5417 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5418 // CHECK3-NEXT: br label [[COND_END:%.*]] 5419 // CHECK3: cond.false: 5420 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5421 // CHECK3-NEXT: br label [[COND_END]] 5422 // CHECK3: cond.end: 5423 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5424 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5425 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5426 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5427 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5428 // CHECK3: omp.inner.for.cond: 5429 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5430 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5431 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5432 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5433 // CHECK3: omp.inner.for.body: 5434 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5435 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5436 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5437 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5438 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5439 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 5440 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5441 // CHECK3: omp.inner.for.inc: 5442 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5443 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5444 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5445 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5446 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5447 // CHECK3: omp.inner.for.end: 5448 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5449 // CHECK3: omp.loop.exit: 5450 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5451 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 5452 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 5453 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5454 // CHECK3: omp.precond.end: 5455 // CHECK3-NEXT: ret void 5456 // 5457 // 5458 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 5459 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5460 // CHECK3-NEXT: entry: 5461 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5462 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5463 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5464 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5465 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5466 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5467 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5468 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5469 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5470 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5471 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5472 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5473 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5474 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5475 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5476 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5477 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5478 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5479 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 5480 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 4 5481 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5482 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5483 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5484 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5485 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5486 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5487 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5488 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5489 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5490 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5491 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5492 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5493 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5494 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5495 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5496 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5497 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5498 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5499 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5500 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5501 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5502 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5503 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5504 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5505 // CHECK3: omp.precond.then: 5506 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5507 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5508 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5509 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5510 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5511 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 5512 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 5513 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5514 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5515 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5516 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5517 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 5518 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 5519 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5520 // CHECK3: omp.dispatch.cond: 5521 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5522 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5523 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 5524 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5525 // CHECK3: cond.true: 5526 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5527 // CHECK3-NEXT: br label [[COND_END:%.*]] 5528 // CHECK3: cond.false: 5529 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5530 // CHECK3-NEXT: br label [[COND_END]] 5531 // CHECK3: cond.end: 5532 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 5533 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5534 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5535 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 5536 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5537 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5538 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 5539 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5540 // CHECK3: omp.dispatch.body: 5541 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5542 // CHECK3: omp.inner.for.cond: 5543 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5544 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5545 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 5546 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5547 // CHECK3: omp.inner.for.body: 5548 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5549 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 5550 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5551 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5552 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 5553 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 5554 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 5555 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 5556 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 5557 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 5558 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 5559 // CHECK3-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 5560 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 5561 // CHECK3-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 5562 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 5563 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 5564 // CHECK3-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 5565 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 5566 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 4 5567 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 5568 // CHECK3-NEXT: store i32* [[I4]], i32** [[TMP32]], align 4 5569 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 5570 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 4 5571 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 5572 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 4 5573 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 5574 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5575 // CHECK3: omp.body.continue: 5576 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5577 // CHECK3: omp.inner.for.inc: 5578 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5579 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP35]], 1 5580 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 5581 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5582 // CHECK3: omp.inner.for.end: 5583 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5584 // CHECK3: omp.dispatch.inc: 5585 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5586 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5587 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 5588 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 5589 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5590 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5591 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 5592 // CHECK3-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 5593 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 5594 // CHECK3: omp.dispatch.end: 5595 // CHECK3-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5596 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 5597 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 5598 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5599 // CHECK3: omp.precond.end: 5600 // CHECK3-NEXT: ret void 5601 // 5602 // 5603 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 5604 // CHECK3-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 5605 // CHECK3-NEXT: entry: 5606 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5607 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 5608 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 5609 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 5610 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5611 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 5612 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 5613 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 5614 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5615 // CHECK3-NEXT: ret void 5616 // 5617 // 5618 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18 5619 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5620 // CHECK3-NEXT: entry: 5621 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5622 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5623 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5624 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5625 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5626 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5627 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5628 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5629 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5630 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5631 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5632 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5633 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5634 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5635 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5636 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 5637 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5638 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5639 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5640 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5641 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5642 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5643 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5644 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5645 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5646 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5647 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5648 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5649 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5650 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5651 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5652 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5653 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5654 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5655 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5656 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5657 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5658 // CHECK3: omp.precond.then: 5659 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5660 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5661 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 5662 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5663 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5664 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5665 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 5666 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5667 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5668 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5669 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5670 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5671 // CHECK3: cond.true: 5672 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5673 // CHECK3-NEXT: br label [[COND_END:%.*]] 5674 // CHECK3: cond.false: 5675 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5676 // CHECK3-NEXT: br label [[COND_END]] 5677 // CHECK3: cond.end: 5678 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5679 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5680 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5681 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 5682 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5683 // CHECK3: omp.inner.for.cond: 5684 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5685 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5686 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5687 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5688 // CHECK3: omp.inner.for.body: 5689 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5690 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5691 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 5692 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5693 // CHECK3: omp.inner.for.inc: 5694 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5695 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5696 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 5697 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5698 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5699 // CHECK3: omp.inner.for.end: 5700 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5701 // CHECK3: omp.loop.exit: 5702 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5703 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 5704 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 5705 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5706 // CHECK3: omp.precond.end: 5707 // CHECK3-NEXT: ret void 5708 // 5709 // 5710 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..19 5711 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5712 // CHECK3-NEXT: entry: 5713 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5714 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5715 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5716 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5717 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5718 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5719 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5720 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5721 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5722 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5723 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5724 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5725 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5726 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5727 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5728 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5729 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5730 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 5731 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 4 5732 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5733 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5734 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5735 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5736 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5737 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5738 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5739 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5740 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5741 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5742 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5743 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5744 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5745 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5746 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5747 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5748 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5749 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5750 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5751 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5752 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5753 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5754 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5755 // CHECK3: omp.precond.then: 5756 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5757 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5758 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5759 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5760 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5761 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 5762 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 5763 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5764 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5765 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5766 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5767 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5768 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 5769 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 5770 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5771 // CHECK3: omp.dispatch.cond: 5772 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5773 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 5774 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5775 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 5776 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5777 // CHECK3: omp.dispatch.body: 5778 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5779 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 5780 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5781 // CHECK3: omp.inner.for.cond: 5782 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5783 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 5784 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 5785 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5786 // CHECK3: omp.inner.for.body: 5787 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5788 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 5789 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5790 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !13 5791 // CHECK3-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !13 5792 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 5793 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 5794 // CHECK3-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !13 5795 // CHECK3-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !13 5796 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 5797 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 5798 // CHECK3-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !13 5799 // CHECK3-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 5800 // CHECK3-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !13 5801 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 5802 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 5803 // CHECK3-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !13 5804 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 5805 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 4, !llvm.access.group !13 5806 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 5807 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP30]], align 4, !llvm.access.group !13 5808 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 5809 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 4, !llvm.access.group !13 5810 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 5811 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 4, !llvm.access.group !13 5812 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !13 5813 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5814 // CHECK3: omp.body.continue: 5815 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5816 // CHECK3: omp.inner.for.inc: 5817 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5818 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], 1 5819 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5820 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 5821 // CHECK3: omp.inner.for.end: 5822 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5823 // CHECK3: omp.dispatch.inc: 5824 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 5825 // CHECK3: omp.dispatch.end: 5826 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5827 // CHECK3: omp.precond.end: 5828 // CHECK3-NEXT: ret void 5829 // 5830 // 5831 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 5832 // CHECK3-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 5833 // CHECK3-NEXT: entry: 5834 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 5835 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5836 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 5837 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 5838 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 5839 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 5840 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5841 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 5842 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 5843 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 5844 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5845 // CHECK3-NEXT: ret void 5846 // 5847 // 5848 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..22 5849 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 5850 // CHECK3-NEXT: entry: 5851 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5852 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5853 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 5854 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5855 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5856 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5857 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5858 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5859 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5860 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5861 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5862 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5863 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5864 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5865 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5866 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5867 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5868 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 5869 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 5870 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5871 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5872 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 5873 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5874 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5875 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5876 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5877 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 5878 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5879 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 5880 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 5881 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 5882 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 5883 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 5884 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 5885 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5886 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5887 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 5888 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5889 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5890 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5891 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5892 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5893 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 5894 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5895 // CHECK3: omp.precond.then: 5896 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5897 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5898 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 5899 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5900 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5901 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5902 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5903 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5904 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5905 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5906 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5907 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5908 // CHECK3: cond.true: 5909 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5910 // CHECK3-NEXT: br label [[COND_END:%.*]] 5911 // CHECK3: cond.false: 5912 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5913 // CHECK3-NEXT: br label [[COND_END]] 5914 // CHECK3: cond.end: 5915 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5916 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5917 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5918 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5919 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5920 // CHECK3: omp.inner.for.cond: 5921 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5922 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5923 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5924 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5925 // CHECK3: omp.inner.for.body: 5926 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5927 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5928 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5929 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5930 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5931 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 5932 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5933 // CHECK3: omp.inner.for.inc: 5934 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5935 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5936 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5937 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5938 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5939 // CHECK3: omp.inner.for.end: 5940 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5941 // CHECK3: omp.loop.exit: 5942 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5943 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 5944 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 5945 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 5946 // CHECK3: omp.precond.end: 5947 // CHECK3-NEXT: ret void 5948 // 5949 // 5950 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..23 5951 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5952 // CHECK3-NEXT: entry: 5953 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5954 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5955 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5956 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5957 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 5958 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 5959 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 5960 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 5961 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5962 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5963 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5964 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5965 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5966 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5967 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5968 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5969 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5970 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5971 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 5972 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 4 5973 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5974 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5975 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5976 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5977 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 5978 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 5979 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 5980 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 5981 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5982 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 5983 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 5984 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 5985 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 5986 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5987 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5988 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5989 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5990 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5991 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5992 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5993 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 5994 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5995 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5996 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5997 // CHECK3: omp.precond.then: 5998 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5999 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6000 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6001 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6002 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6003 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 6004 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 6005 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6006 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6007 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 6008 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6009 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6010 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6011 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 6012 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 6013 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6014 // CHECK3: omp.dispatch.cond: 6015 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6016 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 6017 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6018 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 6019 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6020 // CHECK3: omp.dispatch.body: 6021 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6022 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 6023 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6024 // CHECK3: omp.inner.for.cond: 6025 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 6026 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 6027 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 6028 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6029 // CHECK3: omp.inner.for.body: 6030 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 6031 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 6032 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6033 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !16 6034 // CHECK3-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !16 6035 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 6036 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 6037 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !16 6038 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !16 6039 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 6040 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 6041 // CHECK3-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !16 6042 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 6043 // CHECK3-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !16 6044 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 6045 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 6046 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !16 6047 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 6048 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 4, !llvm.access.group !16 6049 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 6050 // CHECK3-NEXT: store i32* [[I4]], i32** [[TMP31]], align 4, !llvm.access.group !16 6051 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 6052 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 4, !llvm.access.group !16 6053 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 6054 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 4, !llvm.access.group !16 6055 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !16 6056 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6057 // CHECK3: omp.body.continue: 6058 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6059 // CHECK3: omp.inner.for.inc: 6060 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 6061 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP34]], 1 6062 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 6063 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 6064 // CHECK3: omp.inner.for.end: 6065 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6066 // CHECK3: omp.dispatch.inc: 6067 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 6068 // CHECK3: omp.dispatch.end: 6069 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 6070 // CHECK3: omp.precond.end: 6071 // CHECK3-NEXT: ret void 6072 // 6073 // 6074 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6075 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 6076 // CHECK3-NEXT: entry: 6077 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 6078 // CHECK3-NEXT: ret void 6079 // 6080 // 6081 // CHECK4-LABEL: define {{[^@]+}}@main 6082 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 6083 // CHECK4-NEXT: entry: 6084 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6085 // CHECK4-NEXT: [[A:%.*]] = alloca double*, align 4 6086 // CHECK4-NEXT: [[B:%.*]] = alloca double*, align 4 6087 // CHECK4-NEXT: [[C:%.*]] = alloca double*, align 4 6088 // CHECK4-NEXT: [[N:%.*]] = alloca i32, align 4 6089 // CHECK4-NEXT: [[CH:%.*]] = alloca i32, align 4 6090 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 6091 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 6092 // CHECK4-NEXT: store i32 10000, i32* [[N]], align 4 6093 // CHECK4-NEXT: store i32 100, i32* [[CH]], align 4 6094 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 6095 // CHECK4-NEXT: store i32* [[N]], i32** [[TMP0]], align 4 6096 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 6097 // CHECK4-NEXT: store double** [[A]], double*** [[TMP1]], align 4 6098 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 6099 // CHECK4-NEXT: store double** [[B]], double*** [[TMP2]], align 4 6100 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 6101 // CHECK4-NEXT: store double** [[C]], double*** [[TMP3]], align 4 6102 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 6103 // CHECK4-NEXT: store i32* [[CH]], i32** [[TMP4]], align 4 6104 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(20) [[REF_TMP]]) 6105 // CHECK4-NEXT: ret i32 0 6106 // 6107 // 6108 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 6109 // CHECK4-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2:[0-9]+]] { 6110 // CHECK4-NEXT: entry: 6111 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6112 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 6113 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 6114 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 6115 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6116 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 6117 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 6118 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 6119 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6120 // CHECK4-NEXT: ret void 6121 // 6122 // 6123 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 6124 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6125 // CHECK4-NEXT: entry: 6126 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6127 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6128 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6129 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6130 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6131 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6132 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6133 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6134 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6135 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6136 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6137 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6138 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6139 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6140 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6141 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6142 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6143 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6144 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6145 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6146 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6147 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6148 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6149 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6150 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6151 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6152 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6153 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6154 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6155 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6156 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6157 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6158 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6159 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6160 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6161 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6162 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6163 // CHECK4: omp.precond.then: 6164 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6165 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6166 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 6167 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6168 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6169 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6170 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 6171 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6172 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6173 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6174 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6175 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6176 // CHECK4: cond.true: 6177 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6178 // CHECK4-NEXT: br label [[COND_END:%.*]] 6179 // CHECK4: cond.false: 6180 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6181 // CHECK4-NEXT: br label [[COND_END]] 6182 // CHECK4: cond.end: 6183 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6184 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6185 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6186 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 6187 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6188 // CHECK4: omp.inner.for.cond: 6189 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6190 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6191 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6192 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6193 // CHECK4: omp.inner.for.body: 6194 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6195 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6196 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 6197 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6198 // CHECK4: omp.inner.for.inc: 6199 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6200 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6201 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 6202 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6203 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6204 // CHECK4: omp.inner.for.end: 6205 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6206 // CHECK4: omp.loop.exit: 6207 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6208 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6209 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6210 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6211 // CHECK4: omp.precond.end: 6212 // CHECK4-NEXT: ret void 6213 // 6214 // 6215 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 6216 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6217 // CHECK4-NEXT: entry: 6218 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6219 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6220 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6221 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6222 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6223 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6224 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6225 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6226 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6227 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6228 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6229 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6230 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6231 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6232 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6233 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6234 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6235 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6236 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 6237 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6238 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6239 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6240 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6241 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6242 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6243 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6244 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6245 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6246 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6247 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6248 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6249 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6250 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6251 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6252 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6253 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6254 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6255 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6256 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6257 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6258 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6259 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6260 // CHECK4: omp.precond.then: 6261 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6262 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6263 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6264 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6265 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6266 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 6267 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 6268 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6269 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6270 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6271 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6272 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6273 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6274 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6275 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6276 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6277 // CHECK4: cond.true: 6278 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6279 // CHECK4-NEXT: br label [[COND_END:%.*]] 6280 // CHECK4: cond.false: 6281 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6282 // CHECK4-NEXT: br label [[COND_END]] 6283 // CHECK4: cond.end: 6284 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6285 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6286 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6287 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 6288 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6289 // CHECK4: omp.inner.for.cond: 6290 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6291 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6292 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6293 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6294 // CHECK4: omp.inner.for.body: 6295 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6296 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6297 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6298 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6299 // CHECK4-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 6300 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 6301 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 6302 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 6303 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 6304 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 6305 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 6306 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 6307 // CHECK4-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 6308 // CHECK4-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 6309 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 6310 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 6311 // CHECK4-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 6312 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 6313 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 6314 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 6315 // CHECK4-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 6316 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 6317 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 6318 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 6319 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 6320 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 6321 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6322 // CHECK4: omp.body.continue: 6323 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6324 // CHECK4: omp.inner.for.inc: 6325 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6326 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 6327 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 6328 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6329 // CHECK4: omp.inner.for.end: 6330 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6331 // CHECK4: omp.loop.exit: 6332 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6333 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 6334 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 6335 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6336 // CHECK4: omp.precond.end: 6337 // CHECK4-NEXT: ret void 6338 // 6339 // 6340 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 6341 // CHECK4-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 6342 // CHECK4-NEXT: entry: 6343 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6344 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 6345 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 6346 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 6347 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6348 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 6349 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 6350 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 6351 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6352 // CHECK4-NEXT: ret void 6353 // 6354 // 6355 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 6356 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6357 // CHECK4-NEXT: entry: 6358 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6359 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6360 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6361 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6362 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6363 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6364 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6365 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6366 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6367 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6368 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6369 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6370 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6371 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6372 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6373 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6374 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6375 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6376 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6377 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6378 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6379 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6380 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6381 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6382 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6383 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6384 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6385 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6386 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6387 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6388 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6389 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6390 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6391 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6392 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6393 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6394 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6395 // CHECK4: omp.precond.then: 6396 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6397 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6398 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 6399 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6400 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6401 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6402 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 6403 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6404 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6405 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6406 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6407 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6408 // CHECK4: cond.true: 6409 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6410 // CHECK4-NEXT: br label [[COND_END:%.*]] 6411 // CHECK4: cond.false: 6412 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6413 // CHECK4-NEXT: br label [[COND_END]] 6414 // CHECK4: cond.end: 6415 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6416 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6417 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6418 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 6419 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6420 // CHECK4: omp.inner.for.cond: 6421 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6422 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6423 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6424 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6425 // CHECK4: omp.inner.for.body: 6426 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6427 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6428 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 6429 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6430 // CHECK4: omp.inner.for.inc: 6431 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6432 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6433 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 6434 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6435 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6436 // CHECK4: omp.inner.for.end: 6437 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6438 // CHECK4: omp.loop.exit: 6439 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6440 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6441 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6442 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6443 // CHECK4: omp.precond.end: 6444 // CHECK4-NEXT: ret void 6445 // 6446 // 6447 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 6448 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6449 // CHECK4-NEXT: entry: 6450 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6451 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6452 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6453 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6454 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6455 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6456 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6457 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6458 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6459 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6460 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6461 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6462 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6463 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6464 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6465 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6466 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6467 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6468 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 6469 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6470 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6471 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6472 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6473 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6474 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6475 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6476 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6477 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6478 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6479 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6480 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6481 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6482 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6483 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6484 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6485 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6486 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6487 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6488 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6489 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6490 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6491 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6492 // CHECK4: omp.precond.then: 6493 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6494 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6495 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6496 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6497 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6498 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 6499 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 6500 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6501 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6502 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6503 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6504 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6505 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6506 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6507 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6508 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6509 // CHECK4: cond.true: 6510 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6511 // CHECK4-NEXT: br label [[COND_END:%.*]] 6512 // CHECK4: cond.false: 6513 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6514 // CHECK4-NEXT: br label [[COND_END]] 6515 // CHECK4: cond.end: 6516 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6517 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6518 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6519 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 6520 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6521 // CHECK4: omp.inner.for.cond: 6522 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6523 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6524 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6525 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6526 // CHECK4: omp.inner.for.body: 6527 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6528 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6529 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6530 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6531 // CHECK4-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 6532 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 6533 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 6534 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 6535 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 6536 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 6537 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 6538 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 6539 // CHECK4-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 6540 // CHECK4-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 6541 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 6542 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 6543 // CHECK4-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 6544 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 6545 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 6546 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 6547 // CHECK4-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 6548 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 6549 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 6550 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 6551 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 6552 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 6553 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6554 // CHECK4: omp.body.continue: 6555 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6556 // CHECK4: omp.inner.for.inc: 6557 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6558 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 6559 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 6560 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6561 // CHECK4: omp.inner.for.end: 6562 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6563 // CHECK4: omp.loop.exit: 6564 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6565 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 6566 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 6567 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6568 // CHECK4: omp.precond.end: 6569 // CHECK4-NEXT: ret void 6570 // 6571 // 6572 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 6573 // CHECK4-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 6574 // CHECK4-NEXT: entry: 6575 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 6576 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6577 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 6578 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 6579 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 6580 // CHECK4-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 6581 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6582 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 6583 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 6584 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 6585 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6586 // CHECK4-NEXT: ret void 6587 // 6588 // 6589 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6 6590 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6591 // CHECK4-NEXT: entry: 6592 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6593 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6594 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 6595 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6596 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6597 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6598 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6599 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6600 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6601 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6602 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6603 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6604 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6605 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6606 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6607 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6608 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6609 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6610 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6611 // CHECK4-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 6612 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6613 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6614 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6615 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6616 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 6617 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6618 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 6619 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 6620 // CHECK4-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 6621 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 6622 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 6623 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6624 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 6625 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6626 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6627 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6628 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6629 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6630 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 6631 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6632 // CHECK4: omp.precond.then: 6633 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6634 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6635 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 6636 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6637 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6638 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 6639 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6640 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6641 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 6642 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6643 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6644 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6645 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6646 // CHECK4: cond.true: 6647 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6648 // CHECK4-NEXT: br label [[COND_END:%.*]] 6649 // CHECK4: cond.false: 6650 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6651 // CHECK4-NEXT: br label [[COND_END]] 6652 // CHECK4: cond.end: 6653 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6654 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6655 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6656 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 6657 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6658 // CHECK4: omp.inner.for.cond: 6659 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6660 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6661 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 6662 // CHECK4-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 6663 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6664 // CHECK4: omp.inner.for.body: 6665 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6666 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6667 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 6668 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6669 // CHECK4: omp.inner.for.inc: 6670 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6671 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6672 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 6673 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 6674 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6675 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6676 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 6677 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 6678 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6679 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6680 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 6681 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 6682 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6683 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6684 // CHECK4-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 6685 // CHECK4-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 6686 // CHECK4: cond.true10: 6687 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6688 // CHECK4-NEXT: br label [[COND_END12:%.*]] 6689 // CHECK4: cond.false11: 6690 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6691 // CHECK4-NEXT: br label [[COND_END12]] 6692 // CHECK4: cond.end12: 6693 // CHECK4-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 6694 // CHECK4-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 6695 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6696 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 6697 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6698 // CHECK4: omp.inner.for.end: 6699 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6700 // CHECK4: omp.loop.exit: 6701 // CHECK4-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6702 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 6703 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 6704 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6705 // CHECK4: omp.precond.end: 6706 // CHECK4-NEXT: ret void 6707 // 6708 // 6709 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7 6710 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6711 // CHECK4-NEXT: entry: 6712 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6713 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6714 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6715 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6716 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6717 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6718 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6719 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6720 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6721 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6722 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6723 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6724 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6725 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6726 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6727 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6728 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6729 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6730 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 4 6731 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6732 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6733 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6734 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6735 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6736 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6737 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6738 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6739 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6740 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6741 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6742 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6743 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6744 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6745 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6746 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6747 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6748 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6749 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6750 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6751 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6752 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6753 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6754 // CHECK4: omp.precond.then: 6755 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6756 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6757 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6758 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6759 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6760 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 6761 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 6762 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6763 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6764 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6765 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6766 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6767 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6768 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6769 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6770 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6771 // CHECK4: cond.true: 6772 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6773 // CHECK4-NEXT: br label [[COND_END:%.*]] 6774 // CHECK4: cond.false: 6775 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6776 // CHECK4-NEXT: br label [[COND_END]] 6777 // CHECK4: cond.end: 6778 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6779 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6780 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6781 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 6782 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6783 // CHECK4: omp.inner.for.cond: 6784 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6785 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6786 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6787 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6788 // CHECK4: omp.inner.for.body: 6789 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6790 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6791 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6792 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6793 // CHECK4-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 6794 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 6795 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 6796 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 6797 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 6798 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 6799 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 6800 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 6801 // CHECK4-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 6802 // CHECK4-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 6803 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 6804 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 6805 // CHECK4-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 6806 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 6807 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 6808 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 6809 // CHECK4-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 6810 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 6811 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 6812 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 6813 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 6814 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 6815 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6816 // CHECK4: omp.body.continue: 6817 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6818 // CHECK4: omp.inner.for.inc: 6819 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6820 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 6821 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 6822 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6823 // CHECK4: omp.inner.for.end: 6824 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6825 // CHECK4: omp.loop.exit: 6826 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6827 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 6828 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 6829 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6830 // CHECK4: omp.precond.end: 6831 // CHECK4-NEXT: ret void 6832 // 6833 // 6834 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 6835 // CHECK4-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 6836 // CHECK4-NEXT: entry: 6837 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6838 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 6839 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 6840 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 6841 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6842 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 6843 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 6844 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 6845 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6846 // CHECK4-NEXT: ret void 6847 // 6848 // 6849 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10 6850 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6851 // CHECK4-NEXT: entry: 6852 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6853 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6854 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6855 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6856 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6857 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6858 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6859 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6860 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6861 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6862 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6863 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6864 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6865 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6866 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6867 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6868 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6869 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6870 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6871 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6872 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6873 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6874 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6875 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6876 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6877 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6878 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6879 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6880 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6881 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6882 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6883 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6884 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6885 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6886 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6887 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6888 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6889 // CHECK4: omp.precond.then: 6890 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6891 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6892 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 6893 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6894 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6895 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6896 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 6897 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6898 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6899 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6900 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6901 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6902 // CHECK4: cond.true: 6903 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6904 // CHECK4-NEXT: br label [[COND_END:%.*]] 6905 // CHECK4: cond.false: 6906 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6907 // CHECK4-NEXT: br label [[COND_END]] 6908 // CHECK4: cond.end: 6909 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6910 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6911 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6912 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 6913 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6914 // CHECK4: omp.inner.for.cond: 6915 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6916 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6917 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6918 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6919 // CHECK4: omp.inner.for.body: 6920 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6921 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6922 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 6923 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6924 // CHECK4: omp.inner.for.inc: 6925 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6926 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6927 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 6928 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6929 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 6930 // CHECK4: omp.inner.for.end: 6931 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6932 // CHECK4: omp.loop.exit: 6933 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6934 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6935 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6936 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 6937 // CHECK4: omp.precond.end: 6938 // CHECK4-NEXT: ret void 6939 // 6940 // 6941 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11 6942 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 6943 // CHECK4-NEXT: entry: 6944 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6945 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6946 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6947 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6948 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6949 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 6950 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 6951 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 6952 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6953 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 6954 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6955 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6956 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 6957 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6958 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6959 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6960 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6961 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 6962 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 4 6963 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6964 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6965 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6966 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6967 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6968 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 6969 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 6970 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 6971 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6972 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 6973 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 6974 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 6975 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6976 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6977 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6978 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6979 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6980 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6981 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6982 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 6983 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6984 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6985 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6986 // CHECK4: omp.precond.then: 6987 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6988 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6989 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6990 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6991 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6992 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 6993 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 6994 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6995 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6996 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6997 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6998 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6999 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7000 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7001 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7002 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7003 // CHECK4: cond.true: 7004 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7005 // CHECK4-NEXT: br label [[COND_END:%.*]] 7006 // CHECK4: cond.false: 7007 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7008 // CHECK4-NEXT: br label [[COND_END]] 7009 // CHECK4: cond.end: 7010 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7011 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7012 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7013 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7014 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7015 // CHECK4: omp.inner.for.cond: 7016 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7017 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7018 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7019 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7020 // CHECK4: omp.inner.for.body: 7021 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7022 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7023 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7024 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 7025 // CHECK4-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 7026 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 7027 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 7028 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 7029 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 7030 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 7031 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 7032 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 7033 // CHECK4-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 7034 // CHECK4-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 7035 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 7036 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 7037 // CHECK4-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 7038 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 7039 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 7040 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 7041 // CHECK4-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 7042 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 7043 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 7044 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 7045 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 7046 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 7047 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7048 // CHECK4: omp.body.continue: 7049 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7050 // CHECK4: omp.inner.for.inc: 7051 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7052 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 7053 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 7054 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7055 // CHECK4: omp.inner.for.end: 7056 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7057 // CHECK4: omp.loop.exit: 7058 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7059 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 7060 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 7061 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7062 // CHECK4: omp.precond.end: 7063 // CHECK4-NEXT: ret void 7064 // 7065 // 7066 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 7067 // CHECK4-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 7068 // CHECK4-NEXT: entry: 7069 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 7070 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7071 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 7072 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 7073 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 7074 // CHECK4-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 7075 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7076 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 7077 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 7078 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 7079 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 7080 // CHECK4-NEXT: ret void 7081 // 7082 // 7083 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14 7084 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 7085 // CHECK4-NEXT: entry: 7086 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7087 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7088 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 7089 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7090 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7091 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7092 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7093 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7094 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7095 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7096 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7097 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7098 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7099 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7100 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7101 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7102 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7103 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4 7104 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7105 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7106 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7107 // CHECK4-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 7108 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7109 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7110 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7111 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7112 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 7113 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7114 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 7115 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 7116 // CHECK4-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 7117 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 7118 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 7119 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 7120 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7121 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7122 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 7123 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7124 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7125 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7126 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7127 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7128 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 7129 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7130 // CHECK4: omp.precond.then: 7131 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7132 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7133 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 7134 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7135 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7136 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7137 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7138 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7139 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7140 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7141 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7142 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7143 // CHECK4: cond.true: 7144 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7145 // CHECK4-NEXT: br label [[COND_END:%.*]] 7146 // CHECK4: cond.false: 7147 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7148 // CHECK4-NEXT: br label [[COND_END]] 7149 // CHECK4: cond.end: 7150 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7151 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7152 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7153 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7154 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7155 // CHECK4: omp.inner.for.cond: 7156 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7157 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7158 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7159 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7160 // CHECK4: omp.inner.for.body: 7161 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7162 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7163 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7164 // CHECK4-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7165 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7166 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 7167 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7168 // CHECK4: omp.inner.for.inc: 7169 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7170 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7171 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 7172 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7173 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7174 // CHECK4: omp.inner.for.end: 7175 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7176 // CHECK4: omp.loop.exit: 7177 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7178 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 7179 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 7180 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7181 // CHECK4: omp.precond.end: 7182 // CHECK4-NEXT: ret void 7183 // 7184 // 7185 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15 7186 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7187 // CHECK4-NEXT: entry: 7188 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7189 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7190 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7191 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7192 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7193 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7194 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7195 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7196 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7197 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7198 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7199 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7200 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7201 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7202 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7203 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7204 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7205 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7206 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4 7207 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 4 7208 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7209 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7210 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7211 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7212 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7213 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7214 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7215 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7216 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7217 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7218 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 7219 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 7220 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 7221 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7222 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7223 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7224 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7225 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7226 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7227 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7228 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7229 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7230 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7231 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7232 // CHECK4: omp.precond.then: 7233 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7234 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7235 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7236 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7237 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7238 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 7239 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 7240 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7241 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7242 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7243 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7244 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 7245 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 7246 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7247 // CHECK4: omp.dispatch.cond: 7248 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7249 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7250 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 7251 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7252 // CHECK4: cond.true: 7253 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7254 // CHECK4-NEXT: br label [[COND_END:%.*]] 7255 // CHECK4: cond.false: 7256 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7257 // CHECK4-NEXT: br label [[COND_END]] 7258 // CHECK4: cond.end: 7259 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 7260 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7261 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7262 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 7263 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7264 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7265 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 7266 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7267 // CHECK4: omp.dispatch.body: 7268 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7269 // CHECK4: omp.inner.for.cond: 7270 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7271 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7272 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 7273 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7274 // CHECK4: omp.inner.for.body: 7275 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7276 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 7277 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7278 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7279 // CHECK4-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 7280 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 7281 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 7282 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 7283 // CHECK4-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 7284 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 7285 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 7286 // CHECK4-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 7287 // CHECK4-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 7288 // CHECK4-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 7289 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 7290 // CHECK4-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 7291 // CHECK4-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 7292 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 7293 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 4 7294 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 7295 // CHECK4-NEXT: store i32* [[I4]], i32** [[TMP32]], align 4 7296 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 7297 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 4 7298 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 7299 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 4 7300 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* nonnull align 4 dereferenceable(16) [[REF_TMP]]) 7301 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7302 // CHECK4: omp.body.continue: 7303 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7304 // CHECK4: omp.inner.for.inc: 7305 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7306 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP35]], 1 7307 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 7308 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7309 // CHECK4: omp.inner.for.end: 7310 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7311 // CHECK4: omp.dispatch.inc: 7312 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7313 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7314 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 7315 // CHECK4-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 7316 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7317 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7318 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 7319 // CHECK4-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 7320 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 7321 // CHECK4: omp.dispatch.end: 7322 // CHECK4-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7323 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 7324 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 7325 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7326 // CHECK4: omp.precond.end: 7327 // CHECK4-NEXT: ret void 7328 // 7329 // 7330 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 7331 // CHECK4-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 7332 // CHECK4-NEXT: entry: 7333 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7334 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 7335 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 7336 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 7337 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7338 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 7339 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 7340 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 7341 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 7342 // CHECK4-NEXT: ret void 7343 // 7344 // 7345 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..18 7346 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 7347 // CHECK4-NEXT: entry: 7348 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7349 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7350 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7351 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7352 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7353 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7354 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7355 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7356 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7357 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7358 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7359 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7360 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7361 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7362 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7363 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 7364 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7365 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7366 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7367 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7368 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7369 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7370 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7371 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 7372 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 7373 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 7374 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7375 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7376 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7377 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7378 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7379 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7380 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7381 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7382 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7383 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7384 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7385 // CHECK4: omp.precond.then: 7386 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7387 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7388 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 7389 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7390 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7391 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7392 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 7393 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7394 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7395 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7396 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7397 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7398 // CHECK4: cond.true: 7399 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7400 // CHECK4-NEXT: br label [[COND_END:%.*]] 7401 // CHECK4: cond.false: 7402 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7403 // CHECK4-NEXT: br label [[COND_END]] 7404 // CHECK4: cond.end: 7405 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7406 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7407 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7408 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 7409 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7410 // CHECK4: omp.inner.for.cond: 7411 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7412 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7413 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7414 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7415 // CHECK4: omp.inner.for.body: 7416 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7417 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7418 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 7419 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7420 // CHECK4: omp.inner.for.inc: 7421 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7422 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7423 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 7424 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7425 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7426 // CHECK4: omp.inner.for.end: 7427 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7428 // CHECK4: omp.loop.exit: 7429 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7430 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 7431 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 7432 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7433 // CHECK4: omp.precond.end: 7434 // CHECK4-NEXT: ret void 7435 // 7436 // 7437 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..19 7438 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 7439 // CHECK4-NEXT: entry: 7440 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7441 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7442 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7443 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7444 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7445 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7446 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7447 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7448 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7449 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7450 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7451 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7452 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7453 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7454 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7455 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7456 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7457 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 7458 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 4 7459 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7460 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7461 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7462 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7463 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7464 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7465 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7466 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7467 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7468 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 7469 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 7470 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 7471 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7472 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7473 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7474 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7475 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7476 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7477 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7478 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7479 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7480 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7481 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7482 // CHECK4: omp.precond.then: 7483 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7484 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7485 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7486 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7487 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7488 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 7489 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 7490 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7491 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7492 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7493 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7494 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7495 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 7496 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 7497 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7498 // CHECK4: omp.dispatch.cond: 7499 // CHECK4-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7500 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 7501 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7502 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 7503 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7504 // CHECK4: omp.dispatch.body: 7505 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7506 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 7507 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7508 // CHECK4: omp.inner.for.cond: 7509 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7510 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 7511 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 7512 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7513 // CHECK4: omp.inner.for.body: 7514 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7515 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 7516 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7517 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !13 7518 // CHECK4-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !13 7519 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 7520 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 7521 // CHECK4-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !13 7522 // CHECK4-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !13 7523 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 7524 // CHECK4-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 7525 // CHECK4-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !13 7526 // CHECK4-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 7527 // CHECK4-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !13 7528 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 7529 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 7530 // CHECK4-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !13 7531 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 7532 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 4, !llvm.access.group !13 7533 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 7534 // CHECK4-NEXT: store i32* [[I3]], i32** [[TMP30]], align 4, !llvm.access.group !13 7535 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 7536 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 4, !llvm.access.group !13 7537 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 7538 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 4, !llvm.access.group !13 7539 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !13 7540 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7541 // CHECK4: omp.body.continue: 7542 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7543 // CHECK4: omp.inner.for.inc: 7544 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7545 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], 1 7546 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7547 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 7548 // CHECK4: omp.inner.for.end: 7549 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7550 // CHECK4: omp.dispatch.inc: 7551 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 7552 // CHECK4: omp.dispatch.end: 7553 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7554 // CHECK4: omp.precond.end: 7555 // CHECK4-NEXT: ret void 7556 // 7557 // 7558 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 7559 // CHECK4-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR2]] { 7560 // CHECK4-NEXT: entry: 7561 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 7562 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7563 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 7564 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 7565 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 7566 // CHECK4-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 7567 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7568 // CHECK4-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 7569 // CHECK4-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 7570 // CHECK4-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 7571 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 7572 // CHECK4-NEXT: ret void 7573 // 7574 // 7575 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..22 7576 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 7577 // CHECK4-NEXT: entry: 7578 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7579 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7580 // CHECK4-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 7581 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7582 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7583 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7584 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7585 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7586 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7587 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7588 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7589 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7590 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7591 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7592 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7593 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7594 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7595 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4 7596 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7597 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7598 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7599 // CHECK4-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 7600 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7601 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7602 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7603 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7604 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 7605 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7606 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 7607 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 7608 // CHECK4-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 7609 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 7610 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 7611 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 7612 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7613 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7614 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 7615 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7616 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7617 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7618 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7619 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7620 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 7621 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7622 // CHECK4: omp.precond.then: 7623 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7624 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7625 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 7626 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7627 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7628 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7629 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7630 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7631 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7632 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7633 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7634 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7635 // CHECK4: cond.true: 7636 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7637 // CHECK4-NEXT: br label [[COND_END:%.*]] 7638 // CHECK4: cond.false: 7639 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7640 // CHECK4-NEXT: br label [[COND_END]] 7641 // CHECK4: cond.end: 7642 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7643 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7644 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7645 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7646 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7647 // CHECK4: omp.inner.for.cond: 7648 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7649 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7650 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7651 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7652 // CHECK4: omp.inner.for.body: 7653 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7654 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7655 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7656 // CHECK4-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7657 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7658 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 7659 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7660 // CHECK4: omp.inner.for.inc: 7661 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7662 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7663 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 7664 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7665 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 7666 // CHECK4: omp.inner.for.end: 7667 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7668 // CHECK4: omp.loop.exit: 7669 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7670 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 7671 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 7672 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7673 // CHECK4: omp.precond.end: 7674 // CHECK4-NEXT: ret void 7675 // 7676 // 7677 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..23 7678 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7679 // CHECK4-NEXT: entry: 7680 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7681 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7682 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7683 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7684 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7685 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 7686 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 7687 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 7688 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7689 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7690 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 7691 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7692 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7693 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 7694 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7695 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7696 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7697 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7698 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4 7699 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 4 7700 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7701 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7702 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7703 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7704 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7705 // CHECK4-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 7706 // CHECK4-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 7707 // CHECK4-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 7708 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7709 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7710 // CHECK4-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 7711 // CHECK4-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 7712 // CHECK4-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 7713 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7714 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7715 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7716 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7717 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7718 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7719 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7720 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4 7721 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7722 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7723 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7724 // CHECK4: omp.precond.then: 7725 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7726 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7727 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7728 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7729 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7730 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 7731 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 7732 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7733 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7734 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7735 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7736 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7737 // CHECK4-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7738 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 7739 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 7740 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7741 // CHECK4: omp.dispatch.cond: 7742 // CHECK4-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7743 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 7744 // CHECK4-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7745 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 7746 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7747 // CHECK4: omp.dispatch.body: 7748 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7749 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 7750 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7751 // CHECK4: omp.inner.for.cond: 7752 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7753 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 7754 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 7755 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7756 // CHECK4: omp.inner.for.body: 7757 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7758 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 7759 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7760 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !16 7761 // CHECK4-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !16 7762 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 7763 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 7764 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !16 7765 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !16 7766 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 7767 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 7768 // CHECK4-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !16 7769 // CHECK4-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 7770 // CHECK4-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !16 7771 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 7772 // CHECK4-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 7773 // CHECK4-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !16 7774 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 7775 // CHECK4-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 4, !llvm.access.group !16 7776 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 7777 // CHECK4-NEXT: store i32* [[I4]], i32** [[TMP31]], align 4, !llvm.access.group !16 7778 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 7779 // CHECK4-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 4, !llvm.access.group !16 7780 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 7781 // CHECK4-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 4, !llvm.access.group !16 7782 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !16 7783 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7784 // CHECK4: omp.body.continue: 7785 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7786 // CHECK4: omp.inner.for.inc: 7787 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7788 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP34]], 1 7789 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7790 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 7791 // CHECK4: omp.inner.for.end: 7792 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7793 // CHECK4: omp.dispatch.inc: 7794 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 7795 // CHECK4: omp.dispatch.end: 7796 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 7797 // CHECK4: omp.precond.end: 7798 // CHECK4-NEXT: ret void 7799 // 7800 // 7801 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7802 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 7803 // CHECK4-NEXT: entry: 7804 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 7805 // CHECK4-NEXT: ret void 7806 // 7807 // 7808 // CHECK9-LABEL: define {{[^@]+}}@main 7809 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 7810 // CHECK9-NEXT: entry: 7811 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7812 // CHECK9-NEXT: [[A:%.*]] = alloca double*, align 8 7813 // CHECK9-NEXT: [[B:%.*]] = alloca double*, align 8 7814 // CHECK9-NEXT: [[C:%.*]] = alloca double*, align 8 7815 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 7816 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 7817 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 7818 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 7819 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 7820 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 7821 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7822 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7823 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7824 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 7825 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 7826 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 7827 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 7828 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 7829 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 7830 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 7831 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 7832 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 7833 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 7834 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 7835 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 7836 // CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 7837 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 7838 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 7839 // CHECK9-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 7840 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 7841 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 7842 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 7843 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 7844 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 7845 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 7846 // CHECK9-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 7847 // CHECK9-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 7848 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 7849 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 7850 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 7851 // CHECK9-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 7852 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 7853 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 7854 // CHECK9-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 7855 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 7856 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 7857 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 7858 // CHECK9-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 7859 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 7860 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 7861 // CHECK9-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 7862 // CHECK9-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 7863 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 7864 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 7865 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 7866 // CHECK9-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 7867 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 7868 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 7869 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 7870 // CHECK9-NEXT: store i32 10000, i32* [[N]], align 4 7871 // CHECK9-NEXT: store i32 100, i32* [[CH]], align 4 7872 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7873 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 7874 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 7875 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 7876 // CHECK9-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 8 7877 // CHECK9-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 8 7878 // CHECK9-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 8 7879 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7880 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 7881 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 7882 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7883 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 7884 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 7885 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7886 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 7887 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7888 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 7889 // CHECK9-NEXT: store double* [[TMP2]], double** [[TMP11]], align 8 7890 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7891 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 7892 // CHECK9-NEXT: store double* [[TMP2]], double** [[TMP13]], align 8 7893 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7894 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 7895 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7896 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 7897 // CHECK9-NEXT: store double* [[TMP3]], double** [[TMP16]], align 8 7898 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7899 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 7900 // CHECK9-NEXT: store double* [[TMP3]], double** [[TMP18]], align 8 7901 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7902 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 7903 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 7904 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 7905 // CHECK9-NEXT: store double* [[TMP4]], double** [[TMP21]], align 8 7906 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 7907 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 7908 // CHECK9-NEXT: store double* [[TMP4]], double** [[TMP23]], align 8 7909 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 7910 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 7911 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7912 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7913 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 7914 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 7915 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7916 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 7917 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7918 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7919 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7920 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7921 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 7922 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 7923 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 7924 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7925 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 7926 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7927 // CHECK9: omp_offload.failed: 7928 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i64 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 7929 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 7930 // CHECK9: omp_offload.cont: 7931 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 7932 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 7933 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 7934 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 7935 // CHECK9-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 8 7936 // CHECK9-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 8 7937 // CHECK9-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 8 7938 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7939 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 7940 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 7941 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7942 // CHECK9-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 7943 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 7944 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 7945 // CHECK9-NEXT: store i8* null, i8** [[TMP42]], align 8 7946 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 7947 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 7948 // CHECK9-NEXT: store double* [[TMP35]], double** [[TMP44]], align 8 7949 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 7950 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 7951 // CHECK9-NEXT: store double* [[TMP35]], double** [[TMP46]], align 8 7952 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 7953 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8 7954 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 7955 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 7956 // CHECK9-NEXT: store double* [[TMP36]], double** [[TMP49]], align 8 7957 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 7958 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 7959 // CHECK9-NEXT: store double* [[TMP36]], double** [[TMP51]], align 8 7960 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 7961 // CHECK9-NEXT: store i8* null, i8** [[TMP52]], align 8 7962 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 7963 // CHECK9-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 7964 // CHECK9-NEXT: store double* [[TMP37]], double** [[TMP54]], align 8 7965 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 7966 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 7967 // CHECK9-NEXT: store double* [[TMP37]], double** [[TMP56]], align 8 7968 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 7969 // CHECK9-NEXT: store i8* null, i8** [[TMP57]], align 8 7970 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7971 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7972 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 7973 // CHECK9-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 7974 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 7975 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 7976 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 7977 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 7978 // CHECK9-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 7979 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 7980 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 7981 // CHECK9-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 7982 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 7983 // CHECK9-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7984 // CHECK9-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 7985 // CHECK9-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 7986 // CHECK9: omp_offload.failed15: 7987 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i64 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 7988 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 7989 // CHECK9: omp_offload.cont16: 7990 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 7991 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 7992 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 7993 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 7994 // CHECK9-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 7995 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 7996 // CHECK9-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 7997 // CHECK9-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 7998 // CHECK9-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 8 7999 // CHECK9-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 8 8000 // CHECK9-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 8 8001 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 8002 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 8003 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 8004 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 8005 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 8006 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 8007 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 8008 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 8009 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 8010 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 8011 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 8012 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 8013 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 8014 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 8015 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 8016 // CHECK9-NEXT: store i8* null, i8** [[TMP82]], align 8 8017 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 8018 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 8019 // CHECK9-NEXT: store double* [[TMP70]], double** [[TMP84]], align 8 8020 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 8021 // CHECK9-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 8022 // CHECK9-NEXT: store double* [[TMP70]], double** [[TMP86]], align 8 8023 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 8024 // CHECK9-NEXT: store i8* null, i8** [[TMP87]], align 8 8025 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 8026 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 8027 // CHECK9-NEXT: store double* [[TMP71]], double** [[TMP89]], align 8 8028 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 8029 // CHECK9-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 8030 // CHECK9-NEXT: store double* [[TMP71]], double** [[TMP91]], align 8 8031 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 8032 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8 8033 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 8034 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 8035 // CHECK9-NEXT: store double* [[TMP72]], double** [[TMP94]], align 8 8036 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 8037 // CHECK9-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 8038 // CHECK9-NEXT: store double* [[TMP72]], double** [[TMP96]], align 8 8039 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 8040 // CHECK9-NEXT: store i8* null, i8** [[TMP97]], align 8 8041 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 8042 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 8043 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 8044 // CHECK9-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 8045 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 8046 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 8047 // CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 8048 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 8049 // CHECK9-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 8050 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 8051 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 8052 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 8053 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 8054 // CHECK9-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8055 // CHECK9-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 8056 // CHECK9-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 8057 // CHECK9: omp_offload.failed30: 8058 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i64 [[TMP67]], i64 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 8059 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT31]] 8060 // CHECK9: omp_offload.cont31: 8061 // CHECK9-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 8062 // CHECK9-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 8063 // CHECK9-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 8064 // CHECK9-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 8065 // CHECK9-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 8 8066 // CHECK9-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 8 8067 // CHECK9-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 8 8068 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 8069 // CHECK9-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 8070 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 8071 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 8072 // CHECK9-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 8073 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 8074 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 8075 // CHECK9-NEXT: store i8* null, i8** [[TMP115]], align 8 8076 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 8077 // CHECK9-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 8078 // CHECK9-NEXT: store double* [[TMP108]], double** [[TMP117]], align 8 8079 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 8080 // CHECK9-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 8081 // CHECK9-NEXT: store double* [[TMP108]], double** [[TMP119]], align 8 8082 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 8083 // CHECK9-NEXT: store i8* null, i8** [[TMP120]], align 8 8084 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 8085 // CHECK9-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 8086 // CHECK9-NEXT: store double* [[TMP109]], double** [[TMP122]], align 8 8087 // CHECK9-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 8088 // CHECK9-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 8089 // CHECK9-NEXT: store double* [[TMP109]], double** [[TMP124]], align 8 8090 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 8091 // CHECK9-NEXT: store i8* null, i8** [[TMP125]], align 8 8092 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 8093 // CHECK9-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 8094 // CHECK9-NEXT: store double* [[TMP110]], double** [[TMP127]], align 8 8095 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 8096 // CHECK9-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 8097 // CHECK9-NEXT: store double* [[TMP110]], double** [[TMP129]], align 8 8098 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 8099 // CHECK9-NEXT: store i8* null, i8** [[TMP130]], align 8 8100 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 8101 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 8102 // CHECK9-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 8103 // CHECK9-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 8104 // CHECK9-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 8105 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 8106 // CHECK9-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 8107 // CHECK9-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 8108 // CHECK9-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 8109 // CHECK9-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 8110 // CHECK9-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 8111 // CHECK9-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 8112 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 8113 // CHECK9-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8114 // CHECK9-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 8115 // CHECK9-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 8116 // CHECK9: omp_offload.failed44: 8117 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i64 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 8118 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT45]] 8119 // CHECK9: omp_offload.cont45: 8120 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 8121 // CHECK9-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 8122 // CHECK9-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 8123 // CHECK9-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 8124 // CHECK9-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 8125 // CHECK9-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 8126 // CHECK9-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 8127 // CHECK9-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 8128 // CHECK9-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 8 8129 // CHECK9-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 8 8130 // CHECK9-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 8 8131 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 8132 // CHECK9-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 8133 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 8134 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 8135 // CHECK9-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 8136 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 8137 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 8138 // CHECK9-NEXT: store i8* null, i8** [[TMP150]], align 8 8139 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 8140 // CHECK9-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 8141 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 8142 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 8143 // CHECK9-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 8144 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 8145 // CHECK9-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 8146 // CHECK9-NEXT: store i8* null, i8** [[TMP155]], align 8 8147 // CHECK9-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 8148 // CHECK9-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 8149 // CHECK9-NEXT: store double* [[TMP143]], double** [[TMP157]], align 8 8150 // CHECK9-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 8151 // CHECK9-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 8152 // CHECK9-NEXT: store double* [[TMP143]], double** [[TMP159]], align 8 8153 // CHECK9-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 8154 // CHECK9-NEXT: store i8* null, i8** [[TMP160]], align 8 8155 // CHECK9-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 8156 // CHECK9-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 8157 // CHECK9-NEXT: store double* [[TMP144]], double** [[TMP162]], align 8 8158 // CHECK9-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 8159 // CHECK9-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 8160 // CHECK9-NEXT: store double* [[TMP144]], double** [[TMP164]], align 8 8161 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 8162 // CHECK9-NEXT: store i8* null, i8** [[TMP165]], align 8 8163 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 8164 // CHECK9-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 8165 // CHECK9-NEXT: store double* [[TMP145]], double** [[TMP167]], align 8 8166 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 8167 // CHECK9-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 8168 // CHECK9-NEXT: store double* [[TMP145]], double** [[TMP169]], align 8 8169 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 8170 // CHECK9-NEXT: store i8* null, i8** [[TMP170]], align 8 8171 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 8172 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 8173 // CHECK9-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 8174 // CHECK9-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 8175 // CHECK9-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 8176 // CHECK9-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 8177 // CHECK9-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 8178 // CHECK9-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 8179 // CHECK9-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 8180 // CHECK9-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 8181 // CHECK9-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 8182 // CHECK9-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 8183 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 8184 // CHECK9-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8185 // CHECK9-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 8186 // CHECK9-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 8187 // CHECK9: omp_offload.failed60: 8188 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i64 [[TMP140]], i64 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 8189 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT61]] 8190 // CHECK9: omp_offload.cont61: 8191 // CHECK9-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 8192 // CHECK9-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 8193 // CHECK9-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 8194 // CHECK9-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 8195 // CHECK9-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 8 8196 // CHECK9-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 8 8197 // CHECK9-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 8 8198 // CHECK9-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 8199 // CHECK9-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 8200 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 8201 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 8202 // CHECK9-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 8203 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 8204 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 8205 // CHECK9-NEXT: store i8* null, i8** [[TMP188]], align 8 8206 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 8207 // CHECK9-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 8208 // CHECK9-NEXT: store double* [[TMP181]], double** [[TMP190]], align 8 8209 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 8210 // CHECK9-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 8211 // CHECK9-NEXT: store double* [[TMP181]], double** [[TMP192]], align 8 8212 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 8213 // CHECK9-NEXT: store i8* null, i8** [[TMP193]], align 8 8214 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 8215 // CHECK9-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 8216 // CHECK9-NEXT: store double* [[TMP182]], double** [[TMP195]], align 8 8217 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 8218 // CHECK9-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 8219 // CHECK9-NEXT: store double* [[TMP182]], double** [[TMP197]], align 8 8220 // CHECK9-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 8221 // CHECK9-NEXT: store i8* null, i8** [[TMP198]], align 8 8222 // CHECK9-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 8223 // CHECK9-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 8224 // CHECK9-NEXT: store double* [[TMP183]], double** [[TMP200]], align 8 8225 // CHECK9-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 8226 // CHECK9-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 8227 // CHECK9-NEXT: store double* [[TMP183]], double** [[TMP202]], align 8 8228 // CHECK9-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 8229 // CHECK9-NEXT: store i8* null, i8** [[TMP203]], align 8 8230 // CHECK9-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 8231 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 8232 // CHECK9-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 8233 // CHECK9-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 8234 // CHECK9-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 8235 // CHECK9-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 8236 // CHECK9-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 8237 // CHECK9-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 8238 // CHECK9-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 8239 // CHECK9-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 8240 // CHECK9-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 8241 // CHECK9-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 8242 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 8243 // CHECK9-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8244 // CHECK9-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 8245 // CHECK9-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 8246 // CHECK9: omp_offload.failed74: 8247 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i64 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 8248 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT75]] 8249 // CHECK9: omp_offload.cont75: 8250 // CHECK9-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 8251 // CHECK9-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 8252 // CHECK9-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 8253 // CHECK9-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 8254 // CHECK9-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 8255 // CHECK9-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 8256 // CHECK9-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 8257 // CHECK9-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 8258 // CHECK9-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 8 8259 // CHECK9-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 8 8260 // CHECK9-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 8 8261 // CHECK9-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 8262 // CHECK9-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 8263 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 8264 // CHECK9-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 8265 // CHECK9-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 8266 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 8267 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 8268 // CHECK9-NEXT: store i8* null, i8** [[TMP223]], align 8 8269 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 8270 // CHECK9-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 8271 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 8272 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 8273 // CHECK9-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 8274 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 8275 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 8276 // CHECK9-NEXT: store i8* null, i8** [[TMP228]], align 8 8277 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 8278 // CHECK9-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 8279 // CHECK9-NEXT: store double* [[TMP216]], double** [[TMP230]], align 8 8280 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 8281 // CHECK9-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 8282 // CHECK9-NEXT: store double* [[TMP216]], double** [[TMP232]], align 8 8283 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 8284 // CHECK9-NEXT: store i8* null, i8** [[TMP233]], align 8 8285 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 8286 // CHECK9-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 8287 // CHECK9-NEXT: store double* [[TMP217]], double** [[TMP235]], align 8 8288 // CHECK9-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 8289 // CHECK9-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 8290 // CHECK9-NEXT: store double* [[TMP217]], double** [[TMP237]], align 8 8291 // CHECK9-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 8292 // CHECK9-NEXT: store i8* null, i8** [[TMP238]], align 8 8293 // CHECK9-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 8294 // CHECK9-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 8295 // CHECK9-NEXT: store double* [[TMP218]], double** [[TMP240]], align 8 8296 // CHECK9-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 8297 // CHECK9-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 8298 // CHECK9-NEXT: store double* [[TMP218]], double** [[TMP242]], align 8 8299 // CHECK9-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 8300 // CHECK9-NEXT: store i8* null, i8** [[TMP243]], align 8 8301 // CHECK9-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 8302 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 8303 // CHECK9-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 8304 // CHECK9-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 8305 // CHECK9-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 8306 // CHECK9-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 8307 // CHECK9-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 8308 // CHECK9-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 8309 // CHECK9-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 8310 // CHECK9-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 8311 // CHECK9-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 8312 // CHECK9-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 8313 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 8314 // CHECK9-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8315 // CHECK9-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 8316 // CHECK9-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 8317 // CHECK9: omp_offload.failed90: 8318 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i64 [[TMP213]], i64 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 8319 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT91]] 8320 // CHECK9: omp_offload.cont91: 8321 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 8322 // CHECK9-NEXT: ret i32 [[CALL]] 8323 // 8324 // 8325 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 8326 // CHECK9-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1:[0-9]+]] { 8327 // CHECK9-NEXT: entry: 8328 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8329 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 8330 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 8331 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 8332 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8333 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 8334 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 8335 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 8336 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8337 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 8338 // CHECK9-NEXT: ret void 8339 // 8340 // 8341 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 8342 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8343 // CHECK9-NEXT: entry: 8344 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8345 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8346 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8347 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8348 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8349 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8350 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8351 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8352 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8353 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8354 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8355 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8356 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8357 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8358 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8359 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8360 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8361 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8362 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8363 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8364 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8365 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8366 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8367 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 8368 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 8369 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 8370 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8371 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8372 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8373 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8374 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8375 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8376 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8377 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8378 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8379 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8380 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8381 // CHECK9: omp.precond.then: 8382 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8383 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8384 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 8385 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8386 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8387 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8388 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 8389 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8390 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8391 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8392 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8393 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8394 // CHECK9: cond.true: 8395 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8396 // CHECK9-NEXT: br label [[COND_END:%.*]] 8397 // CHECK9: cond.false: 8398 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8399 // CHECK9-NEXT: br label [[COND_END]] 8400 // CHECK9: cond.end: 8401 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8402 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8403 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8404 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 8405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8406 // CHECK9: omp.inner.for.cond: 8407 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8408 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8409 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8410 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8411 // CHECK9: omp.inner.for.body: 8412 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8413 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8414 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8415 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8416 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 8417 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8418 // CHECK9: omp.inner.for.inc: 8419 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8420 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8421 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8422 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8423 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8424 // CHECK9: omp.inner.for.end: 8425 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8426 // CHECK9: omp.loop.exit: 8427 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8428 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 8429 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 8430 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8431 // CHECK9: omp.precond.end: 8432 // CHECK9-NEXT: ret void 8433 // 8434 // 8435 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 8436 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8437 // CHECK9-NEXT: entry: 8438 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8439 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8440 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8441 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8442 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8443 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8444 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8445 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8446 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8447 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8448 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8449 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8450 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8451 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8452 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8453 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8454 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8455 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8456 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8457 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8458 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8459 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8460 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8461 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8462 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8463 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8464 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8465 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 8466 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 8467 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 8468 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8469 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8470 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8471 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8472 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8473 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8474 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8475 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8476 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8477 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8478 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8479 // CHECK9: omp.precond.then: 8480 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8481 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8482 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8483 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8484 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8485 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8486 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8487 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8488 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8489 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8490 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8491 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8492 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8493 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8494 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8495 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8496 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8497 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8498 // CHECK9: cond.true: 8499 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8500 // CHECK9-NEXT: br label [[COND_END:%.*]] 8501 // CHECK9: cond.false: 8502 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8503 // CHECK9-NEXT: br label [[COND_END]] 8504 // CHECK9: cond.end: 8505 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8506 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8507 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8508 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8509 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8510 // CHECK9: omp.inner.for.cond: 8511 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8512 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8513 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8514 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8515 // CHECK9: omp.inner.for.body: 8516 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8517 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8518 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8519 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 8520 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 8521 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 8522 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8523 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 8524 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 8525 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 8526 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 8527 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 8528 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 8529 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 8530 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 8531 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 8532 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 8533 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 8534 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 8535 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 8536 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8537 // CHECK9: omp.body.continue: 8538 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8539 // CHECK9: omp.inner.for.inc: 8540 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8541 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 8542 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 8543 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8544 // CHECK9: omp.inner.for.end: 8545 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8546 // CHECK9: omp.loop.exit: 8547 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8548 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 8549 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 8550 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8551 // CHECK9: omp.precond.end: 8552 // CHECK9-NEXT: ret void 8553 // 8554 // 8555 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 8556 // CHECK9-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 8557 // CHECK9-NEXT: entry: 8558 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8559 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 8560 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 8561 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 8562 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8563 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 8564 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 8565 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 8566 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8567 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 8568 // CHECK9-NEXT: ret void 8569 // 8570 // 8571 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 8572 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8573 // CHECK9-NEXT: entry: 8574 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8575 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8576 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8577 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8578 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8579 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8580 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8581 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8582 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8583 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8584 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8585 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8586 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8587 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8588 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8589 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8590 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8591 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8592 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8593 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8594 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8595 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8596 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8597 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 8598 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 8599 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 8600 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8601 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8602 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8603 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8604 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8605 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8606 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8607 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8608 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8609 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8610 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8611 // CHECK9: omp.precond.then: 8612 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8613 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8614 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 8615 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8616 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8617 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8618 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 8619 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8620 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8621 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8622 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8623 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8624 // CHECK9: cond.true: 8625 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8626 // CHECK9-NEXT: br label [[COND_END:%.*]] 8627 // CHECK9: cond.false: 8628 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8629 // CHECK9-NEXT: br label [[COND_END]] 8630 // CHECK9: cond.end: 8631 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8632 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8633 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8634 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 8635 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8636 // CHECK9: omp.inner.for.cond: 8637 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8638 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8639 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8640 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8641 // CHECK9: omp.inner.for.body: 8642 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8643 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8644 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8645 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8646 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 8647 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8648 // CHECK9: omp.inner.for.inc: 8649 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8650 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8651 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8652 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8653 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8654 // CHECK9: omp.inner.for.end: 8655 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8656 // CHECK9: omp.loop.exit: 8657 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8658 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 8659 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 8660 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8661 // CHECK9: omp.precond.end: 8662 // CHECK9-NEXT: ret void 8663 // 8664 // 8665 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 8666 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8667 // CHECK9-NEXT: entry: 8668 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8669 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8670 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8671 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8672 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8673 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8674 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8675 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8676 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8677 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8678 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8679 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8680 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8681 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8682 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8683 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8684 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8685 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8686 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8687 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8688 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8689 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8690 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8691 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8692 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8693 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8694 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8695 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 8696 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 8697 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 8698 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8699 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8700 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8701 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8702 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8703 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8704 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8705 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8706 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8707 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8708 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8709 // CHECK9: omp.precond.then: 8710 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8711 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8712 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8713 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8714 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8715 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8716 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8717 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8718 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8719 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8720 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8721 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8722 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8723 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8724 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8725 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8726 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8727 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8728 // CHECK9: cond.true: 8729 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8730 // CHECK9-NEXT: br label [[COND_END:%.*]] 8731 // CHECK9: cond.false: 8732 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8733 // CHECK9-NEXT: br label [[COND_END]] 8734 // CHECK9: cond.end: 8735 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8736 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8737 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8738 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8739 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8740 // CHECK9: omp.inner.for.cond: 8741 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8742 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8743 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8744 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8745 // CHECK9: omp.inner.for.body: 8746 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8747 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8748 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8749 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 8750 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 8751 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 8752 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8753 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 8754 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 8755 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 8756 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 8757 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 8758 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 8759 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 8760 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 8761 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 8762 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 8763 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 8764 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 8765 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 8766 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8767 // CHECK9: omp.body.continue: 8768 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8769 // CHECK9: omp.inner.for.inc: 8770 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8771 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 8772 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 8773 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8774 // CHECK9: omp.inner.for.end: 8775 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8776 // CHECK9: omp.loop.exit: 8777 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8778 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 8779 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 8780 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8781 // CHECK9: omp.precond.end: 8782 // CHECK9-NEXT: ret void 8783 // 8784 // 8785 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 8786 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 8787 // CHECK9-NEXT: entry: 8788 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 8789 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8790 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 8791 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 8792 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 8793 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 8794 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8795 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 8796 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 8797 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 8798 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 8799 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8800 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 8801 // CHECK9-NEXT: ret void 8802 // 8803 // 8804 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 8805 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8806 // CHECK9-NEXT: entry: 8807 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8808 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8809 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 8810 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8811 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8812 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8813 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8814 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8815 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8816 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8817 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8818 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8819 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8820 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8821 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8822 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8823 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8824 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8825 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8826 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 8827 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8828 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8829 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8830 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8831 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 8832 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8833 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 8834 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 8835 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 8836 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 8837 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 8838 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8839 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 8840 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8841 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8842 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8843 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8844 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8845 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 8846 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8847 // CHECK9: omp.precond.then: 8848 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8849 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8850 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 8851 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8852 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8853 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 8854 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8855 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8856 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 8857 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8858 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8859 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8860 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8861 // CHECK9: cond.true: 8862 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8863 // CHECK9-NEXT: br label [[COND_END:%.*]] 8864 // CHECK9: cond.false: 8865 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8866 // CHECK9-NEXT: br label [[COND_END]] 8867 // CHECK9: cond.end: 8868 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8869 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8870 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8871 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8872 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8873 // CHECK9: omp.inner.for.cond: 8874 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8875 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8876 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 8877 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 8878 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8879 // CHECK9: omp.inner.for.body: 8880 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8881 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8882 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8883 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 8884 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 8885 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8886 // CHECK9: omp.inner.for.inc: 8887 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8888 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8889 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 8890 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 8891 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8892 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8893 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8894 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 8895 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8896 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8897 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 8898 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 8899 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8900 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8901 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 8902 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 8903 // CHECK9: cond.true10: 8904 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8905 // CHECK9-NEXT: br label [[COND_END12:%.*]] 8906 // CHECK9: cond.false11: 8907 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8908 // CHECK9-NEXT: br label [[COND_END12]] 8909 // CHECK9: cond.end12: 8910 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 8911 // CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 8912 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8913 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 8914 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8915 // CHECK9: omp.inner.for.end: 8916 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8917 // CHECK9: omp.loop.exit: 8918 // CHECK9-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8919 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 8920 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 8921 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8922 // CHECK9: omp.precond.end: 8923 // CHECK9-NEXT: ret void 8924 // 8925 // 8926 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 8927 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8928 // CHECK9-NEXT: entry: 8929 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8930 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8931 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8932 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8933 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8934 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 8935 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 8936 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 8937 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8938 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8939 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8940 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8941 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8942 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8943 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8944 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8945 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8946 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8947 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8948 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8949 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8950 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8951 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8952 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 8953 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 8954 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 8955 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8956 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 8957 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 8958 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 8959 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8960 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8961 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8962 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8963 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8964 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8965 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8966 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8967 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8968 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8969 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8970 // CHECK9: omp.precond.then: 8971 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8972 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8973 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8974 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8975 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8976 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8977 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8978 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8979 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8980 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8981 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8982 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8983 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8984 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8985 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8986 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8987 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8988 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8989 // CHECK9: cond.true: 8990 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8991 // CHECK9-NEXT: br label [[COND_END:%.*]] 8992 // CHECK9: cond.false: 8993 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8994 // CHECK9-NEXT: br label [[COND_END]] 8995 // CHECK9: cond.end: 8996 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8997 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8998 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8999 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9000 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9001 // CHECK9: omp.inner.for.cond: 9002 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9003 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9004 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9005 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9006 // CHECK9: omp.inner.for.body: 9007 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9008 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9009 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9010 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 9011 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 9012 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 9013 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 9014 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 9015 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 9016 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 9017 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 9018 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 9019 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 9020 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 9021 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 9022 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 9023 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 9024 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 9025 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 9026 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 9027 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9028 // CHECK9: omp.body.continue: 9029 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9030 // CHECK9: omp.inner.for.inc: 9031 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9032 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 9033 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 9034 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9035 // CHECK9: omp.inner.for.end: 9036 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9037 // CHECK9: omp.loop.exit: 9038 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9039 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 9040 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 9041 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9042 // CHECK9: omp.precond.end: 9043 // CHECK9-NEXT: ret void 9044 // 9045 // 9046 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 9047 // CHECK9-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 9048 // CHECK9-NEXT: entry: 9049 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9050 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 9051 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 9052 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 9053 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9054 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 9055 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 9056 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 9057 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9058 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9059 // CHECK9-NEXT: ret void 9060 // 9061 // 9062 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 9063 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9064 // CHECK9-NEXT: entry: 9065 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9066 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9067 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9068 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9069 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9070 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9071 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9072 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9073 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9074 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9075 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9076 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9077 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9078 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9079 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9080 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 9081 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9082 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9083 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9084 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9085 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9086 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9087 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9088 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9089 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9090 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9091 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9092 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9093 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9094 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9095 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9096 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9097 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9098 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9099 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9100 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9101 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9102 // CHECK9: omp.precond.then: 9103 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9104 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9105 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 9106 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9107 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9108 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9109 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9110 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9111 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9112 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9113 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9114 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9115 // CHECK9: cond.true: 9116 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9117 // CHECK9-NEXT: br label [[COND_END:%.*]] 9118 // CHECK9: cond.false: 9119 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9120 // CHECK9-NEXT: br label [[COND_END]] 9121 // CHECK9: cond.end: 9122 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9123 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9124 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9125 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 9126 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9127 // CHECK9: omp.inner.for.cond: 9128 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9129 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9130 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 9131 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9132 // CHECK9: omp.inner.for.body: 9133 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9134 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 9135 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9136 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9137 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 9138 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9139 // CHECK9: omp.inner.for.inc: 9140 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9141 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9142 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 9143 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9144 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9145 // CHECK9: omp.inner.for.end: 9146 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9147 // CHECK9: omp.loop.exit: 9148 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9149 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 9150 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 9151 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9152 // CHECK9: omp.precond.end: 9153 // CHECK9-NEXT: ret void 9154 // 9155 // 9156 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 9157 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9158 // CHECK9-NEXT: entry: 9159 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9160 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9161 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9162 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9163 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9164 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9165 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9166 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9167 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9168 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9169 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9170 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9171 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9172 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9173 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9174 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9175 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9176 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9177 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9178 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9179 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9180 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9181 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9182 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9183 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9184 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9185 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9186 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9187 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9188 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9189 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9190 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9191 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9192 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9193 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9194 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9195 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9196 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9197 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9198 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9199 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9200 // CHECK9: omp.precond.then: 9201 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9202 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9203 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9204 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9205 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 9206 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9207 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 9208 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9209 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 9210 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9211 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9212 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9213 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9214 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9215 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9216 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9217 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9218 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9219 // CHECK9: cond.true: 9220 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9221 // CHECK9-NEXT: br label [[COND_END:%.*]] 9222 // CHECK9: cond.false: 9223 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9224 // CHECK9-NEXT: br label [[COND_END]] 9225 // CHECK9: cond.end: 9226 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9227 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9228 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9229 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9230 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9231 // CHECK9: omp.inner.for.cond: 9232 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9233 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9234 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9235 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9236 // CHECK9: omp.inner.for.body: 9237 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9238 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9239 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9240 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 9241 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 9242 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 9243 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 9244 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 9245 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 9246 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 9247 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 9248 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 9249 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 9250 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 9251 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 9252 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 9253 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 9254 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 9255 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 9256 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 9257 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9258 // CHECK9: omp.body.continue: 9259 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9260 // CHECK9: omp.inner.for.inc: 9261 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9262 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 9263 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 9264 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9265 // CHECK9: omp.inner.for.end: 9266 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9267 // CHECK9: omp.loop.exit: 9268 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9269 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 9270 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 9271 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9272 // CHECK9: omp.precond.end: 9273 // CHECK9-NEXT: ret void 9274 // 9275 // 9276 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 9277 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 9278 // CHECK9-NEXT: entry: 9279 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 9280 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9281 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 9282 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 9283 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 9284 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 9285 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9286 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 9287 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 9288 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 9289 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 9290 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9291 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9292 // CHECK9-NEXT: ret void 9293 // 9294 // 9295 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 9296 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9297 // CHECK9-NEXT: entry: 9298 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9299 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9300 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 9301 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9302 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9303 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9304 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9305 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9306 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9307 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9308 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9309 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9310 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9311 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9312 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9313 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9314 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9315 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9316 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9317 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9318 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9319 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 9320 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9321 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9322 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9323 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9324 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 9325 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9326 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 9327 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 9328 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 9329 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 9330 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 9331 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 9332 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9333 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9334 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 9335 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9336 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9337 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9338 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9339 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9340 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 9341 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9342 // CHECK9: omp.precond.then: 9343 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9344 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9345 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 9346 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9347 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9348 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9349 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9350 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9351 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9352 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9353 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9354 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9355 // CHECK9: cond.true: 9356 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9357 // CHECK9-NEXT: br label [[COND_END:%.*]] 9358 // CHECK9: cond.false: 9359 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9360 // CHECK9-NEXT: br label [[COND_END]] 9361 // CHECK9: cond.end: 9362 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9363 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9364 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9365 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9366 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9367 // CHECK9: omp.inner.for.cond: 9368 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9369 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9370 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9371 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9372 // CHECK9: omp.inner.for.body: 9373 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9374 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9375 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9376 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 9377 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9378 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9379 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 9380 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9381 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 9382 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9383 // CHECK9: omp.inner.for.inc: 9384 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9385 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9386 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 9387 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9388 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9389 // CHECK9: omp.inner.for.end: 9390 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9391 // CHECK9: omp.loop.exit: 9392 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9393 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 9394 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 9395 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9396 // CHECK9: omp.precond.end: 9397 // CHECK9-NEXT: ret void 9398 // 9399 // 9400 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 9401 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 9402 // CHECK9-NEXT: entry: 9403 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9404 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9405 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9406 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9407 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9408 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9409 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9410 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9411 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9412 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9413 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9414 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9415 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9416 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9417 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9418 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9419 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9420 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9421 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 9422 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9423 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9424 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9425 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9426 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9427 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9428 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9429 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9430 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9431 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9432 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9433 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9434 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9435 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9436 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9437 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9438 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9439 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9440 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9441 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9442 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9443 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9444 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9445 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9446 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9447 // CHECK9: omp.precond.then: 9448 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9449 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9450 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9451 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9452 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 9453 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9454 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 9455 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 9456 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 9457 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9458 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9459 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 9460 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9461 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 9462 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 9463 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9464 // CHECK9: omp.dispatch.cond: 9465 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9466 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9467 // CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 9468 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 9469 // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9470 // CHECK9: cond.true: 9471 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9472 // CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 9473 // CHECK9-NEXT: br label [[COND_END:%.*]] 9474 // CHECK9: cond.false: 9475 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9476 // CHECK9-NEXT: br label [[COND_END]] 9477 // CHECK9: cond.end: 9478 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 9479 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9480 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9481 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 9482 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9483 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9484 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 9485 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9486 // CHECK9: omp.dispatch.body: 9487 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9488 // CHECK9: omp.inner.for.cond: 9489 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9490 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9491 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 9492 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9493 // CHECK9: omp.inner.for.body: 9494 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9495 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 9496 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9497 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 9498 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 9499 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 9500 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 9501 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 9502 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 9503 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 9504 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 9505 // CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 9506 // CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 9507 // CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 9508 // CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 9509 // CHECK9-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 9510 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 9511 // CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 9512 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 9513 // CHECK9-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 9514 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9515 // CHECK9: omp.body.continue: 9516 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9517 // CHECK9: omp.inner.for.inc: 9518 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9519 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 9520 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 9521 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9522 // CHECK9: omp.inner.for.end: 9523 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9524 // CHECK9: omp.dispatch.inc: 9525 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9526 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9527 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 9528 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 9529 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9530 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9531 // CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 9532 // CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 9533 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 9534 // CHECK9: omp.dispatch.end: 9535 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9536 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 9537 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 9538 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9539 // CHECK9: omp.precond.end: 9540 // CHECK9-NEXT: ret void 9541 // 9542 // 9543 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 9544 // CHECK9-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 9545 // CHECK9-NEXT: entry: 9546 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9547 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 9548 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 9549 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 9550 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9551 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 9552 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 9553 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 9554 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9555 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9556 // CHECK9-NEXT: ret void 9557 // 9558 // 9559 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..18 9560 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9561 // CHECK9-NEXT: entry: 9562 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9563 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9564 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9565 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9566 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9567 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9568 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9569 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9570 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9571 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9572 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9573 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9574 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9575 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9576 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9577 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 9578 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9579 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9580 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9581 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9582 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9583 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9584 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9585 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9586 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9587 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9588 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9589 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9590 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9591 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9592 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9593 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9594 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9595 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9596 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9597 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9598 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9599 // CHECK9: omp.precond.then: 9600 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9601 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9602 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 9603 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9604 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9605 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9606 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9607 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9608 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9609 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9610 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9611 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9612 // CHECK9: cond.true: 9613 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9614 // CHECK9-NEXT: br label [[COND_END:%.*]] 9615 // CHECK9: cond.false: 9616 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9617 // CHECK9-NEXT: br label [[COND_END]] 9618 // CHECK9: cond.end: 9619 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9620 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9621 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9622 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 9623 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9624 // CHECK9: omp.inner.for.cond: 9625 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9626 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9627 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 9628 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9629 // CHECK9: omp.inner.for.body: 9630 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9631 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 9632 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9633 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9634 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 9635 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9636 // CHECK9: omp.inner.for.inc: 9637 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9638 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9639 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 9640 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9641 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9642 // CHECK9: omp.inner.for.end: 9643 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9644 // CHECK9: omp.loop.exit: 9645 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9646 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 9647 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 9648 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9649 // CHECK9: omp.precond.end: 9650 // CHECK9-NEXT: ret void 9651 // 9652 // 9653 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..19 9654 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9655 // CHECK9-NEXT: entry: 9656 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9657 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9658 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9659 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9660 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9661 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9662 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9663 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9664 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9665 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9666 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9667 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9668 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9669 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9670 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9671 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9672 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9673 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9674 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9675 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9676 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9677 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9678 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9679 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9680 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9681 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9682 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9683 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9684 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9685 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9686 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9687 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9688 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9689 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9690 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9691 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9692 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9693 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9694 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9695 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9696 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9697 // CHECK9: omp.precond.then: 9698 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9699 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9700 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9701 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9702 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 9703 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9704 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 9705 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9706 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 9707 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9708 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9709 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9710 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9711 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9712 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 9713 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 9714 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9715 // CHECK9: omp.dispatch.cond: 9716 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9717 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 9718 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9719 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 9720 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9721 // CHECK9: omp.dispatch.body: 9722 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9723 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 9724 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9725 // CHECK9: omp.inner.for.cond: 9726 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 9727 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 9728 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 9729 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9730 // CHECK9: omp.inner.for.body: 9731 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 9732 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 9733 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9734 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 9735 // CHECK9-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !19 9736 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 9737 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 9738 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 9739 // CHECK9-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !19 9740 // CHECK9-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !19 9741 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 9742 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 9743 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 9744 // CHECK9-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !19 9745 // CHECK9-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 9746 // CHECK9-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !19 9747 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 9748 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 9749 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 9750 // CHECK9-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !19 9751 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9752 // CHECK9: omp.body.continue: 9753 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9754 // CHECK9: omp.inner.for.inc: 9755 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 9756 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 9757 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 9758 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 9759 // CHECK9: omp.inner.for.end: 9760 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9761 // CHECK9: omp.dispatch.inc: 9762 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 9763 // CHECK9: omp.dispatch.end: 9764 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9765 // CHECK9: omp.precond.end: 9766 // CHECK9-NEXT: ret void 9767 // 9768 // 9769 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 9770 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 9771 // CHECK9-NEXT: entry: 9772 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 9773 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9774 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 9775 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 9776 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 9777 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 9778 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9779 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 9780 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 9781 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 9782 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 9783 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9784 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9785 // CHECK9-NEXT: ret void 9786 // 9787 // 9788 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..22 9789 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9790 // CHECK9-NEXT: entry: 9791 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9792 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9793 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 9794 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9795 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9796 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9797 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9798 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9799 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9800 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9801 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9802 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9803 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9804 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9805 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9806 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9807 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9808 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9809 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9810 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9811 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9812 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 9813 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9814 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9815 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9816 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9817 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 9818 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9819 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 9820 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 9821 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 9822 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 9823 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 9824 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 9825 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9826 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9827 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 9828 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9829 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9830 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9831 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9832 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9833 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 9834 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9835 // CHECK9: omp.precond.then: 9836 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9837 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9838 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 9839 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9840 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9841 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9842 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9843 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9844 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9845 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9846 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9847 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9848 // CHECK9: cond.true: 9849 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9850 // CHECK9-NEXT: br label [[COND_END:%.*]] 9851 // CHECK9: cond.false: 9852 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9853 // CHECK9-NEXT: br label [[COND_END]] 9854 // CHECK9: cond.end: 9855 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9856 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9857 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9858 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9859 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9860 // CHECK9: omp.inner.for.cond: 9861 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9862 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9863 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9864 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9865 // CHECK9: omp.inner.for.body: 9866 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9867 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9868 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9869 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 9870 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9871 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9872 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 9873 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9874 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 9875 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9876 // CHECK9: omp.inner.for.inc: 9877 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9878 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9879 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 9880 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9881 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9882 // CHECK9: omp.inner.for.end: 9883 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9884 // CHECK9: omp.loop.exit: 9885 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9886 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 9887 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 9888 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9889 // CHECK9: omp.precond.end: 9890 // CHECK9-NEXT: ret void 9891 // 9892 // 9893 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..23 9894 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 9895 // CHECK9-NEXT: entry: 9896 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9897 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9898 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9899 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9900 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9901 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 9902 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 9903 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 9904 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9905 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9906 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9907 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9908 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9909 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9910 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9911 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9912 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9913 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9914 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 9915 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9916 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9917 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9918 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9919 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9920 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 9921 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 9922 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 9923 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9924 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9925 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 9926 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 9927 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 9928 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9929 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9930 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9931 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9932 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9933 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9934 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9935 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9936 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 9937 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9938 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9939 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9940 // CHECK9: omp.precond.then: 9941 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9942 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9943 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9944 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9945 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 9946 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9947 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 9948 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 9949 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 9950 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9951 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9952 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 9953 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9954 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9955 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9956 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 9957 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 9958 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9959 // CHECK9: omp.dispatch.cond: 9960 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9961 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 9962 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9963 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 9964 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9965 // CHECK9: omp.dispatch.body: 9966 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9967 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 9968 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9969 // CHECK9: omp.inner.for.cond: 9970 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 9971 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 9972 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 9973 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9974 // CHECK9: omp.inner.for.body: 9975 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 9976 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 9977 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9978 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !22 9979 // CHECK9-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !22 9980 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 9981 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 9982 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 9983 // CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !22 9984 // CHECK9-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !22 9985 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 9986 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 9987 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 9988 // CHECK9-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !22 9989 // CHECK9-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 9990 // CHECK9-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !22 9991 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 9992 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 9993 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 9994 // CHECK9-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !22 9995 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9996 // CHECK9: omp.body.continue: 9997 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9998 // CHECK9: omp.inner.for.inc: 9999 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 10000 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 10001 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 10002 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 10003 // CHECK9: omp.inner.for.end: 10004 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10005 // CHECK9: omp.dispatch.inc: 10006 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 10007 // CHECK9: omp.dispatch.end: 10008 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 10009 // CHECK9: omp.precond.end: 10010 // CHECK9-NEXT: ret void 10011 // 10012 // 10013 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 10014 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] comdat { 10015 // CHECK9-NEXT: entry: 10016 // CHECK9-NEXT: [[A:%.*]] = alloca i32*, align 8 10017 // CHECK9-NEXT: [[B:%.*]] = alloca i32*, align 8 10018 // CHECK9-NEXT: [[C:%.*]] = alloca i32*, align 8 10019 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 10020 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 10021 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10022 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 10023 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 10024 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 10025 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 10026 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10027 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10028 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 10029 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 10030 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 10031 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 10032 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 10033 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 10034 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 10035 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 10036 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 10037 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 10038 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 10039 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 10040 // CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 10041 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 10042 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 10043 // CHECK9-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 10044 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 10045 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 10046 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 10047 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 10048 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 10049 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 10050 // CHECK9-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 10051 // CHECK9-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 10052 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 10053 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 10054 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 10055 // CHECK9-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 10056 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 10057 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 10058 // CHECK9-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 10059 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 10060 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 10061 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 10062 // CHECK9-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 10063 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 10064 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 10065 // CHECK9-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 10066 // CHECK9-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 10067 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 10068 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 10069 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 10070 // CHECK9-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 10071 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 10072 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 10073 // CHECK9-NEXT: store i32 10000, i32* [[N]], align 4 10074 // CHECK9-NEXT: store i32 100, i32* [[CH]], align 4 10075 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 10076 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 10077 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 10078 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 10079 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 10080 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 8 10081 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 8 10082 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10083 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 10084 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 10085 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10086 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 10087 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 10088 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10089 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 10090 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10091 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 10092 // CHECK9-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 8 10093 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10094 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 10095 // CHECK9-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 8 10096 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 10097 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 10098 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10099 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 10100 // CHECK9-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 8 10101 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10102 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 10103 // CHECK9-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 8 10104 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 10105 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 10106 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 10107 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 10108 // CHECK9-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 8 10109 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 10110 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 10111 // CHECK9-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 8 10112 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 10113 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 10114 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10115 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10116 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 10117 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 10118 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10119 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 10120 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10121 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10122 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10123 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10124 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 10125 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 10126 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 10127 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10128 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10129 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10130 // CHECK9: omp_offload.failed: 10131 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i64 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 10132 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 10133 // CHECK9: omp_offload.cont: 10134 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 10135 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 10136 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 10137 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 10138 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 8 10139 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 8 10140 // CHECK9-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 8 10141 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 10142 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 10143 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 10144 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 10145 // CHECK9-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 10146 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 10147 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 10148 // CHECK9-NEXT: store i8* null, i8** [[TMP42]], align 8 10149 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 10150 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 10151 // CHECK9-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 8 10152 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 10153 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 10154 // CHECK9-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 8 10155 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 10156 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8 10157 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 10158 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 10159 // CHECK9-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 8 10160 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 10161 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 10162 // CHECK9-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 8 10163 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 10164 // CHECK9-NEXT: store i8* null, i8** [[TMP52]], align 8 10165 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 10166 // CHECK9-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 10167 // CHECK9-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 8 10168 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 10169 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 10170 // CHECK9-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 8 10171 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 10172 // CHECK9-NEXT: store i8* null, i8** [[TMP57]], align 8 10173 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 10174 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 10175 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 10176 // CHECK9-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 10177 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 10178 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 10179 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 10180 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 10181 // CHECK9-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 10182 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 10183 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 10184 // CHECK9-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 10185 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 10186 // CHECK9-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10187 // CHECK9-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 10188 // CHECK9-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 10189 // CHECK9: omp_offload.failed15: 10190 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i64 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 10191 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 10192 // CHECK9: omp_offload.cont16: 10193 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 10194 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 10195 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 10196 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 10197 // CHECK9-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 10198 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 10199 // CHECK9-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 10200 // CHECK9-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 10201 // CHECK9-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 8 10202 // CHECK9-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 8 10203 // CHECK9-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 8 10204 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 10205 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 10206 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 10207 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 10208 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 10209 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 10210 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 10211 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 10212 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 10213 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 10214 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 10215 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 10216 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 10217 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 10218 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 10219 // CHECK9-NEXT: store i8* null, i8** [[TMP82]], align 8 10220 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 10221 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 10222 // CHECK9-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 8 10223 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 10224 // CHECK9-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 10225 // CHECK9-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 8 10226 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 10227 // CHECK9-NEXT: store i8* null, i8** [[TMP87]], align 8 10228 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 10229 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 10230 // CHECK9-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 8 10231 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 10232 // CHECK9-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 10233 // CHECK9-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 8 10234 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 10235 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8 10236 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 10237 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 10238 // CHECK9-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 8 10239 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 10240 // CHECK9-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 10241 // CHECK9-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 8 10242 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 10243 // CHECK9-NEXT: store i8* null, i8** [[TMP97]], align 8 10244 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 10245 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 10246 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 10247 // CHECK9-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 10248 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 10249 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 10250 // CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 10251 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 10252 // CHECK9-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 10253 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 10254 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 10255 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 10256 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 10257 // CHECK9-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10258 // CHECK9-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 10259 // CHECK9-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 10260 // CHECK9: omp_offload.failed30: 10261 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i64 [[TMP67]], i64 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 10262 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT31]] 10263 // CHECK9: omp_offload.cont31: 10264 // CHECK9-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 10265 // CHECK9-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 10266 // CHECK9-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 10267 // CHECK9-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 10268 // CHECK9-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 8 10269 // CHECK9-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 8 10270 // CHECK9-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 8 10271 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 10272 // CHECK9-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 10273 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 10274 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 10275 // CHECK9-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 10276 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 10277 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 10278 // CHECK9-NEXT: store i8* null, i8** [[TMP115]], align 8 10279 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 10280 // CHECK9-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 10281 // CHECK9-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 8 10282 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 10283 // CHECK9-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 10284 // CHECK9-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 8 10285 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 10286 // CHECK9-NEXT: store i8* null, i8** [[TMP120]], align 8 10287 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 10288 // CHECK9-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 10289 // CHECK9-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 8 10290 // CHECK9-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 10291 // CHECK9-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 10292 // CHECK9-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 8 10293 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 10294 // CHECK9-NEXT: store i8* null, i8** [[TMP125]], align 8 10295 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 10296 // CHECK9-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 10297 // CHECK9-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 8 10298 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 10299 // CHECK9-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 10300 // CHECK9-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 8 10301 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 10302 // CHECK9-NEXT: store i8* null, i8** [[TMP130]], align 8 10303 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 10304 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 10305 // CHECK9-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 10306 // CHECK9-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 10307 // CHECK9-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 10308 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 10309 // CHECK9-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 10310 // CHECK9-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 10311 // CHECK9-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 10312 // CHECK9-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 10313 // CHECK9-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 10314 // CHECK9-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 10315 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 10316 // CHECK9-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10317 // CHECK9-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 10318 // CHECK9-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 10319 // CHECK9: omp_offload.failed44: 10320 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i64 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 10321 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT45]] 10322 // CHECK9: omp_offload.cont45: 10323 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 10324 // CHECK9-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 10325 // CHECK9-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 10326 // CHECK9-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 10327 // CHECK9-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 10328 // CHECK9-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 10329 // CHECK9-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 10330 // CHECK9-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 10331 // CHECK9-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 8 10332 // CHECK9-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 8 10333 // CHECK9-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 8 10334 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 10335 // CHECK9-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 10336 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 10337 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 10338 // CHECK9-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 10339 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 10340 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 10341 // CHECK9-NEXT: store i8* null, i8** [[TMP150]], align 8 10342 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 10343 // CHECK9-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 10344 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 10345 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 10346 // CHECK9-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 10347 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 10348 // CHECK9-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 10349 // CHECK9-NEXT: store i8* null, i8** [[TMP155]], align 8 10350 // CHECK9-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 10351 // CHECK9-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 10352 // CHECK9-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 8 10353 // CHECK9-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 10354 // CHECK9-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 10355 // CHECK9-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 8 10356 // CHECK9-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 10357 // CHECK9-NEXT: store i8* null, i8** [[TMP160]], align 8 10358 // CHECK9-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 10359 // CHECK9-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 10360 // CHECK9-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 8 10361 // CHECK9-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 10362 // CHECK9-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 10363 // CHECK9-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 8 10364 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 10365 // CHECK9-NEXT: store i8* null, i8** [[TMP165]], align 8 10366 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 10367 // CHECK9-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 10368 // CHECK9-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 8 10369 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 10370 // CHECK9-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 10371 // CHECK9-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 8 10372 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 10373 // CHECK9-NEXT: store i8* null, i8** [[TMP170]], align 8 10374 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 10375 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 10376 // CHECK9-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 10377 // CHECK9-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 10378 // CHECK9-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 10379 // CHECK9-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 10380 // CHECK9-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 10381 // CHECK9-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 10382 // CHECK9-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 10383 // CHECK9-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 10384 // CHECK9-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 10385 // CHECK9-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 10386 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 10387 // CHECK9-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10388 // CHECK9-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 10389 // CHECK9-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 10390 // CHECK9: omp_offload.failed60: 10391 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i64 [[TMP140]], i64 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 10392 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT61]] 10393 // CHECK9: omp_offload.cont61: 10394 // CHECK9-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 10395 // CHECK9-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 10396 // CHECK9-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 10397 // CHECK9-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 10398 // CHECK9-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 8 10399 // CHECK9-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 8 10400 // CHECK9-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 8 10401 // CHECK9-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 10402 // CHECK9-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 10403 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 10404 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 10405 // CHECK9-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 10406 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 10407 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 10408 // CHECK9-NEXT: store i8* null, i8** [[TMP188]], align 8 10409 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 10410 // CHECK9-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 10411 // CHECK9-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 8 10412 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 10413 // CHECK9-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 10414 // CHECK9-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 8 10415 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 10416 // CHECK9-NEXT: store i8* null, i8** [[TMP193]], align 8 10417 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 10418 // CHECK9-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 10419 // CHECK9-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 8 10420 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 10421 // CHECK9-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 10422 // CHECK9-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 8 10423 // CHECK9-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 10424 // CHECK9-NEXT: store i8* null, i8** [[TMP198]], align 8 10425 // CHECK9-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 10426 // CHECK9-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 10427 // CHECK9-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 8 10428 // CHECK9-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 10429 // CHECK9-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 10430 // CHECK9-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 8 10431 // CHECK9-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 10432 // CHECK9-NEXT: store i8* null, i8** [[TMP203]], align 8 10433 // CHECK9-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 10434 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 10435 // CHECK9-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 10436 // CHECK9-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 10437 // CHECK9-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 10438 // CHECK9-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 10439 // CHECK9-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 10440 // CHECK9-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 10441 // CHECK9-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 10442 // CHECK9-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 10443 // CHECK9-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 10444 // CHECK9-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 10445 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 10446 // CHECK9-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10447 // CHECK9-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 10448 // CHECK9-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 10449 // CHECK9: omp_offload.failed74: 10450 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i64 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 10451 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT75]] 10452 // CHECK9: omp_offload.cont75: 10453 // CHECK9-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 10454 // CHECK9-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 10455 // CHECK9-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 10456 // CHECK9-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 10457 // CHECK9-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 10458 // CHECK9-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 10459 // CHECK9-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 10460 // CHECK9-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 10461 // CHECK9-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 8 10462 // CHECK9-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 8 10463 // CHECK9-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 8 10464 // CHECK9-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 10465 // CHECK9-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 10466 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 10467 // CHECK9-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 10468 // CHECK9-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 10469 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 10470 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 10471 // CHECK9-NEXT: store i8* null, i8** [[TMP223]], align 8 10472 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 10473 // CHECK9-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 10474 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 10475 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 10476 // CHECK9-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 10477 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 10478 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 10479 // CHECK9-NEXT: store i8* null, i8** [[TMP228]], align 8 10480 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 10481 // CHECK9-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 10482 // CHECK9-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 8 10483 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 10484 // CHECK9-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 10485 // CHECK9-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 8 10486 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 10487 // CHECK9-NEXT: store i8* null, i8** [[TMP233]], align 8 10488 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 10489 // CHECK9-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 10490 // CHECK9-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 8 10491 // CHECK9-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 10492 // CHECK9-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 10493 // CHECK9-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 8 10494 // CHECK9-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 10495 // CHECK9-NEXT: store i8* null, i8** [[TMP238]], align 8 10496 // CHECK9-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 10497 // CHECK9-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 10498 // CHECK9-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 8 10499 // CHECK9-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 10500 // CHECK9-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 10501 // CHECK9-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 8 10502 // CHECK9-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 10503 // CHECK9-NEXT: store i8* null, i8** [[TMP243]], align 8 10504 // CHECK9-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 10505 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 10506 // CHECK9-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 10507 // CHECK9-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 10508 // CHECK9-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 10509 // CHECK9-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 10510 // CHECK9-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 10511 // CHECK9-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 10512 // CHECK9-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 10513 // CHECK9-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 10514 // CHECK9-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 10515 // CHECK9-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 10516 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 10517 // CHECK9-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10518 // CHECK9-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 10519 // CHECK9-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 10520 // CHECK9: omp_offload.failed90: 10521 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i64 [[TMP213]], i64 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 10522 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT91]] 10523 // CHECK9: omp_offload.cont91: 10524 // CHECK9-NEXT: ret i32 0 10525 // 10526 // 10527 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 10528 // CHECK9-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 10529 // CHECK9-NEXT: entry: 10530 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10531 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10532 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 10533 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 10534 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10535 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10536 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 10537 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 10538 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10539 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 10540 // CHECK9-NEXT: ret void 10541 // 10542 // 10543 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..26 10544 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 10545 // CHECK9-NEXT: entry: 10546 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10547 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10548 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10549 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 10550 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 10551 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 10552 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10553 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 10554 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10555 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10556 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 10557 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10558 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10559 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10560 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10561 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 10562 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10563 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10564 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10565 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 10566 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 10567 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 10568 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10569 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 10570 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 10571 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 10572 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10573 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10574 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10575 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10576 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10577 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10578 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10579 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 10580 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10581 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10582 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10583 // CHECK9: omp.precond.then: 10584 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10585 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10586 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 10587 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10588 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10589 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10590 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 10591 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10592 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10593 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10594 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10595 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10596 // CHECK9: cond.true: 10597 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10598 // CHECK9-NEXT: br label [[COND_END:%.*]] 10599 // CHECK9: cond.false: 10600 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10601 // CHECK9-NEXT: br label [[COND_END]] 10602 // CHECK9: cond.end: 10603 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10604 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10605 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10606 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10607 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10608 // CHECK9: omp.inner.for.cond: 10609 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10610 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10611 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10612 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10613 // CHECK9: omp.inner.for.body: 10614 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10615 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10616 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10617 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 10618 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 10619 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10620 // CHECK9: omp.inner.for.inc: 10621 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10622 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10623 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10624 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10625 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 10626 // CHECK9: omp.inner.for.end: 10627 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10628 // CHECK9: omp.loop.exit: 10629 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10630 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 10631 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 10632 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 10633 // CHECK9: omp.precond.end: 10634 // CHECK9-NEXT: ret void 10635 // 10636 // 10637 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..27 10638 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 10639 // CHECK9-NEXT: entry: 10640 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10641 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10642 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10643 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10644 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10645 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 10646 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 10647 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 10648 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10649 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 10650 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10651 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10652 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 10653 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10654 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10655 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10656 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10657 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 10658 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10659 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10660 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10661 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10662 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10663 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 10664 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 10665 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 10666 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10667 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 10668 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 10669 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 10670 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10671 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10672 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10673 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10674 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10675 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10676 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10677 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 10678 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10679 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10680 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10681 // CHECK9: omp.precond.then: 10682 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10683 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10684 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10685 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10686 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 10687 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10688 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 10689 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10690 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10691 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10692 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10693 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10694 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 10695 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10696 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10697 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10698 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10699 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10700 // CHECK9: cond.true: 10701 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10702 // CHECK9-NEXT: br label [[COND_END:%.*]] 10703 // CHECK9: cond.false: 10704 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10705 // CHECK9-NEXT: br label [[COND_END]] 10706 // CHECK9: cond.end: 10707 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10708 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10709 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10710 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 10711 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10712 // CHECK9: omp.inner.for.cond: 10713 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10714 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10715 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10716 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10717 // CHECK9: omp.inner.for.body: 10718 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10719 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10720 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10721 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10722 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10723 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 10724 // CHECK9-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 10725 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 10726 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 10727 // CHECK9: .cancel.exit: 10728 // CHECK9-NEXT: br label [[CANCEL_EXIT:%.*]] 10729 // CHECK9: .cancel.continue: 10730 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 8 10731 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4 10732 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64 10733 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM]] 10734 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10735 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 8 10736 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4 10737 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP28]] to i64 10738 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM7]] 10739 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 10740 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 10741 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 8 10742 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[I4]], align 4 10743 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP31]] to i64 10744 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i64 [[IDXPROM10]] 10745 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 10746 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10747 // CHECK9: omp.body.continue: 10748 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10749 // CHECK9: omp.inner.for.inc: 10750 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10751 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 10752 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 10753 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 10754 // CHECK9: omp.inner.for.end: 10755 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10756 // CHECK9: omp.loop.exit: 10757 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10758 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 10759 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 10760 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 10761 // CHECK9: cancel.exit: 10762 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10763 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 10764 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 10765 // CHECK9-NEXT: br label [[CANCEL_CONT:%.*]] 10766 // CHECK9: omp.precond.end: 10767 // CHECK9-NEXT: br label [[CANCEL_CONT]] 10768 // CHECK9: cancel.cont: 10769 // CHECK9-NEXT: ret void 10770 // 10771 // 10772 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 10773 // CHECK9-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 10774 // CHECK9-NEXT: entry: 10775 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10776 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10777 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 10778 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 10779 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10780 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10781 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 10782 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 10783 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10784 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 10785 // CHECK9-NEXT: ret void 10786 // 10787 // 10788 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..30 10789 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 10790 // CHECK9-NEXT: entry: 10791 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10792 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10793 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10794 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 10795 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 10796 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 10797 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10798 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 10799 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10800 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10801 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 10802 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10803 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10804 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10805 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10806 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 10807 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10808 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10809 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10810 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 10811 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 10812 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 10813 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10814 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 10815 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 10816 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 10817 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10818 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10819 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10820 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10821 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10822 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10823 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10824 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 10825 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10826 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10827 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10828 // CHECK9: omp.precond.then: 10829 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10830 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10831 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 10832 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10833 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10834 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10835 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 10836 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10837 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10838 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10839 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10840 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10841 // CHECK9: cond.true: 10842 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10843 // CHECK9-NEXT: br label [[COND_END:%.*]] 10844 // CHECK9: cond.false: 10845 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10846 // CHECK9-NEXT: br label [[COND_END]] 10847 // CHECK9: cond.end: 10848 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10849 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10850 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10851 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10852 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10853 // CHECK9: omp.inner.for.cond: 10854 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10855 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10856 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10857 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10858 // CHECK9: omp.inner.for.body: 10859 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10860 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10861 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10862 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 10863 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 10864 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10865 // CHECK9: omp.inner.for.inc: 10866 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10867 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10868 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10869 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10870 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 10871 // CHECK9: omp.inner.for.end: 10872 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10873 // CHECK9: omp.loop.exit: 10874 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10875 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 10876 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 10877 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 10878 // CHECK9: omp.precond.end: 10879 // CHECK9-NEXT: ret void 10880 // 10881 // 10882 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..31 10883 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 10884 // CHECK9-NEXT: entry: 10885 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10886 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10887 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10888 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10889 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10890 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 10891 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 10892 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 10893 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10894 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 10895 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10896 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10897 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 10898 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10899 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10900 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10901 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10902 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 10903 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10904 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10905 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10906 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10907 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10908 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 10909 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 10910 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 10911 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10912 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 10913 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 10914 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 10915 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10916 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10917 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10918 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10919 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10920 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10921 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10922 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 10923 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10924 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10925 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10926 // CHECK9: omp.precond.then: 10927 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10928 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10929 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10930 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10931 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 10932 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10933 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 10934 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10935 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10936 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10937 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10938 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10939 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 10940 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10941 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10942 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10943 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10944 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10945 // CHECK9: cond.true: 10946 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10947 // CHECK9-NEXT: br label [[COND_END:%.*]] 10948 // CHECK9: cond.false: 10949 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10950 // CHECK9-NEXT: br label [[COND_END]] 10951 // CHECK9: cond.end: 10952 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10953 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10954 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10955 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 10956 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10957 // CHECK9: omp.inner.for.cond: 10958 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10959 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10960 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10961 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10962 // CHECK9: omp.inner.for.body: 10963 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10964 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10965 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10966 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10967 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 10968 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 10969 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 10970 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 10971 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 10972 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 10973 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 10974 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 10975 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 10976 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 10977 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 10978 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 10979 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 10980 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 10981 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 10982 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 10983 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10984 // CHECK9: omp.body.continue: 10985 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10986 // CHECK9: omp.inner.for.inc: 10987 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10988 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 10989 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 10990 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 10991 // CHECK9: omp.inner.for.end: 10992 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10993 // CHECK9: omp.loop.exit: 10994 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10995 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 10996 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 10997 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 10998 // CHECK9: omp.precond.end: 10999 // CHECK9-NEXT: ret void 11000 // 11001 // 11002 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 11003 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 11004 // CHECK9-NEXT: entry: 11005 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 11006 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11007 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11008 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 11009 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 11010 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 11011 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11012 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11013 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 11014 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 11015 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 11016 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11017 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11018 // CHECK9-NEXT: ret void 11019 // 11020 // 11021 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..34 11022 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11023 // CHECK9-NEXT: entry: 11024 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11025 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11026 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 11027 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11028 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11029 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11030 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11031 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11032 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11033 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11034 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11035 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11036 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11037 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11038 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11039 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11040 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 11041 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11042 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11043 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 11044 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11045 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11046 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11047 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11048 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 11049 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11050 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11051 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11052 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11053 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 11054 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 11055 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11056 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 11057 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11058 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11059 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11060 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11061 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11062 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 11063 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11064 // CHECK9: omp.precond.then: 11065 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11066 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11067 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 11068 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11069 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11070 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 11071 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11072 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11073 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 11074 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11075 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11076 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11077 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11078 // CHECK9: cond.true: 11079 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11080 // CHECK9-NEXT: br label [[COND_END:%.*]] 11081 // CHECK9: cond.false: 11082 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11083 // CHECK9-NEXT: br label [[COND_END]] 11084 // CHECK9: cond.end: 11085 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11086 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11087 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11088 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11089 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11090 // CHECK9: omp.inner.for.cond: 11091 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11092 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11093 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 11094 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 11095 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11096 // CHECK9: omp.inner.for.body: 11097 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11098 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 11099 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11100 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 11101 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 11102 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11103 // CHECK9: omp.inner.for.inc: 11104 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11105 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11106 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11107 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 11108 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11109 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11110 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 11111 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 11112 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11113 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11114 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 11115 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 11116 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11117 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11118 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 11119 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 11120 // CHECK9: cond.true10: 11121 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11122 // CHECK9-NEXT: br label [[COND_END12:%.*]] 11123 // CHECK9: cond.false11: 11124 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11125 // CHECK9-NEXT: br label [[COND_END12]] 11126 // CHECK9: cond.end12: 11127 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 11128 // CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 11129 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11130 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 11131 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11132 // CHECK9: omp.inner.for.end: 11133 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11134 // CHECK9: omp.loop.exit: 11135 // CHECK9-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11136 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 11137 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 11138 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11139 // CHECK9: omp.precond.end: 11140 // CHECK9-NEXT: ret void 11141 // 11142 // 11143 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..35 11144 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11145 // CHECK9-NEXT: entry: 11146 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11147 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11148 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11149 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11150 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11151 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11152 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11153 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11154 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11155 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11156 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11157 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11158 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11159 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11160 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11161 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11162 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11163 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 11164 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11165 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11166 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11167 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11168 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11169 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11170 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11171 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11172 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11173 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11174 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11175 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11176 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11177 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11178 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11179 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11180 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11181 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11182 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11183 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11184 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11185 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11186 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11187 // CHECK9: omp.precond.then: 11188 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11189 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11190 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11191 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11192 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 11193 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11194 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 11195 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11196 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 11197 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11198 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11199 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11200 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11201 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11202 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11203 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11204 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11205 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11206 // CHECK9: cond.true: 11207 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11208 // CHECK9-NEXT: br label [[COND_END:%.*]] 11209 // CHECK9: cond.false: 11210 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11211 // CHECK9-NEXT: br label [[COND_END]] 11212 // CHECK9: cond.end: 11213 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11214 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11215 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11216 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11217 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11218 // CHECK9: omp.inner.for.cond: 11219 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11220 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11221 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11222 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11223 // CHECK9: omp.inner.for.body: 11224 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11225 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11226 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11227 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 11228 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 11229 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 11230 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 11231 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 11232 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11233 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 11234 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 11235 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 11236 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 11237 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 11238 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 11239 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 11240 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 11241 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 11242 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 11243 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 11244 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11245 // CHECK9: omp.body.continue: 11246 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11247 // CHECK9: omp.inner.for.inc: 11248 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11249 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 11250 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 11251 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11252 // CHECK9: omp.inner.for.end: 11253 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11254 // CHECK9: omp.loop.exit: 11255 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11256 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 11257 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 11258 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11259 // CHECK9: omp.precond.end: 11260 // CHECK9-NEXT: ret void 11261 // 11262 // 11263 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 11264 // CHECK9-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 11265 // CHECK9-NEXT: entry: 11266 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11267 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11268 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 11269 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 11270 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11271 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11272 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 11273 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 11274 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11275 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11276 // CHECK9-NEXT: ret void 11277 // 11278 // 11279 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..38 11280 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11281 // CHECK9-NEXT: entry: 11282 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11283 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11284 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11285 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11286 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11287 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11288 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11289 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11290 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11291 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11292 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11293 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11294 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11295 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11296 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11297 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 11298 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11299 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11300 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11301 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11302 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11303 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11304 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11305 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11306 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11307 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11308 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11309 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11310 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11311 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11312 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11313 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11314 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11315 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11316 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11317 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11318 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11319 // CHECK9: omp.precond.then: 11320 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11321 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11322 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 11323 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11324 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11325 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11326 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 11327 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11328 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11329 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11330 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11331 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11332 // CHECK9: cond.true: 11333 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11334 // CHECK9-NEXT: br label [[COND_END:%.*]] 11335 // CHECK9: cond.false: 11336 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11337 // CHECK9-NEXT: br label [[COND_END]] 11338 // CHECK9: cond.end: 11339 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11340 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11341 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11342 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 11343 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11344 // CHECK9: omp.inner.for.cond: 11345 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11346 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11347 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11348 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11349 // CHECK9: omp.inner.for.body: 11350 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11351 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 11352 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11353 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 11354 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 11355 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11356 // CHECK9: omp.inner.for.inc: 11357 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11358 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11359 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11360 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11361 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11362 // CHECK9: omp.inner.for.end: 11363 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11364 // CHECK9: omp.loop.exit: 11365 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11366 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 11367 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 11368 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11369 // CHECK9: omp.precond.end: 11370 // CHECK9-NEXT: ret void 11371 // 11372 // 11373 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..39 11374 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11375 // CHECK9-NEXT: entry: 11376 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11377 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11378 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11379 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11380 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11381 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11382 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11383 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11384 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11385 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11386 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11387 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11388 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11389 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11390 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11391 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11392 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11393 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 11394 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11395 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11396 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11397 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11398 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11399 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11400 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11401 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11402 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11403 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11404 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11405 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11406 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11407 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11408 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11409 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11410 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11411 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11412 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11413 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11414 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11415 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11416 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11417 // CHECK9: omp.precond.then: 11418 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11419 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11420 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11421 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11422 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 11423 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11424 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 11425 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11426 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 11427 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11428 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11429 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11430 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11431 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11432 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11433 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11434 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11435 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11436 // CHECK9: cond.true: 11437 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11438 // CHECK9-NEXT: br label [[COND_END:%.*]] 11439 // CHECK9: cond.false: 11440 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11441 // CHECK9-NEXT: br label [[COND_END]] 11442 // CHECK9: cond.end: 11443 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11444 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11445 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11446 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11447 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11448 // CHECK9: omp.inner.for.cond: 11449 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11450 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11451 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11452 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11453 // CHECK9: omp.inner.for.body: 11454 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11455 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11456 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11457 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 11458 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 11459 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 11460 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 11461 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 11462 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11463 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 11464 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 11465 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 11466 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 11467 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 11468 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 11469 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 11470 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 11471 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 11472 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 11473 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 11474 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11475 // CHECK9: omp.body.continue: 11476 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11477 // CHECK9: omp.inner.for.inc: 11478 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11479 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 11480 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 11481 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11482 // CHECK9: omp.inner.for.end: 11483 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11484 // CHECK9: omp.loop.exit: 11485 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11486 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 11487 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 11488 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11489 // CHECK9: omp.precond.end: 11490 // CHECK9-NEXT: ret void 11491 // 11492 // 11493 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 11494 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 11495 // CHECK9-NEXT: entry: 11496 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 11497 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11498 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11499 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 11500 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 11501 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 11502 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11503 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11504 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 11505 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 11506 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 11507 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11508 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11509 // CHECK9-NEXT: ret void 11510 // 11511 // 11512 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..42 11513 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11514 // CHECK9-NEXT: entry: 11515 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11516 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11517 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 11518 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11519 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11520 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11521 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11522 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11523 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11524 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11525 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11526 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11527 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11528 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11529 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11530 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11531 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11532 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 11533 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11534 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11535 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11536 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 11537 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11538 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11539 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11540 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11541 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 11542 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11543 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11544 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11545 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11546 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 11547 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 11548 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 11549 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11550 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11551 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 11552 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11553 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11554 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11555 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11556 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11557 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 11558 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11559 // CHECK9: omp.precond.then: 11560 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11561 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11562 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 11563 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11564 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11565 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11566 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11567 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11568 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11569 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11570 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11571 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11572 // CHECK9: cond.true: 11573 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11574 // CHECK9-NEXT: br label [[COND_END:%.*]] 11575 // CHECK9: cond.false: 11576 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11577 // CHECK9-NEXT: br label [[COND_END]] 11578 // CHECK9: cond.end: 11579 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11580 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11581 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11582 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11583 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11584 // CHECK9: omp.inner.for.cond: 11585 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11586 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11587 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11588 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11589 // CHECK9: omp.inner.for.body: 11590 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11591 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 11592 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11593 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 11594 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11595 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11596 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 11597 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11598 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 11599 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11600 // CHECK9: omp.inner.for.inc: 11601 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11602 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11603 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 11604 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11605 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11606 // CHECK9: omp.inner.for.end: 11607 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11608 // CHECK9: omp.loop.exit: 11609 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11610 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 11611 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 11612 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11613 // CHECK9: omp.precond.end: 11614 // CHECK9-NEXT: ret void 11615 // 11616 // 11617 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..43 11618 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 11619 // CHECK9-NEXT: entry: 11620 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11621 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11622 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11623 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11624 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11625 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11626 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11627 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11628 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11629 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11630 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11631 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11632 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11633 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11634 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11635 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11636 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11637 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11638 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 11639 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11640 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11641 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11642 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11643 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11644 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11645 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11646 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11647 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11648 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11649 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11650 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11651 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11652 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11653 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11654 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11655 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11656 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11657 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11658 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11659 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11660 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11661 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11662 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11663 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11664 // CHECK9: omp.precond.then: 11665 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11666 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11667 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11668 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11669 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 11670 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11671 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 11672 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 11673 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 11674 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11675 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11676 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 11677 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11678 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 11679 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 11680 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11681 // CHECK9: omp.dispatch.cond: 11682 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11683 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11684 // CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 11685 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 11686 // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11687 // CHECK9: cond.true: 11688 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11689 // CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 11690 // CHECK9-NEXT: br label [[COND_END:%.*]] 11691 // CHECK9: cond.false: 11692 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11693 // CHECK9-NEXT: br label [[COND_END]] 11694 // CHECK9: cond.end: 11695 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 11696 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11697 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11698 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 11699 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11700 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11701 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11702 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11703 // CHECK9: omp.dispatch.body: 11704 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11705 // CHECK9: omp.inner.for.cond: 11706 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11707 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11708 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 11709 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11710 // CHECK9: omp.inner.for.body: 11711 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11712 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 11713 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11714 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 11715 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 8 11716 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 11717 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 11718 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM]] 11719 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11720 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8 11721 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 11722 // CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 11723 // CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] 11724 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4 11725 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 11726 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8 11727 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 11728 // CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 11729 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] 11730 // CHECK9-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4 11731 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11732 // CHECK9: omp.body.continue: 11733 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11734 // CHECK9: omp.inner.for.inc: 11735 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11736 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 11737 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 11738 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11739 // CHECK9: omp.inner.for.end: 11740 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11741 // CHECK9: omp.dispatch.inc: 11742 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11743 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11744 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 11745 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 11746 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11747 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11748 // CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 11749 // CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 11750 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 11751 // CHECK9: omp.dispatch.end: 11752 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11753 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 11754 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 11755 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11756 // CHECK9: omp.precond.end: 11757 // CHECK9-NEXT: ret void 11758 // 11759 // 11760 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 11761 // CHECK9-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 11762 // CHECK9-NEXT: entry: 11763 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11764 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11765 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 11766 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 11767 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11768 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11769 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 11770 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 11771 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11772 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11773 // CHECK9-NEXT: ret void 11774 // 11775 // 11776 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..46 11777 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11778 // CHECK9-NEXT: entry: 11779 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11780 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11781 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11782 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11783 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11784 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11785 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11786 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11787 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11788 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11789 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11790 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11791 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11792 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11793 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11794 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 11795 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11796 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11797 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11798 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11799 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11800 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11801 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11802 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11803 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11804 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11805 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11806 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11807 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11808 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11809 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11810 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11811 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11812 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11813 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11814 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11815 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11816 // CHECK9: omp.precond.then: 11817 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11818 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11819 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 11820 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11821 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11822 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11823 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 11824 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11825 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11826 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11827 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11828 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11829 // CHECK9: cond.true: 11830 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11831 // CHECK9-NEXT: br label [[COND_END:%.*]] 11832 // CHECK9: cond.false: 11833 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11834 // CHECK9-NEXT: br label [[COND_END]] 11835 // CHECK9: cond.end: 11836 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11837 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11838 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11839 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 11840 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11841 // CHECK9: omp.inner.for.cond: 11842 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11843 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11844 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11845 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11846 // CHECK9: omp.inner.for.body: 11847 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11848 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 11849 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11850 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 11851 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 11852 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11853 // CHECK9: omp.inner.for.inc: 11854 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11855 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11856 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11857 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11858 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 11859 // CHECK9: omp.inner.for.end: 11860 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11861 // CHECK9: omp.loop.exit: 11862 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11863 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 11864 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 11865 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11866 // CHECK9: omp.precond.end: 11867 // CHECK9-NEXT: ret void 11868 // 11869 // 11870 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..47 11871 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 11872 // CHECK9-NEXT: entry: 11873 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11874 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11875 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11876 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11877 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11878 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 11879 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 11880 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 11881 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11882 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 11883 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11884 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11885 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 11886 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11887 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11888 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11889 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11890 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 11891 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11892 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11893 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11894 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11895 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11896 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 11897 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 11898 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 11899 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11900 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 11901 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 11902 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 11903 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11904 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11905 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11906 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11907 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11908 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11909 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11910 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 11911 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11912 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11913 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11914 // CHECK9: omp.precond.then: 11915 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11916 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11917 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11918 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11919 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 11920 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11921 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 11922 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11923 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 11924 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11925 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11926 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11927 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11928 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11929 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 11930 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 11931 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11932 // CHECK9: omp.dispatch.cond: 11933 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11934 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 11935 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11936 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 11937 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11938 // CHECK9: omp.dispatch.body: 11939 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11940 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 11941 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11942 // CHECK9: omp.inner.for.cond: 11943 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 11944 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 11945 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11946 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11947 // CHECK9: omp.inner.for.body: 11948 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 11949 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 11950 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11951 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 11952 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !25 11953 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 11954 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 11955 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i64 [[IDXPROM]] 11956 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 11957 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !25 11958 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 11959 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 11960 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM6]] 11961 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !25 11962 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 11963 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !25 11964 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 11965 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 11966 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM9]] 11967 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX10]], align 4, !llvm.access.group !25 11968 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11969 // CHECK9: omp.body.continue: 11970 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11971 // CHECK9: omp.inner.for.inc: 11972 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 11973 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 11974 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 11975 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 11976 // CHECK9: omp.inner.for.end: 11977 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11978 // CHECK9: omp.dispatch.inc: 11979 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 11980 // CHECK9: omp.dispatch.end: 11981 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 11982 // CHECK9: omp.precond.end: 11983 // CHECK9-NEXT: ret void 11984 // 11985 // 11986 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 11987 // CHECK9-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 11988 // CHECK9-NEXT: entry: 11989 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 11990 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11991 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11992 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 11993 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 11994 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 11995 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11996 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11997 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 11998 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 11999 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 12000 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 12001 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 12002 // CHECK9-NEXT: ret void 12003 // 12004 // 12005 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..50 12006 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 12007 // CHECK9-NEXT: entry: 12008 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12009 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12010 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 12011 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 12012 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 12013 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 12014 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 12015 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12016 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12017 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 12018 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12019 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12020 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 12021 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12022 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12023 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12024 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12025 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 12026 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12027 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12028 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12029 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 12030 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 12031 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 12032 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 12033 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 12034 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 12035 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 12036 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 12037 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 12038 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 12039 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 12040 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 12041 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 12042 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12043 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12044 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 12045 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12046 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12047 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12048 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 12049 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12050 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 12051 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12052 // CHECK9: omp.precond.then: 12053 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12054 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12055 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 12056 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12057 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12058 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12059 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12060 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12061 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12062 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12063 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12064 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12065 // CHECK9: cond.true: 12066 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12067 // CHECK9-NEXT: br label [[COND_END:%.*]] 12068 // CHECK9: cond.false: 12069 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12070 // CHECK9-NEXT: br label [[COND_END]] 12071 // CHECK9: cond.end: 12072 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12073 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12074 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12075 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12076 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12077 // CHECK9: omp.inner.for.cond: 12078 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12079 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12080 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12081 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12082 // CHECK9: omp.inner.for.body: 12083 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12084 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 12085 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12086 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 12087 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12088 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12089 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 12090 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12091 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 12092 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12093 // CHECK9: omp.inner.for.inc: 12094 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12095 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12096 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 12097 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12098 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 12099 // CHECK9: omp.inner.for.end: 12100 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12101 // CHECK9: omp.loop.exit: 12102 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12103 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 12104 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 12105 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 12106 // CHECK9: omp.precond.end: 12107 // CHECK9-NEXT: ret void 12108 // 12109 // 12110 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..51 12111 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 12112 // CHECK9-NEXT: entry: 12113 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12114 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12115 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12116 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12117 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 12118 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 12119 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 12120 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 12121 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12122 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12123 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 12124 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12125 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12126 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 12127 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12128 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12129 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12130 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12131 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 12132 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12133 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12134 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12135 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12136 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 12137 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 12138 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 12139 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 12140 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12141 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 12142 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 12143 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 12144 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 12145 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12146 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12147 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12148 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12149 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12150 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12151 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12152 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12153 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 12154 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12155 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12156 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12157 // CHECK9: omp.precond.then: 12158 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12159 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12160 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12161 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12162 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 12163 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12164 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 12165 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 12166 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 12167 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12168 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12169 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 12170 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12171 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12172 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12173 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 12174 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 12175 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12176 // CHECK9: omp.dispatch.cond: 12177 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12178 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 12179 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12180 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 12181 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12182 // CHECK9: omp.dispatch.body: 12183 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12184 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 12185 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12186 // CHECK9: omp.inner.for.cond: 12187 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 12188 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 12189 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 12190 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12191 // CHECK9: omp.inner.for.body: 12192 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 12193 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 12194 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12195 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !28 12196 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !28 12197 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 12198 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 12199 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i64 [[IDXPROM]] 12200 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 12201 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !28 12202 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 12203 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 12204 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i64 [[IDXPROM8]] 12205 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !28 12206 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 12207 // CHECK9-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !28 12208 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 12209 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 12210 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i64 [[IDXPROM11]] 12211 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[ARRAYIDX12]], align 4, !llvm.access.group !28 12212 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12213 // CHECK9: omp.body.continue: 12214 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12215 // CHECK9: omp.inner.for.inc: 12216 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 12217 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 12218 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 12219 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 12220 // CHECK9: omp.inner.for.end: 12221 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12222 // CHECK9: omp.dispatch.inc: 12223 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 12224 // CHECK9: omp.dispatch.end: 12225 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 12226 // CHECK9: omp.precond.end: 12227 // CHECK9-NEXT: ret void 12228 // 12229 // 12230 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 12231 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { 12232 // CHECK9-NEXT: entry: 12233 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 12234 // CHECK9-NEXT: ret void 12235 // 12236 // 12237 // CHECK10-LABEL: define {{[^@]+}}@main 12238 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 12239 // CHECK10-NEXT: entry: 12240 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 12241 // CHECK10-NEXT: [[A:%.*]] = alloca double*, align 8 12242 // CHECK10-NEXT: [[B:%.*]] = alloca double*, align 8 12243 // CHECK10-NEXT: [[C:%.*]] = alloca double*, align 8 12244 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 12245 // CHECK10-NEXT: [[CH:%.*]] = alloca i32, align 4 12246 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 12247 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 12248 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 12249 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 12250 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 12251 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12252 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12253 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 12254 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 12255 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 12256 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 12257 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 12258 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 12259 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 12260 // CHECK10-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 12261 // CHECK10-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 12262 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 12263 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 12264 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 12265 // CHECK10-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 12266 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 12267 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 12268 // CHECK10-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 12269 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 12270 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 12271 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 12272 // CHECK10-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 12273 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 12274 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 12275 // CHECK10-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 12276 // CHECK10-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 12277 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 12278 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 12279 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 12280 // CHECK10-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 12281 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 12282 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 12283 // CHECK10-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 12284 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 12285 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 12286 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 12287 // CHECK10-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 12288 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 12289 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 12290 // CHECK10-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 12291 // CHECK10-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 12292 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 12293 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 12294 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 12295 // CHECK10-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 12296 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 12297 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 12298 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 12299 // CHECK10-NEXT: store i32 10000, i32* [[N]], align 4 12300 // CHECK10-NEXT: store i32 100, i32* [[CH]], align 4 12301 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 12302 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 12303 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 12304 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 12305 // CHECK10-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 8 12306 // CHECK10-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 8 12307 // CHECK10-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 8 12308 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12309 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 12310 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 12311 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12312 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 12313 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 12314 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 12315 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8 12316 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12317 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 12318 // CHECK10-NEXT: store double* [[TMP2]], double** [[TMP11]], align 8 12319 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12320 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 12321 // CHECK10-NEXT: store double* [[TMP2]], double** [[TMP13]], align 8 12322 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 12323 // CHECK10-NEXT: store i8* null, i8** [[TMP14]], align 8 12324 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12325 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 12326 // CHECK10-NEXT: store double* [[TMP3]], double** [[TMP16]], align 8 12327 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12328 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 12329 // CHECK10-NEXT: store double* [[TMP3]], double** [[TMP18]], align 8 12330 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 12331 // CHECK10-NEXT: store i8* null, i8** [[TMP19]], align 8 12332 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 12333 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 12334 // CHECK10-NEXT: store double* [[TMP4]], double** [[TMP21]], align 8 12335 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 12336 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 12337 // CHECK10-NEXT: store double* [[TMP4]], double** [[TMP23]], align 8 12338 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 12339 // CHECK10-NEXT: store i8* null, i8** [[TMP24]], align 8 12340 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12341 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12342 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 12343 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 12344 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12345 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 12346 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12347 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12348 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12349 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12350 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 12351 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 12352 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 12353 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12354 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 12355 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12356 // CHECK10: omp_offload.failed: 12357 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i64 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 12358 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 12359 // CHECK10: omp_offload.cont: 12360 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 12361 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 12362 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 12363 // CHECK10-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 12364 // CHECK10-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 8 12365 // CHECK10-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 8 12366 // CHECK10-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 8 12367 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 12368 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 12369 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 12370 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 12371 // CHECK10-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 12372 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 12373 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 12374 // CHECK10-NEXT: store i8* null, i8** [[TMP42]], align 8 12375 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 12376 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 12377 // CHECK10-NEXT: store double* [[TMP35]], double** [[TMP44]], align 8 12378 // CHECK10-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 12379 // CHECK10-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 12380 // CHECK10-NEXT: store double* [[TMP35]], double** [[TMP46]], align 8 12381 // CHECK10-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 12382 // CHECK10-NEXT: store i8* null, i8** [[TMP47]], align 8 12383 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 12384 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 12385 // CHECK10-NEXT: store double* [[TMP36]], double** [[TMP49]], align 8 12386 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 12387 // CHECK10-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 12388 // CHECK10-NEXT: store double* [[TMP36]], double** [[TMP51]], align 8 12389 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 12390 // CHECK10-NEXT: store i8* null, i8** [[TMP52]], align 8 12391 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 12392 // CHECK10-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 12393 // CHECK10-NEXT: store double* [[TMP37]], double** [[TMP54]], align 8 12394 // CHECK10-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 12395 // CHECK10-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 12396 // CHECK10-NEXT: store double* [[TMP37]], double** [[TMP56]], align 8 12397 // CHECK10-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 12398 // CHECK10-NEXT: store i8* null, i8** [[TMP57]], align 8 12399 // CHECK10-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 12400 // CHECK10-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 12401 // CHECK10-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 12402 // CHECK10-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 12403 // CHECK10-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 12404 // CHECK10-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 12405 // CHECK10-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 12406 // CHECK10-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 12407 // CHECK10-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 12408 // CHECK10-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 12409 // CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 12410 // CHECK10-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 12411 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 12412 // CHECK10-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12413 // CHECK10-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 12414 // CHECK10-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 12415 // CHECK10: omp_offload.failed15: 12416 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i64 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 12417 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT16]] 12418 // CHECK10: omp_offload.cont16: 12419 // CHECK10-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 12420 // CHECK10-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 12421 // CHECK10-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 12422 // CHECK10-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 12423 // CHECK10-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 12424 // CHECK10-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 12425 // CHECK10-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 12426 // CHECK10-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 12427 // CHECK10-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 8 12428 // CHECK10-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 8 12429 // CHECK10-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 8 12430 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12431 // CHECK10-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 12432 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 12433 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12434 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 12435 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 12436 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 12437 // CHECK10-NEXT: store i8* null, i8** [[TMP77]], align 8 12438 // CHECK10-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 12439 // CHECK10-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 12440 // CHECK10-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 12441 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 12442 // CHECK10-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 12443 // CHECK10-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 12444 // CHECK10-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 12445 // CHECK10-NEXT: store i8* null, i8** [[TMP82]], align 8 12446 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 12447 // CHECK10-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 12448 // CHECK10-NEXT: store double* [[TMP70]], double** [[TMP84]], align 8 12449 // CHECK10-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 12450 // CHECK10-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 12451 // CHECK10-NEXT: store double* [[TMP70]], double** [[TMP86]], align 8 12452 // CHECK10-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 12453 // CHECK10-NEXT: store i8* null, i8** [[TMP87]], align 8 12454 // CHECK10-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 12455 // CHECK10-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 12456 // CHECK10-NEXT: store double* [[TMP71]], double** [[TMP89]], align 8 12457 // CHECK10-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 12458 // CHECK10-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 12459 // CHECK10-NEXT: store double* [[TMP71]], double** [[TMP91]], align 8 12460 // CHECK10-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 12461 // CHECK10-NEXT: store i8* null, i8** [[TMP92]], align 8 12462 // CHECK10-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 12463 // CHECK10-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 12464 // CHECK10-NEXT: store double* [[TMP72]], double** [[TMP94]], align 8 12465 // CHECK10-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 12466 // CHECK10-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 12467 // CHECK10-NEXT: store double* [[TMP72]], double** [[TMP96]], align 8 12468 // CHECK10-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 12469 // CHECK10-NEXT: store i8* null, i8** [[TMP97]], align 8 12470 // CHECK10-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12471 // CHECK10-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12472 // CHECK10-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 12473 // CHECK10-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 12474 // CHECK10-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 12475 // CHECK10-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 12476 // CHECK10-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 12477 // CHECK10-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 12478 // CHECK10-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 12479 // CHECK10-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 12480 // CHECK10-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 12481 // CHECK10-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 12482 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 12483 // CHECK10-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12484 // CHECK10-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 12485 // CHECK10-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 12486 // CHECK10: omp_offload.failed30: 12487 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i64 [[TMP67]], i64 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 12488 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT31]] 12489 // CHECK10: omp_offload.cont31: 12490 // CHECK10-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 12491 // CHECK10-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 12492 // CHECK10-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 12493 // CHECK10-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 12494 // CHECK10-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 8 12495 // CHECK10-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 8 12496 // CHECK10-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 8 12497 // CHECK10-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 12498 // CHECK10-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 12499 // CHECK10-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 12500 // CHECK10-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 12501 // CHECK10-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 12502 // CHECK10-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 12503 // CHECK10-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 12504 // CHECK10-NEXT: store i8* null, i8** [[TMP115]], align 8 12505 // CHECK10-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 12506 // CHECK10-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 12507 // CHECK10-NEXT: store double* [[TMP108]], double** [[TMP117]], align 8 12508 // CHECK10-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 12509 // CHECK10-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 12510 // CHECK10-NEXT: store double* [[TMP108]], double** [[TMP119]], align 8 12511 // CHECK10-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 12512 // CHECK10-NEXT: store i8* null, i8** [[TMP120]], align 8 12513 // CHECK10-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 12514 // CHECK10-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 12515 // CHECK10-NEXT: store double* [[TMP109]], double** [[TMP122]], align 8 12516 // CHECK10-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 12517 // CHECK10-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 12518 // CHECK10-NEXT: store double* [[TMP109]], double** [[TMP124]], align 8 12519 // CHECK10-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 12520 // CHECK10-NEXT: store i8* null, i8** [[TMP125]], align 8 12521 // CHECK10-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 12522 // CHECK10-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 12523 // CHECK10-NEXT: store double* [[TMP110]], double** [[TMP127]], align 8 12524 // CHECK10-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 12525 // CHECK10-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 12526 // CHECK10-NEXT: store double* [[TMP110]], double** [[TMP129]], align 8 12527 // CHECK10-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 12528 // CHECK10-NEXT: store i8* null, i8** [[TMP130]], align 8 12529 // CHECK10-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 12530 // CHECK10-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 12531 // CHECK10-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 12532 // CHECK10-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 12533 // CHECK10-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 12534 // CHECK10-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 12535 // CHECK10-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 12536 // CHECK10-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 12537 // CHECK10-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 12538 // CHECK10-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 12539 // CHECK10-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 12540 // CHECK10-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 12541 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 12542 // CHECK10-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12543 // CHECK10-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 12544 // CHECK10-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 12545 // CHECK10: omp_offload.failed44: 12546 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i64 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 12547 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT45]] 12548 // CHECK10: omp_offload.cont45: 12549 // CHECK10-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 12550 // CHECK10-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 12551 // CHECK10-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 12552 // CHECK10-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 12553 // CHECK10-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 12554 // CHECK10-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 12555 // CHECK10-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 12556 // CHECK10-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 12557 // CHECK10-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 8 12558 // CHECK10-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 8 12559 // CHECK10-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 8 12560 // CHECK10-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 12561 // CHECK10-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 12562 // CHECK10-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 12563 // CHECK10-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 12564 // CHECK10-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 12565 // CHECK10-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 12566 // CHECK10-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 12567 // CHECK10-NEXT: store i8* null, i8** [[TMP150]], align 8 12568 // CHECK10-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 12569 // CHECK10-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 12570 // CHECK10-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 12571 // CHECK10-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 12572 // CHECK10-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 12573 // CHECK10-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 12574 // CHECK10-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 12575 // CHECK10-NEXT: store i8* null, i8** [[TMP155]], align 8 12576 // CHECK10-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 12577 // CHECK10-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 12578 // CHECK10-NEXT: store double* [[TMP143]], double** [[TMP157]], align 8 12579 // CHECK10-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 12580 // CHECK10-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 12581 // CHECK10-NEXT: store double* [[TMP143]], double** [[TMP159]], align 8 12582 // CHECK10-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 12583 // CHECK10-NEXT: store i8* null, i8** [[TMP160]], align 8 12584 // CHECK10-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 12585 // CHECK10-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 12586 // CHECK10-NEXT: store double* [[TMP144]], double** [[TMP162]], align 8 12587 // CHECK10-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 12588 // CHECK10-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 12589 // CHECK10-NEXT: store double* [[TMP144]], double** [[TMP164]], align 8 12590 // CHECK10-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 12591 // CHECK10-NEXT: store i8* null, i8** [[TMP165]], align 8 12592 // CHECK10-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 12593 // CHECK10-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 12594 // CHECK10-NEXT: store double* [[TMP145]], double** [[TMP167]], align 8 12595 // CHECK10-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 12596 // CHECK10-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 12597 // CHECK10-NEXT: store double* [[TMP145]], double** [[TMP169]], align 8 12598 // CHECK10-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 12599 // CHECK10-NEXT: store i8* null, i8** [[TMP170]], align 8 12600 // CHECK10-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 12601 // CHECK10-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 12602 // CHECK10-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 12603 // CHECK10-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 12604 // CHECK10-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 12605 // CHECK10-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 12606 // CHECK10-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 12607 // CHECK10-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 12608 // CHECK10-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 12609 // CHECK10-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 12610 // CHECK10-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 12611 // CHECK10-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 12612 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 12613 // CHECK10-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12614 // CHECK10-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 12615 // CHECK10-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 12616 // CHECK10: omp_offload.failed60: 12617 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i64 [[TMP140]], i64 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 12618 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT61]] 12619 // CHECK10: omp_offload.cont61: 12620 // CHECK10-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 12621 // CHECK10-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 12622 // CHECK10-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 12623 // CHECK10-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 12624 // CHECK10-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 8 12625 // CHECK10-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 8 12626 // CHECK10-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 8 12627 // CHECK10-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 12628 // CHECK10-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 12629 // CHECK10-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 12630 // CHECK10-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 12631 // CHECK10-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 12632 // CHECK10-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 12633 // CHECK10-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 12634 // CHECK10-NEXT: store i8* null, i8** [[TMP188]], align 8 12635 // CHECK10-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 12636 // CHECK10-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 12637 // CHECK10-NEXT: store double* [[TMP181]], double** [[TMP190]], align 8 12638 // CHECK10-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 12639 // CHECK10-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 12640 // CHECK10-NEXT: store double* [[TMP181]], double** [[TMP192]], align 8 12641 // CHECK10-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 12642 // CHECK10-NEXT: store i8* null, i8** [[TMP193]], align 8 12643 // CHECK10-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 12644 // CHECK10-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 12645 // CHECK10-NEXT: store double* [[TMP182]], double** [[TMP195]], align 8 12646 // CHECK10-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 12647 // CHECK10-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 12648 // CHECK10-NEXT: store double* [[TMP182]], double** [[TMP197]], align 8 12649 // CHECK10-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 12650 // CHECK10-NEXT: store i8* null, i8** [[TMP198]], align 8 12651 // CHECK10-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 12652 // CHECK10-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 12653 // CHECK10-NEXT: store double* [[TMP183]], double** [[TMP200]], align 8 12654 // CHECK10-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 12655 // CHECK10-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 12656 // CHECK10-NEXT: store double* [[TMP183]], double** [[TMP202]], align 8 12657 // CHECK10-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 12658 // CHECK10-NEXT: store i8* null, i8** [[TMP203]], align 8 12659 // CHECK10-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 12660 // CHECK10-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 12661 // CHECK10-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 12662 // CHECK10-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 12663 // CHECK10-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 12664 // CHECK10-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 12665 // CHECK10-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 12666 // CHECK10-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 12667 // CHECK10-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 12668 // CHECK10-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 12669 // CHECK10-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 12670 // CHECK10-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 12671 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 12672 // CHECK10-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12673 // CHECK10-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 12674 // CHECK10-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 12675 // CHECK10: omp_offload.failed74: 12676 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i64 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 12677 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT75]] 12678 // CHECK10: omp_offload.cont75: 12679 // CHECK10-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 12680 // CHECK10-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 12681 // CHECK10-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 12682 // CHECK10-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 12683 // CHECK10-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 12684 // CHECK10-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 12685 // CHECK10-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 12686 // CHECK10-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 12687 // CHECK10-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 8 12688 // CHECK10-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 8 12689 // CHECK10-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 8 12690 // CHECK10-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 12691 // CHECK10-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 12692 // CHECK10-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 12693 // CHECK10-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 12694 // CHECK10-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 12695 // CHECK10-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 12696 // CHECK10-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 12697 // CHECK10-NEXT: store i8* null, i8** [[TMP223]], align 8 12698 // CHECK10-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 12699 // CHECK10-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 12700 // CHECK10-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 12701 // CHECK10-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 12702 // CHECK10-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 12703 // CHECK10-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 12704 // CHECK10-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 12705 // CHECK10-NEXT: store i8* null, i8** [[TMP228]], align 8 12706 // CHECK10-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 12707 // CHECK10-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 12708 // CHECK10-NEXT: store double* [[TMP216]], double** [[TMP230]], align 8 12709 // CHECK10-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 12710 // CHECK10-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 12711 // CHECK10-NEXT: store double* [[TMP216]], double** [[TMP232]], align 8 12712 // CHECK10-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 12713 // CHECK10-NEXT: store i8* null, i8** [[TMP233]], align 8 12714 // CHECK10-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 12715 // CHECK10-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 12716 // CHECK10-NEXT: store double* [[TMP217]], double** [[TMP235]], align 8 12717 // CHECK10-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 12718 // CHECK10-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 12719 // CHECK10-NEXT: store double* [[TMP217]], double** [[TMP237]], align 8 12720 // CHECK10-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 12721 // CHECK10-NEXT: store i8* null, i8** [[TMP238]], align 8 12722 // CHECK10-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 12723 // CHECK10-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 12724 // CHECK10-NEXT: store double* [[TMP218]], double** [[TMP240]], align 8 12725 // CHECK10-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 12726 // CHECK10-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 12727 // CHECK10-NEXT: store double* [[TMP218]], double** [[TMP242]], align 8 12728 // CHECK10-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 12729 // CHECK10-NEXT: store i8* null, i8** [[TMP243]], align 8 12730 // CHECK10-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 12731 // CHECK10-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 12732 // CHECK10-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 12733 // CHECK10-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 12734 // CHECK10-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 12735 // CHECK10-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 12736 // CHECK10-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 12737 // CHECK10-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 12738 // CHECK10-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 12739 // CHECK10-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 12740 // CHECK10-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 12741 // CHECK10-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 12742 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 12743 // CHECK10-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12744 // CHECK10-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 12745 // CHECK10-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 12746 // CHECK10: omp_offload.failed90: 12747 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i64 [[TMP213]], i64 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 12748 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT91]] 12749 // CHECK10: omp_offload.cont91: 12750 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 12751 // CHECK10-NEXT: ret i32 [[CALL]] 12752 // 12753 // 12754 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 12755 // CHECK10-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1:[0-9]+]] { 12756 // CHECK10-NEXT: entry: 12757 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 12758 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 12759 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 12760 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 12761 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 12762 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 12763 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 12764 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 12765 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 12766 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 12767 // CHECK10-NEXT: ret void 12768 // 12769 // 12770 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 12771 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 12772 // CHECK10-NEXT: entry: 12773 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12774 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12775 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 12776 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 12777 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 12778 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 12779 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12780 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 12781 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12782 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12783 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 12784 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12785 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12786 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12787 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12788 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 12789 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12790 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12791 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 12792 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 12793 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 12794 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 12795 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 12796 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 12797 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 12798 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 12799 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12800 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12801 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12802 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12803 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12804 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12805 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12806 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 12807 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12808 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12809 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12810 // CHECK10: omp.precond.then: 12811 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12812 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12813 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 12814 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12815 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12816 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12817 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 12818 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12819 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12820 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12821 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12822 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12823 // CHECK10: cond.true: 12824 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12825 // CHECK10-NEXT: br label [[COND_END:%.*]] 12826 // CHECK10: cond.false: 12827 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12828 // CHECK10-NEXT: br label [[COND_END]] 12829 // CHECK10: cond.end: 12830 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12831 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12832 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12833 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 12834 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12835 // CHECK10: omp.inner.for.cond: 12836 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12837 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12838 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12839 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12840 // CHECK10: omp.inner.for.body: 12841 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12842 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 12843 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12844 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 12845 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 12846 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12847 // CHECK10: omp.inner.for.inc: 12848 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12849 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12850 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 12851 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12852 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 12853 // CHECK10: omp.inner.for.end: 12854 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12855 // CHECK10: omp.loop.exit: 12856 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12857 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 12858 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 12859 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 12860 // CHECK10: omp.precond.end: 12861 // CHECK10-NEXT: ret void 12862 // 12863 // 12864 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 12865 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 12866 // CHECK10-NEXT: entry: 12867 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12868 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12869 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12870 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12871 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 12872 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 12873 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 12874 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 12875 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12876 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 12877 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12878 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12879 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 12880 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12881 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12882 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12883 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12884 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 12885 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12886 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12887 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12888 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12889 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 12890 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 12891 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 12892 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 12893 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 12894 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 12895 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 12896 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 12897 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12898 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12899 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12900 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12901 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12902 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12903 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12904 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 12905 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12906 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12907 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12908 // CHECK10: omp.precond.then: 12909 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12910 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12911 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12912 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12913 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 12914 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12915 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 12916 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 12917 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 12918 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12919 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12920 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12921 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12922 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12923 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12924 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12925 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12926 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12927 // CHECK10: cond.true: 12928 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12929 // CHECK10-NEXT: br label [[COND_END:%.*]] 12930 // CHECK10: cond.false: 12931 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12932 // CHECK10-NEXT: br label [[COND_END]] 12933 // CHECK10: cond.end: 12934 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12935 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12936 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12937 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12938 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12939 // CHECK10: omp.inner.for.cond: 12940 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12941 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12942 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12943 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12944 // CHECK10: omp.inner.for.body: 12945 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12946 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12947 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12948 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 12949 // CHECK10-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 12950 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 12951 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 12952 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 12953 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 12954 // CHECK10-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 12955 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 12956 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 12957 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 12958 // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 12959 // CHECK10-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 12960 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 12961 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 12962 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 12963 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 12964 // CHECK10-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 12965 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12966 // CHECK10: omp.body.continue: 12967 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12968 // CHECK10: omp.inner.for.inc: 12969 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12970 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 12971 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 12972 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 12973 // CHECK10: omp.inner.for.end: 12974 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12975 // CHECK10: omp.loop.exit: 12976 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12977 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 12978 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 12979 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 12980 // CHECK10: omp.precond.end: 12981 // CHECK10-NEXT: ret void 12982 // 12983 // 12984 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 12985 // CHECK10-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 12986 // CHECK10-NEXT: entry: 12987 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 12988 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 12989 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 12990 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 12991 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 12992 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 12993 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 12994 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 12995 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 12996 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 12997 // CHECK10-NEXT: ret void 12998 // 12999 // 13000 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 13001 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13002 // CHECK10-NEXT: entry: 13003 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13004 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13005 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13006 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13007 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13008 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13009 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13010 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13011 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13012 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13013 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13014 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13015 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13016 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13017 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13018 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 13019 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13020 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13021 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13022 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13023 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13024 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13025 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13026 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13027 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13028 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13029 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13030 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 13031 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13032 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13033 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13034 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13035 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13036 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13037 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13038 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13039 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13040 // CHECK10: omp.precond.then: 13041 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13042 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13043 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 13044 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13045 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13046 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13047 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 13048 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13049 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13050 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13051 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13052 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13053 // CHECK10: cond.true: 13054 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13055 // CHECK10-NEXT: br label [[COND_END:%.*]] 13056 // CHECK10: cond.false: 13057 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13058 // CHECK10-NEXT: br label [[COND_END]] 13059 // CHECK10: cond.end: 13060 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13061 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13062 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13063 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 13064 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13065 // CHECK10: omp.inner.for.cond: 13066 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13067 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13068 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 13069 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13070 // CHECK10: omp.inner.for.body: 13071 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13072 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 13073 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13074 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 13075 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 13076 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13077 // CHECK10: omp.inner.for.inc: 13078 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13079 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13080 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13081 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13082 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13083 // CHECK10: omp.inner.for.end: 13084 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13085 // CHECK10: omp.loop.exit: 13086 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13087 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 13088 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 13089 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13090 // CHECK10: omp.precond.end: 13091 // CHECK10-NEXT: ret void 13092 // 13093 // 13094 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 13095 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13096 // CHECK10-NEXT: entry: 13097 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13098 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13099 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13100 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13101 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13102 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13103 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13104 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13105 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13106 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13107 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13108 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13109 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13110 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13111 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13112 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13113 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13114 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 13115 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13116 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13117 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13118 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13119 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13120 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13121 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13122 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13123 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13124 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13125 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13126 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13127 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13128 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 13129 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13130 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13131 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13132 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13133 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13134 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13135 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13136 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13137 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13138 // CHECK10: omp.precond.then: 13139 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13140 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13141 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 13142 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13143 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 13144 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13145 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 13146 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 13147 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 13148 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13149 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13150 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13151 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 13152 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13153 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13154 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13155 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13156 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13157 // CHECK10: cond.true: 13158 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13159 // CHECK10-NEXT: br label [[COND_END:%.*]] 13160 // CHECK10: cond.false: 13161 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13162 // CHECK10-NEXT: br label [[COND_END]] 13163 // CHECK10: cond.end: 13164 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13165 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13166 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13167 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13168 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13169 // CHECK10: omp.inner.for.cond: 13170 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13171 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13172 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13173 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13174 // CHECK10: omp.inner.for.body: 13175 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13176 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13177 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13178 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 13179 // CHECK10-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 13180 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 13181 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 13182 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 13183 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 13184 // CHECK10-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 13185 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 13186 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 13187 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 13188 // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 13189 // CHECK10-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 13190 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 13191 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 13192 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 13193 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 13194 // CHECK10-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 13195 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13196 // CHECK10: omp.body.continue: 13197 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13198 // CHECK10: omp.inner.for.inc: 13199 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13200 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 13201 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 13202 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13203 // CHECK10: omp.inner.for.end: 13204 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13205 // CHECK10: omp.loop.exit: 13206 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13207 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 13208 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 13209 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13210 // CHECK10: omp.precond.end: 13211 // CHECK10-NEXT: ret void 13212 // 13213 // 13214 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 13215 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 13216 // CHECK10-NEXT: entry: 13217 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 13218 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13219 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 13220 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 13221 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 13222 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 13223 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13224 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 13225 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 13226 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 13227 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 13228 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13229 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 13230 // CHECK10-NEXT: ret void 13231 // 13232 // 13233 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6 13234 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13235 // CHECK10-NEXT: entry: 13236 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13237 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13238 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 13239 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13240 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13241 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13242 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13243 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13244 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13245 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13246 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13247 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13248 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13249 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13250 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13251 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13252 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 13253 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13254 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13255 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 13256 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13257 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13258 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13259 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13260 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 13261 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13262 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 13263 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 13264 // CHECK10-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 13265 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 13266 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 13267 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13268 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 13269 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13270 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13271 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13272 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13273 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13274 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 13275 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13276 // CHECK10: omp.precond.then: 13277 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13278 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13279 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 13280 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13281 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13282 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 13283 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13284 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 13285 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 13286 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13287 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13288 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13289 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13290 // CHECK10: cond.true: 13291 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13292 // CHECK10-NEXT: br label [[COND_END:%.*]] 13293 // CHECK10: cond.false: 13294 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13295 // CHECK10-NEXT: br label [[COND_END]] 13296 // CHECK10: cond.end: 13297 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13298 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13299 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13300 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13301 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13302 // CHECK10: omp.inner.for.cond: 13303 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13304 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13305 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 13306 // CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 13307 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13308 // CHECK10: omp.inner.for.body: 13309 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13310 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 13311 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13312 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 13313 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 13314 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13315 // CHECK10: omp.inner.for.inc: 13316 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13317 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13318 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 13319 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 13320 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13321 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13322 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 13323 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 13324 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13325 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13326 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 13327 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 13328 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13329 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13330 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 13331 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 13332 // CHECK10: cond.true10: 13333 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13334 // CHECK10-NEXT: br label [[COND_END12:%.*]] 13335 // CHECK10: cond.false11: 13336 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13337 // CHECK10-NEXT: br label [[COND_END12]] 13338 // CHECK10: cond.end12: 13339 // CHECK10-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 13340 // CHECK10-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 13341 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13342 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 13343 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13344 // CHECK10: omp.inner.for.end: 13345 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13346 // CHECK10: omp.loop.exit: 13347 // CHECK10-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13348 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 13349 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 13350 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13351 // CHECK10: omp.precond.end: 13352 // CHECK10-NEXT: ret void 13353 // 13354 // 13355 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 13356 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13357 // CHECK10-NEXT: entry: 13358 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13359 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13360 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13361 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13362 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13363 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13364 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13365 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13366 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13367 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13368 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13369 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13370 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13371 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13372 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13373 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13374 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13375 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 13376 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13377 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13378 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13379 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13380 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13381 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13382 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13383 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13384 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13385 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13386 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13387 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13388 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13389 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 13390 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13391 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13392 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13393 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13394 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13395 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13396 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13397 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13398 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13399 // CHECK10: omp.precond.then: 13400 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13401 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13402 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 13403 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13404 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 13405 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13406 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 13407 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 13408 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 13409 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13410 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13411 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13412 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 13413 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13414 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13415 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13416 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13417 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13418 // CHECK10: cond.true: 13419 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13420 // CHECK10-NEXT: br label [[COND_END:%.*]] 13421 // CHECK10: cond.false: 13422 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13423 // CHECK10-NEXT: br label [[COND_END]] 13424 // CHECK10: cond.end: 13425 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13426 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13427 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13428 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13429 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13430 // CHECK10: omp.inner.for.cond: 13431 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13432 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13433 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13434 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13435 // CHECK10: omp.inner.for.body: 13436 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13437 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13438 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13439 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 13440 // CHECK10-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 13441 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 13442 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 13443 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 13444 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 13445 // CHECK10-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 13446 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 13447 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 13448 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 13449 // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 13450 // CHECK10-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 13451 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 13452 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 13453 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 13454 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 13455 // CHECK10-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 13456 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13457 // CHECK10: omp.body.continue: 13458 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13459 // CHECK10: omp.inner.for.inc: 13460 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13461 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 13462 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 13463 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13464 // CHECK10: omp.inner.for.end: 13465 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13466 // CHECK10: omp.loop.exit: 13467 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13468 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 13469 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 13470 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13471 // CHECK10: omp.precond.end: 13472 // CHECK10-NEXT: ret void 13473 // 13474 // 13475 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 13476 // CHECK10-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 13477 // CHECK10-NEXT: entry: 13478 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13479 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 13480 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 13481 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 13482 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13483 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 13484 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 13485 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 13486 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13487 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 13488 // CHECK10-NEXT: ret void 13489 // 13490 // 13491 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 13492 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13493 // CHECK10-NEXT: entry: 13494 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13495 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13496 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13497 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13498 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13499 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13500 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13501 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13502 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13503 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13504 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13505 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13506 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13507 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13508 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13509 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 13510 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13511 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13512 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13513 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13514 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13515 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13516 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13517 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13518 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13519 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13520 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13521 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 13522 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13523 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13524 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13525 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13526 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13527 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13528 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13529 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13530 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13531 // CHECK10: omp.precond.then: 13532 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13533 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13534 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 13535 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13536 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13537 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13538 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 13539 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13540 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13541 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13542 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13543 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13544 // CHECK10: cond.true: 13545 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13546 // CHECK10-NEXT: br label [[COND_END:%.*]] 13547 // CHECK10: cond.false: 13548 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13549 // CHECK10-NEXT: br label [[COND_END]] 13550 // CHECK10: cond.end: 13551 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13552 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13553 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13554 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 13555 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13556 // CHECK10: omp.inner.for.cond: 13557 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13558 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13559 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 13560 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13561 // CHECK10: omp.inner.for.body: 13562 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13563 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 13564 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13565 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 13566 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 13567 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13568 // CHECK10: omp.inner.for.inc: 13569 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13570 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13571 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13572 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13573 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13574 // CHECK10: omp.inner.for.end: 13575 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13576 // CHECK10: omp.loop.exit: 13577 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13578 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 13579 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 13580 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13581 // CHECK10: omp.precond.end: 13582 // CHECK10-NEXT: ret void 13583 // 13584 // 13585 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11 13586 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13587 // CHECK10-NEXT: entry: 13588 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13589 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13590 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13591 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13592 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13593 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13594 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13595 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13596 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13597 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13598 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13599 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13600 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13601 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13602 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13603 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13604 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13605 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 13606 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13607 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13608 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13609 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13610 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13611 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13612 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13613 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13614 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13615 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13616 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13617 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13618 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13619 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 13620 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13621 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13622 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13623 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13624 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13625 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13626 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13627 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13628 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13629 // CHECK10: omp.precond.then: 13630 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13631 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13632 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 13633 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13634 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 13635 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13636 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 13637 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 13638 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 13639 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13640 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13641 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13642 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 13643 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13644 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13645 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13646 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13647 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13648 // CHECK10: cond.true: 13649 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13650 // CHECK10-NEXT: br label [[COND_END:%.*]] 13651 // CHECK10: cond.false: 13652 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13653 // CHECK10-NEXT: br label [[COND_END]] 13654 // CHECK10: cond.end: 13655 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13656 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13657 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13658 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13659 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13660 // CHECK10: omp.inner.for.cond: 13661 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13662 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13663 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13664 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13665 // CHECK10: omp.inner.for.body: 13666 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13667 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13668 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13669 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 13670 // CHECK10-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 13671 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 13672 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 13673 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 13674 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 13675 // CHECK10-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 13676 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 13677 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 13678 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 13679 // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 13680 // CHECK10-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 13681 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 13682 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 13683 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 13684 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 13685 // CHECK10-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 13686 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13687 // CHECK10: omp.body.continue: 13688 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13689 // CHECK10: omp.inner.for.inc: 13690 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13691 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 13692 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 13693 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13694 // CHECK10: omp.inner.for.end: 13695 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13696 // CHECK10: omp.loop.exit: 13697 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13698 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 13699 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 13700 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13701 // CHECK10: omp.precond.end: 13702 // CHECK10-NEXT: ret void 13703 // 13704 // 13705 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 13706 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 13707 // CHECK10-NEXT: entry: 13708 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 13709 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13710 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 13711 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 13712 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 13713 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 13714 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13715 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 13716 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 13717 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 13718 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 13719 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13720 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 13721 // CHECK10-NEXT: ret void 13722 // 13723 // 13724 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..14 13725 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13726 // CHECK10-NEXT: entry: 13727 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13728 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13729 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 13730 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13731 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13732 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13733 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13734 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13735 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13736 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13737 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13738 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13739 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13740 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13741 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13742 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13743 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13744 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 13745 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 13746 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13747 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13748 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 13749 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13750 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13751 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13752 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13753 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 13754 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13755 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 13756 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 13757 // CHECK10-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 13758 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 13759 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 13760 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 13761 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13762 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13763 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 13764 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13765 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13766 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13767 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13768 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13769 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 13770 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13771 // CHECK10: omp.precond.then: 13772 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13773 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13774 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 13775 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13776 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13777 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13778 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 13779 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13780 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13781 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13782 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13783 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13784 // CHECK10: cond.true: 13785 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13786 // CHECK10-NEXT: br label [[COND_END:%.*]] 13787 // CHECK10: cond.false: 13788 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13789 // CHECK10-NEXT: br label [[COND_END]] 13790 // CHECK10: cond.end: 13791 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13792 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13793 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13794 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13795 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13796 // CHECK10: omp.inner.for.cond: 13797 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13798 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13799 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13800 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13801 // CHECK10: omp.inner.for.body: 13802 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13803 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 13804 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13805 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 13806 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13807 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 13808 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 13809 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 13810 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 13811 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13812 // CHECK10: omp.inner.for.inc: 13813 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13814 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13815 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 13816 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13817 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13818 // CHECK10: omp.inner.for.end: 13819 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13820 // CHECK10: omp.loop.exit: 13821 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13822 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 13823 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 13824 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13825 // CHECK10: omp.precond.end: 13826 // CHECK10-NEXT: ret void 13827 // 13828 // 13829 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..15 13830 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 13831 // CHECK10-NEXT: entry: 13832 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13833 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13834 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13835 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13836 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13837 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13838 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13839 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13840 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 13841 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13842 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13843 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13844 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13845 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 13846 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13847 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13848 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13849 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13850 // CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4 13851 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 13852 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 13853 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13854 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13855 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 13856 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 13857 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 13858 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 13859 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 13860 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 13861 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 13862 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 13863 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 13864 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 13865 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 13866 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13867 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13868 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13869 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13870 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13871 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13872 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 13873 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13874 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13875 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13876 // CHECK10: omp.precond.then: 13877 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13878 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13879 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 13880 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 13881 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 13882 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13883 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 13884 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 13885 // CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 13886 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13887 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13888 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 13889 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13890 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 13891 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 13892 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13893 // CHECK10: omp.dispatch.cond: 13894 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13895 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13896 // CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 13897 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 13898 // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13899 // CHECK10: cond.true: 13900 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 13901 // CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 13902 // CHECK10-NEXT: br label [[COND_END:%.*]] 13903 // CHECK10: cond.false: 13904 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13905 // CHECK10-NEXT: br label [[COND_END]] 13906 // CHECK10: cond.end: 13907 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 13908 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13909 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13910 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 13911 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13912 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13913 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 13914 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13915 // CHECK10: omp.dispatch.body: 13916 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13917 // CHECK10: omp.inner.for.cond: 13918 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13919 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13920 // CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 13921 // CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13922 // CHECK10: omp.inner.for.body: 13923 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13924 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 13925 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13926 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 13927 // CHECK10-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 13928 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 13929 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 13930 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 13931 // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 13932 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 13933 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 13934 // CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 13935 // CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 13936 // CHECK10-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 13937 // CHECK10-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 13938 // CHECK10-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 13939 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 13940 // CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 13941 // CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 13942 // CHECK10-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 13943 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13944 // CHECK10: omp.body.continue: 13945 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13946 // CHECK10: omp.inner.for.inc: 13947 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13948 // CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 13949 // CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 13950 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 13951 // CHECK10: omp.inner.for.end: 13952 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13953 // CHECK10: omp.dispatch.inc: 13954 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13955 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13956 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 13957 // CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 13958 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13959 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13960 // CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 13961 // CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 13962 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 13963 // CHECK10: omp.dispatch.end: 13964 // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 13965 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 13966 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 13967 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 13968 // CHECK10: omp.precond.end: 13969 // CHECK10-NEXT: ret void 13970 // 13971 // 13972 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 13973 // CHECK10-SAME: (i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 13974 // CHECK10-NEXT: entry: 13975 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 13976 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 13977 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 13978 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 13979 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 13980 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 13981 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 13982 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 13983 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 13984 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 13985 // CHECK10-NEXT: ret void 13986 // 13987 // 13988 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..18 13989 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 13990 // CHECK10-NEXT: entry: 13991 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 13992 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 13993 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 13994 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 13995 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 13996 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 13997 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13998 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 13999 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14000 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14001 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 14002 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14003 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14004 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14005 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14006 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 14007 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 14008 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 14009 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 14010 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 14011 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 14012 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 14013 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 14014 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 14015 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 14016 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 14017 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 14018 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 14019 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14020 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 14021 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14022 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14023 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14024 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 14025 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14026 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14027 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14028 // CHECK10: omp.precond.then: 14029 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14030 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14031 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 14032 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14033 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14034 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14035 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 14036 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14037 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14038 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14039 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 14040 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14041 // CHECK10: cond.true: 14042 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14043 // CHECK10-NEXT: br label [[COND_END:%.*]] 14044 // CHECK10: cond.false: 14045 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14046 // CHECK10-NEXT: br label [[COND_END]] 14047 // CHECK10: cond.end: 14048 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 14049 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14050 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14051 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 14052 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14053 // CHECK10: omp.inner.for.cond: 14054 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14055 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14056 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 14057 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14058 // CHECK10: omp.inner.for.body: 14059 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14060 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 14061 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14062 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 14063 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 14064 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14065 // CHECK10: omp.inner.for.inc: 14066 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14067 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14068 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 14069 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14070 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 14071 // CHECK10: omp.inner.for.end: 14072 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14073 // CHECK10: omp.loop.exit: 14074 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14075 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 14076 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 14077 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 14078 // CHECK10: omp.precond.end: 14079 // CHECK10-NEXT: ret void 14080 // 14081 // 14082 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..19 14083 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 14084 // CHECK10-NEXT: entry: 14085 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 14086 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 14087 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 14088 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 14089 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 14090 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 14091 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 14092 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 14093 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14094 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 14095 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14096 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14097 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 14098 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14099 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14100 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14101 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14102 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 14103 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 14104 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 14105 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 14106 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 14107 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 14108 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 14109 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 14110 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 14111 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 14112 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 14113 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 14114 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 14115 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 14116 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 14117 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14118 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 14119 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14120 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14121 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14122 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 14123 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14124 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14125 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14126 // CHECK10: omp.precond.then: 14127 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14128 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14129 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 14130 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 14131 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 14132 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 14133 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 14134 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 14135 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 14136 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14137 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14138 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14139 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14140 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14141 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 14142 // CHECK10-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 14143 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14144 // CHECK10: omp.dispatch.cond: 14145 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14146 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 14147 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14148 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 14149 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14150 // CHECK10: omp.dispatch.body: 14151 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14152 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 14153 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14154 // CHECK10: omp.inner.for.cond: 14155 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 14156 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 14157 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 14158 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14159 // CHECK10: omp.inner.for.body: 14160 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 14161 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 14162 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14163 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 14164 // CHECK10-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !19 14165 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 14166 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 14167 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 14168 // CHECK10-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !19 14169 // CHECK10-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !19 14170 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 14171 // CHECK10-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 14172 // CHECK10-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 14173 // CHECK10-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !19 14174 // CHECK10-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 14175 // CHECK10-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !19 14176 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 14177 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 14178 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 14179 // CHECK10-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !19 14180 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14181 // CHECK10: omp.body.continue: 14182 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14183 // CHECK10: omp.inner.for.inc: 14184 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 14185 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 14186 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 14187 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 14188 // CHECK10: omp.inner.for.end: 14189 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14190 // CHECK10: omp.dispatch.inc: 14191 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 14192 // CHECK10: omp.dispatch.end: 14193 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 14194 // CHECK10: omp.precond.end: 14195 // CHECK10-NEXT: ret void 14196 // 14197 // 14198 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 14199 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 14200 // CHECK10-NEXT: entry: 14201 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 14202 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 14203 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 14204 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 14205 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 14206 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 14207 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 14208 // CHECK10-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 14209 // CHECK10-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 14210 // CHECK10-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 14211 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 14212 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 14213 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 14214 // CHECK10-NEXT: ret void 14215 // 14216 // 14217 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..22 14218 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 14219 // CHECK10-NEXT: entry: 14220 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 14221 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 14222 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 14223 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 14224 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 14225 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 14226 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 14227 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14228 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14229 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 14230 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14231 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14232 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 14233 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14234 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14235 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14236 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14237 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 14238 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 14239 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 14240 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 14241 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 14242 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 14243 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 14244 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 14245 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 14246 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 14247 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 14248 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 14249 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 14250 // CHECK10-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 14251 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 14252 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 14253 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 14254 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14255 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14256 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 14257 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14258 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14259 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 14260 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 14261 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14262 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 14263 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14264 // CHECK10: omp.precond.then: 14265 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14266 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 14267 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 14268 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14269 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14270 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14271 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 14272 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14273 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14274 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 14275 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 14276 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14277 // CHECK10: cond.true: 14278 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 14279 // CHECK10-NEXT: br label [[COND_END:%.*]] 14280 // CHECK10: cond.false: 14281 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14282 // CHECK10-NEXT: br label [[COND_END]] 14283 // CHECK10: cond.end: 14284 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 14285 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14286 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14287 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 14288 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14289 // CHECK10: omp.inner.for.cond: 14290 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14291 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14292 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 14293 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14294 // CHECK10: omp.inner.for.body: 14295 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14296 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 14297 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14298 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 14299 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14300 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 14301 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 14302 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 14303 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 14304 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14305 // CHECK10: omp.inner.for.inc: 14306 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14307 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14308 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 14309 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14310 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 14311 // CHECK10: omp.inner.for.end: 14312 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14313 // CHECK10: omp.loop.exit: 14314 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14315 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 14316 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 14317 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 14318 // CHECK10: omp.precond.end: 14319 // CHECK10-NEXT: ret void 14320 // 14321 // 14322 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..23 14323 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 8 dereferenceable(8) [[A:%.*]], double** nonnull align 8 dereferenceable(8) [[B:%.*]], double** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 14324 // CHECK10-NEXT: entry: 14325 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 14326 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 14327 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 14328 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 14329 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 14330 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 14331 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 14332 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 14333 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 14334 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14335 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 14336 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14337 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14338 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 14339 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14340 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14341 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14342 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14343 // CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4 14344 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 14345 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 14346 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 14347 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 14348 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 14349 // CHECK10-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 14350 // CHECK10-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 14351 // CHECK10-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 14352 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 14353 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 14354 // CHECK10-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 14355 // CHECK10-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 14356 // CHECK10-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 14357 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 14358 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 14359 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14360 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14361 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 14362 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14363 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14364 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 14365 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 14366 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14367 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14368 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14369 // CHECK10: omp.precond.then: 14370 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14371 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 14372 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 14373 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 14374 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 14375 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 14376 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 14377 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 14378 // CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 14379 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14380 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14381 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 14382 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14383 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14384 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14385 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 14386 // CHECK10-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 14387 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14388 // CHECK10: omp.dispatch.cond: 14389 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 14390 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 14391 // CHECK10-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14392 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 14393 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14394 // CHECK10: omp.dispatch.body: 14395 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14396 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 14397 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14398 // CHECK10: omp.inner.for.cond: 14399 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14400 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 14401 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 14402 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14403 // CHECK10: omp.inner.for.body: 14404 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14405 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 14406 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14407 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !22 14408 // CHECK10-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !22 14409 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 14410 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 14411 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 14412 // CHECK10-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !22 14413 // CHECK10-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !22 14414 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 14415 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 14416 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 14417 // CHECK10-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !22 14418 // CHECK10-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 14419 // CHECK10-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !22 14420 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 14421 // CHECK10-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 14422 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 14423 // CHECK10-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !22 14424 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14425 // CHECK10: omp.body.continue: 14426 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14427 // CHECK10: omp.inner.for.inc: 14428 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14429 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 14430 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14431 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 14432 // CHECK10: omp.inner.for.end: 14433 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14434 // CHECK10: omp.dispatch.inc: 14435 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 14436 // CHECK10: omp.dispatch.end: 14437 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 14438 // CHECK10: omp.precond.end: 14439 // CHECK10-NEXT: ret void 14440 // 14441 // 14442 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 14443 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] comdat { 14444 // CHECK10-NEXT: entry: 14445 // CHECK10-NEXT: [[A:%.*]] = alloca i32*, align 8 14446 // CHECK10-NEXT: [[B:%.*]] = alloca i32*, align 8 14447 // CHECK10-NEXT: [[C:%.*]] = alloca i32*, align 8 14448 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 14449 // CHECK10-NEXT: [[CH:%.*]] = alloca i32, align 4 14450 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 14451 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 14452 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 14453 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 14454 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 14455 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14456 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14457 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 14458 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 14459 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 14460 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 14461 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 14462 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 14463 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 14464 // CHECK10-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 14465 // CHECK10-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 14466 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 14467 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 14468 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 14469 // CHECK10-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 14470 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 14471 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 14472 // CHECK10-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 14473 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 14474 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 14475 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 14476 // CHECK10-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 14477 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 14478 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 14479 // CHECK10-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 14480 // CHECK10-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 14481 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 14482 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 14483 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 14484 // CHECK10-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 14485 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 14486 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 14487 // CHECK10-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 14488 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 14489 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 14490 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 14491 // CHECK10-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 14492 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 14493 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 14494 // CHECK10-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 14495 // CHECK10-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 14496 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 14497 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 14498 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 14499 // CHECK10-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 14500 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 14501 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 14502 // CHECK10-NEXT: store i32 10000, i32* [[N]], align 4 14503 // CHECK10-NEXT: store i32 100, i32* [[CH]], align 4 14504 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 14505 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 14506 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 14507 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 14508 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 14509 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 8 14510 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 8 14511 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14512 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 14513 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 14514 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14515 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 14516 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 14517 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 14518 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8 14519 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 14520 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 14521 // CHECK10-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 8 14522 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 14523 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 14524 // CHECK10-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 8 14525 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 14526 // CHECK10-NEXT: store i8* null, i8** [[TMP14]], align 8 14527 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 14528 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 14529 // CHECK10-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 8 14530 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 14531 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 14532 // CHECK10-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 8 14533 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 14534 // CHECK10-NEXT: store i8* null, i8** [[TMP19]], align 8 14535 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 14536 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 14537 // CHECK10-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 8 14538 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 14539 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 14540 // CHECK10-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 8 14541 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 14542 // CHECK10-NEXT: store i8* null, i8** [[TMP24]], align 8 14543 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14544 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14545 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 14546 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 14547 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14548 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 14549 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14550 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14551 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14552 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14553 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 14554 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 14555 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 14556 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14557 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 14558 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 14559 // CHECK10: omp_offload.failed: 14560 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i64 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 14561 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 14562 // CHECK10: omp_offload.cont: 14563 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 14564 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 14565 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 14566 // CHECK10-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 14567 // CHECK10-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 8 14568 // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 8 14569 // CHECK10-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 8 14570 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 14571 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 14572 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 14573 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 14574 // CHECK10-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 14575 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 14576 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 14577 // CHECK10-NEXT: store i8* null, i8** [[TMP42]], align 8 14578 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 14579 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 14580 // CHECK10-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 8 14581 // CHECK10-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 14582 // CHECK10-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 14583 // CHECK10-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 8 14584 // CHECK10-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 14585 // CHECK10-NEXT: store i8* null, i8** [[TMP47]], align 8 14586 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 14587 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 14588 // CHECK10-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 8 14589 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 14590 // CHECK10-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 14591 // CHECK10-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 8 14592 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 14593 // CHECK10-NEXT: store i8* null, i8** [[TMP52]], align 8 14594 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 14595 // CHECK10-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 14596 // CHECK10-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 8 14597 // CHECK10-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 14598 // CHECK10-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 14599 // CHECK10-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 8 14600 // CHECK10-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 14601 // CHECK10-NEXT: store i8* null, i8** [[TMP57]], align 8 14602 // CHECK10-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 14603 // CHECK10-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 14604 // CHECK10-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 14605 // CHECK10-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 14606 // CHECK10-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 14607 // CHECK10-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 14608 // CHECK10-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 14609 // CHECK10-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 14610 // CHECK10-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 14611 // CHECK10-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 14612 // CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 14613 // CHECK10-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 14614 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 14615 // CHECK10-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14616 // CHECK10-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 14617 // CHECK10-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 14618 // CHECK10: omp_offload.failed15: 14619 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i64 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 14620 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT16]] 14621 // CHECK10: omp_offload.cont16: 14622 // CHECK10-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 14623 // CHECK10-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 14624 // CHECK10-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 14625 // CHECK10-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 14626 // CHECK10-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 14627 // CHECK10-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 14628 // CHECK10-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 14629 // CHECK10-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 14630 // CHECK10-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 8 14631 // CHECK10-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 8 14632 // CHECK10-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 8 14633 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 14634 // CHECK10-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 14635 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 14636 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 14637 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 14638 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 14639 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 14640 // CHECK10-NEXT: store i8* null, i8** [[TMP77]], align 8 14641 // CHECK10-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 14642 // CHECK10-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 14643 // CHECK10-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 14644 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 14645 // CHECK10-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 14646 // CHECK10-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 14647 // CHECK10-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 14648 // CHECK10-NEXT: store i8* null, i8** [[TMP82]], align 8 14649 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 14650 // CHECK10-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 14651 // CHECK10-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 8 14652 // CHECK10-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 14653 // CHECK10-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 14654 // CHECK10-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 8 14655 // CHECK10-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 14656 // CHECK10-NEXT: store i8* null, i8** [[TMP87]], align 8 14657 // CHECK10-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 14658 // CHECK10-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 14659 // CHECK10-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 8 14660 // CHECK10-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 14661 // CHECK10-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 14662 // CHECK10-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 8 14663 // CHECK10-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 14664 // CHECK10-NEXT: store i8* null, i8** [[TMP92]], align 8 14665 // CHECK10-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 14666 // CHECK10-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 14667 // CHECK10-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 8 14668 // CHECK10-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 14669 // CHECK10-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 14670 // CHECK10-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 8 14671 // CHECK10-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 14672 // CHECK10-NEXT: store i8* null, i8** [[TMP97]], align 8 14673 // CHECK10-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 14674 // CHECK10-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 14675 // CHECK10-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 14676 // CHECK10-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 14677 // CHECK10-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 14678 // CHECK10-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 14679 // CHECK10-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 14680 // CHECK10-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 14681 // CHECK10-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 14682 // CHECK10-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 14683 // CHECK10-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 14684 // CHECK10-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 14685 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 14686 // CHECK10-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14687 // CHECK10-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 14688 // CHECK10-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 14689 // CHECK10: omp_offload.failed30: 14690 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i64 [[TMP67]], i64 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 14691 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT31]] 14692 // CHECK10: omp_offload.cont31: 14693 // CHECK10-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 14694 // CHECK10-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 14695 // CHECK10-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 14696 // CHECK10-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 14697 // CHECK10-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 8 14698 // CHECK10-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 8 14699 // CHECK10-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 8 14700 // CHECK10-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 14701 // CHECK10-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 14702 // CHECK10-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 14703 // CHECK10-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 14704 // CHECK10-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 14705 // CHECK10-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 14706 // CHECK10-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 14707 // CHECK10-NEXT: store i8* null, i8** [[TMP115]], align 8 14708 // CHECK10-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 14709 // CHECK10-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 14710 // CHECK10-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 8 14711 // CHECK10-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 14712 // CHECK10-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 14713 // CHECK10-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 8 14714 // CHECK10-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 14715 // CHECK10-NEXT: store i8* null, i8** [[TMP120]], align 8 14716 // CHECK10-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 14717 // CHECK10-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 14718 // CHECK10-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 8 14719 // CHECK10-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 14720 // CHECK10-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 14721 // CHECK10-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 8 14722 // CHECK10-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 14723 // CHECK10-NEXT: store i8* null, i8** [[TMP125]], align 8 14724 // CHECK10-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 14725 // CHECK10-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 14726 // CHECK10-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 8 14727 // CHECK10-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 14728 // CHECK10-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 14729 // CHECK10-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 8 14730 // CHECK10-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 14731 // CHECK10-NEXT: store i8* null, i8** [[TMP130]], align 8 14732 // CHECK10-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 14733 // CHECK10-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 14734 // CHECK10-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 14735 // CHECK10-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 14736 // CHECK10-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 14737 // CHECK10-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 14738 // CHECK10-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 14739 // CHECK10-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 14740 // CHECK10-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 14741 // CHECK10-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 14742 // CHECK10-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 14743 // CHECK10-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 14744 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 14745 // CHECK10-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14746 // CHECK10-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 14747 // CHECK10-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 14748 // CHECK10: omp_offload.failed44: 14749 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i64 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 14750 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT45]] 14751 // CHECK10: omp_offload.cont45: 14752 // CHECK10-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 14753 // CHECK10-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 14754 // CHECK10-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 14755 // CHECK10-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 14756 // CHECK10-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 14757 // CHECK10-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 14758 // CHECK10-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 14759 // CHECK10-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 14760 // CHECK10-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 8 14761 // CHECK10-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 8 14762 // CHECK10-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 8 14763 // CHECK10-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 14764 // CHECK10-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 14765 // CHECK10-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 14766 // CHECK10-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 14767 // CHECK10-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 14768 // CHECK10-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 14769 // CHECK10-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 14770 // CHECK10-NEXT: store i8* null, i8** [[TMP150]], align 8 14771 // CHECK10-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 14772 // CHECK10-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 14773 // CHECK10-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 14774 // CHECK10-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 14775 // CHECK10-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 14776 // CHECK10-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 14777 // CHECK10-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 14778 // CHECK10-NEXT: store i8* null, i8** [[TMP155]], align 8 14779 // CHECK10-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 14780 // CHECK10-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 14781 // CHECK10-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 8 14782 // CHECK10-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 14783 // CHECK10-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 14784 // CHECK10-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 8 14785 // CHECK10-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 14786 // CHECK10-NEXT: store i8* null, i8** [[TMP160]], align 8 14787 // CHECK10-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 14788 // CHECK10-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 14789 // CHECK10-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 8 14790 // CHECK10-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 14791 // CHECK10-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 14792 // CHECK10-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 8 14793 // CHECK10-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 14794 // CHECK10-NEXT: store i8* null, i8** [[TMP165]], align 8 14795 // CHECK10-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 14796 // CHECK10-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 14797 // CHECK10-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 8 14798 // CHECK10-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 14799 // CHECK10-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 14800 // CHECK10-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 8 14801 // CHECK10-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 14802 // CHECK10-NEXT: store i8* null, i8** [[TMP170]], align 8 14803 // CHECK10-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 14804 // CHECK10-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 14805 // CHECK10-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 14806 // CHECK10-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 14807 // CHECK10-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 14808 // CHECK10-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 14809 // CHECK10-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 14810 // CHECK10-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 14811 // CHECK10-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 14812 // CHECK10-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 14813 // CHECK10-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 14814 // CHECK10-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 14815 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 14816 // CHECK10-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14817 // CHECK10-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 14818 // CHECK10-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 14819 // CHECK10: omp_offload.failed60: 14820 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i64 [[TMP140]], i64 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 14821 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT61]] 14822 // CHECK10: omp_offload.cont61: 14823 // CHECK10-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 14824 // CHECK10-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 14825 // CHECK10-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 14826 // CHECK10-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 14827 // CHECK10-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 8 14828 // CHECK10-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 8 14829 // CHECK10-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 8 14830 // CHECK10-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 14831 // CHECK10-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 14832 // CHECK10-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 14833 // CHECK10-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 14834 // CHECK10-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 14835 // CHECK10-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 14836 // CHECK10-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 14837 // CHECK10-NEXT: store i8* null, i8** [[TMP188]], align 8 14838 // CHECK10-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 14839 // CHECK10-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 14840 // CHECK10-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 8 14841 // CHECK10-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 14842 // CHECK10-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 14843 // CHECK10-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 8 14844 // CHECK10-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 14845 // CHECK10-NEXT: store i8* null, i8** [[TMP193]], align 8 14846 // CHECK10-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 14847 // CHECK10-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 14848 // CHECK10-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 8 14849 // CHECK10-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 14850 // CHECK10-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 14851 // CHECK10-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 8 14852 // CHECK10-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 14853 // CHECK10-NEXT: store i8* null, i8** [[TMP198]], align 8 14854 // CHECK10-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 14855 // CHECK10-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 14856 // CHECK10-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 8 14857 // CHECK10-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 14858 // CHECK10-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 14859 // CHECK10-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 8 14860 // CHECK10-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 14861 // CHECK10-NEXT: store i8* null, i8** [[TMP203]], align 8 14862 // CHECK10-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 14863 // CHECK10-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 14864 // CHECK10-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 14865 // CHECK10-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 14866 // CHECK10-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 14867 // CHECK10-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 14868 // CHECK10-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 14869 // CHECK10-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 14870 // CHECK10-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 14871 // CHECK10-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 14872 // CHECK10-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 14873 // CHECK10-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 14874 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 14875 // CHECK10-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14876 // CHECK10-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 14877 // CHECK10-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 14878 // CHECK10: omp_offload.failed74: 14879 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i64 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 14880 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT75]] 14881 // CHECK10: omp_offload.cont75: 14882 // CHECK10-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 14883 // CHECK10-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 14884 // CHECK10-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 14885 // CHECK10-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 14886 // CHECK10-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 14887 // CHECK10-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 14888 // CHECK10-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 14889 // CHECK10-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 14890 // CHECK10-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 8 14891 // CHECK10-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 8 14892 // CHECK10-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 8 14893 // CHECK10-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 14894 // CHECK10-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 14895 // CHECK10-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 14896 // CHECK10-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 14897 // CHECK10-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 14898 // CHECK10-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 14899 // CHECK10-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 14900 // CHECK10-NEXT: store i8* null, i8** [[TMP223]], align 8 14901 // CHECK10-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 14902 // CHECK10-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 14903 // CHECK10-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 14904 // CHECK10-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 14905 // CHECK10-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 14906 // CHECK10-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 14907 // CHECK10-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 14908 // CHECK10-NEXT: store i8* null, i8** [[TMP228]], align 8 14909 // CHECK10-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 14910 // CHECK10-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 14911 // CHECK10-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 8 14912 // CHECK10-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 14913 // CHECK10-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 14914 // CHECK10-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 8 14915 // CHECK10-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 14916 // CHECK10-NEXT: store i8* null, i8** [[TMP233]], align 8 14917 // CHECK10-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 14918 // CHECK10-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 14919 // CHECK10-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 8 14920 // CHECK10-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 14921 // CHECK10-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 14922 // CHECK10-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 8 14923 // CHECK10-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 14924 // CHECK10-NEXT: store i8* null, i8** [[TMP238]], align 8 14925 // CHECK10-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 14926 // CHECK10-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 14927 // CHECK10-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 8 14928 // CHECK10-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 14929 // CHECK10-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 14930 // CHECK10-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 8 14931 // CHECK10-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 14932 // CHECK10-NEXT: store i8* null, i8** [[TMP243]], align 8 14933 // CHECK10-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 14934 // CHECK10-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 14935 // CHECK10-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 14936 // CHECK10-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 14937 // CHECK10-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 14938 // CHECK10-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 14939 // CHECK10-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 14940 // CHECK10-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 14941 // CHECK10-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 14942 // CHECK10-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 14943 // CHECK10-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 14944 // CHECK10-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 14945 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 14946 // CHECK10-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14947 // CHECK10-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 14948 // CHECK10-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 14949 // CHECK10: omp_offload.failed90: 14950 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i64 [[TMP213]], i64 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 14951 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT91]] 14952 // CHECK10: omp_offload.cont91: 14953 // CHECK10-NEXT: ret i32 0 14954 // 14955 // 14956 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 14957 // CHECK10-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 14958 // CHECK10-NEXT: entry: 14959 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 14960 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 14961 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 14962 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 14963 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 14964 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 14965 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 14966 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 14967 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 14968 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 14969 // CHECK10-NEXT: ret void 14970 // 14971 // 14972 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..26 14973 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 14974 // CHECK10-NEXT: entry: 14975 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 14976 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 14977 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 14978 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 14979 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 14980 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 14981 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14982 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 14983 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14984 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14985 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 14986 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14987 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14988 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14989 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14990 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 14991 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 14992 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 14993 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 14994 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 14995 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 14996 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 14997 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 14998 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 14999 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15000 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15001 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15002 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15003 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15004 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15005 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15006 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15007 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15008 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15009 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15010 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15011 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15012 // CHECK10: omp.precond.then: 15013 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15014 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15015 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 15016 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15017 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15018 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15019 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 15020 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15021 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15022 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15023 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 15024 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15025 // CHECK10: cond.true: 15026 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15027 // CHECK10-NEXT: br label [[COND_END:%.*]] 15028 // CHECK10: cond.false: 15029 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15030 // CHECK10-NEXT: br label [[COND_END]] 15031 // CHECK10: cond.end: 15032 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 15033 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15034 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15035 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 15036 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15037 // CHECK10: omp.inner.for.cond: 15038 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15039 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15040 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 15041 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15042 // CHECK10: omp.inner.for.body: 15043 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15044 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 15045 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15046 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 15047 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 15048 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15049 // CHECK10: omp.inner.for.inc: 15050 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15051 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15052 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 15053 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15054 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15055 // CHECK10: omp.inner.for.end: 15056 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15057 // CHECK10: omp.loop.exit: 15058 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15059 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 15060 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 15061 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15062 // CHECK10: omp.precond.end: 15063 // CHECK10-NEXT: ret void 15064 // 15065 // 15066 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..27 15067 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15068 // CHECK10-NEXT: entry: 15069 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15070 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15071 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 15072 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 15073 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15074 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15075 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15076 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15077 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15078 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15079 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15080 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15081 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15082 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15083 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15084 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15085 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15086 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 15087 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15088 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15089 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15090 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15091 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15092 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15093 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15094 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15095 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15096 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15097 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15098 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15099 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15100 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15101 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15102 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15103 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15104 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15105 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15106 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15107 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15108 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15109 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15110 // CHECK10: omp.precond.then: 15111 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15112 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15113 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 15114 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15115 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 15116 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15117 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 15118 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 15119 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 15120 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15121 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15122 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15123 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15124 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15125 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15126 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15127 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 15128 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15129 // CHECK10: cond.true: 15130 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15131 // CHECK10-NEXT: br label [[COND_END:%.*]] 15132 // CHECK10: cond.false: 15133 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15134 // CHECK10-NEXT: br label [[COND_END]] 15135 // CHECK10: cond.end: 15136 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 15137 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15138 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15139 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15140 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15141 // CHECK10: omp.inner.for.cond: 15142 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15143 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15144 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15145 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15146 // CHECK10: omp.inner.for.body: 15147 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15148 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15149 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15150 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15151 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15152 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15153 // CHECK10-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 15154 // CHECK10-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 15155 // CHECK10-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 15156 // CHECK10: .cancel.exit: 15157 // CHECK10-NEXT: br label [[CANCEL_EXIT:%.*]] 15158 // CHECK10: .cancel.continue: 15159 // CHECK10-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 8 15160 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4 15161 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64 15162 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM]] 15163 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15164 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 8 15165 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4 15166 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP28]] to i64 15167 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM7]] 15168 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 15169 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 15170 // CHECK10-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 8 15171 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[I4]], align 4 15172 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP31]] to i64 15173 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i64 [[IDXPROM10]] 15174 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 15175 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15176 // CHECK10: omp.body.continue: 15177 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15178 // CHECK10: omp.inner.for.inc: 15179 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15180 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 15181 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 15182 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15183 // CHECK10: omp.inner.for.end: 15184 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15185 // CHECK10: omp.loop.exit: 15186 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15187 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 15188 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 15189 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15190 // CHECK10: cancel.exit: 15191 // CHECK10-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15192 // CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 15193 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 15194 // CHECK10-NEXT: br label [[CANCEL_CONT:%.*]] 15195 // CHECK10: omp.precond.end: 15196 // CHECK10-NEXT: br label [[CANCEL_CONT]] 15197 // CHECK10: cancel.cont: 15198 // CHECK10-NEXT: ret void 15199 // 15200 // 15201 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 15202 // CHECK10-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 15203 // CHECK10-NEXT: entry: 15204 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 15205 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 15206 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 15207 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 15208 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 15209 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 15210 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 15211 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 15212 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 15213 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 15214 // CHECK10-NEXT: ret void 15215 // 15216 // 15217 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..30 15218 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15219 // CHECK10-NEXT: entry: 15220 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15221 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15222 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15223 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15224 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15225 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15226 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15227 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15228 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15229 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15230 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15231 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15232 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15233 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15234 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15235 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 15236 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15237 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15238 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15239 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15240 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15241 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15242 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15243 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15244 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15245 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15246 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15247 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15248 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15249 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15250 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15251 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15252 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15253 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15254 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15255 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15256 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15257 // CHECK10: omp.precond.then: 15258 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15259 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15260 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 15261 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15262 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15263 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15264 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 15265 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15266 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15267 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15268 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 15269 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15270 // CHECK10: cond.true: 15271 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15272 // CHECK10-NEXT: br label [[COND_END:%.*]] 15273 // CHECK10: cond.false: 15274 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15275 // CHECK10-NEXT: br label [[COND_END]] 15276 // CHECK10: cond.end: 15277 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 15278 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15279 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15280 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 15281 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15282 // CHECK10: omp.inner.for.cond: 15283 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15284 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15285 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 15286 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15287 // CHECK10: omp.inner.for.body: 15288 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15289 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 15290 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15291 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 15292 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 15293 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15294 // CHECK10: omp.inner.for.inc: 15295 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15296 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15297 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 15298 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15299 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15300 // CHECK10: omp.inner.for.end: 15301 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15302 // CHECK10: omp.loop.exit: 15303 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15304 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 15305 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 15306 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15307 // CHECK10: omp.precond.end: 15308 // CHECK10-NEXT: ret void 15309 // 15310 // 15311 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..31 15312 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15313 // CHECK10-NEXT: entry: 15314 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15315 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15316 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 15317 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 15318 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15319 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15320 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15321 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15322 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15323 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15324 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15325 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15326 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15327 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15328 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15329 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15330 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15331 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 15332 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15333 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15334 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15335 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15336 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15337 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15338 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15339 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15340 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15341 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15342 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15343 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15344 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15345 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15346 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15347 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15348 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15349 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15350 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15351 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15352 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15353 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15354 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15355 // CHECK10: omp.precond.then: 15356 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15357 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15358 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 15359 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15360 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 15361 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15362 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 15363 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 15364 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 15365 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15366 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15367 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15368 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15369 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15370 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15371 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15372 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 15373 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15374 // CHECK10: cond.true: 15375 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15376 // CHECK10-NEXT: br label [[COND_END:%.*]] 15377 // CHECK10: cond.false: 15378 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15379 // CHECK10-NEXT: br label [[COND_END]] 15380 // CHECK10: cond.end: 15381 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 15382 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15383 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15384 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15385 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15386 // CHECK10: omp.inner.for.cond: 15387 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15388 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15389 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15390 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15391 // CHECK10: omp.inner.for.body: 15392 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15393 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15394 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15395 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15396 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 15397 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 15398 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 15399 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 15400 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15401 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 15402 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 15403 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 15404 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 15405 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 15406 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 15407 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 15408 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 15409 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 15410 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 15411 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 15412 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15413 // CHECK10: omp.body.continue: 15414 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15415 // CHECK10: omp.inner.for.inc: 15416 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15417 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 15418 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 15419 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15420 // CHECK10: omp.inner.for.end: 15421 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15422 // CHECK10: omp.loop.exit: 15423 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15424 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 15425 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 15426 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15427 // CHECK10: omp.precond.end: 15428 // CHECK10-NEXT: ret void 15429 // 15430 // 15431 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 15432 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 15433 // CHECK10-NEXT: entry: 15434 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 15435 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 15436 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 15437 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 15438 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 15439 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 15440 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 15441 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 15442 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 15443 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 15444 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 15445 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 15446 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 15447 // CHECK10-NEXT: ret void 15448 // 15449 // 15450 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..34 15451 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15452 // CHECK10-NEXT: entry: 15453 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15454 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15455 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 15456 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15457 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15458 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15459 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15460 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15461 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15462 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15463 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15464 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15465 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15466 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15467 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15468 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15469 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 15470 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15471 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15472 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 15473 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15474 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15475 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15476 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15477 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 15478 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15479 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15480 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15481 // CHECK10-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15482 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 15483 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 15484 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15485 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 15486 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15487 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15488 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15489 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15490 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15491 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 15492 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15493 // CHECK10: omp.precond.then: 15494 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15495 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15496 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 15497 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15498 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15499 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 15500 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15501 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15502 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 15503 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15504 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15505 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 15506 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15507 // CHECK10: cond.true: 15508 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15509 // CHECK10-NEXT: br label [[COND_END:%.*]] 15510 // CHECK10: cond.false: 15511 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15512 // CHECK10-NEXT: br label [[COND_END]] 15513 // CHECK10: cond.end: 15514 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 15515 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15516 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15517 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15518 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15519 // CHECK10: omp.inner.for.cond: 15520 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15521 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15522 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 15523 // CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 15524 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15525 // CHECK10: omp.inner.for.body: 15526 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15527 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 15528 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15529 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 15530 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 15531 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15532 // CHECK10: omp.inner.for.inc: 15533 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15534 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15535 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 15536 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 15537 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15538 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15539 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 15540 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 15541 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15542 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15543 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 15544 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 15545 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15546 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15547 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 15548 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 15549 // CHECK10: cond.true10: 15550 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15551 // CHECK10-NEXT: br label [[COND_END12:%.*]] 15552 // CHECK10: cond.false11: 15553 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15554 // CHECK10-NEXT: br label [[COND_END12]] 15555 // CHECK10: cond.end12: 15556 // CHECK10-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 15557 // CHECK10-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 15558 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15559 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 15560 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15561 // CHECK10: omp.inner.for.end: 15562 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15563 // CHECK10: omp.loop.exit: 15564 // CHECK10-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15565 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 15566 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 15567 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15568 // CHECK10: omp.precond.end: 15569 // CHECK10-NEXT: ret void 15570 // 15571 // 15572 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..35 15573 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15574 // CHECK10-NEXT: entry: 15575 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15576 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15577 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 15578 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 15579 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15580 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15581 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15582 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15583 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15584 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15585 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15586 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15587 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15588 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15589 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15590 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15591 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15592 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 15593 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15594 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15595 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15596 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15597 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15598 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15599 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15600 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15601 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15602 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15603 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15604 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15605 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15606 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15607 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15608 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15609 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15610 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15611 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15612 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15613 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15614 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15615 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15616 // CHECK10: omp.precond.then: 15617 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15618 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15619 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 15620 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15621 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 15622 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15623 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 15624 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 15625 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 15626 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15627 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15628 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15629 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15630 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15631 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15632 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15633 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 15634 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15635 // CHECK10: cond.true: 15636 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15637 // CHECK10-NEXT: br label [[COND_END:%.*]] 15638 // CHECK10: cond.false: 15639 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15640 // CHECK10-NEXT: br label [[COND_END]] 15641 // CHECK10: cond.end: 15642 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 15643 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15644 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15645 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15646 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15647 // CHECK10: omp.inner.for.cond: 15648 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15649 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15650 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15651 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15652 // CHECK10: omp.inner.for.body: 15653 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15654 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15655 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15656 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15657 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 15658 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 15659 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 15660 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 15661 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15662 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 15663 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 15664 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 15665 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 15666 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 15667 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 15668 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 15669 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 15670 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 15671 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 15672 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 15673 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15674 // CHECK10: omp.body.continue: 15675 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15676 // CHECK10: omp.inner.for.inc: 15677 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15678 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 15679 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 15680 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15681 // CHECK10: omp.inner.for.end: 15682 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15683 // CHECK10: omp.loop.exit: 15684 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15685 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 15686 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 15687 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15688 // CHECK10: omp.precond.end: 15689 // CHECK10-NEXT: ret void 15690 // 15691 // 15692 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 15693 // CHECK10-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 15694 // CHECK10-NEXT: entry: 15695 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 15696 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 15697 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 15698 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 15699 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 15700 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 15701 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 15702 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 15703 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 15704 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 15705 // CHECK10-NEXT: ret void 15706 // 15707 // 15708 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..38 15709 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15710 // CHECK10-NEXT: entry: 15711 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15712 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15713 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15714 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15715 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15716 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15717 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15718 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15719 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15720 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15721 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15722 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15723 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15724 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15725 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15726 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 15727 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15728 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15729 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15730 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15731 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15732 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15733 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15734 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15735 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15736 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15737 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15738 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15739 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15740 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15741 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15742 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15743 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15744 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15745 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15746 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15747 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15748 // CHECK10: omp.precond.then: 15749 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15750 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15751 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 15752 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15753 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15754 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15755 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 15756 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15757 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15758 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15759 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 15760 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15761 // CHECK10: cond.true: 15762 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15763 // CHECK10-NEXT: br label [[COND_END:%.*]] 15764 // CHECK10: cond.false: 15765 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15766 // CHECK10-NEXT: br label [[COND_END]] 15767 // CHECK10: cond.end: 15768 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 15769 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15770 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15771 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 15772 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15773 // CHECK10: omp.inner.for.cond: 15774 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15775 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15776 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 15777 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15778 // CHECK10: omp.inner.for.body: 15779 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15780 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 15781 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15782 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 15783 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 15784 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15785 // CHECK10: omp.inner.for.inc: 15786 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15787 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15788 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 15789 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15790 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15791 // CHECK10: omp.inner.for.end: 15792 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15793 // CHECK10: omp.loop.exit: 15794 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15795 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 15796 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 15797 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15798 // CHECK10: omp.precond.end: 15799 // CHECK10-NEXT: ret void 15800 // 15801 // 15802 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..39 15803 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15804 // CHECK10-NEXT: entry: 15805 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15806 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15807 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 15808 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 15809 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15810 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15811 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15812 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15813 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15814 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15815 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15816 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15817 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15818 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15819 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15820 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15821 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15822 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 15823 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15824 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15825 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15826 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15827 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15828 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15829 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15830 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15831 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15832 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15833 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15834 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15835 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 15836 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 15837 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15838 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 15839 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15840 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15841 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15842 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15843 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15844 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 15845 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15846 // CHECK10: omp.precond.then: 15847 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15848 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15849 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 15850 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 15851 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 15852 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 15853 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 15854 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 15855 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 15856 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15857 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15858 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15859 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15860 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15861 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15862 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15863 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 15864 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15865 // CHECK10: cond.true: 15866 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15867 // CHECK10-NEXT: br label [[COND_END:%.*]] 15868 // CHECK10: cond.false: 15869 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15870 // CHECK10-NEXT: br label [[COND_END]] 15871 // CHECK10: cond.end: 15872 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 15873 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15874 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15875 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15876 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15877 // CHECK10: omp.inner.for.cond: 15878 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15879 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15880 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15881 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15882 // CHECK10: omp.inner.for.body: 15883 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15884 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15885 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15886 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15887 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 15888 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 15889 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 15890 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 15891 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 15892 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 15893 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 15894 // CHECK10-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 15895 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 15896 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 15897 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 15898 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 15899 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 15900 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 15901 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 15902 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 15903 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15904 // CHECK10: omp.body.continue: 15905 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15906 // CHECK10: omp.inner.for.inc: 15907 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15908 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 15909 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 15910 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 15911 // CHECK10: omp.inner.for.end: 15912 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15913 // CHECK10: omp.loop.exit: 15914 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15915 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 15916 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 15917 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 15918 // CHECK10: omp.precond.end: 15919 // CHECK10-NEXT: ret void 15920 // 15921 // 15922 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 15923 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 15924 // CHECK10-NEXT: entry: 15925 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 15926 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 15927 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 15928 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 15929 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 15930 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 15931 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 15932 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 15933 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 15934 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 15935 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 15936 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 15937 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 15938 // CHECK10-NEXT: ret void 15939 // 15940 // 15941 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..42 15942 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 15943 // CHECK10-NEXT: entry: 15944 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 15945 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 15946 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 15947 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 15948 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 15949 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 15950 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 15951 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15952 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15953 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 15954 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15955 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15956 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 15957 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15958 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15959 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15960 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15961 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 15962 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 15963 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 15964 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 15965 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 15966 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 15967 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 15968 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 15969 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 15970 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 15971 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 15972 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 15973 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 15974 // CHECK10-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 15975 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 15976 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 15977 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 15978 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15979 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15980 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 15981 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15982 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15983 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15984 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 15985 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15986 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 15987 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15988 // CHECK10: omp.precond.then: 15989 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15990 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15991 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 15992 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15993 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15994 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 15995 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 15996 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15997 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15998 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15999 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 16000 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16001 // CHECK10: cond.true: 16002 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16003 // CHECK10-NEXT: br label [[COND_END:%.*]] 16004 // CHECK10: cond.false: 16005 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16006 // CHECK10-NEXT: br label [[COND_END]] 16007 // CHECK10: cond.end: 16008 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 16009 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16010 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16011 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 16012 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16013 // CHECK10: omp.inner.for.cond: 16014 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16015 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16016 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 16017 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16018 // CHECK10: omp.inner.for.body: 16019 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16020 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 16021 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16022 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 16023 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16024 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 16025 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 16026 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 16027 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 16028 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16029 // CHECK10: omp.inner.for.inc: 16030 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16031 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16032 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 16033 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16034 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 16035 // CHECK10: omp.inner.for.end: 16036 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16037 // CHECK10: omp.loop.exit: 16038 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16039 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 16040 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 16041 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16042 // CHECK10: omp.precond.end: 16043 // CHECK10-NEXT: ret void 16044 // 16045 // 16046 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..43 16047 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 16048 // CHECK10-NEXT: entry: 16049 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 16050 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 16051 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 16052 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 16053 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 16054 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 16055 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 16056 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 16057 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 16058 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16059 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 16060 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16061 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16062 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 16063 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16064 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16065 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16066 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16067 // CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4 16068 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 16069 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 16070 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16071 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16072 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 16073 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 16074 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 16075 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 16076 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 16077 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 16078 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 16079 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 16080 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 16081 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 16082 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 16083 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16084 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16085 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 16086 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16087 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16088 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16089 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 16090 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16091 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 16092 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16093 // CHECK10: omp.precond.then: 16094 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16095 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16096 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 16097 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16098 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 16099 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16100 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 16101 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 16102 // CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 16103 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16104 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16105 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 16106 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16107 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 16108 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 16109 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16110 // CHECK10: omp.dispatch.cond: 16111 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16112 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16113 // CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 16114 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 16115 // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16116 // CHECK10: cond.true: 16117 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16118 // CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 16119 // CHECK10-NEXT: br label [[COND_END:%.*]] 16120 // CHECK10: cond.false: 16121 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16122 // CHECK10-NEXT: br label [[COND_END]] 16123 // CHECK10: cond.end: 16124 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 16125 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16126 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16127 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 16128 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16129 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16130 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 16131 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16132 // CHECK10: omp.dispatch.body: 16133 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16134 // CHECK10: omp.inner.for.cond: 16135 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16136 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16137 // CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 16138 // CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16139 // CHECK10: omp.inner.for.body: 16140 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16141 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 16142 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16143 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 16144 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 8 16145 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 16146 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 16147 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM]] 16148 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 16149 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8 16150 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 16151 // CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 16152 // CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] 16153 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4 16154 // CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 16155 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8 16156 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 16157 // CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 16158 // CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] 16159 // CHECK10-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4 16160 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16161 // CHECK10: omp.body.continue: 16162 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16163 // CHECK10: omp.inner.for.inc: 16164 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16165 // CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 16166 // CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 16167 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 16168 // CHECK10: omp.inner.for.end: 16169 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16170 // CHECK10: omp.dispatch.inc: 16171 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16172 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16173 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 16174 // CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 16175 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16176 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16177 // CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 16178 // CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 16179 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 16180 // CHECK10: omp.dispatch.end: 16181 // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16182 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 16183 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 16184 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16185 // CHECK10: omp.precond.end: 16186 // CHECK10-NEXT: ret void 16187 // 16188 // 16189 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 16190 // CHECK10-SAME: (i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 16191 // CHECK10-NEXT: entry: 16192 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 16193 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 16194 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 16195 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 16196 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 16197 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 16198 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 16199 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 16200 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 16201 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 16202 // CHECK10-NEXT: ret void 16203 // 16204 // 16205 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..46 16206 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 16207 // CHECK10-NEXT: entry: 16208 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 16209 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 16210 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 16211 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 16212 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 16213 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 16214 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16215 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 16216 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16217 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16218 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 16219 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16220 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16221 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16222 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16223 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 16224 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 16225 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 16226 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 16227 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 16228 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 16229 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 16230 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 16231 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 16232 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 16233 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 16234 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 16235 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 16236 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16237 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 16238 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16239 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16240 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16241 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 16242 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16243 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 16244 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16245 // CHECK10: omp.precond.then: 16246 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16247 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16248 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 16249 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16250 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16251 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16252 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 16253 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16254 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16255 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16256 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 16257 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16258 // CHECK10: cond.true: 16259 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16260 // CHECK10-NEXT: br label [[COND_END:%.*]] 16261 // CHECK10: cond.false: 16262 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16263 // CHECK10-NEXT: br label [[COND_END]] 16264 // CHECK10: cond.end: 16265 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 16266 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16267 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16268 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 16269 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16270 // CHECK10: omp.inner.for.cond: 16271 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16272 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16273 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 16274 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16275 // CHECK10: omp.inner.for.body: 16276 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16277 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 16278 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16279 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 16280 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 16281 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16282 // CHECK10: omp.inner.for.inc: 16283 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16284 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16285 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 16286 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16287 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 16288 // CHECK10: omp.inner.for.end: 16289 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16290 // CHECK10: omp.loop.exit: 16291 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16292 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 16293 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 16294 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16295 // CHECK10: omp.precond.end: 16296 // CHECK10-NEXT: ret void 16297 // 16298 // 16299 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..47 16300 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 16301 // CHECK10-NEXT: entry: 16302 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 16303 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 16304 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 16305 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 16306 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 16307 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 16308 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 16309 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 16310 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16311 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 16312 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16313 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16314 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 16315 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16316 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16317 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16318 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16319 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 16320 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 16321 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 16322 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16323 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16324 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 16325 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 16326 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 16327 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 16328 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 16329 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 16330 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 16331 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 16332 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 16333 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 16334 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16335 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 16336 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16337 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16338 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16339 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 16340 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16341 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 16342 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16343 // CHECK10: omp.precond.then: 16344 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16345 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16346 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 16347 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16348 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 16349 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16350 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 16351 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 16352 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 16353 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16354 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16355 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16356 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16357 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16358 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 16359 // CHECK10-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 16360 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16361 // CHECK10: omp.dispatch.cond: 16362 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16363 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 16364 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16365 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 16366 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16367 // CHECK10: omp.dispatch.body: 16368 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16369 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 16370 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16371 // CHECK10: omp.inner.for.cond: 16372 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 16373 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 16374 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 16375 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16376 // CHECK10: omp.inner.for.body: 16377 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 16378 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 16379 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16380 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 16381 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !25 16382 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 16383 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 16384 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i64 [[IDXPROM]] 16385 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 16386 // CHECK10-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !25 16387 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 16388 // CHECK10-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 16389 // CHECK10-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM6]] 16390 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !25 16391 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 16392 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !25 16393 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 16394 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 16395 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM9]] 16396 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX10]], align 4, !llvm.access.group !25 16397 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16398 // CHECK10: omp.body.continue: 16399 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16400 // CHECK10: omp.inner.for.inc: 16401 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 16402 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 16403 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 16404 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 16405 // CHECK10: omp.inner.for.end: 16406 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16407 // CHECK10: omp.dispatch.inc: 16408 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 16409 // CHECK10: omp.dispatch.end: 16410 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16411 // CHECK10: omp.precond.end: 16412 // CHECK10-NEXT: ret void 16413 // 16414 // 16415 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 16416 // CHECK10-SAME: (i64 [[CH:%.*]], i64 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 16417 // CHECK10-NEXT: entry: 16418 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 16419 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 16420 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 16421 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 16422 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 16423 // CHECK10-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 16424 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 16425 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 16426 // CHECK10-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 16427 // CHECK10-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 16428 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 16429 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 16430 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 16431 // CHECK10-NEXT: ret void 16432 // 16433 // 16434 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..50 16435 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 16436 // CHECK10-NEXT: entry: 16437 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 16438 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 16439 // CHECK10-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 16440 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 16441 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 16442 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 16443 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 16444 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16445 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16446 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 16447 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16448 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16449 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 16450 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16451 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16452 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16453 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16454 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 16455 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 16456 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 16457 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 16458 // CHECK10-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 16459 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 16460 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 16461 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 16462 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 16463 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 16464 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 16465 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 16466 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 16467 // CHECK10-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 16468 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 16469 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 16470 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 16471 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16472 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16473 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 16474 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16475 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16476 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16477 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 16478 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16479 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 16480 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16481 // CHECK10: omp.precond.then: 16482 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16483 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16484 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 16485 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16486 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16487 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16488 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 16489 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16490 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16491 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16492 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 16493 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16494 // CHECK10: cond.true: 16495 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16496 // CHECK10-NEXT: br label [[COND_END:%.*]] 16497 // CHECK10: cond.false: 16498 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16499 // CHECK10-NEXT: br label [[COND_END]] 16500 // CHECK10: cond.end: 16501 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 16502 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16503 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16504 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 16505 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16506 // CHECK10: omp.inner.for.cond: 16507 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16508 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16509 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 16510 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16511 // CHECK10: omp.inner.for.body: 16512 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16513 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 16514 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16515 // CHECK10-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 16516 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16517 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 16518 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 16519 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 16520 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 16521 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16522 // CHECK10: omp.inner.for.inc: 16523 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16524 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16525 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 16526 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16527 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 16528 // CHECK10: omp.inner.for.end: 16529 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16530 // CHECK10: omp.loop.exit: 16531 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16532 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 16533 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 16534 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16535 // CHECK10: omp.precond.end: 16536 // CHECK10-NEXT: ret void 16537 // 16538 // 16539 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..51 16540 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 8 dereferenceable(8) [[A:%.*]], i32** nonnull align 8 dereferenceable(8) [[B:%.*]], i32** nonnull align 8 dereferenceable(8) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 16541 // CHECK10-NEXT: entry: 16542 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 16543 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 16544 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 16545 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 16546 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 16547 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 16548 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 16549 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 16550 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 16551 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16552 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 16553 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16554 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16555 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 16556 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16557 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16558 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16559 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16560 // CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4 16561 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 16562 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 16563 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16564 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16565 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 16566 // CHECK10-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 16567 // CHECK10-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 16568 // CHECK10-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 16569 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 16570 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 16571 // CHECK10-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 16572 // CHECK10-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 16573 // CHECK10-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 16574 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 16575 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 16576 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16577 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16578 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 16579 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16580 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16581 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16582 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 16583 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16584 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 16585 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16586 // CHECK10: omp.precond.then: 16587 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16588 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16589 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 16590 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 16591 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 16592 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 16593 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 16594 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 16595 // CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 16596 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16597 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16598 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 8 16599 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16600 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16601 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16602 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 16603 // CHECK10-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 16604 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16605 // CHECK10: omp.dispatch.cond: 16606 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 16607 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 16608 // CHECK10-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16609 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 16610 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16611 // CHECK10: omp.dispatch.body: 16612 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16613 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 16614 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16615 // CHECK10: omp.inner.for.cond: 16616 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 16617 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 16618 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 16619 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16620 // CHECK10: omp.inner.for.body: 16621 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 16622 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 16623 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16624 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !28 16625 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !28 16626 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 16627 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 16628 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i64 [[IDXPROM]] 16629 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 16630 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !28 16631 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 16632 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 16633 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i64 [[IDXPROM8]] 16634 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !28 16635 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 16636 // CHECK10-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !28 16637 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 16638 // CHECK10-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 16639 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i64 [[IDXPROM11]] 16640 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[ARRAYIDX12]], align 4, !llvm.access.group !28 16641 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16642 // CHECK10: omp.body.continue: 16643 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16644 // CHECK10: omp.inner.for.inc: 16645 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 16646 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 16647 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 16648 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 16649 // CHECK10: omp.inner.for.end: 16650 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16651 // CHECK10: omp.dispatch.inc: 16652 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 16653 // CHECK10: omp.dispatch.end: 16654 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 16655 // CHECK10: omp.precond.end: 16656 // CHECK10-NEXT: ret void 16657 // 16658 // 16659 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 16660 // CHECK10-SAME: () #[[ATTR4:[0-9]+]] { 16661 // CHECK10-NEXT: entry: 16662 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 16663 // CHECK10-NEXT: ret void 16664 // 16665 // 16666 // CHECK11-LABEL: define {{[^@]+}}@main 16667 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 16668 // CHECK11-NEXT: entry: 16669 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 16670 // CHECK11-NEXT: [[A:%.*]] = alloca double*, align 4 16671 // CHECK11-NEXT: [[B:%.*]] = alloca double*, align 4 16672 // CHECK11-NEXT: [[C:%.*]] = alloca double*, align 4 16673 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 16674 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 16675 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 16676 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 16677 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 16678 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 16679 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 16680 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16681 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16682 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 16683 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 16684 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 16685 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 16686 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 16687 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 16688 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 16689 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 16690 // CHECK11-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 16691 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 16692 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 16693 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 16694 // CHECK11-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 16695 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 16696 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 16697 // CHECK11-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 16698 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 16699 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 16700 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 16701 // CHECK11-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 16702 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 16703 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 16704 // CHECK11-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 16705 // CHECK11-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 16706 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 16707 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 16708 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 16709 // CHECK11-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 16710 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 16711 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 16712 // CHECK11-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 16713 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 16714 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 16715 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 16716 // CHECK11-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 16717 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 16718 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 16719 // CHECK11-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 16720 // CHECK11-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 16721 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 16722 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 16723 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 16724 // CHECK11-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 16725 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 16726 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 16727 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 16728 // CHECK11-NEXT: store i32 10000, i32* [[N]], align 4 16729 // CHECK11-NEXT: store i32 100, i32* [[CH]], align 4 16730 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 16731 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 16732 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 16733 // CHECK11-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 4 16734 // CHECK11-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 4 16735 // CHECK11-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 4 16736 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16737 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 16738 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 16739 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16740 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 16741 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 16742 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16743 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 16744 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 16745 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 16746 // CHECK11-NEXT: store double* [[TMP2]], double** [[TMP11]], align 4 16747 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 16748 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 16749 // CHECK11-NEXT: store double* [[TMP2]], double** [[TMP13]], align 4 16750 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 16751 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 16752 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 16753 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 16754 // CHECK11-NEXT: store double* [[TMP3]], double** [[TMP16]], align 4 16755 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 16756 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 16757 // CHECK11-NEXT: store double* [[TMP3]], double** [[TMP18]], align 4 16758 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 16759 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 16760 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 16761 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 16762 // CHECK11-NEXT: store double* [[TMP4]], double** [[TMP21]], align 4 16763 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 16764 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 16765 // CHECK11-NEXT: store double* [[TMP4]], double** [[TMP23]], align 4 16766 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 16767 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 16768 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16769 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16770 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 16771 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 16772 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16773 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 16774 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16775 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16776 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16777 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16778 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 16779 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 16780 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 16781 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16782 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 16783 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16784 // CHECK11: omp_offload.failed: 16785 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i32 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 16786 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 16787 // CHECK11: omp_offload.cont: 16788 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 16789 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 16790 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 16791 // CHECK11-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 4 16792 // CHECK11-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 4 16793 // CHECK11-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 4 16794 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 16795 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 16796 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 16797 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 16798 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 16799 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 16800 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 16801 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4 16802 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 16803 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 16804 // CHECK11-NEXT: store double* [[TMP35]], double** [[TMP44]], align 4 16805 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 16806 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 16807 // CHECK11-NEXT: store double* [[TMP35]], double** [[TMP46]], align 4 16808 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 16809 // CHECK11-NEXT: store i8* null, i8** [[TMP47]], align 4 16810 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 16811 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 16812 // CHECK11-NEXT: store double* [[TMP36]], double** [[TMP49]], align 4 16813 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 16814 // CHECK11-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 16815 // CHECK11-NEXT: store double* [[TMP36]], double** [[TMP51]], align 4 16816 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 16817 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 16818 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 16819 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 16820 // CHECK11-NEXT: store double* [[TMP37]], double** [[TMP54]], align 4 16821 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 16822 // CHECK11-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 16823 // CHECK11-NEXT: store double* [[TMP37]], double** [[TMP56]], align 4 16824 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 16825 // CHECK11-NEXT: store i8* null, i8** [[TMP57]], align 4 16826 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 16827 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 16828 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 16829 // CHECK11-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 16830 // CHECK11-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 16831 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 16832 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 16833 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 16834 // CHECK11-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 16835 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 16836 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 16837 // CHECK11-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 16838 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 16839 // CHECK11-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16840 // CHECK11-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 16841 // CHECK11-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 16842 // CHECK11: omp_offload.failed14: 16843 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i32 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 16844 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT15]] 16845 // CHECK11: omp_offload.cont15: 16846 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 16847 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 16848 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 16849 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 16850 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 16851 // CHECK11-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 16852 // CHECK11-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 4 16853 // CHECK11-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 4 16854 // CHECK11-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 4 16855 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 16856 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 16857 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 16858 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 16859 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 16860 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 16861 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 16862 // CHECK11-NEXT: store i8* null, i8** [[TMP77]], align 4 16863 // CHECK11-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 16864 // CHECK11-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 16865 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 16866 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 16867 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 16868 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 16869 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 16870 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 16871 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 16872 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 16873 // CHECK11-NEXT: store double* [[TMP70]], double** [[TMP84]], align 4 16874 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 16875 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 16876 // CHECK11-NEXT: store double* [[TMP70]], double** [[TMP86]], align 4 16877 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 16878 // CHECK11-NEXT: store i8* null, i8** [[TMP87]], align 4 16879 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 16880 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 16881 // CHECK11-NEXT: store double* [[TMP71]], double** [[TMP89]], align 4 16882 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 16883 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 16884 // CHECK11-NEXT: store double* [[TMP71]], double** [[TMP91]], align 4 16885 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 16886 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4 16887 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 16888 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 16889 // CHECK11-NEXT: store double* [[TMP72]], double** [[TMP94]], align 4 16890 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 16891 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 16892 // CHECK11-NEXT: store double* [[TMP72]], double** [[TMP96]], align 4 16893 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 16894 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4 16895 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 16896 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 16897 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 16898 // CHECK11-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 16899 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 16900 // CHECK11-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 16901 // CHECK11-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 16902 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 16903 // CHECK11-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 16904 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 16905 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 16906 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 16907 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 16908 // CHECK11-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16909 // CHECK11-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 16910 // CHECK11-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 16911 // CHECK11: omp_offload.failed27: 16912 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i32 [[TMP67]], i32 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 16913 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT28]] 16914 // CHECK11: omp_offload.cont28: 16915 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 16916 // CHECK11-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 16917 // CHECK11-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 16918 // CHECK11-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 4 16919 // CHECK11-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 4 16920 // CHECK11-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 4 16921 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 16922 // CHECK11-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 16923 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 16924 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 16925 // CHECK11-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 16926 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 16927 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 16928 // CHECK11-NEXT: store i8* null, i8** [[TMP115]], align 4 16929 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 16930 // CHECK11-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 16931 // CHECK11-NEXT: store double* [[TMP108]], double** [[TMP117]], align 4 16932 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 16933 // CHECK11-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 16934 // CHECK11-NEXT: store double* [[TMP108]], double** [[TMP119]], align 4 16935 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 16936 // CHECK11-NEXT: store i8* null, i8** [[TMP120]], align 4 16937 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 16938 // CHECK11-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 16939 // CHECK11-NEXT: store double* [[TMP109]], double** [[TMP122]], align 4 16940 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 16941 // CHECK11-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 16942 // CHECK11-NEXT: store double* [[TMP109]], double** [[TMP124]], align 4 16943 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 16944 // CHECK11-NEXT: store i8* null, i8** [[TMP125]], align 4 16945 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 16946 // CHECK11-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 16947 // CHECK11-NEXT: store double* [[TMP110]], double** [[TMP127]], align 4 16948 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 16949 // CHECK11-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 16950 // CHECK11-NEXT: store double* [[TMP110]], double** [[TMP129]], align 4 16951 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 16952 // CHECK11-NEXT: store i8* null, i8** [[TMP130]], align 4 16953 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 16954 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 16955 // CHECK11-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 16956 // CHECK11-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 16957 // CHECK11-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 16958 // CHECK11-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 16959 // CHECK11-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 16960 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 16961 // CHECK11-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 16962 // CHECK11-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 16963 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 16964 // CHECK11-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 16965 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 16966 // CHECK11-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16967 // CHECK11-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 16968 // CHECK11-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 16969 // CHECK11: omp_offload.failed40: 16970 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i32 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 16971 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT41]] 16972 // CHECK11: omp_offload.cont41: 16973 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 16974 // CHECK11-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 16975 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 16976 // CHECK11-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 16977 // CHECK11-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 16978 // CHECK11-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 16979 // CHECK11-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 4 16980 // CHECK11-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 4 16981 // CHECK11-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 4 16982 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 16983 // CHECK11-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 16984 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 16985 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 16986 // CHECK11-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 16987 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 16988 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 16989 // CHECK11-NEXT: store i8* null, i8** [[TMP150]], align 4 16990 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 16991 // CHECK11-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 16992 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 16993 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 16994 // CHECK11-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 16995 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 16996 // CHECK11-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 16997 // CHECK11-NEXT: store i8* null, i8** [[TMP155]], align 4 16998 // CHECK11-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 16999 // CHECK11-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 17000 // CHECK11-NEXT: store double* [[TMP143]], double** [[TMP157]], align 4 17001 // CHECK11-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 17002 // CHECK11-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 17003 // CHECK11-NEXT: store double* [[TMP143]], double** [[TMP159]], align 4 17004 // CHECK11-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 17005 // CHECK11-NEXT: store i8* null, i8** [[TMP160]], align 4 17006 // CHECK11-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 17007 // CHECK11-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 17008 // CHECK11-NEXT: store double* [[TMP144]], double** [[TMP162]], align 4 17009 // CHECK11-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 17010 // CHECK11-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 17011 // CHECK11-NEXT: store double* [[TMP144]], double** [[TMP164]], align 4 17012 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 17013 // CHECK11-NEXT: store i8* null, i8** [[TMP165]], align 4 17014 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 17015 // CHECK11-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 17016 // CHECK11-NEXT: store double* [[TMP145]], double** [[TMP167]], align 4 17017 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 17018 // CHECK11-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 17019 // CHECK11-NEXT: store double* [[TMP145]], double** [[TMP169]], align 4 17020 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 17021 // CHECK11-NEXT: store i8* null, i8** [[TMP170]], align 4 17022 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 17023 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 17024 // CHECK11-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 17025 // CHECK11-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 17026 // CHECK11-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 17027 // CHECK11-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 17028 // CHECK11-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 17029 // CHECK11-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 17030 // CHECK11-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 17031 // CHECK11-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 17032 // CHECK11-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 17033 // CHECK11-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 17034 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 17035 // CHECK11-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17036 // CHECK11-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 17037 // CHECK11-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 17038 // CHECK11: omp_offload.failed54: 17039 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i32 [[TMP140]], i32 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 17040 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT55]] 17041 // CHECK11: omp_offload.cont55: 17042 // CHECK11-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 17043 // CHECK11-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 17044 // CHECK11-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 17045 // CHECK11-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 4 17046 // CHECK11-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 4 17047 // CHECK11-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 4 17048 // CHECK11-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 17049 // CHECK11-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 17050 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 17051 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 17052 // CHECK11-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 17053 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 17054 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 17055 // CHECK11-NEXT: store i8* null, i8** [[TMP188]], align 4 17056 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 17057 // CHECK11-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 17058 // CHECK11-NEXT: store double* [[TMP181]], double** [[TMP190]], align 4 17059 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 17060 // CHECK11-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 17061 // CHECK11-NEXT: store double* [[TMP181]], double** [[TMP192]], align 4 17062 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 17063 // CHECK11-NEXT: store i8* null, i8** [[TMP193]], align 4 17064 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 17065 // CHECK11-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 17066 // CHECK11-NEXT: store double* [[TMP182]], double** [[TMP195]], align 4 17067 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 17068 // CHECK11-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 17069 // CHECK11-NEXT: store double* [[TMP182]], double** [[TMP197]], align 4 17070 // CHECK11-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 17071 // CHECK11-NEXT: store i8* null, i8** [[TMP198]], align 4 17072 // CHECK11-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 17073 // CHECK11-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 17074 // CHECK11-NEXT: store double* [[TMP183]], double** [[TMP200]], align 4 17075 // CHECK11-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 17076 // CHECK11-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 17077 // CHECK11-NEXT: store double* [[TMP183]], double** [[TMP202]], align 4 17078 // CHECK11-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 17079 // CHECK11-NEXT: store i8* null, i8** [[TMP203]], align 4 17080 // CHECK11-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 17081 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 17082 // CHECK11-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 17083 // CHECK11-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 17084 // CHECK11-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 17085 // CHECK11-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 17086 // CHECK11-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 17087 // CHECK11-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 17088 // CHECK11-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 17089 // CHECK11-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 17090 // CHECK11-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 17091 // CHECK11-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 17092 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 17093 // CHECK11-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17094 // CHECK11-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 17095 // CHECK11-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 17096 // CHECK11: omp_offload.failed67: 17097 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i32 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 17098 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT68]] 17099 // CHECK11: omp_offload.cont68: 17100 // CHECK11-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 17101 // CHECK11-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 17102 // CHECK11-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 17103 // CHECK11-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 17104 // CHECK11-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 17105 // CHECK11-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 17106 // CHECK11-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 4 17107 // CHECK11-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 4 17108 // CHECK11-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 4 17109 // CHECK11-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 17110 // CHECK11-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 17111 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 17112 // CHECK11-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 17113 // CHECK11-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 17114 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 17115 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 17116 // CHECK11-NEXT: store i8* null, i8** [[TMP223]], align 4 17117 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 17118 // CHECK11-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 17119 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 17120 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 17121 // CHECK11-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 17122 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 17123 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 17124 // CHECK11-NEXT: store i8* null, i8** [[TMP228]], align 4 17125 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 17126 // CHECK11-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 17127 // CHECK11-NEXT: store double* [[TMP216]], double** [[TMP230]], align 4 17128 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 17129 // CHECK11-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 17130 // CHECK11-NEXT: store double* [[TMP216]], double** [[TMP232]], align 4 17131 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 17132 // CHECK11-NEXT: store i8* null, i8** [[TMP233]], align 4 17133 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 17134 // CHECK11-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 17135 // CHECK11-NEXT: store double* [[TMP217]], double** [[TMP235]], align 4 17136 // CHECK11-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 17137 // CHECK11-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 17138 // CHECK11-NEXT: store double* [[TMP217]], double** [[TMP237]], align 4 17139 // CHECK11-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 17140 // CHECK11-NEXT: store i8* null, i8** [[TMP238]], align 4 17141 // CHECK11-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 17142 // CHECK11-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 17143 // CHECK11-NEXT: store double* [[TMP218]], double** [[TMP240]], align 4 17144 // CHECK11-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 17145 // CHECK11-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 17146 // CHECK11-NEXT: store double* [[TMP218]], double** [[TMP242]], align 4 17147 // CHECK11-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 17148 // CHECK11-NEXT: store i8* null, i8** [[TMP243]], align 4 17149 // CHECK11-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 17150 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 17151 // CHECK11-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 17152 // CHECK11-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 17153 // CHECK11-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 17154 // CHECK11-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 17155 // CHECK11-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 17156 // CHECK11-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 17157 // CHECK11-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 17158 // CHECK11-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 17159 // CHECK11-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 17160 // CHECK11-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 17161 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 17162 // CHECK11-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17163 // CHECK11-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 17164 // CHECK11-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 17165 // CHECK11: omp_offload.failed81: 17166 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i32 [[TMP213]], i32 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 17167 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT82]] 17168 // CHECK11: omp_offload.cont82: 17169 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 17170 // CHECK11-NEXT: ret i32 [[CALL]] 17171 // 17172 // 17173 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 17174 // CHECK11-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1:[0-9]+]] { 17175 // CHECK11-NEXT: entry: 17176 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 17177 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 17178 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 17179 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 17180 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 17181 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 17182 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 17183 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 17184 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 17185 // CHECK11-NEXT: ret void 17186 // 17187 // 17188 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 17189 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17190 // CHECK11-NEXT: entry: 17191 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17192 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17193 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17194 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17195 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17196 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17197 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17198 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17199 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17200 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17201 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17202 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17203 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17204 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17205 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17206 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17207 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17208 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17209 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17210 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17211 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17212 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17213 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17214 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17215 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17216 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17217 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17218 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17219 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17220 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17221 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17222 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17223 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17224 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17225 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17226 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17227 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17228 // CHECK11: omp.precond.then: 17229 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17230 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17231 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 17232 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17233 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17234 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17235 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 17236 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17237 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17238 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17239 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 17240 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17241 // CHECK11: cond.true: 17242 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17243 // CHECK11-NEXT: br label [[COND_END:%.*]] 17244 // CHECK11: cond.false: 17245 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17246 // CHECK11-NEXT: br label [[COND_END]] 17247 // CHECK11: cond.end: 17248 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 17249 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17250 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17251 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 17252 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17253 // CHECK11: omp.inner.for.cond: 17254 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17255 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17256 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 17257 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17258 // CHECK11: omp.inner.for.body: 17259 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17260 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17261 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 17262 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17263 // CHECK11: omp.inner.for.inc: 17264 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17265 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17266 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 17267 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17268 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17269 // CHECK11: omp.inner.for.end: 17270 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17271 // CHECK11: omp.loop.exit: 17272 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17273 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17274 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17275 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17276 // CHECK11: omp.precond.end: 17277 // CHECK11-NEXT: ret void 17278 // 17279 // 17280 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 17281 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17282 // CHECK11-NEXT: entry: 17283 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17284 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17285 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 17286 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 17287 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17288 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17289 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17290 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17291 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17292 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17293 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17294 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17295 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17296 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17297 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17298 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17299 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17300 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17301 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17302 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17303 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17304 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17305 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17306 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17307 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17308 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17309 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17310 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17311 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17312 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17313 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17314 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17315 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17316 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17317 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17318 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17319 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17320 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17321 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17322 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17323 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17324 // CHECK11: omp.precond.then: 17325 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17326 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17327 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 17328 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17329 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17330 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 17331 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 17332 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17333 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17334 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17335 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 17336 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17337 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17338 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17339 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 17340 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17341 // CHECK11: cond.true: 17342 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17343 // CHECK11-NEXT: br label [[COND_END:%.*]] 17344 // CHECK11: cond.false: 17345 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17346 // CHECK11-NEXT: br label [[COND_END]] 17347 // CHECK11: cond.end: 17348 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 17349 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17350 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17351 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 17352 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17353 // CHECK11: omp.inner.for.cond: 17354 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17355 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17356 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 17357 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17358 // CHECK11: omp.inner.for.body: 17359 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17360 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 17361 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17362 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 17363 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 17364 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 17365 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 17366 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 17367 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 17368 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 17369 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 17370 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 17371 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 17372 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 17373 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 17374 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 17375 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 17376 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17377 // CHECK11: omp.body.continue: 17378 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17379 // CHECK11: omp.inner.for.inc: 17380 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17381 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 17382 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 17383 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17384 // CHECK11: omp.inner.for.end: 17385 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17386 // CHECK11: omp.loop.exit: 17387 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17388 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 17389 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 17390 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17391 // CHECK11: omp.precond.end: 17392 // CHECK11-NEXT: ret void 17393 // 17394 // 17395 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 17396 // CHECK11-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 17397 // CHECK11-NEXT: entry: 17398 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 17399 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 17400 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 17401 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 17402 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 17403 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 17404 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 17405 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 17406 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 17407 // CHECK11-NEXT: ret void 17408 // 17409 // 17410 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 17411 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17412 // CHECK11-NEXT: entry: 17413 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17414 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17415 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17416 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17417 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17418 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17419 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17420 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17421 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17422 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17423 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17424 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17425 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17426 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17427 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17428 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17429 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17430 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17431 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17432 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17433 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17434 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17435 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17436 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17437 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17438 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17439 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17440 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17441 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17442 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17443 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17444 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17445 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17446 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17447 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17448 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17449 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17450 // CHECK11: omp.precond.then: 17451 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17452 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17453 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 17454 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17455 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17456 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17457 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 17458 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17459 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17460 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17461 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 17462 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17463 // CHECK11: cond.true: 17464 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17465 // CHECK11-NEXT: br label [[COND_END:%.*]] 17466 // CHECK11: cond.false: 17467 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17468 // CHECK11-NEXT: br label [[COND_END]] 17469 // CHECK11: cond.end: 17470 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 17471 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17472 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17473 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 17474 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17475 // CHECK11: omp.inner.for.cond: 17476 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17477 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17478 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 17479 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17480 // CHECK11: omp.inner.for.body: 17481 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17482 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17483 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 17484 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17485 // CHECK11: omp.inner.for.inc: 17486 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17487 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17488 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 17489 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17490 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17491 // CHECK11: omp.inner.for.end: 17492 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17493 // CHECK11: omp.loop.exit: 17494 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17495 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17496 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17497 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17498 // CHECK11: omp.precond.end: 17499 // CHECK11-NEXT: ret void 17500 // 17501 // 17502 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 17503 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17504 // CHECK11-NEXT: entry: 17505 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17506 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17507 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 17508 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 17509 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17510 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17511 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17512 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17513 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17514 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17515 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17516 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17517 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17518 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17519 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17520 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17521 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17522 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17523 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17524 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17525 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17526 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17527 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17528 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17529 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17530 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17531 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17532 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17533 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17534 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17535 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17536 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17537 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17538 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17539 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17540 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17541 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17542 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17543 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17544 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17545 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17546 // CHECK11: omp.precond.then: 17547 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17548 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17549 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 17550 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17551 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17552 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 17553 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 17554 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17555 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17556 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17557 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 17558 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17559 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17560 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17561 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 17562 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17563 // CHECK11: cond.true: 17564 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17565 // CHECK11-NEXT: br label [[COND_END:%.*]] 17566 // CHECK11: cond.false: 17567 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17568 // CHECK11-NEXT: br label [[COND_END]] 17569 // CHECK11: cond.end: 17570 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 17571 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17572 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17573 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 17574 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17575 // CHECK11: omp.inner.for.cond: 17576 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17577 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17578 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 17579 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17580 // CHECK11: omp.inner.for.body: 17581 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17582 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 17583 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17584 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 17585 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 17586 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 17587 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 17588 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 17589 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 17590 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 17591 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 17592 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 17593 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 17594 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 17595 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 17596 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 17597 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 17598 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17599 // CHECK11: omp.body.continue: 17600 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17601 // CHECK11: omp.inner.for.inc: 17602 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17603 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 17604 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 17605 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17606 // CHECK11: omp.inner.for.end: 17607 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17608 // CHECK11: omp.loop.exit: 17609 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17610 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 17611 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 17612 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17613 // CHECK11: omp.precond.end: 17614 // CHECK11-NEXT: ret void 17615 // 17616 // 17617 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 17618 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 17619 // CHECK11-NEXT: entry: 17620 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 17621 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 17622 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 17623 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 17624 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 17625 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 17626 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 17627 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 17628 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 17629 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 17630 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 17631 // CHECK11-NEXT: ret void 17632 // 17633 // 17634 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 17635 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17636 // CHECK11-NEXT: entry: 17637 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17638 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17639 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 17640 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17641 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17642 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17643 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17644 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17645 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17646 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17647 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17648 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17649 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17650 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17651 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17652 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17653 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17654 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17655 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17656 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 17657 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17658 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17659 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17660 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17661 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 17662 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17663 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 17664 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 17665 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 17666 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 17667 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 17668 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17669 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 17670 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17671 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17672 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17673 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17674 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17675 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 17676 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17677 // CHECK11: omp.precond.then: 17678 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17679 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17680 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 17681 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17682 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17683 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 17684 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17685 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 17686 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 17687 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17688 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17689 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 17690 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17691 // CHECK11: cond.true: 17692 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17693 // CHECK11-NEXT: br label [[COND_END:%.*]] 17694 // CHECK11: cond.false: 17695 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17696 // CHECK11-NEXT: br label [[COND_END]] 17697 // CHECK11: cond.end: 17698 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 17699 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17700 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17701 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 17702 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17703 // CHECK11: omp.inner.for.cond: 17704 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17705 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17706 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 17707 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 17708 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17709 // CHECK11: omp.inner.for.body: 17710 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17711 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17712 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 17713 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17714 // CHECK11: omp.inner.for.inc: 17715 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17716 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17717 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 17718 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 17719 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17720 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17721 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 17722 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 17723 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17724 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17725 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 17726 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 17727 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17728 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17729 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 17730 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 17731 // CHECK11: cond.true10: 17732 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17733 // CHECK11-NEXT: br label [[COND_END12:%.*]] 17734 // CHECK11: cond.false11: 17735 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17736 // CHECK11-NEXT: br label [[COND_END12]] 17737 // CHECK11: cond.end12: 17738 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 17739 // CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 17740 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17741 // CHECK11-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 17742 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17743 // CHECK11: omp.inner.for.end: 17744 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17745 // CHECK11: omp.loop.exit: 17746 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17747 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 17748 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 17749 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17750 // CHECK11: omp.precond.end: 17751 // CHECK11-NEXT: ret void 17752 // 17753 // 17754 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 17755 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17756 // CHECK11-NEXT: entry: 17757 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17758 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17759 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 17760 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 17761 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17762 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17763 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17764 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17765 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17766 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17767 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17768 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17769 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17770 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17771 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17772 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17773 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17774 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17775 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17776 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17777 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17778 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17779 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17780 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17781 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17782 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17783 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17784 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17785 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17786 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17787 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17788 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17789 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17790 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17791 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17792 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17793 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17794 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17795 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17796 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17797 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17798 // CHECK11: omp.precond.then: 17799 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17800 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17801 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 17802 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17803 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17804 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 17805 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 17806 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17807 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17808 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17809 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 17810 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17811 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17812 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17813 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 17814 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17815 // CHECK11: cond.true: 17816 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17817 // CHECK11-NEXT: br label [[COND_END:%.*]] 17818 // CHECK11: cond.false: 17819 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17820 // CHECK11-NEXT: br label [[COND_END]] 17821 // CHECK11: cond.end: 17822 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 17823 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17824 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17825 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 17826 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17827 // CHECK11: omp.inner.for.cond: 17828 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17829 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17830 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 17831 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17832 // CHECK11: omp.inner.for.body: 17833 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17834 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 17835 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17836 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 17837 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 17838 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 17839 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 17840 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 17841 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 17842 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 17843 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 17844 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 17845 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 17846 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 17847 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 17848 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 17849 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 17850 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17851 // CHECK11: omp.body.continue: 17852 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17853 // CHECK11: omp.inner.for.inc: 17854 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17855 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 17856 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 17857 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17858 // CHECK11: omp.inner.for.end: 17859 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17860 // CHECK11: omp.loop.exit: 17861 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17862 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 17863 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 17864 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17865 // CHECK11: omp.precond.end: 17866 // CHECK11-NEXT: ret void 17867 // 17868 // 17869 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 17870 // CHECK11-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 17871 // CHECK11-NEXT: entry: 17872 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 17873 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 17874 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 17875 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 17876 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 17877 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 17878 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 17879 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 17880 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 17881 // CHECK11-NEXT: ret void 17882 // 17883 // 17884 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 17885 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17886 // CHECK11-NEXT: entry: 17887 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17888 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17889 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17890 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17891 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17892 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17893 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17894 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17895 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17896 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17897 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17898 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17899 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17900 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17901 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17902 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17903 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17904 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17905 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 17906 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 17907 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 17908 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 17909 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 17910 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 17911 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 17912 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 17913 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 17914 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 17915 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17916 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 17917 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17918 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17919 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17920 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 17921 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17922 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 17923 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17924 // CHECK11: omp.precond.then: 17925 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17926 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17927 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 17928 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17929 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17930 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17931 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 17932 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17933 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17934 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17935 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 17936 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17937 // CHECK11: cond.true: 17938 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17939 // CHECK11-NEXT: br label [[COND_END:%.*]] 17940 // CHECK11: cond.false: 17941 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17942 // CHECK11-NEXT: br label [[COND_END]] 17943 // CHECK11: cond.end: 17944 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 17945 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17946 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17947 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 17948 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17949 // CHECK11: omp.inner.for.cond: 17950 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17951 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17952 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 17953 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17954 // CHECK11: omp.inner.for.body: 17955 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17956 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17957 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 17958 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17959 // CHECK11: omp.inner.for.inc: 17960 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17961 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17962 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 17963 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17964 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 17965 // CHECK11: omp.inner.for.end: 17966 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17967 // CHECK11: omp.loop.exit: 17968 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17969 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17970 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17971 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 17972 // CHECK11: omp.precond.end: 17973 // CHECK11-NEXT: ret void 17974 // 17975 // 17976 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11 17977 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 17978 // CHECK11-NEXT: entry: 17979 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17980 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17981 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 17982 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 17983 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 17984 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 17985 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 17986 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 17987 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17988 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 17989 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17990 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17991 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 17992 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17993 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17994 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17995 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17996 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 17997 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17998 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17999 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18000 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18001 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18002 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18003 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18004 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18005 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18006 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 18007 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 18008 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 18009 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 18010 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 18011 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18012 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 18013 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18014 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18015 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18016 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18017 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18018 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 18019 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18020 // CHECK11: omp.precond.then: 18021 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18022 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18023 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 18024 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18025 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18026 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 18027 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 18028 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18029 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18030 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18031 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 18032 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18033 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18034 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18035 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 18036 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18037 // CHECK11: cond.true: 18038 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18039 // CHECK11-NEXT: br label [[COND_END:%.*]] 18040 // CHECK11: cond.false: 18041 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18042 // CHECK11-NEXT: br label [[COND_END]] 18043 // CHECK11: cond.end: 18044 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 18045 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18046 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18047 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 18048 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18049 // CHECK11: omp.inner.for.cond: 18050 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18051 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18052 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 18053 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18054 // CHECK11: omp.inner.for.body: 18055 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18056 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 18057 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18058 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 18059 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 18060 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 18061 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 18062 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 18063 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 18064 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 18065 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 18066 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 18067 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 18068 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 18069 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 18070 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 18071 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 18072 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18073 // CHECK11: omp.body.continue: 18074 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18075 // CHECK11: omp.inner.for.inc: 18076 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18077 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 18078 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 18079 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 18080 // CHECK11: omp.inner.for.end: 18081 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18082 // CHECK11: omp.loop.exit: 18083 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18084 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 18085 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 18086 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18087 // CHECK11: omp.precond.end: 18088 // CHECK11-NEXT: ret void 18089 // 18090 // 18091 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 18092 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 18093 // CHECK11-NEXT: entry: 18094 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 18095 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 18096 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 18097 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 18098 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 18099 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 18100 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 18101 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 18102 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 18103 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 18104 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 18105 // CHECK11-NEXT: ret void 18106 // 18107 // 18108 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14 18109 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 18110 // CHECK11-NEXT: entry: 18111 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18112 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18113 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 18114 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18115 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18116 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18117 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18118 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18119 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18120 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18121 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18122 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18123 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18124 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18125 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18126 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18127 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18128 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 18129 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 18130 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18131 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18132 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 18133 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18134 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18135 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18136 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18137 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 18138 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18139 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 18140 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 18141 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 18142 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 18143 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 18144 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 18145 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18146 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18147 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 18148 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18149 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18150 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18151 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18152 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18153 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 18154 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18155 // CHECK11: omp.precond.then: 18156 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18157 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18158 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 18159 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18160 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18161 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18162 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 18163 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18164 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18165 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18166 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 18167 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18168 // CHECK11: cond.true: 18169 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18170 // CHECK11-NEXT: br label [[COND_END:%.*]] 18171 // CHECK11: cond.false: 18172 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18173 // CHECK11-NEXT: br label [[COND_END]] 18174 // CHECK11: cond.end: 18175 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 18176 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18177 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18178 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 18179 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18180 // CHECK11: omp.inner.for.cond: 18181 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18182 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18183 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 18184 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18185 // CHECK11: omp.inner.for.body: 18186 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18187 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18188 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18189 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 18190 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 18191 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 18192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18193 // CHECK11: omp.inner.for.inc: 18194 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18195 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18196 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 18197 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18198 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 18199 // CHECK11: omp.inner.for.end: 18200 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18201 // CHECK11: omp.loop.exit: 18202 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18203 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 18204 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 18205 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18206 // CHECK11: omp.precond.end: 18207 // CHECK11-NEXT: ret void 18208 // 18209 // 18210 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15 18211 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 18212 // CHECK11-NEXT: entry: 18213 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18214 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18215 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 18216 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 18217 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18218 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18219 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18220 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18221 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 18222 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18223 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18224 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18225 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18226 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18227 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18228 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18229 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18230 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18231 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 18232 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18233 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18234 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18235 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18236 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18237 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18238 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18239 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18240 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18241 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18242 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 18243 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 18244 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 18245 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 18246 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18247 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18248 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 18249 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18250 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18251 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18252 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18253 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18254 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 18255 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18256 // CHECK11: omp.precond.then: 18257 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18258 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18259 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 18260 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18261 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18262 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 18263 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 18264 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18265 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18266 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18267 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18268 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 18269 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 18270 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18271 // CHECK11: omp.dispatch.cond: 18272 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18273 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18274 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 18275 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18276 // CHECK11: cond.true: 18277 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18278 // CHECK11-NEXT: br label [[COND_END:%.*]] 18279 // CHECK11: cond.false: 18280 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18281 // CHECK11-NEXT: br label [[COND_END]] 18282 // CHECK11: cond.end: 18283 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 18284 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18285 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18286 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 18287 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18288 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18289 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 18290 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18291 // CHECK11: omp.dispatch.body: 18292 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18293 // CHECK11: omp.inner.for.cond: 18294 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18295 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18296 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 18297 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18298 // CHECK11: omp.inner.for.body: 18299 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18300 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 18301 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18302 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 18303 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 18304 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 18305 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 18306 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 18307 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 18308 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 18309 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 18310 // CHECK11-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 18311 // CHECK11-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 18312 // CHECK11-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 18313 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 18314 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 18315 // CHECK11-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 18316 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18317 // CHECK11: omp.body.continue: 18318 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18319 // CHECK11: omp.inner.for.inc: 18320 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18321 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 18322 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 18323 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 18324 // CHECK11: omp.inner.for.end: 18325 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18326 // CHECK11: omp.dispatch.inc: 18327 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18328 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18329 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 18330 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 18331 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18332 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18333 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 18334 // CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 18335 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 18336 // CHECK11: omp.dispatch.end: 18337 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18338 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 18339 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 18340 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18341 // CHECK11: omp.precond.end: 18342 // CHECK11-NEXT: ret void 18343 // 18344 // 18345 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 18346 // CHECK11-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 18347 // CHECK11-NEXT: entry: 18348 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 18349 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 18350 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 18351 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 18352 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 18353 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 18354 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 18355 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 18356 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 18357 // CHECK11-NEXT: ret void 18358 // 18359 // 18360 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18 18361 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 18362 // CHECK11-NEXT: entry: 18363 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18364 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18365 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18366 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18367 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18368 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18369 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18370 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18371 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18372 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18373 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18374 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18375 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18376 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18377 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18378 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 18379 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18380 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18381 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18382 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18383 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18384 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18385 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18386 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 18387 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 18388 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 18389 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 18390 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 18391 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18392 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 18393 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18394 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18395 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18396 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18397 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18398 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 18399 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18400 // CHECK11: omp.precond.then: 18401 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18402 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18403 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 18404 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18405 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18406 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18407 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 18408 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18409 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18410 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18411 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 18412 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18413 // CHECK11: cond.true: 18414 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18415 // CHECK11-NEXT: br label [[COND_END:%.*]] 18416 // CHECK11: cond.false: 18417 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18418 // CHECK11-NEXT: br label [[COND_END]] 18419 // CHECK11: cond.end: 18420 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 18421 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18422 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18423 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 18424 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18425 // CHECK11: omp.inner.for.cond: 18426 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18427 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18428 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 18429 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18430 // CHECK11: omp.inner.for.body: 18431 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18432 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18433 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 18434 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18435 // CHECK11: omp.inner.for.inc: 18436 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18437 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18438 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 18439 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18440 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 18441 // CHECK11: omp.inner.for.end: 18442 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18443 // CHECK11: omp.loop.exit: 18444 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18445 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 18446 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 18447 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18448 // CHECK11: omp.precond.end: 18449 // CHECK11-NEXT: ret void 18450 // 18451 // 18452 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..19 18453 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 18454 // CHECK11-NEXT: entry: 18455 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18456 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18457 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 18458 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 18459 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18460 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18461 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18462 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18463 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18464 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18465 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18466 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18467 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18468 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18469 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18470 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18471 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18472 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 18473 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18474 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18475 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18476 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18477 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18478 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18479 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18480 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18481 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18482 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 18483 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 18484 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 18485 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 18486 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 18487 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18488 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 18489 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18490 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18491 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18492 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18493 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18494 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 18495 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18496 // CHECK11: omp.precond.then: 18497 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18498 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18499 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 18500 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18501 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18502 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 18503 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 18504 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18505 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18506 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18507 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18508 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18509 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 18510 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 18511 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18512 // CHECK11: omp.dispatch.cond: 18513 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18514 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 18515 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18516 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 18517 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18518 // CHECK11: omp.dispatch.body: 18519 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18520 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 18521 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18522 // CHECK11: omp.inner.for.cond: 18523 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 18524 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 18525 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 18526 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18527 // CHECK11: omp.inner.for.body: 18528 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 18529 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 18530 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18531 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !20 18532 // CHECK11-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !20 18533 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 18534 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 18535 // CHECK11-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !20 18536 // CHECK11-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !20 18537 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 18538 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 18539 // CHECK11-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !20 18540 // CHECK11-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 18541 // CHECK11-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !20 18542 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 18543 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 18544 // CHECK11-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !20 18545 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18546 // CHECK11: omp.body.continue: 18547 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18548 // CHECK11: omp.inner.for.inc: 18549 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 18550 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 18551 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 18552 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 18553 // CHECK11: omp.inner.for.end: 18554 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18555 // CHECK11: omp.dispatch.inc: 18556 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 18557 // CHECK11: omp.dispatch.end: 18558 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18559 // CHECK11: omp.precond.end: 18560 // CHECK11-NEXT: ret void 18561 // 18562 // 18563 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 18564 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 18565 // CHECK11-NEXT: entry: 18566 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 18567 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 18568 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 18569 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 18570 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 18571 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 18572 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 18573 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 18574 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 18575 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 18576 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 18577 // CHECK11-NEXT: ret void 18578 // 18579 // 18580 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..22 18581 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 18582 // CHECK11-NEXT: entry: 18583 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18584 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18585 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 18586 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18587 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18588 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18589 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18590 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18591 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18592 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18593 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18594 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18595 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18596 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18597 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18598 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18599 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18600 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 18601 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 18602 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18603 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18604 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 18605 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18606 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18607 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18608 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18609 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 18610 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18611 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 18612 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 18613 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 18614 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 18615 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 18616 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 18617 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18618 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18619 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 18620 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18621 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18622 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18623 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18624 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18625 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 18626 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18627 // CHECK11: omp.precond.then: 18628 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18629 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18630 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 18631 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18632 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18633 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18634 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 18635 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18636 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18637 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18638 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 18639 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18640 // CHECK11: cond.true: 18641 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18642 // CHECK11-NEXT: br label [[COND_END:%.*]] 18643 // CHECK11: cond.false: 18644 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18645 // CHECK11-NEXT: br label [[COND_END]] 18646 // CHECK11: cond.end: 18647 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 18648 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18649 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18650 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 18651 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18652 // CHECK11: omp.inner.for.cond: 18653 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18654 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18655 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 18656 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18657 // CHECK11: omp.inner.for.body: 18658 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18659 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18660 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18661 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 18662 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 18663 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 18664 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18665 // CHECK11: omp.inner.for.inc: 18666 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18667 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18668 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 18669 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18670 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 18671 // CHECK11: omp.inner.for.end: 18672 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18673 // CHECK11: omp.loop.exit: 18674 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18675 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 18676 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 18677 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18678 // CHECK11: omp.precond.end: 18679 // CHECK11-NEXT: ret void 18680 // 18681 // 18682 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..23 18683 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 18684 // CHECK11-NEXT: entry: 18685 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 18686 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 18687 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 18688 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 18689 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 18690 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 18691 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 18692 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 18693 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 18694 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18695 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18696 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18697 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18698 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 18699 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18700 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18701 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18702 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18703 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 18704 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 18705 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 18706 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18707 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18708 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 18709 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 18710 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 18711 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 18712 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18713 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 18714 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 18715 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 18716 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 18717 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 18718 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18719 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18720 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 18721 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18722 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18723 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18724 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 18725 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18726 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 18727 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18728 // CHECK11: omp.precond.then: 18729 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18730 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18731 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 18732 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 18733 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 18734 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 18735 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 18736 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18737 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18738 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 18739 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18740 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18741 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18742 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 18743 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 18744 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18745 // CHECK11: omp.dispatch.cond: 18746 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 18747 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 18748 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18749 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 18750 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18751 // CHECK11: omp.dispatch.body: 18752 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18753 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 18754 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18755 // CHECK11: omp.inner.for.cond: 18756 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 18757 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 18758 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 18759 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18760 // CHECK11: omp.inner.for.body: 18761 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 18762 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 18763 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18764 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !23 18765 // CHECK11-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !23 18766 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 18767 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 18768 // CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !23 18769 // CHECK11-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !23 18770 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 18771 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 18772 // CHECK11-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !23 18773 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 18774 // CHECK11-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !23 18775 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 18776 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 18777 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !23 18778 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18779 // CHECK11: omp.body.continue: 18780 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18781 // CHECK11: omp.inner.for.inc: 18782 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 18783 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 18784 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 18785 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 18786 // CHECK11: omp.inner.for.end: 18787 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18788 // CHECK11: omp.dispatch.inc: 18789 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 18790 // CHECK11: omp.dispatch.end: 18791 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 18792 // CHECK11: omp.precond.end: 18793 // CHECK11-NEXT: ret void 18794 // 18795 // 18796 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 18797 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] comdat { 18798 // CHECK11-NEXT: entry: 18799 // CHECK11-NEXT: [[A:%.*]] = alloca i32*, align 4 18800 // CHECK11-NEXT: [[B:%.*]] = alloca i32*, align 4 18801 // CHECK11-NEXT: [[C:%.*]] = alloca i32*, align 4 18802 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 18803 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 18804 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 18805 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 18806 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 18807 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 18808 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 18809 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18810 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18811 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 18812 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 18813 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 18814 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 18815 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 18816 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 18817 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 18818 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 18819 // CHECK11-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 18820 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 18821 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 18822 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 18823 // CHECK11-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 18824 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 18825 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 18826 // CHECK11-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 18827 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 18828 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 18829 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 18830 // CHECK11-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 18831 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 18832 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 18833 // CHECK11-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 18834 // CHECK11-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 18835 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 18836 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 18837 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 18838 // CHECK11-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 18839 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 18840 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 18841 // CHECK11-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 18842 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 18843 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 18844 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 18845 // CHECK11-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 18846 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 18847 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 18848 // CHECK11-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 18849 // CHECK11-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 18850 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 18851 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 18852 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 18853 // CHECK11-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 18854 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 18855 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 18856 // CHECK11-NEXT: store i32 10000, i32* [[N]], align 4 18857 // CHECK11-NEXT: store i32 100, i32* [[CH]], align 4 18858 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 18859 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 18860 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 18861 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 4 18862 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 4 18863 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 4 18864 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18865 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 18866 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 18867 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18868 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 18869 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 18870 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 18871 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 18872 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 18873 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 18874 // CHECK11-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 4 18875 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 18876 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 18877 // CHECK11-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 4 18878 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 18879 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 18880 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 18881 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 18882 // CHECK11-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 4 18883 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 18884 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 18885 // CHECK11-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 4 18886 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 18887 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 18888 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 18889 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 18890 // CHECK11-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 4 18891 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 18892 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 18893 // CHECK11-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 4 18894 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 18895 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 18896 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18897 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18898 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 18899 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 18900 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18901 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 18902 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18903 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18904 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18905 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18906 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 18907 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 18908 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 18909 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18910 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 18911 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 18912 // CHECK11: omp_offload.failed: 18913 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i32 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 18914 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 18915 // CHECK11: omp_offload.cont: 18916 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 18917 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 18918 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 18919 // CHECK11-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 4 18920 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 4 18921 // CHECK11-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 4 18922 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 18923 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 18924 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 18925 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 18926 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 18927 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 18928 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 18929 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4 18930 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 18931 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 18932 // CHECK11-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 4 18933 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 18934 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 18935 // CHECK11-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 4 18936 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 18937 // CHECK11-NEXT: store i8* null, i8** [[TMP47]], align 4 18938 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 18939 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 18940 // CHECK11-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 4 18941 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 18942 // CHECK11-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 18943 // CHECK11-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 4 18944 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 18945 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 18946 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 18947 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 18948 // CHECK11-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 4 18949 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 18950 // CHECK11-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 18951 // CHECK11-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 4 18952 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 18953 // CHECK11-NEXT: store i8* null, i8** [[TMP57]], align 4 18954 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 18955 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 18956 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 18957 // CHECK11-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 18958 // CHECK11-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 18959 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 18960 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 18961 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 18962 // CHECK11-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 18963 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 18964 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 18965 // CHECK11-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 18966 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 18967 // CHECK11-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18968 // CHECK11-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 18969 // CHECK11-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 18970 // CHECK11: omp_offload.failed14: 18971 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i32 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 18972 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT15]] 18973 // CHECK11: omp_offload.cont15: 18974 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 18975 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 18976 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 18977 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 18978 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 18979 // CHECK11-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 18980 // CHECK11-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 4 18981 // CHECK11-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 4 18982 // CHECK11-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 4 18983 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 18984 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 18985 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 18986 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 18987 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 18988 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 18989 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 18990 // CHECK11-NEXT: store i8* null, i8** [[TMP77]], align 4 18991 // CHECK11-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 18992 // CHECK11-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 18993 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 18994 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 18995 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 18996 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 18997 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 18998 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 18999 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 19000 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 19001 // CHECK11-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 4 19002 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 19003 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 19004 // CHECK11-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 4 19005 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 19006 // CHECK11-NEXT: store i8* null, i8** [[TMP87]], align 4 19007 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 19008 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 19009 // CHECK11-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 4 19010 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 19011 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 19012 // CHECK11-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 4 19013 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 19014 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4 19015 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 19016 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 19017 // CHECK11-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 4 19018 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 19019 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 19020 // CHECK11-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 4 19021 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 19022 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4 19023 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 19024 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 19025 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 19026 // CHECK11-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 19027 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 19028 // CHECK11-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 19029 // CHECK11-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 19030 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 19031 // CHECK11-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 19032 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 19033 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 19034 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 19035 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 19036 // CHECK11-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19037 // CHECK11-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 19038 // CHECK11-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 19039 // CHECK11: omp_offload.failed27: 19040 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i32 [[TMP67]], i32 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 19041 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT28]] 19042 // CHECK11: omp_offload.cont28: 19043 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 19044 // CHECK11-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 19045 // CHECK11-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 19046 // CHECK11-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 4 19047 // CHECK11-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 4 19048 // CHECK11-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 4 19049 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 19050 // CHECK11-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 19051 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 19052 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 19053 // CHECK11-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 19054 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 19055 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 19056 // CHECK11-NEXT: store i8* null, i8** [[TMP115]], align 4 19057 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 19058 // CHECK11-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 19059 // CHECK11-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 4 19060 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 19061 // CHECK11-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 19062 // CHECK11-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 4 19063 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 19064 // CHECK11-NEXT: store i8* null, i8** [[TMP120]], align 4 19065 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 19066 // CHECK11-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 19067 // CHECK11-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 4 19068 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 19069 // CHECK11-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 19070 // CHECK11-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 4 19071 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 19072 // CHECK11-NEXT: store i8* null, i8** [[TMP125]], align 4 19073 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 19074 // CHECK11-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 19075 // CHECK11-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 4 19076 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 19077 // CHECK11-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 19078 // CHECK11-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 4 19079 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 19080 // CHECK11-NEXT: store i8* null, i8** [[TMP130]], align 4 19081 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 19082 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 19083 // CHECK11-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 19084 // CHECK11-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 19085 // CHECK11-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 19086 // CHECK11-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 19087 // CHECK11-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 19088 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 19089 // CHECK11-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 19090 // CHECK11-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 19091 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 19092 // CHECK11-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 19093 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 19094 // CHECK11-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19095 // CHECK11-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 19096 // CHECK11-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 19097 // CHECK11: omp_offload.failed40: 19098 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i32 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 19099 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT41]] 19100 // CHECK11: omp_offload.cont41: 19101 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 19102 // CHECK11-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 19103 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 19104 // CHECK11-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 19105 // CHECK11-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 19106 // CHECK11-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 19107 // CHECK11-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 4 19108 // CHECK11-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 4 19109 // CHECK11-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 4 19110 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 19111 // CHECK11-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 19112 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 19113 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 19114 // CHECK11-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 19115 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 19116 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 19117 // CHECK11-NEXT: store i8* null, i8** [[TMP150]], align 4 19118 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 19119 // CHECK11-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 19120 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 19121 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 19122 // CHECK11-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 19123 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 19124 // CHECK11-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 19125 // CHECK11-NEXT: store i8* null, i8** [[TMP155]], align 4 19126 // CHECK11-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 19127 // CHECK11-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 19128 // CHECK11-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 4 19129 // CHECK11-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 19130 // CHECK11-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 19131 // CHECK11-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 4 19132 // CHECK11-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 19133 // CHECK11-NEXT: store i8* null, i8** [[TMP160]], align 4 19134 // CHECK11-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 19135 // CHECK11-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 19136 // CHECK11-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 4 19137 // CHECK11-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 19138 // CHECK11-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 19139 // CHECK11-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 4 19140 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 19141 // CHECK11-NEXT: store i8* null, i8** [[TMP165]], align 4 19142 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 19143 // CHECK11-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 19144 // CHECK11-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 4 19145 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 19146 // CHECK11-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 19147 // CHECK11-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 4 19148 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 19149 // CHECK11-NEXT: store i8* null, i8** [[TMP170]], align 4 19150 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 19151 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 19152 // CHECK11-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 19153 // CHECK11-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 19154 // CHECK11-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 19155 // CHECK11-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 19156 // CHECK11-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 19157 // CHECK11-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 19158 // CHECK11-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 19159 // CHECK11-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 19160 // CHECK11-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 19161 // CHECK11-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 19162 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 19163 // CHECK11-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19164 // CHECK11-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 19165 // CHECK11-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 19166 // CHECK11: omp_offload.failed54: 19167 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i32 [[TMP140]], i32 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 19168 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT55]] 19169 // CHECK11: omp_offload.cont55: 19170 // CHECK11-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 19171 // CHECK11-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 19172 // CHECK11-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 19173 // CHECK11-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 4 19174 // CHECK11-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 4 19175 // CHECK11-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 4 19176 // CHECK11-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 19177 // CHECK11-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 19178 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 19179 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 19180 // CHECK11-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 19181 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 19182 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 19183 // CHECK11-NEXT: store i8* null, i8** [[TMP188]], align 4 19184 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 19185 // CHECK11-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 19186 // CHECK11-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 4 19187 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 19188 // CHECK11-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 19189 // CHECK11-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 4 19190 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 19191 // CHECK11-NEXT: store i8* null, i8** [[TMP193]], align 4 19192 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 19193 // CHECK11-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 19194 // CHECK11-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 4 19195 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 19196 // CHECK11-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 19197 // CHECK11-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 4 19198 // CHECK11-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 19199 // CHECK11-NEXT: store i8* null, i8** [[TMP198]], align 4 19200 // CHECK11-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 19201 // CHECK11-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 19202 // CHECK11-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 4 19203 // CHECK11-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 19204 // CHECK11-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 19205 // CHECK11-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 4 19206 // CHECK11-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 19207 // CHECK11-NEXT: store i8* null, i8** [[TMP203]], align 4 19208 // CHECK11-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 19209 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 19210 // CHECK11-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 19211 // CHECK11-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 19212 // CHECK11-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 19213 // CHECK11-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 19214 // CHECK11-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 19215 // CHECK11-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 19216 // CHECK11-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 19217 // CHECK11-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 19218 // CHECK11-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 19219 // CHECK11-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 19220 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 19221 // CHECK11-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19222 // CHECK11-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 19223 // CHECK11-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 19224 // CHECK11: omp_offload.failed67: 19225 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i32 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 19226 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT68]] 19227 // CHECK11: omp_offload.cont68: 19228 // CHECK11-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 19229 // CHECK11-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 19230 // CHECK11-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 19231 // CHECK11-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 19232 // CHECK11-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 19233 // CHECK11-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 19234 // CHECK11-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 4 19235 // CHECK11-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 4 19236 // CHECK11-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 4 19237 // CHECK11-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 19238 // CHECK11-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 19239 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 19240 // CHECK11-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 19241 // CHECK11-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 19242 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 19243 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 19244 // CHECK11-NEXT: store i8* null, i8** [[TMP223]], align 4 19245 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 19246 // CHECK11-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 19247 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 19248 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 19249 // CHECK11-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 19250 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 19251 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 19252 // CHECK11-NEXT: store i8* null, i8** [[TMP228]], align 4 19253 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 19254 // CHECK11-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 19255 // CHECK11-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 4 19256 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 19257 // CHECK11-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 19258 // CHECK11-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 4 19259 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 19260 // CHECK11-NEXT: store i8* null, i8** [[TMP233]], align 4 19261 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 19262 // CHECK11-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 19263 // CHECK11-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 4 19264 // CHECK11-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 19265 // CHECK11-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 19266 // CHECK11-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 4 19267 // CHECK11-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 19268 // CHECK11-NEXT: store i8* null, i8** [[TMP238]], align 4 19269 // CHECK11-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 19270 // CHECK11-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 19271 // CHECK11-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 4 19272 // CHECK11-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 19273 // CHECK11-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 19274 // CHECK11-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 4 19275 // CHECK11-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 19276 // CHECK11-NEXT: store i8* null, i8** [[TMP243]], align 4 19277 // CHECK11-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 19278 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 19279 // CHECK11-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 19280 // CHECK11-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 19281 // CHECK11-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 19282 // CHECK11-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 19283 // CHECK11-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 19284 // CHECK11-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 19285 // CHECK11-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 19286 // CHECK11-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 19287 // CHECK11-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 19288 // CHECK11-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 19289 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 19290 // CHECK11-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19291 // CHECK11-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 19292 // CHECK11-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 19293 // CHECK11: omp_offload.failed81: 19294 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i32 [[TMP213]], i32 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 19295 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT82]] 19296 // CHECK11: omp_offload.cont82: 19297 // CHECK11-NEXT: ret i32 0 19298 // 19299 // 19300 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 19301 // CHECK11-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 19302 // CHECK11-NEXT: entry: 19303 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 19304 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 19305 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 19306 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 19307 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 19308 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 19309 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 19310 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 19311 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 19312 // CHECK11-NEXT: ret void 19313 // 19314 // 19315 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..26 19316 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19317 // CHECK11-NEXT: entry: 19318 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19319 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19320 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19321 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19322 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19323 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19324 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19325 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19326 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19327 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19328 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19329 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19330 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19331 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19332 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19333 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19334 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19335 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19336 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19337 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19338 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19339 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19340 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19341 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19342 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19343 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19344 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 19345 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 19346 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19347 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 19348 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19349 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19350 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19351 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19352 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19353 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 19354 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19355 // CHECK11: omp.precond.then: 19356 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19357 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19358 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 19359 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19360 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19361 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19362 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 19363 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19364 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19365 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19366 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 19367 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19368 // CHECK11: cond.true: 19369 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19370 // CHECK11-NEXT: br label [[COND_END:%.*]] 19371 // CHECK11: cond.false: 19372 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19373 // CHECK11-NEXT: br label [[COND_END]] 19374 // CHECK11: cond.end: 19375 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 19376 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19377 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19378 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 19379 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19380 // CHECK11: omp.inner.for.cond: 19381 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19382 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19383 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 19384 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19385 // CHECK11: omp.inner.for.body: 19386 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19387 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19388 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 19389 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19390 // CHECK11: omp.inner.for.inc: 19391 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19392 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19393 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 19394 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19395 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 19396 // CHECK11: omp.inner.for.end: 19397 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19398 // CHECK11: omp.loop.exit: 19399 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19400 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 19401 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 19402 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 19403 // CHECK11: omp.precond.end: 19404 // CHECK11-NEXT: ret void 19405 // 19406 // 19407 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..27 19408 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19409 // CHECK11-NEXT: entry: 19410 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19411 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19412 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 19413 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 19414 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19415 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19416 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19417 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19418 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19419 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19420 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19421 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19422 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19423 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19424 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19425 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19426 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19427 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19428 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19429 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19430 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19431 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19432 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19433 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19434 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19435 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19436 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19437 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19438 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19439 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19440 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 19441 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 19442 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19443 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 19444 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19445 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19446 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19447 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19448 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19449 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 19450 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19451 // CHECK11: omp.precond.then: 19452 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19453 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19454 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 19455 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19456 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19457 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 19458 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 19459 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19460 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19461 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19462 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 19463 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19464 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19465 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19466 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 19467 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19468 // CHECK11: cond.true: 19469 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19470 // CHECK11-NEXT: br label [[COND_END:%.*]] 19471 // CHECK11: cond.false: 19472 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19473 // CHECK11-NEXT: br label [[COND_END]] 19474 // CHECK11: cond.end: 19475 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 19476 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19477 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19478 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 19479 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19480 // CHECK11: omp.inner.for.cond: 19481 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19482 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19483 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 19484 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19485 // CHECK11: omp.inner.for.body: 19486 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19487 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 19488 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19489 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 19490 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19491 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 19492 // CHECK11-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 19493 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 19494 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 19495 // CHECK11: .cancel.exit: 19496 // CHECK11-NEXT: br label [[CANCEL_EXIT:%.*]] 19497 // CHECK11: .cancel.continue: 19498 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 4 19499 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4 19500 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 19501 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19502 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 4 19503 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4 19504 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 19505 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 19506 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 19507 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 4 19508 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[I3]], align 4 19509 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i32 [[TMP31]] 19510 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 19511 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19512 // CHECK11: omp.body.continue: 19513 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19514 // CHECK11: omp.inner.for.inc: 19515 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19516 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 19517 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 19518 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 19519 // CHECK11: omp.inner.for.end: 19520 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19521 // CHECK11: omp.loop.exit: 19522 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19523 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 19524 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 19525 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 19526 // CHECK11: cancel.exit: 19527 // CHECK11-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19528 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 19529 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 19530 // CHECK11-NEXT: br label [[CANCEL_CONT:%.*]] 19531 // CHECK11: omp.precond.end: 19532 // CHECK11-NEXT: br label [[CANCEL_CONT]] 19533 // CHECK11: cancel.cont: 19534 // CHECK11-NEXT: ret void 19535 // 19536 // 19537 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 19538 // CHECK11-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 19539 // CHECK11-NEXT: entry: 19540 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 19541 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 19542 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 19543 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 19544 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 19545 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 19546 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 19547 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 19548 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 19549 // CHECK11-NEXT: ret void 19550 // 19551 // 19552 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..30 19553 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19554 // CHECK11-NEXT: entry: 19555 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19556 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19557 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19558 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19559 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19560 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19561 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19562 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19563 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19564 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19565 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19566 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19567 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19568 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19569 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19570 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19571 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19572 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19573 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19574 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19575 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19576 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19577 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19578 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19579 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19580 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19581 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 19582 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 19583 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19584 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 19585 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19586 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19587 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19588 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19589 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19590 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 19591 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19592 // CHECK11: omp.precond.then: 19593 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19594 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19595 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 19596 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19597 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19598 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19599 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 19600 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19601 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19602 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19603 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 19604 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19605 // CHECK11: cond.true: 19606 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19607 // CHECK11-NEXT: br label [[COND_END:%.*]] 19608 // CHECK11: cond.false: 19609 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19610 // CHECK11-NEXT: br label [[COND_END]] 19611 // CHECK11: cond.end: 19612 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 19613 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19614 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19615 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 19616 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19617 // CHECK11: omp.inner.for.cond: 19618 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19619 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19620 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 19621 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19622 // CHECK11: omp.inner.for.body: 19623 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19624 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19625 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 19626 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19627 // CHECK11: omp.inner.for.inc: 19628 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19629 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19630 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 19631 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19632 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 19633 // CHECK11: omp.inner.for.end: 19634 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19635 // CHECK11: omp.loop.exit: 19636 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19637 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 19638 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 19639 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 19640 // CHECK11: omp.precond.end: 19641 // CHECK11-NEXT: ret void 19642 // 19643 // 19644 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..31 19645 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19646 // CHECK11-NEXT: entry: 19647 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19648 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19649 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 19650 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 19651 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19652 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19653 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19654 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19655 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19656 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19657 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19658 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19659 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19660 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19661 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19662 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19663 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19664 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19665 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19666 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19667 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19668 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19669 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19670 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19671 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19672 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19673 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19674 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19675 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19676 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19677 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 19678 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 19679 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19680 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 19681 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19682 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19683 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19684 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19685 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19686 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 19687 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19688 // CHECK11: omp.precond.then: 19689 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19690 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19691 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 19692 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19693 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19694 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 19695 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 19696 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19697 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19698 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19699 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 19700 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19701 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19702 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19703 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 19704 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19705 // CHECK11: cond.true: 19706 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19707 // CHECK11-NEXT: br label [[COND_END:%.*]] 19708 // CHECK11: cond.false: 19709 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19710 // CHECK11-NEXT: br label [[COND_END]] 19711 // CHECK11: cond.end: 19712 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 19713 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19714 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19715 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 19716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19717 // CHECK11: omp.inner.for.cond: 19718 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19719 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19720 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 19721 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19722 // CHECK11: omp.inner.for.body: 19723 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19724 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 19725 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19726 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 19727 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 19728 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 19729 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 19730 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19731 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 19732 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 19733 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 19734 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 19735 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 19736 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 19737 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 19738 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 19739 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 19740 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19741 // CHECK11: omp.body.continue: 19742 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19743 // CHECK11: omp.inner.for.inc: 19744 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19745 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 19746 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 19747 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 19748 // CHECK11: omp.inner.for.end: 19749 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19750 // CHECK11: omp.loop.exit: 19751 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19752 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 19753 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 19754 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 19755 // CHECK11: omp.precond.end: 19756 // CHECK11-NEXT: ret void 19757 // 19758 // 19759 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 19760 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 19761 // CHECK11-NEXT: entry: 19762 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 19763 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 19764 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 19765 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 19766 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 19767 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 19768 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 19769 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 19770 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 19771 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 19772 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 19773 // CHECK11-NEXT: ret void 19774 // 19775 // 19776 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..34 19777 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19778 // CHECK11-NEXT: entry: 19779 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19780 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19781 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 19782 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19783 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19784 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19785 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19786 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19787 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19788 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19789 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19790 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19791 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19792 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19793 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19794 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19795 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19796 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19797 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19798 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 19799 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19800 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19801 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19802 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19803 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 19804 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19805 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19806 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19807 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19808 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 19809 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 19810 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19811 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 19812 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19813 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19814 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19815 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19816 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19817 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 19818 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19819 // CHECK11: omp.precond.then: 19820 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19821 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19822 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 19823 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19824 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19825 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 19826 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19827 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 19828 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 19829 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19830 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19831 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 19832 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19833 // CHECK11: cond.true: 19834 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19835 // CHECK11-NEXT: br label [[COND_END:%.*]] 19836 // CHECK11: cond.false: 19837 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19838 // CHECK11-NEXT: br label [[COND_END]] 19839 // CHECK11: cond.end: 19840 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 19841 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19842 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19843 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 19844 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19845 // CHECK11: omp.inner.for.cond: 19846 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19847 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19848 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 19849 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 19850 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19851 // CHECK11: omp.inner.for.body: 19852 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19853 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19854 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 19855 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19856 // CHECK11: omp.inner.for.inc: 19857 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19858 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19859 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 19860 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 19861 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19862 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19863 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 19864 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 19865 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19866 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19867 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 19868 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 19869 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19870 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19871 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 19872 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 19873 // CHECK11: cond.true10: 19874 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19875 // CHECK11-NEXT: br label [[COND_END12:%.*]] 19876 // CHECK11: cond.false11: 19877 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19878 // CHECK11-NEXT: br label [[COND_END12]] 19879 // CHECK11: cond.end12: 19880 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 19881 // CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 19882 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19883 // CHECK11-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 19884 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 19885 // CHECK11: omp.inner.for.end: 19886 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19887 // CHECK11: omp.loop.exit: 19888 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19889 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 19890 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 19891 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 19892 // CHECK11: omp.precond.end: 19893 // CHECK11-NEXT: ret void 19894 // 19895 // 19896 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..35 19897 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 19898 // CHECK11-NEXT: entry: 19899 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 19900 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 19901 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 19902 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 19903 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 19904 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 19905 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 19906 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 19907 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19908 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 19909 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19910 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19911 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 19912 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19913 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19914 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19915 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19916 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 19917 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 19918 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 19919 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19920 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19921 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 19922 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 19923 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 19924 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 19925 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 19926 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 19927 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 19928 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 19929 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 19930 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 19931 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19932 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 19933 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19934 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19935 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19936 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 19937 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19938 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 19939 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19940 // CHECK11: omp.precond.then: 19941 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19942 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19943 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 19944 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 19945 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 19946 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 19947 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 19948 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19949 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19950 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 19951 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 19952 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19953 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19954 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19955 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 19956 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19957 // CHECK11: cond.true: 19958 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19959 // CHECK11-NEXT: br label [[COND_END:%.*]] 19960 // CHECK11: cond.false: 19961 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19962 // CHECK11-NEXT: br label [[COND_END]] 19963 // CHECK11: cond.end: 19964 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 19965 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19966 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19967 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 19968 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19969 // CHECK11: omp.inner.for.cond: 19970 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19971 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19972 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 19973 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19974 // CHECK11: omp.inner.for.body: 19975 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19976 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 19977 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19978 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 19979 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 19980 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 19981 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 19982 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 19983 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 19984 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 19985 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 19986 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 19987 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 19988 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 19989 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 19990 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 19991 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 19992 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19993 // CHECK11: omp.body.continue: 19994 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19995 // CHECK11: omp.inner.for.inc: 19996 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19997 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 19998 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 19999 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20000 // CHECK11: omp.inner.for.end: 20001 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20002 // CHECK11: omp.loop.exit: 20003 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20004 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 20005 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 20006 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20007 // CHECK11: omp.precond.end: 20008 // CHECK11-NEXT: ret void 20009 // 20010 // 20011 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 20012 // CHECK11-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 20013 // CHECK11-NEXT: entry: 20014 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20015 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 20016 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 20017 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 20018 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20019 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 20020 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 20021 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 20022 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 20023 // CHECK11-NEXT: ret void 20024 // 20025 // 20026 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..38 20027 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20028 // CHECK11-NEXT: entry: 20029 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20030 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20031 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20032 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20033 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20034 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20035 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20036 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20037 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20038 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20039 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20040 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20041 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20042 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20043 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20044 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 20045 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20046 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20047 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20048 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20049 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20050 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20051 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20052 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20053 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20054 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20055 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20056 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 20057 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20058 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20059 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20060 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20061 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20062 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20063 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20064 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20065 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20066 // CHECK11: omp.precond.then: 20067 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20068 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20069 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 20070 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20071 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20072 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20073 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 20074 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20075 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20076 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20077 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 20078 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20079 // CHECK11: cond.true: 20080 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20081 // CHECK11-NEXT: br label [[COND_END:%.*]] 20082 // CHECK11: cond.false: 20083 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20084 // CHECK11-NEXT: br label [[COND_END]] 20085 // CHECK11: cond.end: 20086 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 20087 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20088 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20089 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 20090 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20091 // CHECK11: omp.inner.for.cond: 20092 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20093 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20094 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 20095 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20096 // CHECK11: omp.inner.for.body: 20097 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20098 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20099 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 20100 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20101 // CHECK11: omp.inner.for.inc: 20102 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20103 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20104 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 20105 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20106 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20107 // CHECK11: omp.inner.for.end: 20108 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20109 // CHECK11: omp.loop.exit: 20110 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20111 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20112 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20113 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20114 // CHECK11: omp.precond.end: 20115 // CHECK11-NEXT: ret void 20116 // 20117 // 20118 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..39 20119 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20120 // CHECK11-NEXT: entry: 20121 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20122 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20123 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 20124 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 20125 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20126 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20127 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20128 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20129 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20130 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20131 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20132 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20133 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20134 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20135 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20136 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20137 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20138 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 20139 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20140 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20141 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20142 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20143 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20144 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20145 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20146 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20147 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20148 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20149 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20150 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20151 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20152 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 20153 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20154 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20155 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20156 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20157 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20158 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20159 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20160 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20161 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20162 // CHECK11: omp.precond.then: 20163 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20164 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20165 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 20166 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20167 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20168 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 20169 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 20170 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20171 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20172 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20173 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 20174 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20175 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20176 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20177 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 20178 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20179 // CHECK11: cond.true: 20180 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20181 // CHECK11-NEXT: br label [[COND_END:%.*]] 20182 // CHECK11: cond.false: 20183 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20184 // CHECK11-NEXT: br label [[COND_END]] 20185 // CHECK11: cond.end: 20186 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 20187 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20188 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20189 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 20190 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20191 // CHECK11: omp.inner.for.cond: 20192 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20193 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20194 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 20195 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20196 // CHECK11: omp.inner.for.body: 20197 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20198 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 20199 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20200 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 20201 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 20202 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 20203 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 20204 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 20205 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 20206 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 20207 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 20208 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 20209 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 20210 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 20211 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 20212 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 20213 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 20214 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20215 // CHECK11: omp.body.continue: 20216 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20217 // CHECK11: omp.inner.for.inc: 20218 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20219 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 20220 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 20221 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20222 // CHECK11: omp.inner.for.end: 20223 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20224 // CHECK11: omp.loop.exit: 20225 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20226 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 20227 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 20228 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20229 // CHECK11: omp.precond.end: 20230 // CHECK11-NEXT: ret void 20231 // 20232 // 20233 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 20234 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 20235 // CHECK11-NEXT: entry: 20236 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 20237 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20238 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 20239 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 20240 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 20241 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 20242 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20243 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 20244 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 20245 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 20246 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 20247 // CHECK11-NEXT: ret void 20248 // 20249 // 20250 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..42 20251 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20252 // CHECK11-NEXT: entry: 20253 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20254 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20255 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 20256 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20257 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20258 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20259 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20260 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20261 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20262 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20263 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20264 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20265 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20266 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20267 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20268 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20269 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20270 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 20271 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 20272 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20273 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20274 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 20275 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20276 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20277 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20278 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20279 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 20280 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20281 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20282 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20283 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20284 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 20285 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 20286 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 20287 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20288 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20289 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 20290 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20291 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20292 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20293 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20294 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20295 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 20296 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20297 // CHECK11: omp.precond.then: 20298 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20299 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20300 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 20301 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20302 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20303 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20304 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 20305 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20306 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20307 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20308 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 20309 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20310 // CHECK11: cond.true: 20311 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20312 // CHECK11-NEXT: br label [[COND_END:%.*]] 20313 // CHECK11: cond.false: 20314 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20315 // CHECK11-NEXT: br label [[COND_END]] 20316 // CHECK11: cond.end: 20317 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 20318 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20319 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20320 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 20321 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20322 // CHECK11: omp.inner.for.cond: 20323 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20324 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20325 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 20326 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20327 // CHECK11: omp.inner.for.body: 20328 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20329 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20330 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20331 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 20332 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 20333 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 20334 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20335 // CHECK11: omp.inner.for.inc: 20336 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20337 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20338 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 20339 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20340 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20341 // CHECK11: omp.inner.for.end: 20342 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20343 // CHECK11: omp.loop.exit: 20344 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20345 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 20346 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 20347 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20348 // CHECK11: omp.precond.end: 20349 // CHECK11-NEXT: ret void 20350 // 20351 // 20352 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..43 20353 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 20354 // CHECK11-NEXT: entry: 20355 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20356 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20357 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 20358 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 20359 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20360 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20361 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20362 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20363 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 20364 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20365 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20366 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20367 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20368 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20369 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20370 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20371 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20372 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20373 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 20374 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20375 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20376 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20377 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20378 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20379 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20380 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20381 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20382 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 20383 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20384 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20385 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20386 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20387 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20388 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20389 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20390 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20391 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20392 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20393 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20394 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20395 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20396 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20397 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20398 // CHECK11: omp.precond.then: 20399 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20400 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20401 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 20402 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20403 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20404 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 20405 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 20406 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20407 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20408 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 20409 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20410 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 20411 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 20412 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20413 // CHECK11: omp.dispatch.cond: 20414 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20415 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20416 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 20417 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20418 // CHECK11: cond.true: 20419 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20420 // CHECK11-NEXT: br label [[COND_END:%.*]] 20421 // CHECK11: cond.false: 20422 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20423 // CHECK11-NEXT: br label [[COND_END]] 20424 // CHECK11: cond.end: 20425 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 20426 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20427 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20428 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 20429 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20430 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20431 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 20432 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20433 // CHECK11: omp.dispatch.body: 20434 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20435 // CHECK11: omp.inner.for.cond: 20436 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20437 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20438 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 20439 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20440 // CHECK11: omp.inner.for.body: 20441 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20442 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 20443 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20444 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 20445 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 4 20446 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 20447 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 20448 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 20449 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 4 20450 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 20451 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 20452 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 20453 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 20454 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 4 20455 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 20456 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i32 [[TMP30]] 20457 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX10]], align 4 20458 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20459 // CHECK11: omp.body.continue: 20460 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20461 // CHECK11: omp.inner.for.inc: 20462 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20463 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 20464 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 20465 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20466 // CHECK11: omp.inner.for.end: 20467 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20468 // CHECK11: omp.dispatch.inc: 20469 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20470 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20471 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 20472 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 20473 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20474 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20475 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 20476 // CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 20477 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 20478 // CHECK11: omp.dispatch.end: 20479 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20480 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 20481 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 20482 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20483 // CHECK11: omp.precond.end: 20484 // CHECK11-NEXT: ret void 20485 // 20486 // 20487 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 20488 // CHECK11-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 20489 // CHECK11-NEXT: entry: 20490 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20491 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 20492 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 20493 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 20494 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20495 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 20496 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 20497 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 20498 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 20499 // CHECK11-NEXT: ret void 20500 // 20501 // 20502 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..46 20503 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20504 // CHECK11-NEXT: entry: 20505 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20506 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20507 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20508 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20509 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20510 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20511 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20512 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20513 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20514 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20515 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20516 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20517 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20518 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20519 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20520 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 20521 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20522 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20523 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20524 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20525 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20526 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20527 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20528 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20529 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20530 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20531 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20532 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 20533 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20534 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20535 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20536 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20537 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20538 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20539 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20540 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20541 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20542 // CHECK11: omp.precond.then: 20543 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20544 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20545 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 20546 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20547 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20548 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20549 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 20550 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20551 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20552 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20553 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 20554 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20555 // CHECK11: cond.true: 20556 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20557 // CHECK11-NEXT: br label [[COND_END:%.*]] 20558 // CHECK11: cond.false: 20559 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20560 // CHECK11-NEXT: br label [[COND_END]] 20561 // CHECK11: cond.end: 20562 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 20563 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20564 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20565 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 20566 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20567 // CHECK11: omp.inner.for.cond: 20568 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20569 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20570 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 20571 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20572 // CHECK11: omp.inner.for.body: 20573 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20574 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20575 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 20576 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20577 // CHECK11: omp.inner.for.inc: 20578 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20579 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20580 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 20581 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20582 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20583 // CHECK11: omp.inner.for.end: 20584 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20585 // CHECK11: omp.loop.exit: 20586 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20587 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20588 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20589 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20590 // CHECK11: omp.precond.end: 20591 // CHECK11-NEXT: ret void 20592 // 20593 // 20594 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..47 20595 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20596 // CHECK11-NEXT: entry: 20597 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20598 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20599 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 20600 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 20601 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20602 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20603 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20604 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20605 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20606 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20607 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20608 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20609 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20610 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20611 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20612 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20613 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20614 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 20615 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20616 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20617 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20618 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20619 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20620 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20621 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20622 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20623 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20624 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20625 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20626 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20627 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20628 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 20629 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20630 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20631 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20632 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20633 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20634 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20635 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20636 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20637 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20638 // CHECK11: omp.precond.then: 20639 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20640 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20641 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 20642 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20643 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20644 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 20645 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 20646 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20647 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20648 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20649 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20650 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20651 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 20652 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 20653 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20654 // CHECK11: omp.dispatch.cond: 20655 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20656 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 20657 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 20658 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 20659 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20660 // CHECK11: omp.dispatch.body: 20661 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20662 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 20663 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20664 // CHECK11: omp.inner.for.cond: 20665 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 20666 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 20667 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 20668 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20669 // CHECK11: omp.inner.for.body: 20670 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 20671 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 20672 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20673 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26 20674 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !26 20675 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 20676 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i32 [[TMP22]] 20677 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 20678 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !26 20679 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 20680 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 20681 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4, !llvm.access.group !26 20682 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 20683 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !26 20684 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 20685 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 20686 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX7]], align 4, !llvm.access.group !26 20687 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20688 // CHECK11: omp.body.continue: 20689 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20690 // CHECK11: omp.inner.for.inc: 20691 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 20692 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 20693 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 20694 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 20695 // CHECK11: omp.inner.for.end: 20696 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20697 // CHECK11: omp.dispatch.inc: 20698 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 20699 // CHECK11: omp.dispatch.end: 20700 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20701 // CHECK11: omp.precond.end: 20702 // CHECK11-NEXT: ret void 20703 // 20704 // 20705 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 20706 // CHECK11-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 20707 // CHECK11-NEXT: entry: 20708 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 20709 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 20710 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 20711 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 20712 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 20713 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 20714 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 20715 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 20716 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 20717 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 20718 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 20719 // CHECK11-NEXT: ret void 20720 // 20721 // 20722 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..50 20723 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 20724 // CHECK11-NEXT: entry: 20725 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20726 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20727 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 20728 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20729 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20730 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20731 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20732 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20733 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20734 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20735 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20736 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20737 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20738 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20739 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20740 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20741 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20742 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 20743 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 20744 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20745 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20746 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 20747 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20748 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20749 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20750 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20751 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 20752 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20753 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20754 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20755 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20756 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 20757 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 20758 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 20759 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20760 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20761 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 20762 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20763 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20764 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20765 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20766 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20767 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 20768 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20769 // CHECK11: omp.precond.then: 20770 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20771 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20772 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 20773 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20774 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20775 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20776 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 20777 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20778 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20779 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20780 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 20781 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20782 // CHECK11: cond.true: 20783 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20784 // CHECK11-NEXT: br label [[COND_END:%.*]] 20785 // CHECK11: cond.false: 20786 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20787 // CHECK11-NEXT: br label [[COND_END]] 20788 // CHECK11: cond.end: 20789 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 20790 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20791 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20792 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 20793 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20794 // CHECK11: omp.inner.for.cond: 20795 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20796 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20797 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 20798 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20799 // CHECK11: omp.inner.for.body: 20800 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20801 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20802 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20803 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 20804 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 20805 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 20806 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20807 // CHECK11: omp.inner.for.inc: 20808 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20809 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20810 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 20811 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20812 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 20813 // CHECK11: omp.inner.for.end: 20814 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20815 // CHECK11: omp.loop.exit: 20816 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20817 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 20818 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 20819 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20820 // CHECK11: omp.precond.end: 20821 // CHECK11-NEXT: ret void 20822 // 20823 // 20824 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..51 20825 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 20826 // CHECK11-NEXT: entry: 20827 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 20828 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 20829 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 20830 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 20831 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 20832 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 20833 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 20834 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 20835 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 20836 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20837 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 20838 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20839 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20840 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 20841 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20842 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20843 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20844 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20845 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 20846 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 20847 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 20848 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20849 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20850 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 20851 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 20852 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 20853 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 20854 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 20855 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 20856 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 20857 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 20858 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 20859 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 20860 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20861 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20862 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 20863 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20864 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20865 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20866 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 20867 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20868 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 20869 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20870 // CHECK11: omp.precond.then: 20871 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20872 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20873 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 20874 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 20875 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 20876 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 20877 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 20878 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20879 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20880 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 20881 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20882 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20883 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20884 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 20885 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 20886 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20887 // CHECK11: omp.dispatch.cond: 20888 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 20889 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 20890 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 20891 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 20892 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20893 // CHECK11: omp.dispatch.body: 20894 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20895 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 20896 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20897 // CHECK11: omp.inner.for.cond: 20898 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 20899 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !29 20900 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 20901 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20902 // CHECK11: omp.inner.for.body: 20903 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 20904 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 20905 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20906 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !29 20907 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !29 20908 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 20909 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i32 [[TMP23]] 20910 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !29 20911 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !29 20912 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 20913 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i32 [[TMP26]] 20914 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !29 20915 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 20916 // CHECK11-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !29 20917 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 20918 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i32 [[TMP29]] 20919 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4, !llvm.access.group !29 20920 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20921 // CHECK11: omp.body.continue: 20922 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20923 // CHECK11: omp.inner.for.inc: 20924 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 20925 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 20926 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 20927 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 20928 // CHECK11: omp.inner.for.end: 20929 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20930 // CHECK11: omp.dispatch.inc: 20931 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 20932 // CHECK11: omp.dispatch.end: 20933 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 20934 // CHECK11: omp.precond.end: 20935 // CHECK11-NEXT: ret void 20936 // 20937 // 20938 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 20939 // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { 20940 // CHECK11-NEXT: entry: 20941 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 20942 // CHECK11-NEXT: ret void 20943 // 20944 // 20945 // CHECK12-LABEL: define {{[^@]+}}@main 20946 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 20947 // CHECK12-NEXT: entry: 20948 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 20949 // CHECK12-NEXT: [[A:%.*]] = alloca double*, align 4 20950 // CHECK12-NEXT: [[B:%.*]] = alloca double*, align 4 20951 // CHECK12-NEXT: [[C:%.*]] = alloca double*, align 4 20952 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 20953 // CHECK12-NEXT: [[CH:%.*]] = alloca i32, align 4 20954 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 20955 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 20956 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 20957 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 20958 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 20959 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20960 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20961 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 20962 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 20963 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 20964 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 20965 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 20966 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 20967 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 20968 // CHECK12-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 20969 // CHECK12-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 20970 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 20971 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 20972 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 20973 // CHECK12-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 20974 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 20975 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 20976 // CHECK12-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 20977 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 20978 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 20979 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 20980 // CHECK12-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 20981 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 20982 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 20983 // CHECK12-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 20984 // CHECK12-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 20985 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 20986 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 20987 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 20988 // CHECK12-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 20989 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 20990 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 20991 // CHECK12-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 20992 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 20993 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 20994 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 20995 // CHECK12-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 20996 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 20997 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 20998 // CHECK12-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 20999 // CHECK12-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 21000 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 21001 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 21002 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 21003 // CHECK12-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 21004 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 21005 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 21006 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 21007 // CHECK12-NEXT: store i32 10000, i32* [[N]], align 4 21008 // CHECK12-NEXT: store i32 100, i32* [[CH]], align 4 21009 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 21010 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 21011 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 21012 // CHECK12-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 4 21013 // CHECK12-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 4 21014 // CHECK12-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 4 21015 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21016 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 21017 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 21018 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21019 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 21020 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 21021 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 21022 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 4 21023 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 21024 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 21025 // CHECK12-NEXT: store double* [[TMP2]], double** [[TMP11]], align 4 21026 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 21027 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 21028 // CHECK12-NEXT: store double* [[TMP2]], double** [[TMP13]], align 4 21029 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 21030 // CHECK12-NEXT: store i8* null, i8** [[TMP14]], align 4 21031 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 21032 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 21033 // CHECK12-NEXT: store double* [[TMP3]], double** [[TMP16]], align 4 21034 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 21035 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 21036 // CHECK12-NEXT: store double* [[TMP3]], double** [[TMP18]], align 4 21037 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 21038 // CHECK12-NEXT: store i8* null, i8** [[TMP19]], align 4 21039 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 21040 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 21041 // CHECK12-NEXT: store double* [[TMP4]], double** [[TMP21]], align 4 21042 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 21043 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 21044 // CHECK12-NEXT: store double* [[TMP4]], double** [[TMP23]], align 4 21045 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 21046 // CHECK12-NEXT: store i8* null, i8** [[TMP24]], align 4 21047 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21048 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21049 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 21050 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 21051 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21052 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 21053 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21054 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21055 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21056 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21057 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 21058 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 21059 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 21060 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21061 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 21062 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 21063 // CHECK12: omp_offload.failed: 21064 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i32 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 21065 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 21066 // CHECK12: omp_offload.cont: 21067 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 21068 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 21069 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 21070 // CHECK12-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 4 21071 // CHECK12-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 4 21072 // CHECK12-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 4 21073 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 21074 // CHECK12-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 21075 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 21076 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 21077 // CHECK12-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 21078 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 21079 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 21080 // CHECK12-NEXT: store i8* null, i8** [[TMP42]], align 4 21081 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 21082 // CHECK12-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 21083 // CHECK12-NEXT: store double* [[TMP35]], double** [[TMP44]], align 4 21084 // CHECK12-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 21085 // CHECK12-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 21086 // CHECK12-NEXT: store double* [[TMP35]], double** [[TMP46]], align 4 21087 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 21088 // CHECK12-NEXT: store i8* null, i8** [[TMP47]], align 4 21089 // CHECK12-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 21090 // CHECK12-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 21091 // CHECK12-NEXT: store double* [[TMP36]], double** [[TMP49]], align 4 21092 // CHECK12-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 21093 // CHECK12-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 21094 // CHECK12-NEXT: store double* [[TMP36]], double** [[TMP51]], align 4 21095 // CHECK12-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 21096 // CHECK12-NEXT: store i8* null, i8** [[TMP52]], align 4 21097 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 21098 // CHECK12-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 21099 // CHECK12-NEXT: store double* [[TMP37]], double** [[TMP54]], align 4 21100 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 21101 // CHECK12-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 21102 // CHECK12-NEXT: store double* [[TMP37]], double** [[TMP56]], align 4 21103 // CHECK12-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 21104 // CHECK12-NEXT: store i8* null, i8** [[TMP57]], align 4 21105 // CHECK12-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 21106 // CHECK12-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 21107 // CHECK12-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 21108 // CHECK12-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 21109 // CHECK12-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 21110 // CHECK12-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 21111 // CHECK12-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 21112 // CHECK12-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 21113 // CHECK12-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 21114 // CHECK12-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 21115 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 21116 // CHECK12-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 21117 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 21118 // CHECK12-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21119 // CHECK12-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 21120 // CHECK12-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 21121 // CHECK12: omp_offload.failed14: 21122 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i32 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 21123 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT15]] 21124 // CHECK12: omp_offload.cont15: 21125 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 21126 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 21127 // CHECK12-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 21128 // CHECK12-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 21129 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 21130 // CHECK12-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 21131 // CHECK12-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 4 21132 // CHECK12-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 4 21133 // CHECK12-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 4 21134 // CHECK12-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 21135 // CHECK12-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 21136 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 21137 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 21138 // CHECK12-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 21139 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 21140 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 21141 // CHECK12-NEXT: store i8* null, i8** [[TMP77]], align 4 21142 // CHECK12-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 21143 // CHECK12-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 21144 // CHECK12-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 21145 // CHECK12-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 21146 // CHECK12-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 21147 // CHECK12-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 21148 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 21149 // CHECK12-NEXT: store i8* null, i8** [[TMP82]], align 4 21150 // CHECK12-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 21151 // CHECK12-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 21152 // CHECK12-NEXT: store double* [[TMP70]], double** [[TMP84]], align 4 21153 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 21154 // CHECK12-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 21155 // CHECK12-NEXT: store double* [[TMP70]], double** [[TMP86]], align 4 21156 // CHECK12-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 21157 // CHECK12-NEXT: store i8* null, i8** [[TMP87]], align 4 21158 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 21159 // CHECK12-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 21160 // CHECK12-NEXT: store double* [[TMP71]], double** [[TMP89]], align 4 21161 // CHECK12-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 21162 // CHECK12-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 21163 // CHECK12-NEXT: store double* [[TMP71]], double** [[TMP91]], align 4 21164 // CHECK12-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 21165 // CHECK12-NEXT: store i8* null, i8** [[TMP92]], align 4 21166 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 21167 // CHECK12-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 21168 // CHECK12-NEXT: store double* [[TMP72]], double** [[TMP94]], align 4 21169 // CHECK12-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 21170 // CHECK12-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 21171 // CHECK12-NEXT: store double* [[TMP72]], double** [[TMP96]], align 4 21172 // CHECK12-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 21173 // CHECK12-NEXT: store i8* null, i8** [[TMP97]], align 4 21174 // CHECK12-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 21175 // CHECK12-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 21176 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 21177 // CHECK12-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 21178 // CHECK12-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 21179 // CHECK12-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 21180 // CHECK12-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 21181 // CHECK12-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 21182 // CHECK12-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 21183 // CHECK12-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 21184 // CHECK12-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 21185 // CHECK12-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 21186 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 21187 // CHECK12-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21188 // CHECK12-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 21189 // CHECK12-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 21190 // CHECK12: omp_offload.failed27: 21191 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i32 [[TMP67]], i32 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 21192 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT28]] 21193 // CHECK12: omp_offload.cont28: 21194 // CHECK12-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 21195 // CHECK12-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 21196 // CHECK12-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 21197 // CHECK12-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 4 21198 // CHECK12-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 4 21199 // CHECK12-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 4 21200 // CHECK12-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 21201 // CHECK12-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 21202 // CHECK12-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 21203 // CHECK12-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 21204 // CHECK12-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 21205 // CHECK12-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 21206 // CHECK12-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 21207 // CHECK12-NEXT: store i8* null, i8** [[TMP115]], align 4 21208 // CHECK12-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 21209 // CHECK12-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 21210 // CHECK12-NEXT: store double* [[TMP108]], double** [[TMP117]], align 4 21211 // CHECK12-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 21212 // CHECK12-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 21213 // CHECK12-NEXT: store double* [[TMP108]], double** [[TMP119]], align 4 21214 // CHECK12-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 21215 // CHECK12-NEXT: store i8* null, i8** [[TMP120]], align 4 21216 // CHECK12-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 21217 // CHECK12-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 21218 // CHECK12-NEXT: store double* [[TMP109]], double** [[TMP122]], align 4 21219 // CHECK12-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 21220 // CHECK12-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 21221 // CHECK12-NEXT: store double* [[TMP109]], double** [[TMP124]], align 4 21222 // CHECK12-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 21223 // CHECK12-NEXT: store i8* null, i8** [[TMP125]], align 4 21224 // CHECK12-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 21225 // CHECK12-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 21226 // CHECK12-NEXT: store double* [[TMP110]], double** [[TMP127]], align 4 21227 // CHECK12-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 21228 // CHECK12-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 21229 // CHECK12-NEXT: store double* [[TMP110]], double** [[TMP129]], align 4 21230 // CHECK12-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 21231 // CHECK12-NEXT: store i8* null, i8** [[TMP130]], align 4 21232 // CHECK12-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 21233 // CHECK12-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 21234 // CHECK12-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 21235 // CHECK12-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 21236 // CHECK12-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 21237 // CHECK12-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 21238 // CHECK12-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 21239 // CHECK12-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 21240 // CHECK12-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 21241 // CHECK12-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 21242 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 21243 // CHECK12-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 21244 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 21245 // CHECK12-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21246 // CHECK12-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 21247 // CHECK12-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 21248 // CHECK12: omp_offload.failed40: 21249 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i32 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 21250 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT41]] 21251 // CHECK12: omp_offload.cont41: 21252 // CHECK12-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 21253 // CHECK12-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 21254 // CHECK12-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 21255 // CHECK12-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 21256 // CHECK12-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 21257 // CHECK12-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 21258 // CHECK12-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 4 21259 // CHECK12-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 4 21260 // CHECK12-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 4 21261 // CHECK12-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 21262 // CHECK12-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 21263 // CHECK12-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 21264 // CHECK12-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 21265 // CHECK12-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 21266 // CHECK12-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 21267 // CHECK12-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 21268 // CHECK12-NEXT: store i8* null, i8** [[TMP150]], align 4 21269 // CHECK12-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 21270 // CHECK12-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 21271 // CHECK12-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 21272 // CHECK12-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 21273 // CHECK12-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 21274 // CHECK12-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 21275 // CHECK12-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 21276 // CHECK12-NEXT: store i8* null, i8** [[TMP155]], align 4 21277 // CHECK12-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 21278 // CHECK12-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 21279 // CHECK12-NEXT: store double* [[TMP143]], double** [[TMP157]], align 4 21280 // CHECK12-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 21281 // CHECK12-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 21282 // CHECK12-NEXT: store double* [[TMP143]], double** [[TMP159]], align 4 21283 // CHECK12-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 21284 // CHECK12-NEXT: store i8* null, i8** [[TMP160]], align 4 21285 // CHECK12-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 21286 // CHECK12-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 21287 // CHECK12-NEXT: store double* [[TMP144]], double** [[TMP162]], align 4 21288 // CHECK12-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 21289 // CHECK12-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 21290 // CHECK12-NEXT: store double* [[TMP144]], double** [[TMP164]], align 4 21291 // CHECK12-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 21292 // CHECK12-NEXT: store i8* null, i8** [[TMP165]], align 4 21293 // CHECK12-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 21294 // CHECK12-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 21295 // CHECK12-NEXT: store double* [[TMP145]], double** [[TMP167]], align 4 21296 // CHECK12-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 21297 // CHECK12-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 21298 // CHECK12-NEXT: store double* [[TMP145]], double** [[TMP169]], align 4 21299 // CHECK12-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 21300 // CHECK12-NEXT: store i8* null, i8** [[TMP170]], align 4 21301 // CHECK12-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 21302 // CHECK12-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 21303 // CHECK12-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 21304 // CHECK12-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 21305 // CHECK12-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 21306 // CHECK12-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 21307 // CHECK12-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 21308 // CHECK12-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 21309 // CHECK12-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 21310 // CHECK12-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 21311 // CHECK12-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 21312 // CHECK12-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 21313 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 21314 // CHECK12-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21315 // CHECK12-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 21316 // CHECK12-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 21317 // CHECK12: omp_offload.failed54: 21318 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i32 [[TMP140]], i32 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 21319 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT55]] 21320 // CHECK12: omp_offload.cont55: 21321 // CHECK12-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 21322 // CHECK12-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 21323 // CHECK12-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 21324 // CHECK12-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 4 21325 // CHECK12-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 4 21326 // CHECK12-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 4 21327 // CHECK12-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 21328 // CHECK12-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 21329 // CHECK12-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 21330 // CHECK12-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 21331 // CHECK12-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 21332 // CHECK12-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 21333 // CHECK12-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 21334 // CHECK12-NEXT: store i8* null, i8** [[TMP188]], align 4 21335 // CHECK12-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 21336 // CHECK12-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 21337 // CHECK12-NEXT: store double* [[TMP181]], double** [[TMP190]], align 4 21338 // CHECK12-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 21339 // CHECK12-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 21340 // CHECK12-NEXT: store double* [[TMP181]], double** [[TMP192]], align 4 21341 // CHECK12-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 21342 // CHECK12-NEXT: store i8* null, i8** [[TMP193]], align 4 21343 // CHECK12-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 21344 // CHECK12-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 21345 // CHECK12-NEXT: store double* [[TMP182]], double** [[TMP195]], align 4 21346 // CHECK12-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 21347 // CHECK12-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 21348 // CHECK12-NEXT: store double* [[TMP182]], double** [[TMP197]], align 4 21349 // CHECK12-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 21350 // CHECK12-NEXT: store i8* null, i8** [[TMP198]], align 4 21351 // CHECK12-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 21352 // CHECK12-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 21353 // CHECK12-NEXT: store double* [[TMP183]], double** [[TMP200]], align 4 21354 // CHECK12-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 21355 // CHECK12-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 21356 // CHECK12-NEXT: store double* [[TMP183]], double** [[TMP202]], align 4 21357 // CHECK12-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 21358 // CHECK12-NEXT: store i8* null, i8** [[TMP203]], align 4 21359 // CHECK12-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 21360 // CHECK12-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 21361 // CHECK12-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 21362 // CHECK12-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 21363 // CHECK12-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 21364 // CHECK12-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 21365 // CHECK12-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 21366 // CHECK12-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 21367 // CHECK12-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 21368 // CHECK12-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 21369 // CHECK12-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 21370 // CHECK12-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 21371 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 21372 // CHECK12-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21373 // CHECK12-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 21374 // CHECK12-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 21375 // CHECK12: omp_offload.failed67: 21376 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i32 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 21377 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT68]] 21378 // CHECK12: omp_offload.cont68: 21379 // CHECK12-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 21380 // CHECK12-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 21381 // CHECK12-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 21382 // CHECK12-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 21383 // CHECK12-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 21384 // CHECK12-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 21385 // CHECK12-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 4 21386 // CHECK12-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 4 21387 // CHECK12-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 4 21388 // CHECK12-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 21389 // CHECK12-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 21390 // CHECK12-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 21391 // CHECK12-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 21392 // CHECK12-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 21393 // CHECK12-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 21394 // CHECK12-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 21395 // CHECK12-NEXT: store i8* null, i8** [[TMP223]], align 4 21396 // CHECK12-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 21397 // CHECK12-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 21398 // CHECK12-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 21399 // CHECK12-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 21400 // CHECK12-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 21401 // CHECK12-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 21402 // CHECK12-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 21403 // CHECK12-NEXT: store i8* null, i8** [[TMP228]], align 4 21404 // CHECK12-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 21405 // CHECK12-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 21406 // CHECK12-NEXT: store double* [[TMP216]], double** [[TMP230]], align 4 21407 // CHECK12-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 21408 // CHECK12-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 21409 // CHECK12-NEXT: store double* [[TMP216]], double** [[TMP232]], align 4 21410 // CHECK12-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 21411 // CHECK12-NEXT: store i8* null, i8** [[TMP233]], align 4 21412 // CHECK12-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 21413 // CHECK12-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 21414 // CHECK12-NEXT: store double* [[TMP217]], double** [[TMP235]], align 4 21415 // CHECK12-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 21416 // CHECK12-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 21417 // CHECK12-NEXT: store double* [[TMP217]], double** [[TMP237]], align 4 21418 // CHECK12-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 21419 // CHECK12-NEXT: store i8* null, i8** [[TMP238]], align 4 21420 // CHECK12-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 21421 // CHECK12-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 21422 // CHECK12-NEXT: store double* [[TMP218]], double** [[TMP240]], align 4 21423 // CHECK12-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 21424 // CHECK12-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 21425 // CHECK12-NEXT: store double* [[TMP218]], double** [[TMP242]], align 4 21426 // CHECK12-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 21427 // CHECK12-NEXT: store i8* null, i8** [[TMP243]], align 4 21428 // CHECK12-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 21429 // CHECK12-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 21430 // CHECK12-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 21431 // CHECK12-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 21432 // CHECK12-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 21433 // CHECK12-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 21434 // CHECK12-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 21435 // CHECK12-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 21436 // CHECK12-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 21437 // CHECK12-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 21438 // CHECK12-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 21439 // CHECK12-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 21440 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 21441 // CHECK12-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21442 // CHECK12-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 21443 // CHECK12-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 21444 // CHECK12: omp_offload.failed81: 21445 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i32 [[TMP213]], i32 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 21446 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT82]] 21447 // CHECK12: omp_offload.cont82: 21448 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 21449 // CHECK12-NEXT: ret i32 [[CALL]] 21450 // 21451 // 21452 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 21453 // CHECK12-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1:[0-9]+]] { 21454 // CHECK12-NEXT: entry: 21455 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 21456 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 21457 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 21458 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 21459 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 21460 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 21461 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 21462 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 21463 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 21464 // CHECK12-NEXT: ret void 21465 // 21466 // 21467 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 21468 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 21469 // CHECK12-NEXT: entry: 21470 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 21471 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 21472 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 21473 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 21474 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 21475 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 21476 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21477 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 21478 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21479 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21480 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 21481 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21482 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21483 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21484 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21485 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 21486 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 21487 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 21488 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 21489 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 21490 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 21491 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 21492 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 21493 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 21494 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 21495 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 21496 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 21497 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 21498 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21499 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 21500 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21501 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21502 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21503 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 21504 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21505 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 21506 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21507 // CHECK12: omp.precond.then: 21508 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21509 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21510 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 21511 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21512 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21513 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21514 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 21515 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21516 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21517 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21518 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 21519 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21520 // CHECK12: cond.true: 21521 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21522 // CHECK12-NEXT: br label [[COND_END:%.*]] 21523 // CHECK12: cond.false: 21524 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21525 // CHECK12-NEXT: br label [[COND_END]] 21526 // CHECK12: cond.end: 21527 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 21528 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21529 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21530 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 21531 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21532 // CHECK12: omp.inner.for.cond: 21533 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21534 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21535 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 21536 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21537 // CHECK12: omp.inner.for.body: 21538 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21539 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21540 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 21541 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21542 // CHECK12: omp.inner.for.inc: 21543 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21544 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21545 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 21546 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21547 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 21548 // CHECK12: omp.inner.for.end: 21549 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21550 // CHECK12: omp.loop.exit: 21551 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21552 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 21553 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 21554 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 21555 // CHECK12: omp.precond.end: 21556 // CHECK12-NEXT: ret void 21557 // 21558 // 21559 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 21560 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 21561 // CHECK12-NEXT: entry: 21562 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 21563 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 21564 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 21565 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 21566 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 21567 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 21568 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 21569 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 21570 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21571 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 21572 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21573 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21574 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 21575 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21576 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21577 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21578 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21579 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 21580 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 21581 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 21582 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 21583 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 21584 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 21585 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 21586 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 21587 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 21588 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 21589 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 21590 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 21591 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 21592 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 21593 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 21594 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21595 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 21596 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21597 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21598 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21599 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 21600 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21601 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 21602 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21603 // CHECK12: omp.precond.then: 21604 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21605 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21606 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 21607 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 21608 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 21609 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 21610 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 21611 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21612 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21613 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21614 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 21615 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21616 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21617 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21618 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 21619 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21620 // CHECK12: cond.true: 21621 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21622 // CHECK12-NEXT: br label [[COND_END:%.*]] 21623 // CHECK12: cond.false: 21624 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21625 // CHECK12-NEXT: br label [[COND_END]] 21626 // CHECK12: cond.end: 21627 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 21628 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21629 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21630 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 21631 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21632 // CHECK12: omp.inner.for.cond: 21633 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21634 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21635 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 21636 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21637 // CHECK12: omp.inner.for.body: 21638 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21639 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 21640 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21641 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 21642 // CHECK12-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 21643 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 21644 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 21645 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 21646 // CHECK12-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 21647 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 21648 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 21649 // CHECK12-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 21650 // CHECK12-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 21651 // CHECK12-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 21652 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 21653 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 21654 // CHECK12-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 21655 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21656 // CHECK12: omp.body.continue: 21657 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21658 // CHECK12: omp.inner.for.inc: 21659 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21660 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 21661 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 21662 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 21663 // CHECK12: omp.inner.for.end: 21664 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21665 // CHECK12: omp.loop.exit: 21666 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21667 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 21668 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 21669 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 21670 // CHECK12: omp.precond.end: 21671 // CHECK12-NEXT: ret void 21672 // 21673 // 21674 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 21675 // CHECK12-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 21676 // CHECK12-NEXT: entry: 21677 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 21678 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 21679 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 21680 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 21681 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 21682 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 21683 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 21684 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 21685 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 21686 // CHECK12-NEXT: ret void 21687 // 21688 // 21689 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2 21690 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 21691 // CHECK12-NEXT: entry: 21692 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 21693 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 21694 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 21695 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 21696 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 21697 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 21698 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21699 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 21700 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21701 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21702 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 21703 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21704 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21705 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21706 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21707 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 21708 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 21709 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 21710 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 21711 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 21712 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 21713 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 21714 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 21715 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 21716 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 21717 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 21718 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 21719 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 21720 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21721 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 21722 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21723 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21724 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21725 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 21726 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21727 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 21728 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21729 // CHECK12: omp.precond.then: 21730 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21731 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21732 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 21733 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21734 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21735 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21736 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 21737 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21738 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21739 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21740 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 21741 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21742 // CHECK12: cond.true: 21743 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21744 // CHECK12-NEXT: br label [[COND_END:%.*]] 21745 // CHECK12: cond.false: 21746 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21747 // CHECK12-NEXT: br label [[COND_END]] 21748 // CHECK12: cond.end: 21749 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 21750 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21751 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21752 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 21753 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21754 // CHECK12: omp.inner.for.cond: 21755 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21756 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21757 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 21758 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21759 // CHECK12: omp.inner.for.body: 21760 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21761 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21762 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 21763 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21764 // CHECK12: omp.inner.for.inc: 21765 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21766 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21767 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 21768 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21769 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 21770 // CHECK12: omp.inner.for.end: 21771 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21772 // CHECK12: omp.loop.exit: 21773 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21774 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 21775 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 21776 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 21777 // CHECK12: omp.precond.end: 21778 // CHECK12-NEXT: ret void 21779 // 21780 // 21781 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3 21782 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 21783 // CHECK12-NEXT: entry: 21784 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 21785 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 21786 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 21787 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 21788 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 21789 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 21790 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 21791 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 21792 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21793 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 21794 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21795 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21796 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 21797 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21798 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21799 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21800 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21801 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 21802 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 21803 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 21804 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 21805 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 21806 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 21807 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 21808 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 21809 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 21810 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 21811 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 21812 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 21813 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 21814 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 21815 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 21816 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21817 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 21818 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21819 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21820 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21821 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 21822 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21823 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 21824 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21825 // CHECK12: omp.precond.then: 21826 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21827 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21828 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 21829 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 21830 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 21831 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 21832 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 21833 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21834 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21835 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21836 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 21837 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21838 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21839 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21840 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 21841 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21842 // CHECK12: cond.true: 21843 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21844 // CHECK12-NEXT: br label [[COND_END:%.*]] 21845 // CHECK12: cond.false: 21846 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21847 // CHECK12-NEXT: br label [[COND_END]] 21848 // CHECK12: cond.end: 21849 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 21850 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21851 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21852 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 21853 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21854 // CHECK12: omp.inner.for.cond: 21855 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21856 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21857 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 21858 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21859 // CHECK12: omp.inner.for.body: 21860 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21861 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 21862 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21863 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 21864 // CHECK12-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 21865 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 21866 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 21867 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 21868 // CHECK12-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 21869 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 21870 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 21871 // CHECK12-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 21872 // CHECK12-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 21873 // CHECK12-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 21874 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 21875 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 21876 // CHECK12-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 21877 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21878 // CHECK12: omp.body.continue: 21879 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21880 // CHECK12: omp.inner.for.inc: 21881 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21882 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 21883 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 21884 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 21885 // CHECK12: omp.inner.for.end: 21886 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21887 // CHECK12: omp.loop.exit: 21888 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21889 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 21890 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 21891 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 21892 // CHECK12: omp.precond.end: 21893 // CHECK12-NEXT: ret void 21894 // 21895 // 21896 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 21897 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 21898 // CHECK12-NEXT: entry: 21899 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 21900 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 21901 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 21902 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 21903 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 21904 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 21905 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 21906 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 21907 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 21908 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 21909 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 21910 // CHECK12-NEXT: ret void 21911 // 21912 // 21913 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..6 21914 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 21915 // CHECK12-NEXT: entry: 21916 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 21917 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 21918 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 21919 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 21920 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 21921 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 21922 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 21923 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21924 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 21925 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21926 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21927 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 21928 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21929 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21930 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21931 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21932 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 21933 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 21934 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 21935 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 21936 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 21937 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 21938 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 21939 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 21940 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 21941 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 21942 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 21943 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 21944 // CHECK12-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 21945 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 21946 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 21947 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21948 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 21949 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21950 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 21951 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21952 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 21953 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21954 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 21955 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21956 // CHECK12: omp.precond.then: 21957 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21958 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21959 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 21960 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21961 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21962 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 21963 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 21964 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 21965 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 21966 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21967 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21968 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 21969 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21970 // CHECK12: cond.true: 21971 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21972 // CHECK12-NEXT: br label [[COND_END:%.*]] 21973 // CHECK12: cond.false: 21974 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21975 // CHECK12-NEXT: br label [[COND_END]] 21976 // CHECK12: cond.end: 21977 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 21978 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21979 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21980 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 21981 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21982 // CHECK12: omp.inner.for.cond: 21983 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21984 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21985 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 21986 // CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 21987 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21988 // CHECK12: omp.inner.for.body: 21989 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21990 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21991 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 21992 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21993 // CHECK12: omp.inner.for.inc: 21994 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21995 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21996 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 21997 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 21998 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21999 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22000 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 22001 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 22002 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22003 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22004 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 22005 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 22006 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22007 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22008 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 22009 // CHECK12-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 22010 // CHECK12: cond.true10: 22011 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22012 // CHECK12-NEXT: br label [[COND_END12:%.*]] 22013 // CHECK12: cond.false11: 22014 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22015 // CHECK12-NEXT: br label [[COND_END12]] 22016 // CHECK12: cond.end12: 22017 // CHECK12-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 22018 // CHECK12-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 22019 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22020 // CHECK12-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 22021 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22022 // CHECK12: omp.inner.for.end: 22023 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22024 // CHECK12: omp.loop.exit: 22025 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22026 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 22027 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 22028 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22029 // CHECK12: omp.precond.end: 22030 // CHECK12-NEXT: ret void 22031 // 22032 // 22033 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7 22034 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22035 // CHECK12-NEXT: entry: 22036 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22037 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22038 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22039 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22040 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22041 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22042 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22043 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22044 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22045 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22046 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22047 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22048 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22049 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22050 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22051 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22052 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22053 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 22054 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22055 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22056 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22057 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22058 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22059 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22060 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22061 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22062 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22063 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22064 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22065 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22066 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22067 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 22068 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22069 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22070 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22071 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22072 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22073 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22074 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22075 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22076 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22077 // CHECK12: omp.precond.then: 22078 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22079 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22080 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 22081 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22082 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22083 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 22084 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 22085 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22086 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22087 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22088 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 22089 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22090 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22091 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22092 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 22093 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22094 // CHECK12: cond.true: 22095 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22096 // CHECK12-NEXT: br label [[COND_END:%.*]] 22097 // CHECK12: cond.false: 22098 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22099 // CHECK12-NEXT: br label [[COND_END]] 22100 // CHECK12: cond.end: 22101 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 22102 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22103 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22104 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 22105 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22106 // CHECK12: omp.inner.for.cond: 22107 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22108 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22109 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 22110 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22111 // CHECK12: omp.inner.for.body: 22112 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22113 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 22114 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22115 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22116 // CHECK12-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 22117 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 22118 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 22119 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 22120 // CHECK12-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 22121 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 22122 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 22123 // CHECK12-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 22124 // CHECK12-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 22125 // CHECK12-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 22126 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 22127 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 22128 // CHECK12-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 22129 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22130 // CHECK12: omp.body.continue: 22131 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22132 // CHECK12: omp.inner.for.inc: 22133 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22134 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 22135 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 22136 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22137 // CHECK12: omp.inner.for.end: 22138 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22139 // CHECK12: omp.loop.exit: 22140 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22141 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 22142 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 22143 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22144 // CHECK12: omp.precond.end: 22145 // CHECK12-NEXT: ret void 22146 // 22147 // 22148 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 22149 // CHECK12-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 22150 // CHECK12-NEXT: entry: 22151 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22152 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 22153 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 22154 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 22155 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22156 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 22157 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 22158 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 22159 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 22160 // CHECK12-NEXT: ret void 22161 // 22162 // 22163 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10 22164 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22165 // CHECK12-NEXT: entry: 22166 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22167 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22168 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22169 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22170 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22171 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22172 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22173 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22174 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22175 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22176 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22177 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22178 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22179 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22180 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22181 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 22182 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22183 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22184 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22185 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22186 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22187 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22188 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22189 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22190 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22191 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22192 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22193 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 22194 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22195 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22196 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22197 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22198 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22199 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22200 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22201 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22202 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22203 // CHECK12: omp.precond.then: 22204 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22205 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22206 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 22207 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22208 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22209 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22210 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 22211 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22212 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22213 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22214 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 22215 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22216 // CHECK12: cond.true: 22217 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22218 // CHECK12-NEXT: br label [[COND_END:%.*]] 22219 // CHECK12: cond.false: 22220 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22221 // CHECK12-NEXT: br label [[COND_END]] 22222 // CHECK12: cond.end: 22223 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 22224 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22225 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22226 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 22227 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22228 // CHECK12: omp.inner.for.cond: 22229 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22230 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22231 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 22232 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22233 // CHECK12: omp.inner.for.body: 22234 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22235 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22236 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 22237 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22238 // CHECK12: omp.inner.for.inc: 22239 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22240 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22241 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 22242 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22243 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22244 // CHECK12: omp.inner.for.end: 22245 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22246 // CHECK12: omp.loop.exit: 22247 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22248 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22249 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22250 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22251 // CHECK12: omp.precond.end: 22252 // CHECK12-NEXT: ret void 22253 // 22254 // 22255 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..11 22256 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22257 // CHECK12-NEXT: entry: 22258 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22259 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22260 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22261 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22262 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22263 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22264 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22265 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22266 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22267 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22268 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22269 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22270 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22271 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22272 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22273 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22274 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22275 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 22276 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22277 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22278 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22279 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22280 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22281 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22282 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22283 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22284 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22285 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22286 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22287 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22288 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22289 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 22290 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22291 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22292 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22293 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22294 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22295 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22296 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22297 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22298 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22299 // CHECK12: omp.precond.then: 22300 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22301 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22302 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 22303 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22304 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22305 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 22306 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 22307 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22308 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22309 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22310 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 22311 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22312 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22313 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22314 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 22315 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22316 // CHECK12: cond.true: 22317 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22318 // CHECK12-NEXT: br label [[COND_END:%.*]] 22319 // CHECK12: cond.false: 22320 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22321 // CHECK12-NEXT: br label [[COND_END]] 22322 // CHECK12: cond.end: 22323 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 22324 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22325 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22326 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 22327 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22328 // CHECK12: omp.inner.for.cond: 22329 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22330 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22331 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 22332 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22333 // CHECK12: omp.inner.for.body: 22334 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22335 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 22336 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22337 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22338 // CHECK12-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 22339 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 22340 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 22341 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 22342 // CHECK12-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 22343 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 22344 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 22345 // CHECK12-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 22346 // CHECK12-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 22347 // CHECK12-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 22348 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 22349 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 22350 // CHECK12-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 22351 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22352 // CHECK12: omp.body.continue: 22353 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22354 // CHECK12: omp.inner.for.inc: 22355 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22356 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 22357 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 22358 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22359 // CHECK12: omp.inner.for.end: 22360 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22361 // CHECK12: omp.loop.exit: 22362 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22363 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 22364 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 22365 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22366 // CHECK12: omp.precond.end: 22367 // CHECK12-NEXT: ret void 22368 // 22369 // 22370 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 22371 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 22372 // CHECK12-NEXT: entry: 22373 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 22374 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22375 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 22376 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 22377 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 22378 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 22379 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22380 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 22381 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 22382 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 22383 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 22384 // CHECK12-NEXT: ret void 22385 // 22386 // 22387 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..14 22388 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22389 // CHECK12-NEXT: entry: 22390 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22391 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22392 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 22393 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22394 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22395 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22396 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22397 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22398 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22399 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22400 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22401 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22402 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22403 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22404 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22405 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22406 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22407 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 22408 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22409 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22410 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22411 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 22412 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22413 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22414 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22415 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22416 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 22417 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22418 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 22419 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 22420 // CHECK12-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 22421 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 22422 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 22423 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 22424 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22425 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22426 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 22427 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22428 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22429 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22430 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22431 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22432 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 22433 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22434 // CHECK12: omp.precond.then: 22435 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22436 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22437 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 22438 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22439 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22440 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22441 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 22442 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22443 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22444 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22445 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 22446 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22447 // CHECK12: cond.true: 22448 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22449 // CHECK12-NEXT: br label [[COND_END:%.*]] 22450 // CHECK12: cond.false: 22451 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22452 // CHECK12-NEXT: br label [[COND_END]] 22453 // CHECK12: cond.end: 22454 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 22455 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22456 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22457 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 22458 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22459 // CHECK12: omp.inner.for.cond: 22460 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22461 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22462 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 22463 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22464 // CHECK12: omp.inner.for.body: 22465 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22466 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22467 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22468 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22469 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22470 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 22471 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22472 // CHECK12: omp.inner.for.inc: 22473 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22474 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22475 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 22476 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22477 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22478 // CHECK12: omp.inner.for.end: 22479 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22480 // CHECK12: omp.loop.exit: 22481 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22482 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 22483 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 22484 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22485 // CHECK12: omp.precond.end: 22486 // CHECK12-NEXT: ret void 22487 // 22488 // 22489 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..15 22490 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 22491 // CHECK12-NEXT: entry: 22492 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22493 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22494 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22495 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22496 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22497 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22498 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22499 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22500 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 22501 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22502 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22503 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22504 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22505 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22506 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22507 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22508 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22509 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22510 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 22511 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22512 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22513 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22514 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22515 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22516 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22517 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22518 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22519 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22520 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22521 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22522 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22523 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22524 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22525 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22526 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22527 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22528 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22529 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22530 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22531 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22532 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22533 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22534 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22535 // CHECK12: omp.precond.then: 22536 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22537 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22538 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 22539 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22540 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22541 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 22542 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 22543 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22544 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22545 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22546 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22547 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 22548 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 22549 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 22550 // CHECK12: omp.dispatch.cond: 22551 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22552 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22553 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 22554 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22555 // CHECK12: cond.true: 22556 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22557 // CHECK12-NEXT: br label [[COND_END:%.*]] 22558 // CHECK12: cond.false: 22559 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22560 // CHECK12-NEXT: br label [[COND_END]] 22561 // CHECK12: cond.end: 22562 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 22563 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22564 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22565 // CHECK12-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 22566 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22567 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22568 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 22569 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 22570 // CHECK12: omp.dispatch.body: 22571 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22572 // CHECK12: omp.inner.for.cond: 22573 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22574 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22575 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 22576 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22577 // CHECK12: omp.inner.for.body: 22578 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22579 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 22580 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22581 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 22582 // CHECK12-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 22583 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 22584 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 22585 // CHECK12-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 22586 // CHECK12-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 22587 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 22588 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 22589 // CHECK12-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 22590 // CHECK12-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 22591 // CHECK12-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 22592 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 22593 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 22594 // CHECK12-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 22595 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22596 // CHECK12: omp.body.continue: 22597 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22598 // CHECK12: omp.inner.for.inc: 22599 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22600 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 22601 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 22602 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22603 // CHECK12: omp.inner.for.end: 22604 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 22605 // CHECK12: omp.dispatch.inc: 22606 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22607 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22608 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 22609 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 22610 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22611 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22612 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 22613 // CHECK12-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 22614 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 22615 // CHECK12: omp.dispatch.end: 22616 // CHECK12-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22617 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 22618 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 22619 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22620 // CHECK12: omp.precond.end: 22621 // CHECK12-NEXT: ret void 22622 // 22623 // 22624 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 22625 // CHECK12-SAME: (i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 22626 // CHECK12-NEXT: entry: 22627 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22628 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 22629 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 22630 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 22631 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22632 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 22633 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 22634 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 22635 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 22636 // CHECK12-NEXT: ret void 22637 // 22638 // 22639 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..18 22640 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22641 // CHECK12-NEXT: entry: 22642 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22643 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22644 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22645 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22646 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22647 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22648 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22649 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22650 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22651 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22652 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22653 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22654 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22655 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22656 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22657 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 22658 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22659 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22660 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22661 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22662 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22663 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22664 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22665 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22666 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22667 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22668 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22669 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 22670 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22671 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22672 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22673 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22674 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22675 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22676 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22677 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22678 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22679 // CHECK12: omp.precond.then: 22680 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22681 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22682 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 22683 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22684 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22685 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22686 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 22687 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22688 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22689 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22690 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 22691 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22692 // CHECK12: cond.true: 22693 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22694 // CHECK12-NEXT: br label [[COND_END:%.*]] 22695 // CHECK12: cond.false: 22696 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22697 // CHECK12-NEXT: br label [[COND_END]] 22698 // CHECK12: cond.end: 22699 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 22700 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22701 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22702 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 22703 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22704 // CHECK12: omp.inner.for.cond: 22705 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22706 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22707 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 22708 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22709 // CHECK12: omp.inner.for.body: 22710 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22711 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22712 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 22713 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22714 // CHECK12: omp.inner.for.inc: 22715 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22716 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22717 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 22718 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22719 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22720 // CHECK12: omp.inner.for.end: 22721 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22722 // CHECK12: omp.loop.exit: 22723 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22724 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22725 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22726 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22727 // CHECK12: omp.precond.end: 22728 // CHECK12-NEXT: ret void 22729 // 22730 // 22731 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..19 22732 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22733 // CHECK12-NEXT: entry: 22734 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22735 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22736 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22737 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22738 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22739 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22740 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22741 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22742 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22743 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22744 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22745 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22746 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22747 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22748 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22749 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22750 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22751 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 22752 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22753 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22754 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22755 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22756 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22757 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22758 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22759 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22760 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22761 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22762 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22763 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22764 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22765 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 22766 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22767 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 22768 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22769 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22770 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22771 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22772 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22773 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 22774 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22775 // CHECK12: omp.precond.then: 22776 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22777 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22778 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 22779 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22780 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22781 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 22782 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 22783 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22784 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22785 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22786 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22787 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22788 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 22789 // CHECK12-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 22790 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 22791 // CHECK12: omp.dispatch.cond: 22792 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22793 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 22794 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 22795 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 22796 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 22797 // CHECK12: omp.dispatch.body: 22798 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22799 // CHECK12-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 22800 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22801 // CHECK12: omp.inner.for.cond: 22802 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 22803 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 22804 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 22805 // CHECK12-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22806 // CHECK12: omp.inner.for.body: 22807 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 22808 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 22809 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22810 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !20 22811 // CHECK12-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !20 22812 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 22813 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 22814 // CHECK12-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !20 22815 // CHECK12-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !20 22816 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 22817 // CHECK12-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 22818 // CHECK12-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !20 22819 // CHECK12-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 22820 // CHECK12-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !20 22821 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 22822 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 22823 // CHECK12-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !20 22824 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22825 // CHECK12: omp.body.continue: 22826 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22827 // CHECK12: omp.inner.for.inc: 22828 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 22829 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 22830 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 22831 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 22832 // CHECK12: omp.inner.for.end: 22833 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 22834 // CHECK12: omp.dispatch.inc: 22835 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 22836 // CHECK12: omp.dispatch.end: 22837 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22838 // CHECK12: omp.precond.end: 22839 // CHECK12-NEXT: ret void 22840 // 22841 // 22842 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 22843 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], double* [[A:%.*]], double* [[B:%.*]], double* [[C:%.*]]) #[[ATTR1]] { 22844 // CHECK12-NEXT: entry: 22845 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 22846 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22847 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 22848 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 22849 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 22850 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 22851 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22852 // CHECK12-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 22853 // CHECK12-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 22854 // CHECK12-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 22855 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 22856 // CHECK12-NEXT: ret void 22857 // 22858 // 22859 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..22 22860 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 22861 // CHECK12-NEXT: entry: 22862 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22863 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22864 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 22865 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22866 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22867 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22868 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22869 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22870 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22871 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22872 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22873 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22874 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22875 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22876 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22877 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22878 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22879 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 22880 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22881 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22882 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22883 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 22884 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22885 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22886 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22887 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22888 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 22889 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22890 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 22891 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 22892 // CHECK12-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 22893 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 22894 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 22895 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 22896 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22897 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22898 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 22899 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22900 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22901 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22902 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 22903 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22904 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 22905 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22906 // CHECK12: omp.precond.then: 22907 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22908 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22909 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 22910 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22911 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22912 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22913 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 22914 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22915 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22916 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22917 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 22918 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22919 // CHECK12: cond.true: 22920 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22921 // CHECK12-NEXT: br label [[COND_END:%.*]] 22922 // CHECK12: cond.false: 22923 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22924 // CHECK12-NEXT: br label [[COND_END]] 22925 // CHECK12: cond.end: 22926 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 22927 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22928 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22929 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 22930 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22931 // CHECK12: omp.inner.for.cond: 22932 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22933 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22934 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 22935 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22936 // CHECK12: omp.inner.for.body: 22937 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22938 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22939 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22940 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22941 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22942 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 22943 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22944 // CHECK12: omp.inner.for.inc: 22945 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22946 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22947 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 22948 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22949 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 22950 // CHECK12: omp.inner.for.end: 22951 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22952 // CHECK12: omp.loop.exit: 22953 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22954 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 22955 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 22956 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 22957 // CHECK12: omp.precond.end: 22958 // CHECK12-NEXT: ret void 22959 // 22960 // 22961 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..23 22962 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], double** nonnull align 4 dereferenceable(4) [[A:%.*]], double** nonnull align 4 dereferenceable(4) [[B:%.*]], double** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 22963 // CHECK12-NEXT: entry: 22964 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22965 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22966 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22967 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22968 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22969 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 22970 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 22971 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 22972 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 22973 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22974 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 22975 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22976 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22977 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 22978 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22979 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22980 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22981 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22982 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 22983 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22984 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22985 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22986 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22987 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22988 // CHECK12-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 22989 // CHECK12-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 22990 // CHECK12-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 22991 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22992 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22993 // CHECK12-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 22994 // CHECK12-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 22995 // CHECK12-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 22996 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 22997 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22998 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22999 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 23000 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23001 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23002 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23003 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 23004 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23005 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 23006 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23007 // CHECK12: omp.precond.then: 23008 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23009 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23010 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 23011 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23012 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23013 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 23014 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 23015 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23016 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23017 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23018 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23019 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23020 // CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23021 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 23022 // CHECK12-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 23023 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23024 // CHECK12: omp.dispatch.cond: 23025 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23026 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 23027 // CHECK12-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 23028 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 23029 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 23030 // CHECK12: omp.dispatch.body: 23031 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23032 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 23033 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23034 // CHECK12: omp.inner.for.cond: 23035 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 23036 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 23037 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 23038 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23039 // CHECK12: omp.inner.for.body: 23040 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 23041 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 23042 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23043 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !23 23044 // CHECK12-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !23 23045 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 23046 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 23047 // CHECK12-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !23 23048 // CHECK12-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !23 23049 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 23050 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 23051 // CHECK12-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !23 23052 // CHECK12-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 23053 // CHECK12-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !23 23054 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 23055 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 23056 // CHECK12-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !23 23057 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23058 // CHECK12: omp.body.continue: 23059 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23060 // CHECK12: omp.inner.for.inc: 23061 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 23062 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 23063 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 23064 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 23065 // CHECK12: omp.inner.for.end: 23066 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 23067 // CHECK12: omp.dispatch.inc: 23068 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 23069 // CHECK12: omp.dispatch.end: 23070 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 23071 // CHECK12: omp.precond.end: 23072 // CHECK12-NEXT: ret void 23073 // 23074 // 23075 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 23076 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] comdat { 23077 // CHECK12-NEXT: entry: 23078 // CHECK12-NEXT: [[A:%.*]] = alloca i32*, align 4 23079 // CHECK12-NEXT: [[B:%.*]] = alloca i32*, align 4 23080 // CHECK12-NEXT: [[C:%.*]] = alloca i32*, align 4 23081 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 23082 // CHECK12-NEXT: [[CH:%.*]] = alloca i32, align 4 23083 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 23084 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 23085 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 23086 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 23087 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 23088 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23089 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23090 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 23091 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 23092 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 23093 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 23094 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 23095 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 23096 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 23097 // CHECK12-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 23098 // CHECK12-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 23099 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 23100 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 23101 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 23102 // CHECK12-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 23103 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 23104 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 23105 // CHECK12-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 23106 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 23107 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 23108 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 23109 // CHECK12-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 23110 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 23111 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 23112 // CHECK12-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 23113 // CHECK12-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 23114 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 23115 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 23116 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 23117 // CHECK12-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 23118 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 23119 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 23120 // CHECK12-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 23121 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 23122 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 23123 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 23124 // CHECK12-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 23125 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 23126 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 23127 // CHECK12-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 23128 // CHECK12-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 23129 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 23130 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 23131 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 23132 // CHECK12-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 23133 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 23134 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 23135 // CHECK12-NEXT: store i32 10000, i32* [[N]], align 4 23136 // CHECK12-NEXT: store i32 100, i32* [[CH]], align 4 23137 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 23138 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 23139 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 23140 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 4 23141 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 4 23142 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 4 23143 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23144 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 23145 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 23146 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23147 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 23148 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 23149 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 23150 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 4 23151 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 23152 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 23153 // CHECK12-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 4 23154 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 23155 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 23156 // CHECK12-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 4 23157 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 23158 // CHECK12-NEXT: store i8* null, i8** [[TMP14]], align 4 23159 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 23160 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 23161 // CHECK12-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 4 23162 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 23163 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 23164 // CHECK12-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 4 23165 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 23166 // CHECK12-NEXT: store i8* null, i8** [[TMP19]], align 4 23167 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 23168 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 23169 // CHECK12-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 4 23170 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 23171 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 23172 // CHECK12-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 4 23173 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 23174 // CHECK12-NEXT: store i8* null, i8** [[TMP24]], align 4 23175 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23176 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23177 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 23178 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 23179 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23180 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 23181 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23182 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23183 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23184 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23185 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 23186 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 23187 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 23188 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23189 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 23190 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 23191 // CHECK12: omp_offload.failed: 23192 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i32 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 23193 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 23194 // CHECK12: omp_offload.cont: 23195 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 23196 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 23197 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 23198 // CHECK12-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 4 23199 // CHECK12-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 4 23200 // CHECK12-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 4 23201 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 23202 // CHECK12-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 23203 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 23204 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 23205 // CHECK12-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 23206 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 23207 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 23208 // CHECK12-NEXT: store i8* null, i8** [[TMP42]], align 4 23209 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 23210 // CHECK12-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 23211 // CHECK12-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 4 23212 // CHECK12-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 23213 // CHECK12-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 23214 // CHECK12-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 4 23215 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 23216 // CHECK12-NEXT: store i8* null, i8** [[TMP47]], align 4 23217 // CHECK12-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 23218 // CHECK12-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 23219 // CHECK12-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 4 23220 // CHECK12-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 23221 // CHECK12-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 23222 // CHECK12-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 4 23223 // CHECK12-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 23224 // CHECK12-NEXT: store i8* null, i8** [[TMP52]], align 4 23225 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 23226 // CHECK12-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 23227 // CHECK12-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 4 23228 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 23229 // CHECK12-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 23230 // CHECK12-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 4 23231 // CHECK12-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 23232 // CHECK12-NEXT: store i8* null, i8** [[TMP57]], align 4 23233 // CHECK12-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 23234 // CHECK12-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 23235 // CHECK12-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 23236 // CHECK12-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 23237 // CHECK12-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 23238 // CHECK12-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 23239 // CHECK12-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 23240 // CHECK12-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 23241 // CHECK12-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 23242 // CHECK12-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 23243 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 23244 // CHECK12-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 23245 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 23246 // CHECK12-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23247 // CHECK12-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 23248 // CHECK12-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 23249 // CHECK12: omp_offload.failed14: 23250 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i32 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 23251 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT15]] 23252 // CHECK12: omp_offload.cont15: 23253 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 23254 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 23255 // CHECK12-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 23256 // CHECK12-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 23257 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 23258 // CHECK12-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 23259 // CHECK12-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 4 23260 // CHECK12-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 4 23261 // CHECK12-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 4 23262 // CHECK12-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 23263 // CHECK12-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 23264 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 23265 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 23266 // CHECK12-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 23267 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 23268 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 23269 // CHECK12-NEXT: store i8* null, i8** [[TMP77]], align 4 23270 // CHECK12-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 23271 // CHECK12-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 23272 // CHECK12-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 23273 // CHECK12-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 23274 // CHECK12-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 23275 // CHECK12-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 23276 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 23277 // CHECK12-NEXT: store i8* null, i8** [[TMP82]], align 4 23278 // CHECK12-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 23279 // CHECK12-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 23280 // CHECK12-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 4 23281 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 23282 // CHECK12-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 23283 // CHECK12-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 4 23284 // CHECK12-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 23285 // CHECK12-NEXT: store i8* null, i8** [[TMP87]], align 4 23286 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 23287 // CHECK12-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 23288 // CHECK12-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 4 23289 // CHECK12-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 23290 // CHECK12-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 23291 // CHECK12-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 4 23292 // CHECK12-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 23293 // CHECK12-NEXT: store i8* null, i8** [[TMP92]], align 4 23294 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 23295 // CHECK12-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 23296 // CHECK12-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 4 23297 // CHECK12-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 23298 // CHECK12-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 23299 // CHECK12-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 4 23300 // CHECK12-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 23301 // CHECK12-NEXT: store i8* null, i8** [[TMP97]], align 4 23302 // CHECK12-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 23303 // CHECK12-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 23304 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 23305 // CHECK12-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 23306 // CHECK12-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 23307 // CHECK12-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 23308 // CHECK12-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 23309 // CHECK12-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 23310 // CHECK12-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 23311 // CHECK12-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 23312 // CHECK12-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 23313 // CHECK12-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 23314 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 23315 // CHECK12-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23316 // CHECK12-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 23317 // CHECK12-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 23318 // CHECK12: omp_offload.failed27: 23319 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i32 [[TMP67]], i32 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 23320 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT28]] 23321 // CHECK12: omp_offload.cont28: 23322 // CHECK12-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 23323 // CHECK12-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 23324 // CHECK12-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 23325 // CHECK12-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 4 23326 // CHECK12-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 4 23327 // CHECK12-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 4 23328 // CHECK12-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 23329 // CHECK12-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 23330 // CHECK12-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 23331 // CHECK12-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 23332 // CHECK12-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 23333 // CHECK12-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 23334 // CHECK12-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 23335 // CHECK12-NEXT: store i8* null, i8** [[TMP115]], align 4 23336 // CHECK12-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 23337 // CHECK12-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 23338 // CHECK12-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 4 23339 // CHECK12-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 23340 // CHECK12-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 23341 // CHECK12-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 4 23342 // CHECK12-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 23343 // CHECK12-NEXT: store i8* null, i8** [[TMP120]], align 4 23344 // CHECK12-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 23345 // CHECK12-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 23346 // CHECK12-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 4 23347 // CHECK12-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 23348 // CHECK12-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 23349 // CHECK12-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 4 23350 // CHECK12-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 23351 // CHECK12-NEXT: store i8* null, i8** [[TMP125]], align 4 23352 // CHECK12-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 23353 // CHECK12-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 23354 // CHECK12-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 4 23355 // CHECK12-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 23356 // CHECK12-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 23357 // CHECK12-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 4 23358 // CHECK12-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 23359 // CHECK12-NEXT: store i8* null, i8** [[TMP130]], align 4 23360 // CHECK12-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 23361 // CHECK12-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 23362 // CHECK12-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 23363 // CHECK12-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 23364 // CHECK12-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 23365 // CHECK12-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 23366 // CHECK12-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 23367 // CHECK12-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 23368 // CHECK12-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 23369 // CHECK12-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 23370 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 23371 // CHECK12-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 23372 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 23373 // CHECK12-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23374 // CHECK12-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 23375 // CHECK12-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 23376 // CHECK12: omp_offload.failed40: 23377 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i32 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 23378 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT41]] 23379 // CHECK12: omp_offload.cont41: 23380 // CHECK12-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 23381 // CHECK12-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 23382 // CHECK12-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 23383 // CHECK12-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 23384 // CHECK12-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 23385 // CHECK12-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 23386 // CHECK12-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 4 23387 // CHECK12-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 4 23388 // CHECK12-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 4 23389 // CHECK12-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 23390 // CHECK12-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 23391 // CHECK12-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 23392 // CHECK12-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 23393 // CHECK12-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 23394 // CHECK12-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 23395 // CHECK12-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 23396 // CHECK12-NEXT: store i8* null, i8** [[TMP150]], align 4 23397 // CHECK12-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 23398 // CHECK12-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 23399 // CHECK12-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 23400 // CHECK12-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 23401 // CHECK12-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 23402 // CHECK12-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 23403 // CHECK12-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 23404 // CHECK12-NEXT: store i8* null, i8** [[TMP155]], align 4 23405 // CHECK12-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 23406 // CHECK12-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 23407 // CHECK12-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 4 23408 // CHECK12-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 23409 // CHECK12-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 23410 // CHECK12-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 4 23411 // CHECK12-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 23412 // CHECK12-NEXT: store i8* null, i8** [[TMP160]], align 4 23413 // CHECK12-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 23414 // CHECK12-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 23415 // CHECK12-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 4 23416 // CHECK12-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 23417 // CHECK12-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 23418 // CHECK12-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 4 23419 // CHECK12-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 23420 // CHECK12-NEXT: store i8* null, i8** [[TMP165]], align 4 23421 // CHECK12-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 23422 // CHECK12-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 23423 // CHECK12-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 4 23424 // CHECK12-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 23425 // CHECK12-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 23426 // CHECK12-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 4 23427 // CHECK12-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 23428 // CHECK12-NEXT: store i8* null, i8** [[TMP170]], align 4 23429 // CHECK12-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 23430 // CHECK12-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 23431 // CHECK12-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 23432 // CHECK12-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 23433 // CHECK12-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 23434 // CHECK12-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 23435 // CHECK12-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 23436 // CHECK12-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 23437 // CHECK12-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 23438 // CHECK12-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 23439 // CHECK12-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 23440 // CHECK12-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 23441 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 23442 // CHECK12-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23443 // CHECK12-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 23444 // CHECK12-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 23445 // CHECK12: omp_offload.failed54: 23446 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i32 [[TMP140]], i32 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 23447 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT55]] 23448 // CHECK12: omp_offload.cont55: 23449 // CHECK12-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 23450 // CHECK12-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 23451 // CHECK12-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 23452 // CHECK12-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 4 23453 // CHECK12-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 4 23454 // CHECK12-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 4 23455 // CHECK12-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 23456 // CHECK12-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 23457 // CHECK12-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 23458 // CHECK12-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 23459 // CHECK12-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 23460 // CHECK12-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 23461 // CHECK12-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 23462 // CHECK12-NEXT: store i8* null, i8** [[TMP188]], align 4 23463 // CHECK12-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 23464 // CHECK12-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 23465 // CHECK12-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 4 23466 // CHECK12-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 23467 // CHECK12-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 23468 // CHECK12-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 4 23469 // CHECK12-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 23470 // CHECK12-NEXT: store i8* null, i8** [[TMP193]], align 4 23471 // CHECK12-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 23472 // CHECK12-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 23473 // CHECK12-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 4 23474 // CHECK12-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 23475 // CHECK12-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 23476 // CHECK12-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 4 23477 // CHECK12-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 23478 // CHECK12-NEXT: store i8* null, i8** [[TMP198]], align 4 23479 // CHECK12-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 23480 // CHECK12-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 23481 // CHECK12-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 4 23482 // CHECK12-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 23483 // CHECK12-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 23484 // CHECK12-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 4 23485 // CHECK12-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 23486 // CHECK12-NEXT: store i8* null, i8** [[TMP203]], align 4 23487 // CHECK12-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 23488 // CHECK12-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 23489 // CHECK12-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 23490 // CHECK12-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 23491 // CHECK12-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 23492 // CHECK12-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 23493 // CHECK12-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 23494 // CHECK12-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 23495 // CHECK12-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 23496 // CHECK12-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 23497 // CHECK12-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 23498 // CHECK12-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 23499 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 23500 // CHECK12-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23501 // CHECK12-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 23502 // CHECK12-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 23503 // CHECK12: omp_offload.failed67: 23504 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i32 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 23505 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT68]] 23506 // CHECK12: omp_offload.cont68: 23507 // CHECK12-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 23508 // CHECK12-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 23509 // CHECK12-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 23510 // CHECK12-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 23511 // CHECK12-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 23512 // CHECK12-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 23513 // CHECK12-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 4 23514 // CHECK12-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 4 23515 // CHECK12-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 4 23516 // CHECK12-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 23517 // CHECK12-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 23518 // CHECK12-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 23519 // CHECK12-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 23520 // CHECK12-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 23521 // CHECK12-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 23522 // CHECK12-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 23523 // CHECK12-NEXT: store i8* null, i8** [[TMP223]], align 4 23524 // CHECK12-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 23525 // CHECK12-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 23526 // CHECK12-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 23527 // CHECK12-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 23528 // CHECK12-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 23529 // CHECK12-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 23530 // CHECK12-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 23531 // CHECK12-NEXT: store i8* null, i8** [[TMP228]], align 4 23532 // CHECK12-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 23533 // CHECK12-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 23534 // CHECK12-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 4 23535 // CHECK12-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 23536 // CHECK12-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 23537 // CHECK12-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 4 23538 // CHECK12-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 23539 // CHECK12-NEXT: store i8* null, i8** [[TMP233]], align 4 23540 // CHECK12-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 23541 // CHECK12-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 23542 // CHECK12-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 4 23543 // CHECK12-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 23544 // CHECK12-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 23545 // CHECK12-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 4 23546 // CHECK12-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 23547 // CHECK12-NEXT: store i8* null, i8** [[TMP238]], align 4 23548 // CHECK12-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 23549 // CHECK12-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 23550 // CHECK12-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 4 23551 // CHECK12-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 23552 // CHECK12-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 23553 // CHECK12-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 4 23554 // CHECK12-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 23555 // CHECK12-NEXT: store i8* null, i8** [[TMP243]], align 4 23556 // CHECK12-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 23557 // CHECK12-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 23558 // CHECK12-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 23559 // CHECK12-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 23560 // CHECK12-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 23561 // CHECK12-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 23562 // CHECK12-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 23563 // CHECK12-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 23564 // CHECK12-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 23565 // CHECK12-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 23566 // CHECK12-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 23567 // CHECK12-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 23568 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 23569 // CHECK12-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23570 // CHECK12-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 23571 // CHECK12-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 23572 // CHECK12: omp_offload.failed81: 23573 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i32 [[TMP213]], i32 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 23574 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT82]] 23575 // CHECK12: omp_offload.cont82: 23576 // CHECK12-NEXT: ret i32 0 23577 // 23578 // 23579 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 23580 // CHECK12-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 23581 // CHECK12-NEXT: entry: 23582 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23583 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23584 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 23585 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 23586 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23587 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23588 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 23589 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 23590 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 23591 // CHECK12-NEXT: ret void 23592 // 23593 // 23594 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..26 23595 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 23596 // CHECK12-NEXT: entry: 23597 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23598 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23599 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23600 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 23601 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 23602 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 23603 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23604 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 23605 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23606 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23607 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 23608 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23609 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23610 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23611 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23612 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 23613 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23614 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23615 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23616 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 23617 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 23618 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 23619 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23620 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 23621 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 23622 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 23623 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 23624 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 23625 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23626 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 23627 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23628 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23629 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23630 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 23631 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23632 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 23633 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23634 // CHECK12: omp.precond.then: 23635 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23636 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23637 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 23638 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23639 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23640 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23641 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 23642 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23643 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23644 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23645 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 23646 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23647 // CHECK12: cond.true: 23648 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23649 // CHECK12-NEXT: br label [[COND_END:%.*]] 23650 // CHECK12: cond.false: 23651 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23652 // CHECK12-NEXT: br label [[COND_END]] 23653 // CHECK12: cond.end: 23654 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 23655 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23656 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23657 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 23658 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23659 // CHECK12: omp.inner.for.cond: 23660 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23661 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23662 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 23663 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23664 // CHECK12: omp.inner.for.body: 23665 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23666 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23667 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 23668 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23669 // CHECK12: omp.inner.for.inc: 23670 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23671 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23672 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 23673 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23674 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 23675 // CHECK12: omp.inner.for.end: 23676 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23677 // CHECK12: omp.loop.exit: 23678 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23679 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 23680 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 23681 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 23682 // CHECK12: omp.precond.end: 23683 // CHECK12-NEXT: ret void 23684 // 23685 // 23686 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..27 23687 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 23688 // CHECK12-NEXT: entry: 23689 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23690 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23691 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23692 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23693 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23694 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 23695 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 23696 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 23697 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23698 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 23699 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23700 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23701 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 23702 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23703 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23704 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23705 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23706 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 23707 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23708 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23709 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23710 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23711 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23712 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 23713 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 23714 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 23715 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23716 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 23717 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 23718 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 23719 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 23720 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 23721 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23722 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 23723 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23724 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23725 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23726 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 23727 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23728 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 23729 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23730 // CHECK12: omp.precond.then: 23731 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23732 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23733 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 23734 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23735 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23736 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 23737 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 23738 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23739 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23740 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23741 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 23742 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23743 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23744 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23745 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 23746 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23747 // CHECK12: cond.true: 23748 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23749 // CHECK12-NEXT: br label [[COND_END:%.*]] 23750 // CHECK12: cond.false: 23751 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23752 // CHECK12-NEXT: br label [[COND_END]] 23753 // CHECK12: cond.end: 23754 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 23755 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23756 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23757 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 23758 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23759 // CHECK12: omp.inner.for.cond: 23760 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23761 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23762 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 23763 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23764 // CHECK12: omp.inner.for.body: 23765 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23766 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 23767 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23768 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 23769 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23770 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 23771 // CHECK12-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 23772 // CHECK12-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 23773 // CHECK12-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 23774 // CHECK12: .cancel.exit: 23775 // CHECK12-NEXT: br label [[CANCEL_EXIT:%.*]] 23776 // CHECK12: .cancel.continue: 23777 // CHECK12-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 4 23778 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4 23779 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 23780 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 23781 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 4 23782 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4 23783 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 23784 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 23785 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 23786 // CHECK12-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 4 23787 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[I3]], align 4 23788 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i32 [[TMP31]] 23789 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 23790 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23791 // CHECK12: omp.body.continue: 23792 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23793 // CHECK12: omp.inner.for.inc: 23794 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23795 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 23796 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 23797 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 23798 // CHECK12: omp.inner.for.end: 23799 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23800 // CHECK12: omp.loop.exit: 23801 // CHECK12-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23802 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 23803 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 23804 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 23805 // CHECK12: cancel.exit: 23806 // CHECK12-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23807 // CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 23808 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 23809 // CHECK12-NEXT: br label [[CANCEL_CONT:%.*]] 23810 // CHECK12: omp.precond.end: 23811 // CHECK12-NEXT: br label [[CANCEL_CONT]] 23812 // CHECK12: cancel.cont: 23813 // CHECK12-NEXT: ret void 23814 // 23815 // 23816 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 23817 // CHECK12-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 23818 // CHECK12-NEXT: entry: 23819 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23820 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23821 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 23822 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 23823 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23824 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23825 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 23826 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 23827 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 23828 // CHECK12-NEXT: ret void 23829 // 23830 // 23831 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..30 23832 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 23833 // CHECK12-NEXT: entry: 23834 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23835 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23836 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23837 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 23838 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 23839 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 23840 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23841 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 23842 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23843 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23844 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 23845 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23846 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23847 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23848 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23849 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 23850 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23851 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23852 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23853 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 23854 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 23855 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 23856 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23857 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 23858 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 23859 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 23860 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 23861 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 23862 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23863 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 23864 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23865 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23866 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23867 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 23868 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23869 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 23870 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23871 // CHECK12: omp.precond.then: 23872 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23873 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23874 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 23875 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23876 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23877 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23878 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 23879 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23880 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23881 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23882 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 23883 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23884 // CHECK12: cond.true: 23885 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23886 // CHECK12-NEXT: br label [[COND_END:%.*]] 23887 // CHECK12: cond.false: 23888 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23889 // CHECK12-NEXT: br label [[COND_END]] 23890 // CHECK12: cond.end: 23891 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 23892 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23893 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23894 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 23895 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23896 // CHECK12: omp.inner.for.cond: 23897 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23898 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23899 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 23900 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23901 // CHECK12: omp.inner.for.body: 23902 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23903 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23904 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 23905 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23906 // CHECK12: omp.inner.for.inc: 23907 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23908 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23909 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 23910 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23911 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 23912 // CHECK12: omp.inner.for.end: 23913 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23914 // CHECK12: omp.loop.exit: 23915 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23916 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 23917 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 23918 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 23919 // CHECK12: omp.precond.end: 23920 // CHECK12-NEXT: ret void 23921 // 23922 // 23923 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..31 23924 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 23925 // CHECK12-NEXT: entry: 23926 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23927 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23928 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23929 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23930 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23931 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 23932 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 23933 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 23934 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23935 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 23936 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23937 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23938 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 23939 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23940 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23941 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23942 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23943 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 23944 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23945 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23946 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23947 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23948 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23949 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 23950 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 23951 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 23952 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23953 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 23954 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 23955 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 23956 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 23957 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 23958 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23959 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 23960 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23961 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23962 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23963 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 23964 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23965 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 23966 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23967 // CHECK12: omp.precond.then: 23968 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23969 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23970 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 23971 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23972 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23973 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 23974 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 23975 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23976 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23977 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23978 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 23979 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23980 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23981 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23982 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 23983 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23984 // CHECK12: cond.true: 23985 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23986 // CHECK12-NEXT: br label [[COND_END:%.*]] 23987 // CHECK12: cond.false: 23988 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23989 // CHECK12-NEXT: br label [[COND_END]] 23990 // CHECK12: cond.end: 23991 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 23992 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23993 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23994 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 23995 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23996 // CHECK12: omp.inner.for.cond: 23997 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23998 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23999 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 24000 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24001 // CHECK12: omp.inner.for.body: 24002 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24003 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 24004 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24005 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 24006 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 24007 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 24008 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 24009 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 24010 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 24011 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 24012 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 24013 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 24014 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 24015 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 24016 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 24017 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 24018 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 24019 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24020 // CHECK12: omp.body.continue: 24021 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24022 // CHECK12: omp.inner.for.inc: 24023 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24024 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 24025 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 24026 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24027 // CHECK12: omp.inner.for.end: 24028 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24029 // CHECK12: omp.loop.exit: 24030 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24031 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 24032 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 24033 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24034 // CHECK12: omp.precond.end: 24035 // CHECK12-NEXT: ret void 24036 // 24037 // 24038 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 24039 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 24040 // CHECK12-NEXT: entry: 24041 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 24042 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24043 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24044 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 24045 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 24046 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 24047 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24048 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24049 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 24050 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 24051 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 24052 // CHECK12-NEXT: ret void 24053 // 24054 // 24055 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..34 24056 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24057 // CHECK12-NEXT: entry: 24058 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24059 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24060 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 24061 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24062 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24063 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24064 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24065 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24066 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24067 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24068 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24069 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24070 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24071 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24072 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24073 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24074 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24075 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24076 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24077 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 24078 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24079 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24080 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24081 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24082 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 24083 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24084 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24085 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24086 // CHECK12-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24087 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 24088 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 24089 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24090 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 24091 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24092 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24093 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24094 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24095 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24096 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 24097 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24098 // CHECK12: omp.precond.then: 24099 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24100 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24101 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 24102 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24103 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24104 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 24105 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24106 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 24107 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 24108 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24109 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24110 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 24111 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24112 // CHECK12: cond.true: 24113 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24114 // CHECK12-NEXT: br label [[COND_END:%.*]] 24115 // CHECK12: cond.false: 24116 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24117 // CHECK12-NEXT: br label [[COND_END]] 24118 // CHECK12: cond.end: 24119 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 24120 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24121 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24122 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 24123 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24124 // CHECK12: omp.inner.for.cond: 24125 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24126 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24127 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 24128 // CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 24129 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24130 // CHECK12: omp.inner.for.body: 24131 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24132 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24133 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 24134 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24135 // CHECK12: omp.inner.for.inc: 24136 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24137 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24138 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 24139 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 24140 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24141 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24142 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 24143 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 24144 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24145 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24146 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 24147 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 24148 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24149 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24150 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 24151 // CHECK12-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 24152 // CHECK12: cond.true10: 24153 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24154 // CHECK12-NEXT: br label [[COND_END12:%.*]] 24155 // CHECK12: cond.false11: 24156 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24157 // CHECK12-NEXT: br label [[COND_END12]] 24158 // CHECK12: cond.end12: 24159 // CHECK12-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 24160 // CHECK12-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 24161 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24162 // CHECK12-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 24163 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24164 // CHECK12: omp.inner.for.end: 24165 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24166 // CHECK12: omp.loop.exit: 24167 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24168 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 24169 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 24170 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24171 // CHECK12: omp.precond.end: 24172 // CHECK12-NEXT: ret void 24173 // 24174 // 24175 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..35 24176 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24177 // CHECK12-NEXT: entry: 24178 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24179 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24180 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24181 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24182 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24183 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24184 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24185 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24186 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24187 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24188 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24189 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24190 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24191 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24192 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24193 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24194 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24195 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24196 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24197 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24198 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24199 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24200 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24201 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24202 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24203 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24204 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24205 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24206 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24207 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24208 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24209 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 24210 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24211 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24212 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24213 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24214 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24215 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24216 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24217 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24218 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24219 // CHECK12: omp.precond.then: 24220 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24221 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24222 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 24223 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24224 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24225 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 24226 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 24227 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24228 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24229 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24230 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 24231 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24232 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24233 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24234 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 24235 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24236 // CHECK12: cond.true: 24237 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24238 // CHECK12-NEXT: br label [[COND_END:%.*]] 24239 // CHECK12: cond.false: 24240 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24241 // CHECK12-NEXT: br label [[COND_END]] 24242 // CHECK12: cond.end: 24243 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 24244 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 24245 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24246 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 24247 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24248 // CHECK12: omp.inner.for.cond: 24249 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24250 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24251 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 24252 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24253 // CHECK12: omp.inner.for.body: 24254 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24255 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 24256 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24257 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 24258 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 24259 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 24260 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 24261 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 24262 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 24263 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 24264 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 24265 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 24266 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 24267 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 24268 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 24269 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 24270 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 24271 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24272 // CHECK12: omp.body.continue: 24273 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24274 // CHECK12: omp.inner.for.inc: 24275 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24276 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 24277 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 24278 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24279 // CHECK12: omp.inner.for.end: 24280 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24281 // CHECK12: omp.loop.exit: 24282 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24283 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 24284 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 24285 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24286 // CHECK12: omp.precond.end: 24287 // CHECK12-NEXT: ret void 24288 // 24289 // 24290 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 24291 // CHECK12-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 24292 // CHECK12-NEXT: entry: 24293 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24294 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24295 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 24296 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 24297 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24298 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24299 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 24300 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 24301 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 24302 // CHECK12-NEXT: ret void 24303 // 24304 // 24305 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..38 24306 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24307 // CHECK12-NEXT: entry: 24308 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24309 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24310 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24311 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24312 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24313 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24314 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24315 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24316 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24317 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24318 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24319 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24320 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24321 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24322 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24323 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24324 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24325 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24326 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24327 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24328 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24329 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24330 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24331 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24332 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24333 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24334 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24335 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 24336 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24337 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24338 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24339 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24340 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24341 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24342 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24343 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24344 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24345 // CHECK12: omp.precond.then: 24346 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24347 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24348 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 24349 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24350 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24351 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24352 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 24353 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24354 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24355 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24356 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 24357 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24358 // CHECK12: cond.true: 24359 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24360 // CHECK12-NEXT: br label [[COND_END:%.*]] 24361 // CHECK12: cond.false: 24362 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24363 // CHECK12-NEXT: br label [[COND_END]] 24364 // CHECK12: cond.end: 24365 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 24366 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24367 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24368 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 24369 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24370 // CHECK12: omp.inner.for.cond: 24371 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24372 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24373 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 24374 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24375 // CHECK12: omp.inner.for.body: 24376 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24377 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24378 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 24379 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24380 // CHECK12: omp.inner.for.inc: 24381 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24382 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24383 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 24384 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24385 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24386 // CHECK12: omp.inner.for.end: 24387 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24388 // CHECK12: omp.loop.exit: 24389 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24390 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 24391 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 24392 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24393 // CHECK12: omp.precond.end: 24394 // CHECK12-NEXT: ret void 24395 // 24396 // 24397 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..39 24398 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24399 // CHECK12-NEXT: entry: 24400 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24401 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24402 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24403 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24404 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24405 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24406 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24407 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24408 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24409 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24410 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24411 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24412 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24413 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24414 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24415 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24416 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24417 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24418 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24419 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24420 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24421 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24422 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24423 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24424 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24425 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24426 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24427 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24428 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24429 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24430 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24431 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 24432 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24433 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24434 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24435 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24436 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24437 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24438 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24439 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24440 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24441 // CHECK12: omp.precond.then: 24442 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24443 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24444 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 24445 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24446 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24447 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 24448 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 24449 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24450 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24451 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24452 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 24453 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24454 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24455 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24456 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 24457 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24458 // CHECK12: cond.true: 24459 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24460 // CHECK12-NEXT: br label [[COND_END:%.*]] 24461 // CHECK12: cond.false: 24462 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24463 // CHECK12-NEXT: br label [[COND_END]] 24464 // CHECK12: cond.end: 24465 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 24466 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 24467 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24468 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 24469 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24470 // CHECK12: omp.inner.for.cond: 24471 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24472 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24473 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 24474 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24475 // CHECK12: omp.inner.for.body: 24476 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24477 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 24478 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24479 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 24480 // CHECK12-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 24481 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 24482 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 24483 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 24484 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 24485 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 24486 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 24487 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 24488 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 24489 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 24490 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 24491 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 24492 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 24493 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24494 // CHECK12: omp.body.continue: 24495 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24496 // CHECK12: omp.inner.for.inc: 24497 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24498 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 24499 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 24500 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24501 // CHECK12: omp.inner.for.end: 24502 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24503 // CHECK12: omp.loop.exit: 24504 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24505 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 24506 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 24507 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24508 // CHECK12: omp.precond.end: 24509 // CHECK12-NEXT: ret void 24510 // 24511 // 24512 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 24513 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 24514 // CHECK12-NEXT: entry: 24515 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 24516 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24517 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24518 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 24519 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 24520 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 24521 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24522 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24523 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 24524 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 24525 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 24526 // CHECK12-NEXT: ret void 24527 // 24528 // 24529 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..42 24530 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24531 // CHECK12-NEXT: entry: 24532 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24533 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24534 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 24535 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24536 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24537 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24538 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24539 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24540 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24541 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24542 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24543 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 24544 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24545 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24546 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24547 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24548 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24549 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 24550 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24551 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24552 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24553 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 24554 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24555 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24556 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24557 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24558 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 24559 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24560 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24561 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24562 // CHECK12-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24563 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 24564 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 24565 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 24566 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24567 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24568 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 24569 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24570 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 24571 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 24572 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24573 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24574 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 24575 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24576 // CHECK12: omp.precond.then: 24577 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24578 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 24579 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 24580 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24581 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24582 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24583 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 24584 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24585 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24586 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 24587 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 24588 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24589 // CHECK12: cond.true: 24590 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 24591 // CHECK12-NEXT: br label [[COND_END:%.*]] 24592 // CHECK12: cond.false: 24593 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24594 // CHECK12-NEXT: br label [[COND_END]] 24595 // CHECK12: cond.end: 24596 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 24597 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24598 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24599 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 24600 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24601 // CHECK12: omp.inner.for.cond: 24602 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24603 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24604 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 24605 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24606 // CHECK12: omp.inner.for.body: 24607 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24608 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24609 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24610 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24611 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24612 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 24613 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24614 // CHECK12: omp.inner.for.inc: 24615 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24616 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24617 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 24618 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24619 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24620 // CHECK12: omp.inner.for.end: 24621 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24622 // CHECK12: omp.loop.exit: 24623 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24624 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 24625 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 24626 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24627 // CHECK12: omp.precond.end: 24628 // CHECK12-NEXT: ret void 24629 // 24630 // 24631 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..43 24632 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 24633 // CHECK12-NEXT: entry: 24634 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24635 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24636 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24637 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24638 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24639 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24640 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24641 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24642 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24643 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24644 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24645 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24646 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 24647 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24648 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24649 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24650 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24651 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24652 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 24653 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24654 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24655 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24656 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24657 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24658 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24659 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24660 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24661 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24662 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24663 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24664 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24665 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24666 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24667 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24668 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24669 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24670 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24671 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 24672 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 24673 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24674 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24675 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24676 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24677 // CHECK12: omp.precond.then: 24678 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24679 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 24680 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 24681 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24682 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24683 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 24684 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 24685 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24686 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24687 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24688 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24689 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 24690 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 24691 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24692 // CHECK12: omp.dispatch.cond: 24693 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24694 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24695 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 24696 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24697 // CHECK12: cond.true: 24698 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24699 // CHECK12-NEXT: br label [[COND_END:%.*]] 24700 // CHECK12: cond.false: 24701 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24702 // CHECK12-NEXT: br label [[COND_END]] 24703 // CHECK12: cond.end: 24704 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 24705 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 24706 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24707 // CHECK12-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 24708 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24709 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24710 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 24711 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24712 // CHECK12: omp.dispatch.body: 24713 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24714 // CHECK12: omp.inner.for.cond: 24715 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24716 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24717 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 24718 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24719 // CHECK12: omp.inner.for.body: 24720 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24721 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 24722 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24723 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 24724 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 4 24725 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 24726 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 24727 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 24728 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 4 24729 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 24730 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 24731 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 24732 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 24733 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 4 24734 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 24735 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i32 [[TMP30]] 24736 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX10]], align 4 24737 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24738 // CHECK12: omp.body.continue: 24739 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24740 // CHECK12: omp.inner.for.inc: 24741 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24742 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 24743 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 24744 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24745 // CHECK12: omp.inner.for.end: 24746 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24747 // CHECK12: omp.dispatch.inc: 24748 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24749 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24750 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 24751 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 24752 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24753 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24754 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 24755 // CHECK12-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 24756 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 24757 // CHECK12: omp.dispatch.end: 24758 // CHECK12-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24759 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 24760 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 24761 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24762 // CHECK12: omp.precond.end: 24763 // CHECK12-NEXT: ret void 24764 // 24765 // 24766 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 24767 // CHECK12-SAME: (i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 24768 // CHECK12-NEXT: entry: 24769 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24770 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24771 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 24772 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 24773 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24774 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24775 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 24776 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 24777 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 24778 // CHECK12-NEXT: ret void 24779 // 24780 // 24781 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..46 24782 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24783 // CHECK12-NEXT: entry: 24784 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24785 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24786 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24787 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24788 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24789 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24790 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24791 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24792 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24793 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24794 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24795 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24796 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24797 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24798 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24799 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24800 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24801 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24802 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24803 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24804 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24805 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24806 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24807 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24808 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24809 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24810 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24811 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 24812 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24813 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24814 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24815 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24816 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24817 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24818 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24819 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24820 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24821 // CHECK12: omp.precond.then: 24822 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24823 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24824 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 24825 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24826 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24827 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24828 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 24829 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24830 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24831 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24832 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 24833 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24834 // CHECK12: cond.true: 24835 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24836 // CHECK12-NEXT: br label [[COND_END:%.*]] 24837 // CHECK12: cond.false: 24838 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24839 // CHECK12-NEXT: br label [[COND_END]] 24840 // CHECK12: cond.end: 24841 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 24842 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24843 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24844 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 24845 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24846 // CHECK12: omp.inner.for.cond: 24847 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24848 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24849 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 24850 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24851 // CHECK12: omp.inner.for.body: 24852 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24853 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24854 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 24855 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24856 // CHECK12: omp.inner.for.inc: 24857 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24858 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24859 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 24860 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24861 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 24862 // CHECK12: omp.inner.for.end: 24863 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24864 // CHECK12: omp.loop.exit: 24865 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24866 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 24867 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 24868 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24869 // CHECK12: omp.precond.end: 24870 // CHECK12-NEXT: ret void 24871 // 24872 // 24873 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..47 24874 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 24875 // CHECK12-NEXT: entry: 24876 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24877 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24878 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24879 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24880 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24881 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 24882 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 24883 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 24884 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24885 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 24886 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24887 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24888 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 24889 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24890 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24891 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24892 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24893 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 24894 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24895 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24896 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24897 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24898 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24899 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 24900 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 24901 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 24902 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24903 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 24904 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 24905 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 24906 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 24907 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 24908 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24909 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 24910 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24911 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24912 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24913 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 24914 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24915 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 24916 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24917 // CHECK12: omp.precond.then: 24918 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24919 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24920 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 24921 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24922 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24923 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 24924 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 24925 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24926 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24927 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24928 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24929 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24930 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 24931 // CHECK12-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 24932 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24933 // CHECK12: omp.dispatch.cond: 24934 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24935 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 24936 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 24937 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 24938 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24939 // CHECK12: omp.dispatch.body: 24940 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24941 // CHECK12-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 24942 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24943 // CHECK12: omp.inner.for.cond: 24944 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 24945 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 24946 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 24947 // CHECK12-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24948 // CHECK12: omp.inner.for.body: 24949 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 24950 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 24951 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24952 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26 24953 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !26 24954 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 24955 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i32 [[TMP22]] 24956 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 24957 // CHECK12-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !26 24958 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 24959 // CHECK12-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 24960 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4, !llvm.access.group !26 24961 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 24962 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !26 24963 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 24964 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 24965 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX7]], align 4, !llvm.access.group !26 24966 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24967 // CHECK12: omp.body.continue: 24968 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24969 // CHECK12: omp.inner.for.inc: 24970 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 24971 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 24972 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 24973 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 24974 // CHECK12: omp.inner.for.end: 24975 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24976 // CHECK12: omp.dispatch.inc: 24977 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 24978 // CHECK12: omp.dispatch.end: 24979 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 24980 // CHECK12: omp.precond.end: 24981 // CHECK12-NEXT: ret void 24982 // 24983 // 24984 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 24985 // CHECK12-SAME: (i32 [[CH:%.*]], i32 [[N:%.*]], i32* [[A:%.*]], i32* [[B:%.*]], i32* [[C:%.*]]) #[[ATTR1]] { 24986 // CHECK12-NEXT: entry: 24987 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 24988 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24989 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24990 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 24991 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 24992 // CHECK12-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 24993 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24994 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24995 // CHECK12-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 24996 // CHECK12-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 24997 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 24998 // CHECK12-NEXT: ret void 24999 // 25000 // 25001 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..50 25002 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 25003 // CHECK12-NEXT: entry: 25004 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25005 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25006 // CHECK12-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 25007 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25008 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 25009 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 25010 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 25011 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25012 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25013 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 25014 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25015 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25016 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 25017 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25018 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25019 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25020 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25021 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 25022 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25023 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25024 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25025 // CHECK12-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 25026 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25027 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 25028 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 25029 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 25030 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 25031 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25032 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 25033 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 25034 // CHECK12-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 25035 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 25036 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 25037 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 25038 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25039 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25040 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 25041 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25042 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25043 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25044 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 25045 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25046 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 25047 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25048 // CHECK12: omp.precond.then: 25049 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25050 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25051 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 25052 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25053 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25054 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25055 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 25056 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25057 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25058 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25059 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 25060 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25061 // CHECK12: cond.true: 25062 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25063 // CHECK12-NEXT: br label [[COND_END:%.*]] 25064 // CHECK12: cond.false: 25065 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25066 // CHECK12-NEXT: br label [[COND_END]] 25067 // CHECK12: cond.end: 25068 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 25069 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25070 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25071 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 25072 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25073 // CHECK12: omp.inner.for.cond: 25074 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25075 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25076 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 25077 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25078 // CHECK12: omp.inner.for.body: 25079 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25080 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25081 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25082 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25083 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25084 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 25085 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25086 // CHECK12: omp.inner.for.inc: 25087 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25088 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25089 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 25090 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25091 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 25092 // CHECK12: omp.inner.for.end: 25093 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25094 // CHECK12: omp.loop.exit: 25095 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25096 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 25097 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 25098 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 25099 // CHECK12: omp.precond.end: 25100 // CHECK12-NEXT: ret void 25101 // 25102 // 25103 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..51 25104 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32** nonnull align 4 dereferenceable(4) [[A:%.*]], i32** nonnull align 4 dereferenceable(4) [[B:%.*]], i32** nonnull align 4 dereferenceable(4) [[C:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 25105 // CHECK12-NEXT: entry: 25106 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25107 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25108 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25109 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25110 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25111 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 25112 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 25113 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 25114 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25115 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25116 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 25117 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25118 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25119 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 25120 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25121 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25122 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25123 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25124 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 25125 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25126 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25127 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25128 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25129 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25130 // CHECK12-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 25131 // CHECK12-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 25132 // CHECK12-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 25133 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25134 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25135 // CHECK12-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 25136 // CHECK12-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 25137 // CHECK12-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 25138 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 25139 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25140 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25141 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 25142 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25143 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25144 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25145 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 25146 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25147 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 25148 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25149 // CHECK12: omp.precond.then: 25150 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25151 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25152 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 25153 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25154 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25155 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 25156 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 25157 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25158 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25159 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25160 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25161 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25162 // CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25163 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 25164 // CHECK12-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 25165 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 25166 // CHECK12: omp.dispatch.cond: 25167 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25168 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 25169 // CHECK12-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 25170 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 25171 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 25172 // CHECK12: omp.dispatch.body: 25173 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25174 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 25175 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25176 // CHECK12: omp.inner.for.cond: 25177 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 25178 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !29 25179 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 25180 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25181 // CHECK12: omp.inner.for.body: 25182 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 25183 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 25184 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25185 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !29 25186 // CHECK12-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !29 25187 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 25188 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i32 [[TMP23]] 25189 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !29 25190 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !29 25191 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 25192 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i32 [[TMP26]] 25193 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !29 25194 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 25195 // CHECK12-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !29 25196 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 25197 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i32 [[TMP29]] 25198 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4, !llvm.access.group !29 25199 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25200 // CHECK12: omp.body.continue: 25201 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25202 // CHECK12: omp.inner.for.inc: 25203 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 25204 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 25205 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 25206 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 25207 // CHECK12: omp.inner.for.end: 25208 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 25209 // CHECK12: omp.dispatch.inc: 25210 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 25211 // CHECK12: omp.dispatch.end: 25212 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 25213 // CHECK12: omp.precond.end: 25214 // CHECK12-NEXT: ret void 25215 // 25216 // 25217 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 25218 // CHECK12-SAME: () #[[ATTR4:[0-9]+]] { 25219 // CHECK12-NEXT: entry: 25220 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 25221 // CHECK12-NEXT: ret void 25222 // 25223