1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host code gen 3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 23 24 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 29 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 // expected-no-diagnostics 31 #ifndef HEADER 32 #define HEADER 33 34 35 template <typename T> 36 T tmain() { 37 T *a, *b, *c; 38 int n = 10000; 39 int ch = 100; 40 41 // no schedule clauses 42 #pragma omp target 43 #pragma omp teams 44 #pragma omp distribute parallel for 45 for (int i = 0; i < n; ++i) { 46 #pragma omp cancel for 47 a[i] = b[i] + c[i]; 48 } 49 50 // dist_schedule: static no chunk 51 #pragma omp target 52 #pragma omp teams 53 #pragma omp distribute parallel for dist_schedule(static) 54 for (int i = 0; i < n; ++i) { 55 a[i] = b[i] + c[i]; 56 } 57 58 // dist_schedule: static chunk 59 #pragma omp target 60 #pragma omp teams 61 #pragma omp distribute parallel for dist_schedule(static, ch) 62 for (int i = 0; i < n; ++i) { 63 a[i] = b[i] + c[i]; 64 } 65 66 // schedule: static no chunk 67 #pragma omp target 68 #pragma omp teams 69 #pragma omp distribute parallel for schedule(static) 70 for (int i = 0; i < n; ++i) { 71 a[i] = b[i] + c[i]; 72 } 73 74 // schedule: static chunk 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for schedule(static, ch) 78 for (int i = 0; i < n; ++i) { 79 a[i] = b[i] + c[i]; 80 } 81 82 // schedule: dynamic no chunk 83 #pragma omp target 84 #pragma omp teams 85 #pragma omp distribute parallel for schedule(dynamic) 86 for (int i = 0; i < n; ++i) { 87 a[i] = b[i] + c[i]; 88 } 89 90 // schedule: dynamic chunk 91 #pragma omp target 92 #pragma omp teams 93 #pragma omp distribute parallel for schedule(dynamic, ch) 94 for (int i = 0; i < n; ++i) { 95 a[i] = b[i] + c[i]; 96 } 97 98 return T(); 99 } 100 101 int main() { 102 double *a, *b, *c; 103 int n = 10000; 104 int ch = 100; 105 106 #ifdef LAMBDA 107 [&]() { 108 109 110 111 112 113 114 115 116 // no schedule clauses 117 #pragma omp target 118 #pragma omp teams 119 120 #pragma omp distribute parallel for 121 for (int i = 0; i < n; ++i) { 122 a[i] = b[i] + c[i]; 123 124 125 // check EUB for distribute 126 127 // initialize omp.iv 128 129 // check exit condition 130 131 // check that PrevLB and PrevUB are passed to the 'for' 132 // check that distlb and distub are properly passed to fork_call 133 134 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 135 136 137 // implementation of 'parallel for' 138 139 140 // initialize lb and ub to PrevLB and PrevUB 141 142 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 143 // In this case we use EUB 144 145 // initialize omp.iv 146 147 // check exit condition 148 149 // check that PrevLB and PrevUB are passed to the 'for' 150 151 // check stride 1 for 'for' in 'distribute parallel for' 152 153 154 [&]() { 155 a[i] = b[i] + c[i]; 156 }(); 157 } 158 159 // dist_schedule: static no chunk (same sa default - no dist_schedule) 160 #pragma omp target 161 #pragma omp teams 162 163 #pragma omp distribute parallel for dist_schedule(static) 164 for (int i = 0; i < n; ++i) { 165 a[i] = b[i] + c[i]; 166 167 168 // check EUB for distribute 169 170 // initialize omp.iv 171 172 // check exit condition 173 174 // check that PrevLB and PrevUB are passed to the 'for' 175 // check that distlb and distub are properly passed to fork_call 176 177 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 178 179 180 // implementation of 'parallel for' 181 182 183 // initialize lb and ub to PrevLB and PrevUB 184 185 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 186 // In this case we use EUB 187 188 // initialize omp.iv 189 190 // check exit condition 191 192 // check that PrevLB and PrevUB are passed to the 'for' 193 194 // check stride 1 for 'for' in 'distribute parallel for' 195 196 [&]() { 197 a[i] = b[i] + c[i]; 198 }(); 199 } 200 201 // dist_schedule: static chunk 202 #pragma omp target 203 #pragma omp teams 204 205 #pragma omp distribute parallel for dist_schedule(static, ch) 206 for (int i = 0; i < n; ++i) { 207 a[i] = b[i] + c[i]; 208 209 210 // check EUB for distribute 211 212 // initialize omp.iv 213 214 // check exit condition 215 216 // check that PrevLB and PrevUB are passed to the 'for' 217 // check that distlb and distub are properly passed to fork_call 218 219 // check DistInc 220 221 // Update UB 222 223 // Store LB in IV 224 225 226 // loop exit 227 228 // skip implementation of 'parallel for': using default scheduling and was tested above 229 [&]() { 230 a[i] = b[i] + c[i]; 231 }(); 232 } 233 234 // schedule: static no chunk 235 #pragma omp target 236 #pragma omp teams 237 238 #pragma omp distribute parallel for schedule(static) 239 for (int i = 0; i < n; ++i) { 240 a[i] = b[i] + c[i]; 241 242 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 243 244 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 245 246 247 // initialize lb and ub to PrevLB and PrevUB 248 249 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 250 // In this case we use EUB 251 252 // initialize omp.iv 253 254 // check exit condition 255 256 // check that PrevLB and PrevUB are passed to the 'for' 257 258 // check stride 1 for 'for' in 'distribute parallel for' 259 260 261 [&]() { 262 a[i] = b[i] + c[i]; 263 }(); 264 } 265 266 // schedule: static chunk 267 #pragma omp target 268 #pragma omp teams 269 270 #pragma omp distribute parallel for schedule(static, ch) 271 for (int i = 0; i < n; ++i) { 272 a[i] = b[i] + c[i]; 273 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 274 275 // 'parallel for' implementation using outer and inner loops and PrevEUB 276 277 // initialize lb and ub to PrevLB and PrevUB 278 279 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 280 281 // initialize omp.iv (IV = LB) 282 283 // outer loop: while (IV < UB) { 284 285 286 287 // skip body branch 288 289 // IV = IV + 1 and inner loop latch 290 291 // check NextLB and NextUB 292 293 294 [&]() { 295 a[i] = b[i] + c[i]; 296 }(); 297 } 298 299 // schedule: dynamic no chunk 300 #pragma omp target 301 #pragma omp teams 302 303 #pragma omp distribute parallel for schedule(dynamic) 304 for (int i = 0; i < n; ++i) { 305 a[i] = b[i] + c[i]; 306 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 307 308 // 'parallel for' implementation using outer and inner loops and PrevEUB 309 310 // initialize lb and ub to PrevLB and PrevUB 311 312 313 // initialize omp.iv (IV = LB) 314 315 316 // skip body branch 317 318 // IV = IV + 1 and inner loop latch 319 320 // check NextLB and NextUB 321 322 323 [&]() { 324 a[i] = b[i] + c[i]; 325 }(); 326 } 327 328 // schedule: dynamic chunk 329 #pragma omp target 330 #pragma omp teams 331 332 #pragma omp distribute parallel for schedule(dynamic, ch) 333 for (int i = 0; i < n; ++i) { 334 a[i] = b[i] + c[i]; 335 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 336 337 // 'parallel for' implementation using outer and inner loops and PrevEUB 338 339 // initialize lb and ub to PrevLB and PrevUB 340 341 342 // initialize omp.iv (IV = LB) 343 344 345 // skip body branch 346 347 // IV = IV + 1 and inner loop latch 348 349 // check NextLB and NextUB 350 351 352 [&]() { 353 a[i] = b[i] + c[i]; 354 }(); 355 } 356 }(); 357 return 0; 358 #else 359 360 361 362 363 364 365 366 367 368 // no schedule clauses 369 #pragma omp target 370 #pragma omp teams 371 372 #pragma omp distribute parallel for 373 for (int i = 0; i < n; ++i) { 374 a[i] = b[i] + c[i]; 375 376 377 // check EUB for distribute 378 379 // initialize omp.iv 380 381 // check exit condition 382 383 // check that PrevLB and PrevUB are passed to the 'for' 384 // check that distlb and distub are properly passed to fork_call 385 386 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 387 388 389 // implementation of 'parallel for' 390 391 392 // initialize lb and ub to PrevLB and PrevUB 393 394 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 395 // In this case we use EUB 396 397 // initialize omp.iv 398 399 // check exit condition 400 401 // check that PrevLB and PrevUB are passed to the 'for' 402 403 // check stride 1 for 'for' in 'distribute parallel for' 404 405 } 406 407 // dist_schedule: static no chunk 408 #pragma omp target 409 #pragma omp teams 410 411 #pragma omp distribute parallel for dist_schedule(static) 412 for (int i = 0; i < n; ++i) { 413 a[i] = b[i] + c[i]; 414 415 416 // check EUB for distribute 417 418 // initialize omp.iv 419 420 // check exit condition 421 422 // check that PrevLB and PrevUB are passed to the 'for' 423 // check that distlb and distub are properly passed to fork_call 424 425 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 426 427 428 // implementation of 'parallel for' 429 430 431 // initialize lb and ub to PrevLB and PrevUB 432 433 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 434 // In this case we use EUB 435 436 // initialize omp.iv 437 438 // check exit condition 439 440 // check that PrevLB and PrevUB are passed to the 'for' 441 442 // check stride 1 for 'for' in 'distribute parallel for' 443 444 } 445 446 // dist_schedule: static chunk 447 #pragma omp target 448 #pragma omp teams 449 450 #pragma omp distribute parallel for dist_schedule(static, ch) 451 for (int i = 0; i < n; ++i) { 452 a[i] = b[i] + c[i]; 453 454 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 455 456 // check EUB for distribute 457 458 // initialize omp.iv 459 460 // check exit condition 461 462 // check that PrevLB and PrevUB are passed to the 'for' 463 // check that distlb and distub are properly passed to fork_call 464 465 // check DistInc 466 467 // Update UB 468 469 // Store LB in IV 470 471 472 // loop exit 473 474 // skip implementation of 'parallel for': using default scheduling and was tested above 475 } 476 477 // schedule: static no chunk 478 #pragma omp target 479 #pragma omp teams 480 481 #pragma omp distribute parallel for schedule(static) 482 for (int i = 0; i < n; ++i) { 483 a[i] = b[i] + c[i]; 484 485 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 486 487 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 488 489 490 // initialize lb and ub to PrevLB and PrevUB 491 492 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 493 // In this case we use EUB 494 495 // initialize omp.iv 496 497 // check exit condition 498 499 // check that PrevLB and PrevUB are passed to the 'for' 500 501 // check stride 1 for 'for' in 'distribute parallel for' 502 503 } 504 505 // schedule: static chunk 506 #pragma omp target 507 #pragma omp teams 508 509 #pragma omp distribute parallel for schedule(static, ch) 510 for (int i = 0; i < n; ++i) { 511 a[i] = b[i] + c[i]; 512 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 513 514 // 'parallel for' implementation using outer and inner loops and PrevEUB 515 516 // initialize lb and ub to PrevLB and PrevUB 517 518 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 519 520 // initialize omp.iv (IV = LB) 521 522 // outer loop: while (IV < UB) { 523 524 525 526 // skip body branch 527 528 // IV = IV + 1 and inner loop latch 529 530 // check NextLB and NextUB 531 532 533 } 534 535 // schedule: dynamic no chunk 536 #pragma omp target 537 #pragma omp teams 538 539 #pragma omp distribute parallel for schedule(dynamic) 540 for (int i = 0; i < n; ++i) { 541 a[i] = b[i] + c[i]; 542 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 543 544 // 'parallel for' implementation using outer and inner loops and PrevEUB 545 546 // initialize lb and ub to PrevLB and PrevUB 547 548 549 // initialize omp.iv (IV = LB) 550 551 552 // skip body branch 553 554 // IV = IV + 1 and inner loop latch 555 556 // check NextLB and NextUB 557 558 559 } 560 561 // schedule: dynamic chunk 562 #pragma omp target 563 #pragma omp teams 564 565 #pragma omp distribute parallel for schedule(dynamic, ch) 566 for (int i = 0; i < n; ++i) { 567 a[i] = b[i] + c[i]; 568 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 569 570 // 'parallel for' implementation using outer and inner loops and PrevEUB 571 572 // initialize lb and ub to PrevLB and PrevUB 573 574 575 // initialize omp.iv (IV = LB) 576 577 578 // skip body branch 579 580 // IV = IV + 1 and inner loop latch 581 582 // check NextLB and NextUB 583 584 585 } 586 587 return tmain<int>(); 588 #endif 589 } 590 591 // check code 592 593 594 595 596 597 598 599 600 601 602 603 // check EUB for distribute 604 605 // initialize omp.iv 606 607 // check exit condition 608 609 // check that PrevLB and PrevUB are passed to the 'for' 610 // check that distlb and distub are properly passed to fork_call 611 612 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 613 614 615 // implementation of 'parallel for' 616 617 618 // initialize lb and ub to PrevLB and PrevUB 619 620 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 621 // In this case we use EUB 622 623 // initialize omp.iv 624 625 // check exit condition 626 627 // check that PrevLB and PrevUB are passed to the 'for' 628 629 // check stride 1 for 'for' in 'distribute parallel for' 630 631 632 633 634 635 // check EUB for distribute 636 637 // initialize omp.iv 638 639 // check exit condition 640 641 // check that PrevLB and PrevUB are passed to the 'for' 642 // check that distlb and distub are properly passed to fork_call 643 644 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 645 646 647 // implementation of 'parallel for' 648 649 650 // initialize lb and ub to PrevLB and PrevUB 651 652 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 653 // In this case we use EUB 654 655 // initialize omp.iv 656 657 // check exit condition 658 659 // check that PrevLB and PrevUB are passed to the 'for' 660 661 // check stride 1 for 'for' in 'distribute parallel for' 662 663 664 665 666 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 667 668 // check EUB for distribute 669 670 // initialize omp.iv 671 672 // check exit condition 673 674 // check that PrevLB and PrevUB are passed to the 'for' 675 // check that distlb and distub are properly passed to fork_call 676 677 // check DistInc 678 679 // Update UB 680 681 // Store LB in IV 682 683 684 // loop exit 685 686 // skip implementation of 'parallel for': using default scheduling and was tested above 687 688 689 690 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 691 692 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 693 694 695 // initialize lb and ub to PrevLB and PrevUB 696 697 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 698 // In this case we use EUB 699 700 // initialize omp.iv 701 702 // check exit condition 703 704 // check that PrevLB and PrevUB are passed to the 'for' 705 706 // check stride 1 for 'for' in 'distribute parallel for' 707 708 709 710 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 711 712 // 'parallel for' implementation using outer and inner loops and PrevEUB 713 714 // initialize lb and ub to PrevLB and PrevUB 715 716 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 717 718 // initialize omp.iv (IV = LB) 719 720 // outer loop: while (IV < UB) { 721 722 723 724 // skip body branch 725 726 // IV = IV + 1 and inner loop latch 727 728 // check NextLB and NextUB 729 730 731 732 733 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 734 735 // 'parallel for' implementation using outer and inner loops and PrevEUB 736 737 // initialize lb and ub to PrevLB and PrevUB 738 739 740 // initialize omp.iv (IV = LB) 741 742 743 // skip body branch 744 745 // IV = IV + 1 and inner loop latch 746 747 // check NextLB and NextUB 748 749 750 751 752 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 753 754 // 'parallel for' implementation using outer and inner loops and PrevEUB 755 756 // initialize lb and ub to PrevLB and PrevUB 757 758 759 // initialize omp.iv (IV = LB) 760 761 762 // skip body branch 763 764 // IV = IV + 1 and inner loop latch 765 766 // check NextLB and NextUB 767 768 769 #endif 770 // CHECK1-LABEL: define {{[^@]+}}@main 771 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 772 // CHECK1-NEXT: entry: 773 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 774 // CHECK1-NEXT: [[A:%.*]] = alloca double*, align 8 775 // CHECK1-NEXT: [[B:%.*]] = alloca double*, align 8 776 // CHECK1-NEXT: [[C:%.*]] = alloca double*, align 8 777 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 778 // CHECK1-NEXT: [[CH:%.*]] = alloca i32, align 4 779 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 780 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 781 // CHECK1-NEXT: store i32 10000, i32* [[N]], align 4 782 // CHECK1-NEXT: store i32 100, i32* [[CH]], align 4 783 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 784 // CHECK1-NEXT: store i32* [[N]], i32** [[TMP0]], align 8 785 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 786 // CHECK1-NEXT: store double** [[A]], double*** [[TMP1]], align 8 787 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 788 // CHECK1-NEXT: store double** [[B]], double*** [[TMP2]], align 8 789 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 790 // CHECK1-NEXT: store double** [[C]], double*** [[TMP3]], align 8 791 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 792 // CHECK1-NEXT: store i32* [[CH]], i32** [[TMP4]], align 8 793 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(40) [[REF_TMP]]) 794 // CHECK1-NEXT: ret i32 0 795 // 796 // 797 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 798 // CHECK1-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { 799 // CHECK1-NEXT: entry: 800 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 801 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 802 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 803 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 804 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 805 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 806 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 807 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 808 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 809 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 810 // CHECK1-NEXT: ret void 811 // 812 // 813 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 814 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 815 // CHECK1-NEXT: entry: 816 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 817 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 818 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 819 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 820 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 821 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 822 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 823 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 824 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 825 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 826 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 827 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 828 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 829 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 830 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 831 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 832 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 833 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 834 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 835 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 836 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 837 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 838 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 839 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 840 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 841 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 842 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 843 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 844 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 845 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 846 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 847 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 848 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 849 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 850 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 851 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 852 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 853 // CHECK1: omp.precond.then: 854 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 855 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 856 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 857 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 858 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 859 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 860 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 861 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 862 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 863 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 864 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 865 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 866 // CHECK1: cond.true: 867 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 868 // CHECK1-NEXT: br label [[COND_END:%.*]] 869 // CHECK1: cond.false: 870 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK1-NEXT: br label [[COND_END]] 872 // CHECK1: cond.end: 873 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 874 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 875 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 876 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 877 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 878 // CHECK1: omp.inner.for.cond: 879 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 880 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 881 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 882 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 883 // CHECK1: omp.inner.for.body: 884 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 885 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 886 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 887 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 888 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 889 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 890 // CHECK1: omp.inner.for.inc: 891 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 892 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 893 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 894 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 895 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 896 // CHECK1: omp.inner.for.end: 897 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 898 // CHECK1: omp.loop.exit: 899 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 900 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 901 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 902 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 903 // CHECK1: omp.precond.end: 904 // CHECK1-NEXT: ret void 905 // 906 // 907 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 908 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 909 // CHECK1-NEXT: entry: 910 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 911 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 912 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 913 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 914 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 915 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 916 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 917 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 918 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 919 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 920 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 921 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 922 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 923 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 924 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 928 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 929 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 930 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 931 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 932 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 933 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 934 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 935 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 936 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 937 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 938 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 939 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 940 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 941 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 942 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 943 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 944 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 945 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 946 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 947 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 948 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 949 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 950 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 951 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 952 // CHECK1: omp.precond.then: 953 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 954 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 955 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 956 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 957 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 958 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 959 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 960 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 961 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 962 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 963 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 964 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 965 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 966 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 967 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 968 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 969 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 970 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 971 // CHECK1: cond.true: 972 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 973 // CHECK1-NEXT: br label [[COND_END:%.*]] 974 // CHECK1: cond.false: 975 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 976 // CHECK1-NEXT: br label [[COND_END]] 977 // CHECK1: cond.end: 978 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 979 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 980 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 981 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 982 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 983 // CHECK1: omp.inner.for.cond: 984 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 985 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 986 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 987 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 988 // CHECK1: omp.inner.for.body: 989 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 990 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 991 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 992 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 993 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 994 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 995 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 996 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 997 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 998 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 999 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1000 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1001 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1002 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1003 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1004 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1005 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1006 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1007 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1008 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1009 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1010 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1011 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1012 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1013 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1014 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1015 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1016 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1017 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1018 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1019 // CHECK1: omp.body.continue: 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1021 // CHECK1: omp.inner.for.inc: 1022 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1023 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1024 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1025 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1026 // CHECK1: omp.inner.for.end: 1027 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1028 // CHECK1: omp.loop.exit: 1029 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1030 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1031 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1032 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1033 // CHECK1: omp.precond.end: 1034 // CHECK1-NEXT: ret void 1035 // 1036 // 1037 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 1038 // CHECK1-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 1039 // CHECK1-NEXT: entry: 1040 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1041 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1042 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1043 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1044 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1045 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1046 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1047 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1048 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1049 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1050 // CHECK1-NEXT: ret void 1051 // 1052 // 1053 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 1054 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1055 // CHECK1-NEXT: entry: 1056 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1057 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1058 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1059 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1060 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1061 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1062 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1063 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1064 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1065 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1066 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1067 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1068 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1069 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1070 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1071 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1072 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1073 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1074 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1075 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1076 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1077 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1078 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1079 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1080 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1081 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1082 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1083 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1084 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1085 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1086 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1087 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1088 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1089 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1090 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1091 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1092 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1093 // CHECK1: omp.precond.then: 1094 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1095 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1096 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1097 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1098 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1099 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1100 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1101 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1102 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1103 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1104 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1105 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1106 // CHECK1: cond.true: 1107 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1108 // CHECK1-NEXT: br label [[COND_END:%.*]] 1109 // CHECK1: cond.false: 1110 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1111 // CHECK1-NEXT: br label [[COND_END]] 1112 // CHECK1: cond.end: 1113 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1114 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1115 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1116 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1117 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1118 // CHECK1: omp.inner.for.cond: 1119 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1120 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1121 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1122 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1123 // CHECK1: omp.inner.for.body: 1124 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1125 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1126 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1127 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1128 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 1129 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1130 // CHECK1: omp.inner.for.inc: 1131 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1132 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1133 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1134 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1135 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1136 // CHECK1: omp.inner.for.end: 1137 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1138 // CHECK1: omp.loop.exit: 1139 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1140 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1141 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1142 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1143 // CHECK1: omp.precond.end: 1144 // CHECK1-NEXT: ret void 1145 // 1146 // 1147 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 1148 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1149 // CHECK1-NEXT: entry: 1150 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1151 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1152 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1153 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1154 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1155 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1156 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1157 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1158 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1159 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1160 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1161 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1162 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1163 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1164 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1165 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1166 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1167 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1168 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1169 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1170 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1171 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1172 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1173 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1174 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1175 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1176 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1177 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1178 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1179 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1180 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1181 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1182 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1184 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1185 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1186 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1187 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1188 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1189 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1190 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1191 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1192 // CHECK1: omp.precond.then: 1193 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1194 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1195 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1196 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1197 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1198 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1199 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1200 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1201 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1202 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1203 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1204 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1205 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1206 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1207 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1208 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1209 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1210 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1211 // CHECK1: cond.true: 1212 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1213 // CHECK1-NEXT: br label [[COND_END:%.*]] 1214 // CHECK1: cond.false: 1215 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1216 // CHECK1-NEXT: br label [[COND_END]] 1217 // CHECK1: cond.end: 1218 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1219 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1220 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1221 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1223 // CHECK1: omp.inner.for.cond: 1224 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1225 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1226 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1227 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1228 // CHECK1: omp.inner.for.body: 1229 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1230 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1231 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1232 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1233 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1234 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1235 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1236 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1237 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1238 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1239 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1240 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1241 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1242 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1243 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1244 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1245 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1246 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1247 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1248 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1249 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 1250 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1251 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 1252 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1253 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 1254 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1255 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 1256 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1257 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1258 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1259 // CHECK1: omp.body.continue: 1260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1261 // CHECK1: omp.inner.for.inc: 1262 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1263 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1264 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1265 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1266 // CHECK1: omp.inner.for.end: 1267 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1268 // CHECK1: omp.loop.exit: 1269 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1270 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1271 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1272 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1273 // CHECK1: omp.precond.end: 1274 // CHECK1-NEXT: ret void 1275 // 1276 // 1277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 1278 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 1279 // CHECK1-NEXT: entry: 1280 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1281 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1282 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1283 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1284 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1285 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 1286 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1287 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1288 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1289 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1290 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 1291 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1292 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1293 // CHECK1-NEXT: ret void 1294 // 1295 // 1296 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1297 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1298 // CHECK1-NEXT: entry: 1299 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1300 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1301 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 1302 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1303 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1304 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1305 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1306 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1307 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1308 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1309 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1310 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1311 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1312 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1313 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1314 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1315 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1316 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1317 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1318 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 1319 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1320 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1321 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1322 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1323 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 1324 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1325 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 1326 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 1327 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 1328 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 1329 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1330 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1331 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1332 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1333 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1334 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1335 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1336 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1337 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1338 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1339 // CHECK1: omp.precond.then: 1340 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1341 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1342 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 1343 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1344 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1345 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 1346 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1347 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1348 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 1349 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1350 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1351 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1352 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1353 // CHECK1: cond.true: 1354 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1355 // CHECK1-NEXT: br label [[COND_END:%.*]] 1356 // CHECK1: cond.false: 1357 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1358 // CHECK1-NEXT: br label [[COND_END]] 1359 // CHECK1: cond.end: 1360 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1361 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1362 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1363 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1365 // CHECK1: omp.inner.for.cond: 1366 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1367 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1368 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 1369 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 1370 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1371 // CHECK1: omp.inner.for.body: 1372 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1373 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1374 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1375 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 1377 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1378 // CHECK1: omp.inner.for.inc: 1379 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1380 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1381 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1382 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1383 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1384 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1385 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1386 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 1387 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1388 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1389 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 1390 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 1391 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1392 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1393 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 1394 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 1395 // CHECK1: cond.true10: 1396 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1397 // CHECK1-NEXT: br label [[COND_END12:%.*]] 1398 // CHECK1: cond.false11: 1399 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1400 // CHECK1-NEXT: br label [[COND_END12]] 1401 // CHECK1: cond.end12: 1402 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 1403 // CHECK1-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 1404 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1405 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 1406 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1407 // CHECK1: omp.inner.for.end: 1408 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1409 // CHECK1: omp.loop.exit: 1410 // CHECK1-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1411 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 1412 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 1413 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1414 // CHECK1: omp.precond.end: 1415 // CHECK1-NEXT: ret void 1416 // 1417 // 1418 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 1419 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1420 // CHECK1-NEXT: entry: 1421 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1422 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1423 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1424 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1425 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1426 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1427 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1428 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1429 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1430 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1431 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1432 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1434 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1435 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1436 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1437 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1438 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1439 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8 1440 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1441 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1442 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1443 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1444 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1445 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1446 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1447 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1448 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1449 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1450 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1451 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1452 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1453 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1454 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1455 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1456 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1457 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1458 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1459 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1460 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1461 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1462 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1463 // CHECK1: omp.precond.then: 1464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1465 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1466 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1467 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1468 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1469 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1470 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1471 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1472 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1473 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1475 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1476 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1477 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1478 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1479 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1480 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1481 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1482 // CHECK1: cond.true: 1483 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1484 // CHECK1-NEXT: br label [[COND_END:%.*]] 1485 // CHECK1: cond.false: 1486 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1487 // CHECK1-NEXT: br label [[COND_END]] 1488 // CHECK1: cond.end: 1489 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1490 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1491 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1492 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1494 // CHECK1: omp.inner.for.cond: 1495 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1496 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1497 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1498 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1499 // CHECK1: omp.inner.for.body: 1500 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1501 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1502 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1503 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1504 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1505 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1506 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1507 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1508 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1509 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1510 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1511 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1512 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1513 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1514 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1515 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1516 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1517 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1518 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1519 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1520 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 1521 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1522 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 1523 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1524 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 1525 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1526 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 1527 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1528 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1529 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1530 // CHECK1: omp.body.continue: 1531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1532 // CHECK1: omp.inner.for.inc: 1533 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1534 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1535 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1536 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1537 // CHECK1: omp.inner.for.end: 1538 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1539 // CHECK1: omp.loop.exit: 1540 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1541 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1542 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1543 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1544 // CHECK1: omp.precond.end: 1545 // CHECK1-NEXT: ret void 1546 // 1547 // 1548 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 1549 // CHECK1-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 1550 // CHECK1-NEXT: entry: 1551 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1552 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1553 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1554 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1555 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1556 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1557 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1558 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1559 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1560 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1561 // CHECK1-NEXT: ret void 1562 // 1563 // 1564 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1565 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1566 // CHECK1-NEXT: entry: 1567 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1568 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1569 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1570 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1571 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1572 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1573 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1574 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1575 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1576 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1577 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1578 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1579 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1580 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1581 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1582 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1583 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1584 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1585 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1586 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1587 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1588 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1589 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1590 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1591 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1592 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1593 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1594 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1595 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1596 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1597 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1598 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1599 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1600 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1601 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1602 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1603 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1604 // CHECK1: omp.precond.then: 1605 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1606 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1607 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 1608 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1609 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1610 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1611 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 1612 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1613 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1614 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1615 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1616 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1617 // CHECK1: cond.true: 1618 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1619 // CHECK1-NEXT: br label [[COND_END:%.*]] 1620 // CHECK1: cond.false: 1621 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1622 // CHECK1-NEXT: br label [[COND_END]] 1623 // CHECK1: cond.end: 1624 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1625 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1626 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1627 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 1628 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1629 // CHECK1: omp.inner.for.cond: 1630 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1631 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1632 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1633 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1634 // CHECK1: omp.inner.for.body: 1635 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1636 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1637 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1638 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1639 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 1640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1641 // CHECK1: omp.inner.for.inc: 1642 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1643 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1644 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1645 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1647 // CHECK1: omp.inner.for.end: 1648 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1649 // CHECK1: omp.loop.exit: 1650 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1651 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 1652 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 1653 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1654 // CHECK1: omp.precond.end: 1655 // CHECK1-NEXT: ret void 1656 // 1657 // 1658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1659 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1660 // CHECK1-NEXT: entry: 1661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1663 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1664 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1665 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1666 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1667 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1668 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1669 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1670 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1671 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1672 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1673 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1674 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1675 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1676 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1677 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1678 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1679 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 8 1680 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1681 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1682 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1683 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1684 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1685 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1686 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1687 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1688 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1689 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1690 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1691 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1693 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 1694 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1695 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1696 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1697 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1698 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1699 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1700 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1701 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1702 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1703 // CHECK1: omp.precond.then: 1704 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1705 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1706 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1707 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1708 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1709 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1710 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1711 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1712 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 1713 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1714 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1715 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1716 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1717 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1718 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1719 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1720 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1721 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1722 // CHECK1: cond.true: 1723 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1724 // CHECK1-NEXT: br label [[COND_END:%.*]] 1725 // CHECK1: cond.false: 1726 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1727 // CHECK1-NEXT: br label [[COND_END]] 1728 // CHECK1: cond.end: 1729 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1730 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1731 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1732 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1734 // CHECK1: omp.inner.for.cond: 1735 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1736 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1737 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1738 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1739 // CHECK1: omp.inner.for.body: 1740 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1741 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1742 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1743 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 1744 // CHECK1-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 1745 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 1746 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1747 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 1748 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 1749 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 1750 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 1751 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1752 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 1753 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 1754 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1755 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 1756 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 1757 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1758 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 1759 // CHECK1-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 1760 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 1761 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 8 1762 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 1763 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP29]], align 8 1764 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 1765 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 8 1766 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 1767 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 8 1768 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1769 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1770 // CHECK1: omp.body.continue: 1771 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1772 // CHECK1: omp.inner.for.inc: 1773 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1774 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1775 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 1776 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1777 // CHECK1: omp.inner.for.end: 1778 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1779 // CHECK1: omp.loop.exit: 1780 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1781 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1782 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 1783 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1784 // CHECK1: omp.precond.end: 1785 // CHECK1-NEXT: ret void 1786 // 1787 // 1788 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 1789 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 1790 // CHECK1-NEXT: entry: 1791 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1792 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1793 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 1794 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 1795 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 1796 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 1797 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1798 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 1799 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 1800 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 1801 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 1802 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1803 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 1804 // CHECK1-NEXT: ret void 1805 // 1806 // 1807 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 1808 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1809 // CHECK1-NEXT: entry: 1810 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1811 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1812 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 1813 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1814 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1815 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1816 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1817 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1818 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1819 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1820 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1821 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1822 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1823 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1824 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1825 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1826 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1827 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1828 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1829 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1830 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1831 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 1832 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1833 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1834 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1835 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1836 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 1837 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1838 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 1839 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 1840 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 1841 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 1842 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 1843 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 1844 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1845 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1846 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1847 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1848 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1849 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1850 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1851 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1852 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1853 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1854 // CHECK1: omp.precond.then: 1855 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1856 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1857 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 1858 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1859 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1860 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1861 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1862 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1863 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1864 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1865 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1866 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1867 // CHECK1: cond.true: 1868 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1869 // CHECK1-NEXT: br label [[COND_END:%.*]] 1870 // CHECK1: cond.false: 1871 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1872 // CHECK1-NEXT: br label [[COND_END]] 1873 // CHECK1: cond.end: 1874 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1875 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1876 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1877 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 1878 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1879 // CHECK1: omp.inner.for.cond: 1880 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1881 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1882 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1883 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1884 // CHECK1: omp.inner.for.body: 1885 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1886 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1887 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1888 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1889 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1890 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1891 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 1892 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1893 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 1894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1895 // CHECK1: omp.inner.for.inc: 1896 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1897 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1898 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1899 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1900 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1901 // CHECK1: omp.inner.for.end: 1902 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1903 // CHECK1: omp.loop.exit: 1904 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1905 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 1906 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 1907 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1908 // CHECK1: omp.precond.end: 1909 // CHECK1-NEXT: ret void 1910 // 1911 // 1912 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1913 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1914 // CHECK1-NEXT: entry: 1915 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1916 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1917 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1918 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1919 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 1920 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 1921 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 1922 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 1923 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1924 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1925 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1926 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1927 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1928 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1929 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1930 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1931 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1932 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1933 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 1934 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 1935 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1936 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1937 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1938 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1939 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 1940 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 1941 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 1942 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 1943 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1944 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 1945 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 1946 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 1947 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 1948 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1949 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 1950 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1951 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1952 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1953 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1954 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1955 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1956 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 1957 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1958 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1959 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1960 // CHECK1: omp.precond.then: 1961 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1962 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1963 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 1964 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1965 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 1966 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1967 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 1968 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 1969 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 1970 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1971 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1972 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 1973 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1974 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1975 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 1976 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1977 // CHECK1: omp.dispatch.cond: 1978 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1979 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1980 // CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 1981 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 1982 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1983 // CHECK1: cond.true: 1984 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1985 // CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 1986 // CHECK1-NEXT: br label [[COND_END:%.*]] 1987 // CHECK1: cond.false: 1988 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1989 // CHECK1-NEXT: br label [[COND_END]] 1990 // CHECK1: cond.end: 1991 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 1992 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1993 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1994 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 1995 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1996 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1997 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1998 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1999 // CHECK1: omp.dispatch.body: 2000 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2001 // CHECK1: omp.inner.for.cond: 2002 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2003 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2004 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2005 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2006 // CHECK1: omp.inner.for.body: 2007 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2008 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2009 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2010 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 2011 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 2012 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 2013 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2014 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 2015 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 2016 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 2017 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 2018 // CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 2019 // CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 2020 // CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 2021 // CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 2022 // CHECK1-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 2023 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 2024 // CHECK1-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 2025 // CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 2026 // CHECK1-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 2027 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 2028 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8 2029 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 2030 // CHECK1-NEXT: store i32* [[I6]], i32** [[TMP32]], align 8 2031 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 2032 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 8 2033 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 2034 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 8 2035 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 2036 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2037 // CHECK1: omp.body.continue: 2038 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2039 // CHECK1: omp.inner.for.inc: 2040 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2041 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 2042 // CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 2043 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2044 // CHECK1: omp.inner.for.end: 2045 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2046 // CHECK1: omp.dispatch.inc: 2047 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2048 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2049 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 2050 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 2051 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2052 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2053 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 2054 // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 2055 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2056 // CHECK1: omp.dispatch.end: 2057 // CHECK1-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2058 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 2059 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 2060 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2061 // CHECK1: omp.precond.end: 2062 // CHECK1-NEXT: ret void 2063 // 2064 // 2065 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 2066 // CHECK1-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 2067 // CHECK1-NEXT: entry: 2068 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2069 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2070 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2071 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2072 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2073 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2074 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2075 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2076 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2077 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2078 // CHECK1-NEXT: ret void 2079 // 2080 // 2081 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18 2082 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2083 // CHECK1-NEXT: entry: 2084 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2085 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2086 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2087 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2088 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2089 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2090 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2091 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2092 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2093 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2094 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2095 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2096 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2097 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2098 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2099 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 2100 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2101 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2102 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2103 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2104 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2105 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2107 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2108 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2109 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2110 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2111 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2112 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2113 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2114 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2115 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2116 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2117 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2118 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2119 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2120 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2121 // CHECK1: omp.precond.then: 2122 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2123 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2124 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2125 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2126 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2127 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2128 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2129 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2130 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2131 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2132 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2133 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2134 // CHECK1: cond.true: 2135 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2136 // CHECK1-NEXT: br label [[COND_END:%.*]] 2137 // CHECK1: cond.false: 2138 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2139 // CHECK1-NEXT: br label [[COND_END]] 2140 // CHECK1: cond.end: 2141 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2142 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2143 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2144 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2145 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2146 // CHECK1: omp.inner.for.cond: 2147 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2148 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2149 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2150 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2151 // CHECK1: omp.inner.for.body: 2152 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2153 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2154 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2155 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2157 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2158 // CHECK1: omp.inner.for.inc: 2159 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2160 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2161 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2162 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2163 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2164 // CHECK1: omp.inner.for.end: 2165 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2166 // CHECK1: omp.loop.exit: 2167 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2168 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 2169 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 2170 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2171 // CHECK1: omp.precond.end: 2172 // CHECK1-NEXT: ret void 2173 // 2174 // 2175 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..19 2176 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2177 // CHECK1-NEXT: entry: 2178 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2179 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2180 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2181 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2182 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2183 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2184 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2185 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2186 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2187 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2188 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2189 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2190 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2191 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2192 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2193 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2194 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2195 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2196 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 8 2197 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2198 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2199 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2200 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2201 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2202 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2203 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2204 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2206 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2207 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2208 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2209 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2210 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2211 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2212 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2213 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2214 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2215 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2216 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2217 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2218 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2219 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2220 // CHECK1: omp.precond.then: 2221 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2222 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2223 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2224 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2225 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2226 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2227 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 2228 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2229 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 2230 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2231 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2232 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2233 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2234 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2235 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 2236 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 2237 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2238 // CHECK1: omp.dispatch.cond: 2239 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2240 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2241 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2242 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 2243 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2244 // CHECK1: omp.dispatch.body: 2245 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2246 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 2247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2248 // CHECK1: omp.inner.for.cond: 2249 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2250 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2251 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 2252 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2253 // CHECK1: omp.inner.for.body: 2254 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2255 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 2256 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2257 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 2258 // CHECK1-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !12 2259 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2260 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 2261 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 2262 // CHECK1-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !12 2263 // CHECK1-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !12 2264 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2265 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 2266 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 2267 // CHECK1-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !12 2268 // CHECK1-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 2269 // CHECK1-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !12 2270 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2271 // CHECK1-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 2272 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 2273 // CHECK1-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !12 2274 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 2275 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 8, !llvm.access.group !12 2276 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 2277 // CHECK1-NEXT: store i32* [[I4]], i32** [[TMP30]], align 8, !llvm.access.group !12 2278 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 2279 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 8, !llvm.access.group !12 2280 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 2281 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 8, !llvm.access.group !12 2282 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !12 2283 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2284 // CHECK1: omp.body.continue: 2285 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2286 // CHECK1: omp.inner.for.inc: 2287 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2288 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP33]], 1 2289 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2290 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2291 // CHECK1: omp.inner.for.end: 2292 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2293 // CHECK1: omp.dispatch.inc: 2294 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2295 // CHECK1: omp.dispatch.end: 2296 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2297 // CHECK1: omp.precond.end: 2298 // CHECK1-NEXT: ret void 2299 // 2300 // 2301 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 2302 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 2303 // CHECK1-NEXT: entry: 2304 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 2305 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2306 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 2307 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 2308 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 2309 // CHECK1-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 2310 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2311 // CHECK1-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 2312 // CHECK1-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 2313 // CHECK1-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 2314 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 2315 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2316 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2317 // CHECK1-NEXT: ret void 2318 // 2319 // 2320 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22 2321 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2322 // CHECK1-NEXT: entry: 2323 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2324 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2325 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 2326 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2327 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2328 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2329 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2330 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2331 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2332 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2333 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2334 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2335 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2336 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2337 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2338 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2339 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2340 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2341 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2342 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2343 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2344 // CHECK1-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 2345 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2346 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2347 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2348 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2349 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 2350 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2351 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 2352 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 2353 // CHECK1-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 2354 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 2355 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 2356 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 2357 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2358 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2359 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2360 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2361 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2362 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2363 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2364 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2365 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2366 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2367 // CHECK1: omp.precond.then: 2368 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2369 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2370 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 2371 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2372 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2373 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2375 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2376 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2377 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2378 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2379 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2380 // CHECK1: cond.true: 2381 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2382 // CHECK1-NEXT: br label [[COND_END:%.*]] 2383 // CHECK1: cond.false: 2384 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2385 // CHECK1-NEXT: br label [[COND_END]] 2386 // CHECK1: cond.end: 2387 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2388 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2389 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2390 // CHECK1-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 2391 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2392 // CHECK1: omp.inner.for.cond: 2393 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2394 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2395 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2396 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2397 // CHECK1: omp.inner.for.body: 2398 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2399 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2400 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2401 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 2402 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2403 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2404 // CHECK1-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 2405 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2406 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 2407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2408 // CHECK1: omp.inner.for.inc: 2409 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2410 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2411 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 2412 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2414 // CHECK1: omp.inner.for.end: 2415 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2416 // CHECK1: omp.loop.exit: 2417 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2418 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 2419 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 2420 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2421 // CHECK1: omp.precond.end: 2422 // CHECK1-NEXT: ret void 2423 // 2424 // 2425 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..23 2426 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2427 // CHECK1-NEXT: entry: 2428 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2429 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2430 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2431 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2432 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 2433 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 2434 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 2435 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 2436 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2437 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2438 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2439 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2440 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2441 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2446 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 2447 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 8 2448 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2449 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2450 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2451 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2452 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 2453 // CHECK1-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 2454 // CHECK1-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 2455 // CHECK1-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 2456 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2457 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 2458 // CHECK1-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 2459 // CHECK1-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 2460 // CHECK1-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 2461 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2462 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2463 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2464 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2465 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2466 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2467 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2468 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2469 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4 2470 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2471 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2472 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2473 // CHECK1: omp.precond.then: 2474 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2475 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2476 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2477 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2478 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 2479 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2480 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 2481 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 2482 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 2483 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2484 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2485 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 2486 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2487 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2488 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2489 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 2490 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 2491 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2492 // CHECK1: omp.dispatch.cond: 2493 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2494 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 2495 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2496 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 2497 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2498 // CHECK1: omp.dispatch.body: 2499 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2500 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 2501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2502 // CHECK1: omp.inner.for.cond: 2503 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2504 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 2505 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2506 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2507 // CHECK1: omp.inner.for.body: 2508 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !15 2512 // CHECK1-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !15 2513 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2514 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2515 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 2516 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !15 2517 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !15 2518 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2519 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 2520 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 2521 // CHECK1-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !15 2522 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 2523 // CHECK1-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !15 2524 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 2525 // CHECK1-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 2526 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 2527 // CHECK1-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !15 2528 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 2529 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 8, !llvm.access.group !15 2530 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 2531 // CHECK1-NEXT: store i32* [[I6]], i32** [[TMP31]], align 8, !llvm.access.group !15 2532 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 2533 // CHECK1-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 8, !llvm.access.group !15 2534 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 2535 // CHECK1-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 8, !llvm.access.group !15 2536 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !15 2537 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2538 // CHECK1: omp.body.continue: 2539 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2540 // CHECK1: omp.inner.for.inc: 2541 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2542 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], 1 2543 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2545 // CHECK1: omp.inner.for.end: 2546 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2547 // CHECK1: omp.dispatch.inc: 2548 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2549 // CHECK1: omp.dispatch.end: 2550 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2551 // CHECK1: omp.precond.end: 2552 // CHECK1-NEXT: ret void 2553 // 2554 // 2555 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2556 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 2557 // CHECK1-NEXT: entry: 2558 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 2559 // CHECK1-NEXT: ret void 2560 // 2561 // 2562 // CHECK3-LABEL: define {{[^@]+}}@main 2563 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2564 // CHECK3-NEXT: entry: 2565 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2566 // CHECK3-NEXT: [[A:%.*]] = alloca double*, align 4 2567 // CHECK3-NEXT: [[B:%.*]] = alloca double*, align 4 2568 // CHECK3-NEXT: [[C:%.*]] = alloca double*, align 4 2569 // CHECK3-NEXT: [[N:%.*]] = alloca i32, align 4 2570 // CHECK3-NEXT: [[CH:%.*]] = alloca i32, align 4 2571 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 2572 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 2573 // CHECK3-NEXT: store i32 10000, i32* [[N]], align 4 2574 // CHECK3-NEXT: store i32 100, i32* [[CH]], align 4 2575 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0 2576 // CHECK3-NEXT: store i32* [[N]], i32** [[TMP0]], align 4 2577 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1 2578 // CHECK3-NEXT: store double** [[A]], double*** [[TMP1]], align 4 2579 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 2 2580 // CHECK3-NEXT: store double** [[B]], double*** [[TMP2]], align 4 2581 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 3 2582 // CHECK3-NEXT: store double** [[C]], double*** [[TMP3]], align 4 2583 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 4 2584 // CHECK3-NEXT: store i32* [[CH]], i32** [[TMP4]], align 4 2585 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(20) [[REF_TMP]]) 2586 // CHECK3-NEXT: ret i32 0 2587 // 2588 // 2589 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 2590 // CHECK3-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { 2591 // CHECK3-NEXT: entry: 2592 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2593 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 2594 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 2595 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 2596 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2597 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 2598 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 2599 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 2600 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2601 // CHECK3-NEXT: ret void 2602 // 2603 // 2604 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 2605 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2606 // CHECK3-NEXT: entry: 2607 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2608 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2609 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2610 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 2611 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 2612 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 2613 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2614 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2615 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2616 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2617 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2618 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2619 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2620 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2621 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2622 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2623 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2624 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2625 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2626 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 2627 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 2628 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 2629 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2630 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 2631 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 2632 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 2633 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2634 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2635 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2636 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2637 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2638 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2639 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2640 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2641 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2642 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2643 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2644 // CHECK3: omp.precond.then: 2645 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2646 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2647 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2648 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2649 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2650 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2651 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2652 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2653 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2654 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2655 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2656 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2657 // CHECK3: cond.true: 2658 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2659 // CHECK3-NEXT: br label [[COND_END:%.*]] 2660 // CHECK3: cond.false: 2661 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2662 // CHECK3-NEXT: br label [[COND_END]] 2663 // CHECK3: cond.end: 2664 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2665 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2666 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2667 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2668 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2669 // CHECK3: omp.inner.for.cond: 2670 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2671 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2672 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2673 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2674 // CHECK3: omp.inner.for.body: 2675 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2676 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2677 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2678 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2679 // CHECK3: omp.inner.for.inc: 2680 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2681 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2682 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2683 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2685 // CHECK3: omp.inner.for.end: 2686 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2687 // CHECK3: omp.loop.exit: 2688 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2689 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2690 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2691 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 2692 // CHECK3: omp.precond.end: 2693 // CHECK3-NEXT: ret void 2694 // 2695 // 2696 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 2697 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2698 // CHECK3-NEXT: entry: 2699 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2700 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2701 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2702 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2703 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2704 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 2705 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 2706 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 2707 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2708 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2709 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2710 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2711 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2712 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2713 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2714 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2715 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2716 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2717 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 2718 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2719 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2720 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2721 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2722 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2723 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 2724 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 2725 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 2726 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2727 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 2728 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 2729 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 2730 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2731 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2732 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2733 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2734 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2735 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2736 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2737 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2738 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2739 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2740 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2741 // CHECK3: omp.precond.then: 2742 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2743 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2744 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2745 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2746 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2747 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 2748 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 2749 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2750 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2751 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2752 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2753 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2754 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2755 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2756 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2757 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2758 // CHECK3: cond.true: 2759 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2760 // CHECK3-NEXT: br label [[COND_END:%.*]] 2761 // CHECK3: cond.false: 2762 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2763 // CHECK3-NEXT: br label [[COND_END]] 2764 // CHECK3: cond.end: 2765 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2766 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2767 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2768 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 2769 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2770 // CHECK3: omp.inner.for.cond: 2771 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2772 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2773 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2774 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2775 // CHECK3: omp.inner.for.body: 2776 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2777 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2778 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2779 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2780 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 2781 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 2782 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 2783 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 2784 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 2785 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 2786 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 2787 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 2788 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 2789 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 2790 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 2791 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 2792 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 2793 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2794 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 2795 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 2796 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 2797 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 2798 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 2799 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 2800 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 2801 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 2802 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2803 // CHECK3: omp.body.continue: 2804 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2805 // CHECK3: omp.inner.for.inc: 2806 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2807 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 2808 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 2809 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2810 // CHECK3: omp.inner.for.end: 2811 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2812 // CHECK3: omp.loop.exit: 2813 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2814 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2815 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 2816 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 2817 // CHECK3: omp.precond.end: 2818 // CHECK3-NEXT: ret void 2819 // 2820 // 2821 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 2822 // CHECK3-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 2823 // CHECK3-NEXT: entry: 2824 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2825 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 2826 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 2827 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 2828 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2829 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 2830 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 2831 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 2832 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 2833 // CHECK3-NEXT: ret void 2834 // 2835 // 2836 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 2837 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2838 // CHECK3-NEXT: entry: 2839 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2840 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2841 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2842 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 2843 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 2844 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 2845 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2846 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2847 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2848 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2849 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2850 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2851 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2852 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2853 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2854 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2855 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2856 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2857 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2858 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 2859 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 2860 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 2861 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2862 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 2863 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 2864 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 2865 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2866 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2867 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2868 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2869 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2870 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2871 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2872 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2873 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2874 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2875 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2876 // CHECK3: omp.precond.then: 2877 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2878 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2879 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 2880 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2881 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2882 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2883 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 2884 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2885 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2886 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2887 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2888 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2889 // CHECK3: cond.true: 2890 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2891 // CHECK3-NEXT: br label [[COND_END:%.*]] 2892 // CHECK3: cond.false: 2893 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2894 // CHECK3-NEXT: br label [[COND_END]] 2895 // CHECK3: cond.end: 2896 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2897 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2898 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2899 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 2900 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2901 // CHECK3: omp.inner.for.cond: 2902 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2903 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2904 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2905 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2906 // CHECK3: omp.inner.for.body: 2907 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2908 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2909 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 2910 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2911 // CHECK3: omp.inner.for.inc: 2912 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2913 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2914 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2915 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2916 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2917 // CHECK3: omp.inner.for.end: 2918 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2919 // CHECK3: omp.loop.exit: 2920 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2921 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 2922 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 2923 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 2924 // CHECK3: omp.precond.end: 2925 // CHECK3-NEXT: ret void 2926 // 2927 // 2928 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 2929 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2930 // CHECK3-NEXT: entry: 2931 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2932 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2933 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2934 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2935 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 2936 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 2937 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 2938 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 2939 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2940 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2941 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2942 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2943 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2944 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2945 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2946 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2947 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2948 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2949 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 2950 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2951 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2952 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2953 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2954 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 2955 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 2956 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 2957 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 2958 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 2959 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 2960 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 2961 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 2962 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 2963 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 2964 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2965 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2966 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2967 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2968 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2969 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 2970 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2971 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2972 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2973 // CHECK3: omp.precond.then: 2974 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2975 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2976 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 2977 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2978 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2979 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 2980 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 2981 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2982 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2983 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2984 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 2985 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2986 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2987 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2988 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2989 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2990 // CHECK3: cond.true: 2991 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2992 // CHECK3-NEXT: br label [[COND_END:%.*]] 2993 // CHECK3: cond.false: 2994 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2995 // CHECK3-NEXT: br label [[COND_END]] 2996 // CHECK3: cond.end: 2997 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2998 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2999 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3000 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3001 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3002 // CHECK3: omp.inner.for.cond: 3003 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3004 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3005 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3006 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3007 // CHECK3: omp.inner.for.body: 3008 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3009 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3010 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3011 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3012 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 3013 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 3014 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 3015 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 3016 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 3017 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 3018 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 3019 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 3020 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3021 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 3022 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 3023 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 3024 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 3025 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 3026 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 3027 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 3028 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 3029 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 3030 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 3031 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 3032 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 3033 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(%class.anon.1* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 3034 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3035 // CHECK3: omp.body.continue: 3036 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3037 // CHECK3: omp.inner.for.inc: 3038 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3039 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3040 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3041 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3042 // CHECK3: omp.inner.for.end: 3043 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3044 // CHECK3: omp.loop.exit: 3045 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3046 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3047 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3048 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3049 // CHECK3: omp.precond.end: 3050 // CHECK3-NEXT: ret void 3051 // 3052 // 3053 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 3054 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 3055 // CHECK3-NEXT: entry: 3056 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 3057 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3058 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 3059 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 3060 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 3061 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 3062 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3063 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 3064 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 3065 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 3066 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3067 // CHECK3-NEXT: ret void 3068 // 3069 // 3070 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 3071 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3072 // CHECK3-NEXT: entry: 3073 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3074 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3075 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 3076 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3077 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3078 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3079 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3080 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3081 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3082 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3083 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3084 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3085 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3086 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3087 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3088 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3089 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3090 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3091 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3092 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 3093 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3094 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3095 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3096 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3097 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 3098 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3099 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 3100 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 3101 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 3102 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 3103 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3104 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3105 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3106 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3107 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3108 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3109 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3110 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3111 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3112 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3113 // CHECK3: omp.precond.then: 3114 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3115 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3116 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 3117 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3118 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3119 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 3120 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3121 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3122 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 3123 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3124 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3125 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3126 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3127 // CHECK3: cond.true: 3128 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3129 // CHECK3-NEXT: br label [[COND_END:%.*]] 3130 // CHECK3: cond.false: 3131 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3132 // CHECK3-NEXT: br label [[COND_END]] 3133 // CHECK3: cond.end: 3134 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3135 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3136 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3137 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3139 // CHECK3: omp.inner.for.cond: 3140 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3141 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3142 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3143 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3144 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3145 // CHECK3: omp.inner.for.body: 3146 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3147 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3148 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 3149 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3150 // CHECK3: omp.inner.for.inc: 3151 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3152 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3153 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3154 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3155 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3156 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3157 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3158 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 3159 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3160 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3161 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 3162 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 3163 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3164 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3165 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 3166 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 3167 // CHECK3: cond.true10: 3168 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3169 // CHECK3-NEXT: br label [[COND_END12:%.*]] 3170 // CHECK3: cond.false11: 3171 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3172 // CHECK3-NEXT: br label [[COND_END12]] 3173 // CHECK3: cond.end12: 3174 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 3175 // CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 3176 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3177 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 3178 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3179 // CHECK3: omp.inner.for.end: 3180 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3181 // CHECK3: omp.loop.exit: 3182 // CHECK3-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3183 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 3184 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 3185 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3186 // CHECK3: omp.precond.end: 3187 // CHECK3-NEXT: ret void 3188 // 3189 // 3190 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 3191 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3192 // CHECK3-NEXT: entry: 3193 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3194 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3195 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3196 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3197 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3198 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3199 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3200 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3201 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3202 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3203 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3204 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3205 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3206 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3207 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3208 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3209 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3210 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3211 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 4 3212 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3213 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3214 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3215 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3216 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3217 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3218 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3219 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3220 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3221 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3222 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3223 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3224 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3225 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3226 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3227 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3228 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3229 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3230 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3231 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3232 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3233 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3234 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3235 // CHECK3: omp.precond.then: 3236 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3237 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3238 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3239 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3240 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3241 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 3242 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 3243 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3244 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3245 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3246 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3247 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3248 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3249 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3250 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3251 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3252 // CHECK3: cond.true: 3253 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3254 // CHECK3-NEXT: br label [[COND_END:%.*]] 3255 // CHECK3: cond.false: 3256 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3257 // CHECK3-NEXT: br label [[COND_END]] 3258 // CHECK3: cond.end: 3259 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3260 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3261 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3262 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3263 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3264 // CHECK3: omp.inner.for.cond: 3265 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3266 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3267 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3268 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3269 // CHECK3: omp.inner.for.body: 3270 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3271 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3272 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3273 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3274 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 3275 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 3276 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 3277 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 3278 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 3279 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 3280 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 3281 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 3282 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3283 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 3284 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 3285 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 3286 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 3287 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0 3288 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 3289 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1 3290 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 3291 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2 3292 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 3293 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 3 3294 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 3295 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(%class.anon.2* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 3296 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3297 // CHECK3: omp.body.continue: 3298 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3299 // CHECK3: omp.inner.for.inc: 3300 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3301 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3302 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3303 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3304 // CHECK3: omp.inner.for.end: 3305 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3306 // CHECK3: omp.loop.exit: 3307 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3308 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3309 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3310 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3311 // CHECK3: omp.precond.end: 3312 // CHECK3-NEXT: ret void 3313 // 3314 // 3315 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 3316 // CHECK3-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 3317 // CHECK3-NEXT: entry: 3318 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3319 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 3320 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 3321 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 3322 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3323 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 3324 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 3325 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 3326 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3327 // CHECK3-NEXT: ret void 3328 // 3329 // 3330 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 3331 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3332 // CHECK3-NEXT: entry: 3333 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3334 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3335 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3336 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3337 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3338 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3339 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3340 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3341 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3342 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3343 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3344 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3345 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3346 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3347 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3348 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3349 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3350 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3351 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3352 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3353 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3354 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3355 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3356 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3357 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3358 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3359 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3360 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3361 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3362 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3363 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3364 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3365 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3366 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3367 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3368 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3369 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3370 // CHECK3: omp.precond.then: 3371 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3372 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3373 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3374 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3375 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3376 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3378 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3379 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3380 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3381 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3382 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3383 // CHECK3: cond.true: 3384 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3385 // CHECK3-NEXT: br label [[COND_END:%.*]] 3386 // CHECK3: cond.false: 3387 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3388 // CHECK3-NEXT: br label [[COND_END]] 3389 // CHECK3: cond.end: 3390 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3391 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3392 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3393 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3394 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3395 // CHECK3: omp.inner.for.cond: 3396 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3397 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3398 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3399 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3400 // CHECK3: omp.inner.for.body: 3401 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3402 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3403 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 3404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3405 // CHECK3: omp.inner.for.inc: 3406 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3407 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3408 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3409 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3410 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3411 // CHECK3: omp.inner.for.end: 3412 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3413 // CHECK3: omp.loop.exit: 3414 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3415 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3416 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3417 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3418 // CHECK3: omp.precond.end: 3419 // CHECK3-NEXT: ret void 3420 // 3421 // 3422 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 3423 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3424 // CHECK3-NEXT: entry: 3425 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3426 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3427 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3428 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3429 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3430 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3431 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3432 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3433 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3434 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3435 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3436 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3437 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3438 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3439 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3440 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3441 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3442 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3443 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 4 3444 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3445 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3446 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3447 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3448 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3449 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3450 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3451 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3452 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3453 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3454 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3455 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3456 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3457 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3458 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3459 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3460 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3461 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3462 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3463 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3464 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3465 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3466 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3467 // CHECK3: omp.precond.then: 3468 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3469 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3470 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3471 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3472 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3473 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 3474 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 3475 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3476 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3477 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3478 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3479 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3480 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3481 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3482 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3483 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3484 // CHECK3: cond.true: 3485 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3486 // CHECK3-NEXT: br label [[COND_END:%.*]] 3487 // CHECK3: cond.false: 3488 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3489 // CHECK3-NEXT: br label [[COND_END]] 3490 // CHECK3: cond.end: 3491 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3492 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3493 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3494 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3495 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3496 // CHECK3: omp.inner.for.cond: 3497 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3498 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3499 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3500 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3501 // CHECK3: omp.inner.for.body: 3502 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3503 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3504 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3505 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3506 // CHECK3-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 3507 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 3508 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 3509 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 3510 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 3511 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 3512 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 3513 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 3514 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3515 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 3516 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 3517 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 3518 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 3519 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 3520 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP28]], align 4 3521 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 3522 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP29]], align 4 3523 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 2 3524 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP30]], align 4 3525 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 3 3526 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP31]], align 4 3527 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(%class.anon.3* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 3528 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3529 // CHECK3: omp.body.continue: 3530 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3531 // CHECK3: omp.inner.for.inc: 3532 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3533 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3534 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 3535 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3536 // CHECK3: omp.inner.for.end: 3537 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3538 // CHECK3: omp.loop.exit: 3539 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3540 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3541 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 3542 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3543 // CHECK3: omp.precond.end: 3544 // CHECK3-NEXT: ret void 3545 // 3546 // 3547 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 3548 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 3549 // CHECK3-NEXT: entry: 3550 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 3551 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3552 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 3553 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 3554 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 3555 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 3556 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3557 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 3558 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 3559 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 3560 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3561 // CHECK3-NEXT: ret void 3562 // 3563 // 3564 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 3565 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3566 // CHECK3-NEXT: entry: 3567 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3568 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3569 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 3570 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3571 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3572 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3573 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3574 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3575 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3576 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3577 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3578 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3579 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3580 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3581 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3582 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3583 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3584 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 3585 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3586 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3587 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3588 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 3589 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3590 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3591 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3592 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3593 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 3594 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3595 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 3596 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 3597 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 3598 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 3599 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 3600 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 3601 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3602 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3603 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3604 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3605 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3606 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3607 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3608 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3609 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 3610 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3611 // CHECK3: omp.precond.then: 3612 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3613 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3614 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 3615 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3616 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3617 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3618 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3619 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3620 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3621 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3622 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3623 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3624 // CHECK3: cond.true: 3625 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3626 // CHECK3-NEXT: br label [[COND_END:%.*]] 3627 // CHECK3: cond.false: 3628 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3629 // CHECK3-NEXT: br label [[COND_END]] 3630 // CHECK3: cond.end: 3631 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3632 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3633 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3634 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 3635 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3636 // CHECK3: omp.inner.for.cond: 3637 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3638 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3639 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3640 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3641 // CHECK3: omp.inner.for.body: 3642 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3643 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3644 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3645 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3646 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3647 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 3648 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3649 // CHECK3: omp.inner.for.inc: 3650 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3651 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3652 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3653 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3654 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3655 // CHECK3: omp.inner.for.end: 3656 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3657 // CHECK3: omp.loop.exit: 3658 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3659 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3660 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3661 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3662 // CHECK3: omp.precond.end: 3663 // CHECK3-NEXT: ret void 3664 // 3665 // 3666 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 3667 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3668 // CHECK3-NEXT: entry: 3669 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3670 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3671 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3672 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3673 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3674 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3675 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3676 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3677 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 3678 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3679 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3680 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3681 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3682 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3683 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3684 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3685 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3686 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3687 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 3688 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 4 3689 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3690 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3691 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3692 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3693 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3694 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3695 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3696 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3697 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3698 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3699 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3700 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3701 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3702 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3703 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3704 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3705 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3706 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3707 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3708 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3709 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3710 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3711 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3712 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3713 // CHECK3: omp.precond.then: 3714 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3715 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3716 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3717 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3718 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3719 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 3720 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 3721 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3722 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3723 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3724 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3725 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3726 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 3727 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3728 // CHECK3: omp.dispatch.cond: 3729 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3730 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3731 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 3732 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3733 // CHECK3: cond.true: 3734 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3735 // CHECK3-NEXT: br label [[COND_END:%.*]] 3736 // CHECK3: cond.false: 3737 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3738 // CHECK3-NEXT: br label [[COND_END]] 3739 // CHECK3: cond.end: 3740 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 3741 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3742 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3743 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 3744 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3745 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3746 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3747 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3748 // CHECK3: omp.dispatch.body: 3749 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3750 // CHECK3: omp.inner.for.cond: 3751 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3752 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3753 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3754 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3755 // CHECK3: omp.inner.for.body: 3756 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3757 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3758 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3759 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 3760 // CHECK3-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 3761 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 3762 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 3763 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 3764 // CHECK3-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 3765 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 3766 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 3767 // CHECK3-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 3768 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 3769 // CHECK3-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 3770 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 3771 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 3772 // CHECK3-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 3773 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 3774 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 4 3775 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 3776 // CHECK3-NEXT: store i32* [[I4]], i32** [[TMP32]], align 4 3777 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 2 3778 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP33]], align 4 3779 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 3 3780 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP34]], align 4 3781 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(%class.anon.4* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 3782 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3783 // CHECK3: omp.body.continue: 3784 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3785 // CHECK3: omp.inner.for.inc: 3786 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3787 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP35]], 1 3788 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 3789 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3790 // CHECK3: omp.inner.for.end: 3791 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3792 // CHECK3: omp.dispatch.inc: 3793 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3794 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3795 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 3796 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 3797 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3798 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3799 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 3800 // CHECK3-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 3801 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 3802 // CHECK3: omp.dispatch.end: 3803 // CHECK3-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3804 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 3805 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]]) 3806 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3807 // CHECK3: omp.precond.end: 3808 // CHECK3-NEXT: ret void 3809 // 3810 // 3811 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 3812 // CHECK3-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 3813 // CHECK3-NEXT: entry: 3814 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3815 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 3816 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 3817 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 3818 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3819 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 3820 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 3821 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 3822 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 3823 // CHECK3-NEXT: ret void 3824 // 3825 // 3826 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18 3827 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3828 // CHECK3-NEXT: entry: 3829 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3830 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3831 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3832 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3833 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3834 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3835 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3836 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3837 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3838 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3839 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3840 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3841 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3842 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3843 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3844 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3845 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3846 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3847 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3848 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3849 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3850 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3851 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3852 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3853 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3854 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3855 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3856 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3857 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3858 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3859 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3860 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3861 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3862 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3863 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3864 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3865 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3866 // CHECK3: omp.precond.then: 3867 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3868 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3869 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 3870 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3871 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3872 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3873 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 3874 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3875 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3876 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3877 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3878 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3879 // CHECK3: cond.true: 3880 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3881 // CHECK3-NEXT: br label [[COND_END:%.*]] 3882 // CHECK3: cond.false: 3883 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3884 // CHECK3-NEXT: br label [[COND_END]] 3885 // CHECK3: cond.end: 3886 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3887 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3888 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3889 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 3890 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3891 // CHECK3: omp.inner.for.cond: 3892 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3893 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3894 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3895 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3896 // CHECK3: omp.inner.for.body: 3897 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3898 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3899 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 3900 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3901 // CHECK3: omp.inner.for.inc: 3902 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3903 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3904 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3905 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3906 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 3907 // CHECK3: omp.inner.for.end: 3908 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3909 // CHECK3: omp.loop.exit: 3910 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3911 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 3912 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 3913 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3914 // CHECK3: omp.precond.end: 3915 // CHECK3-NEXT: ret void 3916 // 3917 // 3918 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..19 3919 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3920 // CHECK3-NEXT: entry: 3921 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3922 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3923 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3924 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3925 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 3926 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 3927 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 3928 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 3929 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3930 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3931 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3932 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3933 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3934 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3935 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3936 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3937 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3938 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3939 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 4 3940 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3941 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3942 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3943 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3944 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 3945 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 3946 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 3947 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 3948 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 3949 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 3950 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 3951 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 3952 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 3953 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 3954 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3955 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3956 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3957 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3958 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3959 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 3960 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3961 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3962 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3963 // CHECK3: omp.precond.then: 3964 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3965 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3966 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 3967 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3968 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3969 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 3970 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 3971 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3972 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3973 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3974 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3975 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3976 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 3977 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 3978 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3979 // CHECK3: omp.dispatch.cond: 3980 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3981 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3982 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3983 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 3984 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3985 // CHECK3: omp.dispatch.body: 3986 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3987 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 3988 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3989 // CHECK3: omp.inner.for.cond: 3990 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3991 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 3992 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3993 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3994 // CHECK3: omp.inner.for.body: 3995 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3996 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 3997 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3998 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !13 3999 // CHECK3-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !13 4000 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 4001 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 4002 // CHECK3-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !13 4003 // CHECK3-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !13 4004 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 4005 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 4006 // CHECK3-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !13 4007 // CHECK3-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 4008 // CHECK3-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !13 4009 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !13 4010 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 4011 // CHECK3-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !13 4012 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 0 4013 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP29]], align 4, !llvm.access.group !13 4014 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 1 4015 // CHECK3-NEXT: store i32* [[I3]], i32** [[TMP30]], align 4, !llvm.access.group !13 4016 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 2 4017 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP31]], align 4, !llvm.access.group !13 4018 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_5]], %class.anon.5* [[REF_TMP]], i32 0, i32 3 4019 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP32]], align 4, !llvm.access.group !13 4020 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(%class.anon.5* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !13 4021 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4022 // CHECK3: omp.body.continue: 4023 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4024 // CHECK3: omp.inner.for.inc: 4025 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4026 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], 1 4027 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4028 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 4029 // CHECK3: omp.inner.for.end: 4030 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4031 // CHECK3: omp.dispatch.inc: 4032 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4033 // CHECK3: omp.dispatch.end: 4034 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4035 // CHECK3: omp.precond.end: 4036 // CHECK3-NEXT: ret void 4037 // 4038 // 4039 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 4040 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR2]] { 4041 // CHECK3-NEXT: entry: 4042 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 4043 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4044 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 4045 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 4046 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 4047 // CHECK3-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 4048 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4049 // CHECK3-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 4050 // CHECK3-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 4051 // CHECK3-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 4052 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4053 // CHECK3-NEXT: ret void 4054 // 4055 // 4056 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..22 4057 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4058 // CHECK3-NEXT: entry: 4059 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4060 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4061 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 4062 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4063 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4064 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4065 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4066 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4067 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4068 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4069 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4070 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4071 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4072 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4073 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4074 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4075 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4076 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 4077 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4078 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4079 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4080 // CHECK3-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 4081 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4082 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4083 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4084 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4085 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 4086 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4087 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 4088 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 4089 // CHECK3-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 4090 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 4091 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 4092 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 4093 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4094 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4095 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 4096 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4097 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4098 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4099 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4100 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4101 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 4102 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4103 // CHECK3: omp.precond.then: 4104 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4105 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4106 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 4107 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4108 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4109 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4110 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4111 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4112 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4113 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4114 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4115 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4116 // CHECK3: cond.true: 4117 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4118 // CHECK3-NEXT: br label [[COND_END:%.*]] 4119 // CHECK3: cond.false: 4120 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4121 // CHECK3-NEXT: br label [[COND_END]] 4122 // CHECK3: cond.end: 4123 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4124 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4125 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4126 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4127 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4128 // CHECK3: omp.inner.for.cond: 4129 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4130 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4131 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4132 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4133 // CHECK3: omp.inner.for.body: 4134 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4135 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4136 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4137 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4138 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4139 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 4140 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4141 // CHECK3: omp.inner.for.inc: 4142 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4143 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4144 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4145 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4146 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4147 // CHECK3: omp.inner.for.end: 4148 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4149 // CHECK3: omp.loop.exit: 4150 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4151 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4152 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 4153 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4154 // CHECK3: omp.precond.end: 4155 // CHECK3-NEXT: ret void 4156 // 4157 // 4158 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..23 4159 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4160 // CHECK3-NEXT: entry: 4161 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4162 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4163 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4164 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4165 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 4166 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 4167 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 4168 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 4169 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4170 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4171 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4172 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4173 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4174 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4175 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4176 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4177 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4178 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4179 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 4180 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 4 4181 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4182 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4183 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4184 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4185 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 4186 // CHECK3-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 4187 // CHECK3-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 4188 // CHECK3-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 4189 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4190 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 4191 // CHECK3-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 4192 // CHECK3-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 4193 // CHECK3-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 4194 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4195 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4196 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4197 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4198 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4199 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4200 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4201 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4 4202 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4203 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4204 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4205 // CHECK3: omp.precond.then: 4206 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4207 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4208 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4209 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 4210 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 4211 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 4212 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 4213 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4214 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4215 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4216 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4217 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4218 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4219 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 4220 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 4221 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4222 // CHECK3: omp.dispatch.cond: 4223 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4224 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 4225 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4226 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 4227 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4228 // CHECK3: omp.dispatch.body: 4229 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4230 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 4231 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4232 // CHECK3: omp.inner.for.cond: 4233 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4234 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 4235 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4236 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4237 // CHECK3: omp.inner.for.body: 4238 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4239 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4240 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4241 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !16 4242 // CHECK3-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !16 4243 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 4244 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 4245 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !16 4246 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !16 4247 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 4248 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 4249 // CHECK3-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !16 4250 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 4251 // CHECK3-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !16 4252 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !16 4253 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 4254 // CHECK3-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !16 4255 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 0 4256 // CHECK3-NEXT: store double** [[TMP1]], double*** [[TMP30]], align 4, !llvm.access.group !16 4257 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 1 4258 // CHECK3-NEXT: store i32* [[I4]], i32** [[TMP31]], align 4, !llvm.access.group !16 4259 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 2 4260 // CHECK3-NEXT: store double** [[TMP2]], double*** [[TMP32]], align 4, !llvm.access.group !16 4261 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[CLASS_ANON_6]], %class.anon.6* [[REF_TMP]], i32 0, i32 3 4262 // CHECK3-NEXT: store double** [[TMP3]], double*** [[TMP33]], align 4, !llvm.access.group !16 4263 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(%class.anon.6* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !16 4264 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4265 // CHECK3: omp.body.continue: 4266 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4267 // CHECK3: omp.inner.for.inc: 4268 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4269 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP34]], 1 4270 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4271 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 4272 // CHECK3: omp.inner.for.end: 4273 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4274 // CHECK3: omp.dispatch.inc: 4275 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4276 // CHECK3: omp.dispatch.end: 4277 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4278 // CHECK3: omp.precond.end: 4279 // CHECK3-NEXT: ret void 4280 // 4281 // 4282 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4283 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 4284 // CHECK3-NEXT: entry: 4285 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 4286 // CHECK3-NEXT: ret void 4287 // 4288 // 4289 // CHECK9-LABEL: define {{[^@]+}}@main 4290 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 4291 // CHECK9-NEXT: entry: 4292 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4293 // CHECK9-NEXT: [[A:%.*]] = alloca double*, align 8 4294 // CHECK9-NEXT: [[B:%.*]] = alloca double*, align 8 4295 // CHECK9-NEXT: [[C:%.*]] = alloca double*, align 8 4296 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 4297 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 4298 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4299 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 4300 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 4301 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 4302 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4303 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4304 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4305 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 4306 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 4307 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 4308 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 4309 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4310 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4311 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4312 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 4313 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 4314 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 4315 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 4316 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 4317 // CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 4318 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 4319 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4320 // CHECK9-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 4321 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 4322 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 4323 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 4324 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 4325 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 4326 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 4327 // CHECK9-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 4328 // CHECK9-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 4329 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 4330 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 4331 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 4332 // CHECK9-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 4333 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 4334 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 4335 // CHECK9-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 4336 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 4337 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 4338 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 4339 // CHECK9-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 4340 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 4341 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 4342 // CHECK9-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 4343 // CHECK9-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 4344 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 4345 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 4346 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 4347 // CHECK9-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 4348 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 4349 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 4350 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 4351 // CHECK9-NEXT: store i32 10000, i32* [[N]], align 4 4352 // CHECK9-NEXT: store i32 100, i32* [[CH]], align 4 4353 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4354 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 4355 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 4356 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 4357 // CHECK9-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 8 4358 // CHECK9-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 8 4359 // CHECK9-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 8 4360 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4361 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 4362 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 4363 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4364 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 4365 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 4366 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4367 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 4368 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4369 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 4370 // CHECK9-NEXT: store double* [[TMP2]], double** [[TMP11]], align 8 4371 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4372 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 4373 // CHECK9-NEXT: store double* [[TMP2]], double** [[TMP13]], align 8 4374 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 4375 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 4376 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4377 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 4378 // CHECK9-NEXT: store double* [[TMP3]], double** [[TMP16]], align 8 4379 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4380 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 4381 // CHECK9-NEXT: store double* [[TMP3]], double** [[TMP18]], align 8 4382 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 4383 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 4384 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4385 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 4386 // CHECK9-NEXT: store double* [[TMP4]], double** [[TMP21]], align 8 4387 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4388 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 4389 // CHECK9-NEXT: store double* [[TMP4]], double** [[TMP23]], align 8 4390 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 4391 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 4392 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4393 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4394 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 4395 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 4396 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4397 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 4398 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4399 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4400 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4401 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4402 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 4403 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 4404 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 4405 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4406 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 4407 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4408 // CHECK9: omp_offload.failed: 4409 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i64 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 4410 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 4411 // CHECK9: omp_offload.cont: 4412 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 4413 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 4414 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 4415 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 4416 // CHECK9-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 8 4417 // CHECK9-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 8 4418 // CHECK9-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 8 4419 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 4420 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 4421 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 4422 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 4423 // CHECK9-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 4424 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 4425 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 4426 // CHECK9-NEXT: store i8* null, i8** [[TMP42]], align 8 4427 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 4428 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 4429 // CHECK9-NEXT: store double* [[TMP35]], double** [[TMP44]], align 8 4430 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 4431 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 4432 // CHECK9-NEXT: store double* [[TMP35]], double** [[TMP46]], align 8 4433 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 4434 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8 4435 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 4436 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 4437 // CHECK9-NEXT: store double* [[TMP36]], double** [[TMP49]], align 8 4438 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 4439 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 4440 // CHECK9-NEXT: store double* [[TMP36]], double** [[TMP51]], align 8 4441 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 4442 // CHECK9-NEXT: store i8* null, i8** [[TMP52]], align 8 4443 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 4444 // CHECK9-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 4445 // CHECK9-NEXT: store double* [[TMP37]], double** [[TMP54]], align 8 4446 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 4447 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 4448 // CHECK9-NEXT: store double* [[TMP37]], double** [[TMP56]], align 8 4449 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 4450 // CHECK9-NEXT: store i8* null, i8** [[TMP57]], align 8 4451 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 4452 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 4453 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 4454 // CHECK9-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 4455 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 4456 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 4457 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4458 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 4459 // CHECK9-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 4460 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 4461 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 4462 // CHECK9-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 4463 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 4464 // CHECK9-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4465 // CHECK9-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 4466 // CHECK9-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 4467 // CHECK9: omp_offload.failed15: 4468 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i64 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 4469 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 4470 // CHECK9: omp_offload.cont16: 4471 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 4472 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 4473 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 4474 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 4475 // CHECK9-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 4476 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 4477 // CHECK9-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 4478 // CHECK9-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 4479 // CHECK9-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 8 4480 // CHECK9-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 8 4481 // CHECK9-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 8 4482 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 4483 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 4484 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 4485 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 4486 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 4487 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 4488 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 4489 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 4490 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 4491 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 4492 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 4493 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 4494 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 4495 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 4496 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 4497 // CHECK9-NEXT: store i8* null, i8** [[TMP82]], align 8 4498 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 4499 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 4500 // CHECK9-NEXT: store double* [[TMP70]], double** [[TMP84]], align 8 4501 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 4502 // CHECK9-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 4503 // CHECK9-NEXT: store double* [[TMP70]], double** [[TMP86]], align 8 4504 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 4505 // CHECK9-NEXT: store i8* null, i8** [[TMP87]], align 8 4506 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 4507 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 4508 // CHECK9-NEXT: store double* [[TMP71]], double** [[TMP89]], align 8 4509 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 4510 // CHECK9-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 4511 // CHECK9-NEXT: store double* [[TMP71]], double** [[TMP91]], align 8 4512 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 4513 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8 4514 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 4515 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 4516 // CHECK9-NEXT: store double* [[TMP72]], double** [[TMP94]], align 8 4517 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 4518 // CHECK9-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 4519 // CHECK9-NEXT: store double* [[TMP72]], double** [[TMP96]], align 8 4520 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 4521 // CHECK9-NEXT: store i8* null, i8** [[TMP97]], align 8 4522 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 4523 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 4524 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 4525 // CHECK9-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 4526 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 4527 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 4528 // CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 4529 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 4530 // CHECK9-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 4531 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4532 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 4533 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 4534 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 4535 // CHECK9-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4536 // CHECK9-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 4537 // CHECK9-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 4538 // CHECK9: omp_offload.failed30: 4539 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i64 [[TMP67]], i64 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 4540 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT31]] 4541 // CHECK9: omp_offload.cont31: 4542 // CHECK9-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 4543 // CHECK9-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 4544 // CHECK9-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 4545 // CHECK9-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 4546 // CHECK9-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 8 4547 // CHECK9-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 8 4548 // CHECK9-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 8 4549 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 4550 // CHECK9-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 4551 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 4552 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 4553 // CHECK9-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 4554 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 4555 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 4556 // CHECK9-NEXT: store i8* null, i8** [[TMP115]], align 8 4557 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 4558 // CHECK9-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 4559 // CHECK9-NEXT: store double* [[TMP108]], double** [[TMP117]], align 8 4560 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 4561 // CHECK9-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 4562 // CHECK9-NEXT: store double* [[TMP108]], double** [[TMP119]], align 8 4563 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 4564 // CHECK9-NEXT: store i8* null, i8** [[TMP120]], align 8 4565 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 4566 // CHECK9-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 4567 // CHECK9-NEXT: store double* [[TMP109]], double** [[TMP122]], align 8 4568 // CHECK9-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 4569 // CHECK9-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 4570 // CHECK9-NEXT: store double* [[TMP109]], double** [[TMP124]], align 8 4571 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 4572 // CHECK9-NEXT: store i8* null, i8** [[TMP125]], align 8 4573 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 4574 // CHECK9-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 4575 // CHECK9-NEXT: store double* [[TMP110]], double** [[TMP127]], align 8 4576 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 4577 // CHECK9-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 4578 // CHECK9-NEXT: store double* [[TMP110]], double** [[TMP129]], align 8 4579 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 4580 // CHECK9-NEXT: store i8* null, i8** [[TMP130]], align 8 4581 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 4582 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 4583 // CHECK9-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 4584 // CHECK9-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 4585 // CHECK9-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 4586 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 4587 // CHECK9-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 4588 // CHECK9-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 4589 // CHECK9-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 4590 // CHECK9-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 4591 // CHECK9-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 4592 // CHECK9-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 4593 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 4594 // CHECK9-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4595 // CHECK9-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 4596 // CHECK9-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 4597 // CHECK9: omp_offload.failed44: 4598 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i64 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 4599 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT45]] 4600 // CHECK9: omp_offload.cont45: 4601 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 4602 // CHECK9-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 4603 // CHECK9-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 4604 // CHECK9-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 4605 // CHECK9-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 4606 // CHECK9-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 4607 // CHECK9-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 4608 // CHECK9-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 4609 // CHECK9-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 8 4610 // CHECK9-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 8 4611 // CHECK9-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 8 4612 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 4613 // CHECK9-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 4614 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 4615 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 4616 // CHECK9-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 4617 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 4618 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 4619 // CHECK9-NEXT: store i8* null, i8** [[TMP150]], align 8 4620 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 4621 // CHECK9-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 4622 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 4623 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 4624 // CHECK9-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 4625 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 4626 // CHECK9-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 4627 // CHECK9-NEXT: store i8* null, i8** [[TMP155]], align 8 4628 // CHECK9-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 4629 // CHECK9-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 4630 // CHECK9-NEXT: store double* [[TMP143]], double** [[TMP157]], align 8 4631 // CHECK9-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 4632 // CHECK9-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 4633 // CHECK9-NEXT: store double* [[TMP143]], double** [[TMP159]], align 8 4634 // CHECK9-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 4635 // CHECK9-NEXT: store i8* null, i8** [[TMP160]], align 8 4636 // CHECK9-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 4637 // CHECK9-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 4638 // CHECK9-NEXT: store double* [[TMP144]], double** [[TMP162]], align 8 4639 // CHECK9-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 4640 // CHECK9-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 4641 // CHECK9-NEXT: store double* [[TMP144]], double** [[TMP164]], align 8 4642 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 4643 // CHECK9-NEXT: store i8* null, i8** [[TMP165]], align 8 4644 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 4645 // CHECK9-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 4646 // CHECK9-NEXT: store double* [[TMP145]], double** [[TMP167]], align 8 4647 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 4648 // CHECK9-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 4649 // CHECK9-NEXT: store double* [[TMP145]], double** [[TMP169]], align 8 4650 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 4651 // CHECK9-NEXT: store i8* null, i8** [[TMP170]], align 8 4652 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 4653 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 4654 // CHECK9-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 4655 // CHECK9-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 4656 // CHECK9-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 4657 // CHECK9-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 4658 // CHECK9-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 4659 // CHECK9-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 4660 // CHECK9-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 4661 // CHECK9-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 4662 // CHECK9-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 4663 // CHECK9-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 4664 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 4665 // CHECK9-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4666 // CHECK9-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 4667 // CHECK9-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 4668 // CHECK9: omp_offload.failed60: 4669 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i64 [[TMP140]], i64 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 4670 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT61]] 4671 // CHECK9: omp_offload.cont61: 4672 // CHECK9-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 4673 // CHECK9-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 4674 // CHECK9-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 4675 // CHECK9-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 4676 // CHECK9-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 8 4677 // CHECK9-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 8 4678 // CHECK9-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 8 4679 // CHECK9-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 4680 // CHECK9-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 4681 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 4682 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 4683 // CHECK9-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 4684 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 4685 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 4686 // CHECK9-NEXT: store i8* null, i8** [[TMP188]], align 8 4687 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 4688 // CHECK9-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 4689 // CHECK9-NEXT: store double* [[TMP181]], double** [[TMP190]], align 8 4690 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 4691 // CHECK9-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 4692 // CHECK9-NEXT: store double* [[TMP181]], double** [[TMP192]], align 8 4693 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 4694 // CHECK9-NEXT: store i8* null, i8** [[TMP193]], align 8 4695 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 4696 // CHECK9-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 4697 // CHECK9-NEXT: store double* [[TMP182]], double** [[TMP195]], align 8 4698 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 4699 // CHECK9-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 4700 // CHECK9-NEXT: store double* [[TMP182]], double** [[TMP197]], align 8 4701 // CHECK9-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 4702 // CHECK9-NEXT: store i8* null, i8** [[TMP198]], align 8 4703 // CHECK9-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 4704 // CHECK9-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 4705 // CHECK9-NEXT: store double* [[TMP183]], double** [[TMP200]], align 8 4706 // CHECK9-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 4707 // CHECK9-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 4708 // CHECK9-NEXT: store double* [[TMP183]], double** [[TMP202]], align 8 4709 // CHECK9-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 4710 // CHECK9-NEXT: store i8* null, i8** [[TMP203]], align 8 4711 // CHECK9-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 4712 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 4713 // CHECK9-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 4714 // CHECK9-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 4715 // CHECK9-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 4716 // CHECK9-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 4717 // CHECK9-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 4718 // CHECK9-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 4719 // CHECK9-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 4720 // CHECK9-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 4721 // CHECK9-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 4722 // CHECK9-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 4723 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 4724 // CHECK9-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4725 // CHECK9-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 4726 // CHECK9-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 4727 // CHECK9: omp_offload.failed74: 4728 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i64 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 4729 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT75]] 4730 // CHECK9: omp_offload.cont75: 4731 // CHECK9-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 4732 // CHECK9-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 4733 // CHECK9-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 4734 // CHECK9-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 4735 // CHECK9-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 4736 // CHECK9-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 4737 // CHECK9-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 4738 // CHECK9-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 4739 // CHECK9-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 8 4740 // CHECK9-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 8 4741 // CHECK9-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 8 4742 // CHECK9-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 4743 // CHECK9-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 4744 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 4745 // CHECK9-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 4746 // CHECK9-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 4747 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 4748 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 4749 // CHECK9-NEXT: store i8* null, i8** [[TMP223]], align 8 4750 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 4751 // CHECK9-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 4752 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 4753 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 4754 // CHECK9-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 4755 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 4756 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 4757 // CHECK9-NEXT: store i8* null, i8** [[TMP228]], align 8 4758 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 4759 // CHECK9-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 4760 // CHECK9-NEXT: store double* [[TMP216]], double** [[TMP230]], align 8 4761 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 4762 // CHECK9-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 4763 // CHECK9-NEXT: store double* [[TMP216]], double** [[TMP232]], align 8 4764 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 4765 // CHECK9-NEXT: store i8* null, i8** [[TMP233]], align 8 4766 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 4767 // CHECK9-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 4768 // CHECK9-NEXT: store double* [[TMP217]], double** [[TMP235]], align 8 4769 // CHECK9-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 4770 // CHECK9-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 4771 // CHECK9-NEXT: store double* [[TMP217]], double** [[TMP237]], align 8 4772 // CHECK9-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 4773 // CHECK9-NEXT: store i8* null, i8** [[TMP238]], align 8 4774 // CHECK9-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 4775 // CHECK9-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 4776 // CHECK9-NEXT: store double* [[TMP218]], double** [[TMP240]], align 8 4777 // CHECK9-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 4778 // CHECK9-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 4779 // CHECK9-NEXT: store double* [[TMP218]], double** [[TMP242]], align 8 4780 // CHECK9-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 4781 // CHECK9-NEXT: store i8* null, i8** [[TMP243]], align 8 4782 // CHECK9-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 4783 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 4784 // CHECK9-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 4785 // CHECK9-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 4786 // CHECK9-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 4787 // CHECK9-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 4788 // CHECK9-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 4789 // CHECK9-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 4790 // CHECK9-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 4791 // CHECK9-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 4792 // CHECK9-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 4793 // CHECK9-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 4794 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 4795 // CHECK9-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4796 // CHECK9-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 4797 // CHECK9-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 4798 // CHECK9: omp_offload.failed90: 4799 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i64 [[TMP213]], i64 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 4800 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT91]] 4801 // CHECK9: omp_offload.cont91: 4802 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 4803 // CHECK9-NEXT: ret i32 [[CALL]] 4804 // 4805 // 4806 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 4807 // CHECK9-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { 4808 // CHECK9-NEXT: entry: 4809 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4810 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 4811 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 4812 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 4813 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4814 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 4815 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 4816 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 4817 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4818 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 4819 // CHECK9-NEXT: ret void 4820 // 4821 // 4822 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 4823 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 4824 // CHECK9-NEXT: entry: 4825 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4826 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4827 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4828 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 4829 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 4830 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 4831 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4832 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4833 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4834 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4835 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4836 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4837 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4838 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4839 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4840 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 4841 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4842 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4843 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4844 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 4845 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 4846 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 4847 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4848 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 4849 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 4850 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 4851 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4852 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4853 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4854 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4855 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4856 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4857 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4858 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 4859 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4860 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4861 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4862 // CHECK9: omp.precond.then: 4863 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4864 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4865 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 4866 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4867 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4868 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4869 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4870 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4871 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4872 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4873 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4874 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4875 // CHECK9: cond.true: 4876 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4877 // CHECK9-NEXT: br label [[COND_END:%.*]] 4878 // CHECK9: cond.false: 4879 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4880 // CHECK9-NEXT: br label [[COND_END]] 4881 // CHECK9: cond.end: 4882 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4883 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4884 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4885 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4886 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4887 // CHECK9: omp.inner.for.cond: 4888 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4889 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4890 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4891 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4892 // CHECK9: omp.inner.for.body: 4893 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4894 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 4895 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4896 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 4897 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 4898 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4899 // CHECK9: omp.inner.for.inc: 4900 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4901 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4902 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4903 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4904 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 4905 // CHECK9: omp.inner.for.end: 4906 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4907 // CHECK9: omp.loop.exit: 4908 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4909 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 4910 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 4911 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 4912 // CHECK9: omp.precond.end: 4913 // CHECK9-NEXT: ret void 4914 // 4915 // 4916 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 4917 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 4918 // CHECK9-NEXT: entry: 4919 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4920 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4921 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4922 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4923 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4924 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 4925 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 4926 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 4927 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4928 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4929 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4930 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4931 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4932 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4933 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4934 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4935 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4936 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 4937 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4938 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4939 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4940 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4941 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4942 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 4943 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 4944 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 4945 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4946 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 4947 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 4948 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 4949 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 4950 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 4951 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4952 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4953 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4954 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4955 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4956 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 4957 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4958 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4959 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4960 // CHECK9: omp.precond.then: 4961 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4962 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4963 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 4964 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4965 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 4966 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4967 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 4968 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4969 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 4970 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4971 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4972 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4973 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 4974 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4975 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4976 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4977 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4978 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4979 // CHECK9: cond.true: 4980 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4981 // CHECK9-NEXT: br label [[COND_END:%.*]] 4982 // CHECK9: cond.false: 4983 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4984 // CHECK9-NEXT: br label [[COND_END]] 4985 // CHECK9: cond.end: 4986 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4987 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4988 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4989 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 4990 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4991 // CHECK9: omp.inner.for.cond: 4992 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4993 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4994 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4995 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4996 // CHECK9: omp.inner.for.body: 4997 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4998 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 4999 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5000 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5001 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 5002 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 5003 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5004 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 5005 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 5006 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 5007 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 5008 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5009 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 5010 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5011 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5012 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 5013 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 5014 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5015 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 5016 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 5017 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5018 // CHECK9: omp.body.continue: 5019 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5020 // CHECK9: omp.inner.for.inc: 5021 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5022 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5023 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 5024 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5025 // CHECK9: omp.inner.for.end: 5026 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5027 // CHECK9: omp.loop.exit: 5028 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5029 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5030 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5031 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5032 // CHECK9: omp.precond.end: 5033 // CHECK9-NEXT: ret void 5034 // 5035 // 5036 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 5037 // CHECK9-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 5038 // CHECK9-NEXT: entry: 5039 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5040 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 5041 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 5042 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 5043 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5044 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 5045 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 5046 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 5047 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5048 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5049 // CHECK9-NEXT: ret void 5050 // 5051 // 5052 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 5053 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5054 // CHECK9-NEXT: entry: 5055 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5056 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5057 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5058 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5059 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5060 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5061 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5062 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5063 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5064 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5065 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5066 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5067 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5068 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5069 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5070 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5071 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5072 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5073 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5074 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5075 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5076 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5077 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5078 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5079 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5080 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5081 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5082 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5083 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5084 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5085 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5086 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5087 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5088 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5089 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5090 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5091 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5092 // CHECK9: omp.precond.then: 5093 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5094 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5095 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 5096 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5097 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5098 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5099 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 5100 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5101 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5102 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5103 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5104 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5105 // CHECK9: cond.true: 5106 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5107 // CHECK9-NEXT: br label [[COND_END:%.*]] 5108 // CHECK9: cond.false: 5109 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5110 // CHECK9-NEXT: br label [[COND_END]] 5111 // CHECK9: cond.end: 5112 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5113 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5114 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5115 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 5116 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5117 // CHECK9: omp.inner.for.cond: 5118 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5119 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5120 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5121 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5122 // CHECK9: omp.inner.for.body: 5123 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5124 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5125 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5126 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5127 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 5128 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5129 // CHECK9: omp.inner.for.inc: 5130 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5131 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5132 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5133 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5134 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5135 // CHECK9: omp.inner.for.end: 5136 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5137 // CHECK9: omp.loop.exit: 5138 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5139 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 5140 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 5141 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5142 // CHECK9: omp.precond.end: 5143 // CHECK9-NEXT: ret void 5144 // 5145 // 5146 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 5147 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5148 // CHECK9-NEXT: entry: 5149 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5150 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5151 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5152 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5153 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5154 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5155 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5156 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5157 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5158 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5159 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5160 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5161 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5162 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5163 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5164 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5165 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5166 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5167 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5168 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5169 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5170 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5171 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5172 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5173 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5174 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5175 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5176 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5177 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5178 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5179 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5180 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5181 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5182 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5183 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5184 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5185 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5186 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5187 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5188 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5189 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5190 // CHECK9: omp.precond.then: 5191 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5192 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5193 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5194 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5195 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5196 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5197 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5198 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5199 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5200 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5201 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5202 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5203 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5204 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5205 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5206 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5207 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5208 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5209 // CHECK9: cond.true: 5210 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5211 // CHECK9-NEXT: br label [[COND_END:%.*]] 5212 // CHECK9: cond.false: 5213 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5214 // CHECK9-NEXT: br label [[COND_END]] 5215 // CHECK9: cond.end: 5216 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5217 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5218 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5219 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5220 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5221 // CHECK9: omp.inner.for.cond: 5222 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5223 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5224 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5225 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5226 // CHECK9: omp.inner.for.body: 5227 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5228 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5229 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5230 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5231 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 5232 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 5233 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5234 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 5235 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 5236 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 5237 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 5238 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5239 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 5240 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5241 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5242 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 5243 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 5244 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5245 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 5246 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 5247 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5248 // CHECK9: omp.body.continue: 5249 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5250 // CHECK9: omp.inner.for.inc: 5251 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5252 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5253 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 5254 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5255 // CHECK9: omp.inner.for.end: 5256 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5257 // CHECK9: omp.loop.exit: 5258 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5259 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5260 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5261 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5262 // CHECK9: omp.precond.end: 5263 // CHECK9-NEXT: ret void 5264 // 5265 // 5266 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 5267 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 5268 // CHECK9-NEXT: entry: 5269 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 5270 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5271 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 5272 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 5273 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 5274 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 5275 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5276 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 5277 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 5278 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 5279 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 5280 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5281 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5282 // CHECK9-NEXT: ret void 5283 // 5284 // 5285 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 5286 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5287 // CHECK9-NEXT: entry: 5288 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5289 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5290 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 5291 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5292 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5293 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5294 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5295 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5296 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5297 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5298 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5299 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5300 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5301 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5302 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5303 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5304 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5305 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5306 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5307 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 5308 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5309 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5310 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5311 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5312 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 5313 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5314 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 5315 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 5316 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 5317 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 5318 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 5319 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5320 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 5321 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5322 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5323 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5324 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5325 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5326 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 5327 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5328 // CHECK9: omp.precond.then: 5329 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5330 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5331 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 5332 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5333 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5334 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 5335 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5336 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5337 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 5338 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5339 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5340 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5341 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5342 // CHECK9: cond.true: 5343 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5344 // CHECK9-NEXT: br label [[COND_END:%.*]] 5345 // CHECK9: cond.false: 5346 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5347 // CHECK9-NEXT: br label [[COND_END]] 5348 // CHECK9: cond.end: 5349 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5350 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5351 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5352 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5353 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5354 // CHECK9: omp.inner.for.cond: 5355 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5356 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5357 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 5358 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 5359 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5360 // CHECK9: omp.inner.for.body: 5361 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5362 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5363 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5364 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 5365 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 5366 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5367 // CHECK9: omp.inner.for.inc: 5368 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5369 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5370 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5371 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 5372 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5373 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5374 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 5375 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 5376 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5377 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5378 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 5379 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 5380 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5381 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5382 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 5383 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 5384 // CHECK9: cond.true10: 5385 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5386 // CHECK9-NEXT: br label [[COND_END12:%.*]] 5387 // CHECK9: cond.false11: 5388 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5389 // CHECK9-NEXT: br label [[COND_END12]] 5390 // CHECK9: cond.end12: 5391 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 5392 // CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 5393 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5394 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 5395 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5396 // CHECK9: omp.inner.for.end: 5397 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5398 // CHECK9: omp.loop.exit: 5399 // CHECK9-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5400 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 5401 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 5402 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5403 // CHECK9: omp.precond.end: 5404 // CHECK9-NEXT: ret void 5405 // 5406 // 5407 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 5408 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5409 // CHECK9-NEXT: entry: 5410 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5411 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5412 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5413 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5414 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5415 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5416 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5417 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5418 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5419 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5420 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5421 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5422 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5423 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5424 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5425 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5426 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5427 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5428 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5429 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5430 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5431 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5432 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5433 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5434 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5435 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5436 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5437 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5438 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5439 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5440 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5441 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5442 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5443 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5444 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5445 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5446 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5447 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5448 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5449 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5450 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5451 // CHECK9: omp.precond.then: 5452 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5453 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5454 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5455 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5456 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5457 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5458 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5459 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5460 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5461 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5462 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5463 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5464 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5465 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5466 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5467 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5468 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5469 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5470 // CHECK9: cond.true: 5471 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5472 // CHECK9-NEXT: br label [[COND_END:%.*]] 5473 // CHECK9: cond.false: 5474 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5475 // CHECK9-NEXT: br label [[COND_END]] 5476 // CHECK9: cond.end: 5477 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5478 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5479 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5480 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5481 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5482 // CHECK9: omp.inner.for.cond: 5483 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5484 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5485 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5486 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5487 // CHECK9: omp.inner.for.body: 5488 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5489 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5490 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5491 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5492 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 5493 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 5494 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5495 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 5496 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 5497 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 5498 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 5499 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5500 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 5501 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5502 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5503 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 5504 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 5505 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5506 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 5507 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 5508 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5509 // CHECK9: omp.body.continue: 5510 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5511 // CHECK9: omp.inner.for.inc: 5512 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5513 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5514 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 5515 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5516 // CHECK9: omp.inner.for.end: 5517 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5518 // CHECK9: omp.loop.exit: 5519 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5520 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5521 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5522 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5523 // CHECK9: omp.precond.end: 5524 // CHECK9-NEXT: ret void 5525 // 5526 // 5527 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 5528 // CHECK9-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 5529 // CHECK9-NEXT: entry: 5530 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5531 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 5532 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 5533 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 5534 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5535 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 5536 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 5537 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 5538 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5539 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5540 // CHECK9-NEXT: ret void 5541 // 5542 // 5543 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 5544 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5545 // CHECK9-NEXT: entry: 5546 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5547 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5548 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5549 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5550 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5551 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5552 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5553 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5554 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5555 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5556 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5557 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5558 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5559 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5560 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5561 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5562 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5563 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5564 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5565 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5566 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5567 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5568 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5569 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5570 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5571 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5572 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5573 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5574 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5575 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5576 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5577 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5578 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5579 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5580 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5581 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5582 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5583 // CHECK9: omp.precond.then: 5584 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5585 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5586 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 5587 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5588 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5589 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5590 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 5591 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5592 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5593 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5594 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5595 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5596 // CHECK9: cond.true: 5597 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5598 // CHECK9-NEXT: br label [[COND_END:%.*]] 5599 // CHECK9: cond.false: 5600 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5601 // CHECK9-NEXT: br label [[COND_END]] 5602 // CHECK9: cond.end: 5603 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5604 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5605 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5606 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 5607 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5608 // CHECK9: omp.inner.for.cond: 5609 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5610 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5611 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5612 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5613 // CHECK9: omp.inner.for.body: 5614 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5615 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5616 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5617 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5618 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 5619 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5620 // CHECK9: omp.inner.for.inc: 5621 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5622 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5623 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5624 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5625 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5626 // CHECK9: omp.inner.for.end: 5627 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5628 // CHECK9: omp.loop.exit: 5629 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5630 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 5631 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 5632 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5633 // CHECK9: omp.precond.end: 5634 // CHECK9-NEXT: ret void 5635 // 5636 // 5637 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 5638 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5639 // CHECK9-NEXT: entry: 5640 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5641 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5642 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5643 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5644 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5645 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5646 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5647 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5648 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5649 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5650 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5651 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5652 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5653 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5654 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5655 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5656 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5657 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5658 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5659 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5660 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5661 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5662 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5663 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5664 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5665 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5666 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5667 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5668 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5669 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5670 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5671 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 5672 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5673 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5674 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5675 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5676 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5677 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5678 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5679 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5680 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5681 // CHECK9: omp.precond.then: 5682 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5683 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5684 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5685 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5686 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5687 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5688 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5689 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5690 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5691 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5692 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5693 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5694 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5695 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5696 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5697 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5698 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5699 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5700 // CHECK9: cond.true: 5701 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5702 // CHECK9-NEXT: br label [[COND_END:%.*]] 5703 // CHECK9: cond.false: 5704 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5705 // CHECK9-NEXT: br label [[COND_END]] 5706 // CHECK9: cond.end: 5707 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5708 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5709 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5710 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5711 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5712 // CHECK9: omp.inner.for.cond: 5713 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5714 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5715 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5716 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5717 // CHECK9: omp.inner.for.body: 5718 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5719 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5720 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5721 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 5722 // CHECK9-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 8 5723 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 5724 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5725 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i64 [[IDXPROM]] 5726 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 8 5727 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 8 5728 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 5729 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5730 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM7]] 5731 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX8]], align 8 5732 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5733 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 8 5734 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 5735 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5736 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM10]] 5737 // CHECK9-NEXT: store double [[ADD9]], double* [[ARRAYIDX11]], align 8 5738 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5739 // CHECK9: omp.body.continue: 5740 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5741 // CHECK9: omp.inner.for.inc: 5742 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5743 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5744 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 5745 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5746 // CHECK9: omp.inner.for.end: 5747 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5748 // CHECK9: omp.loop.exit: 5749 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5750 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 5751 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 5752 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5753 // CHECK9: omp.precond.end: 5754 // CHECK9-NEXT: ret void 5755 // 5756 // 5757 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 5758 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 5759 // CHECK9-NEXT: entry: 5760 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 5761 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5762 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 5763 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 5764 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 5765 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 5766 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5767 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 5768 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 5769 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 5770 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 5771 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5772 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 5773 // CHECK9-NEXT: ret void 5774 // 5775 // 5776 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 5777 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5778 // CHECK9-NEXT: entry: 5779 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5780 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5781 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 5782 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5783 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5784 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5785 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5786 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5787 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5788 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5789 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5790 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5791 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5792 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5793 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5794 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5795 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5796 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5797 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5798 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5799 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5800 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 5801 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5802 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5803 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5804 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5805 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 5806 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5807 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 5808 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 5809 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 5810 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 5811 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 5812 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 5813 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5814 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5815 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 5816 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5817 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5818 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5819 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5820 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5821 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 5822 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5823 // CHECK9: omp.precond.then: 5824 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5825 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5826 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 5827 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5828 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5829 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5830 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 5831 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5832 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5833 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5834 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5835 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5836 // CHECK9: cond.true: 5837 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5838 // CHECK9-NEXT: br label [[COND_END:%.*]] 5839 // CHECK9: cond.false: 5840 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5841 // CHECK9-NEXT: br label [[COND_END]] 5842 // CHECK9: cond.end: 5843 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5844 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5845 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5846 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5847 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5848 // CHECK9: omp.inner.for.cond: 5849 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5850 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5851 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5852 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5853 // CHECK9: omp.inner.for.body: 5854 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5855 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5856 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5857 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 5858 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5859 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 5860 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 5861 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 5862 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 5863 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5864 // CHECK9: omp.inner.for.inc: 5865 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5866 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5867 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 5868 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5869 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 5870 // CHECK9: omp.inner.for.end: 5871 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5872 // CHECK9: omp.loop.exit: 5873 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5874 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 5875 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 5876 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5877 // CHECK9: omp.precond.end: 5878 // CHECK9-NEXT: ret void 5879 // 5880 // 5881 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 5882 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 5883 // CHECK9-NEXT: entry: 5884 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5885 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5886 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5887 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5888 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5889 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 5890 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 5891 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 5892 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5893 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5894 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5895 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5896 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5897 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5898 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5899 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5900 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5901 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5902 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 5903 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5904 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5905 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5906 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5907 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5908 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 5909 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 5910 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 5911 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 5912 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5913 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 5914 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 5915 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 5916 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 5917 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 5918 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5919 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5920 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5921 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5922 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5923 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5924 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 5925 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5926 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5927 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5928 // CHECK9: omp.precond.then: 5929 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5930 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5931 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 5932 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5933 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 5934 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5935 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 5936 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 5937 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 5938 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5939 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5940 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 5941 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5942 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 5943 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 5944 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5945 // CHECK9: omp.dispatch.cond: 5946 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5947 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5948 // CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 5949 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 5950 // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5951 // CHECK9: cond.true: 5952 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5953 // CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 5954 // CHECK9-NEXT: br label [[COND_END:%.*]] 5955 // CHECK9: cond.false: 5956 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5957 // CHECK9-NEXT: br label [[COND_END]] 5958 // CHECK9: cond.end: 5959 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 5960 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5961 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5962 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 5963 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5964 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5965 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 5966 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5967 // CHECK9: omp.dispatch.body: 5968 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5969 // CHECK9: omp.inner.for.cond: 5970 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5971 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5972 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 5973 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5974 // CHECK9: omp.inner.for.body: 5975 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5976 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 5977 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5978 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 5979 // CHECK9-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 8 5980 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 5981 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 5982 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i64 [[IDXPROM]] 5983 // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 5984 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 5985 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 5986 // CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 5987 // CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] 5988 // CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 5989 // CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] 5990 // CHECK9-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 5991 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 5992 // CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 5993 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] 5994 // CHECK9-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 5995 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5996 // CHECK9: omp.body.continue: 5997 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5998 // CHECK9: omp.inner.for.inc: 5999 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6000 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 6001 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 6002 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6003 // CHECK9: omp.inner.for.end: 6004 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6005 // CHECK9: omp.dispatch.inc: 6006 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6007 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6008 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 6009 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 6010 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6011 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6012 // CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 6013 // CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 6014 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 6015 // CHECK9: omp.dispatch.end: 6016 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6017 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 6018 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 6019 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6020 // CHECK9: omp.precond.end: 6021 // CHECK9-NEXT: ret void 6022 // 6023 // 6024 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 6025 // CHECK9-SAME: (i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 6026 // CHECK9-NEXT: entry: 6027 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6028 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 6029 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 6030 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 6031 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 6032 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 6033 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 6034 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 6035 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 6036 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[CONV]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6037 // CHECK9-NEXT: ret void 6038 // 6039 // 6040 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..18 6041 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6042 // CHECK9-NEXT: entry: 6043 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6044 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6045 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 6046 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 6047 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 6048 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 6049 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6050 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6051 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6052 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6053 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6054 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6055 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6056 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6057 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6058 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 6059 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6060 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6061 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 6062 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 6063 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 6064 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 6065 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 6066 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 6067 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 6068 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 6069 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6070 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6071 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6072 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6073 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6074 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6075 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6076 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 6077 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6078 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6079 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6080 // CHECK9: omp.precond.then: 6081 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6082 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6083 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 6084 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6085 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6086 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6087 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 6088 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6089 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6090 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6091 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6092 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6093 // CHECK9: cond.true: 6094 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6095 // CHECK9-NEXT: br label [[COND_END:%.*]] 6096 // CHECK9: cond.false: 6097 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6098 // CHECK9-NEXT: br label [[COND_END]] 6099 // CHECK9: cond.end: 6100 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6101 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6102 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6103 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 6104 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6105 // CHECK9: omp.inner.for.cond: 6106 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6107 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6108 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6109 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6110 // CHECK9: omp.inner.for.body: 6111 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6112 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 6113 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6114 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6115 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 6116 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6117 // CHECK9: omp.inner.for.inc: 6118 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6119 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6120 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 6121 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6122 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6123 // CHECK9: omp.inner.for.end: 6124 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6125 // CHECK9: omp.loop.exit: 6126 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6127 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 6128 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 6129 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6130 // CHECK9: omp.precond.end: 6131 // CHECK9-NEXT: ret void 6132 // 6133 // 6134 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..19 6135 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6136 // CHECK9-NEXT: entry: 6137 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6138 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6139 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6140 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6141 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 6142 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 6143 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 6144 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 6145 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6146 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6147 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6148 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6149 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6150 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6151 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6152 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6153 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6154 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6155 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6156 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6157 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6158 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6159 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 6160 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 6161 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 6162 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 6163 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 6164 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 6165 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 6166 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 6167 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6168 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 6169 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6170 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6171 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6172 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6173 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6174 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 6175 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6176 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6177 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6178 // CHECK9: omp.precond.then: 6179 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6180 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6181 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6182 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6183 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 6184 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6185 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 6186 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6187 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 6188 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6189 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6190 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6191 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6192 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6193 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 6194 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 6195 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6196 // CHECK9: omp.dispatch.cond: 6197 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6198 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 6199 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6200 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 6201 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6202 // CHECK9: omp.dispatch.body: 6203 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6204 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 6205 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6206 // CHECK9: omp.inner.for.cond: 6207 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 6208 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 6209 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 6210 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6211 // CHECK9: omp.inner.for.body: 6212 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 6213 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 6214 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6215 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 6216 // CHECK9-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !19 6217 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 6218 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 6219 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i64 [[IDXPROM]] 6220 // CHECK9-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !19 6221 // CHECK9-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !19 6222 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 6223 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 6224 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP24]], i64 [[IDXPROM6]] 6225 // CHECK9-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX7]], align 8, !llvm.access.group !19 6226 // CHECK9-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 6227 // CHECK9-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !19 6228 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 6229 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 6230 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP27]], i64 [[IDXPROM9]] 6231 // CHECK9-NEXT: store double [[ADD8]], double* [[ARRAYIDX10]], align 8, !llvm.access.group !19 6232 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6233 // CHECK9: omp.body.continue: 6234 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6235 // CHECK9: omp.inner.for.inc: 6236 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 6237 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 6238 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 6239 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 6240 // CHECK9: omp.inner.for.end: 6241 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6242 // CHECK9: omp.dispatch.inc: 6243 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 6244 // CHECK9: omp.dispatch.end: 6245 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6246 // CHECK9: omp.precond.end: 6247 // CHECK9-NEXT: ret void 6248 // 6249 // 6250 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 6251 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 6252 // CHECK9-NEXT: entry: 6253 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 6254 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6255 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double*, align 8 6256 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double*, align 8 6257 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double*, align 8 6258 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 6259 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 6260 // CHECK9-NEXT: store double* [[A]], double** [[A_ADDR]], align 8 6261 // CHECK9-NEXT: store double* [[B]], double** [[B_ADDR]], align 8 6262 // CHECK9-NEXT: store double* [[C]], double** [[C_ADDR]], align 8 6263 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 6264 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 6265 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 6266 // CHECK9-NEXT: ret void 6267 // 6268 // 6269 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..22 6270 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6271 // CHECK9-NEXT: entry: 6272 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6273 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6274 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 6275 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 6276 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 6277 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 6278 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 6279 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6280 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6281 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6282 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6283 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6284 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6285 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6286 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6287 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6288 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6289 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6290 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6291 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6292 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6293 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 6294 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 6295 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 6296 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 6297 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 6298 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 6299 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 6300 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 8 6301 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 8 6302 // CHECK9-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 8 6303 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 6304 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 6305 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 6306 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6307 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6308 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 6309 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6310 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6311 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 6312 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 6313 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6314 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 6315 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6316 // CHECK9: omp.precond.then: 6317 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6318 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6319 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 6320 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6321 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6322 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6323 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 6324 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6325 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6326 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6327 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6328 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6329 // CHECK9: cond.true: 6330 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6331 // CHECK9-NEXT: br label [[COND_END:%.*]] 6332 // CHECK9: cond.false: 6333 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6334 // CHECK9-NEXT: br label [[COND_END]] 6335 // CHECK9: cond.end: 6336 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6337 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6338 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6339 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 6340 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6341 // CHECK9: omp.inner.for.cond: 6342 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6343 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6344 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6345 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6346 // CHECK9: omp.inner.for.body: 6347 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6348 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6349 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6350 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 6351 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6352 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 6353 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 6354 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 6355 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, double**, double**, double**, i64)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i64 [[TMP24]]) 6356 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6357 // CHECK9: omp.inner.for.inc: 6358 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6359 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6360 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 6361 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6362 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 6363 // CHECK9: omp.inner.for.end: 6364 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6365 // CHECK9: omp.loop.exit: 6366 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6367 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 6368 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 6369 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6370 // CHECK9: omp.precond.end: 6371 // CHECK9-NEXT: ret void 6372 // 6373 // 6374 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..23 6375 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], double** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6376 // CHECK9-NEXT: entry: 6377 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6378 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6379 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6380 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6381 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 6382 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca double**, align 8 6383 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca double**, align 8 6384 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca double**, align 8 6385 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6386 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6387 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6388 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6389 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6390 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6391 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6392 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6393 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6394 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6395 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 6396 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6397 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6398 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6399 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6400 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 6401 // CHECK9-NEXT: store double** [[A]], double*** [[A_ADDR]], align 8 6402 // CHECK9-NEXT: store double** [[B]], double*** [[B_ADDR]], align 8 6403 // CHECK9-NEXT: store double** [[C]], double*** [[C_ADDR]], align 8 6404 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 6405 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 6406 // CHECK9-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 8 6407 // CHECK9-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 8 6408 // CHECK9-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 8 6409 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 6410 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 6411 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6412 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6413 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6414 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6415 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6416 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 6417 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 6418 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6419 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6420 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6421 // CHECK9: omp.precond.then: 6422 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6423 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 6424 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 6425 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6426 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 6427 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6428 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 6429 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 6430 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 6431 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6432 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6433 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 6434 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6435 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6436 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6437 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 6438 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 6439 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6440 // CHECK9: omp.dispatch.cond: 6441 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6442 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 6443 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6444 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 6445 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6446 // CHECK9: omp.dispatch.body: 6447 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6448 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 6449 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6450 // CHECK9: omp.inner.for.cond: 6451 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 6452 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 6453 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 6454 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6455 // CHECK9: omp.inner.for.body: 6456 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 6457 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 6458 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6459 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !22 6460 // CHECK9-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 8, !llvm.access.group !22 6461 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 6462 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 6463 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i64 [[IDXPROM]] 6464 // CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !22 6465 // CHECK9-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !22 6466 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 6467 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 6468 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 [[IDXPROM8]] 6469 // CHECK9-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX9]], align 8, !llvm.access.group !22 6470 // CHECK9-NEXT: [[ADD10:%.*]] = fadd double [[TMP24]], [[TMP27]] 6471 // CHECK9-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !22 6472 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22 6473 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 6474 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, double* [[TMP28]], i64 [[IDXPROM11]] 6475 // CHECK9-NEXT: store double [[ADD10]], double* [[ARRAYIDX12]], align 8, !llvm.access.group !22 6476 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6477 // CHECK9: omp.body.continue: 6478 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6479 // CHECK9: omp.inner.for.inc: 6480 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 6481 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 6482 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 6483 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 6484 // CHECK9: omp.inner.for.end: 6485 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6486 // CHECK9: omp.dispatch.inc: 6487 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 6488 // CHECK9: omp.dispatch.end: 6489 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6490 // CHECK9: omp.precond.end: 6491 // CHECK9-NEXT: ret void 6492 // 6493 // 6494 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 6495 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] comdat { 6496 // CHECK9-NEXT: entry: 6497 // CHECK9-NEXT: [[A:%.*]] = alloca i32*, align 8 6498 // CHECK9-NEXT: [[B:%.*]] = alloca i32*, align 8 6499 // CHECK9-NEXT: [[C:%.*]] = alloca i32*, align 8 6500 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 6501 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 6502 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 6503 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8 6504 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8 6505 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8 6506 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6507 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6508 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6509 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 6510 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [4 x i8*], align 8 6511 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [4 x i8*], align 8 6512 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [4 x i8*], align 8 6513 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 6514 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 6515 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 6516 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 6517 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 6518 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [5 x i8*], align 8 6519 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [5 x i8*], align 8 6520 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [5 x i8*], align 8 6521 // CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 6522 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 6523 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 6524 // CHECK9-NEXT: [[N_CASTED32:%.*]] = alloca i64, align 8 6525 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [4 x i8*], align 8 6526 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [4 x i8*], align 8 6527 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [4 x i8*], align 8 6528 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 6529 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 6530 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 6531 // CHECK9-NEXT: [[CH_CASTED46:%.*]] = alloca i64, align 8 6532 // CHECK9-NEXT: [[N_CASTED48:%.*]] = alloca i64, align 8 6533 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [5 x i8*], align 8 6534 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [5 x i8*], align 8 6535 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [5 x i8*], align 8 6536 // CHECK9-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 6537 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4 6538 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4 6539 // CHECK9-NEXT: [[N_CASTED62:%.*]] = alloca i64, align 8 6540 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS64:%.*]] = alloca [4 x i8*], align 8 6541 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS65:%.*]] = alloca [4 x i8*], align 8 6542 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS66:%.*]] = alloca [4 x i8*], align 8 6543 // CHECK9-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 6544 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 6545 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 6546 // CHECK9-NEXT: [[CH_CASTED76:%.*]] = alloca i64, align 8 6547 // CHECK9-NEXT: [[N_CASTED78:%.*]] = alloca i64, align 8 6548 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS80:%.*]] = alloca [5 x i8*], align 8 6549 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS81:%.*]] = alloca [5 x i8*], align 8 6550 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS82:%.*]] = alloca [5 x i8*], align 8 6551 // CHECK9-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 6552 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 6553 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 6554 // CHECK9-NEXT: store i32 10000, i32* [[N]], align 4 6555 // CHECK9-NEXT: store i32 100, i32* [[CH]], align 4 6556 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6557 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 6558 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 6559 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8 6560 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 8 6561 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 8 6562 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 8 6563 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6564 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 6565 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8 6566 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6567 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 6568 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8 6569 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6570 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8 6571 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6572 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 6573 // CHECK9-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 8 6574 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6575 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 6576 // CHECK9-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 8 6577 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 6578 // CHECK9-NEXT: store i8* null, i8** [[TMP14]], align 8 6579 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6580 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 6581 // CHECK9-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 8 6582 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6583 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 6584 // CHECK9-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 8 6585 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 6586 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8 6587 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 6588 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 6589 // CHECK9-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 8 6590 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 6591 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 6592 // CHECK9-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 8 6593 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 6594 // CHECK9-NEXT: store i8* null, i8** [[TMP24]], align 8 6595 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6596 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6597 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 6598 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 6599 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6600 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 6601 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6602 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6603 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6604 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6605 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 6606 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 6607 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 6608 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6609 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 6610 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6611 // CHECK9: omp_offload.failed: 6612 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i64 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 6613 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 6614 // CHECK9: omp_offload.cont: 6615 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 6616 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 6617 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 6618 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 6619 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 8 6620 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 8 6621 // CHECK9-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 8 6622 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 6623 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 6624 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 6625 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 6626 // CHECK9-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64* 6627 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP41]], align 8 6628 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 6629 // CHECK9-NEXT: store i8* null, i8** [[TMP42]], align 8 6630 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 6631 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 6632 // CHECK9-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 8 6633 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 6634 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 6635 // CHECK9-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 8 6636 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 6637 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8 6638 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 6639 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 6640 // CHECK9-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 8 6641 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 6642 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 6643 // CHECK9-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 8 6644 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 6645 // CHECK9-NEXT: store i8* null, i8** [[TMP52]], align 8 6646 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 3 6647 // CHECK9-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 6648 // CHECK9-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 8 6649 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 3 6650 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 6651 // CHECK9-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 8 6652 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 3 6653 // CHECK9-NEXT: store i8* null, i8** [[TMP57]], align 8 6654 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 6655 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 6656 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 6657 // CHECK9-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_9]], align 4 6658 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 6659 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP61]], 0 6660 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 6661 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 6662 // CHECK9-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 6663 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 6664 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP62]], 1 6665 // CHECK9-NEXT: [[TMP63:%.*]] = zext i32 [[ADD14]] to i64 6666 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 6667 // CHECK9-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6668 // CHECK9-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 6669 // CHECK9-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 6670 // CHECK9: omp_offload.failed15: 6671 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i64 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 6672 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 6673 // CHECK9: omp_offload.cont16: 6674 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 6675 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[CH_CASTED]] to i32* 6676 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV17]], align 4 6677 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[CH_CASTED]], align 8 6678 // CHECK9-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 6679 // CHECK9-NEXT: [[CONV19:%.*]] = bitcast i64* [[N_CASTED18]] to i32* 6680 // CHECK9-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4 6681 // CHECK9-NEXT: [[TMP69:%.*]] = load i64, i64* [[N_CASTED18]], align 8 6682 // CHECK9-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 8 6683 // CHECK9-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 8 6684 // CHECK9-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 8 6685 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 6686 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 6687 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP74]], align 8 6688 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 6689 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 6690 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8 6691 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 6692 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 6693 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 6694 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i64* 6695 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP79]], align 8 6696 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 6697 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 6698 // CHECK9-NEXT: store i64 [[TMP69]], i64* [[TMP81]], align 8 6699 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 6700 // CHECK9-NEXT: store i8* null, i8** [[TMP82]], align 8 6701 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 6702 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 6703 // CHECK9-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 8 6704 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 6705 // CHECK9-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 6706 // CHECK9-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 8 6707 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 6708 // CHECK9-NEXT: store i8* null, i8** [[TMP87]], align 8 6709 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 6710 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 6711 // CHECK9-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 8 6712 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 6713 // CHECK9-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 6714 // CHECK9-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 8 6715 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 6716 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8 6717 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 4 6718 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 6719 // CHECK9-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 8 6720 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 4 6721 // CHECK9-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 6722 // CHECK9-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 8 6723 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 4 6724 // CHECK9-NEXT: store i8* null, i8** [[TMP97]], align 8 6725 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 6726 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 6727 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 6728 // CHECK9-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_24]], align 4 6729 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 6730 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP101]], 0 6731 // CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 6732 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 6733 // CHECK9-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 6734 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 6735 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP102]], 1 6736 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD29]] to i64 6737 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 6738 // CHECK9-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6739 // CHECK9-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 6740 // CHECK9-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 6741 // CHECK9: omp_offload.failed30: 6742 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i64 [[TMP67]], i64 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 6743 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT31]] 6744 // CHECK9: omp_offload.cont31: 6745 // CHECK9-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 6746 // CHECK9-NEXT: [[CONV33:%.*]] = bitcast i64* [[N_CASTED32]] to i32* 6747 // CHECK9-NEXT: store i32 [[TMP106]], i32* [[CONV33]], align 4 6748 // CHECK9-NEXT: [[TMP107:%.*]] = load i64, i64* [[N_CASTED32]], align 8 6749 // CHECK9-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 8 6750 // CHECK9-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 8 6751 // CHECK9-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 8 6752 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 6753 // CHECK9-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64* 6754 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP112]], align 8 6755 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 6756 // CHECK9-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64* 6757 // CHECK9-NEXT: store i64 [[TMP107]], i64* [[TMP114]], align 8 6758 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0 6759 // CHECK9-NEXT: store i8* null, i8** [[TMP115]], align 8 6760 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1 6761 // CHECK9-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 6762 // CHECK9-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 8 6763 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1 6764 // CHECK9-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 6765 // CHECK9-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 8 6766 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1 6767 // CHECK9-NEXT: store i8* null, i8** [[TMP120]], align 8 6768 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2 6769 // CHECK9-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 6770 // CHECK9-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 8 6771 // CHECK9-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2 6772 // CHECK9-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 6773 // CHECK9-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 8 6774 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2 6775 // CHECK9-NEXT: store i8* null, i8** [[TMP125]], align 8 6776 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 3 6777 // CHECK9-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 6778 // CHECK9-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 8 6779 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 3 6780 // CHECK9-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 6781 // CHECK9-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 8 6782 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 3 6783 // CHECK9-NEXT: store i8* null, i8** [[TMP130]], align 8 6784 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0 6785 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0 6786 // CHECK9-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 6787 // CHECK9-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_38]], align 4 6788 // CHECK9-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 6789 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP134]], 0 6790 // CHECK9-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1 6791 // CHECK9-NEXT: [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1 6792 // CHECK9-NEXT: store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4 6793 // CHECK9-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4 6794 // CHECK9-NEXT: [[ADD43:%.*]] = add nsw i32 [[TMP135]], 1 6795 // CHECK9-NEXT: [[TMP136:%.*]] = zext i32 [[ADD43]] to i64 6796 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 6797 // CHECK9-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6798 // CHECK9-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 6799 // CHECK9-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]] 6800 // CHECK9: omp_offload.failed44: 6801 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i64 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 6802 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT45]] 6803 // CHECK9: omp_offload.cont45: 6804 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 6805 // CHECK9-NEXT: [[CONV47:%.*]] = bitcast i64* [[CH_CASTED46]] to i32* 6806 // CHECK9-NEXT: store i32 [[TMP139]], i32* [[CONV47]], align 4 6807 // CHECK9-NEXT: [[TMP140:%.*]] = load i64, i64* [[CH_CASTED46]], align 8 6808 // CHECK9-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 6809 // CHECK9-NEXT: [[CONV49:%.*]] = bitcast i64* [[N_CASTED48]] to i32* 6810 // CHECK9-NEXT: store i32 [[TMP141]], i32* [[CONV49]], align 4 6811 // CHECK9-NEXT: [[TMP142:%.*]] = load i64, i64* [[N_CASTED48]], align 8 6812 // CHECK9-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 8 6813 // CHECK9-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 8 6814 // CHECK9-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 8 6815 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 6816 // CHECK9-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64* 6817 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP147]], align 8 6818 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 6819 // CHECK9-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 6820 // CHECK9-NEXT: store i64 [[TMP140]], i64* [[TMP149]], align 8 6821 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 6822 // CHECK9-NEXT: store i8* null, i8** [[TMP150]], align 8 6823 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 6824 // CHECK9-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i64* 6825 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP152]], align 8 6826 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 6827 // CHECK9-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i64* 6828 // CHECK9-NEXT: store i64 [[TMP142]], i64* [[TMP154]], align 8 6829 // CHECK9-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 6830 // CHECK9-NEXT: store i8* null, i8** [[TMP155]], align 8 6831 // CHECK9-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2 6832 // CHECK9-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 6833 // CHECK9-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 8 6834 // CHECK9-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2 6835 // CHECK9-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 6836 // CHECK9-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 8 6837 // CHECK9-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2 6838 // CHECK9-NEXT: store i8* null, i8** [[TMP160]], align 8 6839 // CHECK9-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3 6840 // CHECK9-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 6841 // CHECK9-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 8 6842 // CHECK9-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3 6843 // CHECK9-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 6844 // CHECK9-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 8 6845 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3 6846 // CHECK9-NEXT: store i8* null, i8** [[TMP165]], align 8 6847 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 4 6848 // CHECK9-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 6849 // CHECK9-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 8 6850 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 4 6851 // CHECK9-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 6852 // CHECK9-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 8 6853 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 4 6854 // CHECK9-NEXT: store i8* null, i8** [[TMP170]], align 8 6855 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 6856 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 6857 // CHECK9-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 6858 // CHECK9-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_54]], align 4 6859 // CHECK9-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4 6860 // CHECK9-NEXT: [[SUB56:%.*]] = sub nsw i32 [[TMP174]], 0 6861 // CHECK9-NEXT: [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1 6862 // CHECK9-NEXT: [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1 6863 // CHECK9-NEXT: store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4 6864 // CHECK9-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4 6865 // CHECK9-NEXT: [[ADD59:%.*]] = add nsw i32 [[TMP175]], 1 6866 // CHECK9-NEXT: [[TMP176:%.*]] = zext i32 [[ADD59]] to i64 6867 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 6868 // CHECK9-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6869 // CHECK9-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 6870 // CHECK9-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]] 6871 // CHECK9: omp_offload.failed60: 6872 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i64 [[TMP140]], i64 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 6873 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT61]] 6874 // CHECK9: omp_offload.cont61: 6875 // CHECK9-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 6876 // CHECK9-NEXT: [[CONV63:%.*]] = bitcast i64* [[N_CASTED62]] to i32* 6877 // CHECK9-NEXT: store i32 [[TMP179]], i32* [[CONV63]], align 4 6878 // CHECK9-NEXT: [[TMP180:%.*]] = load i64, i64* [[N_CASTED62]], align 8 6879 // CHECK9-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 8 6880 // CHECK9-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 8 6881 // CHECK9-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 8 6882 // CHECK9-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 6883 // CHECK9-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i64* 6884 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP185]], align 8 6885 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 6886 // CHECK9-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64* 6887 // CHECK9-NEXT: store i64 [[TMP180]], i64* [[TMP187]], align 8 6888 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 0 6889 // CHECK9-NEXT: store i8* null, i8** [[TMP188]], align 8 6890 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 1 6891 // CHECK9-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 6892 // CHECK9-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 8 6893 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 1 6894 // CHECK9-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 6895 // CHECK9-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 8 6896 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 1 6897 // CHECK9-NEXT: store i8* null, i8** [[TMP193]], align 8 6898 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 2 6899 // CHECK9-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 6900 // CHECK9-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 8 6901 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 2 6902 // CHECK9-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 6903 // CHECK9-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 8 6904 // CHECK9-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 2 6905 // CHECK9-NEXT: store i8* null, i8** [[TMP198]], align 8 6906 // CHECK9-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 3 6907 // CHECK9-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 6908 // CHECK9-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 8 6909 // CHECK9-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 3 6910 // CHECK9-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 6911 // CHECK9-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 8 6912 // CHECK9-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS66]], i64 0, i64 3 6913 // CHECK9-NEXT: store i8* null, i8** [[TMP203]], align 8 6914 // CHECK9-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS64]], i32 0, i32 0 6915 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS65]], i32 0, i32 0 6916 // CHECK9-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 6917 // CHECK9-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_68]], align 4 6918 // CHECK9-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4 6919 // CHECK9-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP207]], 0 6920 // CHECK9-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 6921 // CHECK9-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 6922 // CHECK9-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4 6923 // CHECK9-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4 6924 // CHECK9-NEXT: [[ADD73:%.*]] = add nsw i32 [[TMP208]], 1 6925 // CHECK9-NEXT: [[TMP209:%.*]] = zext i32 [[ADD73]] to i64 6926 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 6927 // CHECK9-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6928 // CHECK9-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 6929 // CHECK9-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED74:%.*]], label [[OMP_OFFLOAD_CONT75:%.*]] 6930 // CHECK9: omp_offload.failed74: 6931 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i64 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 6932 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT75]] 6933 // CHECK9: omp_offload.cont75: 6934 // CHECK9-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 6935 // CHECK9-NEXT: [[CONV77:%.*]] = bitcast i64* [[CH_CASTED76]] to i32* 6936 // CHECK9-NEXT: store i32 [[TMP212]], i32* [[CONV77]], align 4 6937 // CHECK9-NEXT: [[TMP213:%.*]] = load i64, i64* [[CH_CASTED76]], align 8 6938 // CHECK9-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 6939 // CHECK9-NEXT: [[CONV79:%.*]] = bitcast i64* [[N_CASTED78]] to i32* 6940 // CHECK9-NEXT: store i32 [[TMP214]], i32* [[CONV79]], align 4 6941 // CHECK9-NEXT: [[TMP215:%.*]] = load i64, i64* [[N_CASTED78]], align 8 6942 // CHECK9-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 8 6943 // CHECK9-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 8 6944 // CHECK9-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 8 6945 // CHECK9-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 6946 // CHECK9-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i64* 6947 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP220]], align 8 6948 // CHECK9-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 6949 // CHECK9-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i64* 6950 // CHECK9-NEXT: store i64 [[TMP213]], i64* [[TMP222]], align 8 6951 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 0 6952 // CHECK9-NEXT: store i8* null, i8** [[TMP223]], align 8 6953 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 1 6954 // CHECK9-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i64* 6955 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP225]], align 8 6956 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 1 6957 // CHECK9-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i64* 6958 // CHECK9-NEXT: store i64 [[TMP215]], i64* [[TMP227]], align 8 6959 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 1 6960 // CHECK9-NEXT: store i8* null, i8** [[TMP228]], align 8 6961 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 2 6962 // CHECK9-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 6963 // CHECK9-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 8 6964 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 2 6965 // CHECK9-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 6966 // CHECK9-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 8 6967 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 2 6968 // CHECK9-NEXT: store i8* null, i8** [[TMP233]], align 8 6969 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 3 6970 // CHECK9-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 6971 // CHECK9-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 8 6972 // CHECK9-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 3 6973 // CHECK9-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 6974 // CHECK9-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 8 6975 // CHECK9-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 3 6976 // CHECK9-NEXT: store i8* null, i8** [[TMP238]], align 8 6977 // CHECK9-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 4 6978 // CHECK9-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 6979 // CHECK9-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 8 6980 // CHECK9-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 4 6981 // CHECK9-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 6982 // CHECK9-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 8 6983 // CHECK9-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS82]], i64 0, i64 4 6984 // CHECK9-NEXT: store i8* null, i8** [[TMP243]], align 8 6985 // CHECK9-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS80]], i32 0, i32 0 6986 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS81]], i32 0, i32 0 6987 // CHECK9-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 6988 // CHECK9-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_84]], align 4 6989 // CHECK9-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_84]], align 4 6990 // CHECK9-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP247]], 0 6991 // CHECK9-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 6992 // CHECK9-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 6993 // CHECK9-NEXT: store i32 [[SUB88]], i32* [[DOTCAPTURE_EXPR_85]], align 4 6994 // CHECK9-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_85]], align 4 6995 // CHECK9-NEXT: [[ADD89:%.*]] = add nsw i32 [[TMP248]], 1 6996 // CHECK9-NEXT: [[TMP249:%.*]] = zext i32 [[ADD89]] to i64 6997 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 6998 // CHECK9-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6999 // CHECK9-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 7000 // CHECK9-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED90:%.*]], label [[OMP_OFFLOAD_CONT91:%.*]] 7001 // CHECK9: omp_offload.failed90: 7002 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i64 [[TMP213]], i64 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 7003 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT91]] 7004 // CHECK9: omp_offload.cont91: 7005 // CHECK9-NEXT: ret i32 0 7006 // 7007 // 7008 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 7009 // CHECK9-SAME: (i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 7010 // CHECK9-NEXT: entry: 7011 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7012 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7013 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 7014 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 7015 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7016 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7017 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 7018 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 7019 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7020 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 7021 // CHECK9-NEXT: ret void 7022 // 7023 // 7024 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..26 7025 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7026 // CHECK9-NEXT: entry: 7027 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7028 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7029 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7030 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7031 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7032 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7033 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7034 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7035 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7036 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7037 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7038 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7039 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7040 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7041 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7042 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 7043 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7044 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7045 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7046 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7047 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7048 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7049 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7050 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7051 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7052 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7053 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7054 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7055 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7056 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7057 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7058 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7059 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7060 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7061 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7062 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7063 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7064 // CHECK9: omp.precond.then: 7065 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7066 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7067 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 7068 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7069 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7070 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7071 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 7072 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7073 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7074 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7075 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7076 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7077 // CHECK9: cond.true: 7078 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7079 // CHECK9-NEXT: br label [[COND_END:%.*]] 7080 // CHECK9: cond.false: 7081 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7082 // CHECK9-NEXT: br label [[COND_END]] 7083 // CHECK9: cond.end: 7084 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7085 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7086 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7087 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 7088 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7089 // CHECK9: omp.inner.for.cond: 7090 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7091 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7092 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7093 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7094 // CHECK9: omp.inner.for.body: 7095 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7096 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 7097 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7098 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 7099 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 7100 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7101 // CHECK9: omp.inner.for.inc: 7102 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7103 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7104 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 7105 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7106 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7107 // CHECK9: omp.inner.for.end: 7108 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7109 // CHECK9: omp.loop.exit: 7110 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7111 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 7112 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 7113 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7114 // CHECK9: omp.precond.end: 7115 // CHECK9-NEXT: ret void 7116 // 7117 // 7118 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..27 7119 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7120 // CHECK9-NEXT: entry: 7121 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7122 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7123 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7124 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7125 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7126 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7127 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7128 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7129 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7130 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7131 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7132 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7133 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7134 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7135 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7136 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7137 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7138 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 7139 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7140 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7141 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7142 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7143 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7144 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7145 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7146 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7147 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7148 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7149 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7150 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7151 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7152 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7153 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7154 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7155 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7156 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7157 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7158 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7159 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7160 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7161 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7162 // CHECK9: omp.precond.then: 7163 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7164 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7165 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7166 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7167 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7168 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7169 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 7170 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7171 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7172 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7173 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7174 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7175 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7176 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7177 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7178 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7179 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7180 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7181 // CHECK9: cond.true: 7182 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7183 // CHECK9-NEXT: br label [[COND_END:%.*]] 7184 // CHECK9: cond.false: 7185 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7186 // CHECK9-NEXT: br label [[COND_END]] 7187 // CHECK9: cond.end: 7188 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7189 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7190 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7191 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7192 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7193 // CHECK9: omp.inner.for.cond: 7194 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7195 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7196 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7197 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7198 // CHECK9: omp.inner.for.body: 7199 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7200 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7201 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7202 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7203 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7204 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 7205 // CHECK9-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 7206 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 7207 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 7208 // CHECK9: .cancel.exit: 7209 // CHECK9-NEXT: br label [[CANCEL_EXIT:%.*]] 7210 // CHECK9: .cancel.continue: 7211 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 8 7212 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4 7213 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64 7214 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM]] 7215 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7216 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 8 7217 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4 7218 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP28]] to i64 7219 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM7]] 7220 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 7221 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 7222 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 8 7223 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[I4]], align 4 7224 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP31]] to i64 7225 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i64 [[IDXPROM10]] 7226 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 7227 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7228 // CHECK9: omp.body.continue: 7229 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7230 // CHECK9: omp.inner.for.inc: 7231 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7232 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 7233 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 7234 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7235 // CHECK9: omp.inner.for.end: 7236 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7237 // CHECK9: omp.loop.exit: 7238 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7239 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 7240 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 7241 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7242 // CHECK9: cancel.exit: 7243 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7244 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 7245 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 7246 // CHECK9-NEXT: br label [[CANCEL_CONT:%.*]] 7247 // CHECK9: omp.precond.end: 7248 // CHECK9-NEXT: br label [[CANCEL_CONT]] 7249 // CHECK9: cancel.cont: 7250 // CHECK9-NEXT: ret void 7251 // 7252 // 7253 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 7254 // CHECK9-SAME: (i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 7255 // CHECK9-NEXT: entry: 7256 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7257 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7258 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 7259 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 7260 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7261 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7262 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 7263 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 7264 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7265 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 7266 // CHECK9-NEXT: ret void 7267 // 7268 // 7269 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..30 7270 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7271 // CHECK9-NEXT: entry: 7272 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7273 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7274 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7275 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7276 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7277 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7278 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7279 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7280 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7281 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7282 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7283 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7284 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7285 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7286 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7287 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 7288 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7289 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7290 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7291 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7292 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7293 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7294 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7295 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7296 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7297 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7298 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7299 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7300 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7301 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7302 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7303 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7304 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7305 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7306 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7307 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7308 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7309 // CHECK9: omp.precond.then: 7310 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7311 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7312 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 7313 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7314 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7315 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7316 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 7317 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7318 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7319 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7320 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7321 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7322 // CHECK9: cond.true: 7323 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7324 // CHECK9-NEXT: br label [[COND_END:%.*]] 7325 // CHECK9: cond.false: 7326 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7327 // CHECK9-NEXT: br label [[COND_END]] 7328 // CHECK9: cond.end: 7329 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7330 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7331 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7332 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 7333 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7334 // CHECK9: omp.inner.for.cond: 7335 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7336 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7337 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7338 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7339 // CHECK9: omp.inner.for.body: 7340 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7341 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 7342 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7343 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 7344 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 7345 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7346 // CHECK9: omp.inner.for.inc: 7347 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7348 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7349 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 7350 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7351 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7352 // CHECK9: omp.inner.for.end: 7353 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7354 // CHECK9: omp.loop.exit: 7355 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7356 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 7357 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 7358 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7359 // CHECK9: omp.precond.end: 7360 // CHECK9-NEXT: ret void 7361 // 7362 // 7363 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..31 7364 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7365 // CHECK9-NEXT: entry: 7366 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7367 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7368 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7369 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7370 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7371 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7372 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7373 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7374 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7375 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7376 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7377 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7378 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7379 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7380 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7381 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7382 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7383 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 7384 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7385 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7386 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7387 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7388 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7389 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7390 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7391 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7392 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7393 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7394 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7395 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7396 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7397 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7398 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7399 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7400 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7401 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7402 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7403 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7404 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7405 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7406 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7407 // CHECK9: omp.precond.then: 7408 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7409 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7410 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7411 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7412 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7413 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7414 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 7415 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7416 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7417 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7418 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7419 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7420 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7421 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7422 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7423 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7424 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7425 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7426 // CHECK9: cond.true: 7427 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7428 // CHECK9-NEXT: br label [[COND_END:%.*]] 7429 // CHECK9: cond.false: 7430 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7431 // CHECK9-NEXT: br label [[COND_END]] 7432 // CHECK9: cond.end: 7433 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7434 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7435 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7436 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7437 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7438 // CHECK9: omp.inner.for.cond: 7439 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7440 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7441 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7442 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7443 // CHECK9: omp.inner.for.body: 7444 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7445 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7446 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7447 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7448 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 7449 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 7450 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 7451 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 7452 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7453 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 7454 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 7455 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 7456 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 7457 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 7458 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 7459 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 7460 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 7461 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 7462 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 7463 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 7464 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7465 // CHECK9: omp.body.continue: 7466 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7467 // CHECK9: omp.inner.for.inc: 7468 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7469 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 7470 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 7471 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7472 // CHECK9: omp.inner.for.end: 7473 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7474 // CHECK9: omp.loop.exit: 7475 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7476 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 7477 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 7478 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7479 // CHECK9: omp.precond.end: 7480 // CHECK9-NEXT: ret void 7481 // 7482 // 7483 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 7484 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 7485 // CHECK9-NEXT: entry: 7486 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 7487 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7488 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7489 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 7490 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 7491 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 7492 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7493 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7494 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 7495 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 7496 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 7497 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7498 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 7499 // CHECK9-NEXT: ret void 7500 // 7501 // 7502 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..34 7503 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7504 // CHECK9-NEXT: entry: 7505 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7506 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7507 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 7508 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7509 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7510 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7511 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7512 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7513 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7514 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7515 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7516 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7517 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7518 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7519 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7520 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7521 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 7522 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7523 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7524 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 7525 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7526 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7527 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7528 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7529 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 7530 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7531 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7532 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7533 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7534 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 7535 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 7536 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7537 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 7538 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7539 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7540 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7541 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7542 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7543 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 7544 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7545 // CHECK9: omp.precond.then: 7546 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7547 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7548 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 7549 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7550 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7551 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 7552 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7553 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7554 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 7555 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7556 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7557 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7558 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7559 // CHECK9: cond.true: 7560 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7561 // CHECK9-NEXT: br label [[COND_END:%.*]] 7562 // CHECK9: cond.false: 7563 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7564 // CHECK9-NEXT: br label [[COND_END]] 7565 // CHECK9: cond.end: 7566 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7567 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7568 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7569 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7570 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7571 // CHECK9: omp.inner.for.cond: 7572 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7573 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7574 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 7575 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 7576 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7577 // CHECK9: omp.inner.for.body: 7578 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7579 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 7580 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7581 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 7582 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 7583 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7584 // CHECK9: omp.inner.for.inc: 7585 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7586 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7587 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 7588 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 7589 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7590 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7591 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 7592 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 7593 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7594 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7595 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 7596 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 7597 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7598 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7599 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 7600 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 7601 // CHECK9: cond.true10: 7602 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7603 // CHECK9-NEXT: br label [[COND_END12:%.*]] 7604 // CHECK9: cond.false11: 7605 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7606 // CHECK9-NEXT: br label [[COND_END12]] 7607 // CHECK9: cond.end12: 7608 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 7609 // CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 7610 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7611 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 7612 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7613 // CHECK9: omp.inner.for.end: 7614 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7615 // CHECK9: omp.loop.exit: 7616 // CHECK9-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7617 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 7618 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 7619 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7620 // CHECK9: omp.precond.end: 7621 // CHECK9-NEXT: ret void 7622 // 7623 // 7624 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..35 7625 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7626 // CHECK9-NEXT: entry: 7627 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7628 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7629 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7630 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7631 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7632 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7633 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7634 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7635 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7636 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7637 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7638 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7639 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7640 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7641 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7642 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7643 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7644 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 7645 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7646 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7647 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7648 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7649 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7650 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7651 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7652 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7653 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7654 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7655 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7656 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7657 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7658 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7659 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7660 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7661 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7662 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7663 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7664 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7665 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7666 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7667 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7668 // CHECK9: omp.precond.then: 7669 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7670 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7671 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7672 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7673 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7674 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7675 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 7676 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7677 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7678 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7679 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7680 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7681 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7682 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7683 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7684 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7685 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7686 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7687 // CHECK9: cond.true: 7688 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7689 // CHECK9-NEXT: br label [[COND_END:%.*]] 7690 // CHECK9: cond.false: 7691 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7692 // CHECK9-NEXT: br label [[COND_END]] 7693 // CHECK9: cond.end: 7694 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7695 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7696 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7697 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7698 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7699 // CHECK9: omp.inner.for.cond: 7700 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7701 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7702 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7703 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7704 // CHECK9: omp.inner.for.body: 7705 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7706 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7707 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7708 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7709 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 7710 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 7711 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 7712 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 7713 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7714 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 7715 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 7716 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 7717 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 7718 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 7719 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 7720 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 7721 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 7722 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 7723 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 7724 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 7725 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7726 // CHECK9: omp.body.continue: 7727 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7728 // CHECK9: omp.inner.for.inc: 7729 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7730 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 7731 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 7732 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7733 // CHECK9: omp.inner.for.end: 7734 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7735 // CHECK9: omp.loop.exit: 7736 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7737 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 7738 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 7739 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7740 // CHECK9: omp.precond.end: 7741 // CHECK9-NEXT: ret void 7742 // 7743 // 7744 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 7745 // CHECK9-SAME: (i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 7746 // CHECK9-NEXT: entry: 7747 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7748 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7749 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 7750 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 7751 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7752 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7753 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 7754 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 7755 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7756 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 7757 // CHECK9-NEXT: ret void 7758 // 7759 // 7760 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..38 7761 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7762 // CHECK9-NEXT: entry: 7763 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7764 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7765 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7766 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7767 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7768 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7769 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7770 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7771 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7772 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7773 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7774 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7775 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7776 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7777 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7778 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 7779 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7780 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7781 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7782 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7783 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7784 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7785 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7786 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7787 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7788 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7789 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7790 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7791 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7792 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7793 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7794 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7795 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7796 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7797 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7798 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7799 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7800 // CHECK9: omp.precond.then: 7801 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7802 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7803 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 7804 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7805 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7806 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7807 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 7808 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7809 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7810 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7811 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7812 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7813 // CHECK9: cond.true: 7814 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7815 // CHECK9-NEXT: br label [[COND_END:%.*]] 7816 // CHECK9: cond.false: 7817 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7818 // CHECK9-NEXT: br label [[COND_END]] 7819 // CHECK9: cond.end: 7820 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7821 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7822 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7823 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 7824 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7825 // CHECK9: omp.inner.for.cond: 7826 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7827 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7828 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7829 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7830 // CHECK9: omp.inner.for.body: 7831 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7832 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 7833 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7834 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 7835 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 7836 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7837 // CHECK9: omp.inner.for.inc: 7838 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7839 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7840 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 7841 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7842 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7843 // CHECK9: omp.inner.for.end: 7844 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7845 // CHECK9: omp.loop.exit: 7846 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7847 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 7848 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 7849 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7850 // CHECK9: omp.precond.end: 7851 // CHECK9-NEXT: ret void 7852 // 7853 // 7854 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..39 7855 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7856 // CHECK9-NEXT: entry: 7857 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7858 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7859 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7860 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7861 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7862 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 7863 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 7864 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 7865 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7866 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7867 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7868 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7869 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7870 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7871 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7872 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7873 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7874 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 7875 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7876 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7877 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7878 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7879 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7880 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 7881 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 7882 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 7883 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7884 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 7885 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 7886 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 7887 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 7888 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 7889 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7890 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7891 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7892 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7893 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7894 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 7895 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7896 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7897 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7898 // CHECK9: omp.precond.then: 7899 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7900 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7901 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 7902 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7903 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7904 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7905 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 7906 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7907 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7908 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7909 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7910 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7911 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 7912 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7913 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7914 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7915 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7916 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7917 // CHECK9: cond.true: 7918 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7919 // CHECK9-NEXT: br label [[COND_END:%.*]] 7920 // CHECK9: cond.false: 7921 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7922 // CHECK9-NEXT: br label [[COND_END]] 7923 // CHECK9: cond.end: 7924 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7925 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7926 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7927 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7928 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7929 // CHECK9: omp.inner.for.cond: 7930 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7931 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7932 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7933 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7934 // CHECK9: omp.inner.for.body: 7935 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7936 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7937 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7938 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7939 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 8 7940 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4 7941 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 7942 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 [[IDXPROM]] 7943 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 7944 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 8 7945 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 7946 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 7947 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM7]] 7948 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 7949 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 7950 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 8 7951 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 7952 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 7953 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM10]] 7954 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX11]], align 4 7955 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7956 // CHECK9: omp.body.continue: 7957 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7958 // CHECK9: omp.inner.for.inc: 7959 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7960 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 7961 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 7962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 7963 // CHECK9: omp.inner.for.end: 7964 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7965 // CHECK9: omp.loop.exit: 7966 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7967 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 7968 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 7969 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7970 // CHECK9: omp.precond.end: 7971 // CHECK9-NEXT: ret void 7972 // 7973 // 7974 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 7975 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 7976 // CHECK9-NEXT: entry: 7977 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 7978 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7979 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7980 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 7981 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 7982 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 7983 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7984 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7985 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 7986 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 7987 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 7988 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7989 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 7990 // CHECK9-NEXT: ret void 7991 // 7992 // 7993 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..42 7994 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7995 // CHECK9-NEXT: entry: 7996 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7997 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7998 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 7999 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8000 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8001 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8002 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8003 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8004 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8005 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8006 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8007 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8008 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8009 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8010 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8011 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8012 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8013 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8014 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8015 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8016 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8017 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 8018 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8019 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8020 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8021 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8022 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 8023 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8024 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8025 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8026 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8027 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 8028 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 8029 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 8030 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8031 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8032 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 8033 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8034 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8035 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8036 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8037 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8038 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 8039 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8040 // CHECK9: omp.precond.then: 8041 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8042 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8043 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 8044 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8045 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8046 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8047 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8048 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8049 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8050 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8051 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8052 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8053 // CHECK9: cond.true: 8054 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8055 // CHECK9-NEXT: br label [[COND_END:%.*]] 8056 // CHECK9: cond.false: 8057 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8058 // CHECK9-NEXT: br label [[COND_END]] 8059 // CHECK9: cond.end: 8060 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8061 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8062 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8063 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8064 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8065 // CHECK9: omp.inner.for.cond: 8066 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8067 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8068 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8069 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8070 // CHECK9: omp.inner.for.body: 8071 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8072 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8073 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8074 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 8075 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8076 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8077 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 8078 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8079 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 8080 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8081 // CHECK9: omp.inner.for.inc: 8082 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8083 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8084 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8085 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8086 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8087 // CHECK9: omp.inner.for.end: 8088 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8089 // CHECK9: omp.loop.exit: 8090 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8091 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 8092 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 8093 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8094 // CHECK9: omp.precond.end: 8095 // CHECK9-NEXT: ret void 8096 // 8097 // 8098 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..43 8099 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 8100 // CHECK9-NEXT: entry: 8101 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8102 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8103 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8104 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8105 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8106 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8107 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8108 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8109 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8110 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8111 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8112 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8113 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8114 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8115 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8116 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8117 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8118 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8119 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 8120 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8121 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8122 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8123 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8124 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8125 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8126 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8127 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8128 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8129 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8130 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8131 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8132 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8133 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8134 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8135 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8136 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8137 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8138 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8139 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8140 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8141 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8142 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8143 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8144 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8145 // CHECK9: omp.precond.then: 8146 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8147 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8148 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8149 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8150 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 8151 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8152 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 8153 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8154 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8155 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8156 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8157 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 8158 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8159 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 8160 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 8161 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8162 // CHECK9: omp.dispatch.cond: 8163 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8164 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8165 // CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 8166 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] 8167 // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8168 // CHECK9: cond.true: 8169 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8170 // CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 8171 // CHECK9-NEXT: br label [[COND_END:%.*]] 8172 // CHECK9: cond.false: 8173 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8174 // CHECK9-NEXT: br label [[COND_END]] 8175 // CHECK9: cond.end: 8176 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 8177 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8178 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8179 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 8180 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8181 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8182 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 8183 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8184 // CHECK9: omp.dispatch.body: 8185 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8186 // CHECK9: omp.inner.for.cond: 8187 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8188 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8189 // CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 8190 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8191 // CHECK9: omp.inner.for.body: 8192 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8193 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 8194 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8195 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 8196 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 8 8197 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I6]], align 4 8198 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 8199 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i64 [[IDXPROM]] 8200 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 8201 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8 8202 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 8203 // CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 8204 // CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] 8205 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4 8206 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 8207 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8 8208 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 8209 // CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 8210 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] 8211 // CHECK9-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4 8212 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8213 // CHECK9: omp.body.continue: 8214 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8215 // CHECK9: omp.inner.for.inc: 8216 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8217 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 8218 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 8219 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8220 // CHECK9: omp.inner.for.end: 8221 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8222 // CHECK9: omp.dispatch.inc: 8223 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8224 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8225 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 8226 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 8227 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8228 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8229 // CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 8230 // CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 8231 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 8232 // CHECK9: omp.dispatch.end: 8233 // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8234 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 8235 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 8236 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8237 // CHECK9: omp.precond.end: 8238 // CHECK9-NEXT: ret void 8239 // 8240 // 8241 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 8242 // CHECK9-SAME: (i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 8243 // CHECK9-NEXT: entry: 8244 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8245 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8246 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 8247 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 8248 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8249 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8250 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 8251 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 8252 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8253 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[CONV]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 8254 // CHECK9-NEXT: ret void 8255 // 8256 // 8257 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..46 8258 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8259 // CHECK9-NEXT: entry: 8260 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8261 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8262 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8263 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8264 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8265 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8266 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8267 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8268 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8269 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8270 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8271 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8272 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8273 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8274 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8275 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8276 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8277 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8278 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8279 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8280 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8281 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8282 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8283 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8284 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8285 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8286 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8287 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8288 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8289 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8290 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8291 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8292 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8293 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8294 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8295 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8296 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8297 // CHECK9: omp.precond.then: 8298 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8299 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8300 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 8301 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8302 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8303 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8304 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 8305 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8306 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8307 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8308 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8309 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8310 // CHECK9: cond.true: 8311 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8312 // CHECK9-NEXT: br label [[COND_END:%.*]] 8313 // CHECK9: cond.false: 8314 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8315 // CHECK9-NEXT: br label [[COND_END]] 8316 // CHECK9: cond.end: 8317 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8318 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8319 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8320 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 8321 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8322 // CHECK9: omp.inner.for.cond: 8323 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8324 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8325 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8326 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8327 // CHECK9: omp.inner.for.body: 8328 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8329 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8330 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8331 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8332 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 8333 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8334 // CHECK9: omp.inner.for.inc: 8335 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8336 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8337 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8338 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8339 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8340 // CHECK9: omp.inner.for.end: 8341 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8342 // CHECK9: omp.loop.exit: 8343 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8344 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 8345 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]]) 8346 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8347 // CHECK9: omp.precond.end: 8348 // CHECK9-NEXT: ret void 8349 // 8350 // 8351 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..47 8352 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8353 // CHECK9-NEXT: entry: 8354 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8355 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8356 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8357 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8358 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8359 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8360 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8361 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8362 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8363 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8364 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8365 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8366 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8367 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8368 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8369 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8370 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8371 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8372 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8373 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8374 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8375 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8376 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8377 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8378 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8379 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8380 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8381 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8382 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8383 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8384 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8385 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 8386 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8387 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8388 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8389 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8390 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8391 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8392 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8393 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8394 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8395 // CHECK9: omp.precond.then: 8396 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8397 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8398 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8399 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8400 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8401 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8402 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8403 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8404 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8405 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8406 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8407 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8408 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8409 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8410 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 8411 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 8412 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8413 // CHECK9: omp.dispatch.cond: 8414 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8415 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 8416 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8417 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 8418 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8419 // CHECK9: omp.dispatch.body: 8420 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8421 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 8422 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8423 // CHECK9: omp.inner.for.cond: 8424 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8425 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 8426 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 8427 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8428 // CHECK9: omp.inner.for.body: 8429 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8430 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 8431 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8432 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 8433 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !25 8434 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 8435 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 8436 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i64 [[IDXPROM]] 8437 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 8438 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !25 8439 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 8440 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 8441 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 [[IDXPROM6]] 8442 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !25 8443 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 8444 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !25 8445 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 8446 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 8447 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i64 [[IDXPROM9]] 8448 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX10]], align 4, !llvm.access.group !25 8449 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8450 // CHECK9: omp.body.continue: 8451 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8452 // CHECK9: omp.inner.for.inc: 8453 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8454 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 8455 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8456 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 8457 // CHECK9: omp.inner.for.end: 8458 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8459 // CHECK9: omp.dispatch.inc: 8460 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 8461 // CHECK9: omp.dispatch.end: 8462 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8463 // CHECK9: omp.precond.end: 8464 // CHECK9-NEXT: ret void 8465 // 8466 // 8467 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 8468 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 8469 // CHECK9-NEXT: entry: 8470 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 8471 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8472 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8473 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 8474 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 8475 // CHECK9-NEXT: store i64 [[CH]], i64* [[CH_ADDR]], align 8 8476 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8477 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8478 // CHECK9-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 8479 // CHECK9-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 8480 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[CH_ADDR]] to i32* 8481 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8482 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 8483 // CHECK9-NEXT: ret void 8484 // 8485 // 8486 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..50 8487 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8488 // CHECK9-NEXT: entry: 8489 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8490 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8491 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 8 8492 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8493 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8494 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8495 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8496 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8497 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8498 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8499 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8500 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8501 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8502 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8503 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8504 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8505 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8506 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8507 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8508 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8509 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8510 // CHECK9-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 8 8511 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8512 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8513 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8514 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8515 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 8 8516 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8517 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8518 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8519 // CHECK9-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8520 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 8521 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 8522 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 8523 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8524 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8525 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 8526 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8527 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8528 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8529 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8530 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8531 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 8532 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8533 // CHECK9: omp.precond.then: 8534 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8535 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8536 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 8537 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8538 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8539 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8540 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 8541 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8542 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8543 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8544 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8545 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8546 // CHECK9: cond.true: 8547 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8548 // CHECK9-NEXT: br label [[COND_END:%.*]] 8549 // CHECK9: cond.false: 8550 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8551 // CHECK9-NEXT: br label [[COND_END]] 8552 // CHECK9: cond.end: 8553 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8554 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8555 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8556 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8557 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8558 // CHECK9: omp.inner.for.cond: 8559 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8560 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8561 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8562 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8563 // CHECK9: omp.inner.for.body: 8564 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8565 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8566 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8567 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 8568 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8569 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8570 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4 8571 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8572 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32**, i32**, i32**, i64)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i64 [[TMP20]], i64 [[TMP22]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i64 [[TMP24]]) 8573 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8574 // CHECK9: omp.inner.for.inc: 8575 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8576 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8577 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8578 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8579 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8580 // CHECK9: omp.inner.for.end: 8581 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8582 // CHECK9: omp.loop.exit: 8583 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8584 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4 8585 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]]) 8586 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8587 // CHECK9: omp.precond.end: 8588 // CHECK9-NEXT: ret void 8589 // 8590 // 8591 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..51 8592 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[A:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[B:%.*]], i32** noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 8593 // CHECK9-NEXT: entry: 8594 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8595 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8596 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8597 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8598 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8599 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 8 8600 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 8 8601 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 8 8602 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8603 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8604 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8605 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8606 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8607 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8608 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8609 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8610 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8611 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8612 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 8613 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8614 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8615 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8616 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8617 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8618 // CHECK9-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 8 8619 // CHECK9-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 8 8620 // CHECK9-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 8 8621 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8622 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8623 // CHECK9-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 8 8624 // CHECK9-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 8 8625 // CHECK9-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 8 8626 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8627 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 8628 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8629 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8630 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8631 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8632 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8633 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8634 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 8635 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8636 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8637 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8638 // CHECK9: omp.precond.then: 8639 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8640 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8641 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 8642 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8643 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 8644 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8645 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP9]] to i32 8646 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8647 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8648 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8649 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8650 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV]], align 4 8651 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8652 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8653 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8654 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 8655 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 8656 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8657 // CHECK9: omp.dispatch.cond: 8658 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8659 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 8660 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8661 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 8662 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8663 // CHECK9: omp.dispatch.body: 8664 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8665 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 8666 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8667 // CHECK9: omp.inner.for.cond: 8668 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 8669 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 8670 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 8671 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8672 // CHECK9: omp.inner.for.body: 8673 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 8674 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 8675 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8676 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !28 8677 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 8, !llvm.access.group !28 8678 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 8679 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 8680 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i64 [[IDXPROM]] 8681 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 8682 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !28 8683 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 8684 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 8685 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i64 [[IDXPROM8]] 8686 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !28 8687 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 8688 // CHECK9-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !28 8689 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !28 8690 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP29]] to i64 8691 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i64 [[IDXPROM11]] 8692 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[ARRAYIDX12]], align 4, !llvm.access.group !28 8693 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8694 // CHECK9: omp.body.continue: 8695 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8696 // CHECK9: omp.inner.for.inc: 8697 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 8698 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP30]], 1 8699 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 8700 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 8701 // CHECK9: omp.inner.for.end: 8702 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8703 // CHECK9: omp.dispatch.inc: 8704 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 8705 // CHECK9: omp.dispatch.end: 8706 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8707 // CHECK9: omp.precond.end: 8708 // CHECK9-NEXT: ret void 8709 // 8710 // 8711 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 8712 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { 8713 // CHECK9-NEXT: entry: 8714 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 8715 // CHECK9-NEXT: ret void 8716 // 8717 // 8718 // CHECK11-LABEL: define {{[^@]+}}@main 8719 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 8720 // CHECK11-NEXT: entry: 8721 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8722 // CHECK11-NEXT: [[A:%.*]] = alloca double*, align 4 8723 // CHECK11-NEXT: [[B:%.*]] = alloca double*, align 4 8724 // CHECK11-NEXT: [[C:%.*]] = alloca double*, align 4 8725 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 8726 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 8727 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8728 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 8729 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 8730 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 8731 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 8732 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8733 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8734 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 8735 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 8736 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 8737 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 8738 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 8739 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 8740 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 8741 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 8742 // CHECK11-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 8743 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 8744 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 8745 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 8746 // CHECK11-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 8747 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 8748 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 8749 // CHECK11-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 8750 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 8751 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 8752 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 8753 // CHECK11-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 8754 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 8755 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 8756 // CHECK11-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 8757 // CHECK11-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 8758 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 8759 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 8760 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 8761 // CHECK11-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 8762 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 8763 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 8764 // CHECK11-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 8765 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 8766 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 8767 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 8768 // CHECK11-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 8769 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 8770 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 8771 // CHECK11-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 8772 // CHECK11-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 8773 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 8774 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 8775 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 8776 // CHECK11-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 8777 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 8778 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 8779 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 8780 // CHECK11-NEXT: store i32 10000, i32* [[N]], align 4 8781 // CHECK11-NEXT: store i32 100, i32* [[CH]], align 4 8782 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 8783 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 8784 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 8785 // CHECK11-NEXT: [[TMP2:%.*]] = load double*, double** [[A]], align 4 8786 // CHECK11-NEXT: [[TMP3:%.*]] = load double*, double** [[B]], align 4 8787 // CHECK11-NEXT: [[TMP4:%.*]] = load double*, double** [[C]], align 4 8788 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8789 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 8790 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 8791 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8792 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 8793 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 8794 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 8795 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 8796 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 8797 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to double** 8798 // CHECK11-NEXT: store double* [[TMP2]], double** [[TMP11]], align 4 8799 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 8800 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double** 8801 // CHECK11-NEXT: store double* [[TMP2]], double** [[TMP13]], align 4 8802 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 8803 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 8804 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 8805 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to double** 8806 // CHECK11-NEXT: store double* [[TMP3]], double** [[TMP16]], align 4 8807 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 8808 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to double** 8809 // CHECK11-NEXT: store double* [[TMP3]], double** [[TMP18]], align 4 8810 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 8811 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 8812 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 8813 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to double** 8814 // CHECK11-NEXT: store double* [[TMP4]], double** [[TMP21]], align 4 8815 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 8816 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to double** 8817 // CHECK11-NEXT: store double* [[TMP4]], double** [[TMP23]], align 4 8818 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 8819 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 8820 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8821 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8822 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 8823 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 8824 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8825 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 8826 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8827 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8828 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8829 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8830 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 8831 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 8832 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 8833 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8834 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 8835 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8836 // CHECK11: omp_offload.failed: 8837 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369(i32 [[TMP1]], double* [[TMP2]], double* [[TMP3]], double* [[TMP4]]) #[[ATTR2:[0-9]+]] 8838 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 8839 // CHECK11: omp_offload.cont: 8840 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 8841 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 8842 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 8843 // CHECK11-NEXT: [[TMP35:%.*]] = load double*, double** [[A]], align 4 8844 // CHECK11-NEXT: [[TMP36:%.*]] = load double*, double** [[B]], align 4 8845 // CHECK11-NEXT: [[TMP37:%.*]] = load double*, double** [[C]], align 4 8846 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 8847 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 8848 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 8849 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 8850 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 8851 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 8852 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 8853 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4 8854 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 8855 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to double** 8856 // CHECK11-NEXT: store double* [[TMP35]], double** [[TMP44]], align 4 8857 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 8858 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to double** 8859 // CHECK11-NEXT: store double* [[TMP35]], double** [[TMP46]], align 4 8860 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 8861 // CHECK11-NEXT: store i8* null, i8** [[TMP47]], align 4 8862 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 8863 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to double** 8864 // CHECK11-NEXT: store double* [[TMP36]], double** [[TMP49]], align 4 8865 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 8866 // CHECK11-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to double** 8867 // CHECK11-NEXT: store double* [[TMP36]], double** [[TMP51]], align 4 8868 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 8869 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 8870 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 8871 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to double** 8872 // CHECK11-NEXT: store double* [[TMP37]], double** [[TMP54]], align 4 8873 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 8874 // CHECK11-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to double** 8875 // CHECK11-NEXT: store double* [[TMP37]], double** [[TMP56]], align 4 8876 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 8877 // CHECK11-NEXT: store i8* null, i8** [[TMP57]], align 4 8878 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 8879 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 8880 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 8881 // CHECK11-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 8882 // CHECK11-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 8883 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 8884 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 8885 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 8886 // CHECK11-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 8887 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 8888 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 8889 // CHECK11-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 8890 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 8891 // CHECK11-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8892 // CHECK11-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 8893 // CHECK11-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 8894 // CHECK11: omp_offload.failed14: 8895 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408(i32 [[TMP34]], double* [[TMP35]], double* [[TMP36]], double* [[TMP37]]) #[[ATTR2]] 8896 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT15]] 8897 // CHECK11: omp_offload.cont15: 8898 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 8899 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 8900 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 8901 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 8902 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 8903 // CHECK11-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 8904 // CHECK11-NEXT: [[TMP70:%.*]] = load double*, double** [[A]], align 4 8905 // CHECK11-NEXT: [[TMP71:%.*]] = load double*, double** [[B]], align 4 8906 // CHECK11-NEXT: [[TMP72:%.*]] = load double*, double** [[C]], align 4 8907 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 8908 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 8909 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 8910 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 8911 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 8912 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 8913 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 8914 // CHECK11-NEXT: store i8* null, i8** [[TMP77]], align 4 8915 // CHECK11-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 8916 // CHECK11-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 8917 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 8918 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 8919 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 8920 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 8921 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 8922 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 8923 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 8924 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to double** 8925 // CHECK11-NEXT: store double* [[TMP70]], double** [[TMP84]], align 4 8926 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 8927 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to double** 8928 // CHECK11-NEXT: store double* [[TMP70]], double** [[TMP86]], align 4 8929 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 8930 // CHECK11-NEXT: store i8* null, i8** [[TMP87]], align 4 8931 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 8932 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to double** 8933 // CHECK11-NEXT: store double* [[TMP71]], double** [[TMP89]], align 4 8934 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 8935 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to double** 8936 // CHECK11-NEXT: store double* [[TMP71]], double** [[TMP91]], align 4 8937 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 8938 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4 8939 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 8940 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to double** 8941 // CHECK11-NEXT: store double* [[TMP72]], double** [[TMP94]], align 4 8942 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 8943 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to double** 8944 // CHECK11-NEXT: store double* [[TMP72]], double** [[TMP96]], align 4 8945 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 8946 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4 8947 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 8948 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 8949 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 8950 // CHECK11-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 8951 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 8952 // CHECK11-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 8953 // CHECK11-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 8954 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 8955 // CHECK11-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 8956 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 8957 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 8958 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 8959 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 8960 // CHECK11-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8961 // CHECK11-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 8962 // CHECK11-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 8963 // CHECK11: omp_offload.failed27: 8964 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447(i32 [[TMP67]], i32 [[TMP69]], double* [[TMP70]], double* [[TMP71]], double* [[TMP72]]) #[[ATTR2]] 8965 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT28]] 8966 // CHECK11: omp_offload.cont28: 8967 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 8968 // CHECK11-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 8969 // CHECK11-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 8970 // CHECK11-NEXT: [[TMP108:%.*]] = load double*, double** [[A]], align 4 8971 // CHECK11-NEXT: [[TMP109:%.*]] = load double*, double** [[B]], align 4 8972 // CHECK11-NEXT: [[TMP110:%.*]] = load double*, double** [[C]], align 4 8973 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 8974 // CHECK11-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 8975 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 8976 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 8977 // CHECK11-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 8978 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 8979 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 8980 // CHECK11-NEXT: store i8* null, i8** [[TMP115]], align 4 8981 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 8982 // CHECK11-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to double** 8983 // CHECK11-NEXT: store double* [[TMP108]], double** [[TMP117]], align 4 8984 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 8985 // CHECK11-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to double** 8986 // CHECK11-NEXT: store double* [[TMP108]], double** [[TMP119]], align 4 8987 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 8988 // CHECK11-NEXT: store i8* null, i8** [[TMP120]], align 4 8989 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 8990 // CHECK11-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to double** 8991 // CHECK11-NEXT: store double* [[TMP109]], double** [[TMP122]], align 4 8992 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 8993 // CHECK11-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to double** 8994 // CHECK11-NEXT: store double* [[TMP109]], double** [[TMP124]], align 4 8995 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 8996 // CHECK11-NEXT: store i8* null, i8** [[TMP125]], align 4 8997 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 8998 // CHECK11-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to double** 8999 // CHECK11-NEXT: store double* [[TMP110]], double** [[TMP127]], align 4 9000 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 9001 // CHECK11-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to double** 9002 // CHECK11-NEXT: store double* [[TMP110]], double** [[TMP129]], align 4 9003 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 9004 // CHECK11-NEXT: store i8* null, i8** [[TMP130]], align 4 9005 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 9006 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 9007 // CHECK11-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 9008 // CHECK11-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 9009 // CHECK11-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 9010 // CHECK11-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 9011 // CHECK11-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 9012 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 9013 // CHECK11-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 9014 // CHECK11-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 9015 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 9016 // CHECK11-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 9017 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 9018 // CHECK11-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9019 // CHECK11-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 9020 // CHECK11-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 9021 // CHECK11: omp_offload.failed40: 9022 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478(i32 [[TMP107]], double* [[TMP108]], double* [[TMP109]], double* [[TMP110]]) #[[ATTR2]] 9023 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT41]] 9024 // CHECK11: omp_offload.cont41: 9025 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 9026 // CHECK11-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 9027 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 9028 // CHECK11-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 9029 // CHECK11-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 9030 // CHECK11-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 9031 // CHECK11-NEXT: [[TMP143:%.*]] = load double*, double** [[A]], align 4 9032 // CHECK11-NEXT: [[TMP144:%.*]] = load double*, double** [[B]], align 4 9033 // CHECK11-NEXT: [[TMP145:%.*]] = load double*, double** [[C]], align 4 9034 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 9035 // CHECK11-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 9036 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 9037 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 9038 // CHECK11-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 9039 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 9040 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 9041 // CHECK11-NEXT: store i8* null, i8** [[TMP150]], align 4 9042 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 9043 // CHECK11-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 9044 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 9045 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 9046 // CHECK11-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 9047 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 9048 // CHECK11-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 9049 // CHECK11-NEXT: store i8* null, i8** [[TMP155]], align 4 9050 // CHECK11-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 9051 // CHECK11-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to double** 9052 // CHECK11-NEXT: store double* [[TMP143]], double** [[TMP157]], align 4 9053 // CHECK11-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 9054 // CHECK11-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to double** 9055 // CHECK11-NEXT: store double* [[TMP143]], double** [[TMP159]], align 4 9056 // CHECK11-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 9057 // CHECK11-NEXT: store i8* null, i8** [[TMP160]], align 4 9058 // CHECK11-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 9059 // CHECK11-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to double** 9060 // CHECK11-NEXT: store double* [[TMP144]], double** [[TMP162]], align 4 9061 // CHECK11-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 9062 // CHECK11-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to double** 9063 // CHECK11-NEXT: store double* [[TMP144]], double** [[TMP164]], align 4 9064 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 9065 // CHECK11-NEXT: store i8* null, i8** [[TMP165]], align 4 9066 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 9067 // CHECK11-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to double** 9068 // CHECK11-NEXT: store double* [[TMP145]], double** [[TMP167]], align 4 9069 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 9070 // CHECK11-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to double** 9071 // CHECK11-NEXT: store double* [[TMP145]], double** [[TMP169]], align 4 9072 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 9073 // CHECK11-NEXT: store i8* null, i8** [[TMP170]], align 4 9074 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 9075 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 9076 // CHECK11-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 9077 // CHECK11-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 9078 // CHECK11-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 9079 // CHECK11-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 9080 // CHECK11-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 9081 // CHECK11-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 9082 // CHECK11-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 9083 // CHECK11-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 9084 // CHECK11-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 9085 // CHECK11-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 9086 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 9087 // CHECK11-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9088 // CHECK11-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 9089 // CHECK11-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 9090 // CHECK11: omp_offload.failed54: 9091 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506(i32 [[TMP140]], i32 [[TMP142]], double* [[TMP143]], double* [[TMP144]], double* [[TMP145]]) #[[ATTR2]] 9092 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT55]] 9093 // CHECK11: omp_offload.cont55: 9094 // CHECK11-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 9095 // CHECK11-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 9096 // CHECK11-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 9097 // CHECK11-NEXT: [[TMP181:%.*]] = load double*, double** [[A]], align 4 9098 // CHECK11-NEXT: [[TMP182:%.*]] = load double*, double** [[B]], align 4 9099 // CHECK11-NEXT: [[TMP183:%.*]] = load double*, double** [[C]], align 4 9100 // CHECK11-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 9101 // CHECK11-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 9102 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 9103 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 9104 // CHECK11-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 9105 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 9106 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 9107 // CHECK11-NEXT: store i8* null, i8** [[TMP188]], align 4 9108 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 9109 // CHECK11-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to double** 9110 // CHECK11-NEXT: store double* [[TMP181]], double** [[TMP190]], align 4 9111 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 9112 // CHECK11-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to double** 9113 // CHECK11-NEXT: store double* [[TMP181]], double** [[TMP192]], align 4 9114 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 9115 // CHECK11-NEXT: store i8* null, i8** [[TMP193]], align 4 9116 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 9117 // CHECK11-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to double** 9118 // CHECK11-NEXT: store double* [[TMP182]], double** [[TMP195]], align 4 9119 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 9120 // CHECK11-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to double** 9121 // CHECK11-NEXT: store double* [[TMP182]], double** [[TMP197]], align 4 9122 // CHECK11-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 9123 // CHECK11-NEXT: store i8* null, i8** [[TMP198]], align 4 9124 // CHECK11-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 9125 // CHECK11-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to double** 9126 // CHECK11-NEXT: store double* [[TMP183]], double** [[TMP200]], align 4 9127 // CHECK11-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 9128 // CHECK11-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to double** 9129 // CHECK11-NEXT: store double* [[TMP183]], double** [[TMP202]], align 4 9130 // CHECK11-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 9131 // CHECK11-NEXT: store i8* null, i8** [[TMP203]], align 4 9132 // CHECK11-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 9133 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 9134 // CHECK11-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 9135 // CHECK11-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 9136 // CHECK11-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 9137 // CHECK11-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 9138 // CHECK11-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 9139 // CHECK11-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 9140 // CHECK11-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 9141 // CHECK11-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 9142 // CHECK11-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 9143 // CHECK11-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 9144 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 9145 // CHECK11-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9146 // CHECK11-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 9147 // CHECK11-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 9148 // CHECK11: omp_offload.failed67: 9149 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536(i32 [[TMP180]], double* [[TMP181]], double* [[TMP182]], double* [[TMP183]]) #[[ATTR2]] 9150 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT68]] 9151 // CHECK11: omp_offload.cont68: 9152 // CHECK11-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 9153 // CHECK11-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 9154 // CHECK11-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 9155 // CHECK11-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 9156 // CHECK11-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 9157 // CHECK11-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 9158 // CHECK11-NEXT: [[TMP216:%.*]] = load double*, double** [[A]], align 4 9159 // CHECK11-NEXT: [[TMP217:%.*]] = load double*, double** [[B]], align 4 9160 // CHECK11-NEXT: [[TMP218:%.*]] = load double*, double** [[C]], align 4 9161 // CHECK11-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 9162 // CHECK11-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 9163 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 9164 // CHECK11-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 9165 // CHECK11-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 9166 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 9167 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 9168 // CHECK11-NEXT: store i8* null, i8** [[TMP223]], align 4 9169 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 9170 // CHECK11-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 9171 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 9172 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 9173 // CHECK11-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 9174 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 9175 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 9176 // CHECK11-NEXT: store i8* null, i8** [[TMP228]], align 4 9177 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 9178 // CHECK11-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to double** 9179 // CHECK11-NEXT: store double* [[TMP216]], double** [[TMP230]], align 4 9180 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 9181 // CHECK11-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to double** 9182 // CHECK11-NEXT: store double* [[TMP216]], double** [[TMP232]], align 4 9183 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 9184 // CHECK11-NEXT: store i8* null, i8** [[TMP233]], align 4 9185 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 9186 // CHECK11-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to double** 9187 // CHECK11-NEXT: store double* [[TMP217]], double** [[TMP235]], align 4 9188 // CHECK11-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 9189 // CHECK11-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to double** 9190 // CHECK11-NEXT: store double* [[TMP217]], double** [[TMP237]], align 4 9191 // CHECK11-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 9192 // CHECK11-NEXT: store i8* null, i8** [[TMP238]], align 4 9193 // CHECK11-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 9194 // CHECK11-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to double** 9195 // CHECK11-NEXT: store double* [[TMP218]], double** [[TMP240]], align 4 9196 // CHECK11-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 9197 // CHECK11-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to double** 9198 // CHECK11-NEXT: store double* [[TMP218]], double** [[TMP242]], align 4 9199 // CHECK11-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 9200 // CHECK11-NEXT: store i8* null, i8** [[TMP243]], align 4 9201 // CHECK11-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 9202 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 9203 // CHECK11-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 9204 // CHECK11-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 9205 // CHECK11-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 9206 // CHECK11-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 9207 // CHECK11-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 9208 // CHECK11-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 9209 // CHECK11-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 9210 // CHECK11-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 9211 // CHECK11-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 9212 // CHECK11-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 9213 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 9214 // CHECK11-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9215 // CHECK11-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 9216 // CHECK11-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 9217 // CHECK11: omp_offload.failed81: 9218 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562(i32 [[TMP213]], i32 [[TMP215]], double* [[TMP216]], double* [[TMP217]], double* [[TMP218]]) #[[ATTR2]] 9219 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT82]] 9220 // CHECK11: omp_offload.cont82: 9221 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 9222 // CHECK11-NEXT: ret i32 [[CALL]] 9223 // 9224 // 9225 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 9226 // CHECK11-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { 9227 // CHECK11-NEXT: entry: 9228 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9229 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 9230 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 9231 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 9232 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9233 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 9234 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 9235 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 9236 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9237 // CHECK11-NEXT: ret void 9238 // 9239 // 9240 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 9241 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9242 // CHECK11-NEXT: entry: 9243 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9244 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9245 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9246 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9247 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9248 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9249 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9250 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9251 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9252 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9253 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9254 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9255 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9256 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9257 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9258 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9259 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9260 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9261 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9262 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9263 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9264 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9265 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9266 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9267 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9268 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9269 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9270 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9271 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9272 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9273 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9274 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9275 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9276 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9277 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9278 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9279 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9280 // CHECK11: omp.precond.then: 9281 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9282 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9283 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 9284 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9285 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9286 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9287 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9288 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9289 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9290 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9291 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9292 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9293 // CHECK11: cond.true: 9294 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9295 // CHECK11-NEXT: br label [[COND_END:%.*]] 9296 // CHECK11: cond.false: 9297 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9298 // CHECK11-NEXT: br label [[COND_END]] 9299 // CHECK11: cond.end: 9300 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9301 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9302 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9303 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 9304 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9305 // CHECK11: omp.inner.for.cond: 9306 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9307 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9308 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 9309 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9310 // CHECK11: omp.inner.for.body: 9311 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9312 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9313 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 9314 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9315 // CHECK11: omp.inner.for.inc: 9316 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9317 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9318 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 9319 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9320 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9321 // CHECK11: omp.inner.for.end: 9322 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9323 // CHECK11: omp.loop.exit: 9324 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9325 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 9326 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 9327 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9328 // CHECK11: omp.precond.end: 9329 // CHECK11-NEXT: ret void 9330 // 9331 // 9332 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 9333 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9334 // CHECK11-NEXT: entry: 9335 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9336 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9337 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9338 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9339 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9340 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9341 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9342 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9343 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9344 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9345 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9346 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9347 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9348 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9349 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9350 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9351 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9352 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9353 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9354 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9355 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9356 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9357 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9358 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9359 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9360 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9361 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9362 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9363 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9364 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9365 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9366 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9367 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9368 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9369 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9370 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9371 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9372 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9373 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9374 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9375 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9376 // CHECK11: omp.precond.then: 9377 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9378 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9379 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9380 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9381 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9382 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 9383 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 9384 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9385 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9386 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9387 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9388 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9389 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9390 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9391 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9392 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9393 // CHECK11: cond.true: 9394 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9395 // CHECK11-NEXT: br label [[COND_END:%.*]] 9396 // CHECK11: cond.false: 9397 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9398 // CHECK11-NEXT: br label [[COND_END]] 9399 // CHECK11: cond.end: 9400 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9401 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9402 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9403 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9404 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9405 // CHECK11: omp.inner.for.cond: 9406 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9407 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9408 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9409 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9410 // CHECK11: omp.inner.for.body: 9411 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9412 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9413 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9414 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 9415 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 9416 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 9417 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 9418 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 9419 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 9420 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 9421 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 9422 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 9423 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 9424 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 9425 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 9426 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 9427 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 9428 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9429 // CHECK11: omp.body.continue: 9430 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9431 // CHECK11: omp.inner.for.inc: 9432 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9433 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 9434 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 9435 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9436 // CHECK11: omp.inner.for.end: 9437 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9438 // CHECK11: omp.loop.exit: 9439 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9440 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 9441 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 9442 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9443 // CHECK11: omp.precond.end: 9444 // CHECK11-NEXT: ret void 9445 // 9446 // 9447 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 9448 // CHECK11-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 9449 // CHECK11-NEXT: entry: 9450 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9451 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 9452 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 9453 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 9454 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9455 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 9456 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 9457 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 9458 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9459 // CHECK11-NEXT: ret void 9460 // 9461 // 9462 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 9463 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9464 // CHECK11-NEXT: entry: 9465 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9466 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9467 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9468 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9469 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9470 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9471 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9472 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9473 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9474 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9475 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9476 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9477 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9478 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9479 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9480 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9481 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9482 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9483 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9484 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9485 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9486 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9487 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9488 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9489 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9490 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9491 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9492 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9493 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9494 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9495 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9496 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9497 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9498 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9499 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9500 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9501 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9502 // CHECK11: omp.precond.then: 9503 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9504 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9505 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 9506 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9507 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9508 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9509 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9510 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9511 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9512 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9513 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9514 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9515 // CHECK11: cond.true: 9516 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9517 // CHECK11-NEXT: br label [[COND_END:%.*]] 9518 // CHECK11: cond.false: 9519 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9520 // CHECK11-NEXT: br label [[COND_END]] 9521 // CHECK11: cond.end: 9522 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9523 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9524 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9525 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 9526 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9527 // CHECK11: omp.inner.for.cond: 9528 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9529 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9530 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 9531 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9532 // CHECK11: omp.inner.for.body: 9533 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9534 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9535 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 9536 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9537 // CHECK11: omp.inner.for.inc: 9538 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9539 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9540 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 9541 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9542 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9543 // CHECK11: omp.inner.for.end: 9544 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9545 // CHECK11: omp.loop.exit: 9546 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9547 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 9548 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 9549 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9550 // CHECK11: omp.precond.end: 9551 // CHECK11-NEXT: ret void 9552 // 9553 // 9554 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 9555 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9556 // CHECK11-NEXT: entry: 9557 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9558 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9559 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9560 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9561 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9562 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9563 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9564 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9565 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9566 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9567 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9568 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9569 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9570 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9571 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9572 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9573 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9574 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9575 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9576 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9577 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9578 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9579 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9580 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9581 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9582 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9583 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9584 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9585 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9586 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9587 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9588 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9589 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9590 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9591 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9592 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9593 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9594 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9595 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9596 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9597 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9598 // CHECK11: omp.precond.then: 9599 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9600 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9601 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9602 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9603 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9604 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 9605 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 9606 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9607 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9608 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9609 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9610 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9611 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9612 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9613 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9614 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9615 // CHECK11: cond.true: 9616 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9617 // CHECK11-NEXT: br label [[COND_END:%.*]] 9618 // CHECK11: cond.false: 9619 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9620 // CHECK11-NEXT: br label [[COND_END]] 9621 // CHECK11: cond.end: 9622 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9623 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9624 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9625 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9626 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9627 // CHECK11: omp.inner.for.cond: 9628 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9629 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9630 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9631 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9632 // CHECK11: omp.inner.for.body: 9633 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9634 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9635 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9636 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 9637 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 9638 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 9639 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 9640 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 9641 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 9642 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 9643 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 9644 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 9645 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 9646 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 9647 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 9648 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 9649 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 9650 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9651 // CHECK11: omp.body.continue: 9652 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9653 // CHECK11: omp.inner.for.inc: 9654 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9655 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 9656 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 9657 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9658 // CHECK11: omp.inner.for.end: 9659 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9660 // CHECK11: omp.loop.exit: 9661 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9662 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 9663 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 9664 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9665 // CHECK11: omp.precond.end: 9666 // CHECK11-NEXT: ret void 9667 // 9668 // 9669 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 9670 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 9671 // CHECK11-NEXT: entry: 9672 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 9673 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9674 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 9675 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 9676 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 9677 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 9678 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9679 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 9680 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 9681 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 9682 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9683 // CHECK11-NEXT: ret void 9684 // 9685 // 9686 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 9687 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9688 // CHECK11-NEXT: entry: 9689 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9690 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9691 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 9692 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9693 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9694 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9695 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9696 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9697 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9698 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9699 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9700 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9701 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9702 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9703 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9704 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9705 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9706 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9707 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9708 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 9709 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9710 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9711 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9712 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9713 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 9714 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9715 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 9716 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 9717 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 9718 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 9719 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 9720 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9721 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 9722 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9723 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9724 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9725 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9726 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9727 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 9728 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9729 // CHECK11: omp.precond.then: 9730 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9731 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9732 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 9733 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9734 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9735 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 9736 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9737 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9738 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 9739 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9740 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9741 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9742 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9743 // CHECK11: cond.true: 9744 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9745 // CHECK11-NEXT: br label [[COND_END:%.*]] 9746 // CHECK11: cond.false: 9747 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9748 // CHECK11-NEXT: br label [[COND_END]] 9749 // CHECK11: cond.end: 9750 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9751 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9752 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9753 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9754 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9755 // CHECK11: omp.inner.for.cond: 9756 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9757 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9758 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 9759 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 9760 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9761 // CHECK11: omp.inner.for.body: 9762 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9763 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9764 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]]) 9765 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9766 // CHECK11: omp.inner.for.inc: 9767 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9768 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9769 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 9770 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 9771 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9772 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9773 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 9774 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 9775 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9776 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9777 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 9778 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 9779 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9780 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9781 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 9782 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 9783 // CHECK11: cond.true10: 9784 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9785 // CHECK11-NEXT: br label [[COND_END12:%.*]] 9786 // CHECK11: cond.false11: 9787 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9788 // CHECK11-NEXT: br label [[COND_END12]] 9789 // CHECK11: cond.end12: 9790 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 9791 // CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 9792 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9793 // CHECK11-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 9794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9795 // CHECK11: omp.inner.for.end: 9796 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9797 // CHECK11: omp.loop.exit: 9798 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9799 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 9800 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 9801 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9802 // CHECK11: omp.precond.end: 9803 // CHECK11-NEXT: ret void 9804 // 9805 // 9806 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 9807 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9808 // CHECK11-NEXT: entry: 9809 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9810 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9811 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9812 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9813 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9814 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9815 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9816 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9817 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9818 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9819 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9820 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9821 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9822 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9823 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9824 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9825 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9826 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9827 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9828 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9829 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9830 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9831 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9832 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9833 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9834 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9835 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9836 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9837 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9838 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9839 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9840 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9841 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9842 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9843 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9844 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9845 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9846 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9847 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9848 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9849 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9850 // CHECK11: omp.precond.then: 9851 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9852 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9853 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 9854 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 9855 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 9856 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 9857 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 9858 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9859 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9860 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9861 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 9862 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9863 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9864 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9865 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9866 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9867 // CHECK11: cond.true: 9868 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9869 // CHECK11-NEXT: br label [[COND_END:%.*]] 9870 // CHECK11: cond.false: 9871 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9872 // CHECK11-NEXT: br label [[COND_END]] 9873 // CHECK11: cond.end: 9874 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9875 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9876 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9877 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9878 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9879 // CHECK11: omp.inner.for.cond: 9880 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9881 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9882 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9883 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9884 // CHECK11: omp.inner.for.body: 9885 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9886 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9887 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9888 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 9889 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 9890 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 9891 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 9892 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 9893 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 9894 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 9895 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 9896 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 9897 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 9898 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 9899 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 9900 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 9901 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 9902 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9903 // CHECK11: omp.body.continue: 9904 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9905 // CHECK11: omp.inner.for.inc: 9906 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9907 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 9908 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 9909 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 9910 // CHECK11: omp.inner.for.end: 9911 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9912 // CHECK11: omp.loop.exit: 9913 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9914 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 9915 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 9916 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 9917 // CHECK11: omp.precond.end: 9918 // CHECK11-NEXT: ret void 9919 // 9920 // 9921 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 9922 // CHECK11-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 9923 // CHECK11-NEXT: entry: 9924 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9925 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 9926 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 9927 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 9928 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 9929 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 9930 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 9931 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 9932 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 9933 // CHECK11-NEXT: ret void 9934 // 9935 // 9936 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 9937 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 9938 // CHECK11-NEXT: entry: 9939 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 9940 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 9941 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 9942 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 9943 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 9944 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 9945 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9946 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9947 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9948 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9949 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 9950 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9951 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9952 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9953 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9954 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 9955 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 9956 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 9957 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 9958 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 9959 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 9960 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 9961 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 9962 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 9963 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 9964 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 9965 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 9966 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 9967 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9968 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9969 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9970 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9971 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9972 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 9973 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9974 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9975 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9976 // CHECK11: omp.precond.then: 9977 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9978 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9979 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 9980 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9981 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9982 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 9983 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9984 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9985 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9986 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9987 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9988 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9989 // CHECK11: cond.true: 9990 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9991 // CHECK11-NEXT: br label [[COND_END:%.*]] 9992 // CHECK11: cond.false: 9993 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9994 // CHECK11-NEXT: br label [[COND_END]] 9995 // CHECK11: cond.end: 9996 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9997 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9998 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9999 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10000 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10001 // CHECK11: omp.inner.for.cond: 10002 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10003 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10004 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10005 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10006 // CHECK11: omp.inner.for.body: 10007 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10008 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10009 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 10010 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10011 // CHECK11: omp.inner.for.inc: 10012 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10013 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10014 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 10015 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10016 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10017 // CHECK11: omp.inner.for.end: 10018 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10019 // CHECK11: omp.loop.exit: 10020 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10021 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10022 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10023 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10024 // CHECK11: omp.precond.end: 10025 // CHECK11-NEXT: ret void 10026 // 10027 // 10028 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11 10029 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10030 // CHECK11-NEXT: entry: 10031 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10032 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10033 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10034 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10035 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10036 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10037 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10038 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10039 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10040 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10041 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10042 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10043 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10044 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10045 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10046 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10047 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10048 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10049 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10050 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10051 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10052 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10053 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10054 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10055 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10056 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10057 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10058 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 10059 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 10060 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 10061 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10062 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10063 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10064 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10065 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10066 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10067 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10068 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10069 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10070 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10071 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10072 // CHECK11: omp.precond.then: 10073 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10074 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10075 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10076 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10077 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10078 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 10079 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 10080 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10081 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10082 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10083 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 10084 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10085 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10086 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10087 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10088 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10089 // CHECK11: cond.true: 10090 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10091 // CHECK11-NEXT: br label [[COND_END:%.*]] 10092 // CHECK11: cond.false: 10093 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10094 // CHECK11-NEXT: br label [[COND_END]] 10095 // CHECK11: cond.end: 10096 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10097 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10098 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10099 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 10100 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10101 // CHECK11: omp.inner.for.cond: 10102 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10103 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10104 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10105 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10106 // CHECK11: omp.inner.for.body: 10107 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10108 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10109 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10110 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 10111 // CHECK11-NEXT: [[TMP20:%.*]] = load double*, double** [[TMP2]], align 4 10112 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 10113 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP20]], i32 [[TMP21]] 10114 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX]], align 4 10115 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP3]], align 4 10116 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 10117 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 10118 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX6]], align 4 10119 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 10120 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP1]], align 4 10121 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 10122 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 10123 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4 10124 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10125 // CHECK11: omp.body.continue: 10126 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10127 // CHECK11: omp.inner.for.inc: 10128 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10129 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 10130 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 10131 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10132 // CHECK11: omp.inner.for.end: 10133 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10134 // CHECK11: omp.loop.exit: 10135 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10136 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 10137 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 10138 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10139 // CHECK11: omp.precond.end: 10140 // CHECK11-NEXT: ret void 10141 // 10142 // 10143 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 10144 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 10145 // CHECK11-NEXT: entry: 10146 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 10147 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10148 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 10149 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 10150 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 10151 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 10152 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10153 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 10154 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 10155 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 10156 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 10157 // CHECK11-NEXT: ret void 10158 // 10159 // 10160 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14 10161 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10162 // CHECK11-NEXT: entry: 10163 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10164 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10165 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 10166 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10167 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10168 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10169 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10170 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10171 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10172 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10173 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10174 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10175 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10176 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10177 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10178 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10179 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10180 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 10181 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10182 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10183 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10184 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 10185 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10186 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10187 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10188 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10189 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 10190 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10191 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 10192 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 10193 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 10194 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 10195 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 10196 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 10197 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10198 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10199 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 10200 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10201 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10202 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10203 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10204 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10205 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 10206 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10207 // CHECK11: omp.precond.then: 10208 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10209 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10210 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 10211 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10212 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10213 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10214 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 10215 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10216 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10217 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10218 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10219 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10220 // CHECK11: cond.true: 10221 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10222 // CHECK11-NEXT: br label [[COND_END:%.*]] 10223 // CHECK11: cond.false: 10224 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10225 // CHECK11-NEXT: br label [[COND_END]] 10226 // CHECK11: cond.end: 10227 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10228 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10229 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10230 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 10231 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10232 // CHECK11: omp.inner.for.cond: 10233 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10234 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10235 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10236 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10237 // CHECK11: omp.inner.for.body: 10238 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10239 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10240 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10241 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 10242 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 10243 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 10244 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10245 // CHECK11: omp.inner.for.inc: 10246 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10247 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10248 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 10249 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10250 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10251 // CHECK11: omp.inner.for.end: 10252 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10253 // CHECK11: omp.loop.exit: 10254 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10255 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 10256 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 10257 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10258 // CHECK11: omp.precond.end: 10259 // CHECK11-NEXT: ret void 10260 // 10261 // 10262 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15 10263 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 10264 // CHECK11-NEXT: entry: 10265 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10266 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10267 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10268 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10269 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10270 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10271 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10272 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10273 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10274 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10275 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10276 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10277 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10278 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10279 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10280 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10281 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10282 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10283 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 10284 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10285 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10286 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10287 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10288 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10289 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10290 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10291 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10292 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 10293 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10294 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 10295 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 10296 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 10297 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10298 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10299 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10300 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10301 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10302 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10303 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10304 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10305 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10306 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10307 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10308 // CHECK11: omp.precond.then: 10309 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10310 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10311 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10312 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10313 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10314 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 10315 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 10316 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10317 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10318 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 10319 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10320 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 10321 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 10322 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10323 // CHECK11: omp.dispatch.cond: 10324 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10325 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10326 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 10327 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10328 // CHECK11: cond.true: 10329 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10330 // CHECK11-NEXT: br label [[COND_END:%.*]] 10331 // CHECK11: cond.false: 10332 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10333 // CHECK11-NEXT: br label [[COND_END]] 10334 // CHECK11: cond.end: 10335 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 10336 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10337 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10338 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 10339 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10340 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10341 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 10342 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10343 // CHECK11: omp.dispatch.body: 10344 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10345 // CHECK11: omp.inner.for.cond: 10346 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10347 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10348 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 10349 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10350 // CHECK11: omp.inner.for.body: 10351 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10352 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 10353 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10354 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10355 // CHECK11-NEXT: [[TMP23:%.*]] = load double*, double** [[TMP2]], align 4 10356 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 10357 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP23]], i32 [[TMP24]] 10358 // CHECK11-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 4 10359 // CHECK11-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 4 10360 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 10361 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP26]], i32 [[TMP27]] 10362 // CHECK11-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX8]], align 4 10363 // CHECK11-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 10364 // CHECK11-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 4 10365 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 10366 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[TMP29]], i32 [[TMP30]] 10367 // CHECK11-NEXT: store double [[ADD9]], double* [[ARRAYIDX10]], align 4 10368 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10369 // CHECK11: omp.body.continue: 10370 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10371 // CHECK11: omp.inner.for.inc: 10372 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10373 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 10374 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 10375 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10376 // CHECK11: omp.inner.for.end: 10377 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10378 // CHECK11: omp.dispatch.inc: 10379 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10380 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10381 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 10382 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 10383 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10384 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10385 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 10386 // CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 10387 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 10388 // CHECK11: omp.dispatch.end: 10389 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10390 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 10391 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 10392 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10393 // CHECK11: omp.precond.end: 10394 // CHECK11-NEXT: ret void 10395 // 10396 // 10397 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 10398 // CHECK11-SAME: (i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 10399 // CHECK11-NEXT: entry: 10400 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10401 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 10402 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 10403 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 10404 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10405 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 10406 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 10407 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 10408 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 10409 // CHECK11-NEXT: ret void 10410 // 10411 // 10412 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18 10413 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10414 // CHECK11-NEXT: entry: 10415 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10416 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10417 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10418 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10419 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10420 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10421 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10422 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10423 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10424 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10425 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10426 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10427 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10428 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10429 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10430 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10431 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10432 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10433 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10434 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10435 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10436 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10437 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10438 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 10439 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 10440 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 10441 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10442 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10443 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10444 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10445 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10446 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10447 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10448 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10449 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10450 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10451 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10452 // CHECK11: omp.precond.then: 10453 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10454 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10455 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 10456 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10457 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10458 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10459 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 10460 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10461 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10462 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10463 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10464 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10465 // CHECK11: cond.true: 10466 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10467 // CHECK11-NEXT: br label [[COND_END:%.*]] 10468 // CHECK11: cond.false: 10469 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10470 // CHECK11-NEXT: br label [[COND_END]] 10471 // CHECK11: cond.end: 10472 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10473 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10474 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10475 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10476 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10477 // CHECK11: omp.inner.for.cond: 10478 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10479 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10480 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10481 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10482 // CHECK11: omp.inner.for.body: 10483 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10484 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10485 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], double** [[TMP1]], double** [[TMP2]], double** [[TMP3]]) 10486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10487 // CHECK11: omp.inner.for.inc: 10488 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10489 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10490 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 10491 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10492 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10493 // CHECK11: omp.inner.for.end: 10494 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10495 // CHECK11: omp.loop.exit: 10496 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10497 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10498 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10499 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10500 // CHECK11: omp.precond.end: 10501 // CHECK11-NEXT: ret void 10502 // 10503 // 10504 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..19 10505 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10506 // CHECK11-NEXT: entry: 10507 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10508 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10509 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10510 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10511 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10512 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10513 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10514 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10515 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10516 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10517 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10518 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10519 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10520 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10521 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10522 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10523 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10524 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10525 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10526 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10527 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10528 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10529 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10530 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10531 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10532 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10533 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10534 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 10535 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 10536 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 10537 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10538 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 10539 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10540 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10541 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10542 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10543 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10544 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10545 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10546 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10547 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10548 // CHECK11: omp.precond.then: 10549 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10550 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10551 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10552 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10553 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10554 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 10555 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 10556 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10557 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10558 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10559 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10560 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10561 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 10562 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 10563 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10564 // CHECK11: omp.dispatch.cond: 10565 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10566 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 10567 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 10568 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 10569 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10570 // CHECK11: omp.dispatch.body: 10571 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10572 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 10573 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10574 // CHECK11: omp.inner.for.cond: 10575 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 10576 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 10577 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 10578 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10579 // CHECK11: omp.inner.for.body: 10580 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 10581 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 10582 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10583 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !20 10584 // CHECK11-NEXT: [[TMP21:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !20 10585 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 10586 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP21]], i32 [[TMP22]] 10587 // CHECK11-NEXT: [[TMP23:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !20 10588 // CHECK11-NEXT: [[TMP24:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !20 10589 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 10590 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP24]], i32 [[TMP25]] 10591 // CHECK11-NEXT: [[TMP26:%.*]] = load double, double* [[ARRAYIDX5]], align 4, !llvm.access.group !20 10592 // CHECK11-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 10593 // CHECK11-NEXT: [[TMP27:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !20 10594 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !20 10595 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, double* [[TMP27]], i32 [[TMP28]] 10596 // CHECK11-NEXT: store double [[ADD6]], double* [[ARRAYIDX7]], align 4, !llvm.access.group !20 10597 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10598 // CHECK11: omp.body.continue: 10599 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10600 // CHECK11: omp.inner.for.inc: 10601 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 10602 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 10603 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 10604 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 10605 // CHECK11: omp.inner.for.end: 10606 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10607 // CHECK11: omp.dispatch.inc: 10608 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 10609 // CHECK11: omp.dispatch.end: 10610 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10611 // CHECK11: omp.precond.end: 10612 // CHECK11-NEXT: ret void 10613 // 10614 // 10615 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 10616 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], double* noundef [[A:%.*]], double* noundef [[B:%.*]], double* noundef [[C:%.*]]) #[[ATTR1]] { 10617 // CHECK11-NEXT: entry: 10618 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 10619 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10620 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double*, align 4 10621 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double*, align 4 10622 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double*, align 4 10623 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 10624 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 10625 // CHECK11-NEXT: store double* [[A]], double** [[A_ADDR]], align 4 10626 // CHECK11-NEXT: store double* [[B]], double** [[B_ADDR]], align 4 10627 // CHECK11-NEXT: store double* [[C]], double** [[C_ADDR]], align 4 10628 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, double**, double**, double**)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], double** [[A_ADDR]], double** [[B_ADDR]], double** [[C_ADDR]]) 10629 // CHECK11-NEXT: ret void 10630 // 10631 // 10632 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..22 10633 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10634 // CHECK11-NEXT: entry: 10635 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10636 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10637 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 10638 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10639 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10640 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10641 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10642 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10643 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10644 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10645 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10646 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10647 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10648 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10649 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10650 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10651 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10652 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 10653 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10654 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10655 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10656 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 10657 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10658 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10659 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10660 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10661 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 10662 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10663 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[A_ADDR]], align 4 10664 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[B_ADDR]], align 4 10665 // CHECK11-NEXT: [[TMP4:%.*]] = load double**, double*** [[C_ADDR]], align 4 10666 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 10667 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 10668 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 10669 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10670 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10671 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 10672 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10673 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10674 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10675 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10676 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10677 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 10678 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10679 // CHECK11: omp.precond.then: 10680 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10681 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10682 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 10683 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10684 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10685 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10686 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 10687 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10688 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10689 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10690 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10691 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10692 // CHECK11: cond.true: 10693 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10694 // CHECK11-NEXT: br label [[COND_END:%.*]] 10695 // CHECK11: cond.false: 10696 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10697 // CHECK11-NEXT: br label [[COND_END]] 10698 // CHECK11: cond.end: 10699 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10700 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10701 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10702 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 10703 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10704 // CHECK11: omp.inner.for.cond: 10705 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10706 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10707 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10708 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10709 // CHECK11: omp.inner.for.body: 10710 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10711 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10712 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10713 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 10714 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 10715 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, double**, double**, double**, i32)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], double** [[TMP2]], double** [[TMP3]], double** [[TMP4]], i32 [[TMP22]]) 10716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10717 // CHECK11: omp.inner.for.inc: 10718 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10719 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10720 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 10721 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10722 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 10723 // CHECK11: omp.inner.for.end: 10724 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10725 // CHECK11: omp.loop.exit: 10726 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10727 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 10728 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 10729 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10730 // CHECK11: omp.precond.end: 10731 // CHECK11-NEXT: ret void 10732 // 10733 // 10734 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..23 10735 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], double** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 10736 // CHECK11-NEXT: entry: 10737 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 10738 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 10739 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10740 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10741 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 10742 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca double**, align 4 10743 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca double**, align 4 10744 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca double**, align 4 10745 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10746 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10747 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10748 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10749 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10750 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10751 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10752 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10753 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10754 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10755 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 10756 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 10757 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 10758 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10759 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10760 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 10761 // CHECK11-NEXT: store double** [[A]], double*** [[A_ADDR]], align 4 10762 // CHECK11-NEXT: store double** [[B]], double*** [[B_ADDR]], align 4 10763 // CHECK11-NEXT: store double** [[C]], double*** [[C_ADDR]], align 4 10764 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 10765 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 10766 // CHECK11-NEXT: [[TMP1:%.*]] = load double**, double*** [[A_ADDR]], align 4 10767 // CHECK11-NEXT: [[TMP2:%.*]] = load double**, double*** [[B_ADDR]], align 4 10768 // CHECK11-NEXT: [[TMP3:%.*]] = load double**, double*** [[C_ADDR]], align 4 10769 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 10770 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10771 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10772 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10773 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10774 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10775 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10776 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 10777 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10778 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10779 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10780 // CHECK11: omp.precond.then: 10781 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10782 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10783 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 10784 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 10785 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 10786 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 10787 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 10788 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10789 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10790 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 10791 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10792 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10793 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10794 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 10795 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 10796 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10797 // CHECK11: omp.dispatch.cond: 10798 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 10799 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 10800 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 10801 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 10802 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10803 // CHECK11: omp.dispatch.body: 10804 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10805 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 10806 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10807 // CHECK11: omp.inner.for.cond: 10808 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 10809 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 10810 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 10811 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10812 // CHECK11: omp.inner.for.body: 10813 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 10814 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 10815 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10816 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !23 10817 // CHECK11-NEXT: [[TMP22:%.*]] = load double*, double** [[TMP2]], align 4, !llvm.access.group !23 10818 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 10819 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[TMP22]], i32 [[TMP23]] 10820 // CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX]], align 4, !llvm.access.group !23 10821 // CHECK11-NEXT: [[TMP25:%.*]] = load double*, double** [[TMP3]], align 4, !llvm.access.group !23 10822 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 10823 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, double* [[TMP25]], i32 [[TMP26]] 10824 // CHECK11-NEXT: [[TMP27:%.*]] = load double, double* [[ARRAYIDX6]], align 4, !llvm.access.group !23 10825 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 10826 // CHECK11-NEXT: [[TMP28:%.*]] = load double*, double** [[TMP1]], align 4, !llvm.access.group !23 10827 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !23 10828 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, double* [[TMP28]], i32 [[TMP29]] 10829 // CHECK11-NEXT: store double [[ADD7]], double* [[ARRAYIDX8]], align 4, !llvm.access.group !23 10830 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10831 // CHECK11: omp.body.continue: 10832 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10833 // CHECK11: omp.inner.for.inc: 10834 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 10835 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 10836 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 10837 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 10838 // CHECK11: omp.inner.for.end: 10839 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10840 // CHECK11: omp.dispatch.inc: 10841 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 10842 // CHECK11: omp.dispatch.end: 10843 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10844 // CHECK11: omp.precond.end: 10845 // CHECK11-NEXT: ret void 10846 // 10847 // 10848 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 10849 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] comdat { 10850 // CHECK11-NEXT: entry: 10851 // CHECK11-NEXT: [[A:%.*]] = alloca i32*, align 4 10852 // CHECK11-NEXT: [[B:%.*]] = alloca i32*, align 4 10853 // CHECK11-NEXT: [[C:%.*]] = alloca i32*, align 4 10854 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 10855 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 10856 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 10857 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4 10858 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4 10859 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4 10860 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10861 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10862 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10863 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 10864 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x i8*], align 4 10865 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x i8*], align 4 10866 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x i8*], align 4 10867 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 10868 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 10869 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 10870 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 10871 // CHECK11-NEXT: [[N_CASTED16:%.*]] = alloca i32, align 4 10872 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [5 x i8*], align 4 10873 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [5 x i8*], align 4 10874 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [5 x i8*], align 4 10875 // CHECK11-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 10876 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i32, align 4 10877 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 10878 // CHECK11-NEXT: [[N_CASTED29:%.*]] = alloca i32, align 4 10879 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS30:%.*]] = alloca [4 x i8*], align 4 10880 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS31:%.*]] = alloca [4 x i8*], align 4 10881 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS32:%.*]] = alloca [4 x i8*], align 4 10882 // CHECK11-NEXT: [[_TMP33:%.*]] = alloca i32, align 4 10883 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_34:%.*]] = alloca i32, align 4 10884 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_35:%.*]] = alloca i32, align 4 10885 // CHECK11-NEXT: [[CH_CASTED42:%.*]] = alloca i32, align 4 10886 // CHECK11-NEXT: [[N_CASTED43:%.*]] = alloca i32, align 4 10887 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [5 x i8*], align 4 10888 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [5 x i8*], align 4 10889 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [5 x i8*], align 4 10890 // CHECK11-NEXT: [[_TMP47:%.*]] = alloca i32, align 4 10891 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_48:%.*]] = alloca i32, align 4 10892 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 10893 // CHECK11-NEXT: [[N_CASTED56:%.*]] = alloca i32, align 4 10894 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [4 x i8*], align 4 10895 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [4 x i8*], align 4 10896 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [4 x i8*], align 4 10897 // CHECK11-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 10898 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4 10899 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4 10900 // CHECK11-NEXT: [[CH_CASTED69:%.*]] = alloca i32, align 4 10901 // CHECK11-NEXT: [[N_CASTED70:%.*]] = alloca i32, align 4 10902 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS71:%.*]] = alloca [5 x i8*], align 4 10903 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS72:%.*]] = alloca [5 x i8*], align 4 10904 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS73:%.*]] = alloca [5 x i8*], align 4 10905 // CHECK11-NEXT: [[_TMP74:%.*]] = alloca i32, align 4 10906 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_75:%.*]] = alloca i32, align 4 10907 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 10908 // CHECK11-NEXT: store i32 10000, i32* [[N]], align 4 10909 // CHECK11-NEXT: store i32 100, i32* [[CH]], align 4 10910 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 10911 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4 10912 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4 10913 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A]], align 4 10914 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[B]], align 4 10915 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[C]], align 4 10916 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10917 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 10918 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4 10919 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10920 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 10921 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4 10922 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 10923 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 4 10924 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10925 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32** 10926 // CHECK11-NEXT: store i32* [[TMP2]], i32** [[TMP11]], align 4 10927 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10928 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32** 10929 // CHECK11-NEXT: store i32* [[TMP2]], i32** [[TMP13]], align 4 10930 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 10931 // CHECK11-NEXT: store i8* null, i8** [[TMP14]], align 4 10932 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10933 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32** 10934 // CHECK11-NEXT: store i32* [[TMP3]], i32** [[TMP16]], align 4 10935 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10936 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 10937 // CHECK11-NEXT: store i32* [[TMP3]], i32** [[TMP18]], align 4 10938 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 10939 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4 10940 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 10941 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 10942 // CHECK11-NEXT: store i32* [[TMP4]], i32** [[TMP21]], align 4 10943 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 10944 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32** 10945 // CHECK11-NEXT: store i32* [[TMP4]], i32** [[TMP23]], align 4 10946 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 10947 // CHECK11-NEXT: store i8* null, i8** [[TMP24]], align 4 10948 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10949 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10950 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 10951 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 10952 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10953 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 10954 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10955 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10956 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10957 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10958 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 10959 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 10960 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP30]]) 10961 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, i32 4, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10962 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10963 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10964 // CHECK11: omp_offload.failed: 10965 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i32 [[TMP1]], i32* [[TMP2]], i32* [[TMP3]], i32* [[TMP4]]) #[[ATTR2]] 10966 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 10967 // CHECK11: omp_offload.cont: 10968 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 10969 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 10970 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 10971 // CHECK11-NEXT: [[TMP35:%.*]] = load i32*, i32** [[A]], align 4 10972 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[B]], align 4 10973 // CHECK11-NEXT: [[TMP37:%.*]] = load i32*, i32** [[C]], align 4 10974 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 10975 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32* 10976 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP39]], align 4 10977 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 10978 // CHECK11-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32* 10979 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP41]], align 4 10980 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 10981 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4 10982 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 10983 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32** 10984 // CHECK11-NEXT: store i32* [[TMP35]], i32** [[TMP44]], align 4 10985 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 10986 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32** 10987 // CHECK11-NEXT: store i32* [[TMP35]], i32** [[TMP46]], align 4 10988 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 10989 // CHECK11-NEXT: store i8* null, i8** [[TMP47]], align 4 10990 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 10991 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 10992 // CHECK11-NEXT: store i32* [[TMP36]], i32** [[TMP49]], align 4 10993 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 10994 // CHECK11-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 10995 // CHECK11-NEXT: store i32* [[TMP36]], i32** [[TMP51]], align 4 10996 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 10997 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 10998 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 10999 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32** 11000 // CHECK11-NEXT: store i32* [[TMP37]], i32** [[TMP54]], align 4 11001 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 11002 // CHECK11-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32** 11003 // CHECK11-NEXT: store i32* [[TMP37]], i32** [[TMP56]], align 4 11004 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 11005 // CHECK11-NEXT: store i8* null, i8** [[TMP57]], align 4 11006 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 11007 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 11008 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[N]], align 4 11009 // CHECK11-NEXT: store i32 [[TMP60]], i32* [[DOTCAPTURE_EXPR_8]], align 4 11010 // CHECK11-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_8]], align 4 11011 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP61]], 0 11012 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 11013 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 11014 // CHECK11-NEXT: store i32 [[SUB12]], i32* [[DOTCAPTURE_EXPR_9]], align 4 11015 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 11016 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP62]], 1 11017 // CHECK11-NEXT: [[TMP63:%.*]] = zext i32 [[ADD13]] to i64 11018 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP63]]) 11019 // CHECK11-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51.region_id, i32 4, i8** [[TMP58]], i8** [[TMP59]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11020 // CHECK11-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 11021 // CHECK11-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 11022 // CHECK11: omp_offload.failed14: 11023 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51(i32 [[TMP34]], i32* [[TMP35]], i32* [[TMP36]], i32* [[TMP37]]) #[[ATTR2]] 11024 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT15]] 11025 // CHECK11: omp_offload.cont15: 11026 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[CH]], align 4 11027 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[CH_CASTED]], align 4 11028 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[CH_CASTED]], align 4 11029 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[N]], align 4 11030 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[N_CASTED16]], align 4 11031 // CHECK11-NEXT: [[TMP69:%.*]] = load i32, i32* [[N_CASTED16]], align 4 11032 // CHECK11-NEXT: [[TMP70:%.*]] = load i32*, i32** [[A]], align 4 11033 // CHECK11-NEXT: [[TMP71:%.*]] = load i32*, i32** [[B]], align 4 11034 // CHECK11-NEXT: [[TMP72:%.*]] = load i32*, i32** [[C]], align 4 11035 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 11036 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32* 11037 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP74]], align 4 11038 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 11039 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 11040 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[TMP76]], align 4 11041 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 11042 // CHECK11-NEXT: store i8* null, i8** [[TMP77]], align 4 11043 // CHECK11-NEXT: [[TMP78:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1 11044 // CHECK11-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 11045 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP79]], align 4 11046 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1 11047 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32* 11048 // CHECK11-NEXT: store i32 [[TMP69]], i32* [[TMP81]], align 4 11049 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1 11050 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4 11051 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 2 11052 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32** 11053 // CHECK11-NEXT: store i32* [[TMP70]], i32** [[TMP84]], align 4 11054 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 2 11055 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32** 11056 // CHECK11-NEXT: store i32* [[TMP70]], i32** [[TMP86]], align 4 11057 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 2 11058 // CHECK11-NEXT: store i8* null, i8** [[TMP87]], align 4 11059 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 3 11060 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 11061 // CHECK11-NEXT: store i32* [[TMP71]], i32** [[TMP89]], align 4 11062 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 3 11063 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 11064 // CHECK11-NEXT: store i32* [[TMP71]], i32** [[TMP91]], align 4 11065 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 3 11066 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4 11067 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 4 11068 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32** 11069 // CHECK11-NEXT: store i32* [[TMP72]], i32** [[TMP94]], align 4 11070 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 4 11071 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32** 11072 // CHECK11-NEXT: store i32* [[TMP72]], i32** [[TMP96]], align 4 11073 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 4 11074 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4 11075 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 11076 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 11077 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[N]], align 4 11078 // CHECK11-NEXT: store i32 [[TMP100]], i32* [[DOTCAPTURE_EXPR_21]], align 4 11079 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_21]], align 4 11080 // CHECK11-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP101]], 0 11081 // CHECK11-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1 11082 // CHECK11-NEXT: [[SUB25:%.*]] = sub nsw i32 [[DIV24]], 1 11083 // CHECK11-NEXT: store i32 [[SUB25]], i32* [[DOTCAPTURE_EXPR_22]], align 4 11084 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4 11085 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP102]], 1 11086 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD26]] to i64 11087 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP103]]) 11088 // CHECK11-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59.region_id, i32 5, i8** [[TMP98]], i8** [[TMP99]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11089 // CHECK11-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0 11090 // CHECK11-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 11091 // CHECK11: omp_offload.failed27: 11092 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59(i32 [[TMP67]], i32 [[TMP69]], i32* [[TMP70]], i32* [[TMP71]], i32* [[TMP72]]) #[[ATTR2]] 11093 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT28]] 11094 // CHECK11: omp_offload.cont28: 11095 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[N]], align 4 11096 // CHECK11-NEXT: store i32 [[TMP106]], i32* [[N_CASTED29]], align 4 11097 // CHECK11-NEXT: [[TMP107:%.*]] = load i32, i32* [[N_CASTED29]], align 4 11098 // CHECK11-NEXT: [[TMP108:%.*]] = load i32*, i32** [[A]], align 4 11099 // CHECK11-NEXT: [[TMP109:%.*]] = load i32*, i32** [[B]], align 4 11100 // CHECK11-NEXT: [[TMP110:%.*]] = load i32*, i32** [[C]], align 4 11101 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 11102 // CHECK11-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 11103 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP112]], align 4 11104 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 11105 // CHECK11-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 11106 // CHECK11-NEXT: store i32 [[TMP107]], i32* [[TMP114]], align 4 11107 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 0 11108 // CHECK11-NEXT: store i8* null, i8** [[TMP115]], align 4 11109 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 1 11110 // CHECK11-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 11111 // CHECK11-NEXT: store i32* [[TMP108]], i32** [[TMP117]], align 4 11112 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 1 11113 // CHECK11-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 11114 // CHECK11-NEXT: store i32* [[TMP108]], i32** [[TMP119]], align 4 11115 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 1 11116 // CHECK11-NEXT: store i8* null, i8** [[TMP120]], align 4 11117 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 2 11118 // CHECK11-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 11119 // CHECK11-NEXT: store i32* [[TMP109]], i32** [[TMP122]], align 4 11120 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 2 11121 // CHECK11-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i32** 11122 // CHECK11-NEXT: store i32* [[TMP109]], i32** [[TMP124]], align 4 11123 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 2 11124 // CHECK11-NEXT: store i8* null, i8** [[TMP125]], align 4 11125 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 3 11126 // CHECK11-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32** 11127 // CHECK11-NEXT: store i32* [[TMP110]], i32** [[TMP127]], align 4 11128 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 3 11129 // CHECK11-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32** 11130 // CHECK11-NEXT: store i32* [[TMP110]], i32** [[TMP129]], align 4 11131 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS32]], i32 0, i32 3 11132 // CHECK11-NEXT: store i8* null, i8** [[TMP130]], align 4 11133 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS30]], i32 0, i32 0 11134 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS31]], i32 0, i32 0 11135 // CHECK11-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 11136 // CHECK11-NEXT: store i32 [[TMP133]], i32* [[DOTCAPTURE_EXPR_34]], align 4 11137 // CHECK11-NEXT: [[TMP134:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_34]], align 4 11138 // CHECK11-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP134]], 0 11139 // CHECK11-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 11140 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[DIV37]], 1 11141 // CHECK11-NEXT: store i32 [[SUB38]], i32* [[DOTCAPTURE_EXPR_35]], align 4 11142 // CHECK11-NEXT: [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_35]], align 4 11143 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP135]], 1 11144 // CHECK11-NEXT: [[TMP136:%.*]] = zext i32 [[ADD39]] to i64 11145 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP136]]) 11146 // CHECK11-NEXT: [[TMP137:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67.region_id, i32 4, i8** [[TMP131]], i8** [[TMP132]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.40, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.41, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11147 // CHECK11-NEXT: [[TMP138:%.*]] = icmp ne i32 [[TMP137]], 0 11148 // CHECK11-NEXT: br i1 [[TMP138]], label [[OMP_OFFLOAD_FAILED40:%.*]], label [[OMP_OFFLOAD_CONT41:%.*]] 11149 // CHECK11: omp_offload.failed40: 11150 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67(i32 [[TMP107]], i32* [[TMP108]], i32* [[TMP109]], i32* [[TMP110]]) #[[ATTR2]] 11151 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT41]] 11152 // CHECK11: omp_offload.cont41: 11153 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, i32* [[CH]], align 4 11154 // CHECK11-NEXT: store i32 [[TMP139]], i32* [[CH_CASTED42]], align 4 11155 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, i32* [[CH_CASTED42]], align 4 11156 // CHECK11-NEXT: [[TMP141:%.*]] = load i32, i32* [[N]], align 4 11157 // CHECK11-NEXT: store i32 [[TMP141]], i32* [[N_CASTED43]], align 4 11158 // CHECK11-NEXT: [[TMP142:%.*]] = load i32, i32* [[N_CASTED43]], align 4 11159 // CHECK11-NEXT: [[TMP143:%.*]] = load i32*, i32** [[A]], align 4 11160 // CHECK11-NEXT: [[TMP144:%.*]] = load i32*, i32** [[B]], align 4 11161 // CHECK11-NEXT: [[TMP145:%.*]] = load i32*, i32** [[C]], align 4 11162 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 11163 // CHECK11-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 11164 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP147]], align 4 11165 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 11166 // CHECK11-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 11167 // CHECK11-NEXT: store i32 [[TMP140]], i32* [[TMP149]], align 4 11168 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 0 11169 // CHECK11-NEXT: store i8* null, i8** [[TMP150]], align 4 11170 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1 11171 // CHECK11-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32* 11172 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP152]], align 4 11173 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1 11174 // CHECK11-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32* 11175 // CHECK11-NEXT: store i32 [[TMP142]], i32* [[TMP154]], align 4 11176 // CHECK11-NEXT: [[TMP155:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 1 11177 // CHECK11-NEXT: store i8* null, i8** [[TMP155]], align 4 11178 // CHECK11-NEXT: [[TMP156:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 2 11179 // CHECK11-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 11180 // CHECK11-NEXT: store i32* [[TMP143]], i32** [[TMP157]], align 4 11181 // CHECK11-NEXT: [[TMP158:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 2 11182 // CHECK11-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 11183 // CHECK11-NEXT: store i32* [[TMP143]], i32** [[TMP159]], align 4 11184 // CHECK11-NEXT: [[TMP160:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 2 11185 // CHECK11-NEXT: store i8* null, i8** [[TMP160]], align 4 11186 // CHECK11-NEXT: [[TMP161:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 3 11187 // CHECK11-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i32** 11188 // CHECK11-NEXT: store i32* [[TMP144]], i32** [[TMP162]], align 4 11189 // CHECK11-NEXT: [[TMP163:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 3 11190 // CHECK11-NEXT: [[TMP164:%.*]] = bitcast i8** [[TMP163]] to i32** 11191 // CHECK11-NEXT: store i32* [[TMP144]], i32** [[TMP164]], align 4 11192 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 3 11193 // CHECK11-NEXT: store i8* null, i8** [[TMP165]], align 4 11194 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 4 11195 // CHECK11-NEXT: [[TMP167:%.*]] = bitcast i8** [[TMP166]] to i32** 11196 // CHECK11-NEXT: store i32* [[TMP145]], i32** [[TMP167]], align 4 11197 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 4 11198 // CHECK11-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i32** 11199 // CHECK11-NEXT: store i32* [[TMP145]], i32** [[TMP169]], align 4 11200 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i32 0, i32 4 11201 // CHECK11-NEXT: store i8* null, i8** [[TMP170]], align 4 11202 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0 11203 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0 11204 // CHECK11-NEXT: [[TMP173:%.*]] = load i32, i32* [[N]], align 4 11205 // CHECK11-NEXT: store i32 [[TMP173]], i32* [[DOTCAPTURE_EXPR_48]], align 4 11206 // CHECK11-NEXT: [[TMP174:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_48]], align 4 11207 // CHECK11-NEXT: [[SUB50:%.*]] = sub nsw i32 [[TMP174]], 0 11208 // CHECK11-NEXT: [[DIV51:%.*]] = sdiv i32 [[SUB50]], 1 11209 // CHECK11-NEXT: [[SUB52:%.*]] = sub nsw i32 [[DIV51]], 1 11210 // CHECK11-NEXT: store i32 [[SUB52]], i32* [[DOTCAPTURE_EXPR_49]], align 4 11211 // CHECK11-NEXT: [[TMP175:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4 11212 // CHECK11-NEXT: [[ADD53:%.*]] = add nsw i32 [[TMP175]], 1 11213 // CHECK11-NEXT: [[TMP176:%.*]] = zext i32 [[ADD53]] to i64 11214 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP176]]) 11215 // CHECK11-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75.region_id, i32 5, i8** [[TMP171]], i8** [[TMP172]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.44, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.45, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11216 // CHECK11-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0 11217 // CHECK11-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED54:%.*]], label [[OMP_OFFLOAD_CONT55:%.*]] 11218 // CHECK11: omp_offload.failed54: 11219 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75(i32 [[TMP140]], i32 [[TMP142]], i32* [[TMP143]], i32* [[TMP144]], i32* [[TMP145]]) #[[ATTR2]] 11220 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT55]] 11221 // CHECK11: omp_offload.cont55: 11222 // CHECK11-NEXT: [[TMP179:%.*]] = load i32, i32* [[N]], align 4 11223 // CHECK11-NEXT: store i32 [[TMP179]], i32* [[N_CASTED56]], align 4 11224 // CHECK11-NEXT: [[TMP180:%.*]] = load i32, i32* [[N_CASTED56]], align 4 11225 // CHECK11-NEXT: [[TMP181:%.*]] = load i32*, i32** [[A]], align 4 11226 // CHECK11-NEXT: [[TMP182:%.*]] = load i32*, i32** [[B]], align 4 11227 // CHECK11-NEXT: [[TMP183:%.*]] = load i32*, i32** [[C]], align 4 11228 // CHECK11-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 11229 // CHECK11-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32* 11230 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP185]], align 4 11231 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 11232 // CHECK11-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32* 11233 // CHECK11-NEXT: store i32 [[TMP180]], i32* [[TMP187]], align 4 11234 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 11235 // CHECK11-NEXT: store i8* null, i8** [[TMP188]], align 4 11236 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 11237 // CHECK11-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32** 11238 // CHECK11-NEXT: store i32* [[TMP181]], i32** [[TMP190]], align 4 11239 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 11240 // CHECK11-NEXT: [[TMP192:%.*]] = bitcast i8** [[TMP191]] to i32** 11241 // CHECK11-NEXT: store i32* [[TMP181]], i32** [[TMP192]], align 4 11242 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 11243 // CHECK11-NEXT: store i8* null, i8** [[TMP193]], align 4 11244 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 2 11245 // CHECK11-NEXT: [[TMP195:%.*]] = bitcast i8** [[TMP194]] to i32** 11246 // CHECK11-NEXT: store i32* [[TMP182]], i32** [[TMP195]], align 4 11247 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 2 11248 // CHECK11-NEXT: [[TMP197:%.*]] = bitcast i8** [[TMP196]] to i32** 11249 // CHECK11-NEXT: store i32* [[TMP182]], i32** [[TMP197]], align 4 11250 // CHECK11-NEXT: [[TMP198:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 2 11251 // CHECK11-NEXT: store i8* null, i8** [[TMP198]], align 4 11252 // CHECK11-NEXT: [[TMP199:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 3 11253 // CHECK11-NEXT: [[TMP200:%.*]] = bitcast i8** [[TMP199]] to i32** 11254 // CHECK11-NEXT: store i32* [[TMP183]], i32** [[TMP200]], align 4 11255 // CHECK11-NEXT: [[TMP201:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 3 11256 // CHECK11-NEXT: [[TMP202:%.*]] = bitcast i8** [[TMP201]] to i32** 11257 // CHECK11-NEXT: store i32* [[TMP183]], i32** [[TMP202]], align 4 11258 // CHECK11-NEXT: [[TMP203:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 3 11259 // CHECK11-NEXT: store i8* null, i8** [[TMP203]], align 4 11260 // CHECK11-NEXT: [[TMP204:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 11261 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 11262 // CHECK11-NEXT: [[TMP206:%.*]] = load i32, i32* [[N]], align 4 11263 // CHECK11-NEXT: store i32 [[TMP206]], i32* [[DOTCAPTURE_EXPR_61]], align 4 11264 // CHECK11-NEXT: [[TMP207:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4 11265 // CHECK11-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP207]], 0 11266 // CHECK11-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1 11267 // CHECK11-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1 11268 // CHECK11-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4 11269 // CHECK11-NEXT: [[TMP208:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4 11270 // CHECK11-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP208]], 1 11271 // CHECK11-NEXT: [[TMP209:%.*]] = zext i32 [[ADD66]] to i64 11272 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP209]]) 11273 // CHECK11-NEXT: [[TMP210:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, i32 4, i8** [[TMP204]], i8** [[TMP205]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.48, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.49, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11274 // CHECK11-NEXT: [[TMP211:%.*]] = icmp ne i32 [[TMP210]], 0 11275 // CHECK11-NEXT: br i1 [[TMP211]], label [[OMP_OFFLOAD_FAILED67:%.*]], label [[OMP_OFFLOAD_CONT68:%.*]] 11276 // CHECK11: omp_offload.failed67: 11277 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(i32 [[TMP180]], i32* [[TMP181]], i32* [[TMP182]], i32* [[TMP183]]) #[[ATTR2]] 11278 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT68]] 11279 // CHECK11: omp_offload.cont68: 11280 // CHECK11-NEXT: [[TMP212:%.*]] = load i32, i32* [[CH]], align 4 11281 // CHECK11-NEXT: store i32 [[TMP212]], i32* [[CH_CASTED69]], align 4 11282 // CHECK11-NEXT: [[TMP213:%.*]] = load i32, i32* [[CH_CASTED69]], align 4 11283 // CHECK11-NEXT: [[TMP214:%.*]] = load i32, i32* [[N]], align 4 11284 // CHECK11-NEXT: store i32 [[TMP214]], i32* [[N_CASTED70]], align 4 11285 // CHECK11-NEXT: [[TMP215:%.*]] = load i32, i32* [[N_CASTED70]], align 4 11286 // CHECK11-NEXT: [[TMP216:%.*]] = load i32*, i32** [[A]], align 4 11287 // CHECK11-NEXT: [[TMP217:%.*]] = load i32*, i32** [[B]], align 4 11288 // CHECK11-NEXT: [[TMP218:%.*]] = load i32*, i32** [[C]], align 4 11289 // CHECK11-NEXT: [[TMP219:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 11290 // CHECK11-NEXT: [[TMP220:%.*]] = bitcast i8** [[TMP219]] to i32* 11291 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP220]], align 4 11292 // CHECK11-NEXT: [[TMP221:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 11293 // CHECK11-NEXT: [[TMP222:%.*]] = bitcast i8** [[TMP221]] to i32* 11294 // CHECK11-NEXT: store i32 [[TMP213]], i32* [[TMP222]], align 4 11295 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 0 11296 // CHECK11-NEXT: store i8* null, i8** [[TMP223]], align 4 11297 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 1 11298 // CHECK11-NEXT: [[TMP225:%.*]] = bitcast i8** [[TMP224]] to i32* 11299 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP225]], align 4 11300 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 1 11301 // CHECK11-NEXT: [[TMP227:%.*]] = bitcast i8** [[TMP226]] to i32* 11302 // CHECK11-NEXT: store i32 [[TMP215]], i32* [[TMP227]], align 4 11303 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 1 11304 // CHECK11-NEXT: store i8* null, i8** [[TMP228]], align 4 11305 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 2 11306 // CHECK11-NEXT: [[TMP230:%.*]] = bitcast i8** [[TMP229]] to i32** 11307 // CHECK11-NEXT: store i32* [[TMP216]], i32** [[TMP230]], align 4 11308 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 2 11309 // CHECK11-NEXT: [[TMP232:%.*]] = bitcast i8** [[TMP231]] to i32** 11310 // CHECK11-NEXT: store i32* [[TMP216]], i32** [[TMP232]], align 4 11311 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 2 11312 // CHECK11-NEXT: store i8* null, i8** [[TMP233]], align 4 11313 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 3 11314 // CHECK11-NEXT: [[TMP235:%.*]] = bitcast i8** [[TMP234]] to i32** 11315 // CHECK11-NEXT: store i32* [[TMP217]], i32** [[TMP235]], align 4 11316 // CHECK11-NEXT: [[TMP236:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 3 11317 // CHECK11-NEXT: [[TMP237:%.*]] = bitcast i8** [[TMP236]] to i32** 11318 // CHECK11-NEXT: store i32* [[TMP217]], i32** [[TMP237]], align 4 11319 // CHECK11-NEXT: [[TMP238:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 3 11320 // CHECK11-NEXT: store i8* null, i8** [[TMP238]], align 4 11321 // CHECK11-NEXT: [[TMP239:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 4 11322 // CHECK11-NEXT: [[TMP240:%.*]] = bitcast i8** [[TMP239]] to i32** 11323 // CHECK11-NEXT: store i32* [[TMP218]], i32** [[TMP240]], align 4 11324 // CHECK11-NEXT: [[TMP241:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 4 11325 // CHECK11-NEXT: [[TMP242:%.*]] = bitcast i8** [[TMP241]] to i32** 11326 // CHECK11-NEXT: store i32* [[TMP218]], i32** [[TMP242]], align 4 11327 // CHECK11-NEXT: [[TMP243:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS73]], i32 0, i32 4 11328 // CHECK11-NEXT: store i8* null, i8** [[TMP243]], align 4 11329 // CHECK11-NEXT: [[TMP244:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS71]], i32 0, i32 0 11330 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS72]], i32 0, i32 0 11331 // CHECK11-NEXT: [[TMP246:%.*]] = load i32, i32* [[N]], align 4 11332 // CHECK11-NEXT: store i32 [[TMP246]], i32* [[DOTCAPTURE_EXPR_75]], align 4 11333 // CHECK11-NEXT: [[TMP247:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_75]], align 4 11334 // CHECK11-NEXT: [[SUB77:%.*]] = sub nsw i32 [[TMP247]], 0 11335 // CHECK11-NEXT: [[DIV78:%.*]] = sdiv i32 [[SUB77]], 1 11336 // CHECK11-NEXT: [[SUB79:%.*]] = sub nsw i32 [[DIV78]], 1 11337 // CHECK11-NEXT: store i32 [[SUB79]], i32* [[DOTCAPTURE_EXPR_76]], align 4 11338 // CHECK11-NEXT: [[TMP248:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_76]], align 4 11339 // CHECK11-NEXT: [[ADD80:%.*]] = add nsw i32 [[TMP248]], 1 11340 // CHECK11-NEXT: [[TMP249:%.*]] = zext i32 [[ADD80]] to i64 11341 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP249]]) 11342 // CHECK11-NEXT: [[TMP250:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91.region_id, i32 5, i8** [[TMP244]], i8** [[TMP245]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.52, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.53, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11343 // CHECK11-NEXT: [[TMP251:%.*]] = icmp ne i32 [[TMP250]], 0 11344 // CHECK11-NEXT: br i1 [[TMP251]], label [[OMP_OFFLOAD_FAILED81:%.*]], label [[OMP_OFFLOAD_CONT82:%.*]] 11345 // CHECK11: omp_offload.failed81: 11346 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91(i32 [[TMP213]], i32 [[TMP215]], i32* [[TMP216]], i32* [[TMP217]], i32* [[TMP218]]) #[[ATTR2]] 11347 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT82]] 11348 // CHECK11: omp_offload.cont82: 11349 // CHECK11-NEXT: ret i32 0 11350 // 11351 // 11352 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 11353 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 11354 // CHECK11-NEXT: entry: 11355 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11356 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11357 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 11358 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 11359 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11360 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11361 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 11362 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 11363 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11364 // CHECK11-NEXT: ret void 11365 // 11366 // 11367 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..26 11368 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11369 // CHECK11-NEXT: entry: 11370 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11371 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11372 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11373 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11374 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11375 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11376 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11377 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11378 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11379 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11380 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11381 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11382 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11383 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11384 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11385 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11386 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11387 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11388 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11389 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11390 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11391 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11392 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11393 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11394 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11395 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11396 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11397 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11398 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11399 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11400 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11401 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11402 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11403 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11404 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11405 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11406 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11407 // CHECK11: omp.precond.then: 11408 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11409 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11410 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 11411 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11412 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11413 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11414 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 11415 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11416 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11417 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11418 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11419 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11420 // CHECK11: cond.true: 11421 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11422 // CHECK11-NEXT: br label [[COND_END:%.*]] 11423 // CHECK11: cond.false: 11424 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11425 // CHECK11-NEXT: br label [[COND_END]] 11426 // CHECK11: cond.end: 11427 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11428 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11429 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11430 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 11431 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11432 // CHECK11: omp.inner.for.cond: 11433 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11434 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11435 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11436 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11437 // CHECK11: omp.inner.for.body: 11438 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11439 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11440 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 11441 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11442 // CHECK11: omp.inner.for.inc: 11443 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11444 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11445 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 11446 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11447 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 11448 // CHECK11: omp.inner.for.end: 11449 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11450 // CHECK11: omp.loop.exit: 11451 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11452 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 11453 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 11454 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11455 // CHECK11: omp.precond.end: 11456 // CHECK11-NEXT: ret void 11457 // 11458 // 11459 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..27 11460 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11461 // CHECK11-NEXT: entry: 11462 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11463 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11464 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11465 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11466 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11467 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11468 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11469 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11470 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11471 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11472 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11473 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11474 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11475 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11476 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11477 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11478 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11479 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11480 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11481 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11482 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11483 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11484 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11485 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11486 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11487 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11488 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11489 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11490 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11491 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11492 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11493 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11494 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11495 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11496 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11497 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11498 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11499 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11500 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11501 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11502 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11503 // CHECK11: omp.precond.then: 11504 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11505 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11506 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11507 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11508 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11509 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 11510 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 11511 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11512 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11513 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11514 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11515 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11516 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11517 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11518 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11519 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11520 // CHECK11: cond.true: 11521 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11522 // CHECK11-NEXT: br label [[COND_END:%.*]] 11523 // CHECK11: cond.false: 11524 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11525 // CHECK11-NEXT: br label [[COND_END]] 11526 // CHECK11: cond.end: 11527 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11528 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11529 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11530 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11531 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11532 // CHECK11: omp.inner.for.cond: 11533 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11534 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11535 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11536 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11537 // CHECK11: omp.inner.for.body: 11538 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11539 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11540 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11541 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 11542 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11543 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 11544 // CHECK11-NEXT: [[TMP22:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP21]], i32 2) 11545 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 11546 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 11547 // CHECK11: .cancel.exit: 11548 // CHECK11-NEXT: br label [[CANCEL_EXIT:%.*]] 11549 // CHECK11: .cancel.continue: 11550 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP2]], align 4 11551 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4 11552 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 11553 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11554 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP3]], align 4 11555 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4 11556 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 11557 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 11558 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP26]], [[TMP29]] 11559 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP1]], align 4 11560 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[I3]], align 4 11561 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP30]], i32 [[TMP31]] 11562 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 11563 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11564 // CHECK11: omp.body.continue: 11565 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11566 // CHECK11: omp.inner.for.inc: 11567 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11568 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 11569 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 11570 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 11571 // CHECK11: omp.inner.for.end: 11572 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11573 // CHECK11: omp.loop.exit: 11574 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11575 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 11576 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]]) 11577 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11578 // CHECK11: cancel.exit: 11579 // CHECK11-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11580 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 11581 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]]) 11582 // CHECK11-NEXT: br label [[CANCEL_CONT:%.*]] 11583 // CHECK11: omp.precond.end: 11584 // CHECK11-NEXT: br label [[CANCEL_CONT]] 11585 // CHECK11: cancel.cont: 11586 // CHECK11-NEXT: ret void 11587 // 11588 // 11589 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 11590 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 11591 // CHECK11-NEXT: entry: 11592 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11593 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11594 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 11595 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 11596 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11597 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11598 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 11599 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 11600 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11601 // CHECK11-NEXT: ret void 11602 // 11603 // 11604 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..30 11605 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11606 // CHECK11-NEXT: entry: 11607 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11608 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11609 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11610 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11611 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11612 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11613 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11614 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11615 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11616 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11617 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11618 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11619 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11620 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11621 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11622 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11623 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11624 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11625 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11626 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11627 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11628 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11629 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11630 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11631 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11632 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11633 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11634 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11635 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11636 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11637 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11638 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11639 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11640 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11641 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11642 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11643 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11644 // CHECK11: omp.precond.then: 11645 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11646 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11647 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 11648 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11649 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11650 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11651 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 11652 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11653 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11654 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11655 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11656 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11657 // CHECK11: cond.true: 11658 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11659 // CHECK11-NEXT: br label [[COND_END:%.*]] 11660 // CHECK11: cond.false: 11661 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11662 // CHECK11-NEXT: br label [[COND_END]] 11663 // CHECK11: cond.end: 11664 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11665 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11666 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11667 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 11668 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11669 // CHECK11: omp.inner.for.cond: 11670 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11671 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11672 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11673 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11674 // CHECK11: omp.inner.for.body: 11675 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11676 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11677 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 11678 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11679 // CHECK11: omp.inner.for.inc: 11680 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11681 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11682 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 11683 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11684 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 11685 // CHECK11: omp.inner.for.end: 11686 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11687 // CHECK11: omp.loop.exit: 11688 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11689 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 11690 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 11691 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11692 // CHECK11: omp.precond.end: 11693 // CHECK11-NEXT: ret void 11694 // 11695 // 11696 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..31 11697 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11698 // CHECK11-NEXT: entry: 11699 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11700 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11701 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11702 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11703 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11704 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11705 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11706 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11707 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11708 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11709 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11710 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11711 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11712 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11713 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11714 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11715 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11716 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11717 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11718 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11719 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11720 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11721 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11722 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11723 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11724 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11725 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11726 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11727 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11728 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11729 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11730 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11731 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11732 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11733 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11734 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11735 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11736 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11737 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11738 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11739 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11740 // CHECK11: omp.precond.then: 11741 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11742 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11743 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11744 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11745 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11746 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 11747 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 11748 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11749 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11750 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11751 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11752 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11753 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11754 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11755 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11756 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11757 // CHECK11: cond.true: 11758 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11759 // CHECK11-NEXT: br label [[COND_END:%.*]] 11760 // CHECK11: cond.false: 11761 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11762 // CHECK11-NEXT: br label [[COND_END]] 11763 // CHECK11: cond.end: 11764 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11765 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11766 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11767 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11768 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11769 // CHECK11: omp.inner.for.cond: 11770 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11771 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11772 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11773 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11774 // CHECK11: omp.inner.for.body: 11775 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11776 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11777 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11778 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 11779 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 11780 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 11781 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 11782 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 11783 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 11784 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 11785 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 11786 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 11787 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 11788 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 11789 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 11790 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 11791 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 11792 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11793 // CHECK11: omp.body.continue: 11794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11795 // CHECK11: omp.inner.for.inc: 11796 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11797 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 11798 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 11799 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 11800 // CHECK11: omp.inner.for.end: 11801 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11802 // CHECK11: omp.loop.exit: 11803 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11804 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 11805 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 11806 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11807 // CHECK11: omp.precond.end: 11808 // CHECK11-NEXT: ret void 11809 // 11810 // 11811 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 11812 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 11813 // CHECK11-NEXT: entry: 11814 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 11815 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11816 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11817 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 11818 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 11819 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 11820 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11821 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11822 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 11823 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 11824 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 11825 // CHECK11-NEXT: ret void 11826 // 11827 // 11828 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..34 11829 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11830 // CHECK11-NEXT: entry: 11831 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11832 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11833 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 11834 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11835 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11836 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11837 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11838 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11839 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11840 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11841 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11842 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11843 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11844 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11845 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11846 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11847 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11848 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11849 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11850 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 11851 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11852 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11853 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11854 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11855 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 11856 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11857 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11858 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11859 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11860 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP1]], align 4 11861 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 11862 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11863 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 11864 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11865 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11866 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11867 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11868 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11869 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 11870 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11871 // CHECK11: omp.precond.then: 11872 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11873 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11874 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_COMB_UB]], align 4 11875 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11876 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11877 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4 11878 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11879 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 11880 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 11881 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11882 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11883 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11884 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11885 // CHECK11: cond.true: 11886 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11887 // CHECK11-NEXT: br label [[COND_END:%.*]] 11888 // CHECK11: cond.false: 11889 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11890 // CHECK11-NEXT: br label [[COND_END]] 11891 // CHECK11: cond.end: 11892 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11893 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11894 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11895 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11896 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11897 // CHECK11: omp.inner.for.cond: 11898 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11899 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11900 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 11901 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 11902 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11903 // CHECK11: omp.inner.for.body: 11904 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11905 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11906 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]]) 11907 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11908 // CHECK11: omp.inner.for.inc: 11909 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11910 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11911 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11912 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 11913 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11914 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11915 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11916 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 11917 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11918 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11919 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 11920 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 11921 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11922 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11923 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 11924 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 11925 // CHECK11: cond.true10: 11926 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11927 // CHECK11-NEXT: br label [[COND_END12:%.*]] 11928 // CHECK11: cond.false11: 11929 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11930 // CHECK11-NEXT: br label [[COND_END12]] 11931 // CHECK11: cond.end12: 11932 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 11933 // CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 11934 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11935 // CHECK11-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 11936 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 11937 // CHECK11: omp.inner.for.end: 11938 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11939 // CHECK11: omp.loop.exit: 11940 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11941 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 11942 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 11943 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11944 // CHECK11: omp.precond.end: 11945 // CHECK11-NEXT: ret void 11946 // 11947 // 11948 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..35 11949 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11950 // CHECK11-NEXT: entry: 11951 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11952 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11953 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11954 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11955 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11956 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 11957 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 11958 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 11959 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11960 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11961 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11962 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11963 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11964 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11965 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11966 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11967 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11968 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11969 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11970 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11971 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11972 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11973 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11974 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 11975 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 11976 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 11977 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11978 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 11979 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 11980 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 11981 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 11982 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 11983 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11984 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11985 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11986 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11987 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11988 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 11989 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11990 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11991 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11992 // CHECK11: omp.precond.then: 11993 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11994 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11995 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 11996 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11997 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11998 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 11999 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 12000 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12001 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12002 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12003 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12004 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12005 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12006 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12007 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12008 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12009 // CHECK11: cond.true: 12010 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12011 // CHECK11-NEXT: br label [[COND_END:%.*]] 12012 // CHECK11: cond.false: 12013 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12014 // CHECK11-NEXT: br label [[COND_END]] 12015 // CHECK11: cond.end: 12016 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12017 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12018 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12019 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12020 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12021 // CHECK11: omp.inner.for.cond: 12022 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12023 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12024 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12025 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12026 // CHECK11: omp.inner.for.body: 12027 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12028 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12029 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12030 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 12031 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 12032 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 12033 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 12034 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12035 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 12036 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 12037 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 12038 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 12039 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 12040 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 12041 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 12042 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 12043 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 12044 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12045 // CHECK11: omp.body.continue: 12046 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12047 // CHECK11: omp.inner.for.inc: 12048 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12049 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 12050 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 12051 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12052 // CHECK11: omp.inner.for.end: 12053 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12054 // CHECK11: omp.loop.exit: 12055 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12056 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 12057 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 12058 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12059 // CHECK11: omp.precond.end: 12060 // CHECK11-NEXT: ret void 12061 // 12062 // 12063 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 12064 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 12065 // CHECK11-NEXT: entry: 12066 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12067 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12068 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 12069 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 12070 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12071 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12072 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 12073 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 12074 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..38 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 12075 // CHECK11-NEXT: ret void 12076 // 12077 // 12078 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..38 12079 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12080 // CHECK11-NEXT: entry: 12081 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12082 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12083 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12084 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12085 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12086 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12087 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12088 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12089 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12090 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12091 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12092 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12093 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12094 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12095 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12096 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12097 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12098 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12099 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12100 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12101 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12102 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12103 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12104 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12105 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12106 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12107 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12108 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12109 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12110 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12111 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12112 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12113 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12114 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12115 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12116 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12117 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12118 // CHECK11: omp.precond.then: 12119 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12120 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12121 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 12122 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12123 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12124 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12125 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 12126 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12127 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12128 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12129 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12130 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12131 // CHECK11: cond.true: 12132 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12133 // CHECK11-NEXT: br label [[COND_END:%.*]] 12134 // CHECK11: cond.false: 12135 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12136 // CHECK11-NEXT: br label [[COND_END]] 12137 // CHECK11: cond.end: 12138 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12139 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12140 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12141 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 12142 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12143 // CHECK11: omp.inner.for.cond: 12144 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12145 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12146 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12147 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12148 // CHECK11: omp.inner.for.body: 12149 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12150 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12151 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..39 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 12152 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12153 // CHECK11: omp.inner.for.inc: 12154 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12155 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12156 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12157 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12158 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12159 // CHECK11: omp.inner.for.end: 12160 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12161 // CHECK11: omp.loop.exit: 12162 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12163 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 12164 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 12165 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12166 // CHECK11: omp.precond.end: 12167 // CHECK11-NEXT: ret void 12168 // 12169 // 12170 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..39 12171 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12172 // CHECK11-NEXT: entry: 12173 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12174 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12175 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12176 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12177 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12178 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12179 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12180 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12181 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12182 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12183 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12184 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12185 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12186 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12187 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12188 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12189 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12190 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12191 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12192 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12193 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12194 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12195 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12196 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12197 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12198 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12199 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12200 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12201 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12202 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12203 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12204 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12205 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12206 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12207 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12208 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12209 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12210 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12211 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12212 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12213 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12214 // CHECK11: omp.precond.then: 12215 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12216 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12217 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12218 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12219 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12220 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 12221 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 12222 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12223 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12224 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12225 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12226 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP11]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12227 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12228 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12229 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12230 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12231 // CHECK11: cond.true: 12232 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12233 // CHECK11-NEXT: br label [[COND_END:%.*]] 12234 // CHECK11: cond.false: 12235 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12236 // CHECK11-NEXT: br label [[COND_END]] 12237 // CHECK11: cond.end: 12238 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12239 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12240 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12241 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12242 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12243 // CHECK11: omp.inner.for.cond: 12244 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12245 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12246 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12247 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12248 // CHECK11: omp.inner.for.body: 12249 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12250 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12251 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12252 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 12253 // CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP2]], align 4 12254 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I3]], align 4 12255 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 [[TMP21]] 12256 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12257 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP3]], align 4 12258 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I3]], align 4 12259 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 12260 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4 12261 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 12262 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP1]], align 4 12263 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I3]], align 4 12264 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 12265 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4 12266 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12267 // CHECK11: omp.body.continue: 12268 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12269 // CHECK11: omp.inner.for.inc: 12270 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12271 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 12272 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 12273 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12274 // CHECK11: omp.inner.for.end: 12275 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12276 // CHECK11: omp.loop.exit: 12277 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12278 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 12279 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]]) 12280 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12281 // CHECK11: omp.precond.end: 12282 // CHECK11-NEXT: ret void 12283 // 12284 // 12285 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 12286 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 12287 // CHECK11-NEXT: entry: 12288 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 12289 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12290 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12291 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 12292 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 12293 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 12294 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12295 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12296 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 12297 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 12298 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..42 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 12299 // CHECK11-NEXT: ret void 12300 // 12301 // 12302 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..42 12303 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12304 // CHECK11-NEXT: entry: 12305 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12306 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12307 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 12308 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12309 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12310 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12311 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12312 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12313 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12314 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12315 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12316 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12317 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12318 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12319 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12320 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12321 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12322 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 12323 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12324 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12325 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12326 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 12327 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12328 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12329 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12330 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12331 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 12332 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12333 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12334 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12335 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12336 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 12337 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 12338 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 12339 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12340 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12341 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 12342 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12343 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12344 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12345 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12346 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12347 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 12348 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12349 // CHECK11: omp.precond.then: 12350 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12351 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12352 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 12353 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12354 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12355 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12356 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12357 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12358 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12359 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12360 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12361 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12362 // CHECK11: cond.true: 12363 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12364 // CHECK11-NEXT: br label [[COND_END:%.*]] 12365 // CHECK11: cond.false: 12366 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12367 // CHECK11-NEXT: br label [[COND_END]] 12368 // CHECK11: cond.end: 12369 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12370 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12371 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12372 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12373 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12374 // CHECK11: omp.inner.for.cond: 12375 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12376 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12377 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12378 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12379 // CHECK11: omp.inner.for.body: 12380 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12381 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12382 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12383 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12384 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12385 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..43 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 12386 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12387 // CHECK11: omp.inner.for.inc: 12388 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12389 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12390 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 12391 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12392 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12393 // CHECK11: omp.inner.for.end: 12394 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12395 // CHECK11: omp.loop.exit: 12396 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12397 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 12398 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 12399 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12400 // CHECK11: omp.precond.end: 12401 // CHECK11-NEXT: ret void 12402 // 12403 // 12404 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..43 12405 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 12406 // CHECK11-NEXT: entry: 12407 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12408 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12409 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12410 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12411 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12412 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12413 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12414 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12415 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 12416 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12417 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12418 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12419 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12420 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12421 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12422 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12423 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12424 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12425 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 12426 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12427 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12428 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12429 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12430 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12431 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12432 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12433 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12434 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12435 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12436 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12437 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12438 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12439 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12440 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12441 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12442 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12443 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12444 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12445 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12446 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12447 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12448 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12449 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12450 // CHECK11: omp.precond.then: 12451 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12452 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12453 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12454 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12455 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12456 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 12457 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 12458 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12459 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12460 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12461 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12462 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 12463 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 12464 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12465 // CHECK11: omp.dispatch.cond: 12466 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12467 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12468 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 12469 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12470 // CHECK11: cond.true: 12471 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12472 // CHECK11-NEXT: br label [[COND_END:%.*]] 12473 // CHECK11: cond.false: 12474 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12475 // CHECK11-NEXT: br label [[COND_END]] 12476 // CHECK11: cond.end: 12477 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 12478 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12479 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12480 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 12481 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12482 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12483 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 12484 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12485 // CHECK11: omp.dispatch.body: 12486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12487 // CHECK11: omp.inner.for.cond: 12488 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12489 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12490 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 12491 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12492 // CHECK11: omp.inner.for.body: 12493 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12494 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 12495 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12496 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 12497 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[TMP2]], align 4 12498 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I4]], align 4 12499 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP23]], i32 [[TMP24]] 12500 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 12501 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 4 12502 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I4]], align 4 12503 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i32 [[TMP27]] 12504 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4 12505 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 12506 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 4 12507 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[I4]], align 4 12508 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i32 [[TMP30]] 12509 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[ARRAYIDX10]], align 4 12510 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12511 // CHECK11: omp.body.continue: 12512 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12513 // CHECK11: omp.inner.for.inc: 12514 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12515 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 12516 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 12517 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12518 // CHECK11: omp.inner.for.end: 12519 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12520 // CHECK11: omp.dispatch.inc: 12521 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12522 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12523 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 12524 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_LB]], align 4 12525 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12526 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12527 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 12528 // CHECK11-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_UB]], align 4 12529 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 12530 // CHECK11: omp.dispatch.end: 12531 // CHECK11-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12532 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP36]], align 4 12533 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP37]]) 12534 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12535 // CHECK11: omp.precond.end: 12536 // CHECK11-NEXT: ret void 12537 // 12538 // 12539 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 12540 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 12541 // CHECK11-NEXT: entry: 12542 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12543 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12544 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 12545 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 12546 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12547 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12548 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 12549 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 12550 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..46 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 12551 // CHECK11-NEXT: ret void 12552 // 12553 // 12554 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..46 12555 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12556 // CHECK11-NEXT: entry: 12557 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12558 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12559 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12560 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12561 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12562 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12563 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12564 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12565 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12566 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12567 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12568 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12569 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12570 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12571 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12572 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12573 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12574 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12575 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12576 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12577 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12578 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12579 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12580 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12581 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12582 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12583 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12584 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12585 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12586 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12587 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12588 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12589 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12590 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12591 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12592 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12593 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12594 // CHECK11: omp.precond.then: 12595 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12596 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12597 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4 12598 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12599 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12600 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12601 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 12602 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12603 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12604 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12605 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12606 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12607 // CHECK11: cond.true: 12608 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12609 // CHECK11-NEXT: br label [[COND_END:%.*]] 12610 // CHECK11: cond.false: 12611 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12612 // CHECK11-NEXT: br label [[COND_END]] 12613 // CHECK11: cond.end: 12614 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12615 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12616 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12617 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 12618 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12619 // CHECK11: omp.inner.for.cond: 12620 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12621 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12622 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12623 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12624 // CHECK11: omp.inner.for.body: 12625 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12626 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12627 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**)* @.omp_outlined..47 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32** [[TMP1]], i32** [[TMP2]], i32** [[TMP3]]) 12628 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12629 // CHECK11: omp.inner.for.inc: 12630 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12631 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12632 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12633 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12634 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12635 // CHECK11: omp.inner.for.end: 12636 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12637 // CHECK11: omp.loop.exit: 12638 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12639 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 12640 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 12641 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12642 // CHECK11: omp.precond.end: 12643 // CHECK11-NEXT: ret void 12644 // 12645 // 12646 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..47 12647 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12648 // CHECK11-NEXT: entry: 12649 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12650 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12651 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12652 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12653 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12654 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12655 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12656 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12657 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12658 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12659 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12660 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12661 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12662 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12663 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12664 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12665 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12666 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12667 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12668 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12669 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12670 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12671 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12672 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12673 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12674 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12675 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12676 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12677 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12678 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12679 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12680 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4 12681 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12682 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12683 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12684 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12685 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12686 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12687 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12688 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12689 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12690 // CHECK11: omp.precond.then: 12691 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12692 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12693 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12694 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12695 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12696 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 12697 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 12698 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12699 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12700 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12701 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12702 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12703 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 12704 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 12705 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12706 // CHECK11: omp.dispatch.cond: 12707 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12708 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 12709 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12710 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 12711 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12712 // CHECK11: omp.dispatch.body: 12713 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12714 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 12715 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12716 // CHECK11: omp.inner.for.cond: 12717 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 12718 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 12719 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 12720 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12721 // CHECK11: omp.inner.for.body: 12722 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 12723 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 12724 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12725 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26 12726 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !26 12727 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 12728 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP21]], i32 [[TMP22]] 12729 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 12730 // CHECK11-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !26 12731 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 12732 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 [[TMP25]] 12733 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4, !llvm.access.group !26 12734 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 12735 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !26 12736 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26 12737 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[TMP27]], i32 [[TMP28]] 12738 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX7]], align 4, !llvm.access.group !26 12739 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12740 // CHECK11: omp.body.continue: 12741 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12742 // CHECK11: omp.inner.for.inc: 12743 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 12744 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 12745 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 12746 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 12747 // CHECK11: omp.inner.for.end: 12748 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12749 // CHECK11: omp.dispatch.inc: 12750 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 12751 // CHECK11: omp.dispatch.end: 12752 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12753 // CHECK11: omp.precond.end: 12754 // CHECK11-NEXT: ret void 12755 // 12756 // 12757 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 12758 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], i32* noundef [[A:%.*]], i32* noundef [[B:%.*]], i32* noundef [[C:%.*]]) #[[ATTR1]] { 12759 // CHECK11-NEXT: entry: 12760 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 12761 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12762 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12763 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 4 12764 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 4 12765 // CHECK11-NEXT: store i32 [[CH]], i32* [[CH_ADDR]], align 4 12766 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12767 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12768 // CHECK11-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 4 12769 // CHECK11-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 4 12770 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32**, i32**, i32**)* @.omp_outlined..50 to void (i32*, i32*, ...)*), i32* [[CH_ADDR]], i32* [[N_ADDR]], i32** [[A_ADDR]], i32** [[B_ADDR]], i32** [[C_ADDR]]) 12771 // CHECK11-NEXT: ret void 12772 // 12773 // 12774 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..50 12775 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12776 // CHECK11-NEXT: entry: 12777 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12778 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12779 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32*, align 4 12780 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12781 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12782 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12783 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12784 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12785 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12786 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12787 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12788 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12789 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12790 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12791 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12792 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12793 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12794 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 12795 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12796 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12797 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12798 // CHECK11-NEXT: store i32* [[CH]], i32** [[CH_ADDR]], align 4 12799 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12800 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12801 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12802 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12803 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[CH_ADDR]], align 4 12804 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12805 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12806 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12807 // CHECK11-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12808 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 12809 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 12810 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 12811 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12812 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12813 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 12814 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12815 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12816 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12817 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12818 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12819 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 12820 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12821 // CHECK11: omp.precond.then: 12822 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12823 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12824 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4 12825 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12826 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12827 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12828 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 12829 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12830 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12831 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12832 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12833 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12834 // CHECK11: cond.true: 12835 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12836 // CHECK11-NEXT: br label [[COND_END:%.*]] 12837 // CHECK11: cond.false: 12838 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12839 // CHECK11-NEXT: br label [[COND_END]] 12840 // CHECK11: cond.end: 12841 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12842 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12843 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12844 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12845 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12846 // CHECK11: omp.inner.for.cond: 12847 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12848 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12849 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12850 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12851 // CHECK11: omp.inner.for.body: 12852 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12853 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12854 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12855 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12856 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12857 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32**, i32**, i32**, i32)* @.omp_outlined..51 to void (i32*, i32*, ...)*), i32 [[TMP19]], i32 [[TMP20]], i32* [[TMP1]], i32** [[TMP2]], i32** [[TMP3]], i32** [[TMP4]], i32 [[TMP22]]) 12858 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12859 // CHECK11: omp.inner.for.inc: 12860 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12861 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12862 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 12863 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12864 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 12865 // CHECK11: omp.inner.for.end: 12866 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12867 // CHECK11: omp.loop.exit: 12868 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12869 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 12870 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 12871 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12872 // CHECK11: omp.precond.end: 12873 // CHECK11-NEXT: ret void 12874 // 12875 // 12876 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..51 12877 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32** noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 12878 // CHECK11-NEXT: entry: 12879 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12880 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12881 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12882 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12883 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12884 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32**, align 4 12885 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32**, align 4 12886 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i32**, align 4 12887 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 12888 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12889 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12890 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12891 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12892 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12893 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12894 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12895 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12896 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12897 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 12898 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12899 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12900 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12901 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12902 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12903 // CHECK11-NEXT: store i32** [[A]], i32*** [[A_ADDR]], align 4 12904 // CHECK11-NEXT: store i32** [[B]], i32*** [[B_ADDR]], align 4 12905 // CHECK11-NEXT: store i32** [[C]], i32*** [[C_ADDR]], align 4 12906 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12907 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12908 // CHECK11-NEXT: [[TMP1:%.*]] = load i32**, i32*** [[A_ADDR]], align 4 12909 // CHECK11-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[B_ADDR]], align 4 12910 // CHECK11-NEXT: [[TMP3:%.*]] = load i32**, i32*** [[C_ADDR]], align 4 12911 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP0]], align 4 12912 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12913 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12914 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12915 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12916 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12917 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12918 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 12919 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12920 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12921 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12922 // CHECK11: omp.precond.then: 12923 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12924 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12925 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4 12926 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12927 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12928 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4 12929 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4 12930 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12931 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12932 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12933 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12934 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12935 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12936 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 12937 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 12938 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12939 // CHECK11: omp.dispatch.cond: 12940 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12941 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 12942 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP16]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12943 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 12944 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12945 // CHECK11: omp.dispatch.body: 12946 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12947 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4 12948 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12949 // CHECK11: omp.inner.for.cond: 12950 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 12951 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !29 12952 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 12953 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12954 // CHECK11: omp.inner.for.body: 12955 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 12956 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 12957 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12958 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !29 12959 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[TMP2]], align 4, !llvm.access.group !29 12960 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 12961 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP22]], i32 [[TMP23]] 12962 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !29 12963 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[TMP3]], align 4, !llvm.access.group !29 12964 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 12965 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[TMP25]], i32 [[TMP26]] 12966 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !29 12967 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 12968 // CHECK11-NEXT: [[TMP28:%.*]] = load i32*, i32** [[TMP1]], align 4, !llvm.access.group !29 12969 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !29 12970 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[TMP28]], i32 [[TMP29]] 12971 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX8]], align 4, !llvm.access.group !29 12972 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12973 // CHECK11: omp.body.continue: 12974 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12975 // CHECK11: omp.inner.for.inc: 12976 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 12977 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 12978 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 12979 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 12980 // CHECK11: omp.inner.for.end: 12981 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12982 // CHECK11: omp.dispatch.inc: 12983 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 12984 // CHECK11: omp.dispatch.end: 12985 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12986 // CHECK11: omp.precond.end: 12987 // CHECK11-NEXT: ret void 12988 // 12989 // 12990 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 12991 // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { 12992 // CHECK11-NEXT: entry: 12993 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 12994 // CHECK11-NEXT: ret void 12995 // 12996