1 // Test host codegen. 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix HCHECK 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK 6 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK 8 9 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 13 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 15 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 16 17 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) 18 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 22 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s 24 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 29 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 31 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s 33 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s 35 // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} 36 37 // expected-no-diagnostics 38 #ifndef HEADER 39 #define HEADER 40 41 // CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* } 42 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00" 43 // CHECK-DAG: [[DEF_LOC_0:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 44 // CHECK-DAG: [[DEF_LOC_DISTRIBUTE_0:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2050, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) } 45 46 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 47 void without_schedule_clause(float *a, float *b, float *c, float *d) { 48 #pragma omp target 49 #pragma omp teams 50 #pragma omp distribute 51 for (int i = 33; i < 32000000; i += 7) { 52 a[i] = b[i] * c[i] * d[i]; 53 } 54 } 55 56 // CHECK: define {{.*}}void @{{.+}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) 57 // CHECK: [[TID_ADDR:%.+]] = alloca i32* 58 // CHECK: [[IV:%.+iv]] = alloca i32 59 // CHECK: [[LB:%.+lb]] = alloca i32 60 // CHECK: [[UB:%.+ub]] = alloca i32 61 // CHECK: [[ST:%.+stride]] = alloca i32 62 // CHECK: [[LAST:%.+last]] = alloca i32 63 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]] 64 // CHECK-DAG: store i32 0, i32* [[LB]] 65 // CHECK-DAG: store i32 4571423, i32* [[UB]] 66 // CHECK-DAG: store i32 1, i32* [[ST]] 67 // CHECK-DAG: store i32 0, i32* [[LAST]] 68 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]] 69 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]] 70 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]], i32 92, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 1) 71 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]] 72 // CHECK-DAG: [[USWITCH:%.+]] = icmp sgt i32 [[UBV0]], 4571423 73 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]] 74 // CHECK-DAG: [[BBCT]]: 75 // CHECK-DAG: br label %[[BBCE:.+]] 76 // CHECK-DAG: [[BBCF]]: 77 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]] 78 // CHECK-DAG: br label %[[BBCE]] 79 // CHECK: [[BBCE]]: 80 // CHECK: [[SELUB:%.+]] = phi i32 [ 4571423, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ] 81 // CHECK: store i32 [[SELUB]], i32* [[UB]] 82 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]] 83 // CHECK: store i32 [[LBV0]], i32* [[IV]] 84 // CHECK: br label %[[BBINNFOR:.+]] 85 // CHECK: [[BBINNFOR]]: 86 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]] 87 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]] 88 // CHECK: [[IVLEUB:%.+]] = icmp sle i32 [[IVVAL0]], [[UBV2]] 89 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]] 90 // CHECK: [[BBINNBODY]]: 91 // CHECK: {{.+}} = load i32, i32* [[IV]] 92 // ... loop body ... 93 // CHECK: br label %[[BBBODYCONT:.+]] 94 // CHECK: [[BBBODYCONT]]: 95 // CHECK: br label %[[BBINNINC:.+]] 96 // CHECK: [[BBINNINC]]: 97 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]] 98 // CHECK: [[IVINC:%.+]] = add nsw i32 [[IVVAL1]], 1 99 // CHECK: store i32 [[IVINC]], i32* [[IV]] 100 // CHECK: br label %[[BBINNFOR]] 101 // CHECK: [[BBINNEND]]: 102 // CHECK: br label %[[LPEXIT:.+]] 103 // CHECK: [[LPEXIT]]: 104 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]]) 105 // CHECK: ret void 106 107 108 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 109 void static_not_chunked(float *a, float *b, float *c, float *d) { 110 #pragma omp target 111 #pragma omp teams 112 #pragma omp distribute dist_schedule(static) 113 for (int i = 32000000; i > 33; i += -7) { 114 a[i] = b[i] * c[i] * d[i]; 115 } 116 } 117 118 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) 119 // CHECK: [[TID_ADDR:%.+]] = alloca i32* 120 // CHECK: [[IV:%.+iv]] = alloca i32 121 // CHECK: [[LB:%.+lb]] = alloca i32 122 // CHECK: [[UB:%.+ub]] = alloca i32 123 // CHECK: [[ST:%.+stride]] = alloca i32 124 // CHECK: [[LAST:%.+last]] = alloca i32 125 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]] 126 // CHECK-DAG: store i32 0, i32* [[LB]] 127 // CHECK-DAG: store i32 4571423, i32* [[UB]] 128 // CHECK-DAG: store i32 1, i32* [[ST]] 129 // CHECK-DAG: store i32 0, i32* [[LAST]] 130 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]] 131 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]] 132 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]], i32 92, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 1) 133 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]] 134 // CHECK-DAG: [[USWITCH:%.+]] = icmp sgt i32 [[UBV0]], 4571423 135 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]] 136 // CHECK-DAG: [[BBCT]]: 137 // CHECK-DAG: br label %[[BBCE:.+]] 138 // CHECK-DAG: [[BBCF]]: 139 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]] 140 // CHECK-DAG: br label %[[BBCE]] 141 // CHECK: [[BBCE]]: 142 // CHECK: [[SELUB:%.+]] = phi i32 [ 4571423, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ] 143 // CHECK: store i32 [[SELUB]], i32* [[UB]] 144 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]] 145 // CHECK: store i32 [[LBV0]], i32* [[IV]] 146 // CHECK: br label %[[BBINNFOR:.+]] 147 // CHECK: [[BBINNFOR]]: 148 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]] 149 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]] 150 // CHECK: [[IVLEUB:%.+]] = icmp sle i32 [[IVVAL0]], [[UBV2]] 151 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]] 152 // CHECK: [[BBINNBODY]]: 153 // CHECK: {{.+}} = load i32, i32* [[IV]] 154 // ... loop body ... 155 // CHECK: br label %[[BBBODYCONT:.+]] 156 // CHECK: [[BBBODYCONT]]: 157 // CHECK: br label %[[BBINNINC:.+]] 158 // CHECK: [[BBINNINC]]: 159 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]] 160 // CHECK: [[IVINC:%.+]] = add nsw i32 [[IVVAL1]], 1 161 // CHECK: store i32 [[IVINC]], i32* [[IV]] 162 // CHECK: br label %[[BBINNFOR]] 163 // CHECK: [[BBINNEND]]: 164 // CHECK: br label %[[LPEXIT:.+]] 165 // CHECK: [[LPEXIT]]: 166 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]]) 167 // CHECK: ret void 168 169 170 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 171 void static_chunked(float *a, float *b, float *c, float *d) { 172 #pragma omp target 173 #pragma omp teams 174 #pragma omp distribute dist_schedule(static, 5) 175 for (unsigned i = 131071; i <= 2147483647; i += 127) { 176 a[i] = b[i] * c[i] * d[i]; 177 } 178 } 179 180 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]]) 181 // CHECK: [[TID_ADDR:%.+]] = alloca i32* 182 // CHECK: [[IV:%.+iv]] = alloca i32 183 // CHECK: [[LB:%.+lb]] = alloca i32 184 // CHECK: [[UB:%.+ub]] = alloca i32 185 // CHECK: [[ST:%.+stride]] = alloca i32 186 // CHECK: [[LAST:%.+last]] = alloca i32 187 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]] 188 // CHECK-DAG: store i32 0, i32* [[LB]] 189 // CHECK-DAG: store i32 16908288, i32* [[UB]] 190 // CHECK-DAG: store i32 1, i32* [[ST]] 191 // CHECK-DAG: store i32 0, i32* [[LAST]] 192 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]] 193 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]] 194 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]], i32 91, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 5) 195 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]] 196 // CHECK-DAG: [[USWITCH:%.+]] = icmp ugt i32 [[UBV0]], 16908288 197 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]] 198 // CHECK-DAG: [[BBCT]]: 199 // CHECK-DAG: br label %[[BBCE:.+]] 200 // CHECK-DAG: [[BBCF]]: 201 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]] 202 // CHECK-DAG: br label %[[BBCE]] 203 // CHECK: [[BBCE]]: 204 // CHECK: [[SELUB:%.+]] = phi i32 [ 16908288, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ] 205 // CHECK: store i32 [[SELUB]], i32* [[UB]] 206 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]] 207 // CHECK: store i32 [[LBV0]], i32* [[IV]] 208 // CHECK: br label %[[BBINNFOR:.+]] 209 // CHECK: [[BBINNFOR]]: 210 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]] 211 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]] 212 // CHECK: [[IVLEUB:%.+]] = icmp ule i32 [[IVVAL0]], [[UBV2]] 213 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]] 214 // CHECK: [[BBINNBODY]]: 215 // CHECK: {{.+}} = load i32, i32* [[IV]] 216 // ... loop body ... 217 // CHECK: br label %[[BBBODYCONT:.+]] 218 // CHECK: [[BBBODYCONT]]: 219 // CHECK: br label %[[BBINNINC:.+]] 220 // CHECK: [[BBINNINC]]: 221 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]] 222 // CHECK: [[IVINC:%.+]] = add i32 [[IVVAL1]], 1 223 // CHECK: store i32 [[IVINC]], i32* [[IV]] 224 // CHECK: br label %[[BBINNFOR]] 225 // CHECK: [[BBINNEND]]: 226 // CHECK: br label %[[LPEXIT:.+]] 227 // CHECK: [[LPEXIT]]: 228 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* [[DEF_LOC_DISTRIBUTE_0]], i32 [[GBL_TIDV]]) 229 // CHECK: ret void 230 231 // CHECK-LABEL: test_precond 232 void test_precond() { 233 char a = 0; 234 #pragma omp target 235 #pragma omp teams 236 #pragma omp distribute 237 for(char i = a; i < 10; ++i); 238 } 239 240 // a is passed as a parameter to the outlined functions 241 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], i8* dereferenceable({{[0-9]+}}) [[APARM:%.+]]) 242 // CHECK: store i8* [[APARM]], i8** [[APTRADDR:%.+]] 243 // ..many loads of %0.. 244 // CHECK: [[A2:%.+]] = load i8*, i8** [[APTRADDR]] 245 // CHECK: [[AVAL0:%.+]] = load i8, i8* [[A2]] 246 // CHECK: store i8 [[AVAL0]], i8* [[CAP_EXPR:%.+]], 247 // CHECK: [[AVAL1:%.+]] = load i8, i8* [[CAP_EXPR]] 248 // CHECK: load i8, i8* [[CAP_EXPR]] 249 // CHECK: [[AVAL2:%.+]] = load i8, i8* [[CAP_EXPR]] 250 // CHECK: [[ACONV:%.+]] = sext i8 [[AVAL2]] to i32 251 // CHECK: [[ACMP:%.+]] = icmp slt i32 [[ACONV]], 10 252 // CHECK: br i1 [[ACMP]], label %[[PRECOND_THEN:.+]], label %[[PRECOND_END:.+]] 253 // CHECK: [[PRECOND_THEN]] 254 // CHECK: call void @__kmpc_for_static_init_4 255 // CHECK: call void @__kmpc_for_static_fini 256 // CHECK: [[PRECOND_END]] 257 258 // no templates for now, as these require special handling in target regions and/or declare target 259 260 // HCHECK-LABEL: fint 261 // HCHECK: call {{.*}}i32 {{.+}}ftemplate 262 // HCHECK: ret i32 263 264 // HCHECK: load i16, i16* 265 // HCHECK: store i16 % 266 // HCHECK: call i32 @__tgt_target_teams( 267 // HCHECK: call void @__kmpc_for_static_init_4( 268 template <typename T> 269 T ftemplate() { 270 short aa = 0; 271 272 #pragma omp target 273 #pragma omp teams 274 #pragma omp distribute dist_schedule(static, aa) 275 for (int i = 0; i < 100; i++) { 276 } 277 return T(); 278 } 279 280 int fint(void) { return ftemplate<int>(); } 281 282 #endif 283