1 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s 2 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 8 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 _Bool bv, bx; 14 char cv, cx; 15 unsigned char ucv, ucx; 16 short sv, sx; 17 unsigned short usv, usx; 18 int iv, ix; 19 unsigned int uiv, uix; 20 long lv, lx; 21 unsigned long ulv, ulx; 22 long long llv, llx; 23 unsigned long long ullv, ullx; 24 float fv, fx; 25 double dv, dx; 26 long double ldv, ldx; 27 _Complex int civ, cix; 28 _Complex float cfv, cfx; 29 _Complex double cdv, cdx; 30 31 typedef int int4 __attribute__((__vector_size__(16))); 32 int4 int4x; 33 34 struct BitFields { 35 int : 32; 36 int a : 31; 37 } bfx; 38 39 struct BitFields_packed { 40 int : 32; 41 int a : 31; 42 } __attribute__ ((__packed__)) bfx_packed; 43 44 struct BitFields2 { 45 int : 31; 46 int a : 1; 47 } bfx2; 48 49 struct BitFields2_packed { 50 int : 31; 51 int a : 1; 52 } __attribute__ ((__packed__)) bfx2_packed; 53 54 struct BitFields3 { 55 int : 11; 56 int a : 14; 57 } bfx3; 58 59 struct BitFields3_packed { 60 int : 11; 61 int a : 14; 62 } __attribute__ ((__packed__)) bfx3_packed; 63 64 struct BitFields4 { 65 short : 16; 66 int a: 1; 67 long b : 7; 68 } bfx4; 69 70 struct BitFields4_packed { 71 short : 16; 72 int a: 1; 73 long b : 7; 74 } __attribute__ ((__packed__)) bfx4_packed; 75 76 typedef float float2 __attribute__((ext_vector_type(2))); 77 float2 float2x; 78 79 // Register "0" is currently an invalid register for global register variables. 80 // Use "esp" instead of "0". 81 // register int rix __asm__("0"); 82 register int rix __asm__("esp"); 83 84 int main(void) { 85 // CHECK: atomicrmw fadd double* @{{.+}}, double 1.000000e+00 monotonic, align 8 86 #pragma omp atomic 87 ++dv; 88 // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 89 #pragma omp atomic 90 bx++; 91 // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 92 #pragma omp atomic update 93 ++cx; 94 // CHECK: atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1 95 #pragma omp atomic 96 ucx--; 97 // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2 98 #pragma omp atomic update 99 --sx; 100 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, 101 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 102 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 103 // CHECK: br label %[[CONT:.+]] 104 // CHECK: [[CONT]] 105 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 106 // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 107 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] 108 // CHECK: [[DESIRED:%.+]] = trunc i32 [[ADD]] to i16 109 // CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]], 110 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], 111 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 112 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 113 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 114 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 115 // CHECK: [[EXIT]] 116 #pragma omp atomic 117 usx += usv; 118 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 119 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 120 // CHECK: br label %[[CONT:.+]] 121 // CHECK: [[CONT]] 122 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 123 // CHECK: [[DESIRED:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] 124 // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], 125 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 126 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 127 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 128 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 129 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 130 // CHECK: [[EXIT]] 131 #pragma omp atomic update 132 ix *= iv; 133 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 134 // CHECK: atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 135 #pragma omp atomic 136 uix -= uiv; 137 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 138 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 139 // CHECK: br label %[[CONT:.+]] 140 // CHECK: [[CONT]] 141 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 142 // CHECK: [[DESIRED:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] 143 // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], 144 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 145 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 146 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 147 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 148 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 149 // CHECK: [[EXIT]] 150 #pragma omp atomic update 151 ix <<= iv; 152 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, 153 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 154 // CHECK: br label %[[CONT:.+]] 155 // CHECK: [[CONT]] 156 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 157 // CHECK: [[DESIRED:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] 158 // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], 159 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], 160 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 161 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 162 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 163 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 164 // CHECK: [[EXIT]] 165 #pragma omp atomic 166 uix >>= uiv; 167 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 168 // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8 169 // CHECK: br label %[[CONT:.+]] 170 // CHECK: [[CONT]] 171 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 172 // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] 173 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], 174 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 175 // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 176 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 177 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 178 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 179 // CHECK: [[EXIT]] 180 #pragma omp atomic update 181 lx /= lv; 182 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 183 // CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 184 #pragma omp atomic 185 ulx &= ulv; 186 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 187 // CHECK: atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 188 #pragma omp atomic update 189 llx ^= llv; 190 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 191 // CHECK: atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 192 #pragma omp atomic 193 ullx |= ullv; 194 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, 195 // CHECK: atomicrmw fadd float* @{{.+}}, float [[EXPR]] monotonic, align 4 196 #pragma omp atomic update 197 fx = fx + fv; 198 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 199 // CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 200 // CHECK: br label %[[CONT:.+]] 201 // CHECK: [[CONT]] 202 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 203 // CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* 204 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double 205 // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] 206 // CHECK: store double [[SUB]], double* [[TEMP]], 207 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], 208 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 209 // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 210 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 211 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 212 // CHECK: [[EXIT]] 213 #pragma omp atomic 214 dx = dv - dx; 215 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, 216 // CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 217 // CHECK: br label %[[CONT:.+]] 218 // CHECK: [[CONT]] 219 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 220 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 221 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]], 222 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 223 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]], 224 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] 225 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] 226 // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] 227 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] 228 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 229 // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 230 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 231 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 232 // CHECK: [[EXIT]] 233 #pragma omp atomic update 234 ldx = ldx * ldv; 235 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) 236 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) 237 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 238 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) 239 // CHECK: br label %[[CONT:.+]] 240 // CHECK: [[CONT]] 241 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 242 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] 243 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 244 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] 245 // <Skip checks for complex calculations> 246 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 247 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 248 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] 249 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] 250 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 251 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 252 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) 253 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 254 // CHECK: [[EXIT]] 255 #pragma omp atomic 256 cix = civ / cix; 257 // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) 258 // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) 259 // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* 260 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) 261 // CHECK: br label %[[CONT:.+]] 262 // CHECK: [[CONT]] 263 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 264 // CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]] 265 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 266 // CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]] 267 // <Skip checks for complex calculations> 268 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 269 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 270 // CHECK: store float %{{.+}}, float* [[X_RE_ADDR]] 271 // CHECK: store float %{{.+}}, float* [[X_IM_ADDR]] 272 // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* 273 // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* 274 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) 275 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 276 // CHECK: [[EXIT]] 277 #pragma omp atomic update 278 cfx = cfv + cfx; 279 // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) 280 // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) 281 // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* 282 // CHECK: call void @__atomic_load(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 5) 283 // CHECK: br label %[[CONT:.+]] 284 // CHECK: [[CONT]] 285 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 286 // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] 287 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 288 // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] 289 // <Skip checks for complex calculations> 290 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 291 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 292 // CHECK: store double %{{.+}}, double* [[X_RE_ADDR]] 293 // CHECK: store double %{{.+}}, double* [[X_IM_ADDR]] 294 // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* 295 // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* 296 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 5, i32 noundef 5) 297 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 298 // CHECK: [[EXIT]] 299 // CHECK: call{{.*}} @__kmpc_flush( 300 #pragma omp atomic seq_cst 301 cdx = cdx - cdv; 302 // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} 303 // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 304 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 305 // CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 306 #pragma omp atomic update 307 ulx = ulx & bv; 308 // CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 309 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 310 // CHECK: [[BX:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1 311 // CHECK: br label %[[CONT:.+]] 312 // CHECK: [[CONT]] 313 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[BX]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 314 // CHECK: [[OLD:%.+]] = trunc i8 [[EXPECTED]] to i1 315 // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD]] to i32 316 // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] 317 // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 318 // CHECK: [[DESIRED:%.+]] = zext i1 [[CAST]] to i8 319 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], 320 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 321 // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 322 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 323 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 324 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 325 // CHECK: [[EXIT]] 326 #pragma omp atomic 327 bx = cv & bx; 328 // CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, 329 // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 330 // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1 331 // CHECK: br label %[[CONT:.+]] 332 // CHECK: [[CONT]] 333 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 334 // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 335 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] 336 // CHECK: [[DESIRED:%.+]] = trunc i32 [[ASHR]] to i8 337 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], 338 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], 339 // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 340 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 341 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 342 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 343 // CHECK: [[EXIT]] 344 // CHECK: call{{.*}} @__kmpc_flush( 345 #pragma omp atomic update, seq_cst 346 cx = cx >> ucv; 347 // CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, 348 // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 349 // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8 350 // CHECK: br label %[[CONT:.+]] 351 // CHECK: [[CONT]] 352 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 353 // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 354 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] 355 // CHECK: [[DESIRED:%.+]] = sext i32 [[SHL]] to i64 356 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], 357 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 358 // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 359 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 360 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 361 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 362 // CHECK: [[EXIT]] 363 #pragma omp atomic update 364 ulx = sv << ulx; 365 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, 366 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 367 // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8 368 // CHECK: br label %[[CONT:.+]] 369 // CHECK: [[CONT]] 370 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 371 // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] 372 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], 373 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], 374 // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 375 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 376 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 377 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 378 // CHECK: [[EXIT]] 379 #pragma omp atomic 380 lx = lx % usv; 381 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} 382 // CHECK: atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4 383 // CHECK: call{{.*}} @__kmpc_flush( 384 #pragma omp atomic seq_cst, update 385 uix = iv | uix; 386 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} 387 // CHECK: atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 388 #pragma omp atomic 389 ix = ix & uiv; 390 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, 391 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 392 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) 393 // CHECK: br label %[[CONT:.+]] 394 // CHECK: [[CONT]] 395 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 396 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] 397 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 398 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] 399 // <Skip checks for complex calculations> 400 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 401 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 402 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] 403 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] 404 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 405 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 406 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) 407 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 408 // CHECK: [[EXIT]] 409 #pragma omp atomic update 410 cix = lv + cix; 411 // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, 412 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float 413 // CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4 414 // CHECK: br label %[[CONT:.+]] 415 // CHECK: [[CONT]] 416 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 417 // CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32* 418 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float 419 // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] 420 // CHECK: store float [[MUL]], float* [[TEMP]], 421 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]], 422 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 423 // CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0 424 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 425 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 426 // CHECK: [[EXIT]] 427 #pragma omp atomic 428 fx = fx * ulv; 429 // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, 430 // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double 431 // CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 432 // CHECK: br label %[[CONT:.+]] 433 // CHECK: [[CONT]] 434 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 435 // CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* 436 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double 437 // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] 438 // CHECK: store double [[DIV]], double* [[TEMP]], 439 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], 440 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 441 // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 442 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 443 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 444 // CHECK: [[EXIT]] 445 #pragma omp atomic update 446 dx /= llv; 447 // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, 448 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 449 // CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 450 // CHECK: br label %[[CONT:.+]] 451 // CHECK: [[CONT]] 452 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 453 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 454 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 455 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] 456 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]] 457 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] 458 // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] 459 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST1]] 460 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 461 // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 462 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 463 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 464 // CHECK: [[EXIT]] 465 #pragma omp atomic 466 ldx -= ullv; 467 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, 468 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* 469 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) 470 // CHECK: br label %[[CONT:.+]] 471 // CHECK: [[CONT]] 472 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 473 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] 474 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 475 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] 476 // <Skip checks for complex calculations> 477 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 478 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 479 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] 480 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] 481 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* 482 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* 483 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) 484 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 485 // CHECK: [[EXIT]] 486 #pragma omp atomic update 487 cix = fv / cix; 488 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 489 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 490 // CHECK: br label %[[CONT:.+]] 491 // CHECK: [[CONT]] 492 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 493 // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32 494 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double 495 // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] 496 // CHECK: [[DESIRED:%.+]] = fptosi double [[ADD]] to i16 497 // CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]] 498 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]] 499 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 500 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 501 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 502 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 503 // CHECK: [[EXIT]] 504 #pragma omp atomic 505 sx = sx + dv; 506 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, 507 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 508 // CHECK: br label %[[CONT:.+]] 509 // CHECK: [[CONT]] 510 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] 511 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 512 // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 513 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80 514 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] 515 // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 516 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 517 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] 518 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] 519 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] release monotonic, align 1 520 // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 521 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 522 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 523 // CHECK: [[EXIT]] 524 // CHECK: call{{.*}} @__kmpc_flush( 525 #pragma omp atomic update release 526 bx = ldv * bx; 527 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), 528 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), 529 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 530 // CHECK: br label %[[CONT:.+]] 531 // CHECK: [[CONT]] 532 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] 533 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 534 // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 535 // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]] 536 // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0 537 // CHECK: icmp ne i32 [[SUB_RE]], 0 538 // CHECK: icmp ne i32 [[SUB_IM]], 0 539 // CHECK: [[BOOL_DESIRED:%.+]] = or i1 540 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 541 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] 542 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] 543 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 544 // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 545 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 546 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] 547 // CHECK: [[EXIT]] 548 #pragma omp atomic 549 bx = civ - bx; 550 // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} 551 // CHECK: load i8, i8* 552 // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 553 // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16 554 // CHECK: br label %[[CONT:.+]] 555 // CHECK: [[CONT]] 556 // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ] 557 // CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* 558 // CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]], 559 // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> 560 // CHECK: store <4 x i32> [[OLD_VEC_VAL]], <4 x i32>* [[LDTEMP:%.+]], 561 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]] 562 // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] 563 // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] 564 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] 565 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] 566 // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] 567 // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]] 568 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 569 // CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 570 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 571 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 572 // CHECK: [[EXIT]] 573 #pragma omp atomic update 574 int4x[sv] |= bv; 575 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 576 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 577 // CHECK: br label %[[CONT:.+]] 578 // CHECK: [[CONT]] 579 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 580 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 581 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 582 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 583 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 584 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 585 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 586 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] 587 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 588 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 589 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 590 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 591 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 592 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 593 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] 594 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 595 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 596 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 597 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 598 // CHECK: [[EXIT]] 599 #pragma omp atomic 600 bfx.a = bfx.a - ldv; 601 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 602 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* 603 // CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0) 604 // CHECK: br label %[[CONT:.+]] 605 // CHECK: [[CONT]] 606 // CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] 607 // CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP1:%.+]], 608 // CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] 609 // CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP:%.+]], 610 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 611 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 612 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 613 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 614 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] 615 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 616 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 617 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 618 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 619 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 620 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 621 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* 622 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* 623 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) 624 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 625 // CHECK: [[EXIT]] 626 #pragma omp atomic update 627 bfx_packed.a *= ldv; 628 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 629 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4 630 // CHECK: br label %[[CONT:.+]] 631 // CHECK: [[CONT]] 632 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 633 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 634 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 635 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 636 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 637 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 638 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] 639 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 640 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], 641 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 642 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 643 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 644 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 645 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 646 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] 647 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 648 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 649 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 650 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 651 // CHECK: [[EXIT]] 652 #pragma omp atomic 653 bfx2.a -= ldv; 654 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 655 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1 656 // CHECK: br label %[[CONT:.+]] 657 // CHECK: [[CONT]] 658 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 659 // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* 660 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], 661 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* 662 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 663 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 664 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 665 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 666 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 667 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] 668 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 669 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 670 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], 671 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 672 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 673 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 674 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 675 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] 676 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] 677 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 678 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 679 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 680 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 681 // CHECK: [[EXIT]] 682 #pragma omp atomic update 683 bfx2_packed.a = ldv / bfx2_packed.a; 684 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 685 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4 686 // CHECK: br label %[[CONT:.+]] 687 // CHECK: [[CONT]] 688 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 689 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], 690 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], 691 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], 692 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 693 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 694 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 695 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] 696 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 697 // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], 698 // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 699 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 700 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 701 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] 702 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] 703 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] 704 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 705 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 706 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 707 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 708 // CHECK: [[EXIT]] 709 #pragma omp atomic 710 bfx3.a /= ldv; 711 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 712 // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* 713 // CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* 714 // CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0) 715 // CHECK: br label %[[CONT:.+]] 716 // CHECK: [[CONT]] 717 // CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] 718 // CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP1:%.+]], 719 // CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] 720 // CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP:%.+]], 721 // CHECK: [[A_LD:%.+]] = load i24, i24* [[TEMP]], 722 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 723 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 724 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 725 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 726 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] 727 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 728 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 729 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[TEMP1]], 730 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 731 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 732 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 733 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] 734 // CHECK: store i24 %{{.+}}, i24* [[TEMP1]] 735 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* 736 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8* 737 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) 738 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 739 // CHECK: [[EXIT]] 740 #pragma omp atomic update 741 bfx3_packed.a += ldv; 742 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 743 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 744 // CHECK: br label %[[CONT:.+]] 745 // CHECK: [[CONT]] 746 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 747 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], 748 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], 749 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], 750 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 751 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 752 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 753 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80 754 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] 755 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 756 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 757 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], 758 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 759 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 760 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 761 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] 762 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]] 763 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] 764 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 765 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 766 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 767 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 768 // CHECK: [[EXIT]] 769 #pragma omp atomic 770 bfx4.a = bfx4.a * ldv; 771 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 772 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 773 // CHECK: br label %[[CONT:.+]] 774 // CHECK: [[CONT]] 775 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 776 // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* 777 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], 778 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* 779 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 780 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 781 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 782 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 783 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 784 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80 785 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] 786 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 787 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 788 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], 789 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 790 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 791 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 792 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] 793 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] 794 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 795 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 796 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 797 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 798 // CHECK: [[EXIT]] 799 #pragma omp atomic relaxed update 800 bfx4_packed.a -= ldv; 801 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 802 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 803 // CHECK: br label %[[CONT:.+]] 804 // CHECK: [[CONT]] 805 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 806 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], 807 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], 808 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], 809 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 810 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 811 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 812 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] 813 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 814 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], 815 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 816 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 817 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 818 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] 819 // CHECK: store i64 [[VAL]], i64* [[TEMP1]] 820 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] 821 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 822 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 823 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 824 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 825 // CHECK: [[EXIT]] 826 #pragma omp atomic 827 bfx4.b /= ldv; 828 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} 829 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 830 // CHECK: br label %[[CONT:.+]] 831 // CHECK: [[CONT]] 832 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] 833 // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* 834 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], 835 // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* 836 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], 837 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], 838 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 839 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 840 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 841 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] 842 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 843 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 844 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], 845 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 846 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 847 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 848 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] 849 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] 850 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] 851 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 852 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 853 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 854 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 855 // CHECK: [[EXIT]] 856 #pragma omp atomic update relaxed 857 bfx4_packed.b += ldv; 858 // CHECK: load i64, i64* 859 // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float 860 // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic, align 8 861 // CHECK: br label %[[CONT:.+]] 862 // CHECK: [[CONT]] 863 // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] 864 // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[TEMP:%.+]] to i64* 865 // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], 866 // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> 867 // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], 868 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] 869 // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 870 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] 871 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[TEMP]], 872 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 873 // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[TEMP]] 874 // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] 875 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8 876 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 877 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 878 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] 879 // CHECK: [[EXIT]] 880 #pragma omp atomic relaxed 881 float2x.x = ulv - float2x.x; 882 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, 883 // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) 884 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double 885 // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] 886 // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32 887 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]]) 888 // CHECK: call{{.*}} @__kmpc_flush( 889 #pragma omp atomic seq_cst 890 rix = dv / rix; 891 return 0; 892 } 893 894 #endif 895