1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
5 
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
9 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
10 // expected-no-diagnostics
11 
12 #ifndef HEADER
13 #define HEADER
14 
15 void foo(void) {
16   char cx, ce, cd;
17   unsigned char ucx, uce, ucd;
18   short sx, se, sd;
19   unsigned short usx, use, usd;
20   int ix, ie, id;
21   unsigned int uix, uie, uid;
22   long lx, le, ld;
23   unsigned long ulx, ule, uld;
24   long long llx, lle, lld;
25   unsigned long long ullx, ulle, ulld;
26   float fx, fe, fd;
27   double dx, de, dd;
28 
29 #pragma omp atomic compare
30   cx = cx > ce ? ce : cx;
31 #pragma omp atomic compare
32   cx = cx < ce ? ce : cx;
33 #pragma omp atomic compare
34   cx = ce > cx ? ce : cx;
35 #pragma omp atomic compare
36   cx = ce < cx ? ce : cx;
37 #pragma omp atomic compare
38   if (cx > ce)
39     cx = ce;
40 #pragma omp atomic compare
41   if (cx < ce)
42     cx = ce;
43 #pragma omp atomic compare
44   if (ce > cx)
45     cx = ce;
46 #pragma omp atomic compare
47   if (ce < cx)
48     cx = ce;
49 
50 #pragma omp atomic compare
51   cx = cx == ce ? cd : cx;
52 #pragma omp atomic compare
53   cx = ce == cx ? cd : cx;
54 #pragma omp atomic compare
55   if (cx == ce)
56     cx = cd;
57 #pragma omp atomic compare
58   if (ce == cx)
59     cx = cd;
60 
61 #pragma omp atomic compare
62   ucx = ucx > uce ? uce : ucx;
63 #pragma omp atomic compare
64   ucx = ucx < uce ? uce : ucx;
65 #pragma omp atomic compare
66   ucx = uce > ucx ? uce : ucx;
67 #pragma omp atomic compare
68   ucx = uce < ucx ? uce : ucx;
69 #pragma omp atomic compare
70   if (ucx > uce)
71     ucx = uce;
72 #pragma omp atomic compare
73   if (ucx < uce)
74     ucx = uce;
75 #pragma omp atomic compare
76   if (uce > ucx)
77     ucx = uce;
78 #pragma omp atomic compare
79   if (uce < ucx)
80     ucx = uce;
81 
82 #pragma omp atomic compare
83   ucx = ucx == uce ? ucd : ucx;
84 #pragma omp atomic compare
85   ucx = uce == ucx ? ucd : ucx;
86 #pragma omp atomic compare
87   if (ucx == uce)
88     ucx = ucd;
89 #pragma omp atomic compare
90   if (uce == ucx)
91     ucx = ucd;
92 
93 #pragma omp atomic compare acq_rel
94   cx = cx > ce ? ce : cx;
95 #pragma omp atomic compare acq_rel
96   cx = cx < ce ? ce : cx;
97 #pragma omp atomic compare acq_rel
98   cx = ce > cx ? ce : cx;
99 #pragma omp atomic compare acq_rel
100   cx = ce < cx ? ce : cx;
101 #pragma omp atomic compare acq_rel
102   if (cx > ce)
103     cx = ce;
104 #pragma omp atomic compare acq_rel
105   if (cx < ce)
106     cx = ce;
107 #pragma omp atomic compare acq_rel
108   if (ce > cx)
109     cx = ce;
110 #pragma omp atomic compare acq_rel
111   if (ce < cx)
112     cx = ce;
113 
114 #pragma omp atomic compare acq_rel
115   cx = cx == ce ? cd : cx;
116 #pragma omp atomic compare acq_rel
117   cx = ce == cx ? cd : cx;
118 #pragma omp atomic compare acq_rel
119   if (cx == ce)
120     cx = cd;
121 #pragma omp atomic compare acq_rel
122   if (ce == cx)
123     cx = cd;
124 
125 #pragma omp atomic compare acq_rel
126   ucx = ucx > uce ? uce : ucx;
127 #pragma omp atomic compare acq_rel
128   ucx = ucx < uce ? uce : ucx;
129 #pragma omp atomic compare acq_rel
130   ucx = uce > ucx ? uce : ucx;
131 #pragma omp atomic compare acq_rel
132   ucx = uce < ucx ? uce : ucx;
133 #pragma omp atomic compare acq_rel
134   if (ucx > uce)
135     ucx = uce;
136 #pragma omp atomic compare acq_rel
137   if (ucx < uce)
138     ucx = uce;
139 #pragma omp atomic compare acq_rel
140   if (uce > ucx)
141     ucx = uce;
142 #pragma omp atomic compare acq_rel
143   if (uce < ucx)
144     ucx = uce;
145 
146 #pragma omp atomic compare acq_rel
147   ucx = ucx == uce ? ucd : ucx;
148 #pragma omp atomic compare acq_rel
149   ucx = uce == ucx ? ucd : ucx;
150 #pragma omp atomic compare acq_rel
151   if (ucx == uce)
152     ucx = ucd;
153 #pragma omp atomic compare acq_rel
154   if (uce == ucx)
155     ucx = ucd;
156 
157 #pragma omp atomic compare acquire
158   cx = cx > ce ? ce : cx;
159 #pragma omp atomic compare acquire
160   cx = cx < ce ? ce : cx;
161 #pragma omp atomic compare acquire
162   cx = ce > cx ? ce : cx;
163 #pragma omp atomic compare acquire
164   cx = ce < cx ? ce : cx;
165 #pragma omp atomic compare acquire
166   if (cx > ce)
167     cx = ce;
168 #pragma omp atomic compare acquire
169   if (cx < ce)
170     cx = ce;
171 #pragma omp atomic compare acquire
172   if (ce > cx)
173     cx = ce;
174 #pragma omp atomic compare acquire
175   if (ce < cx)
176     cx = ce;
177 
178 #pragma omp atomic compare acquire
179   cx = cx == ce ? cd : cx;
180 #pragma omp atomic compare acquire
181   cx = ce == cx ? cd : cx;
182 #pragma omp atomic compare acquire
183   if (cx == ce)
184     cx = cd;
185 #pragma omp atomic compare acquire
186   if (ce == cx)
187     cx = cd;
188 
189 #pragma omp atomic compare acquire
190   ucx = ucx > uce ? uce : ucx;
191 #pragma omp atomic compare acquire
192   ucx = ucx < uce ? uce : ucx;
193 #pragma omp atomic compare acquire
194   ucx = uce > ucx ? uce : ucx;
195 #pragma omp atomic compare acquire
196   ucx = uce < ucx ? uce : ucx;
197 #pragma omp atomic compare acquire
198   if (ucx > uce)
199     ucx = uce;
200 #pragma omp atomic compare acquire
201   if (ucx < uce)
202     ucx = uce;
203 #pragma omp atomic compare acquire
204   if (uce > ucx)
205     ucx = uce;
206 #pragma omp atomic compare acquire
207   if (uce < ucx)
208     ucx = uce;
209 
210 #pragma omp atomic compare acquire
211   ucx = ucx == uce ? ucd : ucx;
212 #pragma omp atomic compare acquire
213   ucx = uce == ucx ? ucd : ucx;
214 #pragma omp atomic compare acquire
215   if (ucx == uce)
216     ucx = ucd;
217 #pragma omp atomic compare acquire
218   if (uce == ucx)
219     ucx = ucd;
220 
221 #pragma omp atomic compare relaxed
222   cx = cx > ce ? ce : cx;
223 #pragma omp atomic compare relaxed
224   cx = cx < ce ? ce : cx;
225 #pragma omp atomic compare relaxed
226   cx = ce > cx ? ce : cx;
227 #pragma omp atomic compare relaxed
228   cx = ce < cx ? ce : cx;
229 #pragma omp atomic compare relaxed
230   if (cx > ce)
231     cx = ce;
232 #pragma omp atomic compare relaxed
233   if (cx < ce)
234     cx = ce;
235 #pragma omp atomic compare relaxed
236   if (ce > cx)
237     cx = ce;
238 #pragma omp atomic compare relaxed
239   if (ce < cx)
240     cx = ce;
241 
242 #pragma omp atomic compare relaxed
243   cx = cx == ce ? cd : cx;
244 #pragma omp atomic compare relaxed
245   cx = ce == cx ? cd : cx;
246 #pragma omp atomic compare relaxed
247   if (cx == ce)
248     cx = cd;
249 #pragma omp atomic compare relaxed
250   if (ce == cx)
251     cx = cd;
252 
253 #pragma omp atomic compare relaxed
254   ucx = ucx > uce ? uce : ucx;
255 #pragma omp atomic compare relaxed
256   ucx = ucx < uce ? uce : ucx;
257 #pragma omp atomic compare relaxed
258   ucx = uce > ucx ? uce : ucx;
259 #pragma omp atomic compare relaxed
260   ucx = uce < ucx ? uce : ucx;
261 #pragma omp atomic compare relaxed
262   if (ucx > uce)
263     ucx = uce;
264 #pragma omp atomic compare relaxed
265   if (ucx < uce)
266     ucx = uce;
267 #pragma omp atomic compare relaxed
268   if (uce > ucx)
269     ucx = uce;
270 #pragma omp atomic compare relaxed
271   if (uce < ucx)
272     ucx = uce;
273 
274 #pragma omp atomic compare relaxed
275   ucx = ucx == uce ? ucd : ucx;
276 #pragma omp atomic compare relaxed
277   ucx = uce == ucx ? ucd : ucx;
278 #pragma omp atomic compare relaxed
279   if (ucx == uce)
280     ucx = ucd;
281 #pragma omp atomic compare relaxed
282   if (uce == ucx)
283     ucx = ucd;
284 
285 #pragma omp atomic compare release
286   cx = cx > ce ? ce : cx;
287 #pragma omp atomic compare release
288   cx = cx < ce ? ce : cx;
289 #pragma omp atomic compare release
290   cx = ce > cx ? ce : cx;
291 #pragma omp atomic compare release
292   cx = ce < cx ? ce : cx;
293 #pragma omp atomic compare release
294   if (cx > ce)
295     cx = ce;
296 #pragma omp atomic compare release
297   if (cx < ce)
298     cx = ce;
299 #pragma omp atomic compare release
300   if (ce > cx)
301     cx = ce;
302 #pragma omp atomic compare release
303   if (ce < cx)
304     cx = ce;
305 
306 #pragma omp atomic compare release
307   cx = cx == ce ? cd : cx;
308 #pragma omp atomic compare release
309   cx = ce == cx ? cd : cx;
310 #pragma omp atomic compare release
311   if (cx == ce)
312     cx = cd;
313 #pragma omp atomic compare release
314   if (ce == cx)
315     cx = cd;
316 
317 #pragma omp atomic compare release
318   ucx = ucx > uce ? uce : ucx;
319 #pragma omp atomic compare release
320   ucx = ucx < uce ? uce : ucx;
321 #pragma omp atomic compare release
322   ucx = uce > ucx ? uce : ucx;
323 #pragma omp atomic compare release
324   ucx = uce < ucx ? uce : ucx;
325 #pragma omp atomic compare release
326   if (ucx > uce)
327     ucx = uce;
328 #pragma omp atomic compare release
329   if (ucx < uce)
330     ucx = uce;
331 #pragma omp atomic compare release
332   if (uce > ucx)
333     ucx = uce;
334 #pragma omp atomic compare release
335   if (uce < ucx)
336     ucx = uce;
337 
338 #pragma omp atomic compare release
339   ucx = ucx == uce ? ucd : ucx;
340 #pragma omp atomic compare release
341   ucx = uce == ucx ? ucd : ucx;
342 #pragma omp atomic compare release
343   if (ucx == uce)
344     ucx = ucd;
345 #pragma omp atomic compare release
346   if (uce == ucx)
347     ucx = ucd;
348 
349 #pragma omp atomic compare seq_cst
350   cx = cx > ce ? ce : cx;
351 #pragma omp atomic compare seq_cst
352   cx = cx < ce ? ce : cx;
353 #pragma omp atomic compare seq_cst
354   cx = ce > cx ? ce : cx;
355 #pragma omp atomic compare seq_cst
356   cx = ce < cx ? ce : cx;
357 #pragma omp atomic compare seq_cst
358   if (cx > ce)
359     cx = ce;
360 #pragma omp atomic compare seq_cst
361   if (cx < ce)
362     cx = ce;
363 #pragma omp atomic compare seq_cst
364   if (ce > cx)
365     cx = ce;
366 #pragma omp atomic compare seq_cst
367   if (ce < cx)
368     cx = ce;
369 
370 #pragma omp atomic compare seq_cst
371   cx = cx == ce ? cd : cx;
372 #pragma omp atomic compare seq_cst
373   cx = ce == cx ? cd : cx;
374 #pragma omp atomic compare seq_cst
375   if (cx == ce)
376     cx = cd;
377 #pragma omp atomic compare seq_cst
378   if (ce == cx)
379     cx = cd;
380 
381 #pragma omp atomic compare seq_cst
382   ucx = ucx > uce ? uce : ucx;
383 #pragma omp atomic compare seq_cst
384   ucx = ucx < uce ? uce : ucx;
385 #pragma omp atomic compare seq_cst
386   ucx = uce > ucx ? uce : ucx;
387 #pragma omp atomic compare seq_cst
388   ucx = uce < ucx ? uce : ucx;
389 #pragma omp atomic compare seq_cst
390   if (ucx > uce)
391     ucx = uce;
392 #pragma omp atomic compare seq_cst
393   if (ucx < uce)
394     ucx = uce;
395 #pragma omp atomic compare seq_cst
396   if (uce > ucx)
397     ucx = uce;
398 #pragma omp atomic compare seq_cst
399   if (uce < ucx)
400     ucx = uce;
401 
402 #pragma omp atomic compare seq_cst
403   ucx = ucx == uce ? ucd : ucx;
404 #pragma omp atomic compare seq_cst
405   ucx = uce == ucx ? ucd : ucx;
406 #pragma omp atomic compare seq_cst
407   if (ucx == uce)
408     ucx = ucd;
409 #pragma omp atomic compare seq_cst
410   if (uce == ucx)
411     ucx = ucd;
412 
413 #pragma omp atomic compare
414   sx = sx > se ? se : sx;
415 #pragma omp atomic compare
416   sx = sx < se ? se : sx;
417 #pragma omp atomic compare
418   sx = se > sx ? se : sx;
419 #pragma omp atomic compare
420   sx = se < sx ? se : sx;
421 #pragma omp atomic compare
422   if (sx > se)
423     sx = se;
424 #pragma omp atomic compare
425   if (sx < se)
426     sx = se;
427 #pragma omp atomic compare
428   if (se > sx)
429     sx = se;
430 #pragma omp atomic compare
431   if (se < sx)
432     sx = se;
433 
434 #pragma omp atomic compare
435   sx = sx == se ? sd : sx;
436 #pragma omp atomic compare
437   sx = se == sx ? sd : sx;
438 #pragma omp atomic compare
439   if (sx == se)
440     sx = sd;
441 #pragma omp atomic compare
442   if (se == sx)
443     sx = sd;
444 
445 #pragma omp atomic compare
446   usx = usx > use ? use : usx;
447 #pragma omp atomic compare
448   usx = usx < use ? use : usx;
449 #pragma omp atomic compare
450   usx = use > usx ? use : usx;
451 #pragma omp atomic compare
452   usx = use < usx ? use : usx;
453 #pragma omp atomic compare
454   if (usx > use)
455     usx = use;
456 #pragma omp atomic compare
457   if (usx < use)
458     usx = use;
459 #pragma omp atomic compare
460   if (use > usx)
461     usx = use;
462 #pragma omp atomic compare
463   if (use < usx)
464     usx = use;
465 
466 #pragma omp atomic compare
467   usx = usx == use ? usd : usx;
468 #pragma omp atomic compare
469   usx = use == usx ? usd : usx;
470 #pragma omp atomic compare
471   if (usx == use)
472     usx = usd;
473 #pragma omp atomic compare
474   if (use == usx)
475     usx = usd;
476 
477 #pragma omp atomic compare acq_rel
478   sx = sx > se ? se : sx;
479 #pragma omp atomic compare acq_rel
480   sx = sx < se ? se : sx;
481 #pragma omp atomic compare acq_rel
482   sx = se > sx ? se : sx;
483 #pragma omp atomic compare acq_rel
484   sx = se < sx ? se : sx;
485 #pragma omp atomic compare acq_rel
486   if (sx > se)
487     sx = se;
488 #pragma omp atomic compare acq_rel
489   if (sx < se)
490     sx = se;
491 #pragma omp atomic compare acq_rel
492   if (se > sx)
493     sx = se;
494 #pragma omp atomic compare acq_rel
495   if (se < sx)
496     sx = se;
497 
498 #pragma omp atomic compare acq_rel
499   sx = sx == se ? sd : sx;
500 #pragma omp atomic compare acq_rel
501   sx = se == sx ? sd : sx;
502 #pragma omp atomic compare acq_rel
503   if (sx == se)
504     sx = sd;
505 #pragma omp atomic compare acq_rel
506   if (se == sx)
507     sx = sd;
508 
509 #pragma omp atomic compare acq_rel
510   usx = usx > use ? use : usx;
511 #pragma omp atomic compare acq_rel
512   usx = usx < use ? use : usx;
513 #pragma omp atomic compare acq_rel
514   usx = use > usx ? use : usx;
515 #pragma omp atomic compare acq_rel
516   usx = use < usx ? use : usx;
517 #pragma omp atomic compare acq_rel
518   if (usx > use)
519     usx = use;
520 #pragma omp atomic compare acq_rel
521   if (usx < use)
522     usx = use;
523 #pragma omp atomic compare acq_rel
524   if (use > usx)
525     usx = use;
526 #pragma omp atomic compare acq_rel
527   if (use < usx)
528     usx = use;
529 
530 #pragma omp atomic compare acq_rel
531   usx = usx == use ? usd : usx;
532 #pragma omp atomic compare acq_rel
533   usx = use == usx ? usd : usx;
534 #pragma omp atomic compare acq_rel
535   if (usx == use)
536     usx = usd;
537 #pragma omp atomic compare acq_rel
538   if (use == usx)
539     usx = usd;
540 
541 #pragma omp atomic compare acquire
542   sx = sx > se ? se : sx;
543 #pragma omp atomic compare acquire
544   sx = sx < se ? se : sx;
545 #pragma omp atomic compare acquire
546   sx = se > sx ? se : sx;
547 #pragma omp atomic compare acquire
548   sx = se < sx ? se : sx;
549 #pragma omp atomic compare acquire
550   if (sx > se)
551     sx = se;
552 #pragma omp atomic compare acquire
553   if (sx < se)
554     sx = se;
555 #pragma omp atomic compare acquire
556   if (se > sx)
557     sx = se;
558 #pragma omp atomic compare acquire
559   if (se < sx)
560     sx = se;
561 
562 #pragma omp atomic compare acquire
563   sx = sx == se ? sd : sx;
564 #pragma omp atomic compare acquire
565   sx = se == sx ? sd : sx;
566 #pragma omp atomic compare acquire
567   if (sx == se)
568     sx = sd;
569 #pragma omp atomic compare acquire
570   if (se == sx)
571     sx = sd;
572 
573 #pragma omp atomic compare acquire
574   usx = usx > use ? use : usx;
575 #pragma omp atomic compare acquire
576   usx = usx < use ? use : usx;
577 #pragma omp atomic compare acquire
578   usx = use > usx ? use : usx;
579 #pragma omp atomic compare acquire
580   usx = use < usx ? use : usx;
581 #pragma omp atomic compare acquire
582   if (usx > use)
583     usx = use;
584 #pragma omp atomic compare acquire
585   if (usx < use)
586     usx = use;
587 #pragma omp atomic compare acquire
588   if (use > usx)
589     usx = use;
590 #pragma omp atomic compare acquire
591   if (use < usx)
592     usx = use;
593 
594 #pragma omp atomic compare acquire
595   usx = usx == use ? usd : usx;
596 #pragma omp atomic compare acquire
597   usx = use == usx ? usd : usx;
598 #pragma omp atomic compare acquire
599   if (usx == use)
600     usx = usd;
601 #pragma omp atomic compare acquire
602   if (use == usx)
603     usx = usd;
604 
605 #pragma omp atomic compare relaxed
606   sx = sx > se ? se : sx;
607 #pragma omp atomic compare relaxed
608   sx = sx < se ? se : sx;
609 #pragma omp atomic compare relaxed
610   sx = se > sx ? se : sx;
611 #pragma omp atomic compare relaxed
612   sx = se < sx ? se : sx;
613 #pragma omp atomic compare relaxed
614   if (sx > se)
615     sx = se;
616 #pragma omp atomic compare relaxed
617   if (sx < se)
618     sx = se;
619 #pragma omp atomic compare relaxed
620   if (se > sx)
621     sx = se;
622 #pragma omp atomic compare relaxed
623   if (se < sx)
624     sx = se;
625 
626 #pragma omp atomic compare relaxed
627   sx = sx == se ? sd : sx;
628 #pragma omp atomic compare relaxed
629   sx = se == sx ? sd : sx;
630 #pragma omp atomic compare relaxed
631   if (sx == se)
632     sx = sd;
633 #pragma omp atomic compare relaxed
634   if (se == sx)
635     sx = sd;
636 
637 #pragma omp atomic compare relaxed
638   usx = usx > use ? use : usx;
639 #pragma omp atomic compare relaxed
640   usx = usx < use ? use : usx;
641 #pragma omp atomic compare relaxed
642   usx = use > usx ? use : usx;
643 #pragma omp atomic compare relaxed
644   usx = use < usx ? use : usx;
645 #pragma omp atomic compare relaxed
646   if (usx > use)
647     usx = use;
648 #pragma omp atomic compare relaxed
649   if (usx < use)
650     usx = use;
651 #pragma omp atomic compare relaxed
652   if (use > usx)
653     usx = use;
654 #pragma omp atomic compare relaxed
655   if (use < usx)
656     usx = use;
657 
658 #pragma omp atomic compare relaxed
659   usx = usx == use ? usd : usx;
660 #pragma omp atomic compare relaxed
661   usx = use == usx ? usd : usx;
662 #pragma omp atomic compare relaxed
663   if (usx == use)
664     usx = usd;
665 #pragma omp atomic compare relaxed
666   if (use == usx)
667     usx = usd;
668 
669 #pragma omp atomic compare release
670   sx = sx > se ? se : sx;
671 #pragma omp atomic compare release
672   sx = sx < se ? se : sx;
673 #pragma omp atomic compare release
674   sx = se > sx ? se : sx;
675 #pragma omp atomic compare release
676   sx = se < sx ? se : sx;
677 #pragma omp atomic compare release
678   if (sx > se)
679     sx = se;
680 #pragma omp atomic compare release
681   if (sx < se)
682     sx = se;
683 #pragma omp atomic compare release
684   if (se > sx)
685     sx = se;
686 #pragma omp atomic compare release
687   if (se < sx)
688     sx = se;
689 
690 #pragma omp atomic compare release
691   sx = sx == se ? sd : sx;
692 #pragma omp atomic compare release
693   sx = se == sx ? sd : sx;
694 #pragma omp atomic compare release
695   if (sx == se)
696     sx = sd;
697 #pragma omp atomic compare release
698   if (se == sx)
699     sx = sd;
700 
701 #pragma omp atomic compare release
702   usx = usx > use ? use : usx;
703 #pragma omp atomic compare release
704   usx = usx < use ? use : usx;
705 #pragma omp atomic compare release
706   usx = use > usx ? use : usx;
707 #pragma omp atomic compare release
708   usx = use < usx ? use : usx;
709 #pragma omp atomic compare release
710   if (usx > use)
711     usx = use;
712 #pragma omp atomic compare release
713   if (usx < use)
714     usx = use;
715 #pragma omp atomic compare release
716   if (use > usx)
717     usx = use;
718 #pragma omp atomic compare release
719   if (use < usx)
720     usx = use;
721 
722 #pragma omp atomic compare release
723   usx = usx == use ? usd : usx;
724 #pragma omp atomic compare release
725   usx = use == usx ? usd : usx;
726 #pragma omp atomic compare release
727   if (usx == use)
728     usx = usd;
729 #pragma omp atomic compare release
730   if (use == usx)
731     usx = usd;
732 
733 #pragma omp atomic compare seq_cst
734   sx = sx > se ? se : sx;
735 #pragma omp atomic compare seq_cst
736   sx = sx < se ? se : sx;
737 #pragma omp atomic compare seq_cst
738   sx = se > sx ? se : sx;
739 #pragma omp atomic compare seq_cst
740   sx = se < sx ? se : sx;
741 #pragma omp atomic compare seq_cst
742   if (sx > se)
743     sx = se;
744 #pragma omp atomic compare seq_cst
745   if (sx < se)
746     sx = se;
747 #pragma omp atomic compare seq_cst
748   if (se > sx)
749     sx = se;
750 #pragma omp atomic compare seq_cst
751   if (se < sx)
752     sx = se;
753 
754 #pragma omp atomic compare seq_cst
755   sx = sx == se ? sd : sx;
756 #pragma omp atomic compare seq_cst
757   sx = se == sx ? sd : sx;
758 #pragma omp atomic compare seq_cst
759   if (sx == se)
760     sx = sd;
761 #pragma omp atomic compare seq_cst
762   if (se == sx)
763     sx = sd;
764 
765 #pragma omp atomic compare seq_cst
766   usx = usx > use ? use : usx;
767 #pragma omp atomic compare seq_cst
768   usx = usx < use ? use : usx;
769 #pragma omp atomic compare seq_cst
770   usx = use > usx ? use : usx;
771 #pragma omp atomic compare seq_cst
772   usx = use < usx ? use : usx;
773 #pragma omp atomic compare seq_cst
774   if (usx > use)
775     usx = use;
776 #pragma omp atomic compare seq_cst
777   if (usx < use)
778     usx = use;
779 #pragma omp atomic compare seq_cst
780   if (use > usx)
781     usx = use;
782 #pragma omp atomic compare seq_cst
783   if (use < usx)
784     usx = use;
785 
786 #pragma omp atomic compare seq_cst
787   usx = usx == use ? usd : usx;
788 #pragma omp atomic compare seq_cst
789   usx = use == usx ? usd : usx;
790 #pragma omp atomic compare seq_cst
791   if (usx == use)
792     usx = usd;
793 #pragma omp atomic compare seq_cst
794   if (use == usx)
795     usx = usd;
796 
797 #pragma omp atomic compare
798   ix = ix > ie ? ie : ix;
799 #pragma omp atomic compare
800   ix = ix < ie ? ie : ix;
801 #pragma omp atomic compare
802   ix = ie > ix ? ie : ix;
803 #pragma omp atomic compare
804   ix = ie < ix ? ie : ix;
805 #pragma omp atomic compare
806   if (ix > ie)
807     ix = ie;
808 #pragma omp atomic compare
809   if (ix < ie)
810     ix = ie;
811 #pragma omp atomic compare
812   if (ie > ix)
813     ix = ie;
814 #pragma omp atomic compare
815   if (ie < ix)
816     ix = ie;
817 
818 #pragma omp atomic compare
819   ix = ix == ie ? id : ix;
820 #pragma omp atomic compare
821   ix = ie == ix ? id : ix;
822 #pragma omp atomic compare
823   if (ix == ie)
824     ix = id;
825 #pragma omp atomic compare
826   if (ie == ix)
827     ix = id;
828 
829 #pragma omp atomic compare
830   uix = uix > uie ? uie : uix;
831 #pragma omp atomic compare
832   uix = uix < uie ? uie : uix;
833 #pragma omp atomic compare
834   uix = uie > uix ? uie : uix;
835 #pragma omp atomic compare
836   uix = uie < uix ? uie : uix;
837 #pragma omp atomic compare
838   if (uix > uie)
839     uix = uie;
840 #pragma omp atomic compare
841   if (uix < uie)
842     uix = uie;
843 #pragma omp atomic compare
844   if (uie > uix)
845     uix = uie;
846 #pragma omp atomic compare
847   if (uie < uix)
848     uix = uie;
849 
850 #pragma omp atomic compare
851   uix = uix == uie ? uid : uix;
852 #pragma omp atomic compare
853   uix = uie == uix ? uid : uix;
854 #pragma omp atomic compare
855   if (uix == uie)
856     uix = uid;
857 #pragma omp atomic compare
858   if (uie == uix)
859     uix = uid;
860 
861 #pragma omp atomic compare acq_rel
862   ix = ix > ie ? ie : ix;
863 #pragma omp atomic compare acq_rel
864   ix = ix < ie ? ie : ix;
865 #pragma omp atomic compare acq_rel
866   ix = ie > ix ? ie : ix;
867 #pragma omp atomic compare acq_rel
868   ix = ie < ix ? ie : ix;
869 #pragma omp atomic compare acq_rel
870   if (ix > ie)
871     ix = ie;
872 #pragma omp atomic compare acq_rel
873   if (ix < ie)
874     ix = ie;
875 #pragma omp atomic compare acq_rel
876   if (ie > ix)
877     ix = ie;
878 #pragma omp atomic compare acq_rel
879   if (ie < ix)
880     ix = ie;
881 
882 #pragma omp atomic compare acq_rel
883   ix = ix == ie ? id : ix;
884 #pragma omp atomic compare acq_rel
885   ix = ie == ix ? id : ix;
886 #pragma omp atomic compare acq_rel
887   if (ix == ie)
888     ix = id;
889 #pragma omp atomic compare acq_rel
890   if (ie == ix)
891     ix = id;
892 
893 #pragma omp atomic compare acq_rel
894   uix = uix > uie ? uie : uix;
895 #pragma omp atomic compare acq_rel
896   uix = uix < uie ? uie : uix;
897 #pragma omp atomic compare acq_rel
898   uix = uie > uix ? uie : uix;
899 #pragma omp atomic compare acq_rel
900   uix = uie < uix ? uie : uix;
901 #pragma omp atomic compare acq_rel
902   if (uix > uie)
903     uix = uie;
904 #pragma omp atomic compare acq_rel
905   if (uix < uie)
906     uix = uie;
907 #pragma omp atomic compare acq_rel
908   if (uie > uix)
909     uix = uie;
910 #pragma omp atomic compare acq_rel
911   if (uie < uix)
912     uix = uie;
913 
914 #pragma omp atomic compare acq_rel
915   uix = uix == uie ? uid : uix;
916 #pragma omp atomic compare acq_rel
917   uix = uie == uix ? uid : uix;
918 #pragma omp atomic compare acq_rel
919   if (uix == uie)
920     uix = uid;
921 #pragma omp atomic compare acq_rel
922   if (uie == uix)
923     uix = uid;
924 
925 #pragma omp atomic compare acquire
926   ix = ix > ie ? ie : ix;
927 #pragma omp atomic compare acquire
928   ix = ix < ie ? ie : ix;
929 #pragma omp atomic compare acquire
930   ix = ie > ix ? ie : ix;
931 #pragma omp atomic compare acquire
932   ix = ie < ix ? ie : ix;
933 #pragma omp atomic compare acquire
934   if (ix > ie)
935     ix = ie;
936 #pragma omp atomic compare acquire
937   if (ix < ie)
938     ix = ie;
939 #pragma omp atomic compare acquire
940   if (ie > ix)
941     ix = ie;
942 #pragma omp atomic compare acquire
943   if (ie < ix)
944     ix = ie;
945 
946 #pragma omp atomic compare acquire
947   ix = ix == ie ? id : ix;
948 #pragma omp atomic compare acquire
949   ix = ie == ix ? id : ix;
950 #pragma omp atomic compare acquire
951   if (ix == ie)
952     ix = id;
953 #pragma omp atomic compare acquire
954   if (ie == ix)
955     ix = id;
956 
957 #pragma omp atomic compare acquire
958   uix = uix > uie ? uie : uix;
959 #pragma omp atomic compare acquire
960   uix = uix < uie ? uie : uix;
961 #pragma omp atomic compare acquire
962   uix = uie > uix ? uie : uix;
963 #pragma omp atomic compare acquire
964   uix = uie < uix ? uie : uix;
965 #pragma omp atomic compare acquire
966   if (uix > uie)
967     uix = uie;
968 #pragma omp atomic compare acquire
969   if (uix < uie)
970     uix = uie;
971 #pragma omp atomic compare acquire
972   if (uie > uix)
973     uix = uie;
974 #pragma omp atomic compare acquire
975   if (uie < uix)
976     uix = uie;
977 
978 #pragma omp atomic compare acquire
979   uix = uix == uie ? uid : uix;
980 #pragma omp atomic compare acquire
981   uix = uie == uix ? uid : uix;
982 #pragma omp atomic compare acquire
983   if (uix == uie)
984     uix = uid;
985 #pragma omp atomic compare acquire
986   if (uie == uix)
987     uix = uid;
988 
989 #pragma omp atomic compare relaxed
990   ix = ix > ie ? ie : ix;
991 #pragma omp atomic compare relaxed
992   ix = ix < ie ? ie : ix;
993 #pragma omp atomic compare relaxed
994   ix = ie > ix ? ie : ix;
995 #pragma omp atomic compare relaxed
996   ix = ie < ix ? ie : ix;
997 #pragma omp atomic compare relaxed
998   if (ix > ie)
999     ix = ie;
1000 #pragma omp atomic compare relaxed
1001   if (ix < ie)
1002     ix = ie;
1003 #pragma omp atomic compare relaxed
1004   if (ie > ix)
1005     ix = ie;
1006 #pragma omp atomic compare relaxed
1007   if (ie < ix)
1008     ix = ie;
1009 
1010 #pragma omp atomic compare relaxed
1011   ix = ix == ie ? id : ix;
1012 #pragma omp atomic compare relaxed
1013   ix = ie == ix ? id : ix;
1014 #pragma omp atomic compare relaxed
1015   if (ix == ie)
1016     ix = id;
1017 #pragma omp atomic compare relaxed
1018   if (ie == ix)
1019     ix = id;
1020 
1021 #pragma omp atomic compare relaxed
1022   uix = uix > uie ? uie : uix;
1023 #pragma omp atomic compare relaxed
1024   uix = uix < uie ? uie : uix;
1025 #pragma omp atomic compare relaxed
1026   uix = uie > uix ? uie : uix;
1027 #pragma omp atomic compare relaxed
1028   uix = uie < uix ? uie : uix;
1029 #pragma omp atomic compare relaxed
1030   if (uix > uie)
1031     uix = uie;
1032 #pragma omp atomic compare relaxed
1033   if (uix < uie)
1034     uix = uie;
1035 #pragma omp atomic compare relaxed
1036   if (uie > uix)
1037     uix = uie;
1038 #pragma omp atomic compare relaxed
1039   if (uie < uix)
1040     uix = uie;
1041 
1042 #pragma omp atomic compare relaxed
1043   uix = uix == uie ? uid : uix;
1044 #pragma omp atomic compare relaxed
1045   uix = uie == uix ? uid : uix;
1046 #pragma omp atomic compare relaxed
1047   if (uix == uie)
1048     uix = uid;
1049 #pragma omp atomic compare relaxed
1050   if (uie == uix)
1051     uix = uid;
1052 
1053 #pragma omp atomic compare release
1054   ix = ix > ie ? ie : ix;
1055 #pragma omp atomic compare release
1056   ix = ix < ie ? ie : ix;
1057 #pragma omp atomic compare release
1058   ix = ie > ix ? ie : ix;
1059 #pragma omp atomic compare release
1060   ix = ie < ix ? ie : ix;
1061 #pragma omp atomic compare release
1062   if (ix > ie)
1063     ix = ie;
1064 #pragma omp atomic compare release
1065   if (ix < ie)
1066     ix = ie;
1067 #pragma omp atomic compare release
1068   if (ie > ix)
1069     ix = ie;
1070 #pragma omp atomic compare release
1071   if (ie < ix)
1072     ix = ie;
1073 
1074 #pragma omp atomic compare release
1075   ix = ix == ie ? id : ix;
1076 #pragma omp atomic compare release
1077   ix = ie == ix ? id : ix;
1078 #pragma omp atomic compare release
1079   if (ix == ie)
1080     ix = id;
1081 #pragma omp atomic compare release
1082   if (ie == ix)
1083     ix = id;
1084 
1085 #pragma omp atomic compare release
1086   uix = uix > uie ? uie : uix;
1087 #pragma omp atomic compare release
1088   uix = uix < uie ? uie : uix;
1089 #pragma omp atomic compare release
1090   uix = uie > uix ? uie : uix;
1091 #pragma omp atomic compare release
1092   uix = uie < uix ? uie : uix;
1093 #pragma omp atomic compare release
1094   if (uix > uie)
1095     uix = uie;
1096 #pragma omp atomic compare release
1097   if (uix < uie)
1098     uix = uie;
1099 #pragma omp atomic compare release
1100   if (uie > uix)
1101     uix = uie;
1102 #pragma omp atomic compare release
1103   if (uie < uix)
1104     uix = uie;
1105 
1106 #pragma omp atomic compare release
1107   uix = uix == uie ? uid : uix;
1108 #pragma omp atomic compare release
1109   uix = uie == uix ? uid : uix;
1110 #pragma omp atomic compare release
1111   if (uix == uie)
1112     uix = uid;
1113 #pragma omp atomic compare release
1114   if (uie == uix)
1115     uix = uid;
1116 
1117 #pragma omp atomic compare seq_cst
1118   ix = ix > ie ? ie : ix;
1119 #pragma omp atomic compare seq_cst
1120   ix = ix < ie ? ie : ix;
1121 #pragma omp atomic compare seq_cst
1122   ix = ie > ix ? ie : ix;
1123 #pragma omp atomic compare seq_cst
1124   ix = ie < ix ? ie : ix;
1125 #pragma omp atomic compare seq_cst
1126   if (ix > ie)
1127     ix = ie;
1128 #pragma omp atomic compare seq_cst
1129   if (ix < ie)
1130     ix = ie;
1131 #pragma omp atomic compare seq_cst
1132   if (ie > ix)
1133     ix = ie;
1134 #pragma omp atomic compare seq_cst
1135   if (ie < ix)
1136     ix = ie;
1137 
1138 #pragma omp atomic compare seq_cst
1139   ix = ix == ie ? id : ix;
1140 #pragma omp atomic compare seq_cst
1141   ix = ie == ix ? id : ix;
1142 #pragma omp atomic compare seq_cst
1143   if (ix == ie)
1144     ix = id;
1145 #pragma omp atomic compare seq_cst
1146   if (ie == ix)
1147     ix = id;
1148 
1149 #pragma omp atomic compare seq_cst
1150   uix = uix > uie ? uie : uix;
1151 #pragma omp atomic compare seq_cst
1152   uix = uix < uie ? uie : uix;
1153 #pragma omp atomic compare seq_cst
1154   uix = uie > uix ? uie : uix;
1155 #pragma omp atomic compare seq_cst
1156   uix = uie < uix ? uie : uix;
1157 #pragma omp atomic compare seq_cst
1158   if (uix > uie)
1159     uix = uie;
1160 #pragma omp atomic compare seq_cst
1161   if (uix < uie)
1162     uix = uie;
1163 #pragma omp atomic compare seq_cst
1164   if (uie > uix)
1165     uix = uie;
1166 #pragma omp atomic compare seq_cst
1167   if (uie < uix)
1168     uix = uie;
1169 
1170 #pragma omp atomic compare seq_cst
1171   uix = uix == uie ? uid : uix;
1172 #pragma omp atomic compare seq_cst
1173   uix = uie == uix ? uid : uix;
1174 #pragma omp atomic compare seq_cst
1175   if (uix == uie)
1176     uix = uid;
1177 #pragma omp atomic compare seq_cst
1178   if (uie == uix)
1179     uix = uid;
1180 
1181 #pragma omp atomic compare
1182   lx = lx > le ? le : lx;
1183 #pragma omp atomic compare
1184   lx = lx < le ? le : lx;
1185 #pragma omp atomic compare
1186   lx = le > lx ? le : lx;
1187 #pragma omp atomic compare
1188   lx = le < lx ? le : lx;
1189 #pragma omp atomic compare
1190   if (lx > le)
1191     lx = le;
1192 #pragma omp atomic compare
1193   if (lx < le)
1194     lx = le;
1195 #pragma omp atomic compare
1196   if (le > lx)
1197     lx = le;
1198 #pragma omp atomic compare
1199   if (le < lx)
1200     lx = le;
1201 
1202 #pragma omp atomic compare
1203   lx = lx == le ? ld : lx;
1204 #pragma omp atomic compare
1205   lx = le == lx ? ld : lx;
1206 #pragma omp atomic compare
1207   if (lx == le)
1208     lx = ld;
1209 #pragma omp atomic compare
1210   if (le == lx)
1211     lx = ld;
1212 
1213 #pragma omp atomic compare
1214   ulx = ulx > ule ? ule : ulx;
1215 #pragma omp atomic compare
1216   ulx = ulx < ule ? ule : ulx;
1217 #pragma omp atomic compare
1218   ulx = ule > ulx ? ule : ulx;
1219 #pragma omp atomic compare
1220   ulx = ule < ulx ? ule : ulx;
1221 #pragma omp atomic compare
1222   if (ulx > ule)
1223     ulx = ule;
1224 #pragma omp atomic compare
1225   if (ulx < ule)
1226     ulx = ule;
1227 #pragma omp atomic compare
1228   if (ule > ulx)
1229     ulx = ule;
1230 #pragma omp atomic compare
1231   if (ule < ulx)
1232     ulx = ule;
1233 
1234 #pragma omp atomic compare
1235   ulx = ulx == ule ? uld : ulx;
1236 #pragma omp atomic compare
1237   ulx = ule == ulx ? uld : ulx;
1238 #pragma omp atomic compare
1239   if (ulx == ule)
1240     ulx = uld;
1241 #pragma omp atomic compare
1242   if (ule == ulx)
1243     ulx = uld;
1244 
1245 #pragma omp atomic compare acq_rel
1246   lx = lx > le ? le : lx;
1247 #pragma omp atomic compare acq_rel
1248   lx = lx < le ? le : lx;
1249 #pragma omp atomic compare acq_rel
1250   lx = le > lx ? le : lx;
1251 #pragma omp atomic compare acq_rel
1252   lx = le < lx ? le : lx;
1253 #pragma omp atomic compare acq_rel
1254   if (lx > le)
1255     lx = le;
1256 #pragma omp atomic compare acq_rel
1257   if (lx < le)
1258     lx = le;
1259 #pragma omp atomic compare acq_rel
1260   if (le > lx)
1261     lx = le;
1262 #pragma omp atomic compare acq_rel
1263   if (le < lx)
1264     lx = le;
1265 
1266 #pragma omp atomic compare acq_rel
1267   lx = lx == le ? ld : lx;
1268 #pragma omp atomic compare acq_rel
1269   lx = le == lx ? ld : lx;
1270 #pragma omp atomic compare acq_rel
1271   if (lx == le)
1272     lx = ld;
1273 #pragma omp atomic compare acq_rel
1274   if (le == lx)
1275     lx = ld;
1276 
1277 #pragma omp atomic compare acq_rel
1278   ulx = ulx > ule ? ule : ulx;
1279 #pragma omp atomic compare acq_rel
1280   ulx = ulx < ule ? ule : ulx;
1281 #pragma omp atomic compare acq_rel
1282   ulx = ule > ulx ? ule : ulx;
1283 #pragma omp atomic compare acq_rel
1284   ulx = ule < ulx ? ule : ulx;
1285 #pragma omp atomic compare acq_rel
1286   if (ulx > ule)
1287     ulx = ule;
1288 #pragma omp atomic compare acq_rel
1289   if (ulx < ule)
1290     ulx = ule;
1291 #pragma omp atomic compare acq_rel
1292   if (ule > ulx)
1293     ulx = ule;
1294 #pragma omp atomic compare acq_rel
1295   if (ule < ulx)
1296     ulx = ule;
1297 
1298 #pragma omp atomic compare acq_rel
1299   ulx = ulx == ule ? uld : ulx;
1300 #pragma omp atomic compare acq_rel
1301   ulx = ule == ulx ? uld : ulx;
1302 #pragma omp atomic compare acq_rel
1303   if (ulx == ule)
1304     ulx = uld;
1305 #pragma omp atomic compare acq_rel
1306   if (ule == ulx)
1307     ulx = uld;
1308 
1309 #pragma omp atomic compare acquire
1310   lx = lx > le ? le : lx;
1311 #pragma omp atomic compare acquire
1312   lx = lx < le ? le : lx;
1313 #pragma omp atomic compare acquire
1314   lx = le > lx ? le : lx;
1315 #pragma omp atomic compare acquire
1316   lx = le < lx ? le : lx;
1317 #pragma omp atomic compare acquire
1318   if (lx > le)
1319     lx = le;
1320 #pragma omp atomic compare acquire
1321   if (lx < le)
1322     lx = le;
1323 #pragma omp atomic compare acquire
1324   if (le > lx)
1325     lx = le;
1326 #pragma omp atomic compare acquire
1327   if (le < lx)
1328     lx = le;
1329 
1330 #pragma omp atomic compare acquire
1331   lx = lx == le ? ld : lx;
1332 #pragma omp atomic compare acquire
1333   lx = le == lx ? ld : lx;
1334 #pragma omp atomic compare acquire
1335   if (lx == le)
1336     lx = ld;
1337 #pragma omp atomic compare acquire
1338   if (le == lx)
1339     lx = ld;
1340 
1341 #pragma omp atomic compare acquire
1342   ulx = ulx > ule ? ule : ulx;
1343 #pragma omp atomic compare acquire
1344   ulx = ulx < ule ? ule : ulx;
1345 #pragma omp atomic compare acquire
1346   ulx = ule > ulx ? ule : ulx;
1347 #pragma omp atomic compare acquire
1348   ulx = ule < ulx ? ule : ulx;
1349 #pragma omp atomic compare acquire
1350   if (ulx > ule)
1351     ulx = ule;
1352 #pragma omp atomic compare acquire
1353   if (ulx < ule)
1354     ulx = ule;
1355 #pragma omp atomic compare acquire
1356   if (ule > ulx)
1357     ulx = ule;
1358 #pragma omp atomic compare acquire
1359   if (ule < ulx)
1360     ulx = ule;
1361 
1362 #pragma omp atomic compare acquire
1363   ulx = ulx == ule ? uld : ulx;
1364 #pragma omp atomic compare acquire
1365   ulx = ule == ulx ? uld : ulx;
1366 #pragma omp atomic compare acquire
1367   if (ulx == ule)
1368     ulx = uld;
1369 #pragma omp atomic compare acquire
1370   if (ule == ulx)
1371     ulx = uld;
1372 
1373 #pragma omp atomic compare relaxed
1374   lx = lx > le ? le : lx;
1375 #pragma omp atomic compare relaxed
1376   lx = lx < le ? le : lx;
1377 #pragma omp atomic compare relaxed
1378   lx = le > lx ? le : lx;
1379 #pragma omp atomic compare relaxed
1380   lx = le < lx ? le : lx;
1381 #pragma omp atomic compare relaxed
1382   if (lx > le)
1383     lx = le;
1384 #pragma omp atomic compare relaxed
1385   if (lx < le)
1386     lx = le;
1387 #pragma omp atomic compare relaxed
1388   if (le > lx)
1389     lx = le;
1390 #pragma omp atomic compare relaxed
1391   if (le < lx)
1392     lx = le;
1393 
1394 #pragma omp atomic compare relaxed
1395   lx = lx == le ? ld : lx;
1396 #pragma omp atomic compare relaxed
1397   lx = le == lx ? ld : lx;
1398 #pragma omp atomic compare relaxed
1399   if (lx == le)
1400     lx = ld;
1401 #pragma omp atomic compare relaxed
1402   if (le == lx)
1403     lx = ld;
1404 
1405 #pragma omp atomic compare relaxed
1406   ulx = ulx > ule ? ule : ulx;
1407 #pragma omp atomic compare relaxed
1408   ulx = ulx < ule ? ule : ulx;
1409 #pragma omp atomic compare relaxed
1410   ulx = ule > ulx ? ule : ulx;
1411 #pragma omp atomic compare relaxed
1412   ulx = ule < ulx ? ule : ulx;
1413 #pragma omp atomic compare relaxed
1414   if (ulx > ule)
1415     ulx = ule;
1416 #pragma omp atomic compare relaxed
1417   if (ulx < ule)
1418     ulx = ule;
1419 #pragma omp atomic compare relaxed
1420   if (ule > ulx)
1421     ulx = ule;
1422 #pragma omp atomic compare relaxed
1423   if (ule < ulx)
1424     ulx = ule;
1425 
1426 #pragma omp atomic compare relaxed
1427   ulx = ulx == ule ? uld : ulx;
1428 #pragma omp atomic compare relaxed
1429   ulx = ule == ulx ? uld : ulx;
1430 #pragma omp atomic compare relaxed
1431   if (ulx == ule)
1432     ulx = uld;
1433 #pragma omp atomic compare relaxed
1434   if (ule == ulx)
1435     ulx = uld;
1436 
1437 #pragma omp atomic compare release
1438   lx = lx > le ? le : lx;
1439 #pragma omp atomic compare release
1440   lx = lx < le ? le : lx;
1441 #pragma omp atomic compare release
1442   lx = le > lx ? le : lx;
1443 #pragma omp atomic compare release
1444   lx = le < lx ? le : lx;
1445 #pragma omp atomic compare release
1446   if (lx > le)
1447     lx = le;
1448 #pragma omp atomic compare release
1449   if (lx < le)
1450     lx = le;
1451 #pragma omp atomic compare release
1452   if (le > lx)
1453     lx = le;
1454 #pragma omp atomic compare release
1455   if (le < lx)
1456     lx = le;
1457 
1458 #pragma omp atomic compare release
1459   lx = lx == le ? ld : lx;
1460 #pragma omp atomic compare release
1461   lx = le == lx ? ld : lx;
1462 #pragma omp atomic compare release
1463   if (lx == le)
1464     lx = ld;
1465 #pragma omp atomic compare release
1466   if (le == lx)
1467     lx = ld;
1468 
1469 #pragma omp atomic compare release
1470   ulx = ulx > ule ? ule : ulx;
1471 #pragma omp atomic compare release
1472   ulx = ulx < ule ? ule : ulx;
1473 #pragma omp atomic compare release
1474   ulx = ule > ulx ? ule : ulx;
1475 #pragma omp atomic compare release
1476   ulx = ule < ulx ? ule : ulx;
1477 #pragma omp atomic compare release
1478   if (ulx > ule)
1479     ulx = ule;
1480 #pragma omp atomic compare release
1481   if (ulx < ule)
1482     ulx = ule;
1483 #pragma omp atomic compare release
1484   if (ule > ulx)
1485     ulx = ule;
1486 #pragma omp atomic compare release
1487   if (ule < ulx)
1488     ulx = ule;
1489 
1490 #pragma omp atomic compare release
1491   ulx = ulx == ule ? uld : ulx;
1492 #pragma omp atomic compare release
1493   ulx = ule == ulx ? uld : ulx;
1494 #pragma omp atomic compare release
1495   if (ulx == ule)
1496     ulx = uld;
1497 #pragma omp atomic compare release
1498   if (ule == ulx)
1499     ulx = uld;
1500 
1501 #pragma omp atomic compare seq_cst
1502   lx = lx > le ? le : lx;
1503 #pragma omp atomic compare seq_cst
1504   lx = lx < le ? le : lx;
1505 #pragma omp atomic compare seq_cst
1506   lx = le > lx ? le : lx;
1507 #pragma omp atomic compare seq_cst
1508   lx = le < lx ? le : lx;
1509 #pragma omp atomic compare seq_cst
1510   if (lx > le)
1511     lx = le;
1512 #pragma omp atomic compare seq_cst
1513   if (lx < le)
1514     lx = le;
1515 #pragma omp atomic compare seq_cst
1516   if (le > lx)
1517     lx = le;
1518 #pragma omp atomic compare seq_cst
1519   if (le < lx)
1520     lx = le;
1521 
1522 #pragma omp atomic compare seq_cst
1523   lx = lx == le ? ld : lx;
1524 #pragma omp atomic compare seq_cst
1525   lx = le == lx ? ld : lx;
1526 #pragma omp atomic compare seq_cst
1527   if (lx == le)
1528     lx = ld;
1529 #pragma omp atomic compare seq_cst
1530   if (le == lx)
1531     lx = ld;
1532 
1533 #pragma omp atomic compare seq_cst
1534   ulx = ulx > ule ? ule : ulx;
1535 #pragma omp atomic compare seq_cst
1536   ulx = ulx < ule ? ule : ulx;
1537 #pragma omp atomic compare seq_cst
1538   ulx = ule > ulx ? ule : ulx;
1539 #pragma omp atomic compare seq_cst
1540   ulx = ule < ulx ? ule : ulx;
1541 #pragma omp atomic compare seq_cst
1542   if (ulx > ule)
1543     ulx = ule;
1544 #pragma omp atomic compare seq_cst
1545   if (ulx < ule)
1546     ulx = ule;
1547 #pragma omp atomic compare seq_cst
1548   if (ule > ulx)
1549     ulx = ule;
1550 #pragma omp atomic compare seq_cst
1551   if (ule < ulx)
1552     ulx = ule;
1553 
1554 #pragma omp atomic compare seq_cst
1555   ulx = ulx == ule ? uld : ulx;
1556 #pragma omp atomic compare seq_cst
1557   ulx = ule == ulx ? uld : ulx;
1558 #pragma omp atomic compare seq_cst
1559   if (ulx == ule)
1560     ulx = uld;
1561 #pragma omp atomic compare seq_cst
1562   if (ule == ulx)
1563     ulx = uld;
1564 
1565 #pragma omp atomic compare
1566   llx = llx > lle ? lle : llx;
1567 #pragma omp atomic compare
1568   llx = llx < lle ? lle : llx;
1569 #pragma omp atomic compare
1570   llx = lle > llx ? lle : llx;
1571 #pragma omp atomic compare
1572   llx = lle < llx ? lle : llx;
1573 #pragma omp atomic compare
1574   if (llx > lle)
1575     llx = lle;
1576 #pragma omp atomic compare
1577   if (llx < lle)
1578     llx = lle;
1579 #pragma omp atomic compare
1580   if (lle > llx)
1581     llx = lle;
1582 #pragma omp atomic compare
1583   if (lle < llx)
1584     llx = lle;
1585 
1586 #pragma omp atomic compare
1587   llx = llx == lle ? lld : llx;
1588 #pragma omp atomic compare
1589   llx = lle == llx ? lld : llx;
1590 #pragma omp atomic compare
1591   if (llx == lle)
1592     llx = lld;
1593 #pragma omp atomic compare
1594   if (lle == llx)
1595     llx = lld;
1596 
1597 #pragma omp atomic compare
1598   ullx = ullx > ulle ? ulle : ullx;
1599 #pragma omp atomic compare
1600   ullx = ullx < ulle ? ulle : ullx;
1601 #pragma omp atomic compare
1602   ullx = ulle > ullx ? ulle : ullx;
1603 #pragma omp atomic compare
1604   ullx = ulle < ullx ? ulle : ullx;
1605 #pragma omp atomic compare
1606   if (ullx > ulle)
1607     ullx = ulle;
1608 #pragma omp atomic compare
1609   if (ullx < ulle)
1610     ullx = ulle;
1611 #pragma omp atomic compare
1612   if (ulle > ullx)
1613     ullx = ulle;
1614 #pragma omp atomic compare
1615   if (ulle < ullx)
1616     ullx = ulle;
1617 
1618 #pragma omp atomic compare
1619   ullx = ullx == ulle ? ulld : ullx;
1620 #pragma omp atomic compare
1621   ullx = ulle == ullx ? ulld : ullx;
1622 #pragma omp atomic compare
1623   if (ullx == ulle)
1624     ullx = ulld;
1625 #pragma omp atomic compare
1626   if (ulle == ullx)
1627     ullx = ulld;
1628 
1629 #pragma omp atomic compare acq_rel
1630   llx = llx > lle ? lle : llx;
1631 #pragma omp atomic compare acq_rel
1632   llx = llx < lle ? lle : llx;
1633 #pragma omp atomic compare acq_rel
1634   llx = lle > llx ? lle : llx;
1635 #pragma omp atomic compare acq_rel
1636   llx = lle < llx ? lle : llx;
1637 #pragma omp atomic compare acq_rel
1638   if (llx > lle)
1639     llx = lle;
1640 #pragma omp atomic compare acq_rel
1641   if (llx < lle)
1642     llx = lle;
1643 #pragma omp atomic compare acq_rel
1644   if (lle > llx)
1645     llx = lle;
1646 #pragma omp atomic compare acq_rel
1647   if (lle < llx)
1648     llx = lle;
1649 
1650 #pragma omp atomic compare acq_rel
1651   llx = llx == lle ? lld : llx;
1652 #pragma omp atomic compare acq_rel
1653   llx = lle == llx ? lld : llx;
1654 #pragma omp atomic compare acq_rel
1655   if (llx == lle)
1656     llx = lld;
1657 #pragma omp atomic compare acq_rel
1658   if (lle == llx)
1659     llx = lld;
1660 
1661 #pragma omp atomic compare acq_rel
1662   ullx = ullx > ulle ? ulle : ullx;
1663 #pragma omp atomic compare acq_rel
1664   ullx = ullx < ulle ? ulle : ullx;
1665 #pragma omp atomic compare acq_rel
1666   ullx = ulle > ullx ? ulle : ullx;
1667 #pragma omp atomic compare acq_rel
1668   ullx = ulle < ullx ? ulle : ullx;
1669 #pragma omp atomic compare acq_rel
1670   if (ullx > ulle)
1671     ullx = ulle;
1672 #pragma omp atomic compare acq_rel
1673   if (ullx < ulle)
1674     ullx = ulle;
1675 #pragma omp atomic compare acq_rel
1676   if (ulle > ullx)
1677     ullx = ulle;
1678 #pragma omp atomic compare acq_rel
1679   if (ulle < ullx)
1680     ullx = ulle;
1681 
1682 #pragma omp atomic compare acq_rel
1683   ullx = ullx == ulle ? ulld : ullx;
1684 #pragma omp atomic compare acq_rel
1685   ullx = ulle == ullx ? ulld : ullx;
1686 #pragma omp atomic compare acq_rel
1687   if (ullx == ulle)
1688     ullx = ulld;
1689 #pragma omp atomic compare acq_rel
1690   if (ulle == ullx)
1691     ullx = ulld;
1692 
1693 #pragma omp atomic compare acquire
1694   llx = llx > lle ? lle : llx;
1695 #pragma omp atomic compare acquire
1696   llx = llx < lle ? lle : llx;
1697 #pragma omp atomic compare acquire
1698   llx = lle > llx ? lle : llx;
1699 #pragma omp atomic compare acquire
1700   llx = lle < llx ? lle : llx;
1701 #pragma omp atomic compare acquire
1702   if (llx > lle)
1703     llx = lle;
1704 #pragma omp atomic compare acquire
1705   if (llx < lle)
1706     llx = lle;
1707 #pragma omp atomic compare acquire
1708   if (lle > llx)
1709     llx = lle;
1710 #pragma omp atomic compare acquire
1711   if (lle < llx)
1712     llx = lle;
1713 
1714 #pragma omp atomic compare acquire
1715   llx = llx == lle ? lld : llx;
1716 #pragma omp atomic compare acquire
1717   llx = lle == llx ? lld : llx;
1718 #pragma omp atomic compare acquire
1719   if (llx == lle)
1720     llx = lld;
1721 #pragma omp atomic compare acquire
1722   if (lle == llx)
1723     llx = lld;
1724 
1725 #pragma omp atomic compare acquire
1726   ullx = ullx > ulle ? ulle : ullx;
1727 #pragma omp atomic compare acquire
1728   ullx = ullx < ulle ? ulle : ullx;
1729 #pragma omp atomic compare acquire
1730   ullx = ulle > ullx ? ulle : ullx;
1731 #pragma omp atomic compare acquire
1732   ullx = ulle < ullx ? ulle : ullx;
1733 #pragma omp atomic compare acquire
1734   if (ullx > ulle)
1735     ullx = ulle;
1736 #pragma omp atomic compare acquire
1737   if (ullx < ulle)
1738     ullx = ulle;
1739 #pragma omp atomic compare acquire
1740   if (ulle > ullx)
1741     ullx = ulle;
1742 #pragma omp atomic compare acquire
1743   if (ulle < ullx)
1744     ullx = ulle;
1745 
1746 #pragma omp atomic compare acquire
1747   ullx = ullx == ulle ? ulld : ullx;
1748 #pragma omp atomic compare acquire
1749   ullx = ulle == ullx ? ulld : ullx;
1750 #pragma omp atomic compare acquire
1751   if (ullx == ulle)
1752     ullx = ulld;
1753 #pragma omp atomic compare acquire
1754   if (ulle == ullx)
1755     ullx = ulld;
1756 
1757 #pragma omp atomic compare relaxed
1758   llx = llx > lle ? lle : llx;
1759 #pragma omp atomic compare relaxed
1760   llx = llx < lle ? lle : llx;
1761 #pragma omp atomic compare relaxed
1762   llx = lle > llx ? lle : llx;
1763 #pragma omp atomic compare relaxed
1764   llx = lle < llx ? lle : llx;
1765 #pragma omp atomic compare relaxed
1766   if (llx > lle)
1767     llx = lle;
1768 #pragma omp atomic compare relaxed
1769   if (llx < lle)
1770     llx = lle;
1771 #pragma omp atomic compare relaxed
1772   if (lle > llx)
1773     llx = lle;
1774 #pragma omp atomic compare relaxed
1775   if (lle < llx)
1776     llx = lle;
1777 
1778 #pragma omp atomic compare relaxed
1779   llx = llx == lle ? lld : llx;
1780 #pragma omp atomic compare relaxed
1781   llx = lle == llx ? lld : llx;
1782 #pragma omp atomic compare relaxed
1783   if (llx == lle)
1784     llx = lld;
1785 #pragma omp atomic compare relaxed
1786   if (lle == llx)
1787     llx = lld;
1788 
1789 #pragma omp atomic compare relaxed
1790   ullx = ullx > ulle ? ulle : ullx;
1791 #pragma omp atomic compare relaxed
1792   ullx = ullx < ulle ? ulle : ullx;
1793 #pragma omp atomic compare relaxed
1794   ullx = ulle > ullx ? ulle : ullx;
1795 #pragma omp atomic compare relaxed
1796   ullx = ulle < ullx ? ulle : ullx;
1797 #pragma omp atomic compare relaxed
1798   if (ullx > ulle)
1799     ullx = ulle;
1800 #pragma omp atomic compare relaxed
1801   if (ullx < ulle)
1802     ullx = ulle;
1803 #pragma omp atomic compare relaxed
1804   if (ulle > ullx)
1805     ullx = ulle;
1806 #pragma omp atomic compare relaxed
1807   if (ulle < ullx)
1808     ullx = ulle;
1809 
1810 #pragma omp atomic compare relaxed
1811   ullx = ullx == ulle ? ulld : ullx;
1812 #pragma omp atomic compare relaxed
1813   ullx = ulle == ullx ? ulld : ullx;
1814 #pragma omp atomic compare relaxed
1815   if (ullx == ulle)
1816     ullx = ulld;
1817 #pragma omp atomic compare relaxed
1818   if (ulle == ullx)
1819     ullx = ulld;
1820 
1821 #pragma omp atomic compare release
1822   llx = llx > lle ? lle : llx;
1823 #pragma omp atomic compare release
1824   llx = llx < lle ? lle : llx;
1825 #pragma omp atomic compare release
1826   llx = lle > llx ? lle : llx;
1827 #pragma omp atomic compare release
1828   llx = lle < llx ? lle : llx;
1829 #pragma omp atomic compare release
1830   if (llx > lle)
1831     llx = lle;
1832 #pragma omp atomic compare release
1833   if (llx < lle)
1834     llx = lle;
1835 #pragma omp atomic compare release
1836   if (lle > llx)
1837     llx = lle;
1838 #pragma omp atomic compare release
1839   if (lle < llx)
1840     llx = lle;
1841 
1842 #pragma omp atomic compare release
1843   llx = llx == lle ? lld : llx;
1844 #pragma omp atomic compare release
1845   llx = lle == llx ? lld : llx;
1846 #pragma omp atomic compare release
1847   if (llx == lle)
1848     llx = lld;
1849 #pragma omp atomic compare release
1850   if (lle == llx)
1851     llx = lld;
1852 
1853 #pragma omp atomic compare release
1854   ullx = ullx > ulle ? ulle : ullx;
1855 #pragma omp atomic compare release
1856   ullx = ullx < ulle ? ulle : ullx;
1857 #pragma omp atomic compare release
1858   ullx = ulle > ullx ? ulle : ullx;
1859 #pragma omp atomic compare release
1860   ullx = ulle < ullx ? ulle : ullx;
1861 #pragma omp atomic compare release
1862   if (ullx > ulle)
1863     ullx = ulle;
1864 #pragma omp atomic compare release
1865   if (ullx < ulle)
1866     ullx = ulle;
1867 #pragma omp atomic compare release
1868   if (ulle > ullx)
1869     ullx = ulle;
1870 #pragma omp atomic compare release
1871   if (ulle < ullx)
1872     ullx = ulle;
1873 
1874 #pragma omp atomic compare release
1875   ullx = ullx == ulle ? ulld : ullx;
1876 #pragma omp atomic compare release
1877   ullx = ulle == ullx ? ulld : ullx;
1878 #pragma omp atomic compare release
1879   if (ullx == ulle)
1880     ullx = ulld;
1881 #pragma omp atomic compare release
1882   if (ulle == ullx)
1883     ullx = ulld;
1884 
1885 #pragma omp atomic compare seq_cst
1886   llx = llx > lle ? lle : llx;
1887 #pragma omp atomic compare seq_cst
1888   llx = llx < lle ? lle : llx;
1889 #pragma omp atomic compare seq_cst
1890   llx = lle > llx ? lle : llx;
1891 #pragma omp atomic compare seq_cst
1892   llx = lle < llx ? lle : llx;
1893 #pragma omp atomic compare seq_cst
1894   if (llx > lle)
1895     llx = lle;
1896 #pragma omp atomic compare seq_cst
1897   if (llx < lle)
1898     llx = lle;
1899 #pragma omp atomic compare seq_cst
1900   if (lle > llx)
1901     llx = lle;
1902 #pragma omp atomic compare seq_cst
1903   if (lle < llx)
1904     llx = lle;
1905 
1906 #pragma omp atomic compare seq_cst
1907   llx = llx == lle ? lld : llx;
1908 #pragma omp atomic compare seq_cst
1909   llx = lle == llx ? lld : llx;
1910 #pragma omp atomic compare seq_cst
1911   if (llx == lle)
1912     llx = lld;
1913 #pragma omp atomic compare seq_cst
1914   if (lle == llx)
1915     llx = lld;
1916 
1917 #pragma omp atomic compare seq_cst
1918   ullx = ullx > ulle ? ulle : ullx;
1919 #pragma omp atomic compare seq_cst
1920   ullx = ullx < ulle ? ulle : ullx;
1921 #pragma omp atomic compare seq_cst
1922   ullx = ulle > ullx ? ulle : ullx;
1923 #pragma omp atomic compare seq_cst
1924   ullx = ulle < ullx ? ulle : ullx;
1925 #pragma omp atomic compare seq_cst
1926   if (ullx > ulle)
1927     ullx = ulle;
1928 #pragma omp atomic compare seq_cst
1929   if (ullx < ulle)
1930     ullx = ulle;
1931 #pragma omp atomic compare seq_cst
1932   if (ulle > ullx)
1933     ullx = ulle;
1934 #pragma omp atomic compare seq_cst
1935   if (ulle < ullx)
1936     ullx = ulle;
1937 
1938 #pragma omp atomic compare seq_cst
1939   ullx = ullx == ulle ? ulld : ullx;
1940 #pragma omp atomic compare seq_cst
1941   ullx = ulle == ullx ? ulld : ullx;
1942 #pragma omp atomic compare seq_cst
1943   if (ullx == ulle)
1944     ullx = ulld;
1945 #pragma omp atomic compare seq_cst
1946   if (ulle == ullx)
1947     ullx = ulld;
1948 
1949 #pragma omp atomic compare
1950   fx = fx > fe ? fe : fx;
1951 #pragma omp atomic compare
1952   fx = fx < fe ? fe : fx;
1953 #pragma omp atomic compare
1954   fx = fe > fx ? fe : fx;
1955 #pragma omp atomic compare
1956   fx = fe < fx ? fe : fx;
1957 #pragma omp atomic compare
1958   if (fx > fe)
1959     fx = fe;
1960 #pragma omp atomic compare
1961   if (fx < fe)
1962     fx = fe;
1963 #pragma omp atomic compare
1964   if (fe > fx)
1965     fx = fe;
1966 #pragma omp atomic compare
1967   if (fe < fx)
1968     fx = fe;
1969 
1970 #pragma omp atomic compare acq_rel
1971   fx = fx > fe ? fe : fx;
1972 #pragma omp atomic compare acq_rel
1973   fx = fx < fe ? fe : fx;
1974 #pragma omp atomic compare acq_rel
1975   fx = fe > fx ? fe : fx;
1976 #pragma omp atomic compare acq_rel
1977   fx = fe < fx ? fe : fx;
1978 #pragma omp atomic compare acq_rel
1979   if (fx > fe)
1980     fx = fe;
1981 #pragma omp atomic compare acq_rel
1982   if (fx < fe)
1983     fx = fe;
1984 #pragma omp atomic compare acq_rel
1985   if (fe > fx)
1986     fx = fe;
1987 #pragma omp atomic compare acq_rel
1988   if (fe < fx)
1989     fx = fe;
1990 
1991 #pragma omp atomic compare acquire
1992   fx = fx > fe ? fe : fx;
1993 #pragma omp atomic compare acquire
1994   fx = fx < fe ? fe : fx;
1995 #pragma omp atomic compare acquire
1996   fx = fe > fx ? fe : fx;
1997 #pragma omp atomic compare acquire
1998   fx = fe < fx ? fe : fx;
1999 #pragma omp atomic compare acquire
2000   if (fx > fe)
2001     fx = fe;
2002 #pragma omp atomic compare acquire
2003   if (fx < fe)
2004     fx = fe;
2005 #pragma omp atomic compare acquire
2006   if (fe > fx)
2007     fx = fe;
2008 #pragma omp atomic compare acquire
2009   if (fe < fx)
2010     fx = fe;
2011 
2012 #pragma omp atomic compare relaxed
2013   fx = fx > fe ? fe : fx;
2014 #pragma omp atomic compare relaxed
2015   fx = fx < fe ? fe : fx;
2016 #pragma omp atomic compare relaxed
2017   fx = fe > fx ? fe : fx;
2018 #pragma omp atomic compare relaxed
2019   fx = fe < fx ? fe : fx;
2020 #pragma omp atomic compare relaxed
2021   if (fx > fe)
2022     fx = fe;
2023 #pragma omp atomic compare relaxed
2024   if (fx < fe)
2025     fx = fe;
2026 #pragma omp atomic compare relaxed
2027   if (fe > fx)
2028     fx = fe;
2029 #pragma omp atomic compare relaxed
2030   if (fe < fx)
2031     fx = fe;
2032 
2033 #pragma omp atomic compare release
2034   fx = fx > fe ? fe : fx;
2035 #pragma omp atomic compare release
2036   fx = fx < fe ? fe : fx;
2037 #pragma omp atomic compare release
2038   fx = fe > fx ? fe : fx;
2039 #pragma omp atomic compare release
2040   fx = fe < fx ? fe : fx;
2041 #pragma omp atomic compare release
2042   if (fx > fe)
2043     fx = fe;
2044 #pragma omp atomic compare release
2045   if (fx < fe)
2046     fx = fe;
2047 #pragma omp atomic compare release
2048   if (fe > fx)
2049     fx = fe;
2050 #pragma omp atomic compare release
2051   if (fe < fx)
2052     fx = fe;
2053 
2054 #pragma omp atomic compare seq_cst
2055   fx = fx > fe ? fe : fx;
2056 #pragma omp atomic compare seq_cst
2057   fx = fx < fe ? fe : fx;
2058 #pragma omp atomic compare seq_cst
2059   fx = fe > fx ? fe : fx;
2060 #pragma omp atomic compare seq_cst
2061   fx = fe < fx ? fe : fx;
2062 #pragma omp atomic compare seq_cst
2063   if (fx > fe)
2064     fx = fe;
2065 #pragma omp atomic compare seq_cst
2066   if (fx < fe)
2067     fx = fe;
2068 #pragma omp atomic compare seq_cst
2069   if (fe > fx)
2070     fx = fe;
2071 #pragma omp atomic compare seq_cst
2072   if (fe < fx)
2073     fx = fe;
2074 
2075 #pragma omp atomic compare
2076   dx = dx > de ? de : dx;
2077 #pragma omp atomic compare
2078   dx = dx < de ? de : dx;
2079 #pragma omp atomic compare
2080   dx = de > dx ? de : dx;
2081 #pragma omp atomic compare
2082   dx = de < dx ? de : dx;
2083 #pragma omp atomic compare
2084   if (dx > de)
2085     dx = de;
2086 #pragma omp atomic compare
2087   if (dx < de)
2088     dx = de;
2089 #pragma omp atomic compare
2090   if (de > dx)
2091     dx = de;
2092 #pragma omp atomic compare
2093   if (de < dx)
2094     dx = de;
2095 
2096 #pragma omp atomic compare acq_rel
2097   dx = dx > de ? de : dx;
2098 #pragma omp atomic compare acq_rel
2099   dx = dx < de ? de : dx;
2100 #pragma omp atomic compare acq_rel
2101   dx = de > dx ? de : dx;
2102 #pragma omp atomic compare acq_rel
2103   dx = de < dx ? de : dx;
2104 #pragma omp atomic compare acq_rel
2105   if (dx > de)
2106     dx = de;
2107 #pragma omp atomic compare acq_rel
2108   if (dx < de)
2109     dx = de;
2110 #pragma omp atomic compare acq_rel
2111   if (de > dx)
2112     dx = de;
2113 #pragma omp atomic compare acq_rel
2114   if (de < dx)
2115     dx = de;
2116 
2117 #pragma omp atomic compare acquire
2118   dx = dx > de ? de : dx;
2119 #pragma omp atomic compare acquire
2120   dx = dx < de ? de : dx;
2121 #pragma omp atomic compare acquire
2122   dx = de > dx ? de : dx;
2123 #pragma omp atomic compare acquire
2124   dx = de < dx ? de : dx;
2125 #pragma omp atomic compare acquire
2126   if (dx > de)
2127     dx = de;
2128 #pragma omp atomic compare acquire
2129   if (dx < de)
2130     dx = de;
2131 #pragma omp atomic compare acquire
2132   if (de > dx)
2133     dx = de;
2134 #pragma omp atomic compare acquire
2135   if (de < dx)
2136     dx = de;
2137 
2138 #pragma omp atomic compare relaxed
2139   dx = dx > de ? de : dx;
2140 #pragma omp atomic compare relaxed
2141   dx = dx < de ? de : dx;
2142 #pragma omp atomic compare relaxed
2143   dx = de > dx ? de : dx;
2144 #pragma omp atomic compare relaxed
2145   dx = de < dx ? de : dx;
2146 #pragma omp atomic compare relaxed
2147   if (dx > de)
2148     dx = de;
2149 #pragma omp atomic compare relaxed
2150   if (dx < de)
2151     dx = de;
2152 #pragma omp atomic compare relaxed
2153   if (de > dx)
2154     dx = de;
2155 #pragma omp atomic compare relaxed
2156   if (de < dx)
2157     dx = de;
2158 
2159 #pragma omp atomic compare release
2160   dx = dx > de ? de : dx;
2161 #pragma omp atomic compare release
2162   dx = dx < de ? de : dx;
2163 #pragma omp atomic compare release
2164   dx = de > dx ? de : dx;
2165 #pragma omp atomic compare release
2166   dx = de < dx ? de : dx;
2167 #pragma omp atomic compare release
2168   if (dx > de)
2169     dx = de;
2170 #pragma omp atomic compare release
2171   if (dx < de)
2172     dx = de;
2173 #pragma omp atomic compare release
2174   if (de > dx)
2175     dx = de;
2176 #pragma omp atomic compare release
2177   if (de < dx)
2178     dx = de;
2179 
2180 #pragma omp atomic compare seq_cst
2181   dx = dx > de ? de : dx;
2182 #pragma omp atomic compare seq_cst
2183   dx = dx < de ? de : dx;
2184 #pragma omp atomic compare seq_cst
2185   dx = de > dx ? de : dx;
2186 #pragma omp atomic compare seq_cst
2187   dx = de < dx ? de : dx;
2188 #pragma omp atomic compare seq_cst
2189   if (dx > de)
2190     dx = de;
2191 #pragma omp atomic compare seq_cst
2192   if (dx < de)
2193     dx = de;
2194 #pragma omp atomic compare seq_cst
2195   if (de > dx)
2196     dx = de;
2197 #pragma omp atomic compare seq_cst
2198   if (de < dx)
2199     dx = de;
2200 }
2201 
2202 void bar() {
2203   char cx, cv, cr, ce, cd;
2204   unsigned char ucx, ucv, ucr, uce, ucd;
2205   short sx, sv, sr, se, sd;
2206   unsigned short usx, usv, usr, use, usd;
2207   int ix, iv, ir, ie, id;
2208   unsigned int uix, uiv, uir, uie, uid;
2209   long lx, lv, lr, le, ld;
2210   unsigned long ulx, ulv, ulr, ule, uld;
2211   long long llx, llv, llr, lle, lld;
2212   unsigned long long ullx, ullv, ullr, ulle, ulld;
2213   float fx, fv, fe, fd;
2214   double dx, dv, de, dd;
2215 
2216 #pragma omp atomic compare capture
2217   {
2218     cv = cx;
2219     if (ce > cx) {
2220       cx = ce;
2221     }
2222   }
2223 #pragma omp atomic compare capture
2224   {
2225     cv = cx;
2226     if (cx > ce) {
2227       cx = ce;
2228     }
2229   }
2230 #pragma omp atomic compare capture
2231   {
2232     cv = cx;
2233     if (ce < cx) {
2234       cx = ce;
2235     }
2236   }
2237 #pragma omp atomic compare capture
2238   {
2239     cv = cx;
2240     if (cx < ce) {
2241       cx = ce;
2242     }
2243   }
2244 #pragma omp atomic compare capture
2245   {
2246     cv = cx;
2247     if (cx == ce) {
2248       cx = cd;
2249     }
2250   }
2251 #pragma omp atomic compare capture
2252   {
2253     cv = cx;
2254     if (ce == cx) {
2255       cx = cd;
2256     }
2257   }
2258 #pragma omp atomic compare capture
2259   {
2260     if (ce > cx) {
2261       cx = ce;
2262     }
2263     cv = cx;
2264   }
2265 #pragma omp atomic compare capture
2266   {
2267     if (cx > ce) {
2268       cx = ce;
2269     }
2270     cv = cx;
2271   }
2272 #pragma omp atomic compare capture
2273   {
2274     if (ce < cx) {
2275       cx = ce;
2276     }
2277     cv = cx;
2278   }
2279 #pragma omp atomic compare capture
2280   {
2281     if (cx < ce) {
2282       cx = ce;
2283     }
2284     cv = cx;
2285   }
2286 #pragma omp atomic compare capture
2287   {
2288     if (cx == ce) {
2289       cx = cd;
2290     }
2291     cv = cx;
2292   }
2293 #pragma omp atomic compare capture
2294   {
2295     if (ce == cx) {
2296       cx = cd;
2297     }
2298     cv = cx;
2299   }
2300 #pragma omp atomic compare capture
2301   if (cx == ce) {
2302     cx = cd;
2303   } else {
2304     cv = cx;
2305   }
2306 #pragma omp atomic compare capture
2307   if (ce == cx) {
2308     cx = cd;
2309   } else {
2310     cv = cx;
2311   }
2312 #pragma omp atomic compare capture
2313   {
2314     cr = cx == ce;
2315     if (cr) {
2316       cx = cd;
2317     }
2318   }
2319 #pragma omp atomic compare capture
2320   {
2321     cr = ce == cx;
2322     if (cr) {
2323       cx = cd;
2324     }
2325   }
2326 #pragma omp atomic compare capture
2327   {
2328     cr = cx == ce;
2329     if (cr) {
2330       cx = cd;
2331     } else {
2332       cv = cx;
2333     }
2334   }
2335 #pragma omp atomic compare capture
2336   {
2337     cr = ce == cx;
2338     if (cr) {
2339       cx = cd;
2340     } else {
2341       cv = cx;
2342     }
2343   }
2344 
2345 #pragma omp atomic compare capture acq_rel
2346   {
2347     cv = cx;
2348     if (ce > cx) {
2349       cx = ce;
2350     }
2351   }
2352 #pragma omp atomic compare capture acq_rel
2353   {
2354     cv = cx;
2355     if (cx > ce) {
2356       cx = ce;
2357     }
2358   }
2359 #pragma omp atomic compare capture acq_rel
2360   {
2361     cv = cx;
2362     if (ce < cx) {
2363       cx = ce;
2364     }
2365   }
2366 #pragma omp atomic compare capture acq_rel
2367   {
2368     cv = cx;
2369     if (cx < ce) {
2370       cx = ce;
2371     }
2372   }
2373 #pragma omp atomic compare capture acq_rel
2374   {
2375     cv = cx;
2376     if (cx == ce) {
2377       cx = cd;
2378     }
2379   }
2380 #pragma omp atomic compare capture acq_rel
2381   {
2382     cv = cx;
2383     if (ce == cx) {
2384       cx = cd;
2385     }
2386   }
2387 #pragma omp atomic compare capture acq_rel
2388   {
2389     if (ce > cx) {
2390       cx = ce;
2391     }
2392     cv = cx;
2393   }
2394 #pragma omp atomic compare capture acq_rel
2395   {
2396     if (cx > ce) {
2397       cx = ce;
2398     }
2399     cv = cx;
2400   }
2401 #pragma omp atomic compare capture acq_rel
2402   {
2403     if (ce < cx) {
2404       cx = ce;
2405     }
2406     cv = cx;
2407   }
2408 #pragma omp atomic compare capture acq_rel
2409   {
2410     if (cx < ce) {
2411       cx = ce;
2412     }
2413     cv = cx;
2414   }
2415 #pragma omp atomic compare capture acq_rel
2416   {
2417     if (cx == ce) {
2418       cx = cd;
2419     }
2420     cv = cx;
2421   }
2422 #pragma omp atomic compare capture acq_rel
2423   {
2424     if (ce == cx) {
2425       cx = cd;
2426     }
2427     cv = cx;
2428   }
2429 #pragma omp atomic compare capture acq_rel
2430   if (cx == ce) {
2431     cx = cd;
2432   } else {
2433     cv = cx;
2434   }
2435 #pragma omp atomic compare capture acq_rel
2436   if (ce == cx) {
2437     cx = cd;
2438   } else {
2439     cv = cx;
2440   }
2441 #pragma omp atomic compare capture acq_rel
2442   {
2443     cr = cx == ce;
2444     if (cr) {
2445       cx = cd;
2446     }
2447   }
2448 #pragma omp atomic compare capture acq_rel
2449   {
2450     cr = ce == cx;
2451     if (cr) {
2452       cx = cd;
2453     }
2454   }
2455 #pragma omp atomic compare capture acq_rel
2456   {
2457     cr = cx == ce;
2458     if (cr) {
2459       cx = cd;
2460     } else {
2461       cv = cx;
2462     }
2463   }
2464 #pragma omp atomic compare capture acq_rel
2465   {
2466     cr = ce == cx;
2467     if (cr) {
2468       cx = cd;
2469     } else {
2470       cv = cx;
2471     }
2472   }
2473 
2474 #pragma omp atomic compare capture acquire
2475   {
2476     cv = cx;
2477     if (ce > cx) {
2478       cx = ce;
2479     }
2480   }
2481 #pragma omp atomic compare capture acquire
2482   {
2483     cv = cx;
2484     if (cx > ce) {
2485       cx = ce;
2486     }
2487   }
2488 #pragma omp atomic compare capture acquire
2489   {
2490     cv = cx;
2491     if (ce < cx) {
2492       cx = ce;
2493     }
2494   }
2495 #pragma omp atomic compare capture acquire
2496   {
2497     cv = cx;
2498     if (cx < ce) {
2499       cx = ce;
2500     }
2501   }
2502 #pragma omp atomic compare capture acquire
2503   {
2504     cv = cx;
2505     if (cx == ce) {
2506       cx = cd;
2507     }
2508   }
2509 #pragma omp atomic compare capture acquire
2510   {
2511     cv = cx;
2512     if (ce == cx) {
2513       cx = cd;
2514     }
2515   }
2516 #pragma omp atomic compare capture acquire
2517   {
2518     if (ce > cx) {
2519       cx = ce;
2520     }
2521     cv = cx;
2522   }
2523 #pragma omp atomic compare capture acquire
2524   {
2525     if (cx > ce) {
2526       cx = ce;
2527     }
2528     cv = cx;
2529   }
2530 #pragma omp atomic compare capture acquire
2531   {
2532     if (ce < cx) {
2533       cx = ce;
2534     }
2535     cv = cx;
2536   }
2537 #pragma omp atomic compare capture acquire
2538   {
2539     if (cx < ce) {
2540       cx = ce;
2541     }
2542     cv = cx;
2543   }
2544 #pragma omp atomic compare capture acquire
2545   {
2546     if (cx == ce) {
2547       cx = cd;
2548     }
2549     cv = cx;
2550   }
2551 #pragma omp atomic compare capture acquire
2552   {
2553     if (ce == cx) {
2554       cx = cd;
2555     }
2556     cv = cx;
2557   }
2558 #pragma omp atomic compare capture acquire
2559   if (cx == ce) {
2560     cx = cd;
2561   } else {
2562     cv = cx;
2563   }
2564 #pragma omp atomic compare capture acquire
2565   if (ce == cx) {
2566     cx = cd;
2567   } else {
2568     cv = cx;
2569   }
2570 #pragma omp atomic compare capture acquire
2571   {
2572     cr = cx == ce;
2573     if (cr) {
2574       cx = cd;
2575     }
2576   }
2577 #pragma omp atomic compare capture acquire
2578   {
2579     cr = ce == cx;
2580     if (cr) {
2581       cx = cd;
2582     }
2583   }
2584 #pragma omp atomic compare capture acquire
2585   {
2586     cr = cx == ce;
2587     if (cr) {
2588       cx = cd;
2589     } else {
2590       cv = cx;
2591     }
2592   }
2593 #pragma omp atomic compare capture acquire
2594   {
2595     cr = ce == cx;
2596     if (cr) {
2597       cx = cd;
2598     } else {
2599       cv = cx;
2600     }
2601   }
2602 
2603 #pragma omp atomic compare capture relaxed
2604   {
2605     cv = cx;
2606     if (ce > cx) {
2607       cx = ce;
2608     }
2609   }
2610 #pragma omp atomic compare capture relaxed
2611   {
2612     cv = cx;
2613     if (cx > ce) {
2614       cx = ce;
2615     }
2616   }
2617 #pragma omp atomic compare capture relaxed
2618   {
2619     cv = cx;
2620     if (ce < cx) {
2621       cx = ce;
2622     }
2623   }
2624 #pragma omp atomic compare capture relaxed
2625   {
2626     cv = cx;
2627     if (cx < ce) {
2628       cx = ce;
2629     }
2630   }
2631 #pragma omp atomic compare capture relaxed
2632   {
2633     cv = cx;
2634     if (cx == ce) {
2635       cx = cd;
2636     }
2637   }
2638 #pragma omp atomic compare capture relaxed
2639   {
2640     cv = cx;
2641     if (ce == cx) {
2642       cx = cd;
2643     }
2644   }
2645 #pragma omp atomic compare capture relaxed
2646   {
2647     if (ce > cx) {
2648       cx = ce;
2649     }
2650     cv = cx;
2651   }
2652 #pragma omp atomic compare capture relaxed
2653   {
2654     if (cx > ce) {
2655       cx = ce;
2656     }
2657     cv = cx;
2658   }
2659 #pragma omp atomic compare capture relaxed
2660   {
2661     if (ce < cx) {
2662       cx = ce;
2663     }
2664     cv = cx;
2665   }
2666 #pragma omp atomic compare capture relaxed
2667   {
2668     if (cx < ce) {
2669       cx = ce;
2670     }
2671     cv = cx;
2672   }
2673 #pragma omp atomic compare capture relaxed
2674   {
2675     if (cx == ce) {
2676       cx = cd;
2677     }
2678     cv = cx;
2679   }
2680 #pragma omp atomic compare capture relaxed
2681   {
2682     if (ce == cx) {
2683       cx = cd;
2684     }
2685     cv = cx;
2686   }
2687 #pragma omp atomic compare capture relaxed
2688   if (cx == ce) {
2689     cx = cd;
2690   } else {
2691     cv = cx;
2692   }
2693 #pragma omp atomic compare capture relaxed
2694   if (ce == cx) {
2695     cx = cd;
2696   } else {
2697     cv = cx;
2698   }
2699 #pragma omp atomic compare capture relaxed
2700   {
2701     cr = cx == ce;
2702     if (cr) {
2703       cx = cd;
2704     }
2705   }
2706 #pragma omp atomic compare capture relaxed
2707   {
2708     cr = ce == cx;
2709     if (cr) {
2710       cx = cd;
2711     }
2712   }
2713 #pragma omp atomic compare capture relaxed
2714   {
2715     cr = cx == ce;
2716     if (cr) {
2717       cx = cd;
2718     } else {
2719       cv = cx;
2720     }
2721   }
2722 #pragma omp atomic compare capture relaxed
2723   {
2724     cr = ce == cx;
2725     if (cr) {
2726       cx = cd;
2727     } else {
2728       cv = cx;
2729     }
2730   }
2731 
2732 #pragma omp atomic compare capture release
2733   {
2734     cv = cx;
2735     if (ce > cx) {
2736       cx = ce;
2737     }
2738   }
2739 #pragma omp atomic compare capture release
2740   {
2741     cv = cx;
2742     if (cx > ce) {
2743       cx = ce;
2744     }
2745   }
2746 #pragma omp atomic compare capture release
2747   {
2748     cv = cx;
2749     if (ce < cx) {
2750       cx = ce;
2751     }
2752   }
2753 #pragma omp atomic compare capture release
2754   {
2755     cv = cx;
2756     if (cx < ce) {
2757       cx = ce;
2758     }
2759   }
2760 #pragma omp atomic compare capture release
2761   {
2762     cv = cx;
2763     if (cx == ce) {
2764       cx = cd;
2765     }
2766   }
2767 #pragma omp atomic compare capture release
2768   {
2769     cv = cx;
2770     if (ce == cx) {
2771       cx = cd;
2772     }
2773   }
2774 #pragma omp atomic compare capture release
2775   {
2776     if (ce > cx) {
2777       cx = ce;
2778     }
2779     cv = cx;
2780   }
2781 #pragma omp atomic compare capture release
2782   {
2783     if (cx > ce) {
2784       cx = ce;
2785     }
2786     cv = cx;
2787   }
2788 #pragma omp atomic compare capture release
2789   {
2790     if (ce < cx) {
2791       cx = ce;
2792     }
2793     cv = cx;
2794   }
2795 #pragma omp atomic compare capture release
2796   {
2797     if (cx < ce) {
2798       cx = ce;
2799     }
2800     cv = cx;
2801   }
2802 #pragma omp atomic compare capture release
2803   {
2804     if (cx == ce) {
2805       cx = cd;
2806     }
2807     cv = cx;
2808   }
2809 #pragma omp atomic compare capture release
2810   {
2811     if (ce == cx) {
2812       cx = cd;
2813     }
2814     cv = cx;
2815   }
2816 #pragma omp atomic compare capture release
2817   if (cx == ce) {
2818     cx = cd;
2819   } else {
2820     cv = cx;
2821   }
2822 #pragma omp atomic compare capture release
2823   if (ce == cx) {
2824     cx = cd;
2825   } else {
2826     cv = cx;
2827   }
2828 #pragma omp atomic compare capture release
2829   {
2830     cr = cx == ce;
2831     if (cr) {
2832       cx = cd;
2833     }
2834   }
2835 #pragma omp atomic compare capture release
2836   {
2837     cr = ce == cx;
2838     if (cr) {
2839       cx = cd;
2840     }
2841   }
2842 #pragma omp atomic compare capture release
2843   {
2844     cr = cx == ce;
2845     if (cr) {
2846       cx = cd;
2847     } else {
2848       cv = cx;
2849     }
2850   }
2851 #pragma omp atomic compare capture release
2852   {
2853     cr = ce == cx;
2854     if (cr) {
2855       cx = cd;
2856     } else {
2857       cv = cx;
2858     }
2859   }
2860 
2861 #pragma omp atomic compare capture seq_cst
2862   {
2863     cv = cx;
2864     if (ce > cx) {
2865       cx = ce;
2866     }
2867   }
2868 #pragma omp atomic compare capture seq_cst
2869   {
2870     cv = cx;
2871     if (cx > ce) {
2872       cx = ce;
2873     }
2874   }
2875 #pragma omp atomic compare capture seq_cst
2876   {
2877     cv = cx;
2878     if (ce < cx) {
2879       cx = ce;
2880     }
2881   }
2882 #pragma omp atomic compare capture seq_cst
2883   {
2884     cv = cx;
2885     if (cx < ce) {
2886       cx = ce;
2887     }
2888   }
2889 #pragma omp atomic compare capture seq_cst
2890   {
2891     cv = cx;
2892     if (cx == ce) {
2893       cx = cd;
2894     }
2895   }
2896 #pragma omp atomic compare capture seq_cst
2897   {
2898     cv = cx;
2899     if (ce == cx) {
2900       cx = cd;
2901     }
2902   }
2903 #pragma omp atomic compare capture seq_cst
2904   {
2905     if (ce > cx) {
2906       cx = ce;
2907     }
2908     cv = cx;
2909   }
2910 #pragma omp atomic compare capture seq_cst
2911   {
2912     if (cx > ce) {
2913       cx = ce;
2914     }
2915     cv = cx;
2916   }
2917 #pragma omp atomic compare capture seq_cst
2918   {
2919     if (ce < cx) {
2920       cx = ce;
2921     }
2922     cv = cx;
2923   }
2924 #pragma omp atomic compare capture seq_cst
2925   {
2926     if (cx < ce) {
2927       cx = ce;
2928     }
2929     cv = cx;
2930   }
2931 #pragma omp atomic compare capture seq_cst
2932   {
2933     if (cx == ce) {
2934       cx = cd;
2935     }
2936     cv = cx;
2937   }
2938 #pragma omp atomic compare capture seq_cst
2939   {
2940     if (ce == cx) {
2941       cx = cd;
2942     }
2943     cv = cx;
2944   }
2945 #pragma omp atomic compare capture seq_cst
2946   if (cx == ce) {
2947     cx = cd;
2948   } else {
2949     cv = cx;
2950   }
2951 #pragma omp atomic compare capture seq_cst
2952   if (ce == cx) {
2953     cx = cd;
2954   } else {
2955     cv = cx;
2956   }
2957 #pragma omp atomic compare capture seq_cst
2958   {
2959     cr = cx == ce;
2960     if (cr) {
2961       cx = cd;
2962     }
2963   }
2964 #pragma omp atomic compare capture seq_cst
2965   {
2966     cr = ce == cx;
2967     if (cr) {
2968       cx = cd;
2969     }
2970   }
2971 #pragma omp atomic compare capture seq_cst
2972   {
2973     cr = cx == ce;
2974     if (cr) {
2975       cx = cd;
2976     } else {
2977       cv = cx;
2978     }
2979   }
2980 #pragma omp atomic compare capture seq_cst
2981   {
2982     cr = ce == cx;
2983     if (cr) {
2984       cx = cd;
2985     } else {
2986       cv = cx;
2987     }
2988   }
2989 
2990 #pragma omp atomic compare capture
2991   {
2992     ucv = ucx;
2993     if (uce > ucx) {
2994       ucx = uce;
2995     }
2996   }
2997 #pragma omp atomic compare capture
2998   {
2999     ucv = ucx;
3000     if (ucx > uce) {
3001       ucx = uce;
3002     }
3003   }
3004 #pragma omp atomic compare capture
3005   {
3006     ucv = ucx;
3007     if (uce < ucx) {
3008       ucx = uce;
3009     }
3010   }
3011 #pragma omp atomic compare capture
3012   {
3013     ucv = ucx;
3014     if (ucx < uce) {
3015       ucx = uce;
3016     }
3017   }
3018 #pragma omp atomic compare capture
3019   {
3020     ucv = ucx;
3021     if (ucx == uce) {
3022       ucx = ucd;
3023     }
3024   }
3025 #pragma omp atomic compare capture
3026   {
3027     ucv = ucx;
3028     if (uce == ucx) {
3029       ucx = ucd;
3030     }
3031   }
3032 #pragma omp atomic compare capture
3033   {
3034     if (uce > ucx) {
3035       ucx = uce;
3036     }
3037     ucv = ucx;
3038   }
3039 #pragma omp atomic compare capture
3040   {
3041     if (ucx > uce) {
3042       ucx = uce;
3043     }
3044     ucv = ucx;
3045   }
3046 #pragma omp atomic compare capture
3047   {
3048     if (uce < ucx) {
3049       ucx = uce;
3050     }
3051     ucv = ucx;
3052   }
3053 #pragma omp atomic compare capture
3054   {
3055     if (ucx < uce) {
3056       ucx = uce;
3057     }
3058     ucv = ucx;
3059   }
3060 #pragma omp atomic compare capture
3061   {
3062     if (ucx == uce) {
3063       ucx = ucd;
3064     }
3065     ucv = ucx;
3066   }
3067 #pragma omp atomic compare capture
3068   {
3069     if (uce == ucx) {
3070       ucx = ucd;
3071     }
3072     ucv = ucx;
3073   }
3074 #pragma omp atomic compare capture
3075   if (ucx == uce) {
3076     ucx = ucd;
3077   } else {
3078     ucv = ucx;
3079   }
3080 #pragma omp atomic compare capture
3081   if (uce == ucx) {
3082     ucx = ucd;
3083   } else {
3084     ucv = ucx;
3085   }
3086 #pragma omp atomic compare capture
3087   {
3088     ucr = ucx == uce;
3089     if (ucr) {
3090       ucx = ucd;
3091     }
3092   }
3093 #pragma omp atomic compare capture
3094   {
3095     ucr = uce == ucx;
3096     if (ucr) {
3097       ucx = ucd;
3098     }
3099   }
3100 #pragma omp atomic compare capture
3101   {
3102     ucr = ucx == uce;
3103     if (ucr) {
3104       ucx = ucd;
3105     } else {
3106       ucv = ucx;
3107     }
3108   }
3109 #pragma omp atomic compare capture
3110   {
3111     ucr = uce == ucx;
3112     if (ucr) {
3113       ucx = ucd;
3114     } else {
3115       ucv = ucx;
3116     }
3117   }
3118 
3119 #pragma omp atomic compare capture acq_rel
3120   {
3121     ucv = ucx;
3122     if (uce > ucx) {
3123       ucx = uce;
3124     }
3125   }
3126 #pragma omp atomic compare capture acq_rel
3127   {
3128     ucv = ucx;
3129     if (ucx > uce) {
3130       ucx = uce;
3131     }
3132   }
3133 #pragma omp atomic compare capture acq_rel
3134   {
3135     ucv = ucx;
3136     if (uce < ucx) {
3137       ucx = uce;
3138     }
3139   }
3140 #pragma omp atomic compare capture acq_rel
3141   {
3142     ucv = ucx;
3143     if (ucx < uce) {
3144       ucx = uce;
3145     }
3146   }
3147 #pragma omp atomic compare capture acq_rel
3148   {
3149     ucv = ucx;
3150     if (ucx == uce) {
3151       ucx = ucd;
3152     }
3153   }
3154 #pragma omp atomic compare capture acq_rel
3155   {
3156     ucv = ucx;
3157     if (uce == ucx) {
3158       ucx = ucd;
3159     }
3160   }
3161 #pragma omp atomic compare capture acq_rel
3162   {
3163     if (uce > ucx) {
3164       ucx = uce;
3165     }
3166     ucv = ucx;
3167   }
3168 #pragma omp atomic compare capture acq_rel
3169   {
3170     if (ucx > uce) {
3171       ucx = uce;
3172     }
3173     ucv = ucx;
3174   }
3175 #pragma omp atomic compare capture acq_rel
3176   {
3177     if (uce < ucx) {
3178       ucx = uce;
3179     }
3180     ucv = ucx;
3181   }
3182 #pragma omp atomic compare capture acq_rel
3183   {
3184     if (ucx < uce) {
3185       ucx = uce;
3186     }
3187     ucv = ucx;
3188   }
3189 #pragma omp atomic compare capture acq_rel
3190   {
3191     if (ucx == uce) {
3192       ucx = ucd;
3193     }
3194     ucv = ucx;
3195   }
3196 #pragma omp atomic compare capture acq_rel
3197   {
3198     if (uce == ucx) {
3199       ucx = ucd;
3200     }
3201     ucv = ucx;
3202   }
3203 #pragma omp atomic compare capture acq_rel
3204   if (ucx == uce) {
3205     ucx = ucd;
3206   } else {
3207     ucv = ucx;
3208   }
3209 #pragma omp atomic compare capture acq_rel
3210   if (uce == ucx) {
3211     ucx = ucd;
3212   } else {
3213     ucv = ucx;
3214   }
3215 #pragma omp atomic compare capture acq_rel
3216   {
3217     ucr = ucx == uce;
3218     if (ucr) {
3219       ucx = ucd;
3220     }
3221   }
3222 #pragma omp atomic compare capture acq_rel
3223   {
3224     ucr = uce == ucx;
3225     if (ucr) {
3226       ucx = ucd;
3227     }
3228   }
3229 #pragma omp atomic compare capture acq_rel
3230   {
3231     ucr = ucx == uce;
3232     if (ucr) {
3233       ucx = ucd;
3234     } else {
3235       ucv = ucx;
3236     }
3237   }
3238 #pragma omp atomic compare capture acq_rel
3239   {
3240     ucr = uce == ucx;
3241     if (ucr) {
3242       ucx = ucd;
3243     } else {
3244       ucv = ucx;
3245     }
3246   }
3247 
3248 #pragma omp atomic compare capture acquire
3249   {
3250     ucv = ucx;
3251     if (uce > ucx) {
3252       ucx = uce;
3253     }
3254   }
3255 #pragma omp atomic compare capture acquire
3256   {
3257     ucv = ucx;
3258     if (ucx > uce) {
3259       ucx = uce;
3260     }
3261   }
3262 #pragma omp atomic compare capture acquire
3263   {
3264     ucv = ucx;
3265     if (uce < ucx) {
3266       ucx = uce;
3267     }
3268   }
3269 #pragma omp atomic compare capture acquire
3270   {
3271     ucv = ucx;
3272     if (ucx < uce) {
3273       ucx = uce;
3274     }
3275   }
3276 #pragma omp atomic compare capture acquire
3277   {
3278     ucv = ucx;
3279     if (ucx == uce) {
3280       ucx = ucd;
3281     }
3282   }
3283 #pragma omp atomic compare capture acquire
3284   {
3285     ucv = ucx;
3286     if (uce == ucx) {
3287       ucx = ucd;
3288     }
3289   }
3290 #pragma omp atomic compare capture acquire
3291   {
3292     if (uce > ucx) {
3293       ucx = uce;
3294     }
3295     ucv = ucx;
3296   }
3297 #pragma omp atomic compare capture acquire
3298   {
3299     if (ucx > uce) {
3300       ucx = uce;
3301     }
3302     ucv = ucx;
3303   }
3304 #pragma omp atomic compare capture acquire
3305   {
3306     if (uce < ucx) {
3307       ucx = uce;
3308     }
3309     ucv = ucx;
3310   }
3311 #pragma omp atomic compare capture acquire
3312   {
3313     if (ucx < uce) {
3314       ucx = uce;
3315     }
3316     ucv = ucx;
3317   }
3318 #pragma omp atomic compare capture acquire
3319   {
3320     if (ucx == uce) {
3321       ucx = ucd;
3322     }
3323     ucv = ucx;
3324   }
3325 #pragma omp atomic compare capture acquire
3326   {
3327     if (uce == ucx) {
3328       ucx = ucd;
3329     }
3330     ucv = ucx;
3331   }
3332 #pragma omp atomic compare capture acquire
3333   if (ucx == uce) {
3334     ucx = ucd;
3335   } else {
3336     ucv = ucx;
3337   }
3338 #pragma omp atomic compare capture acquire
3339   if (uce == ucx) {
3340     ucx = ucd;
3341   } else {
3342     ucv = ucx;
3343   }
3344 #pragma omp atomic compare capture acquire
3345   {
3346     ucr = ucx == uce;
3347     if (ucr) {
3348       ucx = ucd;
3349     }
3350   }
3351 #pragma omp atomic compare capture acquire
3352   {
3353     ucr = uce == ucx;
3354     if (ucr) {
3355       ucx = ucd;
3356     }
3357   }
3358 #pragma omp atomic compare capture acquire
3359   {
3360     ucr = ucx == uce;
3361     if (ucr) {
3362       ucx = ucd;
3363     } else {
3364       ucv = ucx;
3365     }
3366   }
3367 #pragma omp atomic compare capture acquire
3368   {
3369     ucr = uce == ucx;
3370     if (ucr) {
3371       ucx = ucd;
3372     } else {
3373       ucv = ucx;
3374     }
3375   }
3376 
3377 #pragma omp atomic compare capture relaxed
3378   {
3379     ucv = ucx;
3380     if (uce > ucx) {
3381       ucx = uce;
3382     }
3383   }
3384 #pragma omp atomic compare capture relaxed
3385   {
3386     ucv = ucx;
3387     if (ucx > uce) {
3388       ucx = uce;
3389     }
3390   }
3391 #pragma omp atomic compare capture relaxed
3392   {
3393     ucv = ucx;
3394     if (uce < ucx) {
3395       ucx = uce;
3396     }
3397   }
3398 #pragma omp atomic compare capture relaxed
3399   {
3400     ucv = ucx;
3401     if (ucx < uce) {
3402       ucx = uce;
3403     }
3404   }
3405 #pragma omp atomic compare capture relaxed
3406   {
3407     ucv = ucx;
3408     if (ucx == uce) {
3409       ucx = ucd;
3410     }
3411   }
3412 #pragma omp atomic compare capture relaxed
3413   {
3414     ucv = ucx;
3415     if (uce == ucx) {
3416       ucx = ucd;
3417     }
3418   }
3419 #pragma omp atomic compare capture relaxed
3420   {
3421     if (uce > ucx) {
3422       ucx = uce;
3423     }
3424     ucv = ucx;
3425   }
3426 #pragma omp atomic compare capture relaxed
3427   {
3428     if (ucx > uce) {
3429       ucx = uce;
3430     }
3431     ucv = ucx;
3432   }
3433 #pragma omp atomic compare capture relaxed
3434   {
3435     if (uce < ucx) {
3436       ucx = uce;
3437     }
3438     ucv = ucx;
3439   }
3440 #pragma omp atomic compare capture relaxed
3441   {
3442     if (ucx < uce) {
3443       ucx = uce;
3444     }
3445     ucv = ucx;
3446   }
3447 #pragma omp atomic compare capture relaxed
3448   {
3449     if (ucx == uce) {
3450       ucx = ucd;
3451     }
3452     ucv = ucx;
3453   }
3454 #pragma omp atomic compare capture relaxed
3455   {
3456     if (uce == ucx) {
3457       ucx = ucd;
3458     }
3459     ucv = ucx;
3460   }
3461 #pragma omp atomic compare capture relaxed
3462   if (ucx == uce) {
3463     ucx = ucd;
3464   } else {
3465     ucv = ucx;
3466   }
3467 #pragma omp atomic compare capture relaxed
3468   if (uce == ucx) {
3469     ucx = ucd;
3470   } else {
3471     ucv = ucx;
3472   }
3473 #pragma omp atomic compare capture relaxed
3474   {
3475     ucr = ucx == uce;
3476     if (ucr) {
3477       ucx = ucd;
3478     }
3479   }
3480 #pragma omp atomic compare capture relaxed
3481   {
3482     ucr = uce == ucx;
3483     if (ucr) {
3484       ucx = ucd;
3485     }
3486   }
3487 #pragma omp atomic compare capture relaxed
3488   {
3489     ucr = ucx == uce;
3490     if (ucr) {
3491       ucx = ucd;
3492     } else {
3493       ucv = ucx;
3494     }
3495   }
3496 #pragma omp atomic compare capture relaxed
3497   {
3498     ucr = uce == ucx;
3499     if (ucr) {
3500       ucx = ucd;
3501     } else {
3502       ucv = ucx;
3503     }
3504   }
3505 
3506 #pragma omp atomic compare capture release
3507   {
3508     ucv = ucx;
3509     if (uce > ucx) {
3510       ucx = uce;
3511     }
3512   }
3513 #pragma omp atomic compare capture release
3514   {
3515     ucv = ucx;
3516     if (ucx > uce) {
3517       ucx = uce;
3518     }
3519   }
3520 #pragma omp atomic compare capture release
3521   {
3522     ucv = ucx;
3523     if (uce < ucx) {
3524       ucx = uce;
3525     }
3526   }
3527 #pragma omp atomic compare capture release
3528   {
3529     ucv = ucx;
3530     if (ucx < uce) {
3531       ucx = uce;
3532     }
3533   }
3534 #pragma omp atomic compare capture release
3535   {
3536     ucv = ucx;
3537     if (ucx == uce) {
3538       ucx = ucd;
3539     }
3540   }
3541 #pragma omp atomic compare capture release
3542   {
3543     ucv = ucx;
3544     if (uce == ucx) {
3545       ucx = ucd;
3546     }
3547   }
3548 #pragma omp atomic compare capture release
3549   {
3550     if (uce > ucx) {
3551       ucx = uce;
3552     }
3553     ucv = ucx;
3554   }
3555 #pragma omp atomic compare capture release
3556   {
3557     if (ucx > uce) {
3558       ucx = uce;
3559     }
3560     ucv = ucx;
3561   }
3562 #pragma omp atomic compare capture release
3563   {
3564     if (uce < ucx) {
3565       ucx = uce;
3566     }
3567     ucv = ucx;
3568   }
3569 #pragma omp atomic compare capture release
3570   {
3571     if (ucx < uce) {
3572       ucx = uce;
3573     }
3574     ucv = ucx;
3575   }
3576 #pragma omp atomic compare capture release
3577   {
3578     if (ucx == uce) {
3579       ucx = ucd;
3580     }
3581     ucv = ucx;
3582   }
3583 #pragma omp atomic compare capture release
3584   {
3585     if (uce == ucx) {
3586       ucx = ucd;
3587     }
3588     ucv = ucx;
3589   }
3590 #pragma omp atomic compare capture release
3591   if (ucx == uce) {
3592     ucx = ucd;
3593   } else {
3594     ucv = ucx;
3595   }
3596 #pragma omp atomic compare capture release
3597   if (uce == ucx) {
3598     ucx = ucd;
3599   } else {
3600     ucv = ucx;
3601   }
3602 #pragma omp atomic compare capture release
3603   {
3604     ucr = ucx == uce;
3605     if (ucr) {
3606       ucx = ucd;
3607     }
3608   }
3609 #pragma omp atomic compare capture release
3610   {
3611     ucr = uce == ucx;
3612     if (ucr) {
3613       ucx = ucd;
3614     }
3615   }
3616 #pragma omp atomic compare capture release
3617   {
3618     ucr = ucx == uce;
3619     if (ucr) {
3620       ucx = ucd;
3621     } else {
3622       ucv = ucx;
3623     }
3624   }
3625 #pragma omp atomic compare capture release
3626   {
3627     ucr = uce == ucx;
3628     if (ucr) {
3629       ucx = ucd;
3630     } else {
3631       ucv = ucx;
3632     }
3633   }
3634 
3635 #pragma omp atomic compare capture seq_cst
3636   {
3637     ucv = ucx;
3638     if (uce > ucx) {
3639       ucx = uce;
3640     }
3641   }
3642 #pragma omp atomic compare capture seq_cst
3643   {
3644     ucv = ucx;
3645     if (ucx > uce) {
3646       ucx = uce;
3647     }
3648   }
3649 #pragma omp atomic compare capture seq_cst
3650   {
3651     ucv = ucx;
3652     if (uce < ucx) {
3653       ucx = uce;
3654     }
3655   }
3656 #pragma omp atomic compare capture seq_cst
3657   {
3658     ucv = ucx;
3659     if (ucx < uce) {
3660       ucx = uce;
3661     }
3662   }
3663 #pragma omp atomic compare capture seq_cst
3664   {
3665     ucv = ucx;
3666     if (ucx == uce) {
3667       ucx = ucd;
3668     }
3669   }
3670 #pragma omp atomic compare capture seq_cst
3671   {
3672     ucv = ucx;
3673     if (uce == ucx) {
3674       ucx = ucd;
3675     }
3676   }
3677 #pragma omp atomic compare capture seq_cst
3678   {
3679     if (uce > ucx) {
3680       ucx = uce;
3681     }
3682     ucv = ucx;
3683   }
3684 #pragma omp atomic compare capture seq_cst
3685   {
3686     if (ucx > uce) {
3687       ucx = uce;
3688     }
3689     ucv = ucx;
3690   }
3691 #pragma omp atomic compare capture seq_cst
3692   {
3693     if (uce < ucx) {
3694       ucx = uce;
3695     }
3696     ucv = ucx;
3697   }
3698 #pragma omp atomic compare capture seq_cst
3699   {
3700     if (ucx < uce) {
3701       ucx = uce;
3702     }
3703     ucv = ucx;
3704   }
3705 #pragma omp atomic compare capture seq_cst
3706   {
3707     if (ucx == uce) {
3708       ucx = ucd;
3709     }
3710     ucv = ucx;
3711   }
3712 #pragma omp atomic compare capture seq_cst
3713   {
3714     if (uce == ucx) {
3715       ucx = ucd;
3716     }
3717     ucv = ucx;
3718   }
3719 #pragma omp atomic compare capture seq_cst
3720   if (ucx == uce) {
3721     ucx = ucd;
3722   } else {
3723     ucv = ucx;
3724   }
3725 #pragma omp atomic compare capture seq_cst
3726   if (uce == ucx) {
3727     ucx = ucd;
3728   } else {
3729     ucv = ucx;
3730   }
3731 #pragma omp atomic compare capture seq_cst
3732   {
3733     ucr = ucx == uce;
3734     if (ucr) {
3735       ucx = ucd;
3736     }
3737   }
3738 #pragma omp atomic compare capture seq_cst
3739   {
3740     ucr = uce == ucx;
3741     if (ucr) {
3742       ucx = ucd;
3743     }
3744   }
3745 #pragma omp atomic compare capture seq_cst
3746   {
3747     ucr = ucx == uce;
3748     if (ucr) {
3749       ucx = ucd;
3750     } else {
3751       ucv = ucx;
3752     }
3753   }
3754 #pragma omp atomic compare capture seq_cst
3755   {
3756     ucr = uce == ucx;
3757     if (ucr) {
3758       ucx = ucd;
3759     } else {
3760       ucv = ucx;
3761     }
3762   }
3763 
3764 #pragma omp atomic compare capture
3765   {
3766     sv = sx;
3767     if (se > sx) {
3768       sx = se;
3769     }
3770   }
3771 #pragma omp atomic compare capture
3772   {
3773     sv = sx;
3774     if (sx > se) {
3775       sx = se;
3776     }
3777   }
3778 #pragma omp atomic compare capture
3779   {
3780     sv = sx;
3781     if (se < sx) {
3782       sx = se;
3783     }
3784   }
3785 #pragma omp atomic compare capture
3786   {
3787     sv = sx;
3788     if (sx < se) {
3789       sx = se;
3790     }
3791   }
3792 #pragma omp atomic compare capture
3793   {
3794     sv = sx;
3795     if (sx == se) {
3796       sx = sd;
3797     }
3798   }
3799 #pragma omp atomic compare capture
3800   {
3801     sv = sx;
3802     if (se == sx) {
3803       sx = sd;
3804     }
3805   }
3806 #pragma omp atomic compare capture
3807   {
3808     if (se > sx) {
3809       sx = se;
3810     }
3811     sv = sx;
3812   }
3813 #pragma omp atomic compare capture
3814   {
3815     if (sx > se) {
3816       sx = se;
3817     }
3818     sv = sx;
3819   }
3820 #pragma omp atomic compare capture
3821   {
3822     if (se < sx) {
3823       sx = se;
3824     }
3825     sv = sx;
3826   }
3827 #pragma omp atomic compare capture
3828   {
3829     if (sx < se) {
3830       sx = se;
3831     }
3832     sv = sx;
3833   }
3834 #pragma omp atomic compare capture
3835   {
3836     if (sx == se) {
3837       sx = sd;
3838     }
3839     sv = sx;
3840   }
3841 #pragma omp atomic compare capture
3842   {
3843     if (se == sx) {
3844       sx = sd;
3845     }
3846     sv = sx;
3847   }
3848 #pragma omp atomic compare capture
3849   if (sx == se) {
3850     sx = sd;
3851   } else {
3852     sv = sx;
3853   }
3854 #pragma omp atomic compare capture
3855   if (se == sx) {
3856     sx = sd;
3857   } else {
3858     sv = sx;
3859   }
3860 #pragma omp atomic compare capture
3861   {
3862     sr = sx == se;
3863     if (sr) {
3864       sx = sd;
3865     }
3866   }
3867 #pragma omp atomic compare capture
3868   {
3869     sr = se == sx;
3870     if (sr) {
3871       sx = sd;
3872     }
3873   }
3874 #pragma omp atomic compare capture
3875   {
3876     sr = sx == se;
3877     if (sr) {
3878       sx = sd;
3879     } else {
3880       sv = sx;
3881     }
3882   }
3883 #pragma omp atomic compare capture
3884   {
3885     sr = se == sx;
3886     if (sr) {
3887       sx = sd;
3888     } else {
3889       sv = sx;
3890     }
3891   }
3892 
3893 #pragma omp atomic compare capture acq_rel
3894   {
3895     sv = sx;
3896     if (se > sx) {
3897       sx = se;
3898     }
3899   }
3900 #pragma omp atomic compare capture acq_rel
3901   {
3902     sv = sx;
3903     if (sx > se) {
3904       sx = se;
3905     }
3906   }
3907 #pragma omp atomic compare capture acq_rel
3908   {
3909     sv = sx;
3910     if (se < sx) {
3911       sx = se;
3912     }
3913   }
3914 #pragma omp atomic compare capture acq_rel
3915   {
3916     sv = sx;
3917     if (sx < se) {
3918       sx = se;
3919     }
3920   }
3921 #pragma omp atomic compare capture acq_rel
3922   {
3923     sv = sx;
3924     if (sx == se) {
3925       sx = sd;
3926     }
3927   }
3928 #pragma omp atomic compare capture acq_rel
3929   {
3930     sv = sx;
3931     if (se == sx) {
3932       sx = sd;
3933     }
3934   }
3935 #pragma omp atomic compare capture acq_rel
3936   {
3937     if (se > sx) {
3938       sx = se;
3939     }
3940     sv = sx;
3941   }
3942 #pragma omp atomic compare capture acq_rel
3943   {
3944     if (sx > se) {
3945       sx = se;
3946     }
3947     sv = sx;
3948   }
3949 #pragma omp atomic compare capture acq_rel
3950   {
3951     if (se < sx) {
3952       sx = se;
3953     }
3954     sv = sx;
3955   }
3956 #pragma omp atomic compare capture acq_rel
3957   {
3958     if (sx < se) {
3959       sx = se;
3960     }
3961     sv = sx;
3962   }
3963 #pragma omp atomic compare capture acq_rel
3964   {
3965     if (sx == se) {
3966       sx = sd;
3967     }
3968     sv = sx;
3969   }
3970 #pragma omp atomic compare capture acq_rel
3971   {
3972     if (se == sx) {
3973       sx = sd;
3974     }
3975     sv = sx;
3976   }
3977 #pragma omp atomic compare capture acq_rel
3978   if (sx == se) {
3979     sx = sd;
3980   } else {
3981     sv = sx;
3982   }
3983 #pragma omp atomic compare capture acq_rel
3984   if (se == sx) {
3985     sx = sd;
3986   } else {
3987     sv = sx;
3988   }
3989 #pragma omp atomic compare capture acq_rel
3990   {
3991     sr = sx == se;
3992     if (sr) {
3993       sx = sd;
3994     }
3995   }
3996 #pragma omp atomic compare capture acq_rel
3997   {
3998     sr = se == sx;
3999     if (sr) {
4000       sx = sd;
4001     }
4002   }
4003 #pragma omp atomic compare capture acq_rel
4004   {
4005     sr = sx == se;
4006     if (sr) {
4007       sx = sd;
4008     } else {
4009       sv = sx;
4010     }
4011   }
4012 #pragma omp atomic compare capture acq_rel
4013   {
4014     sr = se == sx;
4015     if (sr) {
4016       sx = sd;
4017     } else {
4018       sv = sx;
4019     }
4020   }
4021 
4022 #pragma omp atomic compare capture acquire
4023   {
4024     sv = sx;
4025     if (se > sx) {
4026       sx = se;
4027     }
4028   }
4029 #pragma omp atomic compare capture acquire
4030   {
4031     sv = sx;
4032     if (sx > se) {
4033       sx = se;
4034     }
4035   }
4036 #pragma omp atomic compare capture acquire
4037   {
4038     sv = sx;
4039     if (se < sx) {
4040       sx = se;
4041     }
4042   }
4043 #pragma omp atomic compare capture acquire
4044   {
4045     sv = sx;
4046     if (sx < se) {
4047       sx = se;
4048     }
4049   }
4050 #pragma omp atomic compare capture acquire
4051   {
4052     sv = sx;
4053     if (sx == se) {
4054       sx = sd;
4055     }
4056   }
4057 #pragma omp atomic compare capture acquire
4058   {
4059     sv = sx;
4060     if (se == sx) {
4061       sx = sd;
4062     }
4063   }
4064 #pragma omp atomic compare capture acquire
4065   {
4066     if (se > sx) {
4067       sx = se;
4068     }
4069     sv = sx;
4070   }
4071 #pragma omp atomic compare capture acquire
4072   {
4073     if (sx > se) {
4074       sx = se;
4075     }
4076     sv = sx;
4077   }
4078 #pragma omp atomic compare capture acquire
4079   {
4080     if (se < sx) {
4081       sx = se;
4082     }
4083     sv = sx;
4084   }
4085 #pragma omp atomic compare capture acquire
4086   {
4087     if (sx < se) {
4088       sx = se;
4089     }
4090     sv = sx;
4091   }
4092 #pragma omp atomic compare capture acquire
4093   {
4094     if (sx == se) {
4095       sx = sd;
4096     }
4097     sv = sx;
4098   }
4099 #pragma omp atomic compare capture acquire
4100   {
4101     if (se == sx) {
4102       sx = sd;
4103     }
4104     sv = sx;
4105   }
4106 #pragma omp atomic compare capture acquire
4107   if (sx == se) {
4108     sx = sd;
4109   } else {
4110     sv = sx;
4111   }
4112 #pragma omp atomic compare capture acquire
4113   if (se == sx) {
4114     sx = sd;
4115   } else {
4116     sv = sx;
4117   }
4118 #pragma omp atomic compare capture acquire
4119   {
4120     sr = sx == se;
4121     if (sr) {
4122       sx = sd;
4123     }
4124   }
4125 #pragma omp atomic compare capture acquire
4126   {
4127     sr = se == sx;
4128     if (sr) {
4129       sx = sd;
4130     }
4131   }
4132 #pragma omp atomic compare capture acquire
4133   {
4134     sr = sx == se;
4135     if (sr) {
4136       sx = sd;
4137     } else {
4138       sv = sx;
4139     }
4140   }
4141 #pragma omp atomic compare capture acquire
4142   {
4143     sr = se == sx;
4144     if (sr) {
4145       sx = sd;
4146     } else {
4147       sv = sx;
4148     }
4149   }
4150 
4151 #pragma omp atomic compare capture relaxed
4152   {
4153     sv = sx;
4154     if (se > sx) {
4155       sx = se;
4156     }
4157   }
4158 #pragma omp atomic compare capture relaxed
4159   {
4160     sv = sx;
4161     if (sx > se) {
4162       sx = se;
4163     }
4164   }
4165 #pragma omp atomic compare capture relaxed
4166   {
4167     sv = sx;
4168     if (se < sx) {
4169       sx = se;
4170     }
4171   }
4172 #pragma omp atomic compare capture relaxed
4173   {
4174     sv = sx;
4175     if (sx < se) {
4176       sx = se;
4177     }
4178   }
4179 #pragma omp atomic compare capture relaxed
4180   {
4181     sv = sx;
4182     if (sx == se) {
4183       sx = sd;
4184     }
4185   }
4186 #pragma omp atomic compare capture relaxed
4187   {
4188     sv = sx;
4189     if (se == sx) {
4190       sx = sd;
4191     }
4192   }
4193 #pragma omp atomic compare capture relaxed
4194   {
4195     if (se > sx) {
4196       sx = se;
4197     }
4198     sv = sx;
4199   }
4200 #pragma omp atomic compare capture relaxed
4201   {
4202     if (sx > se) {
4203       sx = se;
4204     }
4205     sv = sx;
4206   }
4207 #pragma omp atomic compare capture relaxed
4208   {
4209     if (se < sx) {
4210       sx = se;
4211     }
4212     sv = sx;
4213   }
4214 #pragma omp atomic compare capture relaxed
4215   {
4216     if (sx < se) {
4217       sx = se;
4218     }
4219     sv = sx;
4220   }
4221 #pragma omp atomic compare capture relaxed
4222   {
4223     if (sx == se) {
4224       sx = sd;
4225     }
4226     sv = sx;
4227   }
4228 #pragma omp atomic compare capture relaxed
4229   {
4230     if (se == sx) {
4231       sx = sd;
4232     }
4233     sv = sx;
4234   }
4235 #pragma omp atomic compare capture relaxed
4236   if (sx == se) {
4237     sx = sd;
4238   } else {
4239     sv = sx;
4240   }
4241 #pragma omp atomic compare capture relaxed
4242   if (se == sx) {
4243     sx = sd;
4244   } else {
4245     sv = sx;
4246   }
4247 #pragma omp atomic compare capture relaxed
4248   {
4249     sr = sx == se;
4250     if (sr) {
4251       sx = sd;
4252     }
4253   }
4254 #pragma omp atomic compare capture relaxed
4255   {
4256     sr = se == sx;
4257     if (sr) {
4258       sx = sd;
4259     }
4260   }
4261 #pragma omp atomic compare capture relaxed
4262   {
4263     sr = sx == se;
4264     if (sr) {
4265       sx = sd;
4266     } else {
4267       sv = sx;
4268     }
4269   }
4270 #pragma omp atomic compare capture relaxed
4271   {
4272     sr = se == sx;
4273     if (sr) {
4274       sx = sd;
4275     } else {
4276       sv = sx;
4277     }
4278   }
4279 
4280 #pragma omp atomic compare capture release
4281   {
4282     sv = sx;
4283     if (se > sx) {
4284       sx = se;
4285     }
4286   }
4287 #pragma omp atomic compare capture release
4288   {
4289     sv = sx;
4290     if (sx > se) {
4291       sx = se;
4292     }
4293   }
4294 #pragma omp atomic compare capture release
4295   {
4296     sv = sx;
4297     if (se < sx) {
4298       sx = se;
4299     }
4300   }
4301 #pragma omp atomic compare capture release
4302   {
4303     sv = sx;
4304     if (sx < se) {
4305       sx = se;
4306     }
4307   }
4308 #pragma omp atomic compare capture release
4309   {
4310     sv = sx;
4311     if (sx == se) {
4312       sx = sd;
4313     }
4314   }
4315 #pragma omp atomic compare capture release
4316   {
4317     sv = sx;
4318     if (se == sx) {
4319       sx = sd;
4320     }
4321   }
4322 #pragma omp atomic compare capture release
4323   {
4324     if (se > sx) {
4325       sx = se;
4326     }
4327     sv = sx;
4328   }
4329 #pragma omp atomic compare capture release
4330   {
4331     if (sx > se) {
4332       sx = se;
4333     }
4334     sv = sx;
4335   }
4336 #pragma omp atomic compare capture release
4337   {
4338     if (se < sx) {
4339       sx = se;
4340     }
4341     sv = sx;
4342   }
4343 #pragma omp atomic compare capture release
4344   {
4345     if (sx < se) {
4346       sx = se;
4347     }
4348     sv = sx;
4349   }
4350 #pragma omp atomic compare capture release
4351   {
4352     if (sx == se) {
4353       sx = sd;
4354     }
4355     sv = sx;
4356   }
4357 #pragma omp atomic compare capture release
4358   {
4359     if (se == sx) {
4360       sx = sd;
4361     }
4362     sv = sx;
4363   }
4364 #pragma omp atomic compare capture release
4365   if (sx == se) {
4366     sx = sd;
4367   } else {
4368     sv = sx;
4369   }
4370 #pragma omp atomic compare capture release
4371   if (se == sx) {
4372     sx = sd;
4373   } else {
4374     sv = sx;
4375   }
4376 #pragma omp atomic compare capture release
4377   {
4378     sr = sx == se;
4379     if (sr) {
4380       sx = sd;
4381     }
4382   }
4383 #pragma omp atomic compare capture release
4384   {
4385     sr = se == sx;
4386     if (sr) {
4387       sx = sd;
4388     }
4389   }
4390 #pragma omp atomic compare capture release
4391   {
4392     sr = sx == se;
4393     if (sr) {
4394       sx = sd;
4395     } else {
4396       sv = sx;
4397     }
4398   }
4399 #pragma omp atomic compare capture release
4400   {
4401     sr = se == sx;
4402     if (sr) {
4403       sx = sd;
4404     } else {
4405       sv = sx;
4406     }
4407   }
4408 
4409 #pragma omp atomic compare capture seq_cst
4410   {
4411     sv = sx;
4412     if (se > sx) {
4413       sx = se;
4414     }
4415   }
4416 #pragma omp atomic compare capture seq_cst
4417   {
4418     sv = sx;
4419     if (sx > se) {
4420       sx = se;
4421     }
4422   }
4423 #pragma omp atomic compare capture seq_cst
4424   {
4425     sv = sx;
4426     if (se < sx) {
4427       sx = se;
4428     }
4429   }
4430 #pragma omp atomic compare capture seq_cst
4431   {
4432     sv = sx;
4433     if (sx < se) {
4434       sx = se;
4435     }
4436   }
4437 #pragma omp atomic compare capture seq_cst
4438   {
4439     sv = sx;
4440     if (sx == se) {
4441       sx = sd;
4442     }
4443   }
4444 #pragma omp atomic compare capture seq_cst
4445   {
4446     sv = sx;
4447     if (se == sx) {
4448       sx = sd;
4449     }
4450   }
4451 #pragma omp atomic compare capture seq_cst
4452   {
4453     if (se > sx) {
4454       sx = se;
4455     }
4456     sv = sx;
4457   }
4458 #pragma omp atomic compare capture seq_cst
4459   {
4460     if (sx > se) {
4461       sx = se;
4462     }
4463     sv = sx;
4464   }
4465 #pragma omp atomic compare capture seq_cst
4466   {
4467     if (se < sx) {
4468       sx = se;
4469     }
4470     sv = sx;
4471   }
4472 #pragma omp atomic compare capture seq_cst
4473   {
4474     if (sx < se) {
4475       sx = se;
4476     }
4477     sv = sx;
4478   }
4479 #pragma omp atomic compare capture seq_cst
4480   {
4481     if (sx == se) {
4482       sx = sd;
4483     }
4484     sv = sx;
4485   }
4486 #pragma omp atomic compare capture seq_cst
4487   {
4488     if (se == sx) {
4489       sx = sd;
4490     }
4491     sv = sx;
4492   }
4493 #pragma omp atomic compare capture seq_cst
4494   if (sx == se) {
4495     sx = sd;
4496   } else {
4497     sv = sx;
4498   }
4499 #pragma omp atomic compare capture seq_cst
4500   if (se == sx) {
4501     sx = sd;
4502   } else {
4503     sv = sx;
4504   }
4505 #pragma omp atomic compare capture seq_cst
4506   {
4507     sr = sx == se;
4508     if (sr) {
4509       sx = sd;
4510     }
4511   }
4512 #pragma omp atomic compare capture seq_cst
4513   {
4514     sr = se == sx;
4515     if (sr) {
4516       sx = sd;
4517     }
4518   }
4519 #pragma omp atomic compare capture seq_cst
4520   {
4521     sr = sx == se;
4522     if (sr) {
4523       sx = sd;
4524     } else {
4525       sv = sx;
4526     }
4527   }
4528 #pragma omp atomic compare capture seq_cst
4529   {
4530     sr = se == sx;
4531     if (sr) {
4532       sx = sd;
4533     } else {
4534       sv = sx;
4535     }
4536   }
4537 
4538 #pragma omp atomic compare capture
4539   {
4540     usv = usx;
4541     if (use > usx) {
4542       usx = use;
4543     }
4544   }
4545 #pragma omp atomic compare capture
4546   {
4547     usv = usx;
4548     if (usx > use) {
4549       usx = use;
4550     }
4551   }
4552 #pragma omp atomic compare capture
4553   {
4554     usv = usx;
4555     if (use < usx) {
4556       usx = use;
4557     }
4558   }
4559 #pragma omp atomic compare capture
4560   {
4561     usv = usx;
4562     if (usx < use) {
4563       usx = use;
4564     }
4565   }
4566 #pragma omp atomic compare capture
4567   {
4568     usv = usx;
4569     if (usx == use) {
4570       usx = usd;
4571     }
4572   }
4573 #pragma omp atomic compare capture
4574   {
4575     usv = usx;
4576     if (use == usx) {
4577       usx = usd;
4578     }
4579   }
4580 #pragma omp atomic compare capture
4581   {
4582     if (use > usx) {
4583       usx = use;
4584     }
4585     usv = usx;
4586   }
4587 #pragma omp atomic compare capture
4588   {
4589     if (usx > use) {
4590       usx = use;
4591     }
4592     usv = usx;
4593   }
4594 #pragma omp atomic compare capture
4595   {
4596     if (use < usx) {
4597       usx = use;
4598     }
4599     usv = usx;
4600   }
4601 #pragma omp atomic compare capture
4602   {
4603     if (usx < use) {
4604       usx = use;
4605     }
4606     usv = usx;
4607   }
4608 #pragma omp atomic compare capture
4609   {
4610     if (usx == use) {
4611       usx = usd;
4612     }
4613     usv = usx;
4614   }
4615 #pragma omp atomic compare capture
4616   {
4617     if (use == usx) {
4618       usx = usd;
4619     }
4620     usv = usx;
4621   }
4622 #pragma omp atomic compare capture
4623   if (usx == use) {
4624     usx = usd;
4625   } else {
4626     usv = usx;
4627   }
4628 #pragma omp atomic compare capture
4629   if (use == usx) {
4630     usx = usd;
4631   } else {
4632     usv = usx;
4633   }
4634 #pragma omp atomic compare capture
4635   {
4636     usr = usx == use;
4637     if (usr) {
4638       usx = usd;
4639     }
4640   }
4641 #pragma omp atomic compare capture
4642   {
4643     usr = use == usx;
4644     if (usr) {
4645       usx = usd;
4646     }
4647   }
4648 #pragma omp atomic compare capture
4649   {
4650     usr = usx == use;
4651     if (usr) {
4652       usx = usd;
4653     } else {
4654       usv = usx;
4655     }
4656   }
4657 #pragma omp atomic compare capture
4658   {
4659     usr = use == usx;
4660     if (usr) {
4661       usx = usd;
4662     } else {
4663       usv = usx;
4664     }
4665   }
4666 
4667 #pragma omp atomic compare capture acq_rel
4668   {
4669     usv = usx;
4670     if (use > usx) {
4671       usx = use;
4672     }
4673   }
4674 #pragma omp atomic compare capture acq_rel
4675   {
4676     usv = usx;
4677     if (usx > use) {
4678       usx = use;
4679     }
4680   }
4681 #pragma omp atomic compare capture acq_rel
4682   {
4683     usv = usx;
4684     if (use < usx) {
4685       usx = use;
4686     }
4687   }
4688 #pragma omp atomic compare capture acq_rel
4689   {
4690     usv = usx;
4691     if (usx < use) {
4692       usx = use;
4693     }
4694   }
4695 #pragma omp atomic compare capture acq_rel
4696   {
4697     usv = usx;
4698     if (usx == use) {
4699       usx = usd;
4700     }
4701   }
4702 #pragma omp atomic compare capture acq_rel
4703   {
4704     usv = usx;
4705     if (use == usx) {
4706       usx = usd;
4707     }
4708   }
4709 #pragma omp atomic compare capture acq_rel
4710   {
4711     if (use > usx) {
4712       usx = use;
4713     }
4714     usv = usx;
4715   }
4716 #pragma omp atomic compare capture acq_rel
4717   {
4718     if (usx > use) {
4719       usx = use;
4720     }
4721     usv = usx;
4722   }
4723 #pragma omp atomic compare capture acq_rel
4724   {
4725     if (use < usx) {
4726       usx = use;
4727     }
4728     usv = usx;
4729   }
4730 #pragma omp atomic compare capture acq_rel
4731   {
4732     if (usx < use) {
4733       usx = use;
4734     }
4735     usv = usx;
4736   }
4737 #pragma omp atomic compare capture acq_rel
4738   {
4739     if (usx == use) {
4740       usx = usd;
4741     }
4742     usv = usx;
4743   }
4744 #pragma omp atomic compare capture acq_rel
4745   {
4746     if (use == usx) {
4747       usx = usd;
4748     }
4749     usv = usx;
4750   }
4751 #pragma omp atomic compare capture acq_rel
4752   if (usx == use) {
4753     usx = usd;
4754   } else {
4755     usv = usx;
4756   }
4757 #pragma omp atomic compare capture acq_rel
4758   if (use == usx) {
4759     usx = usd;
4760   } else {
4761     usv = usx;
4762   }
4763 #pragma omp atomic compare capture acq_rel
4764   {
4765     usr = usx == use;
4766     if (usr) {
4767       usx = usd;
4768     }
4769   }
4770 #pragma omp atomic compare capture acq_rel
4771   {
4772     usr = use == usx;
4773     if (usr) {
4774       usx = usd;
4775     }
4776   }
4777 #pragma omp atomic compare capture acq_rel
4778   {
4779     usr = usx == use;
4780     if (usr) {
4781       usx = usd;
4782     } else {
4783       usv = usx;
4784     }
4785   }
4786 #pragma omp atomic compare capture acq_rel
4787   {
4788     usr = use == usx;
4789     if (usr) {
4790       usx = usd;
4791     } else {
4792       usv = usx;
4793     }
4794   }
4795 
4796 #pragma omp atomic compare capture acquire
4797   {
4798     usv = usx;
4799     if (use > usx) {
4800       usx = use;
4801     }
4802   }
4803 #pragma omp atomic compare capture acquire
4804   {
4805     usv = usx;
4806     if (usx > use) {
4807       usx = use;
4808     }
4809   }
4810 #pragma omp atomic compare capture acquire
4811   {
4812     usv = usx;
4813     if (use < usx) {
4814       usx = use;
4815     }
4816   }
4817 #pragma omp atomic compare capture acquire
4818   {
4819     usv = usx;
4820     if (usx < use) {
4821       usx = use;
4822     }
4823   }
4824 #pragma omp atomic compare capture acquire
4825   {
4826     usv = usx;
4827     if (usx == use) {
4828       usx = usd;
4829     }
4830   }
4831 #pragma omp atomic compare capture acquire
4832   {
4833     usv = usx;
4834     if (use == usx) {
4835       usx = usd;
4836     }
4837   }
4838 #pragma omp atomic compare capture acquire
4839   {
4840     if (use > usx) {
4841       usx = use;
4842     }
4843     usv = usx;
4844   }
4845 #pragma omp atomic compare capture acquire
4846   {
4847     if (usx > use) {
4848       usx = use;
4849     }
4850     usv = usx;
4851   }
4852 #pragma omp atomic compare capture acquire
4853   {
4854     if (use < usx) {
4855       usx = use;
4856     }
4857     usv = usx;
4858   }
4859 #pragma omp atomic compare capture acquire
4860   {
4861     if (usx < use) {
4862       usx = use;
4863     }
4864     usv = usx;
4865   }
4866 #pragma omp atomic compare capture acquire
4867   {
4868     if (usx == use) {
4869       usx = usd;
4870     }
4871     usv = usx;
4872   }
4873 #pragma omp atomic compare capture acquire
4874   {
4875     if (use == usx) {
4876       usx = usd;
4877     }
4878     usv = usx;
4879   }
4880 #pragma omp atomic compare capture acquire
4881   if (usx == use) {
4882     usx = usd;
4883   } else {
4884     usv = usx;
4885   }
4886 #pragma omp atomic compare capture acquire
4887   if (use == usx) {
4888     usx = usd;
4889   } else {
4890     usv = usx;
4891   }
4892 #pragma omp atomic compare capture acquire
4893   {
4894     usr = usx == use;
4895     if (usr) {
4896       usx = usd;
4897     }
4898   }
4899 #pragma omp atomic compare capture acquire
4900   {
4901     usr = use == usx;
4902     if (usr) {
4903       usx = usd;
4904     }
4905   }
4906 #pragma omp atomic compare capture acquire
4907   {
4908     usr = usx == use;
4909     if (usr) {
4910       usx = usd;
4911     } else {
4912       usv = usx;
4913     }
4914   }
4915 #pragma omp atomic compare capture acquire
4916   {
4917     usr = use == usx;
4918     if (usr) {
4919       usx = usd;
4920     } else {
4921       usv = usx;
4922     }
4923   }
4924 
4925 #pragma omp atomic compare capture relaxed
4926   {
4927     usv = usx;
4928     if (use > usx) {
4929       usx = use;
4930     }
4931   }
4932 #pragma omp atomic compare capture relaxed
4933   {
4934     usv = usx;
4935     if (usx > use) {
4936       usx = use;
4937     }
4938   }
4939 #pragma omp atomic compare capture relaxed
4940   {
4941     usv = usx;
4942     if (use < usx) {
4943       usx = use;
4944     }
4945   }
4946 #pragma omp atomic compare capture relaxed
4947   {
4948     usv = usx;
4949     if (usx < use) {
4950       usx = use;
4951     }
4952   }
4953 #pragma omp atomic compare capture relaxed
4954   {
4955     usv = usx;
4956     if (usx == use) {
4957       usx = usd;
4958     }
4959   }
4960 #pragma omp atomic compare capture relaxed
4961   {
4962     usv = usx;
4963     if (use == usx) {
4964       usx = usd;
4965     }
4966   }
4967 #pragma omp atomic compare capture relaxed
4968   {
4969     if (use > usx) {
4970       usx = use;
4971     }
4972     usv = usx;
4973   }
4974 #pragma omp atomic compare capture relaxed
4975   {
4976     if (usx > use) {
4977       usx = use;
4978     }
4979     usv = usx;
4980   }
4981 #pragma omp atomic compare capture relaxed
4982   {
4983     if (use < usx) {
4984       usx = use;
4985     }
4986     usv = usx;
4987   }
4988 #pragma omp atomic compare capture relaxed
4989   {
4990     if (usx < use) {
4991       usx = use;
4992     }
4993     usv = usx;
4994   }
4995 #pragma omp atomic compare capture relaxed
4996   {
4997     if (usx == use) {
4998       usx = usd;
4999     }
5000     usv = usx;
5001   }
5002 #pragma omp atomic compare capture relaxed
5003   {
5004     if (use == usx) {
5005       usx = usd;
5006     }
5007     usv = usx;
5008   }
5009 #pragma omp atomic compare capture relaxed
5010   if (usx == use) {
5011     usx = usd;
5012   } else {
5013     usv = usx;
5014   }
5015 #pragma omp atomic compare capture relaxed
5016   if (use == usx) {
5017     usx = usd;
5018   } else {
5019     usv = usx;
5020   }
5021 #pragma omp atomic compare capture relaxed
5022   {
5023     usr = usx == use;
5024     if (usr) {
5025       usx = usd;
5026     }
5027   }
5028 #pragma omp atomic compare capture relaxed
5029   {
5030     usr = use == usx;
5031     if (usr) {
5032       usx = usd;
5033     }
5034   }
5035 #pragma omp atomic compare capture relaxed
5036   {
5037     usr = usx == use;
5038     if (usr) {
5039       usx = usd;
5040     } else {
5041       usv = usx;
5042     }
5043   }
5044 #pragma omp atomic compare capture relaxed
5045   {
5046     usr = use == usx;
5047     if (usr) {
5048       usx = usd;
5049     } else {
5050       usv = usx;
5051     }
5052   }
5053 
5054 #pragma omp atomic compare capture release
5055   {
5056     usv = usx;
5057     if (use > usx) {
5058       usx = use;
5059     }
5060   }
5061 #pragma omp atomic compare capture release
5062   {
5063     usv = usx;
5064     if (usx > use) {
5065       usx = use;
5066     }
5067   }
5068 #pragma omp atomic compare capture release
5069   {
5070     usv = usx;
5071     if (use < usx) {
5072       usx = use;
5073     }
5074   }
5075 #pragma omp atomic compare capture release
5076   {
5077     usv = usx;
5078     if (usx < use) {
5079       usx = use;
5080     }
5081   }
5082 #pragma omp atomic compare capture release
5083   {
5084     usv = usx;
5085     if (usx == use) {
5086       usx = usd;
5087     }
5088   }
5089 #pragma omp atomic compare capture release
5090   {
5091     usv = usx;
5092     if (use == usx) {
5093       usx = usd;
5094     }
5095   }
5096 #pragma omp atomic compare capture release
5097   {
5098     if (use > usx) {
5099       usx = use;
5100     }
5101     usv = usx;
5102   }
5103 #pragma omp atomic compare capture release
5104   {
5105     if (usx > use) {
5106       usx = use;
5107     }
5108     usv = usx;
5109   }
5110 #pragma omp atomic compare capture release
5111   {
5112     if (use < usx) {
5113       usx = use;
5114     }
5115     usv = usx;
5116   }
5117 #pragma omp atomic compare capture release
5118   {
5119     if (usx < use) {
5120       usx = use;
5121     }
5122     usv = usx;
5123   }
5124 #pragma omp atomic compare capture release
5125   {
5126     if (usx == use) {
5127       usx = usd;
5128     }
5129     usv = usx;
5130   }
5131 #pragma omp atomic compare capture release
5132   {
5133     if (use == usx) {
5134       usx = usd;
5135     }
5136     usv = usx;
5137   }
5138 #pragma omp atomic compare capture release
5139   if (usx == use) {
5140     usx = usd;
5141   } else {
5142     usv = usx;
5143   }
5144 #pragma omp atomic compare capture release
5145   if (use == usx) {
5146     usx = usd;
5147   } else {
5148     usv = usx;
5149   }
5150 #pragma omp atomic compare capture release
5151   {
5152     usr = usx == use;
5153     if (usr) {
5154       usx = usd;
5155     }
5156   }
5157 #pragma omp atomic compare capture release
5158   {
5159     usr = use == usx;
5160     if (usr) {
5161       usx = usd;
5162     }
5163   }
5164 #pragma omp atomic compare capture release
5165   {
5166     usr = usx == use;
5167     if (usr) {
5168       usx = usd;
5169     } else {
5170       usv = usx;
5171     }
5172   }
5173 #pragma omp atomic compare capture release
5174   {
5175     usr = use == usx;
5176     if (usr) {
5177       usx = usd;
5178     } else {
5179       usv = usx;
5180     }
5181   }
5182 
5183 #pragma omp atomic compare capture seq_cst
5184   {
5185     usv = usx;
5186     if (use > usx) {
5187       usx = use;
5188     }
5189   }
5190 #pragma omp atomic compare capture seq_cst
5191   {
5192     usv = usx;
5193     if (usx > use) {
5194       usx = use;
5195     }
5196   }
5197 #pragma omp atomic compare capture seq_cst
5198   {
5199     usv = usx;
5200     if (use < usx) {
5201       usx = use;
5202     }
5203   }
5204 #pragma omp atomic compare capture seq_cst
5205   {
5206     usv = usx;
5207     if (usx < use) {
5208       usx = use;
5209     }
5210   }
5211 #pragma omp atomic compare capture seq_cst
5212   {
5213     usv = usx;
5214     if (usx == use) {
5215       usx = usd;
5216     }
5217   }
5218 #pragma omp atomic compare capture seq_cst
5219   {
5220     usv = usx;
5221     if (use == usx) {
5222       usx = usd;
5223     }
5224   }
5225 #pragma omp atomic compare capture seq_cst
5226   {
5227     if (use > usx) {
5228       usx = use;
5229     }
5230     usv = usx;
5231   }
5232 #pragma omp atomic compare capture seq_cst
5233   {
5234     if (usx > use) {
5235       usx = use;
5236     }
5237     usv = usx;
5238   }
5239 #pragma omp atomic compare capture seq_cst
5240   {
5241     if (use < usx) {
5242       usx = use;
5243     }
5244     usv = usx;
5245   }
5246 #pragma omp atomic compare capture seq_cst
5247   {
5248     if (usx < use) {
5249       usx = use;
5250     }
5251     usv = usx;
5252   }
5253 #pragma omp atomic compare capture seq_cst
5254   {
5255     if (usx == use) {
5256       usx = usd;
5257     }
5258     usv = usx;
5259   }
5260 #pragma omp atomic compare capture seq_cst
5261   {
5262     if (use == usx) {
5263       usx = usd;
5264     }
5265     usv = usx;
5266   }
5267 #pragma omp atomic compare capture seq_cst
5268   if (usx == use) {
5269     usx = usd;
5270   } else {
5271     usv = usx;
5272   }
5273 #pragma omp atomic compare capture seq_cst
5274   if (use == usx) {
5275     usx = usd;
5276   } else {
5277     usv = usx;
5278   }
5279 #pragma omp atomic compare capture seq_cst
5280   {
5281     usr = usx == use;
5282     if (usr) {
5283       usx = usd;
5284     }
5285   }
5286 #pragma omp atomic compare capture seq_cst
5287   {
5288     usr = use == usx;
5289     if (usr) {
5290       usx = usd;
5291     }
5292   }
5293 #pragma omp atomic compare capture seq_cst
5294   {
5295     usr = usx == use;
5296     if (usr) {
5297       usx = usd;
5298     } else {
5299       usv = usx;
5300     }
5301   }
5302 #pragma omp atomic compare capture seq_cst
5303   {
5304     usr = use == usx;
5305     if (usr) {
5306       usx = usd;
5307     } else {
5308       usv = usx;
5309     }
5310   }
5311 
5312 #pragma omp atomic compare capture
5313   {
5314     iv = ix;
5315     if (ie > ix) {
5316       ix = ie;
5317     }
5318   }
5319 #pragma omp atomic compare capture
5320   {
5321     iv = ix;
5322     if (ix > ie) {
5323       ix = ie;
5324     }
5325   }
5326 #pragma omp atomic compare capture
5327   {
5328     iv = ix;
5329     if (ie < ix) {
5330       ix = ie;
5331     }
5332   }
5333 #pragma omp atomic compare capture
5334   {
5335     iv = ix;
5336     if (ix < ie) {
5337       ix = ie;
5338     }
5339   }
5340 #pragma omp atomic compare capture
5341   {
5342     iv = ix;
5343     if (ix == ie) {
5344       ix = id;
5345     }
5346   }
5347 #pragma omp atomic compare capture
5348   {
5349     iv = ix;
5350     if (ie == ix) {
5351       ix = id;
5352     }
5353   }
5354 #pragma omp atomic compare capture
5355   {
5356     if (ie > ix) {
5357       ix = ie;
5358     }
5359     iv = ix;
5360   }
5361 #pragma omp atomic compare capture
5362   {
5363     if (ix > ie) {
5364       ix = ie;
5365     }
5366     iv = ix;
5367   }
5368 #pragma omp atomic compare capture
5369   {
5370     if (ie < ix) {
5371       ix = ie;
5372     }
5373     iv = ix;
5374   }
5375 #pragma omp atomic compare capture
5376   {
5377     if (ix < ie) {
5378       ix = ie;
5379     }
5380     iv = ix;
5381   }
5382 #pragma omp atomic compare capture
5383   {
5384     if (ix == ie) {
5385       ix = id;
5386     }
5387     iv = ix;
5388   }
5389 #pragma omp atomic compare capture
5390   {
5391     if (ie == ix) {
5392       ix = id;
5393     }
5394     iv = ix;
5395   }
5396 #pragma omp atomic compare capture
5397   if (ix == ie) {
5398     ix = id;
5399   } else {
5400     iv = ix;
5401   }
5402 #pragma omp atomic compare capture
5403   if (ie == ix) {
5404     ix = id;
5405   } else {
5406     iv = ix;
5407   }
5408 #pragma omp atomic compare capture
5409   {
5410     ir = ix == ie;
5411     if (ir) {
5412       ix = id;
5413     }
5414   }
5415 #pragma omp atomic compare capture
5416   {
5417     ir = ie == ix;
5418     if (ir) {
5419       ix = id;
5420     }
5421   }
5422 #pragma omp atomic compare capture
5423   {
5424     ir = ix == ie;
5425     if (ir) {
5426       ix = id;
5427     } else {
5428       iv = ix;
5429     }
5430   }
5431 #pragma omp atomic compare capture
5432   {
5433     ir = ie == ix;
5434     if (ir) {
5435       ix = id;
5436     } else {
5437       iv = ix;
5438     }
5439   }
5440 
5441 #pragma omp atomic compare capture acq_rel
5442   {
5443     iv = ix;
5444     if (ie > ix) {
5445       ix = ie;
5446     }
5447   }
5448 #pragma omp atomic compare capture acq_rel
5449   {
5450     iv = ix;
5451     if (ix > ie) {
5452       ix = ie;
5453     }
5454   }
5455 #pragma omp atomic compare capture acq_rel
5456   {
5457     iv = ix;
5458     if (ie < ix) {
5459       ix = ie;
5460     }
5461   }
5462 #pragma omp atomic compare capture acq_rel
5463   {
5464     iv = ix;
5465     if (ix < ie) {
5466       ix = ie;
5467     }
5468   }
5469 #pragma omp atomic compare capture acq_rel
5470   {
5471     iv = ix;
5472     if (ix == ie) {
5473       ix = id;
5474     }
5475   }
5476 #pragma omp atomic compare capture acq_rel
5477   {
5478     iv = ix;
5479     if (ie == ix) {
5480       ix = id;
5481     }
5482   }
5483 #pragma omp atomic compare capture acq_rel
5484   {
5485     if (ie > ix) {
5486       ix = ie;
5487     }
5488     iv = ix;
5489   }
5490 #pragma omp atomic compare capture acq_rel
5491   {
5492     if (ix > ie) {
5493       ix = ie;
5494     }
5495     iv = ix;
5496   }
5497 #pragma omp atomic compare capture acq_rel
5498   {
5499     if (ie < ix) {
5500       ix = ie;
5501     }
5502     iv = ix;
5503   }
5504 #pragma omp atomic compare capture acq_rel
5505   {
5506     if (ix < ie) {
5507       ix = ie;
5508     }
5509     iv = ix;
5510   }
5511 #pragma omp atomic compare capture acq_rel
5512   {
5513     if (ix == ie) {
5514       ix = id;
5515     }
5516     iv = ix;
5517   }
5518 #pragma omp atomic compare capture acq_rel
5519   {
5520     if (ie == ix) {
5521       ix = id;
5522     }
5523     iv = ix;
5524   }
5525 #pragma omp atomic compare capture acq_rel
5526   if (ix == ie) {
5527     ix = id;
5528   } else {
5529     iv = ix;
5530   }
5531 #pragma omp atomic compare capture acq_rel
5532   if (ie == ix) {
5533     ix = id;
5534   } else {
5535     iv = ix;
5536   }
5537 #pragma omp atomic compare capture acq_rel
5538   {
5539     ir = ix == ie;
5540     if (ir) {
5541       ix = id;
5542     }
5543   }
5544 #pragma omp atomic compare capture acq_rel
5545   {
5546     ir = ie == ix;
5547     if (ir) {
5548       ix = id;
5549     }
5550   }
5551 #pragma omp atomic compare capture acq_rel
5552   {
5553     ir = ix == ie;
5554     if (ir) {
5555       ix = id;
5556     } else {
5557       iv = ix;
5558     }
5559   }
5560 #pragma omp atomic compare capture acq_rel
5561   {
5562     ir = ie == ix;
5563     if (ir) {
5564       ix = id;
5565     } else {
5566       iv = ix;
5567     }
5568   }
5569 
5570 #pragma omp atomic compare capture acquire
5571   {
5572     iv = ix;
5573     if (ie > ix) {
5574       ix = ie;
5575     }
5576   }
5577 #pragma omp atomic compare capture acquire
5578   {
5579     iv = ix;
5580     if (ix > ie) {
5581       ix = ie;
5582     }
5583   }
5584 #pragma omp atomic compare capture acquire
5585   {
5586     iv = ix;
5587     if (ie < ix) {
5588       ix = ie;
5589     }
5590   }
5591 #pragma omp atomic compare capture acquire
5592   {
5593     iv = ix;
5594     if (ix < ie) {
5595       ix = ie;
5596     }
5597   }
5598 #pragma omp atomic compare capture acquire
5599   {
5600     iv = ix;
5601     if (ix == ie) {
5602       ix = id;
5603     }
5604   }
5605 #pragma omp atomic compare capture acquire
5606   {
5607     iv = ix;
5608     if (ie == ix) {
5609       ix = id;
5610     }
5611   }
5612 #pragma omp atomic compare capture acquire
5613   {
5614     if (ie > ix) {
5615       ix = ie;
5616     }
5617     iv = ix;
5618   }
5619 #pragma omp atomic compare capture acquire
5620   {
5621     if (ix > ie) {
5622       ix = ie;
5623     }
5624     iv = ix;
5625   }
5626 #pragma omp atomic compare capture acquire
5627   {
5628     if (ie < ix) {
5629       ix = ie;
5630     }
5631     iv = ix;
5632   }
5633 #pragma omp atomic compare capture acquire
5634   {
5635     if (ix < ie) {
5636       ix = ie;
5637     }
5638     iv = ix;
5639   }
5640 #pragma omp atomic compare capture acquire
5641   {
5642     if (ix == ie) {
5643       ix = id;
5644     }
5645     iv = ix;
5646   }
5647 #pragma omp atomic compare capture acquire
5648   {
5649     if (ie == ix) {
5650       ix = id;
5651     }
5652     iv = ix;
5653   }
5654 #pragma omp atomic compare capture acquire
5655   if (ix == ie) {
5656     ix = id;
5657   } else {
5658     iv = ix;
5659   }
5660 #pragma omp atomic compare capture acquire
5661   if (ie == ix) {
5662     ix = id;
5663   } else {
5664     iv = ix;
5665   }
5666 #pragma omp atomic compare capture acquire
5667   {
5668     ir = ix == ie;
5669     if (ir) {
5670       ix = id;
5671     }
5672   }
5673 #pragma omp atomic compare capture acquire
5674   {
5675     ir = ie == ix;
5676     if (ir) {
5677       ix = id;
5678     }
5679   }
5680 #pragma omp atomic compare capture acquire
5681   {
5682     ir = ix == ie;
5683     if (ir) {
5684       ix = id;
5685     } else {
5686       iv = ix;
5687     }
5688   }
5689 #pragma omp atomic compare capture acquire
5690   {
5691     ir = ie == ix;
5692     if (ir) {
5693       ix = id;
5694     } else {
5695       iv = ix;
5696     }
5697   }
5698 
5699 #pragma omp atomic compare capture relaxed
5700   {
5701     iv = ix;
5702     if (ie > ix) {
5703       ix = ie;
5704     }
5705   }
5706 #pragma omp atomic compare capture relaxed
5707   {
5708     iv = ix;
5709     if (ix > ie) {
5710       ix = ie;
5711     }
5712   }
5713 #pragma omp atomic compare capture relaxed
5714   {
5715     iv = ix;
5716     if (ie < ix) {
5717       ix = ie;
5718     }
5719   }
5720 #pragma omp atomic compare capture relaxed
5721   {
5722     iv = ix;
5723     if (ix < ie) {
5724       ix = ie;
5725     }
5726   }
5727 #pragma omp atomic compare capture relaxed
5728   {
5729     iv = ix;
5730     if (ix == ie) {
5731       ix = id;
5732     }
5733   }
5734 #pragma omp atomic compare capture relaxed
5735   {
5736     iv = ix;
5737     if (ie == ix) {
5738       ix = id;
5739     }
5740   }
5741 #pragma omp atomic compare capture relaxed
5742   {
5743     if (ie > ix) {
5744       ix = ie;
5745     }
5746     iv = ix;
5747   }
5748 #pragma omp atomic compare capture relaxed
5749   {
5750     if (ix > ie) {
5751       ix = ie;
5752     }
5753     iv = ix;
5754   }
5755 #pragma omp atomic compare capture relaxed
5756   {
5757     if (ie < ix) {
5758       ix = ie;
5759     }
5760     iv = ix;
5761   }
5762 #pragma omp atomic compare capture relaxed
5763   {
5764     if (ix < ie) {
5765       ix = ie;
5766     }
5767     iv = ix;
5768   }
5769 #pragma omp atomic compare capture relaxed
5770   {
5771     if (ix == ie) {
5772       ix = id;
5773     }
5774     iv = ix;
5775   }
5776 #pragma omp atomic compare capture relaxed
5777   {
5778     if (ie == ix) {
5779       ix = id;
5780     }
5781     iv = ix;
5782   }
5783 #pragma omp atomic compare capture relaxed
5784   if (ix == ie) {
5785     ix = id;
5786   } else {
5787     iv = ix;
5788   }
5789 #pragma omp atomic compare capture relaxed
5790   if (ie == ix) {
5791     ix = id;
5792   } else {
5793     iv = ix;
5794   }
5795 #pragma omp atomic compare capture relaxed
5796   {
5797     ir = ix == ie;
5798     if (ir) {
5799       ix = id;
5800     }
5801   }
5802 #pragma omp atomic compare capture relaxed
5803   {
5804     ir = ie == ix;
5805     if (ir) {
5806       ix = id;
5807     }
5808   }
5809 #pragma omp atomic compare capture relaxed
5810   {
5811     ir = ix == ie;
5812     if (ir) {
5813       ix = id;
5814     } else {
5815       iv = ix;
5816     }
5817   }
5818 #pragma omp atomic compare capture relaxed
5819   {
5820     ir = ie == ix;
5821     if (ir) {
5822       ix = id;
5823     } else {
5824       iv = ix;
5825     }
5826   }
5827 
5828 #pragma omp atomic compare capture release
5829   {
5830     iv = ix;
5831     if (ie > ix) {
5832       ix = ie;
5833     }
5834   }
5835 #pragma omp atomic compare capture release
5836   {
5837     iv = ix;
5838     if (ix > ie) {
5839       ix = ie;
5840     }
5841   }
5842 #pragma omp atomic compare capture release
5843   {
5844     iv = ix;
5845     if (ie < ix) {
5846       ix = ie;
5847     }
5848   }
5849 #pragma omp atomic compare capture release
5850   {
5851     iv = ix;
5852     if (ix < ie) {
5853       ix = ie;
5854     }
5855   }
5856 #pragma omp atomic compare capture release
5857   {
5858     iv = ix;
5859     if (ix == ie) {
5860       ix = id;
5861     }
5862   }
5863 #pragma omp atomic compare capture release
5864   {
5865     iv = ix;
5866     if (ie == ix) {
5867       ix = id;
5868     }
5869   }
5870 #pragma omp atomic compare capture release
5871   {
5872     if (ie > ix) {
5873       ix = ie;
5874     }
5875     iv = ix;
5876   }
5877 #pragma omp atomic compare capture release
5878   {
5879     if (ix > ie) {
5880       ix = ie;
5881     }
5882     iv = ix;
5883   }
5884 #pragma omp atomic compare capture release
5885   {
5886     if (ie < ix) {
5887       ix = ie;
5888     }
5889     iv = ix;
5890   }
5891 #pragma omp atomic compare capture release
5892   {
5893     if (ix < ie) {
5894       ix = ie;
5895     }
5896     iv = ix;
5897   }
5898 #pragma omp atomic compare capture release
5899   {
5900     if (ix == ie) {
5901       ix = id;
5902     }
5903     iv = ix;
5904   }
5905 #pragma omp atomic compare capture release
5906   {
5907     if (ie == ix) {
5908       ix = id;
5909     }
5910     iv = ix;
5911   }
5912 #pragma omp atomic compare capture release
5913   if (ix == ie) {
5914     ix = id;
5915   } else {
5916     iv = ix;
5917   }
5918 #pragma omp atomic compare capture release
5919   if (ie == ix) {
5920     ix = id;
5921   } else {
5922     iv = ix;
5923   }
5924 #pragma omp atomic compare capture release
5925   {
5926     ir = ix == ie;
5927     if (ir) {
5928       ix = id;
5929     }
5930   }
5931 #pragma omp atomic compare capture release
5932   {
5933     ir = ie == ix;
5934     if (ir) {
5935       ix = id;
5936     }
5937   }
5938 #pragma omp atomic compare capture release
5939   {
5940     ir = ix == ie;
5941     if (ir) {
5942       ix = id;
5943     } else {
5944       iv = ix;
5945     }
5946   }
5947 #pragma omp atomic compare capture release
5948   {
5949     ir = ie == ix;
5950     if (ir) {
5951       ix = id;
5952     } else {
5953       iv = ix;
5954     }
5955   }
5956 
5957 #pragma omp atomic compare capture seq_cst
5958   {
5959     iv = ix;
5960     if (ie > ix) {
5961       ix = ie;
5962     }
5963   }
5964 #pragma omp atomic compare capture seq_cst
5965   {
5966     iv = ix;
5967     if (ix > ie) {
5968       ix = ie;
5969     }
5970   }
5971 #pragma omp atomic compare capture seq_cst
5972   {
5973     iv = ix;
5974     if (ie < ix) {
5975       ix = ie;
5976     }
5977   }
5978 #pragma omp atomic compare capture seq_cst
5979   {
5980     iv = ix;
5981     if (ix < ie) {
5982       ix = ie;
5983     }
5984   }
5985 #pragma omp atomic compare capture seq_cst
5986   {
5987     iv = ix;
5988     if (ix == ie) {
5989       ix = id;
5990     }
5991   }
5992 #pragma omp atomic compare capture seq_cst
5993   {
5994     iv = ix;
5995     if (ie == ix) {
5996       ix = id;
5997     }
5998   }
5999 #pragma omp atomic compare capture seq_cst
6000   {
6001     if (ie > ix) {
6002       ix = ie;
6003     }
6004     iv = ix;
6005   }
6006 #pragma omp atomic compare capture seq_cst
6007   {
6008     if (ix > ie) {
6009       ix = ie;
6010     }
6011     iv = ix;
6012   }
6013 #pragma omp atomic compare capture seq_cst
6014   {
6015     if (ie < ix) {
6016       ix = ie;
6017     }
6018     iv = ix;
6019   }
6020 #pragma omp atomic compare capture seq_cst
6021   {
6022     if (ix < ie) {
6023       ix = ie;
6024     }
6025     iv = ix;
6026   }
6027 #pragma omp atomic compare capture seq_cst
6028   {
6029     if (ix == ie) {
6030       ix = id;
6031     }
6032     iv = ix;
6033   }
6034 #pragma omp atomic compare capture seq_cst
6035   {
6036     if (ie == ix) {
6037       ix = id;
6038     }
6039     iv = ix;
6040   }
6041 #pragma omp atomic compare capture seq_cst
6042   if (ix == ie) {
6043     ix = id;
6044   } else {
6045     iv = ix;
6046   }
6047 #pragma omp atomic compare capture seq_cst
6048   if (ie == ix) {
6049     ix = id;
6050   } else {
6051     iv = ix;
6052   }
6053 #pragma omp atomic compare capture seq_cst
6054   {
6055     ir = ix == ie;
6056     if (ir) {
6057       ix = id;
6058     }
6059   }
6060 #pragma omp atomic compare capture seq_cst
6061   {
6062     ir = ie == ix;
6063     if (ir) {
6064       ix = id;
6065     }
6066   }
6067 #pragma omp atomic compare capture seq_cst
6068   {
6069     ir = ix == ie;
6070     if (ir) {
6071       ix = id;
6072     } else {
6073       iv = ix;
6074     }
6075   }
6076 #pragma omp atomic compare capture seq_cst
6077   {
6078     ir = ie == ix;
6079     if (ir) {
6080       ix = id;
6081     } else {
6082       iv = ix;
6083     }
6084   }
6085 
6086 #pragma omp atomic compare capture
6087   {
6088     uiv = uix;
6089     if (uie > uix) {
6090       uix = uie;
6091     }
6092   }
6093 #pragma omp atomic compare capture
6094   {
6095     uiv = uix;
6096     if (uix > uie) {
6097       uix = uie;
6098     }
6099   }
6100 #pragma omp atomic compare capture
6101   {
6102     uiv = uix;
6103     if (uie < uix) {
6104       uix = uie;
6105     }
6106   }
6107 #pragma omp atomic compare capture
6108   {
6109     uiv = uix;
6110     if (uix < uie) {
6111       uix = uie;
6112     }
6113   }
6114 #pragma omp atomic compare capture
6115   {
6116     uiv = uix;
6117     if (uix == uie) {
6118       uix = uid;
6119     }
6120   }
6121 #pragma omp atomic compare capture
6122   {
6123     uiv = uix;
6124     if (uie == uix) {
6125       uix = uid;
6126     }
6127   }
6128 #pragma omp atomic compare capture
6129   {
6130     if (uie > uix) {
6131       uix = uie;
6132     }
6133     uiv = uix;
6134   }
6135 #pragma omp atomic compare capture
6136   {
6137     if (uix > uie) {
6138       uix = uie;
6139     }
6140     uiv = uix;
6141   }
6142 #pragma omp atomic compare capture
6143   {
6144     if (uie < uix) {
6145       uix = uie;
6146     }
6147     uiv = uix;
6148   }
6149 #pragma omp atomic compare capture
6150   {
6151     if (uix < uie) {
6152       uix = uie;
6153     }
6154     uiv = uix;
6155   }
6156 #pragma omp atomic compare capture
6157   {
6158     if (uix == uie) {
6159       uix = uid;
6160     }
6161     uiv = uix;
6162   }
6163 #pragma omp atomic compare capture
6164   {
6165     if (uie == uix) {
6166       uix = uid;
6167     }
6168     uiv = uix;
6169   }
6170 #pragma omp atomic compare capture
6171   if (uix == uie) {
6172     uix = uid;
6173   } else {
6174     uiv = uix;
6175   }
6176 #pragma omp atomic compare capture
6177   if (uie == uix) {
6178     uix = uid;
6179   } else {
6180     uiv = uix;
6181   }
6182 #pragma omp atomic compare capture
6183   {
6184     uir = uix == uie;
6185     if (uir) {
6186       uix = uid;
6187     }
6188   }
6189 #pragma omp atomic compare capture
6190   {
6191     uir = uie == uix;
6192     if (uir) {
6193       uix = uid;
6194     }
6195   }
6196 #pragma omp atomic compare capture
6197   {
6198     uir = uix == uie;
6199     if (uir) {
6200       uix = uid;
6201     } else {
6202       uiv = uix;
6203     }
6204   }
6205 #pragma omp atomic compare capture
6206   {
6207     uir = uie == uix;
6208     if (uir) {
6209       uix = uid;
6210     } else {
6211       uiv = uix;
6212     }
6213   }
6214 
6215 #pragma omp atomic compare capture acq_rel
6216   {
6217     uiv = uix;
6218     if (uie > uix) {
6219       uix = uie;
6220     }
6221   }
6222 #pragma omp atomic compare capture acq_rel
6223   {
6224     uiv = uix;
6225     if (uix > uie) {
6226       uix = uie;
6227     }
6228   }
6229 #pragma omp atomic compare capture acq_rel
6230   {
6231     uiv = uix;
6232     if (uie < uix) {
6233       uix = uie;
6234     }
6235   }
6236 #pragma omp atomic compare capture acq_rel
6237   {
6238     uiv = uix;
6239     if (uix < uie) {
6240       uix = uie;
6241     }
6242   }
6243 #pragma omp atomic compare capture acq_rel
6244   {
6245     uiv = uix;
6246     if (uix == uie) {
6247       uix = uid;
6248     }
6249   }
6250 #pragma omp atomic compare capture acq_rel
6251   {
6252     uiv = uix;
6253     if (uie == uix) {
6254       uix = uid;
6255     }
6256   }
6257 #pragma omp atomic compare capture acq_rel
6258   {
6259     if (uie > uix) {
6260       uix = uie;
6261     }
6262     uiv = uix;
6263   }
6264 #pragma omp atomic compare capture acq_rel
6265   {
6266     if (uix > uie) {
6267       uix = uie;
6268     }
6269     uiv = uix;
6270   }
6271 #pragma omp atomic compare capture acq_rel
6272   {
6273     if (uie < uix) {
6274       uix = uie;
6275     }
6276     uiv = uix;
6277   }
6278 #pragma omp atomic compare capture acq_rel
6279   {
6280     if (uix < uie) {
6281       uix = uie;
6282     }
6283     uiv = uix;
6284   }
6285 #pragma omp atomic compare capture acq_rel
6286   {
6287     if (uix == uie) {
6288       uix = uid;
6289     }
6290     uiv = uix;
6291   }
6292 #pragma omp atomic compare capture acq_rel
6293   {
6294     if (uie == uix) {
6295       uix = uid;
6296     }
6297     uiv = uix;
6298   }
6299 #pragma omp atomic compare capture acq_rel
6300   if (uix == uie) {
6301     uix = uid;
6302   } else {
6303     uiv = uix;
6304   }
6305 #pragma omp atomic compare capture acq_rel
6306   if (uie == uix) {
6307     uix = uid;
6308   } else {
6309     uiv = uix;
6310   }
6311 #pragma omp atomic compare capture acq_rel
6312   {
6313     uir = uix == uie;
6314     if (uir) {
6315       uix = uid;
6316     }
6317   }
6318 #pragma omp atomic compare capture acq_rel
6319   {
6320     uir = uie == uix;
6321     if (uir) {
6322       uix = uid;
6323     }
6324   }
6325 #pragma omp atomic compare capture acq_rel
6326   {
6327     uir = uix == uie;
6328     if (uir) {
6329       uix = uid;
6330     } else {
6331       uiv = uix;
6332     }
6333   }
6334 #pragma omp atomic compare capture acq_rel
6335   {
6336     uir = uie == uix;
6337     if (uir) {
6338       uix = uid;
6339     } else {
6340       uiv = uix;
6341     }
6342   }
6343 
6344 #pragma omp atomic compare capture acquire
6345   {
6346     uiv = uix;
6347     if (uie > uix) {
6348       uix = uie;
6349     }
6350   }
6351 #pragma omp atomic compare capture acquire
6352   {
6353     uiv = uix;
6354     if (uix > uie) {
6355       uix = uie;
6356     }
6357   }
6358 #pragma omp atomic compare capture acquire
6359   {
6360     uiv = uix;
6361     if (uie < uix) {
6362       uix = uie;
6363     }
6364   }
6365 #pragma omp atomic compare capture acquire
6366   {
6367     uiv = uix;
6368     if (uix < uie) {
6369       uix = uie;
6370     }
6371   }
6372 #pragma omp atomic compare capture acquire
6373   {
6374     uiv = uix;
6375     if (uix == uie) {
6376       uix = uid;
6377     }
6378   }
6379 #pragma omp atomic compare capture acquire
6380   {
6381     uiv = uix;
6382     if (uie == uix) {
6383       uix = uid;
6384     }
6385   }
6386 #pragma omp atomic compare capture acquire
6387   {
6388     if (uie > uix) {
6389       uix = uie;
6390     }
6391     uiv = uix;
6392   }
6393 #pragma omp atomic compare capture acquire
6394   {
6395     if (uix > uie) {
6396       uix = uie;
6397     }
6398     uiv = uix;
6399   }
6400 #pragma omp atomic compare capture acquire
6401   {
6402     if (uie < uix) {
6403       uix = uie;
6404     }
6405     uiv = uix;
6406   }
6407 #pragma omp atomic compare capture acquire
6408   {
6409     if (uix < uie) {
6410       uix = uie;
6411     }
6412     uiv = uix;
6413   }
6414 #pragma omp atomic compare capture acquire
6415   {
6416     if (uix == uie) {
6417       uix = uid;
6418     }
6419     uiv = uix;
6420   }
6421 #pragma omp atomic compare capture acquire
6422   {
6423     if (uie == uix) {
6424       uix = uid;
6425     }
6426     uiv = uix;
6427   }
6428 #pragma omp atomic compare capture acquire
6429   if (uix == uie) {
6430     uix = uid;
6431   } else {
6432     uiv = uix;
6433   }
6434 #pragma omp atomic compare capture acquire
6435   if (uie == uix) {
6436     uix = uid;
6437   } else {
6438     uiv = uix;
6439   }
6440 #pragma omp atomic compare capture acquire
6441   {
6442     uir = uix == uie;
6443     if (uir) {
6444       uix = uid;
6445     }
6446   }
6447 #pragma omp atomic compare capture acquire
6448   {
6449     uir = uie == uix;
6450     if (uir) {
6451       uix = uid;
6452     }
6453   }
6454 #pragma omp atomic compare capture acquire
6455   {
6456     uir = uix == uie;
6457     if (uir) {
6458       uix = uid;
6459     } else {
6460       uiv = uix;
6461     }
6462   }
6463 #pragma omp atomic compare capture acquire
6464   {
6465     uir = uie == uix;
6466     if (uir) {
6467       uix = uid;
6468     } else {
6469       uiv = uix;
6470     }
6471   }
6472 
6473 #pragma omp atomic compare capture relaxed
6474   {
6475     uiv = uix;
6476     if (uie > uix) {
6477       uix = uie;
6478     }
6479   }
6480 #pragma omp atomic compare capture relaxed
6481   {
6482     uiv = uix;
6483     if (uix > uie) {
6484       uix = uie;
6485     }
6486   }
6487 #pragma omp atomic compare capture relaxed
6488   {
6489     uiv = uix;
6490     if (uie < uix) {
6491       uix = uie;
6492     }
6493   }
6494 #pragma omp atomic compare capture relaxed
6495   {
6496     uiv = uix;
6497     if (uix < uie) {
6498       uix = uie;
6499     }
6500   }
6501 #pragma omp atomic compare capture relaxed
6502   {
6503     uiv = uix;
6504     if (uix == uie) {
6505       uix = uid;
6506     }
6507   }
6508 #pragma omp atomic compare capture relaxed
6509   {
6510     uiv = uix;
6511     if (uie == uix) {
6512       uix = uid;
6513     }
6514   }
6515 #pragma omp atomic compare capture relaxed
6516   {
6517     if (uie > uix) {
6518       uix = uie;
6519     }
6520     uiv = uix;
6521   }
6522 #pragma omp atomic compare capture relaxed
6523   {
6524     if (uix > uie) {
6525       uix = uie;
6526     }
6527     uiv = uix;
6528   }
6529 #pragma omp atomic compare capture relaxed
6530   {
6531     if (uie < uix) {
6532       uix = uie;
6533     }
6534     uiv = uix;
6535   }
6536 #pragma omp atomic compare capture relaxed
6537   {
6538     if (uix < uie) {
6539       uix = uie;
6540     }
6541     uiv = uix;
6542   }
6543 #pragma omp atomic compare capture relaxed
6544   {
6545     if (uix == uie) {
6546       uix = uid;
6547     }
6548     uiv = uix;
6549   }
6550 #pragma omp atomic compare capture relaxed
6551   {
6552     if (uie == uix) {
6553       uix = uid;
6554     }
6555     uiv = uix;
6556   }
6557 #pragma omp atomic compare capture relaxed
6558   if (uix == uie) {
6559     uix = uid;
6560   } else {
6561     uiv = uix;
6562   }
6563 #pragma omp atomic compare capture relaxed
6564   if (uie == uix) {
6565     uix = uid;
6566   } else {
6567     uiv = uix;
6568   }
6569 #pragma omp atomic compare capture relaxed
6570   {
6571     uir = uix == uie;
6572     if (uir) {
6573       uix = uid;
6574     }
6575   }
6576 #pragma omp atomic compare capture relaxed
6577   {
6578     uir = uie == uix;
6579     if (uir) {
6580       uix = uid;
6581     }
6582   }
6583 #pragma omp atomic compare capture relaxed
6584   {
6585     uir = uix == uie;
6586     if (uir) {
6587       uix = uid;
6588     } else {
6589       uiv = uix;
6590     }
6591   }
6592 #pragma omp atomic compare capture relaxed
6593   {
6594     uir = uie == uix;
6595     if (uir) {
6596       uix = uid;
6597     } else {
6598       uiv = uix;
6599     }
6600   }
6601 
6602 #pragma omp atomic compare capture release
6603   {
6604     uiv = uix;
6605     if (uie > uix) {
6606       uix = uie;
6607     }
6608   }
6609 #pragma omp atomic compare capture release
6610   {
6611     uiv = uix;
6612     if (uix > uie) {
6613       uix = uie;
6614     }
6615   }
6616 #pragma omp atomic compare capture release
6617   {
6618     uiv = uix;
6619     if (uie < uix) {
6620       uix = uie;
6621     }
6622   }
6623 #pragma omp atomic compare capture release
6624   {
6625     uiv = uix;
6626     if (uix < uie) {
6627       uix = uie;
6628     }
6629   }
6630 #pragma omp atomic compare capture release
6631   {
6632     uiv = uix;
6633     if (uix == uie) {
6634       uix = uid;
6635     }
6636   }
6637 #pragma omp atomic compare capture release
6638   {
6639     uiv = uix;
6640     if (uie == uix) {
6641       uix = uid;
6642     }
6643   }
6644 #pragma omp atomic compare capture release
6645   {
6646     if (uie > uix) {
6647       uix = uie;
6648     }
6649     uiv = uix;
6650   }
6651 #pragma omp atomic compare capture release
6652   {
6653     if (uix > uie) {
6654       uix = uie;
6655     }
6656     uiv = uix;
6657   }
6658 #pragma omp atomic compare capture release
6659   {
6660     if (uie < uix) {
6661       uix = uie;
6662     }
6663     uiv = uix;
6664   }
6665 #pragma omp atomic compare capture release
6666   {
6667     if (uix < uie) {
6668       uix = uie;
6669     }
6670     uiv = uix;
6671   }
6672 #pragma omp atomic compare capture release
6673   {
6674     if (uix == uie) {
6675       uix = uid;
6676     }
6677     uiv = uix;
6678   }
6679 #pragma omp atomic compare capture release
6680   {
6681     if (uie == uix) {
6682       uix = uid;
6683     }
6684     uiv = uix;
6685   }
6686 #pragma omp atomic compare capture release
6687   if (uix == uie) {
6688     uix = uid;
6689   } else {
6690     uiv = uix;
6691   }
6692 #pragma omp atomic compare capture release
6693   if (uie == uix) {
6694     uix = uid;
6695   } else {
6696     uiv = uix;
6697   }
6698 #pragma omp atomic compare capture release
6699   {
6700     uir = uix == uie;
6701     if (uir) {
6702       uix = uid;
6703     }
6704   }
6705 #pragma omp atomic compare capture release
6706   {
6707     uir = uie == uix;
6708     if (uir) {
6709       uix = uid;
6710     }
6711   }
6712 #pragma omp atomic compare capture release
6713   {
6714     uir = uix == uie;
6715     if (uir) {
6716       uix = uid;
6717     } else {
6718       uiv = uix;
6719     }
6720   }
6721 #pragma omp atomic compare capture release
6722   {
6723     uir = uie == uix;
6724     if (uir) {
6725       uix = uid;
6726     } else {
6727       uiv = uix;
6728     }
6729   }
6730 
6731 #pragma omp atomic compare capture seq_cst
6732   {
6733     uiv = uix;
6734     if (uie > uix) {
6735       uix = uie;
6736     }
6737   }
6738 #pragma omp atomic compare capture seq_cst
6739   {
6740     uiv = uix;
6741     if (uix > uie) {
6742       uix = uie;
6743     }
6744   }
6745 #pragma omp atomic compare capture seq_cst
6746   {
6747     uiv = uix;
6748     if (uie < uix) {
6749       uix = uie;
6750     }
6751   }
6752 #pragma omp atomic compare capture seq_cst
6753   {
6754     uiv = uix;
6755     if (uix < uie) {
6756       uix = uie;
6757     }
6758   }
6759 #pragma omp atomic compare capture seq_cst
6760   {
6761     uiv = uix;
6762     if (uix == uie) {
6763       uix = uid;
6764     }
6765   }
6766 #pragma omp atomic compare capture seq_cst
6767   {
6768     uiv = uix;
6769     if (uie == uix) {
6770       uix = uid;
6771     }
6772   }
6773 #pragma omp atomic compare capture seq_cst
6774   {
6775     if (uie > uix) {
6776       uix = uie;
6777     }
6778     uiv = uix;
6779   }
6780 #pragma omp atomic compare capture seq_cst
6781   {
6782     if (uix > uie) {
6783       uix = uie;
6784     }
6785     uiv = uix;
6786   }
6787 #pragma omp atomic compare capture seq_cst
6788   {
6789     if (uie < uix) {
6790       uix = uie;
6791     }
6792     uiv = uix;
6793   }
6794 #pragma omp atomic compare capture seq_cst
6795   {
6796     if (uix < uie) {
6797       uix = uie;
6798     }
6799     uiv = uix;
6800   }
6801 #pragma omp atomic compare capture seq_cst
6802   {
6803     if (uix == uie) {
6804       uix = uid;
6805     }
6806     uiv = uix;
6807   }
6808 #pragma omp atomic compare capture seq_cst
6809   {
6810     if (uie == uix) {
6811       uix = uid;
6812     }
6813     uiv = uix;
6814   }
6815 #pragma omp atomic compare capture seq_cst
6816   if (uix == uie) {
6817     uix = uid;
6818   } else {
6819     uiv = uix;
6820   }
6821 #pragma omp atomic compare capture seq_cst
6822   if (uie == uix) {
6823     uix = uid;
6824   } else {
6825     uiv = uix;
6826   }
6827 #pragma omp atomic compare capture seq_cst
6828   {
6829     uir = uix == uie;
6830     if (uir) {
6831       uix = uid;
6832     }
6833   }
6834 #pragma omp atomic compare capture seq_cst
6835   {
6836     uir = uie == uix;
6837     if (uir) {
6838       uix = uid;
6839     }
6840   }
6841 #pragma omp atomic compare capture seq_cst
6842   {
6843     uir = uix == uie;
6844     if (uir) {
6845       uix = uid;
6846     } else {
6847       uiv = uix;
6848     }
6849   }
6850 #pragma omp atomic compare capture seq_cst
6851   {
6852     uir = uie == uix;
6853     if (uir) {
6854       uix = uid;
6855     } else {
6856       uiv = uix;
6857     }
6858   }
6859 
6860 #pragma omp atomic compare capture
6861   {
6862     lv = lx;
6863     if (le > lx) {
6864       lx = le;
6865     }
6866   }
6867 #pragma omp atomic compare capture
6868   {
6869     lv = lx;
6870     if (lx > le) {
6871       lx = le;
6872     }
6873   }
6874 #pragma omp atomic compare capture
6875   {
6876     lv = lx;
6877     if (le < lx) {
6878       lx = le;
6879     }
6880   }
6881 #pragma omp atomic compare capture
6882   {
6883     lv = lx;
6884     if (lx < le) {
6885       lx = le;
6886     }
6887   }
6888 #pragma omp atomic compare capture
6889   {
6890     lv = lx;
6891     if (lx == le) {
6892       lx = ld;
6893     }
6894   }
6895 #pragma omp atomic compare capture
6896   {
6897     lv = lx;
6898     if (le == lx) {
6899       lx = ld;
6900     }
6901   }
6902 #pragma omp atomic compare capture
6903   {
6904     if (le > lx) {
6905       lx = le;
6906     }
6907     lv = lx;
6908   }
6909 #pragma omp atomic compare capture
6910   {
6911     if (lx > le) {
6912       lx = le;
6913     }
6914     lv = lx;
6915   }
6916 #pragma omp atomic compare capture
6917   {
6918     if (le < lx) {
6919       lx = le;
6920     }
6921     lv = lx;
6922   }
6923 #pragma omp atomic compare capture
6924   {
6925     if (lx < le) {
6926       lx = le;
6927     }
6928     lv = lx;
6929   }
6930 #pragma omp atomic compare capture
6931   {
6932     if (lx == le) {
6933       lx = ld;
6934     }
6935     lv = lx;
6936   }
6937 #pragma omp atomic compare capture
6938   {
6939     if (le == lx) {
6940       lx = ld;
6941     }
6942     lv = lx;
6943   }
6944 #pragma omp atomic compare capture
6945   if (lx == le) {
6946     lx = ld;
6947   } else {
6948     lv = lx;
6949   }
6950 #pragma omp atomic compare capture
6951   if (le == lx) {
6952     lx = ld;
6953   } else {
6954     lv = lx;
6955   }
6956 #pragma omp atomic compare capture
6957   {
6958     lr = lx == le;
6959     if (lr) {
6960       lx = ld;
6961     }
6962   }
6963 #pragma omp atomic compare capture
6964   {
6965     lr = le == lx;
6966     if (lr) {
6967       lx = ld;
6968     }
6969   }
6970 #pragma omp atomic compare capture
6971   {
6972     lr = lx == le;
6973     if (lr) {
6974       lx = ld;
6975     } else {
6976       lv = lx;
6977     }
6978   }
6979 #pragma omp atomic compare capture
6980   {
6981     lr = le == lx;
6982     if (lr) {
6983       lx = ld;
6984     } else {
6985       lv = lx;
6986     }
6987   }
6988 
6989 #pragma omp atomic compare capture acq_rel
6990   {
6991     lv = lx;
6992     if (le > lx) {
6993       lx = le;
6994     }
6995   }
6996 #pragma omp atomic compare capture acq_rel
6997   {
6998     lv = lx;
6999     if (lx > le) {
7000       lx = le;
7001     }
7002   }
7003 #pragma omp atomic compare capture acq_rel
7004   {
7005     lv = lx;
7006     if (le < lx) {
7007       lx = le;
7008     }
7009   }
7010 #pragma omp atomic compare capture acq_rel
7011   {
7012     lv = lx;
7013     if (lx < le) {
7014       lx = le;
7015     }
7016   }
7017 #pragma omp atomic compare capture acq_rel
7018   {
7019     lv = lx;
7020     if (lx == le) {
7021       lx = ld;
7022     }
7023   }
7024 #pragma omp atomic compare capture acq_rel
7025   {
7026     lv = lx;
7027     if (le == lx) {
7028       lx = ld;
7029     }
7030   }
7031 #pragma omp atomic compare capture acq_rel
7032   {
7033     if (le > lx) {
7034       lx = le;
7035     }
7036     lv = lx;
7037   }
7038 #pragma omp atomic compare capture acq_rel
7039   {
7040     if (lx > le) {
7041       lx = le;
7042     }
7043     lv = lx;
7044   }
7045 #pragma omp atomic compare capture acq_rel
7046   {
7047     if (le < lx) {
7048       lx = le;
7049     }
7050     lv = lx;
7051   }
7052 #pragma omp atomic compare capture acq_rel
7053   {
7054     if (lx < le) {
7055       lx = le;
7056     }
7057     lv = lx;
7058   }
7059 #pragma omp atomic compare capture acq_rel
7060   {
7061     if (lx == le) {
7062       lx = ld;
7063     }
7064     lv = lx;
7065   }
7066 #pragma omp atomic compare capture acq_rel
7067   {
7068     if (le == lx) {
7069       lx = ld;
7070     }
7071     lv = lx;
7072   }
7073 #pragma omp atomic compare capture acq_rel
7074   if (lx == le) {
7075     lx = ld;
7076   } else {
7077     lv = lx;
7078   }
7079 #pragma omp atomic compare capture acq_rel
7080   if (le == lx) {
7081     lx = ld;
7082   } else {
7083     lv = lx;
7084   }
7085 #pragma omp atomic compare capture acq_rel
7086   {
7087     lr = lx == le;
7088     if (lr) {
7089       lx = ld;
7090     }
7091   }
7092 #pragma omp atomic compare capture acq_rel
7093   {
7094     lr = le == lx;
7095     if (lr) {
7096       lx = ld;
7097     }
7098   }
7099 #pragma omp atomic compare capture acq_rel
7100   {
7101     lr = lx == le;
7102     if (lr) {
7103       lx = ld;
7104     } else {
7105       lv = lx;
7106     }
7107   }
7108 #pragma omp atomic compare capture acq_rel
7109   {
7110     lr = le == lx;
7111     if (lr) {
7112       lx = ld;
7113     } else {
7114       lv = lx;
7115     }
7116   }
7117 
7118 #pragma omp atomic compare capture acquire
7119   {
7120     lv = lx;
7121     if (le > lx) {
7122       lx = le;
7123     }
7124   }
7125 #pragma omp atomic compare capture acquire
7126   {
7127     lv = lx;
7128     if (lx > le) {
7129       lx = le;
7130     }
7131   }
7132 #pragma omp atomic compare capture acquire
7133   {
7134     lv = lx;
7135     if (le < lx) {
7136       lx = le;
7137     }
7138   }
7139 #pragma omp atomic compare capture acquire
7140   {
7141     lv = lx;
7142     if (lx < le) {
7143       lx = le;
7144     }
7145   }
7146 #pragma omp atomic compare capture acquire
7147   {
7148     lv = lx;
7149     if (lx == le) {
7150       lx = ld;
7151     }
7152   }
7153 #pragma omp atomic compare capture acquire
7154   {
7155     lv = lx;
7156     if (le == lx) {
7157       lx = ld;
7158     }
7159   }
7160 #pragma omp atomic compare capture acquire
7161   {
7162     if (le > lx) {
7163       lx = le;
7164     }
7165     lv = lx;
7166   }
7167 #pragma omp atomic compare capture acquire
7168   {
7169     if (lx > le) {
7170       lx = le;
7171     }
7172     lv = lx;
7173   }
7174 #pragma omp atomic compare capture acquire
7175   {
7176     if (le < lx) {
7177       lx = le;
7178     }
7179     lv = lx;
7180   }
7181 #pragma omp atomic compare capture acquire
7182   {
7183     if (lx < le) {
7184       lx = le;
7185     }
7186     lv = lx;
7187   }
7188 #pragma omp atomic compare capture acquire
7189   {
7190     if (lx == le) {
7191       lx = ld;
7192     }
7193     lv = lx;
7194   }
7195 #pragma omp atomic compare capture acquire
7196   {
7197     if (le == lx) {
7198       lx = ld;
7199     }
7200     lv = lx;
7201   }
7202 #pragma omp atomic compare capture acquire
7203   if (lx == le) {
7204     lx = ld;
7205   } else {
7206     lv = lx;
7207   }
7208 #pragma omp atomic compare capture acquire
7209   if (le == lx) {
7210     lx = ld;
7211   } else {
7212     lv = lx;
7213   }
7214 #pragma omp atomic compare capture acquire
7215   {
7216     lr = lx == le;
7217     if (lr) {
7218       lx = ld;
7219     }
7220   }
7221 #pragma omp atomic compare capture acquire
7222   {
7223     lr = le == lx;
7224     if (lr) {
7225       lx = ld;
7226     }
7227   }
7228 #pragma omp atomic compare capture acquire
7229   {
7230     lr = lx == le;
7231     if (lr) {
7232       lx = ld;
7233     } else {
7234       lv = lx;
7235     }
7236   }
7237 #pragma omp atomic compare capture acquire
7238   {
7239     lr = le == lx;
7240     if (lr) {
7241       lx = ld;
7242     } else {
7243       lv = lx;
7244     }
7245   }
7246 
7247 #pragma omp atomic compare capture relaxed
7248   {
7249     lv = lx;
7250     if (le > lx) {
7251       lx = le;
7252     }
7253   }
7254 #pragma omp atomic compare capture relaxed
7255   {
7256     lv = lx;
7257     if (lx > le) {
7258       lx = le;
7259     }
7260   }
7261 #pragma omp atomic compare capture relaxed
7262   {
7263     lv = lx;
7264     if (le < lx) {
7265       lx = le;
7266     }
7267   }
7268 #pragma omp atomic compare capture relaxed
7269   {
7270     lv = lx;
7271     if (lx < le) {
7272       lx = le;
7273     }
7274   }
7275 #pragma omp atomic compare capture relaxed
7276   {
7277     lv = lx;
7278     if (lx == le) {
7279       lx = ld;
7280     }
7281   }
7282 #pragma omp atomic compare capture relaxed
7283   {
7284     lv = lx;
7285     if (le == lx) {
7286       lx = ld;
7287     }
7288   }
7289 #pragma omp atomic compare capture relaxed
7290   {
7291     if (le > lx) {
7292       lx = le;
7293     }
7294     lv = lx;
7295   }
7296 #pragma omp atomic compare capture relaxed
7297   {
7298     if (lx > le) {
7299       lx = le;
7300     }
7301     lv = lx;
7302   }
7303 #pragma omp atomic compare capture relaxed
7304   {
7305     if (le < lx) {
7306       lx = le;
7307     }
7308     lv = lx;
7309   }
7310 #pragma omp atomic compare capture relaxed
7311   {
7312     if (lx < le) {
7313       lx = le;
7314     }
7315     lv = lx;
7316   }
7317 #pragma omp atomic compare capture relaxed
7318   {
7319     if (lx == le) {
7320       lx = ld;
7321     }
7322     lv = lx;
7323   }
7324 #pragma omp atomic compare capture relaxed
7325   {
7326     if (le == lx) {
7327       lx = ld;
7328     }
7329     lv = lx;
7330   }
7331 #pragma omp atomic compare capture relaxed
7332   if (lx == le) {
7333     lx = ld;
7334   } else {
7335     lv = lx;
7336   }
7337 #pragma omp atomic compare capture relaxed
7338   if (le == lx) {
7339     lx = ld;
7340   } else {
7341     lv = lx;
7342   }
7343 #pragma omp atomic compare capture relaxed
7344   {
7345     lr = lx == le;
7346     if (lr) {
7347       lx = ld;
7348     }
7349   }
7350 #pragma omp atomic compare capture relaxed
7351   {
7352     lr = le == lx;
7353     if (lr) {
7354       lx = ld;
7355     }
7356   }
7357 #pragma omp atomic compare capture relaxed
7358   {
7359     lr = lx == le;
7360     if (lr) {
7361       lx = ld;
7362     } else {
7363       lv = lx;
7364     }
7365   }
7366 #pragma omp atomic compare capture relaxed
7367   {
7368     lr = le == lx;
7369     if (lr) {
7370       lx = ld;
7371     } else {
7372       lv = lx;
7373     }
7374   }
7375 
7376 #pragma omp atomic compare capture release
7377   {
7378     lv = lx;
7379     if (le > lx) {
7380       lx = le;
7381     }
7382   }
7383 #pragma omp atomic compare capture release
7384   {
7385     lv = lx;
7386     if (lx > le) {
7387       lx = le;
7388     }
7389   }
7390 #pragma omp atomic compare capture release
7391   {
7392     lv = lx;
7393     if (le < lx) {
7394       lx = le;
7395     }
7396   }
7397 #pragma omp atomic compare capture release
7398   {
7399     lv = lx;
7400     if (lx < le) {
7401       lx = le;
7402     }
7403   }
7404 #pragma omp atomic compare capture release
7405   {
7406     lv = lx;
7407     if (lx == le) {
7408       lx = ld;
7409     }
7410   }
7411 #pragma omp atomic compare capture release
7412   {
7413     lv = lx;
7414     if (le == lx) {
7415       lx = ld;
7416     }
7417   }
7418 #pragma omp atomic compare capture release
7419   {
7420     if (le > lx) {
7421       lx = le;
7422     }
7423     lv = lx;
7424   }
7425 #pragma omp atomic compare capture release
7426   {
7427     if (lx > le) {
7428       lx = le;
7429     }
7430     lv = lx;
7431   }
7432 #pragma omp atomic compare capture release
7433   {
7434     if (le < lx) {
7435       lx = le;
7436     }
7437     lv = lx;
7438   }
7439 #pragma omp atomic compare capture release
7440   {
7441     if (lx < le) {
7442       lx = le;
7443     }
7444     lv = lx;
7445   }
7446 #pragma omp atomic compare capture release
7447   {
7448     if (lx == le) {
7449       lx = ld;
7450     }
7451     lv = lx;
7452   }
7453 #pragma omp atomic compare capture release
7454   {
7455     if (le == lx) {
7456       lx = ld;
7457     }
7458     lv = lx;
7459   }
7460 #pragma omp atomic compare capture release
7461   if (lx == le) {
7462     lx = ld;
7463   } else {
7464     lv = lx;
7465   }
7466 #pragma omp atomic compare capture release
7467   if (le == lx) {
7468     lx = ld;
7469   } else {
7470     lv = lx;
7471   }
7472 #pragma omp atomic compare capture release
7473   {
7474     lr = lx == le;
7475     if (lr) {
7476       lx = ld;
7477     }
7478   }
7479 #pragma omp atomic compare capture release
7480   {
7481     lr = le == lx;
7482     if (lr) {
7483       lx = ld;
7484     }
7485   }
7486 #pragma omp atomic compare capture release
7487   {
7488     lr = lx == le;
7489     if (lr) {
7490       lx = ld;
7491     } else {
7492       lv = lx;
7493     }
7494   }
7495 #pragma omp atomic compare capture release
7496   {
7497     lr = le == lx;
7498     if (lr) {
7499       lx = ld;
7500     } else {
7501       lv = lx;
7502     }
7503   }
7504 
7505 #pragma omp atomic compare capture seq_cst
7506   {
7507     lv = lx;
7508     if (le > lx) {
7509       lx = le;
7510     }
7511   }
7512 #pragma omp atomic compare capture seq_cst
7513   {
7514     lv = lx;
7515     if (lx > le) {
7516       lx = le;
7517     }
7518   }
7519 #pragma omp atomic compare capture seq_cst
7520   {
7521     lv = lx;
7522     if (le < lx) {
7523       lx = le;
7524     }
7525   }
7526 #pragma omp atomic compare capture seq_cst
7527   {
7528     lv = lx;
7529     if (lx < le) {
7530       lx = le;
7531     }
7532   }
7533 #pragma omp atomic compare capture seq_cst
7534   {
7535     lv = lx;
7536     if (lx == le) {
7537       lx = ld;
7538     }
7539   }
7540 #pragma omp atomic compare capture seq_cst
7541   {
7542     lv = lx;
7543     if (le == lx) {
7544       lx = ld;
7545     }
7546   }
7547 #pragma omp atomic compare capture seq_cst
7548   {
7549     if (le > lx) {
7550       lx = le;
7551     }
7552     lv = lx;
7553   }
7554 #pragma omp atomic compare capture seq_cst
7555   {
7556     if (lx > le) {
7557       lx = le;
7558     }
7559     lv = lx;
7560   }
7561 #pragma omp atomic compare capture seq_cst
7562   {
7563     if (le < lx) {
7564       lx = le;
7565     }
7566     lv = lx;
7567   }
7568 #pragma omp atomic compare capture seq_cst
7569   {
7570     if (lx < le) {
7571       lx = le;
7572     }
7573     lv = lx;
7574   }
7575 #pragma omp atomic compare capture seq_cst
7576   {
7577     if (lx == le) {
7578       lx = ld;
7579     }
7580     lv = lx;
7581   }
7582 #pragma omp atomic compare capture seq_cst
7583   {
7584     if (le == lx) {
7585       lx = ld;
7586     }
7587     lv = lx;
7588   }
7589 #pragma omp atomic compare capture seq_cst
7590   if (lx == le) {
7591     lx = ld;
7592   } else {
7593     lv = lx;
7594   }
7595 #pragma omp atomic compare capture seq_cst
7596   if (le == lx) {
7597     lx = ld;
7598   } else {
7599     lv = lx;
7600   }
7601 #pragma omp atomic compare capture seq_cst
7602   {
7603     lr = lx == le;
7604     if (lr) {
7605       lx = ld;
7606     }
7607   }
7608 #pragma omp atomic compare capture seq_cst
7609   {
7610     lr = le == lx;
7611     if (lr) {
7612       lx = ld;
7613     }
7614   }
7615 #pragma omp atomic compare capture seq_cst
7616   {
7617     lr = lx == le;
7618     if (lr) {
7619       lx = ld;
7620     } else {
7621       lv = lx;
7622     }
7623   }
7624 #pragma omp atomic compare capture seq_cst
7625   {
7626     lr = le == lx;
7627     if (lr) {
7628       lx = ld;
7629     } else {
7630       lv = lx;
7631     }
7632   }
7633 
7634 #pragma omp atomic compare capture
7635   {
7636     ulv = ulx;
7637     if (ule > ulx) {
7638       ulx = ule;
7639     }
7640   }
7641 #pragma omp atomic compare capture
7642   {
7643     ulv = ulx;
7644     if (ulx > ule) {
7645       ulx = ule;
7646     }
7647   }
7648 #pragma omp atomic compare capture
7649   {
7650     ulv = ulx;
7651     if (ule < ulx) {
7652       ulx = ule;
7653     }
7654   }
7655 #pragma omp atomic compare capture
7656   {
7657     ulv = ulx;
7658     if (ulx < ule) {
7659       ulx = ule;
7660     }
7661   }
7662 #pragma omp atomic compare capture
7663   {
7664     ulv = ulx;
7665     if (ulx == ule) {
7666       ulx = uld;
7667     }
7668   }
7669 #pragma omp atomic compare capture
7670   {
7671     ulv = ulx;
7672     if (ule == ulx) {
7673       ulx = uld;
7674     }
7675   }
7676 #pragma omp atomic compare capture
7677   {
7678     if (ule > ulx) {
7679       ulx = ule;
7680     }
7681     ulv = ulx;
7682   }
7683 #pragma omp atomic compare capture
7684   {
7685     if (ulx > ule) {
7686       ulx = ule;
7687     }
7688     ulv = ulx;
7689   }
7690 #pragma omp atomic compare capture
7691   {
7692     if (ule < ulx) {
7693       ulx = ule;
7694     }
7695     ulv = ulx;
7696   }
7697 #pragma omp atomic compare capture
7698   {
7699     if (ulx < ule) {
7700       ulx = ule;
7701     }
7702     ulv = ulx;
7703   }
7704 #pragma omp atomic compare capture
7705   {
7706     if (ulx == ule) {
7707       ulx = uld;
7708     }
7709     ulv = ulx;
7710   }
7711 #pragma omp atomic compare capture
7712   {
7713     if (ule == ulx) {
7714       ulx = uld;
7715     }
7716     ulv = ulx;
7717   }
7718 #pragma omp atomic compare capture
7719   if (ulx == ule) {
7720     ulx = uld;
7721   } else {
7722     ulv = ulx;
7723   }
7724 #pragma omp atomic compare capture
7725   if (ule == ulx) {
7726     ulx = uld;
7727   } else {
7728     ulv = ulx;
7729   }
7730 #pragma omp atomic compare capture
7731   {
7732     ulr = ulx == ule;
7733     if (ulr) {
7734       ulx = uld;
7735     }
7736   }
7737 #pragma omp atomic compare capture
7738   {
7739     ulr = ule == ulx;
7740     if (ulr) {
7741       ulx = uld;
7742     }
7743   }
7744 #pragma omp atomic compare capture
7745   {
7746     ulr = ulx == ule;
7747     if (ulr) {
7748       ulx = uld;
7749     } else {
7750       ulv = ulx;
7751     }
7752   }
7753 #pragma omp atomic compare capture
7754   {
7755     ulr = ule == ulx;
7756     if (ulr) {
7757       ulx = uld;
7758     } else {
7759       ulv = ulx;
7760     }
7761   }
7762 
7763 #pragma omp atomic compare capture acq_rel
7764   {
7765     ulv = ulx;
7766     if (ule > ulx) {
7767       ulx = ule;
7768     }
7769   }
7770 #pragma omp atomic compare capture acq_rel
7771   {
7772     ulv = ulx;
7773     if (ulx > ule) {
7774       ulx = ule;
7775     }
7776   }
7777 #pragma omp atomic compare capture acq_rel
7778   {
7779     ulv = ulx;
7780     if (ule < ulx) {
7781       ulx = ule;
7782     }
7783   }
7784 #pragma omp atomic compare capture acq_rel
7785   {
7786     ulv = ulx;
7787     if (ulx < ule) {
7788       ulx = ule;
7789     }
7790   }
7791 #pragma omp atomic compare capture acq_rel
7792   {
7793     ulv = ulx;
7794     if (ulx == ule) {
7795       ulx = uld;
7796     }
7797   }
7798 #pragma omp atomic compare capture acq_rel
7799   {
7800     ulv = ulx;
7801     if (ule == ulx) {
7802       ulx = uld;
7803     }
7804   }
7805 #pragma omp atomic compare capture acq_rel
7806   {
7807     if (ule > ulx) {
7808       ulx = ule;
7809     }
7810     ulv = ulx;
7811   }
7812 #pragma omp atomic compare capture acq_rel
7813   {
7814     if (ulx > ule) {
7815       ulx = ule;
7816     }
7817     ulv = ulx;
7818   }
7819 #pragma omp atomic compare capture acq_rel
7820   {
7821     if (ule < ulx) {
7822       ulx = ule;
7823     }
7824     ulv = ulx;
7825   }
7826 #pragma omp atomic compare capture acq_rel
7827   {
7828     if (ulx < ule) {
7829       ulx = ule;
7830     }
7831     ulv = ulx;
7832   }
7833 #pragma omp atomic compare capture acq_rel
7834   {
7835     if (ulx == ule) {
7836       ulx = uld;
7837     }
7838     ulv = ulx;
7839   }
7840 #pragma omp atomic compare capture acq_rel
7841   {
7842     if (ule == ulx) {
7843       ulx = uld;
7844     }
7845     ulv = ulx;
7846   }
7847 #pragma omp atomic compare capture acq_rel
7848   if (ulx == ule) {
7849     ulx = uld;
7850   } else {
7851     ulv = ulx;
7852   }
7853 #pragma omp atomic compare capture acq_rel
7854   if (ule == ulx) {
7855     ulx = uld;
7856   } else {
7857     ulv = ulx;
7858   }
7859 #pragma omp atomic compare capture acq_rel
7860   {
7861     ulr = ulx == ule;
7862     if (ulr) {
7863       ulx = uld;
7864     }
7865   }
7866 #pragma omp atomic compare capture acq_rel
7867   {
7868     ulr = ule == ulx;
7869     if (ulr) {
7870       ulx = uld;
7871     }
7872   }
7873 #pragma omp atomic compare capture acq_rel
7874   {
7875     ulr = ulx == ule;
7876     if (ulr) {
7877       ulx = uld;
7878     } else {
7879       ulv = ulx;
7880     }
7881   }
7882 #pragma omp atomic compare capture acq_rel
7883   {
7884     ulr = ule == ulx;
7885     if (ulr) {
7886       ulx = uld;
7887     } else {
7888       ulv = ulx;
7889     }
7890   }
7891 
7892 #pragma omp atomic compare capture acquire
7893   {
7894     ulv = ulx;
7895     if (ule > ulx) {
7896       ulx = ule;
7897     }
7898   }
7899 #pragma omp atomic compare capture acquire
7900   {
7901     ulv = ulx;
7902     if (ulx > ule) {
7903       ulx = ule;
7904     }
7905   }
7906 #pragma omp atomic compare capture acquire
7907   {
7908     ulv = ulx;
7909     if (ule < ulx) {
7910       ulx = ule;
7911     }
7912   }
7913 #pragma omp atomic compare capture acquire
7914   {
7915     ulv = ulx;
7916     if (ulx < ule) {
7917       ulx = ule;
7918     }
7919   }
7920 #pragma omp atomic compare capture acquire
7921   {
7922     ulv = ulx;
7923     if (ulx == ule) {
7924       ulx = uld;
7925     }
7926   }
7927 #pragma omp atomic compare capture acquire
7928   {
7929     ulv = ulx;
7930     if (ule == ulx) {
7931       ulx = uld;
7932     }
7933   }
7934 #pragma omp atomic compare capture acquire
7935   {
7936     if (ule > ulx) {
7937       ulx = ule;
7938     }
7939     ulv = ulx;
7940   }
7941 #pragma omp atomic compare capture acquire
7942   {
7943     if (ulx > ule) {
7944       ulx = ule;
7945     }
7946     ulv = ulx;
7947   }
7948 #pragma omp atomic compare capture acquire
7949   {
7950     if (ule < ulx) {
7951       ulx = ule;
7952     }
7953     ulv = ulx;
7954   }
7955 #pragma omp atomic compare capture acquire
7956   {
7957     if (ulx < ule) {
7958       ulx = ule;
7959     }
7960     ulv = ulx;
7961   }
7962 #pragma omp atomic compare capture acquire
7963   {
7964     if (ulx == ule) {
7965       ulx = uld;
7966     }
7967     ulv = ulx;
7968   }
7969 #pragma omp atomic compare capture acquire
7970   {
7971     if (ule == ulx) {
7972       ulx = uld;
7973     }
7974     ulv = ulx;
7975   }
7976 #pragma omp atomic compare capture acquire
7977   if (ulx == ule) {
7978     ulx = uld;
7979   } else {
7980     ulv = ulx;
7981   }
7982 #pragma omp atomic compare capture acquire
7983   if (ule == ulx) {
7984     ulx = uld;
7985   } else {
7986     ulv = ulx;
7987   }
7988 #pragma omp atomic compare capture acquire
7989   {
7990     ulr = ulx == ule;
7991     if (ulr) {
7992       ulx = uld;
7993     }
7994   }
7995 #pragma omp atomic compare capture acquire
7996   {
7997     ulr = ule == ulx;
7998     if (ulr) {
7999       ulx = uld;
8000     }
8001   }
8002 #pragma omp atomic compare capture acquire
8003   {
8004     ulr = ulx == ule;
8005     if (ulr) {
8006       ulx = uld;
8007     } else {
8008       ulv = ulx;
8009     }
8010   }
8011 #pragma omp atomic compare capture acquire
8012   {
8013     ulr = ule == ulx;
8014     if (ulr) {
8015       ulx = uld;
8016     } else {
8017       ulv = ulx;
8018     }
8019   }
8020 
8021 #pragma omp atomic compare capture relaxed
8022   {
8023     ulv = ulx;
8024     if (ule > ulx) {
8025       ulx = ule;
8026     }
8027   }
8028 #pragma omp atomic compare capture relaxed
8029   {
8030     ulv = ulx;
8031     if (ulx > ule) {
8032       ulx = ule;
8033     }
8034   }
8035 #pragma omp atomic compare capture relaxed
8036   {
8037     ulv = ulx;
8038     if (ule < ulx) {
8039       ulx = ule;
8040     }
8041   }
8042 #pragma omp atomic compare capture relaxed
8043   {
8044     ulv = ulx;
8045     if (ulx < ule) {
8046       ulx = ule;
8047     }
8048   }
8049 #pragma omp atomic compare capture relaxed
8050   {
8051     ulv = ulx;
8052     if (ulx == ule) {
8053       ulx = uld;
8054     }
8055   }
8056 #pragma omp atomic compare capture relaxed
8057   {
8058     ulv = ulx;
8059     if (ule == ulx) {
8060       ulx = uld;
8061     }
8062   }
8063 #pragma omp atomic compare capture relaxed
8064   {
8065     if (ule > ulx) {
8066       ulx = ule;
8067     }
8068     ulv = ulx;
8069   }
8070 #pragma omp atomic compare capture relaxed
8071   {
8072     if (ulx > ule) {
8073       ulx = ule;
8074     }
8075     ulv = ulx;
8076   }
8077 #pragma omp atomic compare capture relaxed
8078   {
8079     if (ule < ulx) {
8080       ulx = ule;
8081     }
8082     ulv = ulx;
8083   }
8084 #pragma omp atomic compare capture relaxed
8085   {
8086     if (ulx < ule) {
8087       ulx = ule;
8088     }
8089     ulv = ulx;
8090   }
8091 #pragma omp atomic compare capture relaxed
8092   {
8093     if (ulx == ule) {
8094       ulx = uld;
8095     }
8096     ulv = ulx;
8097   }
8098 #pragma omp atomic compare capture relaxed
8099   {
8100     if (ule == ulx) {
8101       ulx = uld;
8102     }
8103     ulv = ulx;
8104   }
8105 #pragma omp atomic compare capture relaxed
8106   if (ulx == ule) {
8107     ulx = uld;
8108   } else {
8109     ulv = ulx;
8110   }
8111 #pragma omp atomic compare capture relaxed
8112   if (ule == ulx) {
8113     ulx = uld;
8114   } else {
8115     ulv = ulx;
8116   }
8117 #pragma omp atomic compare capture relaxed
8118   {
8119     ulr = ulx == ule;
8120     if (ulr) {
8121       ulx = uld;
8122     }
8123   }
8124 #pragma omp atomic compare capture relaxed
8125   {
8126     ulr = ule == ulx;
8127     if (ulr) {
8128       ulx = uld;
8129     }
8130   }
8131 #pragma omp atomic compare capture relaxed
8132   {
8133     ulr = ulx == ule;
8134     if (ulr) {
8135       ulx = uld;
8136     } else {
8137       ulv = ulx;
8138     }
8139   }
8140 #pragma omp atomic compare capture relaxed
8141   {
8142     ulr = ule == ulx;
8143     if (ulr) {
8144       ulx = uld;
8145     } else {
8146       ulv = ulx;
8147     }
8148   }
8149 
8150 #pragma omp atomic compare capture release
8151   {
8152     ulv = ulx;
8153     if (ule > ulx) {
8154       ulx = ule;
8155     }
8156   }
8157 #pragma omp atomic compare capture release
8158   {
8159     ulv = ulx;
8160     if (ulx > ule) {
8161       ulx = ule;
8162     }
8163   }
8164 #pragma omp atomic compare capture release
8165   {
8166     ulv = ulx;
8167     if (ule < ulx) {
8168       ulx = ule;
8169     }
8170   }
8171 #pragma omp atomic compare capture release
8172   {
8173     ulv = ulx;
8174     if (ulx < ule) {
8175       ulx = ule;
8176     }
8177   }
8178 #pragma omp atomic compare capture release
8179   {
8180     ulv = ulx;
8181     if (ulx == ule) {
8182       ulx = uld;
8183     }
8184   }
8185 #pragma omp atomic compare capture release
8186   {
8187     ulv = ulx;
8188     if (ule == ulx) {
8189       ulx = uld;
8190     }
8191   }
8192 #pragma omp atomic compare capture release
8193   {
8194     if (ule > ulx) {
8195       ulx = ule;
8196     }
8197     ulv = ulx;
8198   }
8199 #pragma omp atomic compare capture release
8200   {
8201     if (ulx > ule) {
8202       ulx = ule;
8203     }
8204     ulv = ulx;
8205   }
8206 #pragma omp atomic compare capture release
8207   {
8208     if (ule < ulx) {
8209       ulx = ule;
8210     }
8211     ulv = ulx;
8212   }
8213 #pragma omp atomic compare capture release
8214   {
8215     if (ulx < ule) {
8216       ulx = ule;
8217     }
8218     ulv = ulx;
8219   }
8220 #pragma omp atomic compare capture release
8221   {
8222     if (ulx == ule) {
8223       ulx = uld;
8224     }
8225     ulv = ulx;
8226   }
8227 #pragma omp atomic compare capture release
8228   {
8229     if (ule == ulx) {
8230       ulx = uld;
8231     }
8232     ulv = ulx;
8233   }
8234 #pragma omp atomic compare capture release
8235   if (ulx == ule) {
8236     ulx = uld;
8237   } else {
8238     ulv = ulx;
8239   }
8240 #pragma omp atomic compare capture release
8241   if (ule == ulx) {
8242     ulx = uld;
8243   } else {
8244     ulv = ulx;
8245   }
8246 #pragma omp atomic compare capture release
8247   {
8248     ulr = ulx == ule;
8249     if (ulr) {
8250       ulx = uld;
8251     }
8252   }
8253 #pragma omp atomic compare capture release
8254   {
8255     ulr = ule == ulx;
8256     if (ulr) {
8257       ulx = uld;
8258     }
8259   }
8260 #pragma omp atomic compare capture release
8261   {
8262     ulr = ulx == ule;
8263     if (ulr) {
8264       ulx = uld;
8265     } else {
8266       ulv = ulx;
8267     }
8268   }
8269 #pragma omp atomic compare capture release
8270   {
8271     ulr = ule == ulx;
8272     if (ulr) {
8273       ulx = uld;
8274     } else {
8275       ulv = ulx;
8276     }
8277   }
8278 
8279 #pragma omp atomic compare capture seq_cst
8280   {
8281     ulv = ulx;
8282     if (ule > ulx) {
8283       ulx = ule;
8284     }
8285   }
8286 #pragma omp atomic compare capture seq_cst
8287   {
8288     ulv = ulx;
8289     if (ulx > ule) {
8290       ulx = ule;
8291     }
8292   }
8293 #pragma omp atomic compare capture seq_cst
8294   {
8295     ulv = ulx;
8296     if (ule < ulx) {
8297       ulx = ule;
8298     }
8299   }
8300 #pragma omp atomic compare capture seq_cst
8301   {
8302     ulv = ulx;
8303     if (ulx < ule) {
8304       ulx = ule;
8305     }
8306   }
8307 #pragma omp atomic compare capture seq_cst
8308   {
8309     ulv = ulx;
8310     if (ulx == ule) {
8311       ulx = uld;
8312     }
8313   }
8314 #pragma omp atomic compare capture seq_cst
8315   {
8316     ulv = ulx;
8317     if (ule == ulx) {
8318       ulx = uld;
8319     }
8320   }
8321 #pragma omp atomic compare capture seq_cst
8322   {
8323     if (ule > ulx) {
8324       ulx = ule;
8325     }
8326     ulv = ulx;
8327   }
8328 #pragma omp atomic compare capture seq_cst
8329   {
8330     if (ulx > ule) {
8331       ulx = ule;
8332     }
8333     ulv = ulx;
8334   }
8335 #pragma omp atomic compare capture seq_cst
8336   {
8337     if (ule < ulx) {
8338       ulx = ule;
8339     }
8340     ulv = ulx;
8341   }
8342 #pragma omp atomic compare capture seq_cst
8343   {
8344     if (ulx < ule) {
8345       ulx = ule;
8346     }
8347     ulv = ulx;
8348   }
8349 #pragma omp atomic compare capture seq_cst
8350   {
8351     if (ulx == ule) {
8352       ulx = uld;
8353     }
8354     ulv = ulx;
8355   }
8356 #pragma omp atomic compare capture seq_cst
8357   {
8358     if (ule == ulx) {
8359       ulx = uld;
8360     }
8361     ulv = ulx;
8362   }
8363 #pragma omp atomic compare capture seq_cst
8364   if (ulx == ule) {
8365     ulx = uld;
8366   } else {
8367     ulv = ulx;
8368   }
8369 #pragma omp atomic compare capture seq_cst
8370   if (ule == ulx) {
8371     ulx = uld;
8372   } else {
8373     ulv = ulx;
8374   }
8375 #pragma omp atomic compare capture seq_cst
8376   {
8377     ulr = ulx == ule;
8378     if (ulr) {
8379       ulx = uld;
8380     }
8381   }
8382 #pragma omp atomic compare capture seq_cst
8383   {
8384     ulr = ule == ulx;
8385     if (ulr) {
8386       ulx = uld;
8387     }
8388   }
8389 #pragma omp atomic compare capture seq_cst
8390   {
8391     ulr = ulx == ule;
8392     if (ulr) {
8393       ulx = uld;
8394     } else {
8395       ulv = ulx;
8396     }
8397   }
8398 #pragma omp atomic compare capture seq_cst
8399   {
8400     ulr = ule == ulx;
8401     if (ulr) {
8402       ulx = uld;
8403     } else {
8404       ulv = ulx;
8405     }
8406   }
8407 
8408 #pragma omp atomic compare capture
8409   {
8410     llv = llx;
8411     if (lle > llx) {
8412       llx = lle;
8413     }
8414   }
8415 #pragma omp atomic compare capture
8416   {
8417     llv = llx;
8418     if (llx > lle) {
8419       llx = lle;
8420     }
8421   }
8422 #pragma omp atomic compare capture
8423   {
8424     llv = llx;
8425     if (lle < llx) {
8426       llx = lle;
8427     }
8428   }
8429 #pragma omp atomic compare capture
8430   {
8431     llv = llx;
8432     if (llx < lle) {
8433       llx = lle;
8434     }
8435   }
8436 #pragma omp atomic compare capture
8437   {
8438     llv = llx;
8439     if (llx == lle) {
8440       llx = lld;
8441     }
8442   }
8443 #pragma omp atomic compare capture
8444   {
8445     llv = llx;
8446     if (lle == llx) {
8447       llx = lld;
8448     }
8449   }
8450 #pragma omp atomic compare capture
8451   {
8452     if (lle > llx) {
8453       llx = lle;
8454     }
8455     llv = llx;
8456   }
8457 #pragma omp atomic compare capture
8458   {
8459     if (llx > lle) {
8460       llx = lle;
8461     }
8462     llv = llx;
8463   }
8464 #pragma omp atomic compare capture
8465   {
8466     if (lle < llx) {
8467       llx = lle;
8468     }
8469     llv = llx;
8470   }
8471 #pragma omp atomic compare capture
8472   {
8473     if (llx < lle) {
8474       llx = lle;
8475     }
8476     llv = llx;
8477   }
8478 #pragma omp atomic compare capture
8479   {
8480     if (llx == lle) {
8481       llx = lld;
8482     }
8483     llv = llx;
8484   }
8485 #pragma omp atomic compare capture
8486   {
8487     if (lle == llx) {
8488       llx = lld;
8489     }
8490     llv = llx;
8491   }
8492 #pragma omp atomic compare capture
8493   if (llx == lle) {
8494     llx = lld;
8495   } else {
8496     llv = llx;
8497   }
8498 #pragma omp atomic compare capture
8499   if (lle == llx) {
8500     llx = lld;
8501   } else {
8502     llv = llx;
8503   }
8504 #pragma omp atomic compare capture
8505   {
8506     llr = llx == lle;
8507     if (llr) {
8508       llx = lld;
8509     }
8510   }
8511 #pragma omp atomic compare capture
8512   {
8513     llr = lle == llx;
8514     if (llr) {
8515       llx = lld;
8516     }
8517   }
8518 #pragma omp atomic compare capture
8519   {
8520     llr = llx == lle;
8521     if (llr) {
8522       llx = lld;
8523     } else {
8524       llv = llx;
8525     }
8526   }
8527 #pragma omp atomic compare capture
8528   {
8529     llr = lle == llx;
8530     if (llr) {
8531       llx = lld;
8532     } else {
8533       llv = llx;
8534     }
8535   }
8536 
8537 #pragma omp atomic compare capture acq_rel
8538   {
8539     llv = llx;
8540     if (lle > llx) {
8541       llx = lle;
8542     }
8543   }
8544 #pragma omp atomic compare capture acq_rel
8545   {
8546     llv = llx;
8547     if (llx > lle) {
8548       llx = lle;
8549     }
8550   }
8551 #pragma omp atomic compare capture acq_rel
8552   {
8553     llv = llx;
8554     if (lle < llx) {
8555       llx = lle;
8556     }
8557   }
8558 #pragma omp atomic compare capture acq_rel
8559   {
8560     llv = llx;
8561     if (llx < lle) {
8562       llx = lle;
8563     }
8564   }
8565 #pragma omp atomic compare capture acq_rel
8566   {
8567     llv = llx;
8568     if (llx == lle) {
8569       llx = lld;
8570     }
8571   }
8572 #pragma omp atomic compare capture acq_rel
8573   {
8574     llv = llx;
8575     if (lle == llx) {
8576       llx = lld;
8577     }
8578   }
8579 #pragma omp atomic compare capture acq_rel
8580   {
8581     if (lle > llx) {
8582       llx = lle;
8583     }
8584     llv = llx;
8585   }
8586 #pragma omp atomic compare capture acq_rel
8587   {
8588     if (llx > lle) {
8589       llx = lle;
8590     }
8591     llv = llx;
8592   }
8593 #pragma omp atomic compare capture acq_rel
8594   {
8595     if (lle < llx) {
8596       llx = lle;
8597     }
8598     llv = llx;
8599   }
8600 #pragma omp atomic compare capture acq_rel
8601   {
8602     if (llx < lle) {
8603       llx = lle;
8604     }
8605     llv = llx;
8606   }
8607 #pragma omp atomic compare capture acq_rel
8608   {
8609     if (llx == lle) {
8610       llx = lld;
8611     }
8612     llv = llx;
8613   }
8614 #pragma omp atomic compare capture acq_rel
8615   {
8616     if (lle == llx) {
8617       llx = lld;
8618     }
8619     llv = llx;
8620   }
8621 #pragma omp atomic compare capture acq_rel
8622   if (llx == lle) {
8623     llx = lld;
8624   } else {
8625     llv = llx;
8626   }
8627 #pragma omp atomic compare capture acq_rel
8628   if (lle == llx) {
8629     llx = lld;
8630   } else {
8631     llv = llx;
8632   }
8633 #pragma omp atomic compare capture acq_rel
8634   {
8635     llr = llx == lle;
8636     if (llr) {
8637       llx = lld;
8638     }
8639   }
8640 #pragma omp atomic compare capture acq_rel
8641   {
8642     llr = lle == llx;
8643     if (llr) {
8644       llx = lld;
8645     }
8646   }
8647 #pragma omp atomic compare capture acq_rel
8648   {
8649     llr = llx == lle;
8650     if (llr) {
8651       llx = lld;
8652     } else {
8653       llv = llx;
8654     }
8655   }
8656 #pragma omp atomic compare capture acq_rel
8657   {
8658     llr = lle == llx;
8659     if (llr) {
8660       llx = lld;
8661     } else {
8662       llv = llx;
8663     }
8664   }
8665 
8666 #pragma omp atomic compare capture acquire
8667   {
8668     llv = llx;
8669     if (lle > llx) {
8670       llx = lle;
8671     }
8672   }
8673 #pragma omp atomic compare capture acquire
8674   {
8675     llv = llx;
8676     if (llx > lle) {
8677       llx = lle;
8678     }
8679   }
8680 #pragma omp atomic compare capture acquire
8681   {
8682     llv = llx;
8683     if (lle < llx) {
8684       llx = lle;
8685     }
8686   }
8687 #pragma omp atomic compare capture acquire
8688   {
8689     llv = llx;
8690     if (llx < lle) {
8691       llx = lle;
8692     }
8693   }
8694 #pragma omp atomic compare capture acquire
8695   {
8696     llv = llx;
8697     if (llx == lle) {
8698       llx = lld;
8699     }
8700   }
8701 #pragma omp atomic compare capture acquire
8702   {
8703     llv = llx;
8704     if (lle == llx) {
8705       llx = lld;
8706     }
8707   }
8708 #pragma omp atomic compare capture acquire
8709   {
8710     if (lle > llx) {
8711       llx = lle;
8712     }
8713     llv = llx;
8714   }
8715 #pragma omp atomic compare capture acquire
8716   {
8717     if (llx > lle) {
8718       llx = lle;
8719     }
8720     llv = llx;
8721   }
8722 #pragma omp atomic compare capture acquire
8723   {
8724     if (lle < llx) {
8725       llx = lle;
8726     }
8727     llv = llx;
8728   }
8729 #pragma omp atomic compare capture acquire
8730   {
8731     if (llx < lle) {
8732       llx = lle;
8733     }
8734     llv = llx;
8735   }
8736 #pragma omp atomic compare capture acquire
8737   {
8738     if (llx == lle) {
8739       llx = lld;
8740     }
8741     llv = llx;
8742   }
8743 #pragma omp atomic compare capture acquire
8744   {
8745     if (lle == llx) {
8746       llx = lld;
8747     }
8748     llv = llx;
8749   }
8750 #pragma omp atomic compare capture acquire
8751   if (llx == lle) {
8752     llx = lld;
8753   } else {
8754     llv = llx;
8755   }
8756 #pragma omp atomic compare capture acquire
8757   if (lle == llx) {
8758     llx = lld;
8759   } else {
8760     llv = llx;
8761   }
8762 #pragma omp atomic compare capture acquire
8763   {
8764     llr = llx == lle;
8765     if (llr) {
8766       llx = lld;
8767     }
8768   }
8769 #pragma omp atomic compare capture acquire
8770   {
8771     llr = lle == llx;
8772     if (llr) {
8773       llx = lld;
8774     }
8775   }
8776 #pragma omp atomic compare capture acquire
8777   {
8778     llr = llx == lle;
8779     if (llr) {
8780       llx = lld;
8781     } else {
8782       llv = llx;
8783     }
8784   }
8785 #pragma omp atomic compare capture acquire
8786   {
8787     llr = lle == llx;
8788     if (llr) {
8789       llx = lld;
8790     } else {
8791       llv = llx;
8792     }
8793   }
8794 
8795 #pragma omp atomic compare capture relaxed
8796   {
8797     llv = llx;
8798     if (lle > llx) {
8799       llx = lle;
8800     }
8801   }
8802 #pragma omp atomic compare capture relaxed
8803   {
8804     llv = llx;
8805     if (llx > lle) {
8806       llx = lle;
8807     }
8808   }
8809 #pragma omp atomic compare capture relaxed
8810   {
8811     llv = llx;
8812     if (lle < llx) {
8813       llx = lle;
8814     }
8815   }
8816 #pragma omp atomic compare capture relaxed
8817   {
8818     llv = llx;
8819     if (llx < lle) {
8820       llx = lle;
8821     }
8822   }
8823 #pragma omp atomic compare capture relaxed
8824   {
8825     llv = llx;
8826     if (llx == lle) {
8827       llx = lld;
8828     }
8829   }
8830 #pragma omp atomic compare capture relaxed
8831   {
8832     llv = llx;
8833     if (lle == llx) {
8834       llx = lld;
8835     }
8836   }
8837 #pragma omp atomic compare capture relaxed
8838   {
8839     if (lle > llx) {
8840       llx = lle;
8841     }
8842     llv = llx;
8843   }
8844 #pragma omp atomic compare capture relaxed
8845   {
8846     if (llx > lle) {
8847       llx = lle;
8848     }
8849     llv = llx;
8850   }
8851 #pragma omp atomic compare capture relaxed
8852   {
8853     if (lle < llx) {
8854       llx = lle;
8855     }
8856     llv = llx;
8857   }
8858 #pragma omp atomic compare capture relaxed
8859   {
8860     if (llx < lle) {
8861       llx = lle;
8862     }
8863     llv = llx;
8864   }
8865 #pragma omp atomic compare capture relaxed
8866   {
8867     if (llx == lle) {
8868       llx = lld;
8869     }
8870     llv = llx;
8871   }
8872 #pragma omp atomic compare capture relaxed
8873   {
8874     if (lle == llx) {
8875       llx = lld;
8876     }
8877     llv = llx;
8878   }
8879 #pragma omp atomic compare capture relaxed
8880   if (llx == lle) {
8881     llx = lld;
8882   } else {
8883     llv = llx;
8884   }
8885 #pragma omp atomic compare capture relaxed
8886   if (lle == llx) {
8887     llx = lld;
8888   } else {
8889     llv = llx;
8890   }
8891 #pragma omp atomic compare capture relaxed
8892   {
8893     llr = llx == lle;
8894     if (llr) {
8895       llx = lld;
8896     }
8897   }
8898 #pragma omp atomic compare capture relaxed
8899   {
8900     llr = lle == llx;
8901     if (llr) {
8902       llx = lld;
8903     }
8904   }
8905 #pragma omp atomic compare capture relaxed
8906   {
8907     llr = llx == lle;
8908     if (llr) {
8909       llx = lld;
8910     } else {
8911       llv = llx;
8912     }
8913   }
8914 #pragma omp atomic compare capture relaxed
8915   {
8916     llr = lle == llx;
8917     if (llr) {
8918       llx = lld;
8919     } else {
8920       llv = llx;
8921     }
8922   }
8923 
8924 #pragma omp atomic compare capture release
8925   {
8926     llv = llx;
8927     if (lle > llx) {
8928       llx = lle;
8929     }
8930   }
8931 #pragma omp atomic compare capture release
8932   {
8933     llv = llx;
8934     if (llx > lle) {
8935       llx = lle;
8936     }
8937   }
8938 #pragma omp atomic compare capture release
8939   {
8940     llv = llx;
8941     if (lle < llx) {
8942       llx = lle;
8943     }
8944   }
8945 #pragma omp atomic compare capture release
8946   {
8947     llv = llx;
8948     if (llx < lle) {
8949       llx = lle;
8950     }
8951   }
8952 #pragma omp atomic compare capture release
8953   {
8954     llv = llx;
8955     if (llx == lle) {
8956       llx = lld;
8957     }
8958   }
8959 #pragma omp atomic compare capture release
8960   {
8961     llv = llx;
8962     if (lle == llx) {
8963       llx = lld;
8964     }
8965   }
8966 #pragma omp atomic compare capture release
8967   {
8968     if (lle > llx) {
8969       llx = lle;
8970     }
8971     llv = llx;
8972   }
8973 #pragma omp atomic compare capture release
8974   {
8975     if (llx > lle) {
8976       llx = lle;
8977     }
8978     llv = llx;
8979   }
8980 #pragma omp atomic compare capture release
8981   {
8982     if (lle < llx) {
8983       llx = lle;
8984     }
8985     llv = llx;
8986   }
8987 #pragma omp atomic compare capture release
8988   {
8989     if (llx < lle) {
8990       llx = lle;
8991     }
8992     llv = llx;
8993   }
8994 #pragma omp atomic compare capture release
8995   {
8996     if (llx == lle) {
8997       llx = lld;
8998     }
8999     llv = llx;
9000   }
9001 #pragma omp atomic compare capture release
9002   {
9003     if (lle == llx) {
9004       llx = lld;
9005     }
9006     llv = llx;
9007   }
9008 #pragma omp atomic compare capture release
9009   if (llx == lle) {
9010     llx = lld;
9011   } else {
9012     llv = llx;
9013   }
9014 #pragma omp atomic compare capture release
9015   if (lle == llx) {
9016     llx = lld;
9017   } else {
9018     llv = llx;
9019   }
9020 #pragma omp atomic compare capture release
9021   {
9022     llr = llx == lle;
9023     if (llr) {
9024       llx = lld;
9025     }
9026   }
9027 #pragma omp atomic compare capture release
9028   {
9029     llr = lle == llx;
9030     if (llr) {
9031       llx = lld;
9032     }
9033   }
9034 #pragma omp atomic compare capture release
9035   {
9036     llr = llx == lle;
9037     if (llr) {
9038       llx = lld;
9039     } else {
9040       llv = llx;
9041     }
9042   }
9043 #pragma omp atomic compare capture release
9044   {
9045     llr = lle == llx;
9046     if (llr) {
9047       llx = lld;
9048     } else {
9049       llv = llx;
9050     }
9051   }
9052 
9053 #pragma omp atomic compare capture seq_cst
9054   {
9055     llv = llx;
9056     if (lle > llx) {
9057       llx = lle;
9058     }
9059   }
9060 #pragma omp atomic compare capture seq_cst
9061   {
9062     llv = llx;
9063     if (llx > lle) {
9064       llx = lle;
9065     }
9066   }
9067 #pragma omp atomic compare capture seq_cst
9068   {
9069     llv = llx;
9070     if (lle < llx) {
9071       llx = lle;
9072     }
9073   }
9074 #pragma omp atomic compare capture seq_cst
9075   {
9076     llv = llx;
9077     if (llx < lle) {
9078       llx = lle;
9079     }
9080   }
9081 #pragma omp atomic compare capture seq_cst
9082   {
9083     llv = llx;
9084     if (llx == lle) {
9085       llx = lld;
9086     }
9087   }
9088 #pragma omp atomic compare capture seq_cst
9089   {
9090     llv = llx;
9091     if (lle == llx) {
9092       llx = lld;
9093     }
9094   }
9095 #pragma omp atomic compare capture seq_cst
9096   {
9097     if (lle > llx) {
9098       llx = lle;
9099     }
9100     llv = llx;
9101   }
9102 #pragma omp atomic compare capture seq_cst
9103   {
9104     if (llx > lle) {
9105       llx = lle;
9106     }
9107     llv = llx;
9108   }
9109 #pragma omp atomic compare capture seq_cst
9110   {
9111     if (lle < llx) {
9112       llx = lle;
9113     }
9114     llv = llx;
9115   }
9116 #pragma omp atomic compare capture seq_cst
9117   {
9118     if (llx < lle) {
9119       llx = lle;
9120     }
9121     llv = llx;
9122   }
9123 #pragma omp atomic compare capture seq_cst
9124   {
9125     if (llx == lle) {
9126       llx = lld;
9127     }
9128     llv = llx;
9129   }
9130 #pragma omp atomic compare capture seq_cst
9131   {
9132     if (lle == llx) {
9133       llx = lld;
9134     }
9135     llv = llx;
9136   }
9137 #pragma omp atomic compare capture seq_cst
9138   if (llx == lle) {
9139     llx = lld;
9140   } else {
9141     llv = llx;
9142   }
9143 #pragma omp atomic compare capture seq_cst
9144   if (lle == llx) {
9145     llx = lld;
9146   } else {
9147     llv = llx;
9148   }
9149 #pragma omp atomic compare capture seq_cst
9150   {
9151     llr = llx == lle;
9152     if (llr) {
9153       llx = lld;
9154     }
9155   }
9156 #pragma omp atomic compare capture seq_cst
9157   {
9158     llr = lle == llx;
9159     if (llr) {
9160       llx = lld;
9161     }
9162   }
9163 #pragma omp atomic compare capture seq_cst
9164   {
9165     llr = llx == lle;
9166     if (llr) {
9167       llx = lld;
9168     } else {
9169       llv = llx;
9170     }
9171   }
9172 #pragma omp atomic compare capture seq_cst
9173   {
9174     llr = lle == llx;
9175     if (llr) {
9176       llx = lld;
9177     } else {
9178       llv = llx;
9179     }
9180   }
9181 
9182 #pragma omp atomic compare capture
9183   {
9184     ullv = ullx;
9185     if (ulle > ullx) {
9186       ullx = ulle;
9187     }
9188   }
9189 #pragma omp atomic compare capture
9190   {
9191     ullv = ullx;
9192     if (ullx > ulle) {
9193       ullx = ulle;
9194     }
9195   }
9196 #pragma omp atomic compare capture
9197   {
9198     ullv = ullx;
9199     if (ulle < ullx) {
9200       ullx = ulle;
9201     }
9202   }
9203 #pragma omp atomic compare capture
9204   {
9205     ullv = ullx;
9206     if (ullx < ulle) {
9207       ullx = ulle;
9208     }
9209   }
9210 #pragma omp atomic compare capture
9211   {
9212     ullv = ullx;
9213     if (ullx == ulle) {
9214       ullx = ulld;
9215     }
9216   }
9217 #pragma omp atomic compare capture
9218   {
9219     ullv = ullx;
9220     if (ulle == ullx) {
9221       ullx = ulld;
9222     }
9223   }
9224 #pragma omp atomic compare capture
9225   {
9226     if (ulle > ullx) {
9227       ullx = ulle;
9228     }
9229     ullv = ullx;
9230   }
9231 #pragma omp atomic compare capture
9232   {
9233     if (ullx > ulle) {
9234       ullx = ulle;
9235     }
9236     ullv = ullx;
9237   }
9238 #pragma omp atomic compare capture
9239   {
9240     if (ulle < ullx) {
9241       ullx = ulle;
9242     }
9243     ullv = ullx;
9244   }
9245 #pragma omp atomic compare capture
9246   {
9247     if (ullx < ulle) {
9248       ullx = ulle;
9249     }
9250     ullv = ullx;
9251   }
9252 #pragma omp atomic compare capture
9253   {
9254     if (ullx == ulle) {
9255       ullx = ulld;
9256     }
9257     ullv = ullx;
9258   }
9259 #pragma omp atomic compare capture
9260   {
9261     if (ulle == ullx) {
9262       ullx = ulld;
9263     }
9264     ullv = ullx;
9265   }
9266 #pragma omp atomic compare capture
9267   if (ullx == ulle) {
9268     ullx = ulld;
9269   } else {
9270     ullv = ullx;
9271   }
9272 #pragma omp atomic compare capture
9273   if (ulle == ullx) {
9274     ullx = ulld;
9275   } else {
9276     ullv = ullx;
9277   }
9278 #pragma omp atomic compare capture
9279   {
9280     ullr = ullx == ulle;
9281     if (ullr) {
9282       ullx = ulld;
9283     }
9284   }
9285 #pragma omp atomic compare capture
9286   {
9287     ullr = ulle == ullx;
9288     if (ullr) {
9289       ullx = ulld;
9290     }
9291   }
9292 #pragma omp atomic compare capture
9293   {
9294     ullr = ullx == ulle;
9295     if (ullr) {
9296       ullx = ulld;
9297     } else {
9298       ullv = ullx;
9299     }
9300   }
9301 #pragma omp atomic compare capture
9302   {
9303     ullr = ulle == ullx;
9304     if (ullr) {
9305       ullx = ulld;
9306     } else {
9307       ullv = ullx;
9308     }
9309   }
9310 
9311 #pragma omp atomic compare capture acq_rel
9312   {
9313     ullv = ullx;
9314     if (ulle > ullx) {
9315       ullx = ulle;
9316     }
9317   }
9318 #pragma omp atomic compare capture acq_rel
9319   {
9320     ullv = ullx;
9321     if (ullx > ulle) {
9322       ullx = ulle;
9323     }
9324   }
9325 #pragma omp atomic compare capture acq_rel
9326   {
9327     ullv = ullx;
9328     if (ulle < ullx) {
9329       ullx = ulle;
9330     }
9331   }
9332 #pragma omp atomic compare capture acq_rel
9333   {
9334     ullv = ullx;
9335     if (ullx < ulle) {
9336       ullx = ulle;
9337     }
9338   }
9339 #pragma omp atomic compare capture acq_rel
9340   {
9341     ullv = ullx;
9342     if (ullx == ulle) {
9343       ullx = ulld;
9344     }
9345   }
9346 #pragma omp atomic compare capture acq_rel
9347   {
9348     ullv = ullx;
9349     if (ulle == ullx) {
9350       ullx = ulld;
9351     }
9352   }
9353 #pragma omp atomic compare capture acq_rel
9354   {
9355     if (ulle > ullx) {
9356       ullx = ulle;
9357     }
9358     ullv = ullx;
9359   }
9360 #pragma omp atomic compare capture acq_rel
9361   {
9362     if (ullx > ulle) {
9363       ullx = ulle;
9364     }
9365     ullv = ullx;
9366   }
9367 #pragma omp atomic compare capture acq_rel
9368   {
9369     if (ulle < ullx) {
9370       ullx = ulle;
9371     }
9372     ullv = ullx;
9373   }
9374 #pragma omp atomic compare capture acq_rel
9375   {
9376     if (ullx < ulle) {
9377       ullx = ulle;
9378     }
9379     ullv = ullx;
9380   }
9381 #pragma omp atomic compare capture acq_rel
9382   {
9383     if (ullx == ulle) {
9384       ullx = ulld;
9385     }
9386     ullv = ullx;
9387   }
9388 #pragma omp atomic compare capture acq_rel
9389   {
9390     if (ulle == ullx) {
9391       ullx = ulld;
9392     }
9393     ullv = ullx;
9394   }
9395 #pragma omp atomic compare capture acq_rel
9396   if (ullx == ulle) {
9397     ullx = ulld;
9398   } else {
9399     ullv = ullx;
9400   }
9401 #pragma omp atomic compare capture acq_rel
9402   if (ulle == ullx) {
9403     ullx = ulld;
9404   } else {
9405     ullv = ullx;
9406   }
9407 #pragma omp atomic compare capture acq_rel
9408   {
9409     ullr = ullx == ulle;
9410     if (ullr) {
9411       ullx = ulld;
9412     }
9413   }
9414 #pragma omp atomic compare capture acq_rel
9415   {
9416     ullr = ulle == ullx;
9417     if (ullr) {
9418       ullx = ulld;
9419     }
9420   }
9421 #pragma omp atomic compare capture acq_rel
9422   {
9423     ullr = ullx == ulle;
9424     if (ullr) {
9425       ullx = ulld;
9426     } else {
9427       ullv = ullx;
9428     }
9429   }
9430 #pragma omp atomic compare capture acq_rel
9431   {
9432     ullr = ulle == ullx;
9433     if (ullr) {
9434       ullx = ulld;
9435     } else {
9436       ullv = ullx;
9437     }
9438   }
9439 
9440 #pragma omp atomic compare capture acquire
9441   {
9442     ullv = ullx;
9443     if (ulle > ullx) {
9444       ullx = ulle;
9445     }
9446   }
9447 #pragma omp atomic compare capture acquire
9448   {
9449     ullv = ullx;
9450     if (ullx > ulle) {
9451       ullx = ulle;
9452     }
9453   }
9454 #pragma omp atomic compare capture acquire
9455   {
9456     ullv = ullx;
9457     if (ulle < ullx) {
9458       ullx = ulle;
9459     }
9460   }
9461 #pragma omp atomic compare capture acquire
9462   {
9463     ullv = ullx;
9464     if (ullx < ulle) {
9465       ullx = ulle;
9466     }
9467   }
9468 #pragma omp atomic compare capture acquire
9469   {
9470     ullv = ullx;
9471     if (ullx == ulle) {
9472       ullx = ulld;
9473     }
9474   }
9475 #pragma omp atomic compare capture acquire
9476   {
9477     ullv = ullx;
9478     if (ulle == ullx) {
9479       ullx = ulld;
9480     }
9481   }
9482 #pragma omp atomic compare capture acquire
9483   {
9484     if (ulle > ullx) {
9485       ullx = ulle;
9486     }
9487     ullv = ullx;
9488   }
9489 #pragma omp atomic compare capture acquire
9490   {
9491     if (ullx > ulle) {
9492       ullx = ulle;
9493     }
9494     ullv = ullx;
9495   }
9496 #pragma omp atomic compare capture acquire
9497   {
9498     if (ulle < ullx) {
9499       ullx = ulle;
9500     }
9501     ullv = ullx;
9502   }
9503 #pragma omp atomic compare capture acquire
9504   {
9505     if (ullx < ulle) {
9506       ullx = ulle;
9507     }
9508     ullv = ullx;
9509   }
9510 #pragma omp atomic compare capture acquire
9511   {
9512     if (ullx == ulle) {
9513       ullx = ulld;
9514     }
9515     ullv = ullx;
9516   }
9517 #pragma omp atomic compare capture acquire
9518   {
9519     if (ulle == ullx) {
9520       ullx = ulld;
9521     }
9522     ullv = ullx;
9523   }
9524 #pragma omp atomic compare capture acquire
9525   if (ullx == ulle) {
9526     ullx = ulld;
9527   } else {
9528     ullv = ullx;
9529   }
9530 #pragma omp atomic compare capture acquire
9531   if (ulle == ullx) {
9532     ullx = ulld;
9533   } else {
9534     ullv = ullx;
9535   }
9536 #pragma omp atomic compare capture acquire
9537   {
9538     ullr = ullx == ulle;
9539     if (ullr) {
9540       ullx = ulld;
9541     }
9542   }
9543 #pragma omp atomic compare capture acquire
9544   {
9545     ullr = ulle == ullx;
9546     if (ullr) {
9547       ullx = ulld;
9548     }
9549   }
9550 #pragma omp atomic compare capture acquire
9551   {
9552     ullr = ullx == ulle;
9553     if (ullr) {
9554       ullx = ulld;
9555     } else {
9556       ullv = ullx;
9557     }
9558   }
9559 #pragma omp atomic compare capture acquire
9560   {
9561     ullr = ulle == ullx;
9562     if (ullr) {
9563       ullx = ulld;
9564     } else {
9565       ullv = ullx;
9566     }
9567   }
9568 
9569 #pragma omp atomic compare capture relaxed
9570   {
9571     ullv = ullx;
9572     if (ulle > ullx) {
9573       ullx = ulle;
9574     }
9575   }
9576 #pragma omp atomic compare capture relaxed
9577   {
9578     ullv = ullx;
9579     if (ullx > ulle) {
9580       ullx = ulle;
9581     }
9582   }
9583 #pragma omp atomic compare capture relaxed
9584   {
9585     ullv = ullx;
9586     if (ulle < ullx) {
9587       ullx = ulle;
9588     }
9589   }
9590 #pragma omp atomic compare capture relaxed
9591   {
9592     ullv = ullx;
9593     if (ullx < ulle) {
9594       ullx = ulle;
9595     }
9596   }
9597 #pragma omp atomic compare capture relaxed
9598   {
9599     ullv = ullx;
9600     if (ullx == ulle) {
9601       ullx = ulld;
9602     }
9603   }
9604 #pragma omp atomic compare capture relaxed
9605   {
9606     ullv = ullx;
9607     if (ulle == ullx) {
9608       ullx = ulld;
9609     }
9610   }
9611 #pragma omp atomic compare capture relaxed
9612   {
9613     if (ulle > ullx) {
9614       ullx = ulle;
9615     }
9616     ullv = ullx;
9617   }
9618 #pragma omp atomic compare capture relaxed
9619   {
9620     if (ullx > ulle) {
9621       ullx = ulle;
9622     }
9623     ullv = ullx;
9624   }
9625 #pragma omp atomic compare capture relaxed
9626   {
9627     if (ulle < ullx) {
9628       ullx = ulle;
9629     }
9630     ullv = ullx;
9631   }
9632 #pragma omp atomic compare capture relaxed
9633   {
9634     if (ullx < ulle) {
9635       ullx = ulle;
9636     }
9637     ullv = ullx;
9638   }
9639 #pragma omp atomic compare capture relaxed
9640   {
9641     if (ullx == ulle) {
9642       ullx = ulld;
9643     }
9644     ullv = ullx;
9645   }
9646 #pragma omp atomic compare capture relaxed
9647   {
9648     if (ulle == ullx) {
9649       ullx = ulld;
9650     }
9651     ullv = ullx;
9652   }
9653 #pragma omp atomic compare capture relaxed
9654   if (ullx == ulle) {
9655     ullx = ulld;
9656   } else {
9657     ullv = ullx;
9658   }
9659 #pragma omp atomic compare capture relaxed
9660   if (ulle == ullx) {
9661     ullx = ulld;
9662   } else {
9663     ullv = ullx;
9664   }
9665 #pragma omp atomic compare capture relaxed
9666   {
9667     ullr = ullx == ulle;
9668     if (ullr) {
9669       ullx = ulld;
9670     }
9671   }
9672 #pragma omp atomic compare capture relaxed
9673   {
9674     ullr = ulle == ullx;
9675     if (ullr) {
9676       ullx = ulld;
9677     }
9678   }
9679 #pragma omp atomic compare capture relaxed
9680   {
9681     ullr = ullx == ulle;
9682     if (ullr) {
9683       ullx = ulld;
9684     } else {
9685       ullv = ullx;
9686     }
9687   }
9688 #pragma omp atomic compare capture relaxed
9689   {
9690     ullr = ulle == ullx;
9691     if (ullr) {
9692       ullx = ulld;
9693     } else {
9694       ullv = ullx;
9695     }
9696   }
9697 
9698 #pragma omp atomic compare capture release
9699   {
9700     ullv = ullx;
9701     if (ulle > ullx) {
9702       ullx = ulle;
9703     }
9704   }
9705 #pragma omp atomic compare capture release
9706   {
9707     ullv = ullx;
9708     if (ullx > ulle) {
9709       ullx = ulle;
9710     }
9711   }
9712 #pragma omp atomic compare capture release
9713   {
9714     ullv = ullx;
9715     if (ulle < ullx) {
9716       ullx = ulle;
9717     }
9718   }
9719 #pragma omp atomic compare capture release
9720   {
9721     ullv = ullx;
9722     if (ullx < ulle) {
9723       ullx = ulle;
9724     }
9725   }
9726 #pragma omp atomic compare capture release
9727   {
9728     ullv = ullx;
9729     if (ullx == ulle) {
9730       ullx = ulld;
9731     }
9732   }
9733 #pragma omp atomic compare capture release
9734   {
9735     ullv = ullx;
9736     if (ulle == ullx) {
9737       ullx = ulld;
9738     }
9739   }
9740 #pragma omp atomic compare capture release
9741   {
9742     if (ulle > ullx) {
9743       ullx = ulle;
9744     }
9745     ullv = ullx;
9746   }
9747 #pragma omp atomic compare capture release
9748   {
9749     if (ullx > ulle) {
9750       ullx = ulle;
9751     }
9752     ullv = ullx;
9753   }
9754 #pragma omp atomic compare capture release
9755   {
9756     if (ulle < ullx) {
9757       ullx = ulle;
9758     }
9759     ullv = ullx;
9760   }
9761 #pragma omp atomic compare capture release
9762   {
9763     if (ullx < ulle) {
9764       ullx = ulle;
9765     }
9766     ullv = ullx;
9767   }
9768 #pragma omp atomic compare capture release
9769   {
9770     if (ullx == ulle) {
9771       ullx = ulld;
9772     }
9773     ullv = ullx;
9774   }
9775 #pragma omp atomic compare capture release
9776   {
9777     if (ulle == ullx) {
9778       ullx = ulld;
9779     }
9780     ullv = ullx;
9781   }
9782 #pragma omp atomic compare capture release
9783   if (ullx == ulle) {
9784     ullx = ulld;
9785   } else {
9786     ullv = ullx;
9787   }
9788 #pragma omp atomic compare capture release
9789   if (ulle == ullx) {
9790     ullx = ulld;
9791   } else {
9792     ullv = ullx;
9793   }
9794 #pragma omp atomic compare capture release
9795   {
9796     ullr = ullx == ulle;
9797     if (ullr) {
9798       ullx = ulld;
9799     }
9800   }
9801 #pragma omp atomic compare capture release
9802   {
9803     ullr = ulle == ullx;
9804     if (ullr) {
9805       ullx = ulld;
9806     }
9807   }
9808 #pragma omp atomic compare capture release
9809   {
9810     ullr = ullx == ulle;
9811     if (ullr) {
9812       ullx = ulld;
9813     } else {
9814       ullv = ullx;
9815     }
9816   }
9817 #pragma omp atomic compare capture release
9818   {
9819     ullr = ulle == ullx;
9820     if (ullr) {
9821       ullx = ulld;
9822     } else {
9823       ullv = ullx;
9824     }
9825   }
9826 
9827 #pragma omp atomic compare capture seq_cst
9828   {
9829     ullv = ullx;
9830     if (ulle > ullx) {
9831       ullx = ulle;
9832     }
9833   }
9834 #pragma omp atomic compare capture seq_cst
9835   {
9836     ullv = ullx;
9837     if (ullx > ulle) {
9838       ullx = ulle;
9839     }
9840   }
9841 #pragma omp atomic compare capture seq_cst
9842   {
9843     ullv = ullx;
9844     if (ulle < ullx) {
9845       ullx = ulle;
9846     }
9847   }
9848 #pragma omp atomic compare capture seq_cst
9849   {
9850     ullv = ullx;
9851     if (ullx < ulle) {
9852       ullx = ulle;
9853     }
9854   }
9855 #pragma omp atomic compare capture seq_cst
9856   {
9857     ullv = ullx;
9858     if (ullx == ulle) {
9859       ullx = ulld;
9860     }
9861   }
9862 #pragma omp atomic compare capture seq_cst
9863   {
9864     ullv = ullx;
9865     if (ulle == ullx) {
9866       ullx = ulld;
9867     }
9868   }
9869 #pragma omp atomic compare capture seq_cst
9870   {
9871     if (ulle > ullx) {
9872       ullx = ulle;
9873     }
9874     ullv = ullx;
9875   }
9876 #pragma omp atomic compare capture seq_cst
9877   {
9878     if (ullx > ulle) {
9879       ullx = ulle;
9880     }
9881     ullv = ullx;
9882   }
9883 #pragma omp atomic compare capture seq_cst
9884   {
9885     if (ulle < ullx) {
9886       ullx = ulle;
9887     }
9888     ullv = ullx;
9889   }
9890 #pragma omp atomic compare capture seq_cst
9891   {
9892     if (ullx < ulle) {
9893       ullx = ulle;
9894     }
9895     ullv = ullx;
9896   }
9897 #pragma omp atomic compare capture seq_cst
9898   {
9899     if (ullx == ulle) {
9900       ullx = ulld;
9901     }
9902     ullv = ullx;
9903   }
9904 #pragma omp atomic compare capture seq_cst
9905   {
9906     if (ulle == ullx) {
9907       ullx = ulld;
9908     }
9909     ullv = ullx;
9910   }
9911 #pragma omp atomic compare capture seq_cst
9912   if (ullx == ulle) {
9913     ullx = ulld;
9914   } else {
9915     ullv = ullx;
9916   }
9917 #pragma omp atomic compare capture seq_cst
9918   if (ulle == ullx) {
9919     ullx = ulld;
9920   } else {
9921     ullv = ullx;
9922   }
9923 #pragma omp atomic compare capture seq_cst
9924   {
9925     ullr = ullx == ulle;
9926     if (ullr) {
9927       ullx = ulld;
9928     }
9929   }
9930 #pragma omp atomic compare capture seq_cst
9931   {
9932     ullr = ulle == ullx;
9933     if (ullr) {
9934       ullx = ulld;
9935     }
9936   }
9937 #pragma omp atomic compare capture seq_cst
9938   {
9939     ullr = ullx == ulle;
9940     if (ullr) {
9941       ullx = ulld;
9942     } else {
9943       ullv = ullx;
9944     }
9945   }
9946 #pragma omp atomic compare capture seq_cst
9947   {
9948     ullr = ulle == ullx;
9949     if (ullr) {
9950       ullx = ulld;
9951     } else {
9952       ullv = ullx;
9953     }
9954   }
9955 
9956 #pragma omp atomic compare capture
9957   {
9958     fv = fx;
9959     if (fe > fx) {
9960       fx = fe;
9961     }
9962   }
9963 #pragma omp atomic compare capture
9964   {
9965     fv = fx;
9966     if (fx > fe) {
9967       fx = fe;
9968     }
9969   }
9970 #pragma omp atomic compare capture
9971   {
9972     fv = fx;
9973     if (fe < fx) {
9974       fx = fe;
9975     }
9976   }
9977 #pragma omp atomic compare capture
9978   {
9979     fv = fx;
9980     if (fx < fe) {
9981       fx = fe;
9982     }
9983   }
9984 #pragma omp atomic compare capture
9985   {
9986     fv = fx;
9987     if (fx == fe) {
9988       fx = fd;
9989     }
9990   }
9991 #pragma omp atomic compare capture
9992   {
9993     fv = fx;
9994     if (fe == fx) {
9995       fx = fd;
9996     }
9997   }
9998 #pragma omp atomic compare capture
9999   {
10000     if (fe > fx) {
10001       fx = fe;
10002     }
10003     fv = fx;
10004   }
10005 #pragma omp atomic compare capture
10006   {
10007     if (fx > fe) {
10008       fx = fe;
10009     }
10010     fv = fx;
10011   }
10012 #pragma omp atomic compare capture
10013   {
10014     if (fe < fx) {
10015       fx = fe;
10016     }
10017     fv = fx;
10018   }
10019 #pragma omp atomic compare capture
10020   {
10021     if (fx < fe) {
10022       fx = fe;
10023     }
10024     fv = fx;
10025   }
10026 #pragma omp atomic compare capture
10027   {
10028     if (fx == fe) {
10029       fx = fd;
10030     }
10031     fv = fx;
10032   }
10033 #pragma omp atomic compare capture
10034   {
10035     if (fe == fx) {
10036       fx = fd;
10037     }
10038     fv = fx;
10039   }
10040 #pragma omp atomic compare capture
10041   if (fx == fe) {
10042     fx = fd;
10043   } else {
10044     fv = fx;
10045   }
10046 #pragma omp atomic compare capture
10047   if (fe == fx) {
10048     fx = fd;
10049   } else {
10050     fv = fx;
10051   }
10052 #pragma omp atomic compare capture
10053   {
10054     ir = fx == fe;
10055     if (ir) {
10056       fx = fd;
10057     }
10058   }
10059 #pragma omp atomic compare capture
10060   {
10061     ir = fe == fx;
10062     if (ir) {
10063       fx = fd;
10064     }
10065   }
10066 #pragma omp atomic compare capture
10067   {
10068     ir = fx == fe;
10069     if (ir) {
10070       fx = fd;
10071     } else {
10072       fv = fx;
10073     }
10074   }
10075 #pragma omp atomic compare capture
10076   {
10077     ir = fe == fx;
10078     if (ir) {
10079       fx = fd;
10080     } else {
10081       fv = fx;
10082     }
10083   }
10084 
10085 #pragma omp atomic compare capture acq_rel
10086   {
10087     fv = fx;
10088     if (fe > fx) {
10089       fx = fe;
10090     }
10091   }
10092 #pragma omp atomic compare capture acq_rel
10093   {
10094     fv = fx;
10095     if (fx > fe) {
10096       fx = fe;
10097     }
10098   }
10099 #pragma omp atomic compare capture acq_rel
10100   {
10101     fv = fx;
10102     if (fe < fx) {
10103       fx = fe;
10104     }
10105   }
10106 #pragma omp atomic compare capture acq_rel
10107   {
10108     fv = fx;
10109     if (fx < fe) {
10110       fx = fe;
10111     }
10112   }
10113 #pragma omp atomic compare capture acq_rel
10114   {
10115     fv = fx;
10116     if (fx == fe) {
10117       fx = fd;
10118     }
10119   }
10120 #pragma omp atomic compare capture acq_rel
10121   {
10122     fv = fx;
10123     if (fe == fx) {
10124       fx = fd;
10125     }
10126   }
10127 #pragma omp atomic compare capture acq_rel
10128   {
10129     if (fe > fx) {
10130       fx = fe;
10131     }
10132     fv = fx;
10133   }
10134 #pragma omp atomic compare capture acq_rel
10135   {
10136     if (fx > fe) {
10137       fx = fe;
10138     }
10139     fv = fx;
10140   }
10141 #pragma omp atomic compare capture acq_rel
10142   {
10143     if (fe < fx) {
10144       fx = fe;
10145     }
10146     fv = fx;
10147   }
10148 #pragma omp atomic compare capture acq_rel
10149   {
10150     if (fx < fe) {
10151       fx = fe;
10152     }
10153     fv = fx;
10154   }
10155 #pragma omp atomic compare capture acq_rel
10156   {
10157     if (fx == fe) {
10158       fx = fd;
10159     }
10160     fv = fx;
10161   }
10162 #pragma omp atomic compare capture acq_rel
10163   {
10164     if (fe == fx) {
10165       fx = fd;
10166     }
10167     fv = fx;
10168   }
10169 #pragma omp atomic compare capture acq_rel
10170   if (fx == fe) {
10171     fx = fd;
10172   } else {
10173     fv = fx;
10174   }
10175 #pragma omp atomic compare capture acq_rel
10176   if (fe == fx) {
10177     fx = fd;
10178   } else {
10179     fv = fx;
10180   }
10181 #pragma omp atomic compare capture acq_rel
10182   {
10183     ir = fx == fe;
10184     if (ir) {
10185       fx = fd;
10186     }
10187   }
10188 #pragma omp atomic compare capture acq_rel
10189   {
10190     ir = fe == fx;
10191     if (ir) {
10192       fx = fd;
10193     }
10194   }
10195 #pragma omp atomic compare capture acq_rel
10196   {
10197     ir = fx == fe;
10198     if (ir) {
10199       fx = fd;
10200     } else {
10201       fv = fx;
10202     }
10203   }
10204 #pragma omp atomic compare capture acq_rel
10205   {
10206     ir = fe == fx;
10207     if (ir) {
10208       fx = fd;
10209     } else {
10210       fv = fx;
10211     }
10212   }
10213 
10214 #pragma omp atomic compare capture acquire
10215   {
10216     fv = fx;
10217     if (fe > fx) {
10218       fx = fe;
10219     }
10220   }
10221 #pragma omp atomic compare capture acquire
10222   {
10223     fv = fx;
10224     if (fx > fe) {
10225       fx = fe;
10226     }
10227   }
10228 #pragma omp atomic compare capture acquire
10229   {
10230     fv = fx;
10231     if (fe < fx) {
10232       fx = fe;
10233     }
10234   }
10235 #pragma omp atomic compare capture acquire
10236   {
10237     fv = fx;
10238     if (fx < fe) {
10239       fx = fe;
10240     }
10241   }
10242 #pragma omp atomic compare capture acquire
10243   {
10244     fv = fx;
10245     if (fx == fe) {
10246       fx = fd;
10247     }
10248   }
10249 #pragma omp atomic compare capture acquire
10250   {
10251     fv = fx;
10252     if (fe == fx) {
10253       fx = fd;
10254     }
10255   }
10256 #pragma omp atomic compare capture acquire
10257   {
10258     if (fe > fx) {
10259       fx = fe;
10260     }
10261     fv = fx;
10262   }
10263 #pragma omp atomic compare capture acquire
10264   {
10265     if (fx > fe) {
10266       fx = fe;
10267     }
10268     fv = fx;
10269   }
10270 #pragma omp atomic compare capture acquire
10271   {
10272     if (fe < fx) {
10273       fx = fe;
10274     }
10275     fv = fx;
10276   }
10277 #pragma omp atomic compare capture acquire
10278   {
10279     if (fx < fe) {
10280       fx = fe;
10281     }
10282     fv = fx;
10283   }
10284 #pragma omp atomic compare capture acquire
10285   {
10286     if (fx == fe) {
10287       fx = fd;
10288     }
10289     fv = fx;
10290   }
10291 #pragma omp atomic compare capture acquire
10292   {
10293     if (fe == fx) {
10294       fx = fd;
10295     }
10296     fv = fx;
10297   }
10298 #pragma omp atomic compare capture acquire
10299   if (fx == fe) {
10300     fx = fd;
10301   } else {
10302     fv = fx;
10303   }
10304 #pragma omp atomic compare capture acquire
10305   if (fe == fx) {
10306     fx = fd;
10307   } else {
10308     fv = fx;
10309   }
10310 #pragma omp atomic compare capture acquire
10311   {
10312     ir = fx == fe;
10313     if (ir) {
10314       fx = fd;
10315     }
10316   }
10317 #pragma omp atomic compare capture acquire
10318   {
10319     ir = fe == fx;
10320     if (ir) {
10321       fx = fd;
10322     }
10323   }
10324 #pragma omp atomic compare capture acquire
10325   {
10326     ir = fx == fe;
10327     if (ir) {
10328       fx = fd;
10329     } else {
10330       fv = fx;
10331     }
10332   }
10333 #pragma omp atomic compare capture acquire
10334   {
10335     ir = fe == fx;
10336     if (ir) {
10337       fx = fd;
10338     } else {
10339       fv = fx;
10340     }
10341   }
10342 
10343 #pragma omp atomic compare capture relaxed
10344   {
10345     fv = fx;
10346     if (fe > fx) {
10347       fx = fe;
10348     }
10349   }
10350 #pragma omp atomic compare capture relaxed
10351   {
10352     fv = fx;
10353     if (fx > fe) {
10354       fx = fe;
10355     }
10356   }
10357 #pragma omp atomic compare capture relaxed
10358   {
10359     fv = fx;
10360     if (fe < fx) {
10361       fx = fe;
10362     }
10363   }
10364 #pragma omp atomic compare capture relaxed
10365   {
10366     fv = fx;
10367     if (fx < fe) {
10368       fx = fe;
10369     }
10370   }
10371 #pragma omp atomic compare capture relaxed
10372   {
10373     fv = fx;
10374     if (fx == fe) {
10375       fx = fd;
10376     }
10377   }
10378 #pragma omp atomic compare capture relaxed
10379   {
10380     fv = fx;
10381     if (fe == fx) {
10382       fx = fd;
10383     }
10384   }
10385 #pragma omp atomic compare capture relaxed
10386   {
10387     if (fe > fx) {
10388       fx = fe;
10389     }
10390     fv = fx;
10391   }
10392 #pragma omp atomic compare capture relaxed
10393   {
10394     if (fx > fe) {
10395       fx = fe;
10396     }
10397     fv = fx;
10398   }
10399 #pragma omp atomic compare capture relaxed
10400   {
10401     if (fe < fx) {
10402       fx = fe;
10403     }
10404     fv = fx;
10405   }
10406 #pragma omp atomic compare capture relaxed
10407   {
10408     if (fx < fe) {
10409       fx = fe;
10410     }
10411     fv = fx;
10412   }
10413 #pragma omp atomic compare capture relaxed
10414   {
10415     if (fx == fe) {
10416       fx = fd;
10417     }
10418     fv = fx;
10419   }
10420 #pragma omp atomic compare capture relaxed
10421   {
10422     if (fe == fx) {
10423       fx = fd;
10424     }
10425     fv = fx;
10426   }
10427 #pragma omp atomic compare capture relaxed
10428   if (fx == fe) {
10429     fx = fd;
10430   } else {
10431     fv = fx;
10432   }
10433 #pragma omp atomic compare capture relaxed
10434   if (fe == fx) {
10435     fx = fd;
10436   } else {
10437     fv = fx;
10438   }
10439 #pragma omp atomic compare capture relaxed
10440   {
10441     ir = fx == fe;
10442     if (ir) {
10443       fx = fd;
10444     }
10445   }
10446 #pragma omp atomic compare capture relaxed
10447   {
10448     ir = fe == fx;
10449     if (ir) {
10450       fx = fd;
10451     }
10452   }
10453 #pragma omp atomic compare capture relaxed
10454   {
10455     ir = fx == fe;
10456     if (ir) {
10457       fx = fd;
10458     } else {
10459       fv = fx;
10460     }
10461   }
10462 #pragma omp atomic compare capture relaxed
10463   {
10464     ir = fe == fx;
10465     if (ir) {
10466       fx = fd;
10467     } else {
10468       fv = fx;
10469     }
10470   }
10471 
10472 #pragma omp atomic compare capture release
10473   {
10474     fv = fx;
10475     if (fe > fx) {
10476       fx = fe;
10477     }
10478   }
10479 #pragma omp atomic compare capture release
10480   {
10481     fv = fx;
10482     if (fx > fe) {
10483       fx = fe;
10484     }
10485   }
10486 #pragma omp atomic compare capture release
10487   {
10488     fv = fx;
10489     if (fe < fx) {
10490       fx = fe;
10491     }
10492   }
10493 #pragma omp atomic compare capture release
10494   {
10495     fv = fx;
10496     if (fx < fe) {
10497       fx = fe;
10498     }
10499   }
10500 #pragma omp atomic compare capture release
10501   {
10502     fv = fx;
10503     if (fx == fe) {
10504       fx = fd;
10505     }
10506   }
10507 #pragma omp atomic compare capture release
10508   {
10509     fv = fx;
10510     if (fe == fx) {
10511       fx = fd;
10512     }
10513   }
10514 #pragma omp atomic compare capture release
10515   {
10516     if (fe > fx) {
10517       fx = fe;
10518     }
10519     fv = fx;
10520   }
10521 #pragma omp atomic compare capture release
10522   {
10523     if (fx > fe) {
10524       fx = fe;
10525     }
10526     fv = fx;
10527   }
10528 #pragma omp atomic compare capture release
10529   {
10530     if (fe < fx) {
10531       fx = fe;
10532     }
10533     fv = fx;
10534   }
10535 #pragma omp atomic compare capture release
10536   {
10537     if (fx < fe) {
10538       fx = fe;
10539     }
10540     fv = fx;
10541   }
10542 #pragma omp atomic compare capture release
10543   {
10544     if (fx == fe) {
10545       fx = fd;
10546     }
10547     fv = fx;
10548   }
10549 #pragma omp atomic compare capture release
10550   {
10551     if (fe == fx) {
10552       fx = fd;
10553     }
10554     fv = fx;
10555   }
10556 #pragma omp atomic compare capture release
10557   if (fx == fe) {
10558     fx = fd;
10559   } else {
10560     fv = fx;
10561   }
10562 #pragma omp atomic compare capture release
10563   if (fe == fx) {
10564     fx = fd;
10565   } else {
10566     fv = fx;
10567   }
10568 #pragma omp atomic compare capture release
10569   {
10570     ir = fx == fe;
10571     if (ir) {
10572       fx = fd;
10573     }
10574   }
10575 #pragma omp atomic compare capture release
10576   {
10577     ir = fe == fx;
10578     if (ir) {
10579       fx = fd;
10580     }
10581   }
10582 #pragma omp atomic compare capture release
10583   {
10584     ir = fx == fe;
10585     if (ir) {
10586       fx = fd;
10587     } else {
10588       fv = fx;
10589     }
10590   }
10591 #pragma omp atomic compare capture release
10592   {
10593     ir = fe == fx;
10594     if (ir) {
10595       fx = fd;
10596     } else {
10597       fv = fx;
10598     }
10599   }
10600 
10601 #pragma omp atomic compare capture seq_cst
10602   {
10603     fv = fx;
10604     if (fe > fx) {
10605       fx = fe;
10606     }
10607   }
10608 #pragma omp atomic compare capture seq_cst
10609   {
10610     fv = fx;
10611     if (fx > fe) {
10612       fx = fe;
10613     }
10614   }
10615 #pragma omp atomic compare capture seq_cst
10616   {
10617     fv = fx;
10618     if (fe < fx) {
10619       fx = fe;
10620     }
10621   }
10622 #pragma omp atomic compare capture seq_cst
10623   {
10624     fv = fx;
10625     if (fx < fe) {
10626       fx = fe;
10627     }
10628   }
10629 #pragma omp atomic compare capture seq_cst
10630   {
10631     fv = fx;
10632     if (fx == fe) {
10633       fx = fd;
10634     }
10635   }
10636 #pragma omp atomic compare capture seq_cst
10637   {
10638     fv = fx;
10639     if (fe == fx) {
10640       fx = fd;
10641     }
10642   }
10643 #pragma omp atomic compare capture seq_cst
10644   {
10645     if (fe > fx) {
10646       fx = fe;
10647     }
10648     fv = fx;
10649   }
10650 #pragma omp atomic compare capture seq_cst
10651   {
10652     if (fx > fe) {
10653       fx = fe;
10654     }
10655     fv = fx;
10656   }
10657 #pragma omp atomic compare capture seq_cst
10658   {
10659     if (fe < fx) {
10660       fx = fe;
10661     }
10662     fv = fx;
10663   }
10664 #pragma omp atomic compare capture seq_cst
10665   {
10666     if (fx < fe) {
10667       fx = fe;
10668     }
10669     fv = fx;
10670   }
10671 #pragma omp atomic compare capture seq_cst
10672   {
10673     if (fx == fe) {
10674       fx = fd;
10675     }
10676     fv = fx;
10677   }
10678 #pragma omp atomic compare capture seq_cst
10679   {
10680     if (fe == fx) {
10681       fx = fd;
10682     }
10683     fv = fx;
10684   }
10685 #pragma omp atomic compare capture seq_cst
10686   if (fx == fe) {
10687     fx = fd;
10688   } else {
10689     fv = fx;
10690   }
10691 #pragma omp atomic compare capture seq_cst
10692   if (fe == fx) {
10693     fx = fd;
10694   } else {
10695     fv = fx;
10696   }
10697 #pragma omp atomic compare capture seq_cst
10698   {
10699     ir = fx == fe;
10700     if (ir) {
10701       fx = fd;
10702     }
10703   }
10704 #pragma omp atomic compare capture seq_cst
10705   {
10706     ir = fe == fx;
10707     if (ir) {
10708       fx = fd;
10709     }
10710   }
10711 #pragma omp atomic compare capture seq_cst
10712   {
10713     ir = fx == fe;
10714     if (ir) {
10715       fx = fd;
10716     } else {
10717       fv = fx;
10718     }
10719   }
10720 #pragma omp atomic compare capture seq_cst
10721   {
10722     ir = fe == fx;
10723     if (ir) {
10724       fx = fd;
10725     } else {
10726       fv = fx;
10727     }
10728   }
10729 
10730 #pragma omp atomic compare capture
10731   {
10732     dv = dx;
10733     if (de > dx) {
10734       dx = de;
10735     }
10736   }
10737 #pragma omp atomic compare capture
10738   {
10739     dv = dx;
10740     if (dx > de) {
10741       dx = de;
10742     }
10743   }
10744 #pragma omp atomic compare capture
10745   {
10746     dv = dx;
10747     if (de < dx) {
10748       dx = de;
10749     }
10750   }
10751 #pragma omp atomic compare capture
10752   {
10753     dv = dx;
10754     if (dx < de) {
10755       dx = de;
10756     }
10757   }
10758 #pragma omp atomic compare capture
10759   {
10760     dv = dx;
10761     if (dx == de) {
10762       dx = dd;
10763     }
10764   }
10765 #pragma omp atomic compare capture
10766   {
10767     dv = dx;
10768     if (de == dx) {
10769       dx = dd;
10770     }
10771   }
10772 #pragma omp atomic compare capture
10773   {
10774     if (de > dx) {
10775       dx = de;
10776     }
10777     dv = dx;
10778   }
10779 #pragma omp atomic compare capture
10780   {
10781     if (dx > de) {
10782       dx = de;
10783     }
10784     dv = dx;
10785   }
10786 #pragma omp atomic compare capture
10787   {
10788     if (de < dx) {
10789       dx = de;
10790     }
10791     dv = dx;
10792   }
10793 #pragma omp atomic compare capture
10794   {
10795     if (dx < de) {
10796       dx = de;
10797     }
10798     dv = dx;
10799   }
10800 #pragma omp atomic compare capture
10801   {
10802     if (dx == de) {
10803       dx = dd;
10804     }
10805     dv = dx;
10806   }
10807 #pragma omp atomic compare capture
10808   {
10809     if (de == dx) {
10810       dx = dd;
10811     }
10812     dv = dx;
10813   }
10814 #pragma omp atomic compare capture
10815   if (dx == de) {
10816     dx = dd;
10817   } else {
10818     dv = dx;
10819   }
10820 #pragma omp atomic compare capture
10821   if (de == dx) {
10822     dx = dd;
10823   } else {
10824     dv = dx;
10825   }
10826 #pragma omp atomic compare capture
10827   {
10828     ir = dx == de;
10829     if (ir) {
10830       dx = dd;
10831     }
10832   }
10833 #pragma omp atomic compare capture
10834   {
10835     ir = de == dx;
10836     if (ir) {
10837       dx = dd;
10838     }
10839   }
10840 #pragma omp atomic compare capture
10841   {
10842     ir = dx == de;
10843     if (ir) {
10844       dx = dd;
10845     } else {
10846       dv = dx;
10847     }
10848   }
10849 #pragma omp atomic compare capture
10850   {
10851     ir = de == dx;
10852     if (ir) {
10853       dx = dd;
10854     } else {
10855       dv = dx;
10856     }
10857   }
10858 
10859 #pragma omp atomic compare capture acq_rel
10860   {
10861     dv = dx;
10862     if (de > dx) {
10863       dx = de;
10864     }
10865   }
10866 #pragma omp atomic compare capture acq_rel
10867   {
10868     dv = dx;
10869     if (dx > de) {
10870       dx = de;
10871     }
10872   }
10873 #pragma omp atomic compare capture acq_rel
10874   {
10875     dv = dx;
10876     if (de < dx) {
10877       dx = de;
10878     }
10879   }
10880 #pragma omp atomic compare capture acq_rel
10881   {
10882     dv = dx;
10883     if (dx < de) {
10884       dx = de;
10885     }
10886   }
10887 #pragma omp atomic compare capture acq_rel
10888   {
10889     dv = dx;
10890     if (dx == de) {
10891       dx = dd;
10892     }
10893   }
10894 #pragma omp atomic compare capture acq_rel
10895   {
10896     dv = dx;
10897     if (de == dx) {
10898       dx = dd;
10899     }
10900   }
10901 #pragma omp atomic compare capture acq_rel
10902   {
10903     if (de > dx) {
10904       dx = de;
10905     }
10906     dv = dx;
10907   }
10908 #pragma omp atomic compare capture acq_rel
10909   {
10910     if (dx > de) {
10911       dx = de;
10912     }
10913     dv = dx;
10914   }
10915 #pragma omp atomic compare capture acq_rel
10916   {
10917     if (de < dx) {
10918       dx = de;
10919     }
10920     dv = dx;
10921   }
10922 #pragma omp atomic compare capture acq_rel
10923   {
10924     if (dx < de) {
10925       dx = de;
10926     }
10927     dv = dx;
10928   }
10929 #pragma omp atomic compare capture acq_rel
10930   {
10931     if (dx == de) {
10932       dx = dd;
10933     }
10934     dv = dx;
10935   }
10936 #pragma omp atomic compare capture acq_rel
10937   {
10938     if (de == dx) {
10939       dx = dd;
10940     }
10941     dv = dx;
10942   }
10943 #pragma omp atomic compare capture acq_rel
10944   if (dx == de) {
10945     dx = dd;
10946   } else {
10947     dv = dx;
10948   }
10949 #pragma omp atomic compare capture acq_rel
10950   if (de == dx) {
10951     dx = dd;
10952   } else {
10953     dv = dx;
10954   }
10955 #pragma omp atomic compare capture acq_rel
10956   {
10957     ir = dx == de;
10958     if (ir) {
10959       dx = dd;
10960     }
10961   }
10962 #pragma omp atomic compare capture acq_rel
10963   {
10964     ir = de == dx;
10965     if (ir) {
10966       dx = dd;
10967     }
10968   }
10969 #pragma omp atomic compare capture acq_rel
10970   {
10971     ir = dx == de;
10972     if (ir) {
10973       dx = dd;
10974     } else {
10975       dv = dx;
10976     }
10977   }
10978 #pragma omp atomic compare capture acq_rel
10979   {
10980     ir = de == dx;
10981     if (ir) {
10982       dx = dd;
10983     } else {
10984       dv = dx;
10985     }
10986   }
10987 
10988 #pragma omp atomic compare capture acquire
10989   {
10990     dv = dx;
10991     if (de > dx) {
10992       dx = de;
10993     }
10994   }
10995 #pragma omp atomic compare capture acquire
10996   {
10997     dv = dx;
10998     if (dx > de) {
10999       dx = de;
11000     }
11001   }
11002 #pragma omp atomic compare capture acquire
11003   {
11004     dv = dx;
11005     if (de < dx) {
11006       dx = de;
11007     }
11008   }
11009 #pragma omp atomic compare capture acquire
11010   {
11011     dv = dx;
11012     if (dx < de) {
11013       dx = de;
11014     }
11015   }
11016 #pragma omp atomic compare capture acquire
11017   {
11018     dv = dx;
11019     if (dx == de) {
11020       dx = dd;
11021     }
11022   }
11023 #pragma omp atomic compare capture acquire
11024   {
11025     dv = dx;
11026     if (de == dx) {
11027       dx = dd;
11028     }
11029   }
11030 #pragma omp atomic compare capture acquire
11031   {
11032     if (de > dx) {
11033       dx = de;
11034     }
11035     dv = dx;
11036   }
11037 #pragma omp atomic compare capture acquire
11038   {
11039     if (dx > de) {
11040       dx = de;
11041     }
11042     dv = dx;
11043   }
11044 #pragma omp atomic compare capture acquire
11045   {
11046     if (de < dx) {
11047       dx = de;
11048     }
11049     dv = dx;
11050   }
11051 #pragma omp atomic compare capture acquire
11052   {
11053     if (dx < de) {
11054       dx = de;
11055     }
11056     dv = dx;
11057   }
11058 #pragma omp atomic compare capture acquire
11059   {
11060     if (dx == de) {
11061       dx = dd;
11062     }
11063     dv = dx;
11064   }
11065 #pragma omp atomic compare capture acquire
11066   {
11067     if (de == dx) {
11068       dx = dd;
11069     }
11070     dv = dx;
11071   }
11072 #pragma omp atomic compare capture acquire
11073   if (dx == de) {
11074     dx = dd;
11075   } else {
11076     dv = dx;
11077   }
11078 #pragma omp atomic compare capture acquire
11079   if (de == dx) {
11080     dx = dd;
11081   } else {
11082     dv = dx;
11083   }
11084 #pragma omp atomic compare capture acquire
11085   {
11086     ir = dx == de;
11087     if (ir) {
11088       dx = dd;
11089     }
11090   }
11091 #pragma omp atomic compare capture acquire
11092   {
11093     ir = de == dx;
11094     if (ir) {
11095       dx = dd;
11096     }
11097   }
11098 #pragma omp atomic compare capture acquire
11099   {
11100     ir = dx == de;
11101     if (ir) {
11102       dx = dd;
11103     } else {
11104       dv = dx;
11105     }
11106   }
11107 #pragma omp atomic compare capture acquire
11108   {
11109     ir = de == dx;
11110     if (ir) {
11111       dx = dd;
11112     } else {
11113       dv = dx;
11114     }
11115   }
11116 
11117 #pragma omp atomic compare capture relaxed
11118   {
11119     dv = dx;
11120     if (de > dx) {
11121       dx = de;
11122     }
11123   }
11124 #pragma omp atomic compare capture relaxed
11125   {
11126     dv = dx;
11127     if (dx > de) {
11128       dx = de;
11129     }
11130   }
11131 #pragma omp atomic compare capture relaxed
11132   {
11133     dv = dx;
11134     if (de < dx) {
11135       dx = de;
11136     }
11137   }
11138 #pragma omp atomic compare capture relaxed
11139   {
11140     dv = dx;
11141     if (dx < de) {
11142       dx = de;
11143     }
11144   }
11145 #pragma omp atomic compare capture relaxed
11146   {
11147     dv = dx;
11148     if (dx == de) {
11149       dx = dd;
11150     }
11151   }
11152 #pragma omp atomic compare capture relaxed
11153   {
11154     dv = dx;
11155     if (de == dx) {
11156       dx = dd;
11157     }
11158   }
11159 #pragma omp atomic compare capture relaxed
11160   {
11161     if (de > dx) {
11162       dx = de;
11163     }
11164     dv = dx;
11165   }
11166 #pragma omp atomic compare capture relaxed
11167   {
11168     if (dx > de) {
11169       dx = de;
11170     }
11171     dv = dx;
11172   }
11173 #pragma omp atomic compare capture relaxed
11174   {
11175     if (de < dx) {
11176       dx = de;
11177     }
11178     dv = dx;
11179   }
11180 #pragma omp atomic compare capture relaxed
11181   {
11182     if (dx < de) {
11183       dx = de;
11184     }
11185     dv = dx;
11186   }
11187 #pragma omp atomic compare capture relaxed
11188   {
11189     if (dx == de) {
11190       dx = dd;
11191     }
11192     dv = dx;
11193   }
11194 #pragma omp atomic compare capture relaxed
11195   {
11196     if (de == dx) {
11197       dx = dd;
11198     }
11199     dv = dx;
11200   }
11201 #pragma omp atomic compare capture relaxed
11202   if (dx == de) {
11203     dx = dd;
11204   } else {
11205     dv = dx;
11206   }
11207 #pragma omp atomic compare capture relaxed
11208   if (de == dx) {
11209     dx = dd;
11210   } else {
11211     dv = dx;
11212   }
11213 #pragma omp atomic compare capture relaxed
11214   {
11215     ir = dx == de;
11216     if (ir) {
11217       dx = dd;
11218     }
11219   }
11220 #pragma omp atomic compare capture relaxed
11221   {
11222     ir = de == dx;
11223     if (ir) {
11224       dx = dd;
11225     }
11226   }
11227 #pragma omp atomic compare capture relaxed
11228   {
11229     ir = dx == de;
11230     if (ir) {
11231       dx = dd;
11232     } else {
11233       dv = dx;
11234     }
11235   }
11236 #pragma omp atomic compare capture relaxed
11237   {
11238     ir = de == dx;
11239     if (ir) {
11240       dx = dd;
11241     } else {
11242       dv = dx;
11243     }
11244   }
11245 
11246 #pragma omp atomic compare capture release
11247   {
11248     dv = dx;
11249     if (de > dx) {
11250       dx = de;
11251     }
11252   }
11253 #pragma omp atomic compare capture release
11254   {
11255     dv = dx;
11256     if (dx > de) {
11257       dx = de;
11258     }
11259   }
11260 #pragma omp atomic compare capture release
11261   {
11262     dv = dx;
11263     if (de < dx) {
11264       dx = de;
11265     }
11266   }
11267 #pragma omp atomic compare capture release
11268   {
11269     dv = dx;
11270     if (dx < de) {
11271       dx = de;
11272     }
11273   }
11274 #pragma omp atomic compare capture release
11275   {
11276     dv = dx;
11277     if (dx == de) {
11278       dx = dd;
11279     }
11280   }
11281 #pragma omp atomic compare capture release
11282   {
11283     dv = dx;
11284     if (de == dx) {
11285       dx = dd;
11286     }
11287   }
11288 #pragma omp atomic compare capture release
11289   {
11290     if (de > dx) {
11291       dx = de;
11292     }
11293     dv = dx;
11294   }
11295 #pragma omp atomic compare capture release
11296   {
11297     if (dx > de) {
11298       dx = de;
11299     }
11300     dv = dx;
11301   }
11302 #pragma omp atomic compare capture release
11303   {
11304     if (de < dx) {
11305       dx = de;
11306     }
11307     dv = dx;
11308   }
11309 #pragma omp atomic compare capture release
11310   {
11311     if (dx < de) {
11312       dx = de;
11313     }
11314     dv = dx;
11315   }
11316 #pragma omp atomic compare capture release
11317   {
11318     if (dx == de) {
11319       dx = dd;
11320     }
11321     dv = dx;
11322   }
11323 #pragma omp atomic compare capture release
11324   {
11325     if (de == dx) {
11326       dx = dd;
11327     }
11328     dv = dx;
11329   }
11330 #pragma omp atomic compare capture release
11331   if (dx == de) {
11332     dx = dd;
11333   } else {
11334     dv = dx;
11335   }
11336 #pragma omp atomic compare capture release
11337   if (de == dx) {
11338     dx = dd;
11339   } else {
11340     dv = dx;
11341   }
11342 #pragma omp atomic compare capture release
11343   {
11344     ir = dx == de;
11345     if (ir) {
11346       dx = dd;
11347     }
11348   }
11349 #pragma omp atomic compare capture release
11350   {
11351     ir = de == dx;
11352     if (ir) {
11353       dx = dd;
11354     }
11355   }
11356 #pragma omp atomic compare capture release
11357   {
11358     ir = dx == de;
11359     if (ir) {
11360       dx = dd;
11361     } else {
11362       dv = dx;
11363     }
11364   }
11365 #pragma omp atomic compare capture release
11366   {
11367     ir = de == dx;
11368     if (ir) {
11369       dx = dd;
11370     } else {
11371       dv = dx;
11372     }
11373   }
11374 
11375 #pragma omp atomic compare capture seq_cst
11376   {
11377     dv = dx;
11378     if (de > dx) {
11379       dx = de;
11380     }
11381   }
11382 #pragma omp atomic compare capture seq_cst
11383   {
11384     dv = dx;
11385     if (dx > de) {
11386       dx = de;
11387     }
11388   }
11389 #pragma omp atomic compare capture seq_cst
11390   {
11391     dv = dx;
11392     if (de < dx) {
11393       dx = de;
11394     }
11395   }
11396 #pragma omp atomic compare capture seq_cst
11397   {
11398     dv = dx;
11399     if (dx < de) {
11400       dx = de;
11401     }
11402   }
11403 #pragma omp atomic compare capture seq_cst
11404   {
11405     dv = dx;
11406     if (dx == de) {
11407       dx = dd;
11408     }
11409   }
11410 #pragma omp atomic compare capture seq_cst
11411   {
11412     dv = dx;
11413     if (de == dx) {
11414       dx = dd;
11415     }
11416   }
11417 #pragma omp atomic compare capture seq_cst
11418   {
11419     if (de > dx) {
11420       dx = de;
11421     }
11422     dv = dx;
11423   }
11424 #pragma omp atomic compare capture seq_cst
11425   {
11426     if (dx > de) {
11427       dx = de;
11428     }
11429     dv = dx;
11430   }
11431 #pragma omp atomic compare capture seq_cst
11432   {
11433     if (de < dx) {
11434       dx = de;
11435     }
11436     dv = dx;
11437   }
11438 #pragma omp atomic compare capture seq_cst
11439   {
11440     if (dx < de) {
11441       dx = de;
11442     }
11443     dv = dx;
11444   }
11445 #pragma omp atomic compare capture seq_cst
11446   {
11447     if (dx == de) {
11448       dx = dd;
11449     }
11450     dv = dx;
11451   }
11452 #pragma omp atomic compare capture seq_cst
11453   {
11454     if (de == dx) {
11455       dx = dd;
11456     }
11457     dv = dx;
11458   }
11459 #pragma omp atomic compare capture seq_cst
11460   if (dx == de) {
11461     dx = dd;
11462   } else {
11463     dv = dx;
11464   }
11465 #pragma omp atomic compare capture seq_cst
11466   if (de == dx) {
11467     dx = dd;
11468   } else {
11469     dv = dx;
11470   }
11471 #pragma omp atomic compare capture seq_cst
11472   {
11473     ir = dx == de;
11474     if (ir) {
11475       dx = dd;
11476     }
11477   }
11478 #pragma omp atomic compare capture seq_cst
11479   {
11480     ir = de == dx;
11481     if (ir) {
11482       dx = dd;
11483     }
11484   }
11485 #pragma omp atomic compare capture seq_cst
11486   {
11487     ir = dx == de;
11488     if (ir) {
11489       dx = dd;
11490     } else {
11491       dv = dx;
11492     }
11493   }
11494 #pragma omp atomic compare capture seq_cst
11495   {
11496     ir = de == dx;
11497     if (ir) {
11498       dx = dd;
11499     } else {
11500       dv = dx;
11501     }
11502   }
11503 }
11504 
11505 #endif
11506 // CHECK-LABEL: @foo(
11507 // CHECK-NEXT:  entry:
11508 // CHECK-NEXT:    [[CX:%.*]] = alloca i8, align 1
11509 // CHECK-NEXT:    [[CE:%.*]] = alloca i8, align 1
11510 // CHECK-NEXT:    [[CD:%.*]] = alloca i8, align 1
11511 // CHECK-NEXT:    [[UCX:%.*]] = alloca i8, align 1
11512 // CHECK-NEXT:    [[UCE:%.*]] = alloca i8, align 1
11513 // CHECK-NEXT:    [[UCD:%.*]] = alloca i8, align 1
11514 // CHECK-NEXT:    [[SX:%.*]] = alloca i16, align 2
11515 // CHECK-NEXT:    [[SE:%.*]] = alloca i16, align 2
11516 // CHECK-NEXT:    [[SD:%.*]] = alloca i16, align 2
11517 // CHECK-NEXT:    [[USX:%.*]] = alloca i16, align 2
11518 // CHECK-NEXT:    [[USE:%.*]] = alloca i16, align 2
11519 // CHECK-NEXT:    [[USD:%.*]] = alloca i16, align 2
11520 // CHECK-NEXT:    [[IX:%.*]] = alloca i32, align 4
11521 // CHECK-NEXT:    [[IE:%.*]] = alloca i32, align 4
11522 // CHECK-NEXT:    [[ID:%.*]] = alloca i32, align 4
11523 // CHECK-NEXT:    [[UIX:%.*]] = alloca i32, align 4
11524 // CHECK-NEXT:    [[UIE:%.*]] = alloca i32, align 4
11525 // CHECK-NEXT:    [[UID:%.*]] = alloca i32, align 4
11526 // CHECK-NEXT:    [[LX:%.*]] = alloca i64, align 8
11527 // CHECK-NEXT:    [[LE:%.*]] = alloca i64, align 8
11528 // CHECK-NEXT:    [[LD:%.*]] = alloca i64, align 8
11529 // CHECK-NEXT:    [[ULX:%.*]] = alloca i64, align 8
11530 // CHECK-NEXT:    [[ULE:%.*]] = alloca i64, align 8
11531 // CHECK-NEXT:    [[ULD:%.*]] = alloca i64, align 8
11532 // CHECK-NEXT:    [[LLX:%.*]] = alloca i64, align 8
11533 // CHECK-NEXT:    [[LLE:%.*]] = alloca i64, align 8
11534 // CHECK-NEXT:    [[LLD:%.*]] = alloca i64, align 8
11535 // CHECK-NEXT:    [[ULLX:%.*]] = alloca i64, align 8
11536 // CHECK-NEXT:    [[ULLE:%.*]] = alloca i64, align 8
11537 // CHECK-NEXT:    [[ULLD:%.*]] = alloca i64, align 8
11538 // CHECK-NEXT:    [[FX:%.*]] = alloca float, align 4
11539 // CHECK-NEXT:    [[FE:%.*]] = alloca float, align 4
11540 // CHECK-NEXT:    [[FD:%.*]] = alloca float, align 4
11541 // CHECK-NEXT:    [[DX:%.*]] = alloca double, align 8
11542 // CHECK-NEXT:    [[DE:%.*]] = alloca double, align 8
11543 // CHECK-NEXT:    [[DD:%.*]] = alloca double, align 8
11544 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CE]], align 1
11545 // CHECK-NEXT:    [[TMP1:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP0]] monotonic, align 1
11546 // CHECK-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CE]], align 1
11547 // CHECK-NEXT:    [[TMP3:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP2]] monotonic, align 1
11548 // CHECK-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CE]], align 1
11549 // CHECK-NEXT:    [[TMP5:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP4]] monotonic, align 1
11550 // CHECK-NEXT:    [[TMP6:%.*]] = load i8, i8* [[CE]], align 1
11551 // CHECK-NEXT:    [[TMP7:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP6]] monotonic, align 1
11552 // CHECK-NEXT:    [[TMP8:%.*]] = load i8, i8* [[CE]], align 1
11553 // CHECK-NEXT:    [[TMP9:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP8]] monotonic, align 1
11554 // CHECK-NEXT:    [[TMP10:%.*]] = load i8, i8* [[CE]], align 1
11555 // CHECK-NEXT:    [[TMP11:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP10]] monotonic, align 1
11556 // CHECK-NEXT:    [[TMP12:%.*]] = load i8, i8* [[CE]], align 1
11557 // CHECK-NEXT:    [[TMP13:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP12]] monotonic, align 1
11558 // CHECK-NEXT:    [[TMP14:%.*]] = load i8, i8* [[CE]], align 1
11559 // CHECK-NEXT:    [[TMP15:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP14]] monotonic, align 1
11560 // CHECK-NEXT:    [[TMP16:%.*]] = load i8, i8* [[CE]], align 1
11561 // CHECK-NEXT:    [[TMP17:%.*]] = load i8, i8* [[CD]], align 1
11562 // CHECK-NEXT:    [[TMP18:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP16]], i8 [[TMP17]] monotonic monotonic, align 1
11563 // CHECK-NEXT:    [[TMP19:%.*]] = load i8, i8* [[CE]], align 1
11564 // CHECK-NEXT:    [[TMP20:%.*]] = load i8, i8* [[CD]], align 1
11565 // CHECK-NEXT:    [[TMP21:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP19]], i8 [[TMP20]] monotonic monotonic, align 1
11566 // CHECK-NEXT:    [[TMP22:%.*]] = load i8, i8* [[CE]], align 1
11567 // CHECK-NEXT:    [[TMP23:%.*]] = load i8, i8* [[CD]], align 1
11568 // CHECK-NEXT:    [[TMP24:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP22]], i8 [[TMP23]] monotonic monotonic, align 1
11569 // CHECK-NEXT:    [[TMP25:%.*]] = load i8, i8* [[CE]], align 1
11570 // CHECK-NEXT:    [[TMP26:%.*]] = load i8, i8* [[CD]], align 1
11571 // CHECK-NEXT:    [[TMP27:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP25]], i8 [[TMP26]] monotonic monotonic, align 1
11572 // CHECK-NEXT:    [[TMP28:%.*]] = load i8, i8* [[UCE]], align 1
11573 // CHECK-NEXT:    [[TMP29:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP28]] monotonic, align 1
11574 // CHECK-NEXT:    [[TMP30:%.*]] = load i8, i8* [[UCE]], align 1
11575 // CHECK-NEXT:    [[TMP31:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP30]] monotonic, align 1
11576 // CHECK-NEXT:    [[TMP32:%.*]] = load i8, i8* [[UCE]], align 1
11577 // CHECK-NEXT:    [[TMP33:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP32]] monotonic, align 1
11578 // CHECK-NEXT:    [[TMP34:%.*]] = load i8, i8* [[UCE]], align 1
11579 // CHECK-NEXT:    [[TMP35:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP34]] monotonic, align 1
11580 // CHECK-NEXT:    [[TMP36:%.*]] = load i8, i8* [[UCE]], align 1
11581 // CHECK-NEXT:    [[TMP37:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP36]] monotonic, align 1
11582 // CHECK-NEXT:    [[TMP38:%.*]] = load i8, i8* [[UCE]], align 1
11583 // CHECK-NEXT:    [[TMP39:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP38]] monotonic, align 1
11584 // CHECK-NEXT:    [[TMP40:%.*]] = load i8, i8* [[UCE]], align 1
11585 // CHECK-NEXT:    [[TMP41:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP40]] monotonic, align 1
11586 // CHECK-NEXT:    [[TMP42:%.*]] = load i8, i8* [[UCE]], align 1
11587 // CHECK-NEXT:    [[TMP43:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP42]] monotonic, align 1
11588 // CHECK-NEXT:    [[TMP44:%.*]] = load i8, i8* [[UCE]], align 1
11589 // CHECK-NEXT:    [[TMP45:%.*]] = load i8, i8* [[UCD]], align 1
11590 // CHECK-NEXT:    [[TMP46:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP44]], i8 [[TMP45]] monotonic monotonic, align 1
11591 // CHECK-NEXT:    [[TMP47:%.*]] = load i8, i8* [[UCE]], align 1
11592 // CHECK-NEXT:    [[TMP48:%.*]] = load i8, i8* [[UCD]], align 1
11593 // CHECK-NEXT:    [[TMP49:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP47]], i8 [[TMP48]] monotonic monotonic, align 1
11594 // CHECK-NEXT:    [[TMP50:%.*]] = load i8, i8* [[UCE]], align 1
11595 // CHECK-NEXT:    [[TMP51:%.*]] = load i8, i8* [[UCD]], align 1
11596 // CHECK-NEXT:    [[TMP52:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP50]], i8 [[TMP51]] monotonic monotonic, align 1
11597 // CHECK-NEXT:    [[TMP53:%.*]] = load i8, i8* [[UCE]], align 1
11598 // CHECK-NEXT:    [[TMP54:%.*]] = load i8, i8* [[UCD]], align 1
11599 // CHECK-NEXT:    [[TMP55:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP53]], i8 [[TMP54]] monotonic monotonic, align 1
11600 // CHECK-NEXT:    [[TMP56:%.*]] = load i8, i8* [[CE]], align 1
11601 // CHECK-NEXT:    [[TMP57:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP56]] acq_rel, align 1
11602 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1:[0-9]+]])
11603 // CHECK-NEXT:    [[TMP58:%.*]] = load i8, i8* [[CE]], align 1
11604 // CHECK-NEXT:    [[TMP59:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP58]] acq_rel, align 1
11605 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11606 // CHECK-NEXT:    [[TMP60:%.*]] = load i8, i8* [[CE]], align 1
11607 // CHECK-NEXT:    [[TMP61:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP60]] acq_rel, align 1
11608 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11609 // CHECK-NEXT:    [[TMP62:%.*]] = load i8, i8* [[CE]], align 1
11610 // CHECK-NEXT:    [[TMP63:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP62]] acq_rel, align 1
11611 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11612 // CHECK-NEXT:    [[TMP64:%.*]] = load i8, i8* [[CE]], align 1
11613 // CHECK-NEXT:    [[TMP65:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP64]] acq_rel, align 1
11614 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11615 // CHECK-NEXT:    [[TMP66:%.*]] = load i8, i8* [[CE]], align 1
11616 // CHECK-NEXT:    [[TMP67:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP66]] acq_rel, align 1
11617 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11618 // CHECK-NEXT:    [[TMP68:%.*]] = load i8, i8* [[CE]], align 1
11619 // CHECK-NEXT:    [[TMP69:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP68]] acq_rel, align 1
11620 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11621 // CHECK-NEXT:    [[TMP70:%.*]] = load i8, i8* [[CE]], align 1
11622 // CHECK-NEXT:    [[TMP71:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP70]] acq_rel, align 1
11623 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11624 // CHECK-NEXT:    [[TMP72:%.*]] = load i8, i8* [[CE]], align 1
11625 // CHECK-NEXT:    [[TMP73:%.*]] = load i8, i8* [[CD]], align 1
11626 // CHECK-NEXT:    [[TMP74:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP72]], i8 [[TMP73]] acq_rel acquire, align 1
11627 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11628 // CHECK-NEXT:    [[TMP75:%.*]] = load i8, i8* [[CE]], align 1
11629 // CHECK-NEXT:    [[TMP76:%.*]] = load i8, i8* [[CD]], align 1
11630 // CHECK-NEXT:    [[TMP77:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP75]], i8 [[TMP76]] acq_rel acquire, align 1
11631 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11632 // CHECK-NEXT:    [[TMP78:%.*]] = load i8, i8* [[CE]], align 1
11633 // CHECK-NEXT:    [[TMP79:%.*]] = load i8, i8* [[CD]], align 1
11634 // CHECK-NEXT:    [[TMP80:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP78]], i8 [[TMP79]] acq_rel acquire, align 1
11635 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11636 // CHECK-NEXT:    [[TMP81:%.*]] = load i8, i8* [[CE]], align 1
11637 // CHECK-NEXT:    [[TMP82:%.*]] = load i8, i8* [[CD]], align 1
11638 // CHECK-NEXT:    [[TMP83:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP81]], i8 [[TMP82]] acq_rel acquire, align 1
11639 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11640 // CHECK-NEXT:    [[TMP84:%.*]] = load i8, i8* [[UCE]], align 1
11641 // CHECK-NEXT:    [[TMP85:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP84]] acq_rel, align 1
11642 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11643 // CHECK-NEXT:    [[TMP86:%.*]] = load i8, i8* [[UCE]], align 1
11644 // CHECK-NEXT:    [[TMP87:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP86]] acq_rel, align 1
11645 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11646 // CHECK-NEXT:    [[TMP88:%.*]] = load i8, i8* [[UCE]], align 1
11647 // CHECK-NEXT:    [[TMP89:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP88]] acq_rel, align 1
11648 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11649 // CHECK-NEXT:    [[TMP90:%.*]] = load i8, i8* [[UCE]], align 1
11650 // CHECK-NEXT:    [[TMP91:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP90]] acq_rel, align 1
11651 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11652 // CHECK-NEXT:    [[TMP92:%.*]] = load i8, i8* [[UCE]], align 1
11653 // CHECK-NEXT:    [[TMP93:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP92]] acq_rel, align 1
11654 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11655 // CHECK-NEXT:    [[TMP94:%.*]] = load i8, i8* [[UCE]], align 1
11656 // CHECK-NEXT:    [[TMP95:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP94]] acq_rel, align 1
11657 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11658 // CHECK-NEXT:    [[TMP96:%.*]] = load i8, i8* [[UCE]], align 1
11659 // CHECK-NEXT:    [[TMP97:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP96]] acq_rel, align 1
11660 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11661 // CHECK-NEXT:    [[TMP98:%.*]] = load i8, i8* [[UCE]], align 1
11662 // CHECK-NEXT:    [[TMP99:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP98]] acq_rel, align 1
11663 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11664 // CHECK-NEXT:    [[TMP100:%.*]] = load i8, i8* [[UCE]], align 1
11665 // CHECK-NEXT:    [[TMP101:%.*]] = load i8, i8* [[UCD]], align 1
11666 // CHECK-NEXT:    [[TMP102:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP100]], i8 [[TMP101]] acq_rel acquire, align 1
11667 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11668 // CHECK-NEXT:    [[TMP103:%.*]] = load i8, i8* [[UCE]], align 1
11669 // CHECK-NEXT:    [[TMP104:%.*]] = load i8, i8* [[UCD]], align 1
11670 // CHECK-NEXT:    [[TMP105:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP103]], i8 [[TMP104]] acq_rel acquire, align 1
11671 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11672 // CHECK-NEXT:    [[TMP106:%.*]] = load i8, i8* [[UCE]], align 1
11673 // CHECK-NEXT:    [[TMP107:%.*]] = load i8, i8* [[UCD]], align 1
11674 // CHECK-NEXT:    [[TMP108:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP106]], i8 [[TMP107]] acq_rel acquire, align 1
11675 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11676 // CHECK-NEXT:    [[TMP109:%.*]] = load i8, i8* [[UCE]], align 1
11677 // CHECK-NEXT:    [[TMP110:%.*]] = load i8, i8* [[UCD]], align 1
11678 // CHECK-NEXT:    [[TMP111:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP109]], i8 [[TMP110]] acq_rel acquire, align 1
11679 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11680 // CHECK-NEXT:    [[TMP112:%.*]] = load i8, i8* [[CE]], align 1
11681 // CHECK-NEXT:    [[TMP113:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP112]] acquire, align 1
11682 // CHECK-NEXT:    [[TMP114:%.*]] = load i8, i8* [[CE]], align 1
11683 // CHECK-NEXT:    [[TMP115:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP114]] acquire, align 1
11684 // CHECK-NEXT:    [[TMP116:%.*]] = load i8, i8* [[CE]], align 1
11685 // CHECK-NEXT:    [[TMP117:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP116]] acquire, align 1
11686 // CHECK-NEXT:    [[TMP118:%.*]] = load i8, i8* [[CE]], align 1
11687 // CHECK-NEXT:    [[TMP119:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP118]] acquire, align 1
11688 // CHECK-NEXT:    [[TMP120:%.*]] = load i8, i8* [[CE]], align 1
11689 // CHECK-NEXT:    [[TMP121:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP120]] acquire, align 1
11690 // CHECK-NEXT:    [[TMP122:%.*]] = load i8, i8* [[CE]], align 1
11691 // CHECK-NEXT:    [[TMP123:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP122]] acquire, align 1
11692 // CHECK-NEXT:    [[TMP124:%.*]] = load i8, i8* [[CE]], align 1
11693 // CHECK-NEXT:    [[TMP125:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP124]] acquire, align 1
11694 // CHECK-NEXT:    [[TMP126:%.*]] = load i8, i8* [[CE]], align 1
11695 // CHECK-NEXT:    [[TMP127:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP126]] acquire, align 1
11696 // CHECK-NEXT:    [[TMP128:%.*]] = load i8, i8* [[CE]], align 1
11697 // CHECK-NEXT:    [[TMP129:%.*]] = load i8, i8* [[CD]], align 1
11698 // CHECK-NEXT:    [[TMP130:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP128]], i8 [[TMP129]] acquire acquire, align 1
11699 // CHECK-NEXT:    [[TMP131:%.*]] = load i8, i8* [[CE]], align 1
11700 // CHECK-NEXT:    [[TMP132:%.*]] = load i8, i8* [[CD]], align 1
11701 // CHECK-NEXT:    [[TMP133:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP131]], i8 [[TMP132]] acquire acquire, align 1
11702 // CHECK-NEXT:    [[TMP134:%.*]] = load i8, i8* [[CE]], align 1
11703 // CHECK-NEXT:    [[TMP135:%.*]] = load i8, i8* [[CD]], align 1
11704 // CHECK-NEXT:    [[TMP136:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP134]], i8 [[TMP135]] acquire acquire, align 1
11705 // CHECK-NEXT:    [[TMP137:%.*]] = load i8, i8* [[CE]], align 1
11706 // CHECK-NEXT:    [[TMP138:%.*]] = load i8, i8* [[CD]], align 1
11707 // CHECK-NEXT:    [[TMP139:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP137]], i8 [[TMP138]] acquire acquire, align 1
11708 // CHECK-NEXT:    [[TMP140:%.*]] = load i8, i8* [[UCE]], align 1
11709 // CHECK-NEXT:    [[TMP141:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP140]] acquire, align 1
11710 // CHECK-NEXT:    [[TMP142:%.*]] = load i8, i8* [[UCE]], align 1
11711 // CHECK-NEXT:    [[TMP143:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP142]] acquire, align 1
11712 // CHECK-NEXT:    [[TMP144:%.*]] = load i8, i8* [[UCE]], align 1
11713 // CHECK-NEXT:    [[TMP145:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP144]] acquire, align 1
11714 // CHECK-NEXT:    [[TMP146:%.*]] = load i8, i8* [[UCE]], align 1
11715 // CHECK-NEXT:    [[TMP147:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP146]] acquire, align 1
11716 // CHECK-NEXT:    [[TMP148:%.*]] = load i8, i8* [[UCE]], align 1
11717 // CHECK-NEXT:    [[TMP149:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP148]] acquire, align 1
11718 // CHECK-NEXT:    [[TMP150:%.*]] = load i8, i8* [[UCE]], align 1
11719 // CHECK-NEXT:    [[TMP151:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP150]] acquire, align 1
11720 // CHECK-NEXT:    [[TMP152:%.*]] = load i8, i8* [[UCE]], align 1
11721 // CHECK-NEXT:    [[TMP153:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP152]] acquire, align 1
11722 // CHECK-NEXT:    [[TMP154:%.*]] = load i8, i8* [[UCE]], align 1
11723 // CHECK-NEXT:    [[TMP155:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP154]] acquire, align 1
11724 // CHECK-NEXT:    [[TMP156:%.*]] = load i8, i8* [[UCE]], align 1
11725 // CHECK-NEXT:    [[TMP157:%.*]] = load i8, i8* [[UCD]], align 1
11726 // CHECK-NEXT:    [[TMP158:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP156]], i8 [[TMP157]] acquire acquire, align 1
11727 // CHECK-NEXT:    [[TMP159:%.*]] = load i8, i8* [[UCE]], align 1
11728 // CHECK-NEXT:    [[TMP160:%.*]] = load i8, i8* [[UCD]], align 1
11729 // CHECK-NEXT:    [[TMP161:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP159]], i8 [[TMP160]] acquire acquire, align 1
11730 // CHECK-NEXT:    [[TMP162:%.*]] = load i8, i8* [[UCE]], align 1
11731 // CHECK-NEXT:    [[TMP163:%.*]] = load i8, i8* [[UCD]], align 1
11732 // CHECK-NEXT:    [[TMP164:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP162]], i8 [[TMP163]] acquire acquire, align 1
11733 // CHECK-NEXT:    [[TMP165:%.*]] = load i8, i8* [[UCE]], align 1
11734 // CHECK-NEXT:    [[TMP166:%.*]] = load i8, i8* [[UCD]], align 1
11735 // CHECK-NEXT:    [[TMP167:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP165]], i8 [[TMP166]] acquire acquire, align 1
11736 // CHECK-NEXT:    [[TMP168:%.*]] = load i8, i8* [[CE]], align 1
11737 // CHECK-NEXT:    [[TMP169:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP168]] monotonic, align 1
11738 // CHECK-NEXT:    [[TMP170:%.*]] = load i8, i8* [[CE]], align 1
11739 // CHECK-NEXT:    [[TMP171:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP170]] monotonic, align 1
11740 // CHECK-NEXT:    [[TMP172:%.*]] = load i8, i8* [[CE]], align 1
11741 // CHECK-NEXT:    [[TMP173:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP172]] monotonic, align 1
11742 // CHECK-NEXT:    [[TMP174:%.*]] = load i8, i8* [[CE]], align 1
11743 // CHECK-NEXT:    [[TMP175:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP174]] monotonic, align 1
11744 // CHECK-NEXT:    [[TMP176:%.*]] = load i8, i8* [[CE]], align 1
11745 // CHECK-NEXT:    [[TMP177:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP176]] monotonic, align 1
11746 // CHECK-NEXT:    [[TMP178:%.*]] = load i8, i8* [[CE]], align 1
11747 // CHECK-NEXT:    [[TMP179:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP178]] monotonic, align 1
11748 // CHECK-NEXT:    [[TMP180:%.*]] = load i8, i8* [[CE]], align 1
11749 // CHECK-NEXT:    [[TMP181:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP180]] monotonic, align 1
11750 // CHECK-NEXT:    [[TMP182:%.*]] = load i8, i8* [[CE]], align 1
11751 // CHECK-NEXT:    [[TMP183:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP182]] monotonic, align 1
11752 // CHECK-NEXT:    [[TMP184:%.*]] = load i8, i8* [[CE]], align 1
11753 // CHECK-NEXT:    [[TMP185:%.*]] = load i8, i8* [[CD]], align 1
11754 // CHECK-NEXT:    [[TMP186:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP184]], i8 [[TMP185]] monotonic monotonic, align 1
11755 // CHECK-NEXT:    [[TMP187:%.*]] = load i8, i8* [[CE]], align 1
11756 // CHECK-NEXT:    [[TMP188:%.*]] = load i8, i8* [[CD]], align 1
11757 // CHECK-NEXT:    [[TMP189:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP187]], i8 [[TMP188]] monotonic monotonic, align 1
11758 // CHECK-NEXT:    [[TMP190:%.*]] = load i8, i8* [[CE]], align 1
11759 // CHECK-NEXT:    [[TMP191:%.*]] = load i8, i8* [[CD]], align 1
11760 // CHECK-NEXT:    [[TMP192:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP190]], i8 [[TMP191]] monotonic monotonic, align 1
11761 // CHECK-NEXT:    [[TMP193:%.*]] = load i8, i8* [[CE]], align 1
11762 // CHECK-NEXT:    [[TMP194:%.*]] = load i8, i8* [[CD]], align 1
11763 // CHECK-NEXT:    [[TMP195:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP193]], i8 [[TMP194]] monotonic monotonic, align 1
11764 // CHECK-NEXT:    [[TMP196:%.*]] = load i8, i8* [[UCE]], align 1
11765 // CHECK-NEXT:    [[TMP197:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP196]] monotonic, align 1
11766 // CHECK-NEXT:    [[TMP198:%.*]] = load i8, i8* [[UCE]], align 1
11767 // CHECK-NEXT:    [[TMP199:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP198]] monotonic, align 1
11768 // CHECK-NEXT:    [[TMP200:%.*]] = load i8, i8* [[UCE]], align 1
11769 // CHECK-NEXT:    [[TMP201:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP200]] monotonic, align 1
11770 // CHECK-NEXT:    [[TMP202:%.*]] = load i8, i8* [[UCE]], align 1
11771 // CHECK-NEXT:    [[TMP203:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP202]] monotonic, align 1
11772 // CHECK-NEXT:    [[TMP204:%.*]] = load i8, i8* [[UCE]], align 1
11773 // CHECK-NEXT:    [[TMP205:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP204]] monotonic, align 1
11774 // CHECK-NEXT:    [[TMP206:%.*]] = load i8, i8* [[UCE]], align 1
11775 // CHECK-NEXT:    [[TMP207:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP206]] monotonic, align 1
11776 // CHECK-NEXT:    [[TMP208:%.*]] = load i8, i8* [[UCE]], align 1
11777 // CHECK-NEXT:    [[TMP209:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP208]] monotonic, align 1
11778 // CHECK-NEXT:    [[TMP210:%.*]] = load i8, i8* [[UCE]], align 1
11779 // CHECK-NEXT:    [[TMP211:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP210]] monotonic, align 1
11780 // CHECK-NEXT:    [[TMP212:%.*]] = load i8, i8* [[UCE]], align 1
11781 // CHECK-NEXT:    [[TMP213:%.*]] = load i8, i8* [[UCD]], align 1
11782 // CHECK-NEXT:    [[TMP214:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP212]], i8 [[TMP213]] monotonic monotonic, align 1
11783 // CHECK-NEXT:    [[TMP215:%.*]] = load i8, i8* [[UCE]], align 1
11784 // CHECK-NEXT:    [[TMP216:%.*]] = load i8, i8* [[UCD]], align 1
11785 // CHECK-NEXT:    [[TMP217:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP215]], i8 [[TMP216]] monotonic monotonic, align 1
11786 // CHECK-NEXT:    [[TMP218:%.*]] = load i8, i8* [[UCE]], align 1
11787 // CHECK-NEXT:    [[TMP219:%.*]] = load i8, i8* [[UCD]], align 1
11788 // CHECK-NEXT:    [[TMP220:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP218]], i8 [[TMP219]] monotonic monotonic, align 1
11789 // CHECK-NEXT:    [[TMP221:%.*]] = load i8, i8* [[UCE]], align 1
11790 // CHECK-NEXT:    [[TMP222:%.*]] = load i8, i8* [[UCD]], align 1
11791 // CHECK-NEXT:    [[TMP223:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP221]], i8 [[TMP222]] monotonic monotonic, align 1
11792 // CHECK-NEXT:    [[TMP224:%.*]] = load i8, i8* [[CE]], align 1
11793 // CHECK-NEXT:    [[TMP225:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP224]] release, align 1
11794 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11795 // CHECK-NEXT:    [[TMP226:%.*]] = load i8, i8* [[CE]], align 1
11796 // CHECK-NEXT:    [[TMP227:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP226]] release, align 1
11797 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11798 // CHECK-NEXT:    [[TMP228:%.*]] = load i8, i8* [[CE]], align 1
11799 // CHECK-NEXT:    [[TMP229:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP228]] release, align 1
11800 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11801 // CHECK-NEXT:    [[TMP230:%.*]] = load i8, i8* [[CE]], align 1
11802 // CHECK-NEXT:    [[TMP231:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP230]] release, align 1
11803 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11804 // CHECK-NEXT:    [[TMP232:%.*]] = load i8, i8* [[CE]], align 1
11805 // CHECK-NEXT:    [[TMP233:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP232]] release, align 1
11806 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11807 // CHECK-NEXT:    [[TMP234:%.*]] = load i8, i8* [[CE]], align 1
11808 // CHECK-NEXT:    [[TMP235:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP234]] release, align 1
11809 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11810 // CHECK-NEXT:    [[TMP236:%.*]] = load i8, i8* [[CE]], align 1
11811 // CHECK-NEXT:    [[TMP237:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP236]] release, align 1
11812 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11813 // CHECK-NEXT:    [[TMP238:%.*]] = load i8, i8* [[CE]], align 1
11814 // CHECK-NEXT:    [[TMP239:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP238]] release, align 1
11815 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11816 // CHECK-NEXT:    [[TMP240:%.*]] = load i8, i8* [[CE]], align 1
11817 // CHECK-NEXT:    [[TMP241:%.*]] = load i8, i8* [[CD]], align 1
11818 // CHECK-NEXT:    [[TMP242:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP240]], i8 [[TMP241]] release monotonic, align 1
11819 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11820 // CHECK-NEXT:    [[TMP243:%.*]] = load i8, i8* [[CE]], align 1
11821 // CHECK-NEXT:    [[TMP244:%.*]] = load i8, i8* [[CD]], align 1
11822 // CHECK-NEXT:    [[TMP245:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP243]], i8 [[TMP244]] release monotonic, align 1
11823 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11824 // CHECK-NEXT:    [[TMP246:%.*]] = load i8, i8* [[CE]], align 1
11825 // CHECK-NEXT:    [[TMP247:%.*]] = load i8, i8* [[CD]], align 1
11826 // CHECK-NEXT:    [[TMP248:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP246]], i8 [[TMP247]] release monotonic, align 1
11827 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11828 // CHECK-NEXT:    [[TMP249:%.*]] = load i8, i8* [[CE]], align 1
11829 // CHECK-NEXT:    [[TMP250:%.*]] = load i8, i8* [[CD]], align 1
11830 // CHECK-NEXT:    [[TMP251:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP249]], i8 [[TMP250]] release monotonic, align 1
11831 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11832 // CHECK-NEXT:    [[TMP252:%.*]] = load i8, i8* [[UCE]], align 1
11833 // CHECK-NEXT:    [[TMP253:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP252]] release, align 1
11834 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11835 // CHECK-NEXT:    [[TMP254:%.*]] = load i8, i8* [[UCE]], align 1
11836 // CHECK-NEXT:    [[TMP255:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP254]] release, align 1
11837 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11838 // CHECK-NEXT:    [[TMP256:%.*]] = load i8, i8* [[UCE]], align 1
11839 // CHECK-NEXT:    [[TMP257:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP256]] release, align 1
11840 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11841 // CHECK-NEXT:    [[TMP258:%.*]] = load i8, i8* [[UCE]], align 1
11842 // CHECK-NEXT:    [[TMP259:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP258]] release, align 1
11843 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11844 // CHECK-NEXT:    [[TMP260:%.*]] = load i8, i8* [[UCE]], align 1
11845 // CHECK-NEXT:    [[TMP261:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP260]] release, align 1
11846 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11847 // CHECK-NEXT:    [[TMP262:%.*]] = load i8, i8* [[UCE]], align 1
11848 // CHECK-NEXT:    [[TMP263:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP262]] release, align 1
11849 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11850 // CHECK-NEXT:    [[TMP264:%.*]] = load i8, i8* [[UCE]], align 1
11851 // CHECK-NEXT:    [[TMP265:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP264]] release, align 1
11852 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11853 // CHECK-NEXT:    [[TMP266:%.*]] = load i8, i8* [[UCE]], align 1
11854 // CHECK-NEXT:    [[TMP267:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP266]] release, align 1
11855 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11856 // CHECK-NEXT:    [[TMP268:%.*]] = load i8, i8* [[UCE]], align 1
11857 // CHECK-NEXT:    [[TMP269:%.*]] = load i8, i8* [[UCD]], align 1
11858 // CHECK-NEXT:    [[TMP270:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP268]], i8 [[TMP269]] release monotonic, align 1
11859 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11860 // CHECK-NEXT:    [[TMP271:%.*]] = load i8, i8* [[UCE]], align 1
11861 // CHECK-NEXT:    [[TMP272:%.*]] = load i8, i8* [[UCD]], align 1
11862 // CHECK-NEXT:    [[TMP273:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP271]], i8 [[TMP272]] release monotonic, align 1
11863 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11864 // CHECK-NEXT:    [[TMP274:%.*]] = load i8, i8* [[UCE]], align 1
11865 // CHECK-NEXT:    [[TMP275:%.*]] = load i8, i8* [[UCD]], align 1
11866 // CHECK-NEXT:    [[TMP276:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP274]], i8 [[TMP275]] release monotonic, align 1
11867 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11868 // CHECK-NEXT:    [[TMP277:%.*]] = load i8, i8* [[UCE]], align 1
11869 // CHECK-NEXT:    [[TMP278:%.*]] = load i8, i8* [[UCD]], align 1
11870 // CHECK-NEXT:    [[TMP279:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP277]], i8 [[TMP278]] release monotonic, align 1
11871 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11872 // CHECK-NEXT:    [[TMP280:%.*]] = load i8, i8* [[CE]], align 1
11873 // CHECK-NEXT:    [[TMP281:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP280]] seq_cst, align 1
11874 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11875 // CHECK-NEXT:    [[TMP282:%.*]] = load i8, i8* [[CE]], align 1
11876 // CHECK-NEXT:    [[TMP283:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP282]] seq_cst, align 1
11877 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11878 // CHECK-NEXT:    [[TMP284:%.*]] = load i8, i8* [[CE]], align 1
11879 // CHECK-NEXT:    [[TMP285:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP284]] seq_cst, align 1
11880 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11881 // CHECK-NEXT:    [[TMP286:%.*]] = load i8, i8* [[CE]], align 1
11882 // CHECK-NEXT:    [[TMP287:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP286]] seq_cst, align 1
11883 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11884 // CHECK-NEXT:    [[TMP288:%.*]] = load i8, i8* [[CE]], align 1
11885 // CHECK-NEXT:    [[TMP289:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP288]] seq_cst, align 1
11886 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11887 // CHECK-NEXT:    [[TMP290:%.*]] = load i8, i8* [[CE]], align 1
11888 // CHECK-NEXT:    [[TMP291:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP290]] seq_cst, align 1
11889 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11890 // CHECK-NEXT:    [[TMP292:%.*]] = load i8, i8* [[CE]], align 1
11891 // CHECK-NEXT:    [[TMP293:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP292]] seq_cst, align 1
11892 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11893 // CHECK-NEXT:    [[TMP294:%.*]] = load i8, i8* [[CE]], align 1
11894 // CHECK-NEXT:    [[TMP295:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP294]] seq_cst, align 1
11895 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11896 // CHECK-NEXT:    [[TMP296:%.*]] = load i8, i8* [[CE]], align 1
11897 // CHECK-NEXT:    [[TMP297:%.*]] = load i8, i8* [[CD]], align 1
11898 // CHECK-NEXT:    [[TMP298:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP296]], i8 [[TMP297]] seq_cst seq_cst, align 1
11899 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11900 // CHECK-NEXT:    [[TMP299:%.*]] = load i8, i8* [[CE]], align 1
11901 // CHECK-NEXT:    [[TMP300:%.*]] = load i8, i8* [[CD]], align 1
11902 // CHECK-NEXT:    [[TMP301:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP299]], i8 [[TMP300]] seq_cst seq_cst, align 1
11903 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11904 // CHECK-NEXT:    [[TMP302:%.*]] = load i8, i8* [[CE]], align 1
11905 // CHECK-NEXT:    [[TMP303:%.*]] = load i8, i8* [[CD]], align 1
11906 // CHECK-NEXT:    [[TMP304:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP302]], i8 [[TMP303]] seq_cst seq_cst, align 1
11907 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11908 // CHECK-NEXT:    [[TMP305:%.*]] = load i8, i8* [[CE]], align 1
11909 // CHECK-NEXT:    [[TMP306:%.*]] = load i8, i8* [[CD]], align 1
11910 // CHECK-NEXT:    [[TMP307:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP305]], i8 [[TMP306]] seq_cst seq_cst, align 1
11911 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11912 // CHECK-NEXT:    [[TMP308:%.*]] = load i8, i8* [[UCE]], align 1
11913 // CHECK-NEXT:    [[TMP309:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP308]] seq_cst, align 1
11914 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11915 // CHECK-NEXT:    [[TMP310:%.*]] = load i8, i8* [[UCE]], align 1
11916 // CHECK-NEXT:    [[TMP311:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP310]] seq_cst, align 1
11917 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11918 // CHECK-NEXT:    [[TMP312:%.*]] = load i8, i8* [[UCE]], align 1
11919 // CHECK-NEXT:    [[TMP313:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP312]] seq_cst, align 1
11920 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11921 // CHECK-NEXT:    [[TMP314:%.*]] = load i8, i8* [[UCE]], align 1
11922 // CHECK-NEXT:    [[TMP315:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP314]] seq_cst, align 1
11923 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11924 // CHECK-NEXT:    [[TMP316:%.*]] = load i8, i8* [[UCE]], align 1
11925 // CHECK-NEXT:    [[TMP317:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP316]] seq_cst, align 1
11926 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11927 // CHECK-NEXT:    [[TMP318:%.*]] = load i8, i8* [[UCE]], align 1
11928 // CHECK-NEXT:    [[TMP319:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP318]] seq_cst, align 1
11929 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11930 // CHECK-NEXT:    [[TMP320:%.*]] = load i8, i8* [[UCE]], align 1
11931 // CHECK-NEXT:    [[TMP321:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP320]] seq_cst, align 1
11932 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11933 // CHECK-NEXT:    [[TMP322:%.*]] = load i8, i8* [[UCE]], align 1
11934 // CHECK-NEXT:    [[TMP323:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP322]] seq_cst, align 1
11935 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11936 // CHECK-NEXT:    [[TMP324:%.*]] = load i8, i8* [[UCE]], align 1
11937 // CHECK-NEXT:    [[TMP325:%.*]] = load i8, i8* [[UCD]], align 1
11938 // CHECK-NEXT:    [[TMP326:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP324]], i8 [[TMP325]] seq_cst seq_cst, align 1
11939 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11940 // CHECK-NEXT:    [[TMP327:%.*]] = load i8, i8* [[UCE]], align 1
11941 // CHECK-NEXT:    [[TMP328:%.*]] = load i8, i8* [[UCD]], align 1
11942 // CHECK-NEXT:    [[TMP329:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP327]], i8 [[TMP328]] seq_cst seq_cst, align 1
11943 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11944 // CHECK-NEXT:    [[TMP330:%.*]] = load i8, i8* [[UCE]], align 1
11945 // CHECK-NEXT:    [[TMP331:%.*]] = load i8, i8* [[UCD]], align 1
11946 // CHECK-NEXT:    [[TMP332:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP330]], i8 [[TMP331]] seq_cst seq_cst, align 1
11947 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11948 // CHECK-NEXT:    [[TMP333:%.*]] = load i8, i8* [[UCE]], align 1
11949 // CHECK-NEXT:    [[TMP334:%.*]] = load i8, i8* [[UCD]], align 1
11950 // CHECK-NEXT:    [[TMP335:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP333]], i8 [[TMP334]] seq_cst seq_cst, align 1
11951 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
11952 // CHECK-NEXT:    [[TMP336:%.*]] = load i16, i16* [[SE]], align 2
11953 // CHECK-NEXT:    [[TMP337:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP336]] monotonic, align 2
11954 // CHECK-NEXT:    [[TMP338:%.*]] = load i16, i16* [[SE]], align 2
11955 // CHECK-NEXT:    [[TMP339:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP338]] monotonic, align 2
11956 // CHECK-NEXT:    [[TMP340:%.*]] = load i16, i16* [[SE]], align 2
11957 // CHECK-NEXT:    [[TMP341:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP340]] monotonic, align 2
11958 // CHECK-NEXT:    [[TMP342:%.*]] = load i16, i16* [[SE]], align 2
11959 // CHECK-NEXT:    [[TMP343:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP342]] monotonic, align 2
11960 // CHECK-NEXT:    [[TMP344:%.*]] = load i16, i16* [[SE]], align 2
11961 // CHECK-NEXT:    [[TMP345:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP344]] monotonic, align 2
11962 // CHECK-NEXT:    [[TMP346:%.*]] = load i16, i16* [[SE]], align 2
11963 // CHECK-NEXT:    [[TMP347:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP346]] monotonic, align 2
11964 // CHECK-NEXT:    [[TMP348:%.*]] = load i16, i16* [[SE]], align 2
11965 // CHECK-NEXT:    [[TMP349:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP348]] monotonic, align 2
11966 // CHECK-NEXT:    [[TMP350:%.*]] = load i16, i16* [[SE]], align 2
11967 // CHECK-NEXT:    [[TMP351:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP350]] monotonic, align 2
11968 // CHECK-NEXT:    [[TMP352:%.*]] = load i16, i16* [[SE]], align 2
11969 // CHECK-NEXT:    [[TMP353:%.*]] = load i16, i16* [[SD]], align 2
11970 // CHECK-NEXT:    [[TMP354:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP352]], i16 [[TMP353]] monotonic monotonic, align 2
11971 // CHECK-NEXT:    [[TMP355:%.*]] = load i16, i16* [[SE]], align 2
11972 // CHECK-NEXT:    [[TMP356:%.*]] = load i16, i16* [[SD]], align 2
11973 // CHECK-NEXT:    [[TMP357:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP355]], i16 [[TMP356]] monotonic monotonic, align 2
11974 // CHECK-NEXT:    [[TMP358:%.*]] = load i16, i16* [[SE]], align 2
11975 // CHECK-NEXT:    [[TMP359:%.*]] = load i16, i16* [[SD]], align 2
11976 // CHECK-NEXT:    [[TMP360:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP358]], i16 [[TMP359]] monotonic monotonic, align 2
11977 // CHECK-NEXT:    [[TMP361:%.*]] = load i16, i16* [[SE]], align 2
11978 // CHECK-NEXT:    [[TMP362:%.*]] = load i16, i16* [[SD]], align 2
11979 // CHECK-NEXT:    [[TMP363:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP361]], i16 [[TMP362]] monotonic monotonic, align 2
11980 // CHECK-NEXT:    [[TMP364:%.*]] = load i16, i16* [[USE]], align 2
11981 // CHECK-NEXT:    [[TMP365:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP364]] monotonic, align 2
11982 // CHECK-NEXT:    [[TMP366:%.*]] = load i16, i16* [[USE]], align 2
11983 // CHECK-NEXT:    [[TMP367:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP366]] monotonic, align 2
11984 // CHECK-NEXT:    [[TMP368:%.*]] = load i16, i16* [[USE]], align 2
11985 // CHECK-NEXT:    [[TMP369:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP368]] monotonic, align 2
11986 // CHECK-NEXT:    [[TMP370:%.*]] = load i16, i16* [[USE]], align 2
11987 // CHECK-NEXT:    [[TMP371:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP370]] monotonic, align 2
11988 // CHECK-NEXT:    [[TMP372:%.*]] = load i16, i16* [[USE]], align 2
11989 // CHECK-NEXT:    [[TMP373:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP372]] monotonic, align 2
11990 // CHECK-NEXT:    [[TMP374:%.*]] = load i16, i16* [[USE]], align 2
11991 // CHECK-NEXT:    [[TMP375:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP374]] monotonic, align 2
11992 // CHECK-NEXT:    [[TMP376:%.*]] = load i16, i16* [[USE]], align 2
11993 // CHECK-NEXT:    [[TMP377:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP376]] monotonic, align 2
11994 // CHECK-NEXT:    [[TMP378:%.*]] = load i16, i16* [[USE]], align 2
11995 // CHECK-NEXT:    [[TMP379:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP378]] monotonic, align 2
11996 // CHECK-NEXT:    [[TMP380:%.*]] = load i16, i16* [[USE]], align 2
11997 // CHECK-NEXT:    [[TMP381:%.*]] = load i16, i16* [[USD]], align 2
11998 // CHECK-NEXT:    [[TMP382:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP380]], i16 [[TMP381]] monotonic monotonic, align 2
11999 // CHECK-NEXT:    [[TMP383:%.*]] = load i16, i16* [[USE]], align 2
12000 // CHECK-NEXT:    [[TMP384:%.*]] = load i16, i16* [[USD]], align 2
12001 // CHECK-NEXT:    [[TMP385:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP383]], i16 [[TMP384]] monotonic monotonic, align 2
12002 // CHECK-NEXT:    [[TMP386:%.*]] = load i16, i16* [[USE]], align 2
12003 // CHECK-NEXT:    [[TMP387:%.*]] = load i16, i16* [[USD]], align 2
12004 // CHECK-NEXT:    [[TMP388:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP386]], i16 [[TMP387]] monotonic monotonic, align 2
12005 // CHECK-NEXT:    [[TMP389:%.*]] = load i16, i16* [[USE]], align 2
12006 // CHECK-NEXT:    [[TMP390:%.*]] = load i16, i16* [[USD]], align 2
12007 // CHECK-NEXT:    [[TMP391:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP389]], i16 [[TMP390]] monotonic monotonic, align 2
12008 // CHECK-NEXT:    [[TMP392:%.*]] = load i16, i16* [[SE]], align 2
12009 // CHECK-NEXT:    [[TMP393:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP392]] acq_rel, align 2
12010 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12011 // CHECK-NEXT:    [[TMP394:%.*]] = load i16, i16* [[SE]], align 2
12012 // CHECK-NEXT:    [[TMP395:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP394]] acq_rel, align 2
12013 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12014 // CHECK-NEXT:    [[TMP396:%.*]] = load i16, i16* [[SE]], align 2
12015 // CHECK-NEXT:    [[TMP397:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP396]] acq_rel, align 2
12016 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12017 // CHECK-NEXT:    [[TMP398:%.*]] = load i16, i16* [[SE]], align 2
12018 // CHECK-NEXT:    [[TMP399:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP398]] acq_rel, align 2
12019 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12020 // CHECK-NEXT:    [[TMP400:%.*]] = load i16, i16* [[SE]], align 2
12021 // CHECK-NEXT:    [[TMP401:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP400]] acq_rel, align 2
12022 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12023 // CHECK-NEXT:    [[TMP402:%.*]] = load i16, i16* [[SE]], align 2
12024 // CHECK-NEXT:    [[TMP403:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP402]] acq_rel, align 2
12025 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12026 // CHECK-NEXT:    [[TMP404:%.*]] = load i16, i16* [[SE]], align 2
12027 // CHECK-NEXT:    [[TMP405:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP404]] acq_rel, align 2
12028 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12029 // CHECK-NEXT:    [[TMP406:%.*]] = load i16, i16* [[SE]], align 2
12030 // CHECK-NEXT:    [[TMP407:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP406]] acq_rel, align 2
12031 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12032 // CHECK-NEXT:    [[TMP408:%.*]] = load i16, i16* [[SE]], align 2
12033 // CHECK-NEXT:    [[TMP409:%.*]] = load i16, i16* [[SD]], align 2
12034 // CHECK-NEXT:    [[TMP410:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP408]], i16 [[TMP409]] acq_rel acquire, align 2
12035 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12036 // CHECK-NEXT:    [[TMP411:%.*]] = load i16, i16* [[SE]], align 2
12037 // CHECK-NEXT:    [[TMP412:%.*]] = load i16, i16* [[SD]], align 2
12038 // CHECK-NEXT:    [[TMP413:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP411]], i16 [[TMP412]] acq_rel acquire, align 2
12039 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12040 // CHECK-NEXT:    [[TMP414:%.*]] = load i16, i16* [[SE]], align 2
12041 // CHECK-NEXT:    [[TMP415:%.*]] = load i16, i16* [[SD]], align 2
12042 // CHECK-NEXT:    [[TMP416:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP414]], i16 [[TMP415]] acq_rel acquire, align 2
12043 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12044 // CHECK-NEXT:    [[TMP417:%.*]] = load i16, i16* [[SE]], align 2
12045 // CHECK-NEXT:    [[TMP418:%.*]] = load i16, i16* [[SD]], align 2
12046 // CHECK-NEXT:    [[TMP419:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP417]], i16 [[TMP418]] acq_rel acquire, align 2
12047 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12048 // CHECK-NEXT:    [[TMP420:%.*]] = load i16, i16* [[USE]], align 2
12049 // CHECK-NEXT:    [[TMP421:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP420]] acq_rel, align 2
12050 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12051 // CHECK-NEXT:    [[TMP422:%.*]] = load i16, i16* [[USE]], align 2
12052 // CHECK-NEXT:    [[TMP423:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP422]] acq_rel, align 2
12053 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12054 // CHECK-NEXT:    [[TMP424:%.*]] = load i16, i16* [[USE]], align 2
12055 // CHECK-NEXT:    [[TMP425:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP424]] acq_rel, align 2
12056 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12057 // CHECK-NEXT:    [[TMP426:%.*]] = load i16, i16* [[USE]], align 2
12058 // CHECK-NEXT:    [[TMP427:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP426]] acq_rel, align 2
12059 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12060 // CHECK-NEXT:    [[TMP428:%.*]] = load i16, i16* [[USE]], align 2
12061 // CHECK-NEXT:    [[TMP429:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP428]] acq_rel, align 2
12062 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12063 // CHECK-NEXT:    [[TMP430:%.*]] = load i16, i16* [[USE]], align 2
12064 // CHECK-NEXT:    [[TMP431:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP430]] acq_rel, align 2
12065 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12066 // CHECK-NEXT:    [[TMP432:%.*]] = load i16, i16* [[USE]], align 2
12067 // CHECK-NEXT:    [[TMP433:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP432]] acq_rel, align 2
12068 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12069 // CHECK-NEXT:    [[TMP434:%.*]] = load i16, i16* [[USE]], align 2
12070 // CHECK-NEXT:    [[TMP435:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP434]] acq_rel, align 2
12071 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12072 // CHECK-NEXT:    [[TMP436:%.*]] = load i16, i16* [[USE]], align 2
12073 // CHECK-NEXT:    [[TMP437:%.*]] = load i16, i16* [[USD]], align 2
12074 // CHECK-NEXT:    [[TMP438:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP436]], i16 [[TMP437]] acq_rel acquire, align 2
12075 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12076 // CHECK-NEXT:    [[TMP439:%.*]] = load i16, i16* [[USE]], align 2
12077 // CHECK-NEXT:    [[TMP440:%.*]] = load i16, i16* [[USD]], align 2
12078 // CHECK-NEXT:    [[TMP441:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP439]], i16 [[TMP440]] acq_rel acquire, align 2
12079 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12080 // CHECK-NEXT:    [[TMP442:%.*]] = load i16, i16* [[USE]], align 2
12081 // CHECK-NEXT:    [[TMP443:%.*]] = load i16, i16* [[USD]], align 2
12082 // CHECK-NEXT:    [[TMP444:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP442]], i16 [[TMP443]] acq_rel acquire, align 2
12083 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12084 // CHECK-NEXT:    [[TMP445:%.*]] = load i16, i16* [[USE]], align 2
12085 // CHECK-NEXT:    [[TMP446:%.*]] = load i16, i16* [[USD]], align 2
12086 // CHECK-NEXT:    [[TMP447:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP445]], i16 [[TMP446]] acq_rel acquire, align 2
12087 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12088 // CHECK-NEXT:    [[TMP448:%.*]] = load i16, i16* [[SE]], align 2
12089 // CHECK-NEXT:    [[TMP449:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP448]] acquire, align 2
12090 // CHECK-NEXT:    [[TMP450:%.*]] = load i16, i16* [[SE]], align 2
12091 // CHECK-NEXT:    [[TMP451:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP450]] acquire, align 2
12092 // CHECK-NEXT:    [[TMP452:%.*]] = load i16, i16* [[SE]], align 2
12093 // CHECK-NEXT:    [[TMP453:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP452]] acquire, align 2
12094 // CHECK-NEXT:    [[TMP454:%.*]] = load i16, i16* [[SE]], align 2
12095 // CHECK-NEXT:    [[TMP455:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP454]] acquire, align 2
12096 // CHECK-NEXT:    [[TMP456:%.*]] = load i16, i16* [[SE]], align 2
12097 // CHECK-NEXT:    [[TMP457:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP456]] acquire, align 2
12098 // CHECK-NEXT:    [[TMP458:%.*]] = load i16, i16* [[SE]], align 2
12099 // CHECK-NEXT:    [[TMP459:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP458]] acquire, align 2
12100 // CHECK-NEXT:    [[TMP460:%.*]] = load i16, i16* [[SE]], align 2
12101 // CHECK-NEXT:    [[TMP461:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP460]] acquire, align 2
12102 // CHECK-NEXT:    [[TMP462:%.*]] = load i16, i16* [[SE]], align 2
12103 // CHECK-NEXT:    [[TMP463:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP462]] acquire, align 2
12104 // CHECK-NEXT:    [[TMP464:%.*]] = load i16, i16* [[SE]], align 2
12105 // CHECK-NEXT:    [[TMP465:%.*]] = load i16, i16* [[SD]], align 2
12106 // CHECK-NEXT:    [[TMP466:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP464]], i16 [[TMP465]] acquire acquire, align 2
12107 // CHECK-NEXT:    [[TMP467:%.*]] = load i16, i16* [[SE]], align 2
12108 // CHECK-NEXT:    [[TMP468:%.*]] = load i16, i16* [[SD]], align 2
12109 // CHECK-NEXT:    [[TMP469:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP467]], i16 [[TMP468]] acquire acquire, align 2
12110 // CHECK-NEXT:    [[TMP470:%.*]] = load i16, i16* [[SE]], align 2
12111 // CHECK-NEXT:    [[TMP471:%.*]] = load i16, i16* [[SD]], align 2
12112 // CHECK-NEXT:    [[TMP472:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP470]], i16 [[TMP471]] acquire acquire, align 2
12113 // CHECK-NEXT:    [[TMP473:%.*]] = load i16, i16* [[SE]], align 2
12114 // CHECK-NEXT:    [[TMP474:%.*]] = load i16, i16* [[SD]], align 2
12115 // CHECK-NEXT:    [[TMP475:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP473]], i16 [[TMP474]] acquire acquire, align 2
12116 // CHECK-NEXT:    [[TMP476:%.*]] = load i16, i16* [[USE]], align 2
12117 // CHECK-NEXT:    [[TMP477:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP476]] acquire, align 2
12118 // CHECK-NEXT:    [[TMP478:%.*]] = load i16, i16* [[USE]], align 2
12119 // CHECK-NEXT:    [[TMP479:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP478]] acquire, align 2
12120 // CHECK-NEXT:    [[TMP480:%.*]] = load i16, i16* [[USE]], align 2
12121 // CHECK-NEXT:    [[TMP481:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP480]] acquire, align 2
12122 // CHECK-NEXT:    [[TMP482:%.*]] = load i16, i16* [[USE]], align 2
12123 // CHECK-NEXT:    [[TMP483:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP482]] acquire, align 2
12124 // CHECK-NEXT:    [[TMP484:%.*]] = load i16, i16* [[USE]], align 2
12125 // CHECK-NEXT:    [[TMP485:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP484]] acquire, align 2
12126 // CHECK-NEXT:    [[TMP486:%.*]] = load i16, i16* [[USE]], align 2
12127 // CHECK-NEXT:    [[TMP487:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP486]] acquire, align 2
12128 // CHECK-NEXT:    [[TMP488:%.*]] = load i16, i16* [[USE]], align 2
12129 // CHECK-NEXT:    [[TMP489:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP488]] acquire, align 2
12130 // CHECK-NEXT:    [[TMP490:%.*]] = load i16, i16* [[USE]], align 2
12131 // CHECK-NEXT:    [[TMP491:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP490]] acquire, align 2
12132 // CHECK-NEXT:    [[TMP492:%.*]] = load i16, i16* [[USE]], align 2
12133 // CHECK-NEXT:    [[TMP493:%.*]] = load i16, i16* [[USD]], align 2
12134 // CHECK-NEXT:    [[TMP494:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP492]], i16 [[TMP493]] acquire acquire, align 2
12135 // CHECK-NEXT:    [[TMP495:%.*]] = load i16, i16* [[USE]], align 2
12136 // CHECK-NEXT:    [[TMP496:%.*]] = load i16, i16* [[USD]], align 2
12137 // CHECK-NEXT:    [[TMP497:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP495]], i16 [[TMP496]] acquire acquire, align 2
12138 // CHECK-NEXT:    [[TMP498:%.*]] = load i16, i16* [[USE]], align 2
12139 // CHECK-NEXT:    [[TMP499:%.*]] = load i16, i16* [[USD]], align 2
12140 // CHECK-NEXT:    [[TMP500:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP498]], i16 [[TMP499]] acquire acquire, align 2
12141 // CHECK-NEXT:    [[TMP501:%.*]] = load i16, i16* [[USE]], align 2
12142 // CHECK-NEXT:    [[TMP502:%.*]] = load i16, i16* [[USD]], align 2
12143 // CHECK-NEXT:    [[TMP503:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP501]], i16 [[TMP502]] acquire acquire, align 2
12144 // CHECK-NEXT:    [[TMP504:%.*]] = load i16, i16* [[SE]], align 2
12145 // CHECK-NEXT:    [[TMP505:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP504]] monotonic, align 2
12146 // CHECK-NEXT:    [[TMP506:%.*]] = load i16, i16* [[SE]], align 2
12147 // CHECK-NEXT:    [[TMP507:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP506]] monotonic, align 2
12148 // CHECK-NEXT:    [[TMP508:%.*]] = load i16, i16* [[SE]], align 2
12149 // CHECK-NEXT:    [[TMP509:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP508]] monotonic, align 2
12150 // CHECK-NEXT:    [[TMP510:%.*]] = load i16, i16* [[SE]], align 2
12151 // CHECK-NEXT:    [[TMP511:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP510]] monotonic, align 2
12152 // CHECK-NEXT:    [[TMP512:%.*]] = load i16, i16* [[SE]], align 2
12153 // CHECK-NEXT:    [[TMP513:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP512]] monotonic, align 2
12154 // CHECK-NEXT:    [[TMP514:%.*]] = load i16, i16* [[SE]], align 2
12155 // CHECK-NEXT:    [[TMP515:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP514]] monotonic, align 2
12156 // CHECK-NEXT:    [[TMP516:%.*]] = load i16, i16* [[SE]], align 2
12157 // CHECK-NEXT:    [[TMP517:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP516]] monotonic, align 2
12158 // CHECK-NEXT:    [[TMP518:%.*]] = load i16, i16* [[SE]], align 2
12159 // CHECK-NEXT:    [[TMP519:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP518]] monotonic, align 2
12160 // CHECK-NEXT:    [[TMP520:%.*]] = load i16, i16* [[SE]], align 2
12161 // CHECK-NEXT:    [[TMP521:%.*]] = load i16, i16* [[SD]], align 2
12162 // CHECK-NEXT:    [[TMP522:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP520]], i16 [[TMP521]] monotonic monotonic, align 2
12163 // CHECK-NEXT:    [[TMP523:%.*]] = load i16, i16* [[SE]], align 2
12164 // CHECK-NEXT:    [[TMP524:%.*]] = load i16, i16* [[SD]], align 2
12165 // CHECK-NEXT:    [[TMP525:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP523]], i16 [[TMP524]] monotonic monotonic, align 2
12166 // CHECK-NEXT:    [[TMP526:%.*]] = load i16, i16* [[SE]], align 2
12167 // CHECK-NEXT:    [[TMP527:%.*]] = load i16, i16* [[SD]], align 2
12168 // CHECK-NEXT:    [[TMP528:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP526]], i16 [[TMP527]] monotonic monotonic, align 2
12169 // CHECK-NEXT:    [[TMP529:%.*]] = load i16, i16* [[SE]], align 2
12170 // CHECK-NEXT:    [[TMP530:%.*]] = load i16, i16* [[SD]], align 2
12171 // CHECK-NEXT:    [[TMP531:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP529]], i16 [[TMP530]] monotonic monotonic, align 2
12172 // CHECK-NEXT:    [[TMP532:%.*]] = load i16, i16* [[USE]], align 2
12173 // CHECK-NEXT:    [[TMP533:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP532]] monotonic, align 2
12174 // CHECK-NEXT:    [[TMP534:%.*]] = load i16, i16* [[USE]], align 2
12175 // CHECK-NEXT:    [[TMP535:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP534]] monotonic, align 2
12176 // CHECK-NEXT:    [[TMP536:%.*]] = load i16, i16* [[USE]], align 2
12177 // CHECK-NEXT:    [[TMP537:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP536]] monotonic, align 2
12178 // CHECK-NEXT:    [[TMP538:%.*]] = load i16, i16* [[USE]], align 2
12179 // CHECK-NEXT:    [[TMP539:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP538]] monotonic, align 2
12180 // CHECK-NEXT:    [[TMP540:%.*]] = load i16, i16* [[USE]], align 2
12181 // CHECK-NEXT:    [[TMP541:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP540]] monotonic, align 2
12182 // CHECK-NEXT:    [[TMP542:%.*]] = load i16, i16* [[USE]], align 2
12183 // CHECK-NEXT:    [[TMP543:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP542]] monotonic, align 2
12184 // CHECK-NEXT:    [[TMP544:%.*]] = load i16, i16* [[USE]], align 2
12185 // CHECK-NEXT:    [[TMP545:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP544]] monotonic, align 2
12186 // CHECK-NEXT:    [[TMP546:%.*]] = load i16, i16* [[USE]], align 2
12187 // CHECK-NEXT:    [[TMP547:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP546]] monotonic, align 2
12188 // CHECK-NEXT:    [[TMP548:%.*]] = load i16, i16* [[USE]], align 2
12189 // CHECK-NEXT:    [[TMP549:%.*]] = load i16, i16* [[USD]], align 2
12190 // CHECK-NEXT:    [[TMP550:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP548]], i16 [[TMP549]] monotonic monotonic, align 2
12191 // CHECK-NEXT:    [[TMP551:%.*]] = load i16, i16* [[USE]], align 2
12192 // CHECK-NEXT:    [[TMP552:%.*]] = load i16, i16* [[USD]], align 2
12193 // CHECK-NEXT:    [[TMP553:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP551]], i16 [[TMP552]] monotonic monotonic, align 2
12194 // CHECK-NEXT:    [[TMP554:%.*]] = load i16, i16* [[USE]], align 2
12195 // CHECK-NEXT:    [[TMP555:%.*]] = load i16, i16* [[USD]], align 2
12196 // CHECK-NEXT:    [[TMP556:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP554]], i16 [[TMP555]] monotonic monotonic, align 2
12197 // CHECK-NEXT:    [[TMP557:%.*]] = load i16, i16* [[USE]], align 2
12198 // CHECK-NEXT:    [[TMP558:%.*]] = load i16, i16* [[USD]], align 2
12199 // CHECK-NEXT:    [[TMP559:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP557]], i16 [[TMP558]] monotonic monotonic, align 2
12200 // CHECK-NEXT:    [[TMP560:%.*]] = load i16, i16* [[SE]], align 2
12201 // CHECK-NEXT:    [[TMP561:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP560]] release, align 2
12202 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12203 // CHECK-NEXT:    [[TMP562:%.*]] = load i16, i16* [[SE]], align 2
12204 // CHECK-NEXT:    [[TMP563:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP562]] release, align 2
12205 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12206 // CHECK-NEXT:    [[TMP564:%.*]] = load i16, i16* [[SE]], align 2
12207 // CHECK-NEXT:    [[TMP565:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP564]] release, align 2
12208 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12209 // CHECK-NEXT:    [[TMP566:%.*]] = load i16, i16* [[SE]], align 2
12210 // CHECK-NEXT:    [[TMP567:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP566]] release, align 2
12211 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12212 // CHECK-NEXT:    [[TMP568:%.*]] = load i16, i16* [[SE]], align 2
12213 // CHECK-NEXT:    [[TMP569:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP568]] release, align 2
12214 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12215 // CHECK-NEXT:    [[TMP570:%.*]] = load i16, i16* [[SE]], align 2
12216 // CHECK-NEXT:    [[TMP571:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP570]] release, align 2
12217 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12218 // CHECK-NEXT:    [[TMP572:%.*]] = load i16, i16* [[SE]], align 2
12219 // CHECK-NEXT:    [[TMP573:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP572]] release, align 2
12220 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12221 // CHECK-NEXT:    [[TMP574:%.*]] = load i16, i16* [[SE]], align 2
12222 // CHECK-NEXT:    [[TMP575:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP574]] release, align 2
12223 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12224 // CHECK-NEXT:    [[TMP576:%.*]] = load i16, i16* [[SE]], align 2
12225 // CHECK-NEXT:    [[TMP577:%.*]] = load i16, i16* [[SD]], align 2
12226 // CHECK-NEXT:    [[TMP578:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP576]], i16 [[TMP577]] release monotonic, align 2
12227 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12228 // CHECK-NEXT:    [[TMP579:%.*]] = load i16, i16* [[SE]], align 2
12229 // CHECK-NEXT:    [[TMP580:%.*]] = load i16, i16* [[SD]], align 2
12230 // CHECK-NEXT:    [[TMP581:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP579]], i16 [[TMP580]] release monotonic, align 2
12231 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12232 // CHECK-NEXT:    [[TMP582:%.*]] = load i16, i16* [[SE]], align 2
12233 // CHECK-NEXT:    [[TMP583:%.*]] = load i16, i16* [[SD]], align 2
12234 // CHECK-NEXT:    [[TMP584:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP582]], i16 [[TMP583]] release monotonic, align 2
12235 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12236 // CHECK-NEXT:    [[TMP585:%.*]] = load i16, i16* [[SE]], align 2
12237 // CHECK-NEXT:    [[TMP586:%.*]] = load i16, i16* [[SD]], align 2
12238 // CHECK-NEXT:    [[TMP587:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP585]], i16 [[TMP586]] release monotonic, align 2
12239 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12240 // CHECK-NEXT:    [[TMP588:%.*]] = load i16, i16* [[USE]], align 2
12241 // CHECK-NEXT:    [[TMP589:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP588]] release, align 2
12242 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12243 // CHECK-NEXT:    [[TMP590:%.*]] = load i16, i16* [[USE]], align 2
12244 // CHECK-NEXT:    [[TMP591:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP590]] release, align 2
12245 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12246 // CHECK-NEXT:    [[TMP592:%.*]] = load i16, i16* [[USE]], align 2
12247 // CHECK-NEXT:    [[TMP593:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP592]] release, align 2
12248 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12249 // CHECK-NEXT:    [[TMP594:%.*]] = load i16, i16* [[USE]], align 2
12250 // CHECK-NEXT:    [[TMP595:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP594]] release, align 2
12251 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12252 // CHECK-NEXT:    [[TMP596:%.*]] = load i16, i16* [[USE]], align 2
12253 // CHECK-NEXT:    [[TMP597:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP596]] release, align 2
12254 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12255 // CHECK-NEXT:    [[TMP598:%.*]] = load i16, i16* [[USE]], align 2
12256 // CHECK-NEXT:    [[TMP599:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP598]] release, align 2
12257 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12258 // CHECK-NEXT:    [[TMP600:%.*]] = load i16, i16* [[USE]], align 2
12259 // CHECK-NEXT:    [[TMP601:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP600]] release, align 2
12260 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12261 // CHECK-NEXT:    [[TMP602:%.*]] = load i16, i16* [[USE]], align 2
12262 // CHECK-NEXT:    [[TMP603:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP602]] release, align 2
12263 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12264 // CHECK-NEXT:    [[TMP604:%.*]] = load i16, i16* [[USE]], align 2
12265 // CHECK-NEXT:    [[TMP605:%.*]] = load i16, i16* [[USD]], align 2
12266 // CHECK-NEXT:    [[TMP606:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP604]], i16 [[TMP605]] release monotonic, align 2
12267 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12268 // CHECK-NEXT:    [[TMP607:%.*]] = load i16, i16* [[USE]], align 2
12269 // CHECK-NEXT:    [[TMP608:%.*]] = load i16, i16* [[USD]], align 2
12270 // CHECK-NEXT:    [[TMP609:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP607]], i16 [[TMP608]] release monotonic, align 2
12271 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12272 // CHECK-NEXT:    [[TMP610:%.*]] = load i16, i16* [[USE]], align 2
12273 // CHECK-NEXT:    [[TMP611:%.*]] = load i16, i16* [[USD]], align 2
12274 // CHECK-NEXT:    [[TMP612:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP610]], i16 [[TMP611]] release monotonic, align 2
12275 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12276 // CHECK-NEXT:    [[TMP613:%.*]] = load i16, i16* [[USE]], align 2
12277 // CHECK-NEXT:    [[TMP614:%.*]] = load i16, i16* [[USD]], align 2
12278 // CHECK-NEXT:    [[TMP615:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP613]], i16 [[TMP614]] release monotonic, align 2
12279 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12280 // CHECK-NEXT:    [[TMP616:%.*]] = load i16, i16* [[SE]], align 2
12281 // CHECK-NEXT:    [[TMP617:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP616]] seq_cst, align 2
12282 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12283 // CHECK-NEXT:    [[TMP618:%.*]] = load i16, i16* [[SE]], align 2
12284 // CHECK-NEXT:    [[TMP619:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP618]] seq_cst, align 2
12285 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12286 // CHECK-NEXT:    [[TMP620:%.*]] = load i16, i16* [[SE]], align 2
12287 // CHECK-NEXT:    [[TMP621:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP620]] seq_cst, align 2
12288 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12289 // CHECK-NEXT:    [[TMP622:%.*]] = load i16, i16* [[SE]], align 2
12290 // CHECK-NEXT:    [[TMP623:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP622]] seq_cst, align 2
12291 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12292 // CHECK-NEXT:    [[TMP624:%.*]] = load i16, i16* [[SE]], align 2
12293 // CHECK-NEXT:    [[TMP625:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP624]] seq_cst, align 2
12294 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12295 // CHECK-NEXT:    [[TMP626:%.*]] = load i16, i16* [[SE]], align 2
12296 // CHECK-NEXT:    [[TMP627:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP626]] seq_cst, align 2
12297 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12298 // CHECK-NEXT:    [[TMP628:%.*]] = load i16, i16* [[SE]], align 2
12299 // CHECK-NEXT:    [[TMP629:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP628]] seq_cst, align 2
12300 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12301 // CHECK-NEXT:    [[TMP630:%.*]] = load i16, i16* [[SE]], align 2
12302 // CHECK-NEXT:    [[TMP631:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP630]] seq_cst, align 2
12303 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12304 // CHECK-NEXT:    [[TMP632:%.*]] = load i16, i16* [[SE]], align 2
12305 // CHECK-NEXT:    [[TMP633:%.*]] = load i16, i16* [[SD]], align 2
12306 // CHECK-NEXT:    [[TMP634:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP632]], i16 [[TMP633]] seq_cst seq_cst, align 2
12307 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12308 // CHECK-NEXT:    [[TMP635:%.*]] = load i16, i16* [[SE]], align 2
12309 // CHECK-NEXT:    [[TMP636:%.*]] = load i16, i16* [[SD]], align 2
12310 // CHECK-NEXT:    [[TMP637:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP635]], i16 [[TMP636]] seq_cst seq_cst, align 2
12311 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12312 // CHECK-NEXT:    [[TMP638:%.*]] = load i16, i16* [[SE]], align 2
12313 // CHECK-NEXT:    [[TMP639:%.*]] = load i16, i16* [[SD]], align 2
12314 // CHECK-NEXT:    [[TMP640:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP638]], i16 [[TMP639]] seq_cst seq_cst, align 2
12315 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12316 // CHECK-NEXT:    [[TMP641:%.*]] = load i16, i16* [[SE]], align 2
12317 // CHECK-NEXT:    [[TMP642:%.*]] = load i16, i16* [[SD]], align 2
12318 // CHECK-NEXT:    [[TMP643:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP641]], i16 [[TMP642]] seq_cst seq_cst, align 2
12319 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12320 // CHECK-NEXT:    [[TMP644:%.*]] = load i16, i16* [[USE]], align 2
12321 // CHECK-NEXT:    [[TMP645:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP644]] seq_cst, align 2
12322 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12323 // CHECK-NEXT:    [[TMP646:%.*]] = load i16, i16* [[USE]], align 2
12324 // CHECK-NEXT:    [[TMP647:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP646]] seq_cst, align 2
12325 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12326 // CHECK-NEXT:    [[TMP648:%.*]] = load i16, i16* [[USE]], align 2
12327 // CHECK-NEXT:    [[TMP649:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP648]] seq_cst, align 2
12328 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12329 // CHECK-NEXT:    [[TMP650:%.*]] = load i16, i16* [[USE]], align 2
12330 // CHECK-NEXT:    [[TMP651:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP650]] seq_cst, align 2
12331 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12332 // CHECK-NEXT:    [[TMP652:%.*]] = load i16, i16* [[USE]], align 2
12333 // CHECK-NEXT:    [[TMP653:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP652]] seq_cst, align 2
12334 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12335 // CHECK-NEXT:    [[TMP654:%.*]] = load i16, i16* [[USE]], align 2
12336 // CHECK-NEXT:    [[TMP655:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP654]] seq_cst, align 2
12337 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12338 // CHECK-NEXT:    [[TMP656:%.*]] = load i16, i16* [[USE]], align 2
12339 // CHECK-NEXT:    [[TMP657:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP656]] seq_cst, align 2
12340 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12341 // CHECK-NEXT:    [[TMP658:%.*]] = load i16, i16* [[USE]], align 2
12342 // CHECK-NEXT:    [[TMP659:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP658]] seq_cst, align 2
12343 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12344 // CHECK-NEXT:    [[TMP660:%.*]] = load i16, i16* [[USE]], align 2
12345 // CHECK-NEXT:    [[TMP661:%.*]] = load i16, i16* [[USD]], align 2
12346 // CHECK-NEXT:    [[TMP662:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP660]], i16 [[TMP661]] seq_cst seq_cst, align 2
12347 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12348 // CHECK-NEXT:    [[TMP663:%.*]] = load i16, i16* [[USE]], align 2
12349 // CHECK-NEXT:    [[TMP664:%.*]] = load i16, i16* [[USD]], align 2
12350 // CHECK-NEXT:    [[TMP665:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP663]], i16 [[TMP664]] seq_cst seq_cst, align 2
12351 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12352 // CHECK-NEXT:    [[TMP666:%.*]] = load i16, i16* [[USE]], align 2
12353 // CHECK-NEXT:    [[TMP667:%.*]] = load i16, i16* [[USD]], align 2
12354 // CHECK-NEXT:    [[TMP668:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP666]], i16 [[TMP667]] seq_cst seq_cst, align 2
12355 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12356 // CHECK-NEXT:    [[TMP669:%.*]] = load i16, i16* [[USE]], align 2
12357 // CHECK-NEXT:    [[TMP670:%.*]] = load i16, i16* [[USD]], align 2
12358 // CHECK-NEXT:    [[TMP671:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP669]], i16 [[TMP670]] seq_cst seq_cst, align 2
12359 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12360 // CHECK-NEXT:    [[TMP672:%.*]] = load i32, i32* [[IE]], align 4
12361 // CHECK-NEXT:    [[TMP673:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP672]] monotonic, align 4
12362 // CHECK-NEXT:    [[TMP674:%.*]] = load i32, i32* [[IE]], align 4
12363 // CHECK-NEXT:    [[TMP675:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP674]] monotonic, align 4
12364 // CHECK-NEXT:    [[TMP676:%.*]] = load i32, i32* [[IE]], align 4
12365 // CHECK-NEXT:    [[TMP677:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP676]] monotonic, align 4
12366 // CHECK-NEXT:    [[TMP678:%.*]] = load i32, i32* [[IE]], align 4
12367 // CHECK-NEXT:    [[TMP679:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP678]] monotonic, align 4
12368 // CHECK-NEXT:    [[TMP680:%.*]] = load i32, i32* [[IE]], align 4
12369 // CHECK-NEXT:    [[TMP681:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP680]] monotonic, align 4
12370 // CHECK-NEXT:    [[TMP682:%.*]] = load i32, i32* [[IE]], align 4
12371 // CHECK-NEXT:    [[TMP683:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP682]] monotonic, align 4
12372 // CHECK-NEXT:    [[TMP684:%.*]] = load i32, i32* [[IE]], align 4
12373 // CHECK-NEXT:    [[TMP685:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP684]] monotonic, align 4
12374 // CHECK-NEXT:    [[TMP686:%.*]] = load i32, i32* [[IE]], align 4
12375 // CHECK-NEXT:    [[TMP687:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP686]] monotonic, align 4
12376 // CHECK-NEXT:    [[TMP688:%.*]] = load i32, i32* [[IE]], align 4
12377 // CHECK-NEXT:    [[TMP689:%.*]] = load i32, i32* [[ID]], align 4
12378 // CHECK-NEXT:    [[TMP690:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP688]], i32 [[TMP689]] monotonic monotonic, align 4
12379 // CHECK-NEXT:    [[TMP691:%.*]] = load i32, i32* [[IE]], align 4
12380 // CHECK-NEXT:    [[TMP692:%.*]] = load i32, i32* [[ID]], align 4
12381 // CHECK-NEXT:    [[TMP693:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP691]], i32 [[TMP692]] monotonic monotonic, align 4
12382 // CHECK-NEXT:    [[TMP694:%.*]] = load i32, i32* [[IE]], align 4
12383 // CHECK-NEXT:    [[TMP695:%.*]] = load i32, i32* [[ID]], align 4
12384 // CHECK-NEXT:    [[TMP696:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP694]], i32 [[TMP695]] monotonic monotonic, align 4
12385 // CHECK-NEXT:    [[TMP697:%.*]] = load i32, i32* [[IE]], align 4
12386 // CHECK-NEXT:    [[TMP698:%.*]] = load i32, i32* [[ID]], align 4
12387 // CHECK-NEXT:    [[TMP699:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP697]], i32 [[TMP698]] monotonic monotonic, align 4
12388 // CHECK-NEXT:    [[TMP700:%.*]] = load i32, i32* [[UIE]], align 4
12389 // CHECK-NEXT:    [[TMP701:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP700]] monotonic, align 4
12390 // CHECK-NEXT:    [[TMP702:%.*]] = load i32, i32* [[UIE]], align 4
12391 // CHECK-NEXT:    [[TMP703:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP702]] monotonic, align 4
12392 // CHECK-NEXT:    [[TMP704:%.*]] = load i32, i32* [[UIE]], align 4
12393 // CHECK-NEXT:    [[TMP705:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP704]] monotonic, align 4
12394 // CHECK-NEXT:    [[TMP706:%.*]] = load i32, i32* [[UIE]], align 4
12395 // CHECK-NEXT:    [[TMP707:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP706]] monotonic, align 4
12396 // CHECK-NEXT:    [[TMP708:%.*]] = load i32, i32* [[UIE]], align 4
12397 // CHECK-NEXT:    [[TMP709:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP708]] monotonic, align 4
12398 // CHECK-NEXT:    [[TMP710:%.*]] = load i32, i32* [[UIE]], align 4
12399 // CHECK-NEXT:    [[TMP711:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP710]] monotonic, align 4
12400 // CHECK-NEXT:    [[TMP712:%.*]] = load i32, i32* [[UIE]], align 4
12401 // CHECK-NEXT:    [[TMP713:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP712]] monotonic, align 4
12402 // CHECK-NEXT:    [[TMP714:%.*]] = load i32, i32* [[UIE]], align 4
12403 // CHECK-NEXT:    [[TMP715:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP714]] monotonic, align 4
12404 // CHECK-NEXT:    [[TMP716:%.*]] = load i32, i32* [[UIE]], align 4
12405 // CHECK-NEXT:    [[TMP717:%.*]] = load i32, i32* [[UID]], align 4
12406 // CHECK-NEXT:    [[TMP718:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP716]], i32 [[TMP717]] monotonic monotonic, align 4
12407 // CHECK-NEXT:    [[TMP719:%.*]] = load i32, i32* [[UIE]], align 4
12408 // CHECK-NEXT:    [[TMP720:%.*]] = load i32, i32* [[UID]], align 4
12409 // CHECK-NEXT:    [[TMP721:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP719]], i32 [[TMP720]] monotonic monotonic, align 4
12410 // CHECK-NEXT:    [[TMP722:%.*]] = load i32, i32* [[UIE]], align 4
12411 // CHECK-NEXT:    [[TMP723:%.*]] = load i32, i32* [[UID]], align 4
12412 // CHECK-NEXT:    [[TMP724:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP722]], i32 [[TMP723]] monotonic monotonic, align 4
12413 // CHECK-NEXT:    [[TMP725:%.*]] = load i32, i32* [[UIE]], align 4
12414 // CHECK-NEXT:    [[TMP726:%.*]] = load i32, i32* [[UID]], align 4
12415 // CHECK-NEXT:    [[TMP727:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP725]], i32 [[TMP726]] monotonic monotonic, align 4
12416 // CHECK-NEXT:    [[TMP728:%.*]] = load i32, i32* [[IE]], align 4
12417 // CHECK-NEXT:    [[TMP729:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP728]] acq_rel, align 4
12418 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12419 // CHECK-NEXT:    [[TMP730:%.*]] = load i32, i32* [[IE]], align 4
12420 // CHECK-NEXT:    [[TMP731:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP730]] acq_rel, align 4
12421 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12422 // CHECK-NEXT:    [[TMP732:%.*]] = load i32, i32* [[IE]], align 4
12423 // CHECK-NEXT:    [[TMP733:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP732]] acq_rel, align 4
12424 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12425 // CHECK-NEXT:    [[TMP734:%.*]] = load i32, i32* [[IE]], align 4
12426 // CHECK-NEXT:    [[TMP735:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP734]] acq_rel, align 4
12427 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12428 // CHECK-NEXT:    [[TMP736:%.*]] = load i32, i32* [[IE]], align 4
12429 // CHECK-NEXT:    [[TMP737:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP736]] acq_rel, align 4
12430 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12431 // CHECK-NEXT:    [[TMP738:%.*]] = load i32, i32* [[IE]], align 4
12432 // CHECK-NEXT:    [[TMP739:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP738]] acq_rel, align 4
12433 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12434 // CHECK-NEXT:    [[TMP740:%.*]] = load i32, i32* [[IE]], align 4
12435 // CHECK-NEXT:    [[TMP741:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP740]] acq_rel, align 4
12436 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12437 // CHECK-NEXT:    [[TMP742:%.*]] = load i32, i32* [[IE]], align 4
12438 // CHECK-NEXT:    [[TMP743:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP742]] acq_rel, align 4
12439 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12440 // CHECK-NEXT:    [[TMP744:%.*]] = load i32, i32* [[IE]], align 4
12441 // CHECK-NEXT:    [[TMP745:%.*]] = load i32, i32* [[ID]], align 4
12442 // CHECK-NEXT:    [[TMP746:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP744]], i32 [[TMP745]] acq_rel acquire, align 4
12443 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12444 // CHECK-NEXT:    [[TMP747:%.*]] = load i32, i32* [[IE]], align 4
12445 // CHECK-NEXT:    [[TMP748:%.*]] = load i32, i32* [[ID]], align 4
12446 // CHECK-NEXT:    [[TMP749:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP747]], i32 [[TMP748]] acq_rel acquire, align 4
12447 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12448 // CHECK-NEXT:    [[TMP750:%.*]] = load i32, i32* [[IE]], align 4
12449 // CHECK-NEXT:    [[TMP751:%.*]] = load i32, i32* [[ID]], align 4
12450 // CHECK-NEXT:    [[TMP752:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP750]], i32 [[TMP751]] acq_rel acquire, align 4
12451 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12452 // CHECK-NEXT:    [[TMP753:%.*]] = load i32, i32* [[IE]], align 4
12453 // CHECK-NEXT:    [[TMP754:%.*]] = load i32, i32* [[ID]], align 4
12454 // CHECK-NEXT:    [[TMP755:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP753]], i32 [[TMP754]] acq_rel acquire, align 4
12455 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12456 // CHECK-NEXT:    [[TMP756:%.*]] = load i32, i32* [[UIE]], align 4
12457 // CHECK-NEXT:    [[TMP757:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP756]] acq_rel, align 4
12458 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12459 // CHECK-NEXT:    [[TMP758:%.*]] = load i32, i32* [[UIE]], align 4
12460 // CHECK-NEXT:    [[TMP759:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP758]] acq_rel, align 4
12461 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12462 // CHECK-NEXT:    [[TMP760:%.*]] = load i32, i32* [[UIE]], align 4
12463 // CHECK-NEXT:    [[TMP761:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP760]] acq_rel, align 4
12464 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12465 // CHECK-NEXT:    [[TMP762:%.*]] = load i32, i32* [[UIE]], align 4
12466 // CHECK-NEXT:    [[TMP763:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP762]] acq_rel, align 4
12467 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12468 // CHECK-NEXT:    [[TMP764:%.*]] = load i32, i32* [[UIE]], align 4
12469 // CHECK-NEXT:    [[TMP765:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP764]] acq_rel, align 4
12470 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12471 // CHECK-NEXT:    [[TMP766:%.*]] = load i32, i32* [[UIE]], align 4
12472 // CHECK-NEXT:    [[TMP767:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP766]] acq_rel, align 4
12473 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12474 // CHECK-NEXT:    [[TMP768:%.*]] = load i32, i32* [[UIE]], align 4
12475 // CHECK-NEXT:    [[TMP769:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP768]] acq_rel, align 4
12476 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12477 // CHECK-NEXT:    [[TMP770:%.*]] = load i32, i32* [[UIE]], align 4
12478 // CHECK-NEXT:    [[TMP771:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP770]] acq_rel, align 4
12479 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12480 // CHECK-NEXT:    [[TMP772:%.*]] = load i32, i32* [[UIE]], align 4
12481 // CHECK-NEXT:    [[TMP773:%.*]] = load i32, i32* [[UID]], align 4
12482 // CHECK-NEXT:    [[TMP774:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP772]], i32 [[TMP773]] acq_rel acquire, align 4
12483 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12484 // CHECK-NEXT:    [[TMP775:%.*]] = load i32, i32* [[UIE]], align 4
12485 // CHECK-NEXT:    [[TMP776:%.*]] = load i32, i32* [[UID]], align 4
12486 // CHECK-NEXT:    [[TMP777:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP775]], i32 [[TMP776]] acq_rel acquire, align 4
12487 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12488 // CHECK-NEXT:    [[TMP778:%.*]] = load i32, i32* [[UIE]], align 4
12489 // CHECK-NEXT:    [[TMP779:%.*]] = load i32, i32* [[UID]], align 4
12490 // CHECK-NEXT:    [[TMP780:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP778]], i32 [[TMP779]] acq_rel acquire, align 4
12491 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12492 // CHECK-NEXT:    [[TMP781:%.*]] = load i32, i32* [[UIE]], align 4
12493 // CHECK-NEXT:    [[TMP782:%.*]] = load i32, i32* [[UID]], align 4
12494 // CHECK-NEXT:    [[TMP783:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP781]], i32 [[TMP782]] acq_rel acquire, align 4
12495 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12496 // CHECK-NEXT:    [[TMP784:%.*]] = load i32, i32* [[IE]], align 4
12497 // CHECK-NEXT:    [[TMP785:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP784]] acquire, align 4
12498 // CHECK-NEXT:    [[TMP786:%.*]] = load i32, i32* [[IE]], align 4
12499 // CHECK-NEXT:    [[TMP787:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP786]] acquire, align 4
12500 // CHECK-NEXT:    [[TMP788:%.*]] = load i32, i32* [[IE]], align 4
12501 // CHECK-NEXT:    [[TMP789:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP788]] acquire, align 4
12502 // CHECK-NEXT:    [[TMP790:%.*]] = load i32, i32* [[IE]], align 4
12503 // CHECK-NEXT:    [[TMP791:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP790]] acquire, align 4
12504 // CHECK-NEXT:    [[TMP792:%.*]] = load i32, i32* [[IE]], align 4
12505 // CHECK-NEXT:    [[TMP793:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP792]] acquire, align 4
12506 // CHECK-NEXT:    [[TMP794:%.*]] = load i32, i32* [[IE]], align 4
12507 // CHECK-NEXT:    [[TMP795:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP794]] acquire, align 4
12508 // CHECK-NEXT:    [[TMP796:%.*]] = load i32, i32* [[IE]], align 4
12509 // CHECK-NEXT:    [[TMP797:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP796]] acquire, align 4
12510 // CHECK-NEXT:    [[TMP798:%.*]] = load i32, i32* [[IE]], align 4
12511 // CHECK-NEXT:    [[TMP799:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP798]] acquire, align 4
12512 // CHECK-NEXT:    [[TMP800:%.*]] = load i32, i32* [[IE]], align 4
12513 // CHECK-NEXT:    [[TMP801:%.*]] = load i32, i32* [[ID]], align 4
12514 // CHECK-NEXT:    [[TMP802:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP800]], i32 [[TMP801]] acquire acquire, align 4
12515 // CHECK-NEXT:    [[TMP803:%.*]] = load i32, i32* [[IE]], align 4
12516 // CHECK-NEXT:    [[TMP804:%.*]] = load i32, i32* [[ID]], align 4
12517 // CHECK-NEXT:    [[TMP805:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP803]], i32 [[TMP804]] acquire acquire, align 4
12518 // CHECK-NEXT:    [[TMP806:%.*]] = load i32, i32* [[IE]], align 4
12519 // CHECK-NEXT:    [[TMP807:%.*]] = load i32, i32* [[ID]], align 4
12520 // CHECK-NEXT:    [[TMP808:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP806]], i32 [[TMP807]] acquire acquire, align 4
12521 // CHECK-NEXT:    [[TMP809:%.*]] = load i32, i32* [[IE]], align 4
12522 // CHECK-NEXT:    [[TMP810:%.*]] = load i32, i32* [[ID]], align 4
12523 // CHECK-NEXT:    [[TMP811:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP809]], i32 [[TMP810]] acquire acquire, align 4
12524 // CHECK-NEXT:    [[TMP812:%.*]] = load i32, i32* [[UIE]], align 4
12525 // CHECK-NEXT:    [[TMP813:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP812]] acquire, align 4
12526 // CHECK-NEXT:    [[TMP814:%.*]] = load i32, i32* [[UIE]], align 4
12527 // CHECK-NEXT:    [[TMP815:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP814]] acquire, align 4
12528 // CHECK-NEXT:    [[TMP816:%.*]] = load i32, i32* [[UIE]], align 4
12529 // CHECK-NEXT:    [[TMP817:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP816]] acquire, align 4
12530 // CHECK-NEXT:    [[TMP818:%.*]] = load i32, i32* [[UIE]], align 4
12531 // CHECK-NEXT:    [[TMP819:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP818]] acquire, align 4
12532 // CHECK-NEXT:    [[TMP820:%.*]] = load i32, i32* [[UIE]], align 4
12533 // CHECK-NEXT:    [[TMP821:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP820]] acquire, align 4
12534 // CHECK-NEXT:    [[TMP822:%.*]] = load i32, i32* [[UIE]], align 4
12535 // CHECK-NEXT:    [[TMP823:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP822]] acquire, align 4
12536 // CHECK-NEXT:    [[TMP824:%.*]] = load i32, i32* [[UIE]], align 4
12537 // CHECK-NEXT:    [[TMP825:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP824]] acquire, align 4
12538 // CHECK-NEXT:    [[TMP826:%.*]] = load i32, i32* [[UIE]], align 4
12539 // CHECK-NEXT:    [[TMP827:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP826]] acquire, align 4
12540 // CHECK-NEXT:    [[TMP828:%.*]] = load i32, i32* [[UIE]], align 4
12541 // CHECK-NEXT:    [[TMP829:%.*]] = load i32, i32* [[UID]], align 4
12542 // CHECK-NEXT:    [[TMP830:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP828]], i32 [[TMP829]] acquire acquire, align 4
12543 // CHECK-NEXT:    [[TMP831:%.*]] = load i32, i32* [[UIE]], align 4
12544 // CHECK-NEXT:    [[TMP832:%.*]] = load i32, i32* [[UID]], align 4
12545 // CHECK-NEXT:    [[TMP833:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP831]], i32 [[TMP832]] acquire acquire, align 4
12546 // CHECK-NEXT:    [[TMP834:%.*]] = load i32, i32* [[UIE]], align 4
12547 // CHECK-NEXT:    [[TMP835:%.*]] = load i32, i32* [[UID]], align 4
12548 // CHECK-NEXT:    [[TMP836:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP834]], i32 [[TMP835]] acquire acquire, align 4
12549 // CHECK-NEXT:    [[TMP837:%.*]] = load i32, i32* [[UIE]], align 4
12550 // CHECK-NEXT:    [[TMP838:%.*]] = load i32, i32* [[UID]], align 4
12551 // CHECK-NEXT:    [[TMP839:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP837]], i32 [[TMP838]] acquire acquire, align 4
12552 // CHECK-NEXT:    [[TMP840:%.*]] = load i32, i32* [[IE]], align 4
12553 // CHECK-NEXT:    [[TMP841:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP840]] monotonic, align 4
12554 // CHECK-NEXT:    [[TMP842:%.*]] = load i32, i32* [[IE]], align 4
12555 // CHECK-NEXT:    [[TMP843:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP842]] monotonic, align 4
12556 // CHECK-NEXT:    [[TMP844:%.*]] = load i32, i32* [[IE]], align 4
12557 // CHECK-NEXT:    [[TMP845:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP844]] monotonic, align 4
12558 // CHECK-NEXT:    [[TMP846:%.*]] = load i32, i32* [[IE]], align 4
12559 // CHECK-NEXT:    [[TMP847:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP846]] monotonic, align 4
12560 // CHECK-NEXT:    [[TMP848:%.*]] = load i32, i32* [[IE]], align 4
12561 // CHECK-NEXT:    [[TMP849:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP848]] monotonic, align 4
12562 // CHECK-NEXT:    [[TMP850:%.*]] = load i32, i32* [[IE]], align 4
12563 // CHECK-NEXT:    [[TMP851:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP850]] monotonic, align 4
12564 // CHECK-NEXT:    [[TMP852:%.*]] = load i32, i32* [[IE]], align 4
12565 // CHECK-NEXT:    [[TMP853:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP852]] monotonic, align 4
12566 // CHECK-NEXT:    [[TMP854:%.*]] = load i32, i32* [[IE]], align 4
12567 // CHECK-NEXT:    [[TMP855:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP854]] monotonic, align 4
12568 // CHECK-NEXT:    [[TMP856:%.*]] = load i32, i32* [[IE]], align 4
12569 // CHECK-NEXT:    [[TMP857:%.*]] = load i32, i32* [[ID]], align 4
12570 // CHECK-NEXT:    [[TMP858:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP856]], i32 [[TMP857]] monotonic monotonic, align 4
12571 // CHECK-NEXT:    [[TMP859:%.*]] = load i32, i32* [[IE]], align 4
12572 // CHECK-NEXT:    [[TMP860:%.*]] = load i32, i32* [[ID]], align 4
12573 // CHECK-NEXT:    [[TMP861:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP859]], i32 [[TMP860]] monotonic monotonic, align 4
12574 // CHECK-NEXT:    [[TMP862:%.*]] = load i32, i32* [[IE]], align 4
12575 // CHECK-NEXT:    [[TMP863:%.*]] = load i32, i32* [[ID]], align 4
12576 // CHECK-NEXT:    [[TMP864:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP862]], i32 [[TMP863]] monotonic monotonic, align 4
12577 // CHECK-NEXT:    [[TMP865:%.*]] = load i32, i32* [[IE]], align 4
12578 // CHECK-NEXT:    [[TMP866:%.*]] = load i32, i32* [[ID]], align 4
12579 // CHECK-NEXT:    [[TMP867:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP865]], i32 [[TMP866]] monotonic monotonic, align 4
12580 // CHECK-NEXT:    [[TMP868:%.*]] = load i32, i32* [[UIE]], align 4
12581 // CHECK-NEXT:    [[TMP869:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP868]] monotonic, align 4
12582 // CHECK-NEXT:    [[TMP870:%.*]] = load i32, i32* [[UIE]], align 4
12583 // CHECK-NEXT:    [[TMP871:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP870]] monotonic, align 4
12584 // CHECK-NEXT:    [[TMP872:%.*]] = load i32, i32* [[UIE]], align 4
12585 // CHECK-NEXT:    [[TMP873:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP872]] monotonic, align 4
12586 // CHECK-NEXT:    [[TMP874:%.*]] = load i32, i32* [[UIE]], align 4
12587 // CHECK-NEXT:    [[TMP875:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP874]] monotonic, align 4
12588 // CHECK-NEXT:    [[TMP876:%.*]] = load i32, i32* [[UIE]], align 4
12589 // CHECK-NEXT:    [[TMP877:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP876]] monotonic, align 4
12590 // CHECK-NEXT:    [[TMP878:%.*]] = load i32, i32* [[UIE]], align 4
12591 // CHECK-NEXT:    [[TMP879:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP878]] monotonic, align 4
12592 // CHECK-NEXT:    [[TMP880:%.*]] = load i32, i32* [[UIE]], align 4
12593 // CHECK-NEXT:    [[TMP881:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP880]] monotonic, align 4
12594 // CHECK-NEXT:    [[TMP882:%.*]] = load i32, i32* [[UIE]], align 4
12595 // CHECK-NEXT:    [[TMP883:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP882]] monotonic, align 4
12596 // CHECK-NEXT:    [[TMP884:%.*]] = load i32, i32* [[UIE]], align 4
12597 // CHECK-NEXT:    [[TMP885:%.*]] = load i32, i32* [[UID]], align 4
12598 // CHECK-NEXT:    [[TMP886:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP884]], i32 [[TMP885]] monotonic monotonic, align 4
12599 // CHECK-NEXT:    [[TMP887:%.*]] = load i32, i32* [[UIE]], align 4
12600 // CHECK-NEXT:    [[TMP888:%.*]] = load i32, i32* [[UID]], align 4
12601 // CHECK-NEXT:    [[TMP889:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP887]], i32 [[TMP888]] monotonic monotonic, align 4
12602 // CHECK-NEXT:    [[TMP890:%.*]] = load i32, i32* [[UIE]], align 4
12603 // CHECK-NEXT:    [[TMP891:%.*]] = load i32, i32* [[UID]], align 4
12604 // CHECK-NEXT:    [[TMP892:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP890]], i32 [[TMP891]] monotonic monotonic, align 4
12605 // CHECK-NEXT:    [[TMP893:%.*]] = load i32, i32* [[UIE]], align 4
12606 // CHECK-NEXT:    [[TMP894:%.*]] = load i32, i32* [[UID]], align 4
12607 // CHECK-NEXT:    [[TMP895:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP893]], i32 [[TMP894]] monotonic monotonic, align 4
12608 // CHECK-NEXT:    [[TMP896:%.*]] = load i32, i32* [[IE]], align 4
12609 // CHECK-NEXT:    [[TMP897:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP896]] release, align 4
12610 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12611 // CHECK-NEXT:    [[TMP898:%.*]] = load i32, i32* [[IE]], align 4
12612 // CHECK-NEXT:    [[TMP899:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP898]] release, align 4
12613 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12614 // CHECK-NEXT:    [[TMP900:%.*]] = load i32, i32* [[IE]], align 4
12615 // CHECK-NEXT:    [[TMP901:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP900]] release, align 4
12616 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12617 // CHECK-NEXT:    [[TMP902:%.*]] = load i32, i32* [[IE]], align 4
12618 // CHECK-NEXT:    [[TMP903:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP902]] release, align 4
12619 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12620 // CHECK-NEXT:    [[TMP904:%.*]] = load i32, i32* [[IE]], align 4
12621 // CHECK-NEXT:    [[TMP905:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP904]] release, align 4
12622 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12623 // CHECK-NEXT:    [[TMP906:%.*]] = load i32, i32* [[IE]], align 4
12624 // CHECK-NEXT:    [[TMP907:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP906]] release, align 4
12625 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12626 // CHECK-NEXT:    [[TMP908:%.*]] = load i32, i32* [[IE]], align 4
12627 // CHECK-NEXT:    [[TMP909:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP908]] release, align 4
12628 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12629 // CHECK-NEXT:    [[TMP910:%.*]] = load i32, i32* [[IE]], align 4
12630 // CHECK-NEXT:    [[TMP911:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP910]] release, align 4
12631 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12632 // CHECK-NEXT:    [[TMP912:%.*]] = load i32, i32* [[IE]], align 4
12633 // CHECK-NEXT:    [[TMP913:%.*]] = load i32, i32* [[ID]], align 4
12634 // CHECK-NEXT:    [[TMP914:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP912]], i32 [[TMP913]] release monotonic, align 4
12635 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12636 // CHECK-NEXT:    [[TMP915:%.*]] = load i32, i32* [[IE]], align 4
12637 // CHECK-NEXT:    [[TMP916:%.*]] = load i32, i32* [[ID]], align 4
12638 // CHECK-NEXT:    [[TMP917:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP915]], i32 [[TMP916]] release monotonic, align 4
12639 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12640 // CHECK-NEXT:    [[TMP918:%.*]] = load i32, i32* [[IE]], align 4
12641 // CHECK-NEXT:    [[TMP919:%.*]] = load i32, i32* [[ID]], align 4
12642 // CHECK-NEXT:    [[TMP920:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP918]], i32 [[TMP919]] release monotonic, align 4
12643 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12644 // CHECK-NEXT:    [[TMP921:%.*]] = load i32, i32* [[IE]], align 4
12645 // CHECK-NEXT:    [[TMP922:%.*]] = load i32, i32* [[ID]], align 4
12646 // CHECK-NEXT:    [[TMP923:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP921]], i32 [[TMP922]] release monotonic, align 4
12647 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12648 // CHECK-NEXT:    [[TMP924:%.*]] = load i32, i32* [[UIE]], align 4
12649 // CHECK-NEXT:    [[TMP925:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP924]] release, align 4
12650 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12651 // CHECK-NEXT:    [[TMP926:%.*]] = load i32, i32* [[UIE]], align 4
12652 // CHECK-NEXT:    [[TMP927:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP926]] release, align 4
12653 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12654 // CHECK-NEXT:    [[TMP928:%.*]] = load i32, i32* [[UIE]], align 4
12655 // CHECK-NEXT:    [[TMP929:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP928]] release, align 4
12656 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12657 // CHECK-NEXT:    [[TMP930:%.*]] = load i32, i32* [[UIE]], align 4
12658 // CHECK-NEXT:    [[TMP931:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP930]] release, align 4
12659 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12660 // CHECK-NEXT:    [[TMP932:%.*]] = load i32, i32* [[UIE]], align 4
12661 // CHECK-NEXT:    [[TMP933:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP932]] release, align 4
12662 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12663 // CHECK-NEXT:    [[TMP934:%.*]] = load i32, i32* [[UIE]], align 4
12664 // CHECK-NEXT:    [[TMP935:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP934]] release, align 4
12665 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12666 // CHECK-NEXT:    [[TMP936:%.*]] = load i32, i32* [[UIE]], align 4
12667 // CHECK-NEXT:    [[TMP937:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP936]] release, align 4
12668 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12669 // CHECK-NEXT:    [[TMP938:%.*]] = load i32, i32* [[UIE]], align 4
12670 // CHECK-NEXT:    [[TMP939:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP938]] release, align 4
12671 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12672 // CHECK-NEXT:    [[TMP940:%.*]] = load i32, i32* [[UIE]], align 4
12673 // CHECK-NEXT:    [[TMP941:%.*]] = load i32, i32* [[UID]], align 4
12674 // CHECK-NEXT:    [[TMP942:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP940]], i32 [[TMP941]] release monotonic, align 4
12675 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12676 // CHECK-NEXT:    [[TMP943:%.*]] = load i32, i32* [[UIE]], align 4
12677 // CHECK-NEXT:    [[TMP944:%.*]] = load i32, i32* [[UID]], align 4
12678 // CHECK-NEXT:    [[TMP945:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP943]], i32 [[TMP944]] release monotonic, align 4
12679 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12680 // CHECK-NEXT:    [[TMP946:%.*]] = load i32, i32* [[UIE]], align 4
12681 // CHECK-NEXT:    [[TMP947:%.*]] = load i32, i32* [[UID]], align 4
12682 // CHECK-NEXT:    [[TMP948:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP946]], i32 [[TMP947]] release monotonic, align 4
12683 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12684 // CHECK-NEXT:    [[TMP949:%.*]] = load i32, i32* [[UIE]], align 4
12685 // CHECK-NEXT:    [[TMP950:%.*]] = load i32, i32* [[UID]], align 4
12686 // CHECK-NEXT:    [[TMP951:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP949]], i32 [[TMP950]] release monotonic, align 4
12687 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12688 // CHECK-NEXT:    [[TMP952:%.*]] = load i32, i32* [[IE]], align 4
12689 // CHECK-NEXT:    [[TMP953:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP952]] seq_cst, align 4
12690 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12691 // CHECK-NEXT:    [[TMP954:%.*]] = load i32, i32* [[IE]], align 4
12692 // CHECK-NEXT:    [[TMP955:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP954]] seq_cst, align 4
12693 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12694 // CHECK-NEXT:    [[TMP956:%.*]] = load i32, i32* [[IE]], align 4
12695 // CHECK-NEXT:    [[TMP957:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP956]] seq_cst, align 4
12696 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12697 // CHECK-NEXT:    [[TMP958:%.*]] = load i32, i32* [[IE]], align 4
12698 // CHECK-NEXT:    [[TMP959:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP958]] seq_cst, align 4
12699 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12700 // CHECK-NEXT:    [[TMP960:%.*]] = load i32, i32* [[IE]], align 4
12701 // CHECK-NEXT:    [[TMP961:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP960]] seq_cst, align 4
12702 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12703 // CHECK-NEXT:    [[TMP962:%.*]] = load i32, i32* [[IE]], align 4
12704 // CHECK-NEXT:    [[TMP963:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP962]] seq_cst, align 4
12705 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12706 // CHECK-NEXT:    [[TMP964:%.*]] = load i32, i32* [[IE]], align 4
12707 // CHECK-NEXT:    [[TMP965:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP964]] seq_cst, align 4
12708 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12709 // CHECK-NEXT:    [[TMP966:%.*]] = load i32, i32* [[IE]], align 4
12710 // CHECK-NEXT:    [[TMP967:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP966]] seq_cst, align 4
12711 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12712 // CHECK-NEXT:    [[TMP968:%.*]] = load i32, i32* [[IE]], align 4
12713 // CHECK-NEXT:    [[TMP969:%.*]] = load i32, i32* [[ID]], align 4
12714 // CHECK-NEXT:    [[TMP970:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP968]], i32 [[TMP969]] seq_cst seq_cst, align 4
12715 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12716 // CHECK-NEXT:    [[TMP971:%.*]] = load i32, i32* [[IE]], align 4
12717 // CHECK-NEXT:    [[TMP972:%.*]] = load i32, i32* [[ID]], align 4
12718 // CHECK-NEXT:    [[TMP973:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP971]], i32 [[TMP972]] seq_cst seq_cst, align 4
12719 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12720 // CHECK-NEXT:    [[TMP974:%.*]] = load i32, i32* [[IE]], align 4
12721 // CHECK-NEXT:    [[TMP975:%.*]] = load i32, i32* [[ID]], align 4
12722 // CHECK-NEXT:    [[TMP976:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP974]], i32 [[TMP975]] seq_cst seq_cst, align 4
12723 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12724 // CHECK-NEXT:    [[TMP977:%.*]] = load i32, i32* [[IE]], align 4
12725 // CHECK-NEXT:    [[TMP978:%.*]] = load i32, i32* [[ID]], align 4
12726 // CHECK-NEXT:    [[TMP979:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP977]], i32 [[TMP978]] seq_cst seq_cst, align 4
12727 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12728 // CHECK-NEXT:    [[TMP980:%.*]] = load i32, i32* [[UIE]], align 4
12729 // CHECK-NEXT:    [[TMP981:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP980]] seq_cst, align 4
12730 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12731 // CHECK-NEXT:    [[TMP982:%.*]] = load i32, i32* [[UIE]], align 4
12732 // CHECK-NEXT:    [[TMP983:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP982]] seq_cst, align 4
12733 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12734 // CHECK-NEXT:    [[TMP984:%.*]] = load i32, i32* [[UIE]], align 4
12735 // CHECK-NEXT:    [[TMP985:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP984]] seq_cst, align 4
12736 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12737 // CHECK-NEXT:    [[TMP986:%.*]] = load i32, i32* [[UIE]], align 4
12738 // CHECK-NEXT:    [[TMP987:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP986]] seq_cst, align 4
12739 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12740 // CHECK-NEXT:    [[TMP988:%.*]] = load i32, i32* [[UIE]], align 4
12741 // CHECK-NEXT:    [[TMP989:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP988]] seq_cst, align 4
12742 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12743 // CHECK-NEXT:    [[TMP990:%.*]] = load i32, i32* [[UIE]], align 4
12744 // CHECK-NEXT:    [[TMP991:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP990]] seq_cst, align 4
12745 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12746 // CHECK-NEXT:    [[TMP992:%.*]] = load i32, i32* [[UIE]], align 4
12747 // CHECK-NEXT:    [[TMP993:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP992]] seq_cst, align 4
12748 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12749 // CHECK-NEXT:    [[TMP994:%.*]] = load i32, i32* [[UIE]], align 4
12750 // CHECK-NEXT:    [[TMP995:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP994]] seq_cst, align 4
12751 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12752 // CHECK-NEXT:    [[TMP996:%.*]] = load i32, i32* [[UIE]], align 4
12753 // CHECK-NEXT:    [[TMP997:%.*]] = load i32, i32* [[UID]], align 4
12754 // CHECK-NEXT:    [[TMP998:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP996]], i32 [[TMP997]] seq_cst seq_cst, align 4
12755 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12756 // CHECK-NEXT:    [[TMP999:%.*]] = load i32, i32* [[UIE]], align 4
12757 // CHECK-NEXT:    [[TMP1000:%.*]] = load i32, i32* [[UID]], align 4
12758 // CHECK-NEXT:    [[TMP1001:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP999]], i32 [[TMP1000]] seq_cst seq_cst, align 4
12759 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12760 // CHECK-NEXT:    [[TMP1002:%.*]] = load i32, i32* [[UIE]], align 4
12761 // CHECK-NEXT:    [[TMP1003:%.*]] = load i32, i32* [[UID]], align 4
12762 // CHECK-NEXT:    [[TMP1004:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP1002]], i32 [[TMP1003]] seq_cst seq_cst, align 4
12763 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12764 // CHECK-NEXT:    [[TMP1005:%.*]] = load i32, i32* [[UIE]], align 4
12765 // CHECK-NEXT:    [[TMP1006:%.*]] = load i32, i32* [[UID]], align 4
12766 // CHECK-NEXT:    [[TMP1007:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP1005]], i32 [[TMP1006]] seq_cst seq_cst, align 4
12767 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12768 // CHECK-NEXT:    [[TMP1008:%.*]] = load i64, i64* [[LE]], align 8
12769 // CHECK-NEXT:    [[TMP1009:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1008]] monotonic, align 8
12770 // CHECK-NEXT:    [[TMP1010:%.*]] = load i64, i64* [[LE]], align 8
12771 // CHECK-NEXT:    [[TMP1011:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1010]] monotonic, align 8
12772 // CHECK-NEXT:    [[TMP1012:%.*]] = load i64, i64* [[LE]], align 8
12773 // CHECK-NEXT:    [[TMP1013:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1012]] monotonic, align 8
12774 // CHECK-NEXT:    [[TMP1014:%.*]] = load i64, i64* [[LE]], align 8
12775 // CHECK-NEXT:    [[TMP1015:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1014]] monotonic, align 8
12776 // CHECK-NEXT:    [[TMP1016:%.*]] = load i64, i64* [[LE]], align 8
12777 // CHECK-NEXT:    [[TMP1017:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1016]] monotonic, align 8
12778 // CHECK-NEXT:    [[TMP1018:%.*]] = load i64, i64* [[LE]], align 8
12779 // CHECK-NEXT:    [[TMP1019:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1018]] monotonic, align 8
12780 // CHECK-NEXT:    [[TMP1020:%.*]] = load i64, i64* [[LE]], align 8
12781 // CHECK-NEXT:    [[TMP1021:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1020]] monotonic, align 8
12782 // CHECK-NEXT:    [[TMP1022:%.*]] = load i64, i64* [[LE]], align 8
12783 // CHECK-NEXT:    [[TMP1023:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1022]] monotonic, align 8
12784 // CHECK-NEXT:    [[TMP1024:%.*]] = load i64, i64* [[LE]], align 8
12785 // CHECK-NEXT:    [[TMP1025:%.*]] = load i64, i64* [[LD]], align 8
12786 // CHECK-NEXT:    [[TMP1026:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1024]], i64 [[TMP1025]] monotonic monotonic, align 8
12787 // CHECK-NEXT:    [[TMP1027:%.*]] = load i64, i64* [[LE]], align 8
12788 // CHECK-NEXT:    [[TMP1028:%.*]] = load i64, i64* [[LD]], align 8
12789 // CHECK-NEXT:    [[TMP1029:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1027]], i64 [[TMP1028]] monotonic monotonic, align 8
12790 // CHECK-NEXT:    [[TMP1030:%.*]] = load i64, i64* [[LE]], align 8
12791 // CHECK-NEXT:    [[TMP1031:%.*]] = load i64, i64* [[LD]], align 8
12792 // CHECK-NEXT:    [[TMP1032:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1030]], i64 [[TMP1031]] monotonic monotonic, align 8
12793 // CHECK-NEXT:    [[TMP1033:%.*]] = load i64, i64* [[LE]], align 8
12794 // CHECK-NEXT:    [[TMP1034:%.*]] = load i64, i64* [[LD]], align 8
12795 // CHECK-NEXT:    [[TMP1035:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1033]], i64 [[TMP1034]] monotonic monotonic, align 8
12796 // CHECK-NEXT:    [[TMP1036:%.*]] = load i64, i64* [[ULE]], align 8
12797 // CHECK-NEXT:    [[TMP1037:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1036]] monotonic, align 8
12798 // CHECK-NEXT:    [[TMP1038:%.*]] = load i64, i64* [[ULE]], align 8
12799 // CHECK-NEXT:    [[TMP1039:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1038]] monotonic, align 8
12800 // CHECK-NEXT:    [[TMP1040:%.*]] = load i64, i64* [[ULE]], align 8
12801 // CHECK-NEXT:    [[TMP1041:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1040]] monotonic, align 8
12802 // CHECK-NEXT:    [[TMP1042:%.*]] = load i64, i64* [[ULE]], align 8
12803 // CHECK-NEXT:    [[TMP1043:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1042]] monotonic, align 8
12804 // CHECK-NEXT:    [[TMP1044:%.*]] = load i64, i64* [[ULE]], align 8
12805 // CHECK-NEXT:    [[TMP1045:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1044]] monotonic, align 8
12806 // CHECK-NEXT:    [[TMP1046:%.*]] = load i64, i64* [[ULE]], align 8
12807 // CHECK-NEXT:    [[TMP1047:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1046]] monotonic, align 8
12808 // CHECK-NEXT:    [[TMP1048:%.*]] = load i64, i64* [[ULE]], align 8
12809 // CHECK-NEXT:    [[TMP1049:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1048]] monotonic, align 8
12810 // CHECK-NEXT:    [[TMP1050:%.*]] = load i64, i64* [[ULE]], align 8
12811 // CHECK-NEXT:    [[TMP1051:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1050]] monotonic, align 8
12812 // CHECK-NEXT:    [[TMP1052:%.*]] = load i64, i64* [[ULE]], align 8
12813 // CHECK-NEXT:    [[TMP1053:%.*]] = load i64, i64* [[ULD]], align 8
12814 // CHECK-NEXT:    [[TMP1054:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1052]], i64 [[TMP1053]] monotonic monotonic, align 8
12815 // CHECK-NEXT:    [[TMP1055:%.*]] = load i64, i64* [[ULE]], align 8
12816 // CHECK-NEXT:    [[TMP1056:%.*]] = load i64, i64* [[ULD]], align 8
12817 // CHECK-NEXT:    [[TMP1057:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1055]], i64 [[TMP1056]] monotonic monotonic, align 8
12818 // CHECK-NEXT:    [[TMP1058:%.*]] = load i64, i64* [[ULE]], align 8
12819 // CHECK-NEXT:    [[TMP1059:%.*]] = load i64, i64* [[ULD]], align 8
12820 // CHECK-NEXT:    [[TMP1060:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1058]], i64 [[TMP1059]] monotonic monotonic, align 8
12821 // CHECK-NEXT:    [[TMP1061:%.*]] = load i64, i64* [[ULE]], align 8
12822 // CHECK-NEXT:    [[TMP1062:%.*]] = load i64, i64* [[ULD]], align 8
12823 // CHECK-NEXT:    [[TMP1063:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1061]], i64 [[TMP1062]] monotonic monotonic, align 8
12824 // CHECK-NEXT:    [[TMP1064:%.*]] = load i64, i64* [[LE]], align 8
12825 // CHECK-NEXT:    [[TMP1065:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1064]] acq_rel, align 8
12826 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12827 // CHECK-NEXT:    [[TMP1066:%.*]] = load i64, i64* [[LE]], align 8
12828 // CHECK-NEXT:    [[TMP1067:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1066]] acq_rel, align 8
12829 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12830 // CHECK-NEXT:    [[TMP1068:%.*]] = load i64, i64* [[LE]], align 8
12831 // CHECK-NEXT:    [[TMP1069:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1068]] acq_rel, align 8
12832 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12833 // CHECK-NEXT:    [[TMP1070:%.*]] = load i64, i64* [[LE]], align 8
12834 // CHECK-NEXT:    [[TMP1071:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1070]] acq_rel, align 8
12835 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12836 // CHECK-NEXT:    [[TMP1072:%.*]] = load i64, i64* [[LE]], align 8
12837 // CHECK-NEXT:    [[TMP1073:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1072]] acq_rel, align 8
12838 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12839 // CHECK-NEXT:    [[TMP1074:%.*]] = load i64, i64* [[LE]], align 8
12840 // CHECK-NEXT:    [[TMP1075:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1074]] acq_rel, align 8
12841 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12842 // CHECK-NEXT:    [[TMP1076:%.*]] = load i64, i64* [[LE]], align 8
12843 // CHECK-NEXT:    [[TMP1077:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1076]] acq_rel, align 8
12844 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12845 // CHECK-NEXT:    [[TMP1078:%.*]] = load i64, i64* [[LE]], align 8
12846 // CHECK-NEXT:    [[TMP1079:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1078]] acq_rel, align 8
12847 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12848 // CHECK-NEXT:    [[TMP1080:%.*]] = load i64, i64* [[LE]], align 8
12849 // CHECK-NEXT:    [[TMP1081:%.*]] = load i64, i64* [[LD]], align 8
12850 // CHECK-NEXT:    [[TMP1082:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1080]], i64 [[TMP1081]] acq_rel acquire, align 8
12851 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12852 // CHECK-NEXT:    [[TMP1083:%.*]] = load i64, i64* [[LE]], align 8
12853 // CHECK-NEXT:    [[TMP1084:%.*]] = load i64, i64* [[LD]], align 8
12854 // CHECK-NEXT:    [[TMP1085:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1083]], i64 [[TMP1084]] acq_rel acquire, align 8
12855 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12856 // CHECK-NEXT:    [[TMP1086:%.*]] = load i64, i64* [[LE]], align 8
12857 // CHECK-NEXT:    [[TMP1087:%.*]] = load i64, i64* [[LD]], align 8
12858 // CHECK-NEXT:    [[TMP1088:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1086]], i64 [[TMP1087]] acq_rel acquire, align 8
12859 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12860 // CHECK-NEXT:    [[TMP1089:%.*]] = load i64, i64* [[LE]], align 8
12861 // CHECK-NEXT:    [[TMP1090:%.*]] = load i64, i64* [[LD]], align 8
12862 // CHECK-NEXT:    [[TMP1091:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1089]], i64 [[TMP1090]] acq_rel acquire, align 8
12863 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12864 // CHECK-NEXT:    [[TMP1092:%.*]] = load i64, i64* [[ULE]], align 8
12865 // CHECK-NEXT:    [[TMP1093:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1092]] acq_rel, align 8
12866 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12867 // CHECK-NEXT:    [[TMP1094:%.*]] = load i64, i64* [[ULE]], align 8
12868 // CHECK-NEXT:    [[TMP1095:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1094]] acq_rel, align 8
12869 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12870 // CHECK-NEXT:    [[TMP1096:%.*]] = load i64, i64* [[ULE]], align 8
12871 // CHECK-NEXT:    [[TMP1097:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1096]] acq_rel, align 8
12872 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12873 // CHECK-NEXT:    [[TMP1098:%.*]] = load i64, i64* [[ULE]], align 8
12874 // CHECK-NEXT:    [[TMP1099:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1098]] acq_rel, align 8
12875 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12876 // CHECK-NEXT:    [[TMP1100:%.*]] = load i64, i64* [[ULE]], align 8
12877 // CHECK-NEXT:    [[TMP1101:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1100]] acq_rel, align 8
12878 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12879 // CHECK-NEXT:    [[TMP1102:%.*]] = load i64, i64* [[ULE]], align 8
12880 // CHECK-NEXT:    [[TMP1103:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1102]] acq_rel, align 8
12881 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12882 // CHECK-NEXT:    [[TMP1104:%.*]] = load i64, i64* [[ULE]], align 8
12883 // CHECK-NEXT:    [[TMP1105:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1104]] acq_rel, align 8
12884 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12885 // CHECK-NEXT:    [[TMP1106:%.*]] = load i64, i64* [[ULE]], align 8
12886 // CHECK-NEXT:    [[TMP1107:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1106]] acq_rel, align 8
12887 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12888 // CHECK-NEXT:    [[TMP1108:%.*]] = load i64, i64* [[ULE]], align 8
12889 // CHECK-NEXT:    [[TMP1109:%.*]] = load i64, i64* [[ULD]], align 8
12890 // CHECK-NEXT:    [[TMP1110:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1108]], i64 [[TMP1109]] acq_rel acquire, align 8
12891 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12892 // CHECK-NEXT:    [[TMP1111:%.*]] = load i64, i64* [[ULE]], align 8
12893 // CHECK-NEXT:    [[TMP1112:%.*]] = load i64, i64* [[ULD]], align 8
12894 // CHECK-NEXT:    [[TMP1113:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1111]], i64 [[TMP1112]] acq_rel acquire, align 8
12895 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12896 // CHECK-NEXT:    [[TMP1114:%.*]] = load i64, i64* [[ULE]], align 8
12897 // CHECK-NEXT:    [[TMP1115:%.*]] = load i64, i64* [[ULD]], align 8
12898 // CHECK-NEXT:    [[TMP1116:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1114]], i64 [[TMP1115]] acq_rel acquire, align 8
12899 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12900 // CHECK-NEXT:    [[TMP1117:%.*]] = load i64, i64* [[ULE]], align 8
12901 // CHECK-NEXT:    [[TMP1118:%.*]] = load i64, i64* [[ULD]], align 8
12902 // CHECK-NEXT:    [[TMP1119:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1117]], i64 [[TMP1118]] acq_rel acquire, align 8
12903 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
12904 // CHECK-NEXT:    [[TMP1120:%.*]] = load i64, i64* [[LE]], align 8
12905 // CHECK-NEXT:    [[TMP1121:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1120]] acquire, align 8
12906 // CHECK-NEXT:    [[TMP1122:%.*]] = load i64, i64* [[LE]], align 8
12907 // CHECK-NEXT:    [[TMP1123:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1122]] acquire, align 8
12908 // CHECK-NEXT:    [[TMP1124:%.*]] = load i64, i64* [[LE]], align 8
12909 // CHECK-NEXT:    [[TMP1125:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1124]] acquire, align 8
12910 // CHECK-NEXT:    [[TMP1126:%.*]] = load i64, i64* [[LE]], align 8
12911 // CHECK-NEXT:    [[TMP1127:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1126]] acquire, align 8
12912 // CHECK-NEXT:    [[TMP1128:%.*]] = load i64, i64* [[LE]], align 8
12913 // CHECK-NEXT:    [[TMP1129:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1128]] acquire, align 8
12914 // CHECK-NEXT:    [[TMP1130:%.*]] = load i64, i64* [[LE]], align 8
12915 // CHECK-NEXT:    [[TMP1131:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1130]] acquire, align 8
12916 // CHECK-NEXT:    [[TMP1132:%.*]] = load i64, i64* [[LE]], align 8
12917 // CHECK-NEXT:    [[TMP1133:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1132]] acquire, align 8
12918 // CHECK-NEXT:    [[TMP1134:%.*]] = load i64, i64* [[LE]], align 8
12919 // CHECK-NEXT:    [[TMP1135:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1134]] acquire, align 8
12920 // CHECK-NEXT:    [[TMP1136:%.*]] = load i64, i64* [[LE]], align 8
12921 // CHECK-NEXT:    [[TMP1137:%.*]] = load i64, i64* [[LD]], align 8
12922 // CHECK-NEXT:    [[TMP1138:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1136]], i64 [[TMP1137]] acquire acquire, align 8
12923 // CHECK-NEXT:    [[TMP1139:%.*]] = load i64, i64* [[LE]], align 8
12924 // CHECK-NEXT:    [[TMP1140:%.*]] = load i64, i64* [[LD]], align 8
12925 // CHECK-NEXT:    [[TMP1141:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1139]], i64 [[TMP1140]] acquire acquire, align 8
12926 // CHECK-NEXT:    [[TMP1142:%.*]] = load i64, i64* [[LE]], align 8
12927 // CHECK-NEXT:    [[TMP1143:%.*]] = load i64, i64* [[LD]], align 8
12928 // CHECK-NEXT:    [[TMP1144:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1142]], i64 [[TMP1143]] acquire acquire, align 8
12929 // CHECK-NEXT:    [[TMP1145:%.*]] = load i64, i64* [[LE]], align 8
12930 // CHECK-NEXT:    [[TMP1146:%.*]] = load i64, i64* [[LD]], align 8
12931 // CHECK-NEXT:    [[TMP1147:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1145]], i64 [[TMP1146]] acquire acquire, align 8
12932 // CHECK-NEXT:    [[TMP1148:%.*]] = load i64, i64* [[ULE]], align 8
12933 // CHECK-NEXT:    [[TMP1149:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1148]] acquire, align 8
12934 // CHECK-NEXT:    [[TMP1150:%.*]] = load i64, i64* [[ULE]], align 8
12935 // CHECK-NEXT:    [[TMP1151:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1150]] acquire, align 8
12936 // CHECK-NEXT:    [[TMP1152:%.*]] = load i64, i64* [[ULE]], align 8
12937 // CHECK-NEXT:    [[TMP1153:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1152]] acquire, align 8
12938 // CHECK-NEXT:    [[TMP1154:%.*]] = load i64, i64* [[ULE]], align 8
12939 // CHECK-NEXT:    [[TMP1155:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1154]] acquire, align 8
12940 // CHECK-NEXT:    [[TMP1156:%.*]] = load i64, i64* [[ULE]], align 8
12941 // CHECK-NEXT:    [[TMP1157:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1156]] acquire, align 8
12942 // CHECK-NEXT:    [[TMP1158:%.*]] = load i64, i64* [[ULE]], align 8
12943 // CHECK-NEXT:    [[TMP1159:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1158]] acquire, align 8
12944 // CHECK-NEXT:    [[TMP1160:%.*]] = load i64, i64* [[ULE]], align 8
12945 // CHECK-NEXT:    [[TMP1161:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1160]] acquire, align 8
12946 // CHECK-NEXT:    [[TMP1162:%.*]] = load i64, i64* [[ULE]], align 8
12947 // CHECK-NEXT:    [[TMP1163:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1162]] acquire, align 8
12948 // CHECK-NEXT:    [[TMP1164:%.*]] = load i64, i64* [[ULE]], align 8
12949 // CHECK-NEXT:    [[TMP1165:%.*]] = load i64, i64* [[ULD]], align 8
12950 // CHECK-NEXT:    [[TMP1166:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1164]], i64 [[TMP1165]] acquire acquire, align 8
12951 // CHECK-NEXT:    [[TMP1167:%.*]] = load i64, i64* [[ULE]], align 8
12952 // CHECK-NEXT:    [[TMP1168:%.*]] = load i64, i64* [[ULD]], align 8
12953 // CHECK-NEXT:    [[TMP1169:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1167]], i64 [[TMP1168]] acquire acquire, align 8
12954 // CHECK-NEXT:    [[TMP1170:%.*]] = load i64, i64* [[ULE]], align 8
12955 // CHECK-NEXT:    [[TMP1171:%.*]] = load i64, i64* [[ULD]], align 8
12956 // CHECK-NEXT:    [[TMP1172:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1170]], i64 [[TMP1171]] acquire acquire, align 8
12957 // CHECK-NEXT:    [[TMP1173:%.*]] = load i64, i64* [[ULE]], align 8
12958 // CHECK-NEXT:    [[TMP1174:%.*]] = load i64, i64* [[ULD]], align 8
12959 // CHECK-NEXT:    [[TMP1175:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1173]], i64 [[TMP1174]] acquire acquire, align 8
12960 // CHECK-NEXT:    [[TMP1176:%.*]] = load i64, i64* [[LE]], align 8
12961 // CHECK-NEXT:    [[TMP1177:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1176]] monotonic, align 8
12962 // CHECK-NEXT:    [[TMP1178:%.*]] = load i64, i64* [[LE]], align 8
12963 // CHECK-NEXT:    [[TMP1179:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1178]] monotonic, align 8
12964 // CHECK-NEXT:    [[TMP1180:%.*]] = load i64, i64* [[LE]], align 8
12965 // CHECK-NEXT:    [[TMP1181:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1180]] monotonic, align 8
12966 // CHECK-NEXT:    [[TMP1182:%.*]] = load i64, i64* [[LE]], align 8
12967 // CHECK-NEXT:    [[TMP1183:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1182]] monotonic, align 8
12968 // CHECK-NEXT:    [[TMP1184:%.*]] = load i64, i64* [[LE]], align 8
12969 // CHECK-NEXT:    [[TMP1185:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1184]] monotonic, align 8
12970 // CHECK-NEXT:    [[TMP1186:%.*]] = load i64, i64* [[LE]], align 8
12971 // CHECK-NEXT:    [[TMP1187:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1186]] monotonic, align 8
12972 // CHECK-NEXT:    [[TMP1188:%.*]] = load i64, i64* [[LE]], align 8
12973 // CHECK-NEXT:    [[TMP1189:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1188]] monotonic, align 8
12974 // CHECK-NEXT:    [[TMP1190:%.*]] = load i64, i64* [[LE]], align 8
12975 // CHECK-NEXT:    [[TMP1191:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1190]] monotonic, align 8
12976 // CHECK-NEXT:    [[TMP1192:%.*]] = load i64, i64* [[LE]], align 8
12977 // CHECK-NEXT:    [[TMP1193:%.*]] = load i64, i64* [[LD]], align 8
12978 // CHECK-NEXT:    [[TMP1194:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1192]], i64 [[TMP1193]] monotonic monotonic, align 8
12979 // CHECK-NEXT:    [[TMP1195:%.*]] = load i64, i64* [[LE]], align 8
12980 // CHECK-NEXT:    [[TMP1196:%.*]] = load i64, i64* [[LD]], align 8
12981 // CHECK-NEXT:    [[TMP1197:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1195]], i64 [[TMP1196]] monotonic monotonic, align 8
12982 // CHECK-NEXT:    [[TMP1198:%.*]] = load i64, i64* [[LE]], align 8
12983 // CHECK-NEXT:    [[TMP1199:%.*]] = load i64, i64* [[LD]], align 8
12984 // CHECK-NEXT:    [[TMP1200:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1198]], i64 [[TMP1199]] monotonic monotonic, align 8
12985 // CHECK-NEXT:    [[TMP1201:%.*]] = load i64, i64* [[LE]], align 8
12986 // CHECK-NEXT:    [[TMP1202:%.*]] = load i64, i64* [[LD]], align 8
12987 // CHECK-NEXT:    [[TMP1203:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1201]], i64 [[TMP1202]] monotonic monotonic, align 8
12988 // CHECK-NEXT:    [[TMP1204:%.*]] = load i64, i64* [[ULE]], align 8
12989 // CHECK-NEXT:    [[TMP1205:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1204]] monotonic, align 8
12990 // CHECK-NEXT:    [[TMP1206:%.*]] = load i64, i64* [[ULE]], align 8
12991 // CHECK-NEXT:    [[TMP1207:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1206]] monotonic, align 8
12992 // CHECK-NEXT:    [[TMP1208:%.*]] = load i64, i64* [[ULE]], align 8
12993 // CHECK-NEXT:    [[TMP1209:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1208]] monotonic, align 8
12994 // CHECK-NEXT:    [[TMP1210:%.*]] = load i64, i64* [[ULE]], align 8
12995 // CHECK-NEXT:    [[TMP1211:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1210]] monotonic, align 8
12996 // CHECK-NEXT:    [[TMP1212:%.*]] = load i64, i64* [[ULE]], align 8
12997 // CHECK-NEXT:    [[TMP1213:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1212]] monotonic, align 8
12998 // CHECK-NEXT:    [[TMP1214:%.*]] = load i64, i64* [[ULE]], align 8
12999 // CHECK-NEXT:    [[TMP1215:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1214]] monotonic, align 8
13000 // CHECK-NEXT:    [[TMP1216:%.*]] = load i64, i64* [[ULE]], align 8
13001 // CHECK-NEXT:    [[TMP1217:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1216]] monotonic, align 8
13002 // CHECK-NEXT:    [[TMP1218:%.*]] = load i64, i64* [[ULE]], align 8
13003 // CHECK-NEXT:    [[TMP1219:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1218]] monotonic, align 8
13004 // CHECK-NEXT:    [[TMP1220:%.*]] = load i64, i64* [[ULE]], align 8
13005 // CHECK-NEXT:    [[TMP1221:%.*]] = load i64, i64* [[ULD]], align 8
13006 // CHECK-NEXT:    [[TMP1222:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1220]], i64 [[TMP1221]] monotonic monotonic, align 8
13007 // CHECK-NEXT:    [[TMP1223:%.*]] = load i64, i64* [[ULE]], align 8
13008 // CHECK-NEXT:    [[TMP1224:%.*]] = load i64, i64* [[ULD]], align 8
13009 // CHECK-NEXT:    [[TMP1225:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1223]], i64 [[TMP1224]] monotonic monotonic, align 8
13010 // CHECK-NEXT:    [[TMP1226:%.*]] = load i64, i64* [[ULE]], align 8
13011 // CHECK-NEXT:    [[TMP1227:%.*]] = load i64, i64* [[ULD]], align 8
13012 // CHECK-NEXT:    [[TMP1228:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1226]], i64 [[TMP1227]] monotonic monotonic, align 8
13013 // CHECK-NEXT:    [[TMP1229:%.*]] = load i64, i64* [[ULE]], align 8
13014 // CHECK-NEXT:    [[TMP1230:%.*]] = load i64, i64* [[ULD]], align 8
13015 // CHECK-NEXT:    [[TMP1231:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1229]], i64 [[TMP1230]] monotonic monotonic, align 8
13016 // CHECK-NEXT:    [[TMP1232:%.*]] = load i64, i64* [[LE]], align 8
13017 // CHECK-NEXT:    [[TMP1233:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1232]] release, align 8
13018 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13019 // CHECK-NEXT:    [[TMP1234:%.*]] = load i64, i64* [[LE]], align 8
13020 // CHECK-NEXT:    [[TMP1235:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1234]] release, align 8
13021 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13022 // CHECK-NEXT:    [[TMP1236:%.*]] = load i64, i64* [[LE]], align 8
13023 // CHECK-NEXT:    [[TMP1237:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1236]] release, align 8
13024 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13025 // CHECK-NEXT:    [[TMP1238:%.*]] = load i64, i64* [[LE]], align 8
13026 // CHECK-NEXT:    [[TMP1239:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1238]] release, align 8
13027 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13028 // CHECK-NEXT:    [[TMP1240:%.*]] = load i64, i64* [[LE]], align 8
13029 // CHECK-NEXT:    [[TMP1241:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1240]] release, align 8
13030 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13031 // CHECK-NEXT:    [[TMP1242:%.*]] = load i64, i64* [[LE]], align 8
13032 // CHECK-NEXT:    [[TMP1243:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1242]] release, align 8
13033 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13034 // CHECK-NEXT:    [[TMP1244:%.*]] = load i64, i64* [[LE]], align 8
13035 // CHECK-NEXT:    [[TMP1245:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1244]] release, align 8
13036 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13037 // CHECK-NEXT:    [[TMP1246:%.*]] = load i64, i64* [[LE]], align 8
13038 // CHECK-NEXT:    [[TMP1247:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1246]] release, align 8
13039 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13040 // CHECK-NEXT:    [[TMP1248:%.*]] = load i64, i64* [[LE]], align 8
13041 // CHECK-NEXT:    [[TMP1249:%.*]] = load i64, i64* [[LD]], align 8
13042 // CHECK-NEXT:    [[TMP1250:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1248]], i64 [[TMP1249]] release monotonic, align 8
13043 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13044 // CHECK-NEXT:    [[TMP1251:%.*]] = load i64, i64* [[LE]], align 8
13045 // CHECK-NEXT:    [[TMP1252:%.*]] = load i64, i64* [[LD]], align 8
13046 // CHECK-NEXT:    [[TMP1253:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1251]], i64 [[TMP1252]] release monotonic, align 8
13047 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13048 // CHECK-NEXT:    [[TMP1254:%.*]] = load i64, i64* [[LE]], align 8
13049 // CHECK-NEXT:    [[TMP1255:%.*]] = load i64, i64* [[LD]], align 8
13050 // CHECK-NEXT:    [[TMP1256:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1254]], i64 [[TMP1255]] release monotonic, align 8
13051 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13052 // CHECK-NEXT:    [[TMP1257:%.*]] = load i64, i64* [[LE]], align 8
13053 // CHECK-NEXT:    [[TMP1258:%.*]] = load i64, i64* [[LD]], align 8
13054 // CHECK-NEXT:    [[TMP1259:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1257]], i64 [[TMP1258]] release monotonic, align 8
13055 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13056 // CHECK-NEXT:    [[TMP1260:%.*]] = load i64, i64* [[ULE]], align 8
13057 // CHECK-NEXT:    [[TMP1261:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1260]] release, align 8
13058 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13059 // CHECK-NEXT:    [[TMP1262:%.*]] = load i64, i64* [[ULE]], align 8
13060 // CHECK-NEXT:    [[TMP1263:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1262]] release, align 8
13061 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13062 // CHECK-NEXT:    [[TMP1264:%.*]] = load i64, i64* [[ULE]], align 8
13063 // CHECK-NEXT:    [[TMP1265:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1264]] release, align 8
13064 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13065 // CHECK-NEXT:    [[TMP1266:%.*]] = load i64, i64* [[ULE]], align 8
13066 // CHECK-NEXT:    [[TMP1267:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1266]] release, align 8
13067 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13068 // CHECK-NEXT:    [[TMP1268:%.*]] = load i64, i64* [[ULE]], align 8
13069 // CHECK-NEXT:    [[TMP1269:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1268]] release, align 8
13070 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13071 // CHECK-NEXT:    [[TMP1270:%.*]] = load i64, i64* [[ULE]], align 8
13072 // CHECK-NEXT:    [[TMP1271:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1270]] release, align 8
13073 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13074 // CHECK-NEXT:    [[TMP1272:%.*]] = load i64, i64* [[ULE]], align 8
13075 // CHECK-NEXT:    [[TMP1273:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1272]] release, align 8
13076 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13077 // CHECK-NEXT:    [[TMP1274:%.*]] = load i64, i64* [[ULE]], align 8
13078 // CHECK-NEXT:    [[TMP1275:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1274]] release, align 8
13079 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13080 // CHECK-NEXT:    [[TMP1276:%.*]] = load i64, i64* [[ULE]], align 8
13081 // CHECK-NEXT:    [[TMP1277:%.*]] = load i64, i64* [[ULD]], align 8
13082 // CHECK-NEXT:    [[TMP1278:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1276]], i64 [[TMP1277]] release monotonic, align 8
13083 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13084 // CHECK-NEXT:    [[TMP1279:%.*]] = load i64, i64* [[ULE]], align 8
13085 // CHECK-NEXT:    [[TMP1280:%.*]] = load i64, i64* [[ULD]], align 8
13086 // CHECK-NEXT:    [[TMP1281:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1279]], i64 [[TMP1280]] release monotonic, align 8
13087 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13088 // CHECK-NEXT:    [[TMP1282:%.*]] = load i64, i64* [[ULE]], align 8
13089 // CHECK-NEXT:    [[TMP1283:%.*]] = load i64, i64* [[ULD]], align 8
13090 // CHECK-NEXT:    [[TMP1284:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1282]], i64 [[TMP1283]] release monotonic, align 8
13091 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13092 // CHECK-NEXT:    [[TMP1285:%.*]] = load i64, i64* [[ULE]], align 8
13093 // CHECK-NEXT:    [[TMP1286:%.*]] = load i64, i64* [[ULD]], align 8
13094 // CHECK-NEXT:    [[TMP1287:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1285]], i64 [[TMP1286]] release monotonic, align 8
13095 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13096 // CHECK-NEXT:    [[TMP1288:%.*]] = load i64, i64* [[LE]], align 8
13097 // CHECK-NEXT:    [[TMP1289:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1288]] seq_cst, align 8
13098 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13099 // CHECK-NEXT:    [[TMP1290:%.*]] = load i64, i64* [[LE]], align 8
13100 // CHECK-NEXT:    [[TMP1291:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1290]] seq_cst, align 8
13101 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13102 // CHECK-NEXT:    [[TMP1292:%.*]] = load i64, i64* [[LE]], align 8
13103 // CHECK-NEXT:    [[TMP1293:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1292]] seq_cst, align 8
13104 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13105 // CHECK-NEXT:    [[TMP1294:%.*]] = load i64, i64* [[LE]], align 8
13106 // CHECK-NEXT:    [[TMP1295:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1294]] seq_cst, align 8
13107 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13108 // CHECK-NEXT:    [[TMP1296:%.*]] = load i64, i64* [[LE]], align 8
13109 // CHECK-NEXT:    [[TMP1297:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1296]] seq_cst, align 8
13110 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13111 // CHECK-NEXT:    [[TMP1298:%.*]] = load i64, i64* [[LE]], align 8
13112 // CHECK-NEXT:    [[TMP1299:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1298]] seq_cst, align 8
13113 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13114 // CHECK-NEXT:    [[TMP1300:%.*]] = load i64, i64* [[LE]], align 8
13115 // CHECK-NEXT:    [[TMP1301:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP1300]] seq_cst, align 8
13116 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13117 // CHECK-NEXT:    [[TMP1302:%.*]] = load i64, i64* [[LE]], align 8
13118 // CHECK-NEXT:    [[TMP1303:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP1302]] seq_cst, align 8
13119 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13120 // CHECK-NEXT:    [[TMP1304:%.*]] = load i64, i64* [[LE]], align 8
13121 // CHECK-NEXT:    [[TMP1305:%.*]] = load i64, i64* [[LD]], align 8
13122 // CHECK-NEXT:    [[TMP1306:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1304]], i64 [[TMP1305]] seq_cst seq_cst, align 8
13123 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13124 // CHECK-NEXT:    [[TMP1307:%.*]] = load i64, i64* [[LE]], align 8
13125 // CHECK-NEXT:    [[TMP1308:%.*]] = load i64, i64* [[LD]], align 8
13126 // CHECK-NEXT:    [[TMP1309:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1307]], i64 [[TMP1308]] seq_cst seq_cst, align 8
13127 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13128 // CHECK-NEXT:    [[TMP1310:%.*]] = load i64, i64* [[LE]], align 8
13129 // CHECK-NEXT:    [[TMP1311:%.*]] = load i64, i64* [[LD]], align 8
13130 // CHECK-NEXT:    [[TMP1312:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1310]], i64 [[TMP1311]] seq_cst seq_cst, align 8
13131 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13132 // CHECK-NEXT:    [[TMP1313:%.*]] = load i64, i64* [[LE]], align 8
13133 // CHECK-NEXT:    [[TMP1314:%.*]] = load i64, i64* [[LD]], align 8
13134 // CHECK-NEXT:    [[TMP1315:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP1313]], i64 [[TMP1314]] seq_cst seq_cst, align 8
13135 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13136 // CHECK-NEXT:    [[TMP1316:%.*]] = load i64, i64* [[ULE]], align 8
13137 // CHECK-NEXT:    [[TMP1317:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1316]] seq_cst, align 8
13138 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13139 // CHECK-NEXT:    [[TMP1318:%.*]] = load i64, i64* [[ULE]], align 8
13140 // CHECK-NEXT:    [[TMP1319:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1318]] seq_cst, align 8
13141 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13142 // CHECK-NEXT:    [[TMP1320:%.*]] = load i64, i64* [[ULE]], align 8
13143 // CHECK-NEXT:    [[TMP1321:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1320]] seq_cst, align 8
13144 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13145 // CHECK-NEXT:    [[TMP1322:%.*]] = load i64, i64* [[ULE]], align 8
13146 // CHECK-NEXT:    [[TMP1323:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1322]] seq_cst, align 8
13147 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13148 // CHECK-NEXT:    [[TMP1324:%.*]] = load i64, i64* [[ULE]], align 8
13149 // CHECK-NEXT:    [[TMP1325:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1324]] seq_cst, align 8
13150 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13151 // CHECK-NEXT:    [[TMP1326:%.*]] = load i64, i64* [[ULE]], align 8
13152 // CHECK-NEXT:    [[TMP1327:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1326]] seq_cst, align 8
13153 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13154 // CHECK-NEXT:    [[TMP1328:%.*]] = load i64, i64* [[ULE]], align 8
13155 // CHECK-NEXT:    [[TMP1329:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP1328]] seq_cst, align 8
13156 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13157 // CHECK-NEXT:    [[TMP1330:%.*]] = load i64, i64* [[ULE]], align 8
13158 // CHECK-NEXT:    [[TMP1331:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP1330]] seq_cst, align 8
13159 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13160 // CHECK-NEXT:    [[TMP1332:%.*]] = load i64, i64* [[ULE]], align 8
13161 // CHECK-NEXT:    [[TMP1333:%.*]] = load i64, i64* [[ULD]], align 8
13162 // CHECK-NEXT:    [[TMP1334:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1332]], i64 [[TMP1333]] seq_cst seq_cst, align 8
13163 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13164 // CHECK-NEXT:    [[TMP1335:%.*]] = load i64, i64* [[ULE]], align 8
13165 // CHECK-NEXT:    [[TMP1336:%.*]] = load i64, i64* [[ULD]], align 8
13166 // CHECK-NEXT:    [[TMP1337:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1335]], i64 [[TMP1336]] seq_cst seq_cst, align 8
13167 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13168 // CHECK-NEXT:    [[TMP1338:%.*]] = load i64, i64* [[ULE]], align 8
13169 // CHECK-NEXT:    [[TMP1339:%.*]] = load i64, i64* [[ULD]], align 8
13170 // CHECK-NEXT:    [[TMP1340:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1338]], i64 [[TMP1339]] seq_cst seq_cst, align 8
13171 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13172 // CHECK-NEXT:    [[TMP1341:%.*]] = load i64, i64* [[ULE]], align 8
13173 // CHECK-NEXT:    [[TMP1342:%.*]] = load i64, i64* [[ULD]], align 8
13174 // CHECK-NEXT:    [[TMP1343:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP1341]], i64 [[TMP1342]] seq_cst seq_cst, align 8
13175 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13176 // CHECK-NEXT:    [[TMP1344:%.*]] = load i64, i64* [[LLE]], align 8
13177 // CHECK-NEXT:    [[TMP1345:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1344]] monotonic, align 8
13178 // CHECK-NEXT:    [[TMP1346:%.*]] = load i64, i64* [[LLE]], align 8
13179 // CHECK-NEXT:    [[TMP1347:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1346]] monotonic, align 8
13180 // CHECK-NEXT:    [[TMP1348:%.*]] = load i64, i64* [[LLE]], align 8
13181 // CHECK-NEXT:    [[TMP1349:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1348]] monotonic, align 8
13182 // CHECK-NEXT:    [[TMP1350:%.*]] = load i64, i64* [[LLE]], align 8
13183 // CHECK-NEXT:    [[TMP1351:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1350]] monotonic, align 8
13184 // CHECK-NEXT:    [[TMP1352:%.*]] = load i64, i64* [[LLE]], align 8
13185 // CHECK-NEXT:    [[TMP1353:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1352]] monotonic, align 8
13186 // CHECK-NEXT:    [[TMP1354:%.*]] = load i64, i64* [[LLE]], align 8
13187 // CHECK-NEXT:    [[TMP1355:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1354]] monotonic, align 8
13188 // CHECK-NEXT:    [[TMP1356:%.*]] = load i64, i64* [[LLE]], align 8
13189 // CHECK-NEXT:    [[TMP1357:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1356]] monotonic, align 8
13190 // CHECK-NEXT:    [[TMP1358:%.*]] = load i64, i64* [[LLE]], align 8
13191 // CHECK-NEXT:    [[TMP1359:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1358]] monotonic, align 8
13192 // CHECK-NEXT:    [[TMP1360:%.*]] = load i64, i64* [[LLE]], align 8
13193 // CHECK-NEXT:    [[TMP1361:%.*]] = load i64, i64* [[LLD]], align 8
13194 // CHECK-NEXT:    [[TMP1362:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1360]], i64 [[TMP1361]] monotonic monotonic, align 8
13195 // CHECK-NEXT:    [[TMP1363:%.*]] = load i64, i64* [[LLE]], align 8
13196 // CHECK-NEXT:    [[TMP1364:%.*]] = load i64, i64* [[LLD]], align 8
13197 // CHECK-NEXT:    [[TMP1365:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1363]], i64 [[TMP1364]] monotonic monotonic, align 8
13198 // CHECK-NEXT:    [[TMP1366:%.*]] = load i64, i64* [[LLE]], align 8
13199 // CHECK-NEXT:    [[TMP1367:%.*]] = load i64, i64* [[LLD]], align 8
13200 // CHECK-NEXT:    [[TMP1368:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1366]], i64 [[TMP1367]] monotonic monotonic, align 8
13201 // CHECK-NEXT:    [[TMP1369:%.*]] = load i64, i64* [[LLE]], align 8
13202 // CHECK-NEXT:    [[TMP1370:%.*]] = load i64, i64* [[LLD]], align 8
13203 // CHECK-NEXT:    [[TMP1371:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1369]], i64 [[TMP1370]] monotonic monotonic, align 8
13204 // CHECK-NEXT:    [[TMP1372:%.*]] = load i64, i64* [[ULLE]], align 8
13205 // CHECK-NEXT:    [[TMP1373:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1372]] monotonic, align 8
13206 // CHECK-NEXT:    [[TMP1374:%.*]] = load i64, i64* [[ULLE]], align 8
13207 // CHECK-NEXT:    [[TMP1375:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1374]] monotonic, align 8
13208 // CHECK-NEXT:    [[TMP1376:%.*]] = load i64, i64* [[ULLE]], align 8
13209 // CHECK-NEXT:    [[TMP1377:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1376]] monotonic, align 8
13210 // CHECK-NEXT:    [[TMP1378:%.*]] = load i64, i64* [[ULLE]], align 8
13211 // CHECK-NEXT:    [[TMP1379:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1378]] monotonic, align 8
13212 // CHECK-NEXT:    [[TMP1380:%.*]] = load i64, i64* [[ULLE]], align 8
13213 // CHECK-NEXT:    [[TMP1381:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1380]] monotonic, align 8
13214 // CHECK-NEXT:    [[TMP1382:%.*]] = load i64, i64* [[ULLE]], align 8
13215 // CHECK-NEXT:    [[TMP1383:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1382]] monotonic, align 8
13216 // CHECK-NEXT:    [[TMP1384:%.*]] = load i64, i64* [[ULLE]], align 8
13217 // CHECK-NEXT:    [[TMP1385:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1384]] monotonic, align 8
13218 // CHECK-NEXT:    [[TMP1386:%.*]] = load i64, i64* [[ULLE]], align 8
13219 // CHECK-NEXT:    [[TMP1387:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1386]] monotonic, align 8
13220 // CHECK-NEXT:    [[TMP1388:%.*]] = load i64, i64* [[ULLE]], align 8
13221 // CHECK-NEXT:    [[TMP1389:%.*]] = load i64, i64* [[ULLD]], align 8
13222 // CHECK-NEXT:    [[TMP1390:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1388]], i64 [[TMP1389]] monotonic monotonic, align 8
13223 // CHECK-NEXT:    [[TMP1391:%.*]] = load i64, i64* [[ULLE]], align 8
13224 // CHECK-NEXT:    [[TMP1392:%.*]] = load i64, i64* [[ULLD]], align 8
13225 // CHECK-NEXT:    [[TMP1393:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1391]], i64 [[TMP1392]] monotonic monotonic, align 8
13226 // CHECK-NEXT:    [[TMP1394:%.*]] = load i64, i64* [[ULLE]], align 8
13227 // CHECK-NEXT:    [[TMP1395:%.*]] = load i64, i64* [[ULLD]], align 8
13228 // CHECK-NEXT:    [[TMP1396:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1394]], i64 [[TMP1395]] monotonic monotonic, align 8
13229 // CHECK-NEXT:    [[TMP1397:%.*]] = load i64, i64* [[ULLE]], align 8
13230 // CHECK-NEXT:    [[TMP1398:%.*]] = load i64, i64* [[ULLD]], align 8
13231 // CHECK-NEXT:    [[TMP1399:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1397]], i64 [[TMP1398]] monotonic monotonic, align 8
13232 // CHECK-NEXT:    [[TMP1400:%.*]] = load i64, i64* [[LLE]], align 8
13233 // CHECK-NEXT:    [[TMP1401:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1400]] acq_rel, align 8
13234 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13235 // CHECK-NEXT:    [[TMP1402:%.*]] = load i64, i64* [[LLE]], align 8
13236 // CHECK-NEXT:    [[TMP1403:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1402]] acq_rel, align 8
13237 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13238 // CHECK-NEXT:    [[TMP1404:%.*]] = load i64, i64* [[LLE]], align 8
13239 // CHECK-NEXT:    [[TMP1405:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1404]] acq_rel, align 8
13240 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13241 // CHECK-NEXT:    [[TMP1406:%.*]] = load i64, i64* [[LLE]], align 8
13242 // CHECK-NEXT:    [[TMP1407:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1406]] acq_rel, align 8
13243 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13244 // CHECK-NEXT:    [[TMP1408:%.*]] = load i64, i64* [[LLE]], align 8
13245 // CHECK-NEXT:    [[TMP1409:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1408]] acq_rel, align 8
13246 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13247 // CHECK-NEXT:    [[TMP1410:%.*]] = load i64, i64* [[LLE]], align 8
13248 // CHECK-NEXT:    [[TMP1411:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1410]] acq_rel, align 8
13249 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13250 // CHECK-NEXT:    [[TMP1412:%.*]] = load i64, i64* [[LLE]], align 8
13251 // CHECK-NEXT:    [[TMP1413:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1412]] acq_rel, align 8
13252 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13253 // CHECK-NEXT:    [[TMP1414:%.*]] = load i64, i64* [[LLE]], align 8
13254 // CHECK-NEXT:    [[TMP1415:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1414]] acq_rel, align 8
13255 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13256 // CHECK-NEXT:    [[TMP1416:%.*]] = load i64, i64* [[LLE]], align 8
13257 // CHECK-NEXT:    [[TMP1417:%.*]] = load i64, i64* [[LLD]], align 8
13258 // CHECK-NEXT:    [[TMP1418:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1416]], i64 [[TMP1417]] acq_rel acquire, align 8
13259 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13260 // CHECK-NEXT:    [[TMP1419:%.*]] = load i64, i64* [[LLE]], align 8
13261 // CHECK-NEXT:    [[TMP1420:%.*]] = load i64, i64* [[LLD]], align 8
13262 // CHECK-NEXT:    [[TMP1421:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1419]], i64 [[TMP1420]] acq_rel acquire, align 8
13263 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13264 // CHECK-NEXT:    [[TMP1422:%.*]] = load i64, i64* [[LLE]], align 8
13265 // CHECK-NEXT:    [[TMP1423:%.*]] = load i64, i64* [[LLD]], align 8
13266 // CHECK-NEXT:    [[TMP1424:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1422]], i64 [[TMP1423]] acq_rel acquire, align 8
13267 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13268 // CHECK-NEXT:    [[TMP1425:%.*]] = load i64, i64* [[LLE]], align 8
13269 // CHECK-NEXT:    [[TMP1426:%.*]] = load i64, i64* [[LLD]], align 8
13270 // CHECK-NEXT:    [[TMP1427:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1425]], i64 [[TMP1426]] acq_rel acquire, align 8
13271 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13272 // CHECK-NEXT:    [[TMP1428:%.*]] = load i64, i64* [[ULLE]], align 8
13273 // CHECK-NEXT:    [[TMP1429:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1428]] acq_rel, align 8
13274 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13275 // CHECK-NEXT:    [[TMP1430:%.*]] = load i64, i64* [[ULLE]], align 8
13276 // CHECK-NEXT:    [[TMP1431:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1430]] acq_rel, align 8
13277 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13278 // CHECK-NEXT:    [[TMP1432:%.*]] = load i64, i64* [[ULLE]], align 8
13279 // CHECK-NEXT:    [[TMP1433:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1432]] acq_rel, align 8
13280 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13281 // CHECK-NEXT:    [[TMP1434:%.*]] = load i64, i64* [[ULLE]], align 8
13282 // CHECK-NEXT:    [[TMP1435:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1434]] acq_rel, align 8
13283 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13284 // CHECK-NEXT:    [[TMP1436:%.*]] = load i64, i64* [[ULLE]], align 8
13285 // CHECK-NEXT:    [[TMP1437:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1436]] acq_rel, align 8
13286 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13287 // CHECK-NEXT:    [[TMP1438:%.*]] = load i64, i64* [[ULLE]], align 8
13288 // CHECK-NEXT:    [[TMP1439:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1438]] acq_rel, align 8
13289 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13290 // CHECK-NEXT:    [[TMP1440:%.*]] = load i64, i64* [[ULLE]], align 8
13291 // CHECK-NEXT:    [[TMP1441:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1440]] acq_rel, align 8
13292 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13293 // CHECK-NEXT:    [[TMP1442:%.*]] = load i64, i64* [[ULLE]], align 8
13294 // CHECK-NEXT:    [[TMP1443:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1442]] acq_rel, align 8
13295 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13296 // CHECK-NEXT:    [[TMP1444:%.*]] = load i64, i64* [[ULLE]], align 8
13297 // CHECK-NEXT:    [[TMP1445:%.*]] = load i64, i64* [[ULLD]], align 8
13298 // CHECK-NEXT:    [[TMP1446:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1444]], i64 [[TMP1445]] acq_rel acquire, align 8
13299 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13300 // CHECK-NEXT:    [[TMP1447:%.*]] = load i64, i64* [[ULLE]], align 8
13301 // CHECK-NEXT:    [[TMP1448:%.*]] = load i64, i64* [[ULLD]], align 8
13302 // CHECK-NEXT:    [[TMP1449:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1447]], i64 [[TMP1448]] acq_rel acquire, align 8
13303 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13304 // CHECK-NEXT:    [[TMP1450:%.*]] = load i64, i64* [[ULLE]], align 8
13305 // CHECK-NEXT:    [[TMP1451:%.*]] = load i64, i64* [[ULLD]], align 8
13306 // CHECK-NEXT:    [[TMP1452:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1450]], i64 [[TMP1451]] acq_rel acquire, align 8
13307 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13308 // CHECK-NEXT:    [[TMP1453:%.*]] = load i64, i64* [[ULLE]], align 8
13309 // CHECK-NEXT:    [[TMP1454:%.*]] = load i64, i64* [[ULLD]], align 8
13310 // CHECK-NEXT:    [[TMP1455:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1453]], i64 [[TMP1454]] acq_rel acquire, align 8
13311 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13312 // CHECK-NEXT:    [[TMP1456:%.*]] = load i64, i64* [[LLE]], align 8
13313 // CHECK-NEXT:    [[TMP1457:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1456]] acquire, align 8
13314 // CHECK-NEXT:    [[TMP1458:%.*]] = load i64, i64* [[LLE]], align 8
13315 // CHECK-NEXT:    [[TMP1459:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1458]] acquire, align 8
13316 // CHECK-NEXT:    [[TMP1460:%.*]] = load i64, i64* [[LLE]], align 8
13317 // CHECK-NEXT:    [[TMP1461:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1460]] acquire, align 8
13318 // CHECK-NEXT:    [[TMP1462:%.*]] = load i64, i64* [[LLE]], align 8
13319 // CHECK-NEXT:    [[TMP1463:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1462]] acquire, align 8
13320 // CHECK-NEXT:    [[TMP1464:%.*]] = load i64, i64* [[LLE]], align 8
13321 // CHECK-NEXT:    [[TMP1465:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1464]] acquire, align 8
13322 // CHECK-NEXT:    [[TMP1466:%.*]] = load i64, i64* [[LLE]], align 8
13323 // CHECK-NEXT:    [[TMP1467:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1466]] acquire, align 8
13324 // CHECK-NEXT:    [[TMP1468:%.*]] = load i64, i64* [[LLE]], align 8
13325 // CHECK-NEXT:    [[TMP1469:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1468]] acquire, align 8
13326 // CHECK-NEXT:    [[TMP1470:%.*]] = load i64, i64* [[LLE]], align 8
13327 // CHECK-NEXT:    [[TMP1471:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1470]] acquire, align 8
13328 // CHECK-NEXT:    [[TMP1472:%.*]] = load i64, i64* [[LLE]], align 8
13329 // CHECK-NEXT:    [[TMP1473:%.*]] = load i64, i64* [[LLD]], align 8
13330 // CHECK-NEXT:    [[TMP1474:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1472]], i64 [[TMP1473]] acquire acquire, align 8
13331 // CHECK-NEXT:    [[TMP1475:%.*]] = load i64, i64* [[LLE]], align 8
13332 // CHECK-NEXT:    [[TMP1476:%.*]] = load i64, i64* [[LLD]], align 8
13333 // CHECK-NEXT:    [[TMP1477:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1475]], i64 [[TMP1476]] acquire acquire, align 8
13334 // CHECK-NEXT:    [[TMP1478:%.*]] = load i64, i64* [[LLE]], align 8
13335 // CHECK-NEXT:    [[TMP1479:%.*]] = load i64, i64* [[LLD]], align 8
13336 // CHECK-NEXT:    [[TMP1480:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1478]], i64 [[TMP1479]] acquire acquire, align 8
13337 // CHECK-NEXT:    [[TMP1481:%.*]] = load i64, i64* [[LLE]], align 8
13338 // CHECK-NEXT:    [[TMP1482:%.*]] = load i64, i64* [[LLD]], align 8
13339 // CHECK-NEXT:    [[TMP1483:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1481]], i64 [[TMP1482]] acquire acquire, align 8
13340 // CHECK-NEXT:    [[TMP1484:%.*]] = load i64, i64* [[ULLE]], align 8
13341 // CHECK-NEXT:    [[TMP1485:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1484]] acquire, align 8
13342 // CHECK-NEXT:    [[TMP1486:%.*]] = load i64, i64* [[ULLE]], align 8
13343 // CHECK-NEXT:    [[TMP1487:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1486]] acquire, align 8
13344 // CHECK-NEXT:    [[TMP1488:%.*]] = load i64, i64* [[ULLE]], align 8
13345 // CHECK-NEXT:    [[TMP1489:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1488]] acquire, align 8
13346 // CHECK-NEXT:    [[TMP1490:%.*]] = load i64, i64* [[ULLE]], align 8
13347 // CHECK-NEXT:    [[TMP1491:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1490]] acquire, align 8
13348 // CHECK-NEXT:    [[TMP1492:%.*]] = load i64, i64* [[ULLE]], align 8
13349 // CHECK-NEXT:    [[TMP1493:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1492]] acquire, align 8
13350 // CHECK-NEXT:    [[TMP1494:%.*]] = load i64, i64* [[ULLE]], align 8
13351 // CHECK-NEXT:    [[TMP1495:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1494]] acquire, align 8
13352 // CHECK-NEXT:    [[TMP1496:%.*]] = load i64, i64* [[ULLE]], align 8
13353 // CHECK-NEXT:    [[TMP1497:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1496]] acquire, align 8
13354 // CHECK-NEXT:    [[TMP1498:%.*]] = load i64, i64* [[ULLE]], align 8
13355 // CHECK-NEXT:    [[TMP1499:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1498]] acquire, align 8
13356 // CHECK-NEXT:    [[TMP1500:%.*]] = load i64, i64* [[ULLE]], align 8
13357 // CHECK-NEXT:    [[TMP1501:%.*]] = load i64, i64* [[ULLD]], align 8
13358 // CHECK-NEXT:    [[TMP1502:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1500]], i64 [[TMP1501]] acquire acquire, align 8
13359 // CHECK-NEXT:    [[TMP1503:%.*]] = load i64, i64* [[ULLE]], align 8
13360 // CHECK-NEXT:    [[TMP1504:%.*]] = load i64, i64* [[ULLD]], align 8
13361 // CHECK-NEXT:    [[TMP1505:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1503]], i64 [[TMP1504]] acquire acquire, align 8
13362 // CHECK-NEXT:    [[TMP1506:%.*]] = load i64, i64* [[ULLE]], align 8
13363 // CHECK-NEXT:    [[TMP1507:%.*]] = load i64, i64* [[ULLD]], align 8
13364 // CHECK-NEXT:    [[TMP1508:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1506]], i64 [[TMP1507]] acquire acquire, align 8
13365 // CHECK-NEXT:    [[TMP1509:%.*]] = load i64, i64* [[ULLE]], align 8
13366 // CHECK-NEXT:    [[TMP1510:%.*]] = load i64, i64* [[ULLD]], align 8
13367 // CHECK-NEXT:    [[TMP1511:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1509]], i64 [[TMP1510]] acquire acquire, align 8
13368 // CHECK-NEXT:    [[TMP1512:%.*]] = load i64, i64* [[LLE]], align 8
13369 // CHECK-NEXT:    [[TMP1513:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1512]] monotonic, align 8
13370 // CHECK-NEXT:    [[TMP1514:%.*]] = load i64, i64* [[LLE]], align 8
13371 // CHECK-NEXT:    [[TMP1515:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1514]] monotonic, align 8
13372 // CHECK-NEXT:    [[TMP1516:%.*]] = load i64, i64* [[LLE]], align 8
13373 // CHECK-NEXT:    [[TMP1517:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1516]] monotonic, align 8
13374 // CHECK-NEXT:    [[TMP1518:%.*]] = load i64, i64* [[LLE]], align 8
13375 // CHECK-NEXT:    [[TMP1519:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1518]] monotonic, align 8
13376 // CHECK-NEXT:    [[TMP1520:%.*]] = load i64, i64* [[LLE]], align 8
13377 // CHECK-NEXT:    [[TMP1521:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1520]] monotonic, align 8
13378 // CHECK-NEXT:    [[TMP1522:%.*]] = load i64, i64* [[LLE]], align 8
13379 // CHECK-NEXT:    [[TMP1523:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1522]] monotonic, align 8
13380 // CHECK-NEXT:    [[TMP1524:%.*]] = load i64, i64* [[LLE]], align 8
13381 // CHECK-NEXT:    [[TMP1525:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1524]] monotonic, align 8
13382 // CHECK-NEXT:    [[TMP1526:%.*]] = load i64, i64* [[LLE]], align 8
13383 // CHECK-NEXT:    [[TMP1527:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1526]] monotonic, align 8
13384 // CHECK-NEXT:    [[TMP1528:%.*]] = load i64, i64* [[LLE]], align 8
13385 // CHECK-NEXT:    [[TMP1529:%.*]] = load i64, i64* [[LLD]], align 8
13386 // CHECK-NEXT:    [[TMP1530:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1528]], i64 [[TMP1529]] monotonic monotonic, align 8
13387 // CHECK-NEXT:    [[TMP1531:%.*]] = load i64, i64* [[LLE]], align 8
13388 // CHECK-NEXT:    [[TMP1532:%.*]] = load i64, i64* [[LLD]], align 8
13389 // CHECK-NEXT:    [[TMP1533:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1531]], i64 [[TMP1532]] monotonic monotonic, align 8
13390 // CHECK-NEXT:    [[TMP1534:%.*]] = load i64, i64* [[LLE]], align 8
13391 // CHECK-NEXT:    [[TMP1535:%.*]] = load i64, i64* [[LLD]], align 8
13392 // CHECK-NEXT:    [[TMP1536:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1534]], i64 [[TMP1535]] monotonic monotonic, align 8
13393 // CHECK-NEXT:    [[TMP1537:%.*]] = load i64, i64* [[LLE]], align 8
13394 // CHECK-NEXT:    [[TMP1538:%.*]] = load i64, i64* [[LLD]], align 8
13395 // CHECK-NEXT:    [[TMP1539:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1537]], i64 [[TMP1538]] monotonic monotonic, align 8
13396 // CHECK-NEXT:    [[TMP1540:%.*]] = load i64, i64* [[ULLE]], align 8
13397 // CHECK-NEXT:    [[TMP1541:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1540]] monotonic, align 8
13398 // CHECK-NEXT:    [[TMP1542:%.*]] = load i64, i64* [[ULLE]], align 8
13399 // CHECK-NEXT:    [[TMP1543:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1542]] monotonic, align 8
13400 // CHECK-NEXT:    [[TMP1544:%.*]] = load i64, i64* [[ULLE]], align 8
13401 // CHECK-NEXT:    [[TMP1545:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1544]] monotonic, align 8
13402 // CHECK-NEXT:    [[TMP1546:%.*]] = load i64, i64* [[ULLE]], align 8
13403 // CHECK-NEXT:    [[TMP1547:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1546]] monotonic, align 8
13404 // CHECK-NEXT:    [[TMP1548:%.*]] = load i64, i64* [[ULLE]], align 8
13405 // CHECK-NEXT:    [[TMP1549:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1548]] monotonic, align 8
13406 // CHECK-NEXT:    [[TMP1550:%.*]] = load i64, i64* [[ULLE]], align 8
13407 // CHECK-NEXT:    [[TMP1551:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1550]] monotonic, align 8
13408 // CHECK-NEXT:    [[TMP1552:%.*]] = load i64, i64* [[ULLE]], align 8
13409 // CHECK-NEXT:    [[TMP1553:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1552]] monotonic, align 8
13410 // CHECK-NEXT:    [[TMP1554:%.*]] = load i64, i64* [[ULLE]], align 8
13411 // CHECK-NEXT:    [[TMP1555:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1554]] monotonic, align 8
13412 // CHECK-NEXT:    [[TMP1556:%.*]] = load i64, i64* [[ULLE]], align 8
13413 // CHECK-NEXT:    [[TMP1557:%.*]] = load i64, i64* [[ULLD]], align 8
13414 // CHECK-NEXT:    [[TMP1558:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1556]], i64 [[TMP1557]] monotonic monotonic, align 8
13415 // CHECK-NEXT:    [[TMP1559:%.*]] = load i64, i64* [[ULLE]], align 8
13416 // CHECK-NEXT:    [[TMP1560:%.*]] = load i64, i64* [[ULLD]], align 8
13417 // CHECK-NEXT:    [[TMP1561:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1559]], i64 [[TMP1560]] monotonic monotonic, align 8
13418 // CHECK-NEXT:    [[TMP1562:%.*]] = load i64, i64* [[ULLE]], align 8
13419 // CHECK-NEXT:    [[TMP1563:%.*]] = load i64, i64* [[ULLD]], align 8
13420 // CHECK-NEXT:    [[TMP1564:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1562]], i64 [[TMP1563]] monotonic monotonic, align 8
13421 // CHECK-NEXT:    [[TMP1565:%.*]] = load i64, i64* [[ULLE]], align 8
13422 // CHECK-NEXT:    [[TMP1566:%.*]] = load i64, i64* [[ULLD]], align 8
13423 // CHECK-NEXT:    [[TMP1567:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1565]], i64 [[TMP1566]] monotonic monotonic, align 8
13424 // CHECK-NEXT:    [[TMP1568:%.*]] = load i64, i64* [[LLE]], align 8
13425 // CHECK-NEXT:    [[TMP1569:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1568]] release, align 8
13426 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13427 // CHECK-NEXT:    [[TMP1570:%.*]] = load i64, i64* [[LLE]], align 8
13428 // CHECK-NEXT:    [[TMP1571:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1570]] release, align 8
13429 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13430 // CHECK-NEXT:    [[TMP1572:%.*]] = load i64, i64* [[LLE]], align 8
13431 // CHECK-NEXT:    [[TMP1573:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1572]] release, align 8
13432 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13433 // CHECK-NEXT:    [[TMP1574:%.*]] = load i64, i64* [[LLE]], align 8
13434 // CHECK-NEXT:    [[TMP1575:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1574]] release, align 8
13435 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13436 // CHECK-NEXT:    [[TMP1576:%.*]] = load i64, i64* [[LLE]], align 8
13437 // CHECK-NEXT:    [[TMP1577:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1576]] release, align 8
13438 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13439 // CHECK-NEXT:    [[TMP1578:%.*]] = load i64, i64* [[LLE]], align 8
13440 // CHECK-NEXT:    [[TMP1579:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1578]] release, align 8
13441 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13442 // CHECK-NEXT:    [[TMP1580:%.*]] = load i64, i64* [[LLE]], align 8
13443 // CHECK-NEXT:    [[TMP1581:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1580]] release, align 8
13444 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13445 // CHECK-NEXT:    [[TMP1582:%.*]] = load i64, i64* [[LLE]], align 8
13446 // CHECK-NEXT:    [[TMP1583:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1582]] release, align 8
13447 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13448 // CHECK-NEXT:    [[TMP1584:%.*]] = load i64, i64* [[LLE]], align 8
13449 // CHECK-NEXT:    [[TMP1585:%.*]] = load i64, i64* [[LLD]], align 8
13450 // CHECK-NEXT:    [[TMP1586:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1584]], i64 [[TMP1585]] release monotonic, align 8
13451 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13452 // CHECK-NEXT:    [[TMP1587:%.*]] = load i64, i64* [[LLE]], align 8
13453 // CHECK-NEXT:    [[TMP1588:%.*]] = load i64, i64* [[LLD]], align 8
13454 // CHECK-NEXT:    [[TMP1589:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1587]], i64 [[TMP1588]] release monotonic, align 8
13455 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13456 // CHECK-NEXT:    [[TMP1590:%.*]] = load i64, i64* [[LLE]], align 8
13457 // CHECK-NEXT:    [[TMP1591:%.*]] = load i64, i64* [[LLD]], align 8
13458 // CHECK-NEXT:    [[TMP1592:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1590]], i64 [[TMP1591]] release monotonic, align 8
13459 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13460 // CHECK-NEXT:    [[TMP1593:%.*]] = load i64, i64* [[LLE]], align 8
13461 // CHECK-NEXT:    [[TMP1594:%.*]] = load i64, i64* [[LLD]], align 8
13462 // CHECK-NEXT:    [[TMP1595:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1593]], i64 [[TMP1594]] release monotonic, align 8
13463 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13464 // CHECK-NEXT:    [[TMP1596:%.*]] = load i64, i64* [[ULLE]], align 8
13465 // CHECK-NEXT:    [[TMP1597:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1596]] release, align 8
13466 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13467 // CHECK-NEXT:    [[TMP1598:%.*]] = load i64, i64* [[ULLE]], align 8
13468 // CHECK-NEXT:    [[TMP1599:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1598]] release, align 8
13469 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13470 // CHECK-NEXT:    [[TMP1600:%.*]] = load i64, i64* [[ULLE]], align 8
13471 // CHECK-NEXT:    [[TMP1601:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1600]] release, align 8
13472 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13473 // CHECK-NEXT:    [[TMP1602:%.*]] = load i64, i64* [[ULLE]], align 8
13474 // CHECK-NEXT:    [[TMP1603:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1602]] release, align 8
13475 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13476 // CHECK-NEXT:    [[TMP1604:%.*]] = load i64, i64* [[ULLE]], align 8
13477 // CHECK-NEXT:    [[TMP1605:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1604]] release, align 8
13478 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13479 // CHECK-NEXT:    [[TMP1606:%.*]] = load i64, i64* [[ULLE]], align 8
13480 // CHECK-NEXT:    [[TMP1607:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1606]] release, align 8
13481 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13482 // CHECK-NEXT:    [[TMP1608:%.*]] = load i64, i64* [[ULLE]], align 8
13483 // CHECK-NEXT:    [[TMP1609:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1608]] release, align 8
13484 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13485 // CHECK-NEXT:    [[TMP1610:%.*]] = load i64, i64* [[ULLE]], align 8
13486 // CHECK-NEXT:    [[TMP1611:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1610]] release, align 8
13487 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13488 // CHECK-NEXT:    [[TMP1612:%.*]] = load i64, i64* [[ULLE]], align 8
13489 // CHECK-NEXT:    [[TMP1613:%.*]] = load i64, i64* [[ULLD]], align 8
13490 // CHECK-NEXT:    [[TMP1614:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1612]], i64 [[TMP1613]] release monotonic, align 8
13491 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13492 // CHECK-NEXT:    [[TMP1615:%.*]] = load i64, i64* [[ULLE]], align 8
13493 // CHECK-NEXT:    [[TMP1616:%.*]] = load i64, i64* [[ULLD]], align 8
13494 // CHECK-NEXT:    [[TMP1617:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1615]], i64 [[TMP1616]] release monotonic, align 8
13495 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13496 // CHECK-NEXT:    [[TMP1618:%.*]] = load i64, i64* [[ULLE]], align 8
13497 // CHECK-NEXT:    [[TMP1619:%.*]] = load i64, i64* [[ULLD]], align 8
13498 // CHECK-NEXT:    [[TMP1620:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1618]], i64 [[TMP1619]] release monotonic, align 8
13499 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13500 // CHECK-NEXT:    [[TMP1621:%.*]] = load i64, i64* [[ULLE]], align 8
13501 // CHECK-NEXT:    [[TMP1622:%.*]] = load i64, i64* [[ULLD]], align 8
13502 // CHECK-NEXT:    [[TMP1623:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1621]], i64 [[TMP1622]] release monotonic, align 8
13503 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13504 // CHECK-NEXT:    [[TMP1624:%.*]] = load i64, i64* [[LLE]], align 8
13505 // CHECK-NEXT:    [[TMP1625:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1624]] seq_cst, align 8
13506 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13507 // CHECK-NEXT:    [[TMP1626:%.*]] = load i64, i64* [[LLE]], align 8
13508 // CHECK-NEXT:    [[TMP1627:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1626]] seq_cst, align 8
13509 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13510 // CHECK-NEXT:    [[TMP1628:%.*]] = load i64, i64* [[LLE]], align 8
13511 // CHECK-NEXT:    [[TMP1629:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1628]] seq_cst, align 8
13512 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13513 // CHECK-NEXT:    [[TMP1630:%.*]] = load i64, i64* [[LLE]], align 8
13514 // CHECK-NEXT:    [[TMP1631:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1630]] seq_cst, align 8
13515 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13516 // CHECK-NEXT:    [[TMP1632:%.*]] = load i64, i64* [[LLE]], align 8
13517 // CHECK-NEXT:    [[TMP1633:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1632]] seq_cst, align 8
13518 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13519 // CHECK-NEXT:    [[TMP1634:%.*]] = load i64, i64* [[LLE]], align 8
13520 // CHECK-NEXT:    [[TMP1635:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1634]] seq_cst, align 8
13521 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13522 // CHECK-NEXT:    [[TMP1636:%.*]] = load i64, i64* [[LLE]], align 8
13523 // CHECK-NEXT:    [[TMP1637:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP1636]] seq_cst, align 8
13524 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13525 // CHECK-NEXT:    [[TMP1638:%.*]] = load i64, i64* [[LLE]], align 8
13526 // CHECK-NEXT:    [[TMP1639:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP1638]] seq_cst, align 8
13527 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13528 // CHECK-NEXT:    [[TMP1640:%.*]] = load i64, i64* [[LLE]], align 8
13529 // CHECK-NEXT:    [[TMP1641:%.*]] = load i64, i64* [[LLD]], align 8
13530 // CHECK-NEXT:    [[TMP1642:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1640]], i64 [[TMP1641]] seq_cst seq_cst, align 8
13531 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13532 // CHECK-NEXT:    [[TMP1643:%.*]] = load i64, i64* [[LLE]], align 8
13533 // CHECK-NEXT:    [[TMP1644:%.*]] = load i64, i64* [[LLD]], align 8
13534 // CHECK-NEXT:    [[TMP1645:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1643]], i64 [[TMP1644]] seq_cst seq_cst, align 8
13535 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13536 // CHECK-NEXT:    [[TMP1646:%.*]] = load i64, i64* [[LLE]], align 8
13537 // CHECK-NEXT:    [[TMP1647:%.*]] = load i64, i64* [[LLD]], align 8
13538 // CHECK-NEXT:    [[TMP1648:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1646]], i64 [[TMP1647]] seq_cst seq_cst, align 8
13539 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13540 // CHECK-NEXT:    [[TMP1649:%.*]] = load i64, i64* [[LLE]], align 8
13541 // CHECK-NEXT:    [[TMP1650:%.*]] = load i64, i64* [[LLD]], align 8
13542 // CHECK-NEXT:    [[TMP1651:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP1649]], i64 [[TMP1650]] seq_cst seq_cst, align 8
13543 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13544 // CHECK-NEXT:    [[TMP1652:%.*]] = load i64, i64* [[ULLE]], align 8
13545 // CHECK-NEXT:    [[TMP1653:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1652]] seq_cst, align 8
13546 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13547 // CHECK-NEXT:    [[TMP1654:%.*]] = load i64, i64* [[ULLE]], align 8
13548 // CHECK-NEXT:    [[TMP1655:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1654]] seq_cst, align 8
13549 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13550 // CHECK-NEXT:    [[TMP1656:%.*]] = load i64, i64* [[ULLE]], align 8
13551 // CHECK-NEXT:    [[TMP1657:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1656]] seq_cst, align 8
13552 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13553 // CHECK-NEXT:    [[TMP1658:%.*]] = load i64, i64* [[ULLE]], align 8
13554 // CHECK-NEXT:    [[TMP1659:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1658]] seq_cst, align 8
13555 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13556 // CHECK-NEXT:    [[TMP1660:%.*]] = load i64, i64* [[ULLE]], align 8
13557 // CHECK-NEXT:    [[TMP1661:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1660]] seq_cst, align 8
13558 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13559 // CHECK-NEXT:    [[TMP1662:%.*]] = load i64, i64* [[ULLE]], align 8
13560 // CHECK-NEXT:    [[TMP1663:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1662]] seq_cst, align 8
13561 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13562 // CHECK-NEXT:    [[TMP1664:%.*]] = load i64, i64* [[ULLE]], align 8
13563 // CHECK-NEXT:    [[TMP1665:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP1664]] seq_cst, align 8
13564 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13565 // CHECK-NEXT:    [[TMP1666:%.*]] = load i64, i64* [[ULLE]], align 8
13566 // CHECK-NEXT:    [[TMP1667:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP1666]] seq_cst, align 8
13567 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13568 // CHECK-NEXT:    [[TMP1668:%.*]] = load i64, i64* [[ULLE]], align 8
13569 // CHECK-NEXT:    [[TMP1669:%.*]] = load i64, i64* [[ULLD]], align 8
13570 // CHECK-NEXT:    [[TMP1670:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1668]], i64 [[TMP1669]] seq_cst seq_cst, align 8
13571 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13572 // CHECK-NEXT:    [[TMP1671:%.*]] = load i64, i64* [[ULLE]], align 8
13573 // CHECK-NEXT:    [[TMP1672:%.*]] = load i64, i64* [[ULLD]], align 8
13574 // CHECK-NEXT:    [[TMP1673:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1671]], i64 [[TMP1672]] seq_cst seq_cst, align 8
13575 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13576 // CHECK-NEXT:    [[TMP1674:%.*]] = load i64, i64* [[ULLE]], align 8
13577 // CHECK-NEXT:    [[TMP1675:%.*]] = load i64, i64* [[ULLD]], align 8
13578 // CHECK-NEXT:    [[TMP1676:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1674]], i64 [[TMP1675]] seq_cst seq_cst, align 8
13579 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13580 // CHECK-NEXT:    [[TMP1677:%.*]] = load i64, i64* [[ULLE]], align 8
13581 // CHECK-NEXT:    [[TMP1678:%.*]] = load i64, i64* [[ULLD]], align 8
13582 // CHECK-NEXT:    [[TMP1679:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP1677]], i64 [[TMP1678]] seq_cst seq_cst, align 8
13583 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13584 // CHECK-NEXT:    [[TMP1680:%.*]] = load float, float* [[FE]], align 4
13585 // CHECK-NEXT:    [[TMP1681:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1680]] monotonic, align 4
13586 // CHECK-NEXT:    [[TMP1682:%.*]] = load float, float* [[FE]], align 4
13587 // CHECK-NEXT:    [[TMP1683:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1682]] monotonic, align 4
13588 // CHECK-NEXT:    [[TMP1684:%.*]] = load float, float* [[FE]], align 4
13589 // CHECK-NEXT:    [[TMP1685:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1684]] monotonic, align 4
13590 // CHECK-NEXT:    [[TMP1686:%.*]] = load float, float* [[FE]], align 4
13591 // CHECK-NEXT:    [[TMP1687:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1686]] monotonic, align 4
13592 // CHECK-NEXT:    [[TMP1688:%.*]] = load float, float* [[FE]], align 4
13593 // CHECK-NEXT:    [[TMP1689:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1688]] monotonic, align 4
13594 // CHECK-NEXT:    [[TMP1690:%.*]] = load float, float* [[FE]], align 4
13595 // CHECK-NEXT:    [[TMP1691:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1690]] monotonic, align 4
13596 // CHECK-NEXT:    [[TMP1692:%.*]] = load float, float* [[FE]], align 4
13597 // CHECK-NEXT:    [[TMP1693:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1692]] monotonic, align 4
13598 // CHECK-NEXT:    [[TMP1694:%.*]] = load float, float* [[FE]], align 4
13599 // CHECK-NEXT:    [[TMP1695:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1694]] monotonic, align 4
13600 // CHECK-NEXT:    [[TMP1696:%.*]] = load float, float* [[FE]], align 4
13601 // CHECK-NEXT:    [[TMP1697:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1696]] acq_rel, align 4
13602 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13603 // CHECK-NEXT:    [[TMP1698:%.*]] = load float, float* [[FE]], align 4
13604 // CHECK-NEXT:    [[TMP1699:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1698]] acq_rel, align 4
13605 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13606 // CHECK-NEXT:    [[TMP1700:%.*]] = load float, float* [[FE]], align 4
13607 // CHECK-NEXT:    [[TMP1701:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1700]] acq_rel, align 4
13608 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13609 // CHECK-NEXT:    [[TMP1702:%.*]] = load float, float* [[FE]], align 4
13610 // CHECK-NEXT:    [[TMP1703:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1702]] acq_rel, align 4
13611 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13612 // CHECK-NEXT:    [[TMP1704:%.*]] = load float, float* [[FE]], align 4
13613 // CHECK-NEXT:    [[TMP1705:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1704]] acq_rel, align 4
13614 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13615 // CHECK-NEXT:    [[TMP1706:%.*]] = load float, float* [[FE]], align 4
13616 // CHECK-NEXT:    [[TMP1707:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1706]] acq_rel, align 4
13617 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13618 // CHECK-NEXT:    [[TMP1708:%.*]] = load float, float* [[FE]], align 4
13619 // CHECK-NEXT:    [[TMP1709:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1708]] acq_rel, align 4
13620 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13621 // CHECK-NEXT:    [[TMP1710:%.*]] = load float, float* [[FE]], align 4
13622 // CHECK-NEXT:    [[TMP1711:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1710]] acq_rel, align 4
13623 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13624 // CHECK-NEXT:    [[TMP1712:%.*]] = load float, float* [[FE]], align 4
13625 // CHECK-NEXT:    [[TMP1713:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1712]] acquire, align 4
13626 // CHECK-NEXT:    [[TMP1714:%.*]] = load float, float* [[FE]], align 4
13627 // CHECK-NEXT:    [[TMP1715:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1714]] acquire, align 4
13628 // CHECK-NEXT:    [[TMP1716:%.*]] = load float, float* [[FE]], align 4
13629 // CHECK-NEXT:    [[TMP1717:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1716]] acquire, align 4
13630 // CHECK-NEXT:    [[TMP1718:%.*]] = load float, float* [[FE]], align 4
13631 // CHECK-NEXT:    [[TMP1719:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1718]] acquire, align 4
13632 // CHECK-NEXT:    [[TMP1720:%.*]] = load float, float* [[FE]], align 4
13633 // CHECK-NEXT:    [[TMP1721:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1720]] acquire, align 4
13634 // CHECK-NEXT:    [[TMP1722:%.*]] = load float, float* [[FE]], align 4
13635 // CHECK-NEXT:    [[TMP1723:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1722]] acquire, align 4
13636 // CHECK-NEXT:    [[TMP1724:%.*]] = load float, float* [[FE]], align 4
13637 // CHECK-NEXT:    [[TMP1725:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1724]] acquire, align 4
13638 // CHECK-NEXT:    [[TMP1726:%.*]] = load float, float* [[FE]], align 4
13639 // CHECK-NEXT:    [[TMP1727:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1726]] acquire, align 4
13640 // CHECK-NEXT:    [[TMP1728:%.*]] = load float, float* [[FE]], align 4
13641 // CHECK-NEXT:    [[TMP1729:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1728]] monotonic, align 4
13642 // CHECK-NEXT:    [[TMP1730:%.*]] = load float, float* [[FE]], align 4
13643 // CHECK-NEXT:    [[TMP1731:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1730]] monotonic, align 4
13644 // CHECK-NEXT:    [[TMP1732:%.*]] = load float, float* [[FE]], align 4
13645 // CHECK-NEXT:    [[TMP1733:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1732]] monotonic, align 4
13646 // CHECK-NEXT:    [[TMP1734:%.*]] = load float, float* [[FE]], align 4
13647 // CHECK-NEXT:    [[TMP1735:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1734]] monotonic, align 4
13648 // CHECK-NEXT:    [[TMP1736:%.*]] = load float, float* [[FE]], align 4
13649 // CHECK-NEXT:    [[TMP1737:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1736]] monotonic, align 4
13650 // CHECK-NEXT:    [[TMP1738:%.*]] = load float, float* [[FE]], align 4
13651 // CHECK-NEXT:    [[TMP1739:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1738]] monotonic, align 4
13652 // CHECK-NEXT:    [[TMP1740:%.*]] = load float, float* [[FE]], align 4
13653 // CHECK-NEXT:    [[TMP1741:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1740]] monotonic, align 4
13654 // CHECK-NEXT:    [[TMP1742:%.*]] = load float, float* [[FE]], align 4
13655 // CHECK-NEXT:    [[TMP1743:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1742]] monotonic, align 4
13656 // CHECK-NEXT:    [[TMP1744:%.*]] = load float, float* [[FE]], align 4
13657 // CHECK-NEXT:    [[TMP1745:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1744]] release, align 4
13658 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13659 // CHECK-NEXT:    [[TMP1746:%.*]] = load float, float* [[FE]], align 4
13660 // CHECK-NEXT:    [[TMP1747:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1746]] release, align 4
13661 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13662 // CHECK-NEXT:    [[TMP1748:%.*]] = load float, float* [[FE]], align 4
13663 // CHECK-NEXT:    [[TMP1749:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1748]] release, align 4
13664 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13665 // CHECK-NEXT:    [[TMP1750:%.*]] = load float, float* [[FE]], align 4
13666 // CHECK-NEXT:    [[TMP1751:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1750]] release, align 4
13667 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13668 // CHECK-NEXT:    [[TMP1752:%.*]] = load float, float* [[FE]], align 4
13669 // CHECK-NEXT:    [[TMP1753:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1752]] release, align 4
13670 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13671 // CHECK-NEXT:    [[TMP1754:%.*]] = load float, float* [[FE]], align 4
13672 // CHECK-NEXT:    [[TMP1755:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1754]] release, align 4
13673 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13674 // CHECK-NEXT:    [[TMP1756:%.*]] = load float, float* [[FE]], align 4
13675 // CHECK-NEXT:    [[TMP1757:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1756]] release, align 4
13676 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13677 // CHECK-NEXT:    [[TMP1758:%.*]] = load float, float* [[FE]], align 4
13678 // CHECK-NEXT:    [[TMP1759:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1758]] release, align 4
13679 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13680 // CHECK-NEXT:    [[TMP1760:%.*]] = load float, float* [[FE]], align 4
13681 // CHECK-NEXT:    [[TMP1761:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1760]] seq_cst, align 4
13682 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13683 // CHECK-NEXT:    [[TMP1762:%.*]] = load float, float* [[FE]], align 4
13684 // CHECK-NEXT:    [[TMP1763:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1762]] seq_cst, align 4
13685 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13686 // CHECK-NEXT:    [[TMP1764:%.*]] = load float, float* [[FE]], align 4
13687 // CHECK-NEXT:    [[TMP1765:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1764]] seq_cst, align 4
13688 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13689 // CHECK-NEXT:    [[TMP1766:%.*]] = load float, float* [[FE]], align 4
13690 // CHECK-NEXT:    [[TMP1767:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1766]] seq_cst, align 4
13691 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13692 // CHECK-NEXT:    [[TMP1768:%.*]] = load float, float* [[FE]], align 4
13693 // CHECK-NEXT:    [[TMP1769:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1768]] seq_cst, align 4
13694 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13695 // CHECK-NEXT:    [[TMP1770:%.*]] = load float, float* [[FE]], align 4
13696 // CHECK-NEXT:    [[TMP1771:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1770]] seq_cst, align 4
13697 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13698 // CHECK-NEXT:    [[TMP1772:%.*]] = load float, float* [[FE]], align 4
13699 // CHECK-NEXT:    [[TMP1773:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP1772]] seq_cst, align 4
13700 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13701 // CHECK-NEXT:    [[TMP1774:%.*]] = load float, float* [[FE]], align 4
13702 // CHECK-NEXT:    [[TMP1775:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP1774]] seq_cst, align 4
13703 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13704 // CHECK-NEXT:    [[TMP1776:%.*]] = load double, double* [[DE]], align 8
13705 // CHECK-NEXT:    [[TMP1777:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1776]] monotonic, align 8
13706 // CHECK-NEXT:    [[TMP1778:%.*]] = load double, double* [[DE]], align 8
13707 // CHECK-NEXT:    [[TMP1779:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1778]] monotonic, align 8
13708 // CHECK-NEXT:    [[TMP1780:%.*]] = load double, double* [[DE]], align 8
13709 // CHECK-NEXT:    [[TMP1781:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1780]] monotonic, align 8
13710 // CHECK-NEXT:    [[TMP1782:%.*]] = load double, double* [[DE]], align 8
13711 // CHECK-NEXT:    [[TMP1783:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1782]] monotonic, align 8
13712 // CHECK-NEXT:    [[TMP1784:%.*]] = load double, double* [[DE]], align 8
13713 // CHECK-NEXT:    [[TMP1785:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1784]] monotonic, align 8
13714 // CHECK-NEXT:    [[TMP1786:%.*]] = load double, double* [[DE]], align 8
13715 // CHECK-NEXT:    [[TMP1787:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1786]] monotonic, align 8
13716 // CHECK-NEXT:    [[TMP1788:%.*]] = load double, double* [[DE]], align 8
13717 // CHECK-NEXT:    [[TMP1789:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1788]] monotonic, align 8
13718 // CHECK-NEXT:    [[TMP1790:%.*]] = load double, double* [[DE]], align 8
13719 // CHECK-NEXT:    [[TMP1791:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1790]] monotonic, align 8
13720 // CHECK-NEXT:    [[TMP1792:%.*]] = load double, double* [[DE]], align 8
13721 // CHECK-NEXT:    [[TMP1793:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1792]] acq_rel, align 8
13722 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13723 // CHECK-NEXT:    [[TMP1794:%.*]] = load double, double* [[DE]], align 8
13724 // CHECK-NEXT:    [[TMP1795:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1794]] acq_rel, align 8
13725 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13726 // CHECK-NEXT:    [[TMP1796:%.*]] = load double, double* [[DE]], align 8
13727 // CHECK-NEXT:    [[TMP1797:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1796]] acq_rel, align 8
13728 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13729 // CHECK-NEXT:    [[TMP1798:%.*]] = load double, double* [[DE]], align 8
13730 // CHECK-NEXT:    [[TMP1799:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1798]] acq_rel, align 8
13731 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13732 // CHECK-NEXT:    [[TMP1800:%.*]] = load double, double* [[DE]], align 8
13733 // CHECK-NEXT:    [[TMP1801:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1800]] acq_rel, align 8
13734 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13735 // CHECK-NEXT:    [[TMP1802:%.*]] = load double, double* [[DE]], align 8
13736 // CHECK-NEXT:    [[TMP1803:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1802]] acq_rel, align 8
13737 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13738 // CHECK-NEXT:    [[TMP1804:%.*]] = load double, double* [[DE]], align 8
13739 // CHECK-NEXT:    [[TMP1805:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1804]] acq_rel, align 8
13740 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13741 // CHECK-NEXT:    [[TMP1806:%.*]] = load double, double* [[DE]], align 8
13742 // CHECK-NEXT:    [[TMP1807:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1806]] acq_rel, align 8
13743 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13744 // CHECK-NEXT:    [[TMP1808:%.*]] = load double, double* [[DE]], align 8
13745 // CHECK-NEXT:    [[TMP1809:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1808]] acquire, align 8
13746 // CHECK-NEXT:    [[TMP1810:%.*]] = load double, double* [[DE]], align 8
13747 // CHECK-NEXT:    [[TMP1811:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1810]] acquire, align 8
13748 // CHECK-NEXT:    [[TMP1812:%.*]] = load double, double* [[DE]], align 8
13749 // CHECK-NEXT:    [[TMP1813:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1812]] acquire, align 8
13750 // CHECK-NEXT:    [[TMP1814:%.*]] = load double, double* [[DE]], align 8
13751 // CHECK-NEXT:    [[TMP1815:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1814]] acquire, align 8
13752 // CHECK-NEXT:    [[TMP1816:%.*]] = load double, double* [[DE]], align 8
13753 // CHECK-NEXT:    [[TMP1817:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1816]] acquire, align 8
13754 // CHECK-NEXT:    [[TMP1818:%.*]] = load double, double* [[DE]], align 8
13755 // CHECK-NEXT:    [[TMP1819:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1818]] acquire, align 8
13756 // CHECK-NEXT:    [[TMP1820:%.*]] = load double, double* [[DE]], align 8
13757 // CHECK-NEXT:    [[TMP1821:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1820]] acquire, align 8
13758 // CHECK-NEXT:    [[TMP1822:%.*]] = load double, double* [[DE]], align 8
13759 // CHECK-NEXT:    [[TMP1823:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1822]] acquire, align 8
13760 // CHECK-NEXT:    [[TMP1824:%.*]] = load double, double* [[DE]], align 8
13761 // CHECK-NEXT:    [[TMP1825:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1824]] monotonic, align 8
13762 // CHECK-NEXT:    [[TMP1826:%.*]] = load double, double* [[DE]], align 8
13763 // CHECK-NEXT:    [[TMP1827:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1826]] monotonic, align 8
13764 // CHECK-NEXT:    [[TMP1828:%.*]] = load double, double* [[DE]], align 8
13765 // CHECK-NEXT:    [[TMP1829:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1828]] monotonic, align 8
13766 // CHECK-NEXT:    [[TMP1830:%.*]] = load double, double* [[DE]], align 8
13767 // CHECK-NEXT:    [[TMP1831:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1830]] monotonic, align 8
13768 // CHECK-NEXT:    [[TMP1832:%.*]] = load double, double* [[DE]], align 8
13769 // CHECK-NEXT:    [[TMP1833:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1832]] monotonic, align 8
13770 // CHECK-NEXT:    [[TMP1834:%.*]] = load double, double* [[DE]], align 8
13771 // CHECK-NEXT:    [[TMP1835:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1834]] monotonic, align 8
13772 // CHECK-NEXT:    [[TMP1836:%.*]] = load double, double* [[DE]], align 8
13773 // CHECK-NEXT:    [[TMP1837:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1836]] monotonic, align 8
13774 // CHECK-NEXT:    [[TMP1838:%.*]] = load double, double* [[DE]], align 8
13775 // CHECK-NEXT:    [[TMP1839:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1838]] monotonic, align 8
13776 // CHECK-NEXT:    [[TMP1840:%.*]] = load double, double* [[DE]], align 8
13777 // CHECK-NEXT:    [[TMP1841:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1840]] release, align 8
13778 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13779 // CHECK-NEXT:    [[TMP1842:%.*]] = load double, double* [[DE]], align 8
13780 // CHECK-NEXT:    [[TMP1843:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1842]] release, align 8
13781 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13782 // CHECK-NEXT:    [[TMP1844:%.*]] = load double, double* [[DE]], align 8
13783 // CHECK-NEXT:    [[TMP1845:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1844]] release, align 8
13784 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13785 // CHECK-NEXT:    [[TMP1846:%.*]] = load double, double* [[DE]], align 8
13786 // CHECK-NEXT:    [[TMP1847:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1846]] release, align 8
13787 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13788 // CHECK-NEXT:    [[TMP1848:%.*]] = load double, double* [[DE]], align 8
13789 // CHECK-NEXT:    [[TMP1849:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1848]] release, align 8
13790 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13791 // CHECK-NEXT:    [[TMP1850:%.*]] = load double, double* [[DE]], align 8
13792 // CHECK-NEXT:    [[TMP1851:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1850]] release, align 8
13793 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13794 // CHECK-NEXT:    [[TMP1852:%.*]] = load double, double* [[DE]], align 8
13795 // CHECK-NEXT:    [[TMP1853:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1852]] release, align 8
13796 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13797 // CHECK-NEXT:    [[TMP1854:%.*]] = load double, double* [[DE]], align 8
13798 // CHECK-NEXT:    [[TMP1855:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1854]] release, align 8
13799 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13800 // CHECK-NEXT:    [[TMP1856:%.*]] = load double, double* [[DE]], align 8
13801 // CHECK-NEXT:    [[TMP1857:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1856]] seq_cst, align 8
13802 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13803 // CHECK-NEXT:    [[TMP1858:%.*]] = load double, double* [[DE]], align 8
13804 // CHECK-NEXT:    [[TMP1859:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1858]] seq_cst, align 8
13805 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13806 // CHECK-NEXT:    [[TMP1860:%.*]] = load double, double* [[DE]], align 8
13807 // CHECK-NEXT:    [[TMP1861:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1860]] seq_cst, align 8
13808 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13809 // CHECK-NEXT:    [[TMP1862:%.*]] = load double, double* [[DE]], align 8
13810 // CHECK-NEXT:    [[TMP1863:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1862]] seq_cst, align 8
13811 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13812 // CHECK-NEXT:    [[TMP1864:%.*]] = load double, double* [[DE]], align 8
13813 // CHECK-NEXT:    [[TMP1865:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1864]] seq_cst, align 8
13814 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13815 // CHECK-NEXT:    [[TMP1866:%.*]] = load double, double* [[DE]], align 8
13816 // CHECK-NEXT:    [[TMP1867:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1866]] seq_cst, align 8
13817 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13818 // CHECK-NEXT:    [[TMP1868:%.*]] = load double, double* [[DE]], align 8
13819 // CHECK-NEXT:    [[TMP1869:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP1868]] seq_cst, align 8
13820 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13821 // CHECK-NEXT:    [[TMP1870:%.*]] = load double, double* [[DE]], align 8
13822 // CHECK-NEXT:    [[TMP1871:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP1870]] seq_cst, align 8
13823 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
13824 // CHECK-NEXT:    ret void
13825 //
13826 //
13827 // CHECK-LABEL: @bar(
13828 // CHECK-NEXT:  entry:
13829 // CHECK-NEXT:    [[CX:%.*]] = alloca i8, align 1
13830 // CHECK-NEXT:    [[CV:%.*]] = alloca i8, align 1
13831 // CHECK-NEXT:    [[CR:%.*]] = alloca i8, align 1
13832 // CHECK-NEXT:    [[CE:%.*]] = alloca i8, align 1
13833 // CHECK-NEXT:    [[CD:%.*]] = alloca i8, align 1
13834 // CHECK-NEXT:    [[UCX:%.*]] = alloca i8, align 1
13835 // CHECK-NEXT:    [[UCV:%.*]] = alloca i8, align 1
13836 // CHECK-NEXT:    [[UCR:%.*]] = alloca i8, align 1
13837 // CHECK-NEXT:    [[UCE:%.*]] = alloca i8, align 1
13838 // CHECK-NEXT:    [[UCD:%.*]] = alloca i8, align 1
13839 // CHECK-NEXT:    [[SX:%.*]] = alloca i16, align 2
13840 // CHECK-NEXT:    [[SV:%.*]] = alloca i16, align 2
13841 // CHECK-NEXT:    [[SR:%.*]] = alloca i16, align 2
13842 // CHECK-NEXT:    [[SE:%.*]] = alloca i16, align 2
13843 // CHECK-NEXT:    [[SD:%.*]] = alloca i16, align 2
13844 // CHECK-NEXT:    [[USX:%.*]] = alloca i16, align 2
13845 // CHECK-NEXT:    [[USV:%.*]] = alloca i16, align 2
13846 // CHECK-NEXT:    [[USR:%.*]] = alloca i16, align 2
13847 // CHECK-NEXT:    [[USE:%.*]] = alloca i16, align 2
13848 // CHECK-NEXT:    [[USD:%.*]] = alloca i16, align 2
13849 // CHECK-NEXT:    [[IX:%.*]] = alloca i32, align 4
13850 // CHECK-NEXT:    [[IV:%.*]] = alloca i32, align 4
13851 // CHECK-NEXT:    [[IR:%.*]] = alloca i32, align 4
13852 // CHECK-NEXT:    [[IE:%.*]] = alloca i32, align 4
13853 // CHECK-NEXT:    [[ID:%.*]] = alloca i32, align 4
13854 // CHECK-NEXT:    [[UIX:%.*]] = alloca i32, align 4
13855 // CHECK-NEXT:    [[UIV:%.*]] = alloca i32, align 4
13856 // CHECK-NEXT:    [[UIR:%.*]] = alloca i32, align 4
13857 // CHECK-NEXT:    [[UIE:%.*]] = alloca i32, align 4
13858 // CHECK-NEXT:    [[UID:%.*]] = alloca i32, align 4
13859 // CHECK-NEXT:    [[LX:%.*]] = alloca i64, align 8
13860 // CHECK-NEXT:    [[LV:%.*]] = alloca i64, align 8
13861 // CHECK-NEXT:    [[LR:%.*]] = alloca i64, align 8
13862 // CHECK-NEXT:    [[LE:%.*]] = alloca i64, align 8
13863 // CHECK-NEXT:    [[LD:%.*]] = alloca i64, align 8
13864 // CHECK-NEXT:    [[ULX:%.*]] = alloca i64, align 8
13865 // CHECK-NEXT:    [[ULV:%.*]] = alloca i64, align 8
13866 // CHECK-NEXT:    [[ULR:%.*]] = alloca i64, align 8
13867 // CHECK-NEXT:    [[ULE:%.*]] = alloca i64, align 8
13868 // CHECK-NEXT:    [[ULD:%.*]] = alloca i64, align 8
13869 // CHECK-NEXT:    [[LLX:%.*]] = alloca i64, align 8
13870 // CHECK-NEXT:    [[LLV:%.*]] = alloca i64, align 8
13871 // CHECK-NEXT:    [[LLR:%.*]] = alloca i64, align 8
13872 // CHECK-NEXT:    [[LLE:%.*]] = alloca i64, align 8
13873 // CHECK-NEXT:    [[LLD:%.*]] = alloca i64, align 8
13874 // CHECK-NEXT:    [[ULLX:%.*]] = alloca i64, align 8
13875 // CHECK-NEXT:    [[ULLV:%.*]] = alloca i64, align 8
13876 // CHECK-NEXT:    [[ULLR:%.*]] = alloca i64, align 8
13877 // CHECK-NEXT:    [[ULLE:%.*]] = alloca i64, align 8
13878 // CHECK-NEXT:    [[ULLD:%.*]] = alloca i64, align 8
13879 // CHECK-NEXT:    [[FX:%.*]] = alloca float, align 4
13880 // CHECK-NEXT:    [[FV:%.*]] = alloca float, align 4
13881 // CHECK-NEXT:    [[FE:%.*]] = alloca float, align 4
13882 // CHECK-NEXT:    [[FD:%.*]] = alloca float, align 4
13883 // CHECK-NEXT:    [[DX:%.*]] = alloca double, align 8
13884 // CHECK-NEXT:    [[DV:%.*]] = alloca double, align 8
13885 // CHECK-NEXT:    [[DE:%.*]] = alloca double, align 8
13886 // CHECK-NEXT:    [[DD:%.*]] = alloca double, align 8
13887 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, i8* [[CE]], align 1
13888 // CHECK-NEXT:    [[TMP1:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP0]] monotonic, align 1
13889 // CHECK-NEXT:    store i8 [[TMP1]], i8* [[CV]], align 1
13890 // CHECK-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CE]], align 1
13891 // CHECK-NEXT:    [[TMP3:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP2]] monotonic, align 1
13892 // CHECK-NEXT:    store i8 [[TMP3]], i8* [[CV]], align 1
13893 // CHECK-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CE]], align 1
13894 // CHECK-NEXT:    [[TMP5:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP4]] monotonic, align 1
13895 // CHECK-NEXT:    store i8 [[TMP5]], i8* [[CV]], align 1
13896 // CHECK-NEXT:    [[TMP6:%.*]] = load i8, i8* [[CE]], align 1
13897 // CHECK-NEXT:    [[TMP7:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP6]] monotonic, align 1
13898 // CHECK-NEXT:    store i8 [[TMP7]], i8* [[CV]], align 1
13899 // CHECK-NEXT:    [[TMP8:%.*]] = load i8, i8* [[CE]], align 1
13900 // CHECK-NEXT:    [[TMP9:%.*]] = load i8, i8* [[CD]], align 1
13901 // CHECK-NEXT:    [[TMP10:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP8]], i8 [[TMP9]] monotonic monotonic, align 1
13902 // CHECK-NEXT:    [[TMP11:%.*]] = extractvalue { i8, i1 } [[TMP10]], 0
13903 // CHECK-NEXT:    store i8 [[TMP11]], i8* [[CV]], align 1
13904 // CHECK-NEXT:    [[TMP12:%.*]] = load i8, i8* [[CE]], align 1
13905 // CHECK-NEXT:    [[TMP13:%.*]] = load i8, i8* [[CD]], align 1
13906 // CHECK-NEXT:    [[TMP14:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP12]], i8 [[TMP13]] monotonic monotonic, align 1
13907 // CHECK-NEXT:    [[TMP15:%.*]] = extractvalue { i8, i1 } [[TMP14]], 0
13908 // CHECK-NEXT:    store i8 [[TMP15]], i8* [[CV]], align 1
13909 // CHECK-NEXT:    [[TMP16:%.*]] = load i8, i8* [[CE]], align 1
13910 // CHECK-NEXT:    [[TMP17:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP16]] monotonic, align 1
13911 // CHECK-NEXT:    [[TMP18:%.*]] = icmp sgt i8 [[TMP17]], [[TMP16]]
13912 // CHECK-NEXT:    [[TMP19:%.*]] = select i1 [[TMP18]], i8 [[TMP16]], i8 [[TMP17]]
13913 // CHECK-NEXT:    store i8 [[TMP19]], i8* [[CV]], align 1
13914 // CHECK-NEXT:    [[TMP20:%.*]] = load i8, i8* [[CE]], align 1
13915 // CHECK-NEXT:    [[TMP21:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP20]] monotonic, align 1
13916 // CHECK-NEXT:    [[TMP22:%.*]] = icmp slt i8 [[TMP21]], [[TMP20]]
13917 // CHECK-NEXT:    [[TMP23:%.*]] = select i1 [[TMP22]], i8 [[TMP20]], i8 [[TMP21]]
13918 // CHECK-NEXT:    store i8 [[TMP23]], i8* [[CV]], align 1
13919 // CHECK-NEXT:    [[TMP24:%.*]] = load i8, i8* [[CE]], align 1
13920 // CHECK-NEXT:    [[TMP25:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP24]] monotonic, align 1
13921 // CHECK-NEXT:    [[TMP26:%.*]] = icmp slt i8 [[TMP25]], [[TMP24]]
13922 // CHECK-NEXT:    [[TMP27:%.*]] = select i1 [[TMP26]], i8 [[TMP24]], i8 [[TMP25]]
13923 // CHECK-NEXT:    store i8 [[TMP27]], i8* [[CV]], align 1
13924 // CHECK-NEXT:    [[TMP28:%.*]] = load i8, i8* [[CE]], align 1
13925 // CHECK-NEXT:    [[TMP29:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP28]] monotonic, align 1
13926 // CHECK-NEXT:    [[TMP30:%.*]] = icmp sgt i8 [[TMP29]], [[TMP28]]
13927 // CHECK-NEXT:    [[TMP31:%.*]] = select i1 [[TMP30]], i8 [[TMP28]], i8 [[TMP29]]
13928 // CHECK-NEXT:    store i8 [[TMP31]], i8* [[CV]], align 1
13929 // CHECK-NEXT:    [[TMP32:%.*]] = load i8, i8* [[CE]], align 1
13930 // CHECK-NEXT:    [[TMP33:%.*]] = load i8, i8* [[CD]], align 1
13931 // CHECK-NEXT:    [[TMP34:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP32]], i8 [[TMP33]] monotonic monotonic, align 1
13932 // CHECK-NEXT:    [[TMP35:%.*]] = extractvalue { i8, i1 } [[TMP34]], 0
13933 // CHECK-NEXT:    [[TMP36:%.*]] = extractvalue { i8, i1 } [[TMP34]], 1
13934 // CHECK-NEXT:    [[TMP37:%.*]] = select i1 [[TMP36]], i8 [[TMP32]], i8 [[TMP35]]
13935 // CHECK-NEXT:    store i8 [[TMP37]], i8* [[CV]], align 1
13936 // CHECK-NEXT:    [[TMP38:%.*]] = load i8, i8* [[CE]], align 1
13937 // CHECK-NEXT:    [[TMP39:%.*]] = load i8, i8* [[CD]], align 1
13938 // CHECK-NEXT:    [[TMP40:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP38]], i8 [[TMP39]] monotonic monotonic, align 1
13939 // CHECK-NEXT:    [[TMP41:%.*]] = extractvalue { i8, i1 } [[TMP40]], 0
13940 // CHECK-NEXT:    [[TMP42:%.*]] = extractvalue { i8, i1 } [[TMP40]], 1
13941 // CHECK-NEXT:    [[TMP43:%.*]] = select i1 [[TMP42]], i8 [[TMP38]], i8 [[TMP41]]
13942 // CHECK-NEXT:    store i8 [[TMP43]], i8* [[CV]], align 1
13943 // CHECK-NEXT:    [[TMP44:%.*]] = load i8, i8* [[CE]], align 1
13944 // CHECK-NEXT:    [[TMP45:%.*]] = load i8, i8* [[CD]], align 1
13945 // CHECK-NEXT:    [[TMP46:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP44]], i8 [[TMP45]] monotonic monotonic, align 1
13946 // CHECK-NEXT:    [[TMP47:%.*]] = extractvalue { i8, i1 } [[TMP46]], 0
13947 // CHECK-NEXT:    [[TMP48:%.*]] = extractvalue { i8, i1 } [[TMP46]], 1
13948 // CHECK-NEXT:    br i1 [[TMP48]], label [[CX_ATOMIC_EXIT:%.*]], label [[CX_ATOMIC_CONT:%.*]]
13949 // CHECK:       cx.atomic.cont:
13950 // CHECK-NEXT:    store i8 [[TMP47]], i8* [[CV]], align 1
13951 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT]]
13952 // CHECK:       cx.atomic.exit:
13953 // CHECK-NEXT:    [[TMP49:%.*]] = load i8, i8* [[CE]], align 1
13954 // CHECK-NEXT:    [[TMP50:%.*]] = load i8, i8* [[CD]], align 1
13955 // CHECK-NEXT:    [[TMP51:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP49]], i8 [[TMP50]] monotonic monotonic, align 1
13956 // CHECK-NEXT:    [[TMP52:%.*]] = extractvalue { i8, i1 } [[TMP51]], 0
13957 // CHECK-NEXT:    [[TMP53:%.*]] = extractvalue { i8, i1 } [[TMP51]], 1
13958 // CHECK-NEXT:    br i1 [[TMP53]], label [[CX_ATOMIC_EXIT1:%.*]], label [[CX_ATOMIC_CONT2:%.*]]
13959 // CHECK:       cx.atomic.cont2:
13960 // CHECK-NEXT:    store i8 [[TMP52]], i8* [[CV]], align 1
13961 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT1]]
13962 // CHECK:       cx.atomic.exit1:
13963 // CHECK-NEXT:    [[TMP54:%.*]] = load i8, i8* [[CE]], align 1
13964 // CHECK-NEXT:    [[TMP55:%.*]] = load i8, i8* [[CD]], align 1
13965 // CHECK-NEXT:    [[TMP56:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP54]], i8 [[TMP55]] monotonic monotonic, align 1
13966 // CHECK-NEXT:    [[TMP57:%.*]] = extractvalue { i8, i1 } [[TMP56]], 1
13967 // CHECK-NEXT:    [[TMP58:%.*]] = sext i1 [[TMP57]] to i8
13968 // CHECK-NEXT:    store i8 [[TMP58]], i8* [[CR]], align 1
13969 // CHECK-NEXT:    [[TMP59:%.*]] = load i8, i8* [[CE]], align 1
13970 // CHECK-NEXT:    [[TMP60:%.*]] = load i8, i8* [[CD]], align 1
13971 // CHECK-NEXT:    [[TMP61:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP59]], i8 [[TMP60]] monotonic monotonic, align 1
13972 // CHECK-NEXT:    [[TMP62:%.*]] = extractvalue { i8, i1 } [[TMP61]], 1
13973 // CHECK-NEXT:    [[TMP63:%.*]] = sext i1 [[TMP62]] to i8
13974 // CHECK-NEXT:    store i8 [[TMP63]], i8* [[CR]], align 1
13975 // CHECK-NEXT:    [[TMP64:%.*]] = load i8, i8* [[CE]], align 1
13976 // CHECK-NEXT:    [[TMP65:%.*]] = load i8, i8* [[CD]], align 1
13977 // CHECK-NEXT:    [[TMP66:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP64]], i8 [[TMP65]] monotonic monotonic, align 1
13978 // CHECK-NEXT:    [[TMP67:%.*]] = extractvalue { i8, i1 } [[TMP66]], 0
13979 // CHECK-NEXT:    [[TMP68:%.*]] = extractvalue { i8, i1 } [[TMP66]], 1
13980 // CHECK-NEXT:    br i1 [[TMP68]], label [[CX_ATOMIC_EXIT3:%.*]], label [[CX_ATOMIC_CONT4:%.*]]
13981 // CHECK:       cx.atomic.cont4:
13982 // CHECK-NEXT:    store i8 [[TMP67]], i8* [[CV]], align 1
13983 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT3]]
13984 // CHECK:       cx.atomic.exit3:
13985 // CHECK-NEXT:    [[TMP69:%.*]] = extractvalue { i8, i1 } [[TMP66]], 1
13986 // CHECK-NEXT:    [[TMP70:%.*]] = sext i1 [[TMP69]] to i8
13987 // CHECK-NEXT:    store i8 [[TMP70]], i8* [[CR]], align 1
13988 // CHECK-NEXT:    [[TMP71:%.*]] = load i8, i8* [[CE]], align 1
13989 // CHECK-NEXT:    [[TMP72:%.*]] = load i8, i8* [[CD]], align 1
13990 // CHECK-NEXT:    [[TMP73:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP71]], i8 [[TMP72]] monotonic monotonic, align 1
13991 // CHECK-NEXT:    [[TMP74:%.*]] = extractvalue { i8, i1 } [[TMP73]], 0
13992 // CHECK-NEXT:    [[TMP75:%.*]] = extractvalue { i8, i1 } [[TMP73]], 1
13993 // CHECK-NEXT:    br i1 [[TMP75]], label [[CX_ATOMIC_EXIT5:%.*]], label [[CX_ATOMIC_CONT6:%.*]]
13994 // CHECK:       cx.atomic.cont6:
13995 // CHECK-NEXT:    store i8 [[TMP74]], i8* [[CV]], align 1
13996 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT5]]
13997 // CHECK:       cx.atomic.exit5:
13998 // CHECK-NEXT:    [[TMP76:%.*]] = extractvalue { i8, i1 } [[TMP73]], 1
13999 // CHECK-NEXT:    [[TMP77:%.*]] = sext i1 [[TMP76]] to i8
14000 // CHECK-NEXT:    store i8 [[TMP77]], i8* [[CR]], align 1
14001 // CHECK-NEXT:    [[TMP78:%.*]] = load i8, i8* [[CE]], align 1
14002 // CHECK-NEXT:    [[TMP79:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP78]] acq_rel, align 1
14003 // CHECK-NEXT:    store i8 [[TMP79]], i8* [[CV]], align 1
14004 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14005 // CHECK-NEXT:    [[TMP80:%.*]] = load i8, i8* [[CE]], align 1
14006 // CHECK-NEXT:    [[TMP81:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP80]] acq_rel, align 1
14007 // CHECK-NEXT:    store i8 [[TMP81]], i8* [[CV]], align 1
14008 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14009 // CHECK-NEXT:    [[TMP82:%.*]] = load i8, i8* [[CE]], align 1
14010 // CHECK-NEXT:    [[TMP83:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP82]] acq_rel, align 1
14011 // CHECK-NEXT:    store i8 [[TMP83]], i8* [[CV]], align 1
14012 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14013 // CHECK-NEXT:    [[TMP84:%.*]] = load i8, i8* [[CE]], align 1
14014 // CHECK-NEXT:    [[TMP85:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP84]] acq_rel, align 1
14015 // CHECK-NEXT:    store i8 [[TMP85]], i8* [[CV]], align 1
14016 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14017 // CHECK-NEXT:    [[TMP86:%.*]] = load i8, i8* [[CE]], align 1
14018 // CHECK-NEXT:    [[TMP87:%.*]] = load i8, i8* [[CD]], align 1
14019 // CHECK-NEXT:    [[TMP88:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP86]], i8 [[TMP87]] acq_rel acquire, align 1
14020 // CHECK-NEXT:    [[TMP89:%.*]] = extractvalue { i8, i1 } [[TMP88]], 0
14021 // CHECK-NEXT:    store i8 [[TMP89]], i8* [[CV]], align 1
14022 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14023 // CHECK-NEXT:    [[TMP90:%.*]] = load i8, i8* [[CE]], align 1
14024 // CHECK-NEXT:    [[TMP91:%.*]] = load i8, i8* [[CD]], align 1
14025 // CHECK-NEXT:    [[TMP92:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP90]], i8 [[TMP91]] acq_rel acquire, align 1
14026 // CHECK-NEXT:    [[TMP93:%.*]] = extractvalue { i8, i1 } [[TMP92]], 0
14027 // CHECK-NEXT:    store i8 [[TMP93]], i8* [[CV]], align 1
14028 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14029 // CHECK-NEXT:    [[TMP94:%.*]] = load i8, i8* [[CE]], align 1
14030 // CHECK-NEXT:    [[TMP95:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP94]] acq_rel, align 1
14031 // CHECK-NEXT:    [[TMP96:%.*]] = icmp sgt i8 [[TMP95]], [[TMP94]]
14032 // CHECK-NEXT:    [[TMP97:%.*]] = select i1 [[TMP96]], i8 [[TMP94]], i8 [[TMP95]]
14033 // CHECK-NEXT:    store i8 [[TMP97]], i8* [[CV]], align 1
14034 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14035 // CHECK-NEXT:    [[TMP98:%.*]] = load i8, i8* [[CE]], align 1
14036 // CHECK-NEXT:    [[TMP99:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP98]] acq_rel, align 1
14037 // CHECK-NEXT:    [[TMP100:%.*]] = icmp slt i8 [[TMP99]], [[TMP98]]
14038 // CHECK-NEXT:    [[TMP101:%.*]] = select i1 [[TMP100]], i8 [[TMP98]], i8 [[TMP99]]
14039 // CHECK-NEXT:    store i8 [[TMP101]], i8* [[CV]], align 1
14040 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14041 // CHECK-NEXT:    [[TMP102:%.*]] = load i8, i8* [[CE]], align 1
14042 // CHECK-NEXT:    [[TMP103:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP102]] acq_rel, align 1
14043 // CHECK-NEXT:    [[TMP104:%.*]] = icmp slt i8 [[TMP103]], [[TMP102]]
14044 // CHECK-NEXT:    [[TMP105:%.*]] = select i1 [[TMP104]], i8 [[TMP102]], i8 [[TMP103]]
14045 // CHECK-NEXT:    store i8 [[TMP105]], i8* [[CV]], align 1
14046 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14047 // CHECK-NEXT:    [[TMP106:%.*]] = load i8, i8* [[CE]], align 1
14048 // CHECK-NEXT:    [[TMP107:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP106]] acq_rel, align 1
14049 // CHECK-NEXT:    [[TMP108:%.*]] = icmp sgt i8 [[TMP107]], [[TMP106]]
14050 // CHECK-NEXT:    [[TMP109:%.*]] = select i1 [[TMP108]], i8 [[TMP106]], i8 [[TMP107]]
14051 // CHECK-NEXT:    store i8 [[TMP109]], i8* [[CV]], align 1
14052 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14053 // CHECK-NEXT:    [[TMP110:%.*]] = load i8, i8* [[CE]], align 1
14054 // CHECK-NEXT:    [[TMP111:%.*]] = load i8, i8* [[CD]], align 1
14055 // CHECK-NEXT:    [[TMP112:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP110]], i8 [[TMP111]] acq_rel acquire, align 1
14056 // CHECK-NEXT:    [[TMP113:%.*]] = extractvalue { i8, i1 } [[TMP112]], 0
14057 // CHECK-NEXT:    [[TMP114:%.*]] = extractvalue { i8, i1 } [[TMP112]], 1
14058 // CHECK-NEXT:    [[TMP115:%.*]] = select i1 [[TMP114]], i8 [[TMP110]], i8 [[TMP113]]
14059 // CHECK-NEXT:    store i8 [[TMP115]], i8* [[CV]], align 1
14060 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14061 // CHECK-NEXT:    [[TMP116:%.*]] = load i8, i8* [[CE]], align 1
14062 // CHECK-NEXT:    [[TMP117:%.*]] = load i8, i8* [[CD]], align 1
14063 // CHECK-NEXT:    [[TMP118:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP116]], i8 [[TMP117]] acq_rel acquire, align 1
14064 // CHECK-NEXT:    [[TMP119:%.*]] = extractvalue { i8, i1 } [[TMP118]], 0
14065 // CHECK-NEXT:    [[TMP120:%.*]] = extractvalue { i8, i1 } [[TMP118]], 1
14066 // CHECK-NEXT:    [[TMP121:%.*]] = select i1 [[TMP120]], i8 [[TMP116]], i8 [[TMP119]]
14067 // CHECK-NEXT:    store i8 [[TMP121]], i8* [[CV]], align 1
14068 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14069 // CHECK-NEXT:    [[TMP122:%.*]] = load i8, i8* [[CE]], align 1
14070 // CHECK-NEXT:    [[TMP123:%.*]] = load i8, i8* [[CD]], align 1
14071 // CHECK-NEXT:    [[TMP124:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP122]], i8 [[TMP123]] acq_rel acquire, align 1
14072 // CHECK-NEXT:    [[TMP125:%.*]] = extractvalue { i8, i1 } [[TMP124]], 0
14073 // CHECK-NEXT:    [[TMP126:%.*]] = extractvalue { i8, i1 } [[TMP124]], 1
14074 // CHECK-NEXT:    br i1 [[TMP126]], label [[CX_ATOMIC_EXIT7:%.*]], label [[CX_ATOMIC_CONT8:%.*]]
14075 // CHECK:       cx.atomic.cont8:
14076 // CHECK-NEXT:    store i8 [[TMP125]], i8* [[CV]], align 1
14077 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT7]]
14078 // CHECK:       cx.atomic.exit7:
14079 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14080 // CHECK-NEXT:    [[TMP127:%.*]] = load i8, i8* [[CE]], align 1
14081 // CHECK-NEXT:    [[TMP128:%.*]] = load i8, i8* [[CD]], align 1
14082 // CHECK-NEXT:    [[TMP129:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP127]], i8 [[TMP128]] acq_rel acquire, align 1
14083 // CHECK-NEXT:    [[TMP130:%.*]] = extractvalue { i8, i1 } [[TMP129]], 0
14084 // CHECK-NEXT:    [[TMP131:%.*]] = extractvalue { i8, i1 } [[TMP129]], 1
14085 // CHECK-NEXT:    br i1 [[TMP131]], label [[CX_ATOMIC_EXIT9:%.*]], label [[CX_ATOMIC_CONT10:%.*]]
14086 // CHECK:       cx.atomic.cont10:
14087 // CHECK-NEXT:    store i8 [[TMP130]], i8* [[CV]], align 1
14088 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT9]]
14089 // CHECK:       cx.atomic.exit9:
14090 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14091 // CHECK-NEXT:    [[TMP132:%.*]] = load i8, i8* [[CE]], align 1
14092 // CHECK-NEXT:    [[TMP133:%.*]] = load i8, i8* [[CD]], align 1
14093 // CHECK-NEXT:    [[TMP134:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP132]], i8 [[TMP133]] acq_rel acquire, align 1
14094 // CHECK-NEXT:    [[TMP135:%.*]] = extractvalue { i8, i1 } [[TMP134]], 1
14095 // CHECK-NEXT:    [[TMP136:%.*]] = sext i1 [[TMP135]] to i8
14096 // CHECK-NEXT:    store i8 [[TMP136]], i8* [[CR]], align 1
14097 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14098 // CHECK-NEXT:    [[TMP137:%.*]] = load i8, i8* [[CE]], align 1
14099 // CHECK-NEXT:    [[TMP138:%.*]] = load i8, i8* [[CD]], align 1
14100 // CHECK-NEXT:    [[TMP139:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP137]], i8 [[TMP138]] acq_rel acquire, align 1
14101 // CHECK-NEXT:    [[TMP140:%.*]] = extractvalue { i8, i1 } [[TMP139]], 1
14102 // CHECK-NEXT:    [[TMP141:%.*]] = sext i1 [[TMP140]] to i8
14103 // CHECK-NEXT:    store i8 [[TMP141]], i8* [[CR]], align 1
14104 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14105 // CHECK-NEXT:    [[TMP142:%.*]] = load i8, i8* [[CE]], align 1
14106 // CHECK-NEXT:    [[TMP143:%.*]] = load i8, i8* [[CD]], align 1
14107 // CHECK-NEXT:    [[TMP144:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP142]], i8 [[TMP143]] acq_rel acquire, align 1
14108 // CHECK-NEXT:    [[TMP145:%.*]] = extractvalue { i8, i1 } [[TMP144]], 0
14109 // CHECK-NEXT:    [[TMP146:%.*]] = extractvalue { i8, i1 } [[TMP144]], 1
14110 // CHECK-NEXT:    br i1 [[TMP146]], label [[CX_ATOMIC_EXIT11:%.*]], label [[CX_ATOMIC_CONT12:%.*]]
14111 // CHECK:       cx.atomic.cont12:
14112 // CHECK-NEXT:    store i8 [[TMP145]], i8* [[CV]], align 1
14113 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT11]]
14114 // CHECK:       cx.atomic.exit11:
14115 // CHECK-NEXT:    [[TMP147:%.*]] = extractvalue { i8, i1 } [[TMP144]], 1
14116 // CHECK-NEXT:    [[TMP148:%.*]] = sext i1 [[TMP147]] to i8
14117 // CHECK-NEXT:    store i8 [[TMP148]], i8* [[CR]], align 1
14118 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14119 // CHECK-NEXT:    [[TMP149:%.*]] = load i8, i8* [[CE]], align 1
14120 // CHECK-NEXT:    [[TMP150:%.*]] = load i8, i8* [[CD]], align 1
14121 // CHECK-NEXT:    [[TMP151:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP149]], i8 [[TMP150]] acq_rel acquire, align 1
14122 // CHECK-NEXT:    [[TMP152:%.*]] = extractvalue { i8, i1 } [[TMP151]], 0
14123 // CHECK-NEXT:    [[TMP153:%.*]] = extractvalue { i8, i1 } [[TMP151]], 1
14124 // CHECK-NEXT:    br i1 [[TMP153]], label [[CX_ATOMIC_EXIT13:%.*]], label [[CX_ATOMIC_CONT14:%.*]]
14125 // CHECK:       cx.atomic.cont14:
14126 // CHECK-NEXT:    store i8 [[TMP152]], i8* [[CV]], align 1
14127 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT13]]
14128 // CHECK:       cx.atomic.exit13:
14129 // CHECK-NEXT:    [[TMP154:%.*]] = extractvalue { i8, i1 } [[TMP151]], 1
14130 // CHECK-NEXT:    [[TMP155:%.*]] = sext i1 [[TMP154]] to i8
14131 // CHECK-NEXT:    store i8 [[TMP155]], i8* [[CR]], align 1
14132 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14133 // CHECK-NEXT:    [[TMP156:%.*]] = load i8, i8* [[CE]], align 1
14134 // CHECK-NEXT:    [[TMP157:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP156]] acquire, align 1
14135 // CHECK-NEXT:    store i8 [[TMP157]], i8* [[CV]], align 1
14136 // CHECK-NEXT:    [[TMP158:%.*]] = load i8, i8* [[CE]], align 1
14137 // CHECK-NEXT:    [[TMP159:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP158]] acquire, align 1
14138 // CHECK-NEXT:    store i8 [[TMP159]], i8* [[CV]], align 1
14139 // CHECK-NEXT:    [[TMP160:%.*]] = load i8, i8* [[CE]], align 1
14140 // CHECK-NEXT:    [[TMP161:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP160]] acquire, align 1
14141 // CHECK-NEXT:    store i8 [[TMP161]], i8* [[CV]], align 1
14142 // CHECK-NEXT:    [[TMP162:%.*]] = load i8, i8* [[CE]], align 1
14143 // CHECK-NEXT:    [[TMP163:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP162]] acquire, align 1
14144 // CHECK-NEXT:    store i8 [[TMP163]], i8* [[CV]], align 1
14145 // CHECK-NEXT:    [[TMP164:%.*]] = load i8, i8* [[CE]], align 1
14146 // CHECK-NEXT:    [[TMP165:%.*]] = load i8, i8* [[CD]], align 1
14147 // CHECK-NEXT:    [[TMP166:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP164]], i8 [[TMP165]] acquire acquire, align 1
14148 // CHECK-NEXT:    [[TMP167:%.*]] = extractvalue { i8, i1 } [[TMP166]], 0
14149 // CHECK-NEXT:    store i8 [[TMP167]], i8* [[CV]], align 1
14150 // CHECK-NEXT:    [[TMP168:%.*]] = load i8, i8* [[CE]], align 1
14151 // CHECK-NEXT:    [[TMP169:%.*]] = load i8, i8* [[CD]], align 1
14152 // CHECK-NEXT:    [[TMP170:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP168]], i8 [[TMP169]] acquire acquire, align 1
14153 // CHECK-NEXT:    [[TMP171:%.*]] = extractvalue { i8, i1 } [[TMP170]], 0
14154 // CHECK-NEXT:    store i8 [[TMP171]], i8* [[CV]], align 1
14155 // CHECK-NEXT:    [[TMP172:%.*]] = load i8, i8* [[CE]], align 1
14156 // CHECK-NEXT:    [[TMP173:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP172]] acquire, align 1
14157 // CHECK-NEXT:    [[TMP174:%.*]] = icmp sgt i8 [[TMP173]], [[TMP172]]
14158 // CHECK-NEXT:    [[TMP175:%.*]] = select i1 [[TMP174]], i8 [[TMP172]], i8 [[TMP173]]
14159 // CHECK-NEXT:    store i8 [[TMP175]], i8* [[CV]], align 1
14160 // CHECK-NEXT:    [[TMP176:%.*]] = load i8, i8* [[CE]], align 1
14161 // CHECK-NEXT:    [[TMP177:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP176]] acquire, align 1
14162 // CHECK-NEXT:    [[TMP178:%.*]] = icmp slt i8 [[TMP177]], [[TMP176]]
14163 // CHECK-NEXT:    [[TMP179:%.*]] = select i1 [[TMP178]], i8 [[TMP176]], i8 [[TMP177]]
14164 // CHECK-NEXT:    store i8 [[TMP179]], i8* [[CV]], align 1
14165 // CHECK-NEXT:    [[TMP180:%.*]] = load i8, i8* [[CE]], align 1
14166 // CHECK-NEXT:    [[TMP181:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP180]] acquire, align 1
14167 // CHECK-NEXT:    [[TMP182:%.*]] = icmp slt i8 [[TMP181]], [[TMP180]]
14168 // CHECK-NEXT:    [[TMP183:%.*]] = select i1 [[TMP182]], i8 [[TMP180]], i8 [[TMP181]]
14169 // CHECK-NEXT:    store i8 [[TMP183]], i8* [[CV]], align 1
14170 // CHECK-NEXT:    [[TMP184:%.*]] = load i8, i8* [[CE]], align 1
14171 // CHECK-NEXT:    [[TMP185:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP184]] acquire, align 1
14172 // CHECK-NEXT:    [[TMP186:%.*]] = icmp sgt i8 [[TMP185]], [[TMP184]]
14173 // CHECK-NEXT:    [[TMP187:%.*]] = select i1 [[TMP186]], i8 [[TMP184]], i8 [[TMP185]]
14174 // CHECK-NEXT:    store i8 [[TMP187]], i8* [[CV]], align 1
14175 // CHECK-NEXT:    [[TMP188:%.*]] = load i8, i8* [[CE]], align 1
14176 // CHECK-NEXT:    [[TMP189:%.*]] = load i8, i8* [[CD]], align 1
14177 // CHECK-NEXT:    [[TMP190:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP188]], i8 [[TMP189]] acquire acquire, align 1
14178 // CHECK-NEXT:    [[TMP191:%.*]] = extractvalue { i8, i1 } [[TMP190]], 0
14179 // CHECK-NEXT:    [[TMP192:%.*]] = extractvalue { i8, i1 } [[TMP190]], 1
14180 // CHECK-NEXT:    [[TMP193:%.*]] = select i1 [[TMP192]], i8 [[TMP188]], i8 [[TMP191]]
14181 // CHECK-NEXT:    store i8 [[TMP193]], i8* [[CV]], align 1
14182 // CHECK-NEXT:    [[TMP194:%.*]] = load i8, i8* [[CE]], align 1
14183 // CHECK-NEXT:    [[TMP195:%.*]] = load i8, i8* [[CD]], align 1
14184 // CHECK-NEXT:    [[TMP196:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP194]], i8 [[TMP195]] acquire acquire, align 1
14185 // CHECK-NEXT:    [[TMP197:%.*]] = extractvalue { i8, i1 } [[TMP196]], 0
14186 // CHECK-NEXT:    [[TMP198:%.*]] = extractvalue { i8, i1 } [[TMP196]], 1
14187 // CHECK-NEXT:    [[TMP199:%.*]] = select i1 [[TMP198]], i8 [[TMP194]], i8 [[TMP197]]
14188 // CHECK-NEXT:    store i8 [[TMP199]], i8* [[CV]], align 1
14189 // CHECK-NEXT:    [[TMP200:%.*]] = load i8, i8* [[CE]], align 1
14190 // CHECK-NEXT:    [[TMP201:%.*]] = load i8, i8* [[CD]], align 1
14191 // CHECK-NEXT:    [[TMP202:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP200]], i8 [[TMP201]] acquire acquire, align 1
14192 // CHECK-NEXT:    [[TMP203:%.*]] = extractvalue { i8, i1 } [[TMP202]], 0
14193 // CHECK-NEXT:    [[TMP204:%.*]] = extractvalue { i8, i1 } [[TMP202]], 1
14194 // CHECK-NEXT:    br i1 [[TMP204]], label [[CX_ATOMIC_EXIT15:%.*]], label [[CX_ATOMIC_CONT16:%.*]]
14195 // CHECK:       cx.atomic.cont16:
14196 // CHECK-NEXT:    store i8 [[TMP203]], i8* [[CV]], align 1
14197 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT15]]
14198 // CHECK:       cx.atomic.exit15:
14199 // CHECK-NEXT:    [[TMP205:%.*]] = load i8, i8* [[CE]], align 1
14200 // CHECK-NEXT:    [[TMP206:%.*]] = load i8, i8* [[CD]], align 1
14201 // CHECK-NEXT:    [[TMP207:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP205]], i8 [[TMP206]] acquire acquire, align 1
14202 // CHECK-NEXT:    [[TMP208:%.*]] = extractvalue { i8, i1 } [[TMP207]], 0
14203 // CHECK-NEXT:    [[TMP209:%.*]] = extractvalue { i8, i1 } [[TMP207]], 1
14204 // CHECK-NEXT:    br i1 [[TMP209]], label [[CX_ATOMIC_EXIT17:%.*]], label [[CX_ATOMIC_CONT18:%.*]]
14205 // CHECK:       cx.atomic.cont18:
14206 // CHECK-NEXT:    store i8 [[TMP208]], i8* [[CV]], align 1
14207 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT17]]
14208 // CHECK:       cx.atomic.exit17:
14209 // CHECK-NEXT:    [[TMP210:%.*]] = load i8, i8* [[CE]], align 1
14210 // CHECK-NEXT:    [[TMP211:%.*]] = load i8, i8* [[CD]], align 1
14211 // CHECK-NEXT:    [[TMP212:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP210]], i8 [[TMP211]] acquire acquire, align 1
14212 // CHECK-NEXT:    [[TMP213:%.*]] = extractvalue { i8, i1 } [[TMP212]], 1
14213 // CHECK-NEXT:    [[TMP214:%.*]] = sext i1 [[TMP213]] to i8
14214 // CHECK-NEXT:    store i8 [[TMP214]], i8* [[CR]], align 1
14215 // CHECK-NEXT:    [[TMP215:%.*]] = load i8, i8* [[CE]], align 1
14216 // CHECK-NEXT:    [[TMP216:%.*]] = load i8, i8* [[CD]], align 1
14217 // CHECK-NEXT:    [[TMP217:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP215]], i8 [[TMP216]] acquire acquire, align 1
14218 // CHECK-NEXT:    [[TMP218:%.*]] = extractvalue { i8, i1 } [[TMP217]], 1
14219 // CHECK-NEXT:    [[TMP219:%.*]] = sext i1 [[TMP218]] to i8
14220 // CHECK-NEXT:    store i8 [[TMP219]], i8* [[CR]], align 1
14221 // CHECK-NEXT:    [[TMP220:%.*]] = load i8, i8* [[CE]], align 1
14222 // CHECK-NEXT:    [[TMP221:%.*]] = load i8, i8* [[CD]], align 1
14223 // CHECK-NEXT:    [[TMP222:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP220]], i8 [[TMP221]] acquire acquire, align 1
14224 // CHECK-NEXT:    [[TMP223:%.*]] = extractvalue { i8, i1 } [[TMP222]], 0
14225 // CHECK-NEXT:    [[TMP224:%.*]] = extractvalue { i8, i1 } [[TMP222]], 1
14226 // CHECK-NEXT:    br i1 [[TMP224]], label [[CX_ATOMIC_EXIT19:%.*]], label [[CX_ATOMIC_CONT20:%.*]]
14227 // CHECK:       cx.atomic.cont20:
14228 // CHECK-NEXT:    store i8 [[TMP223]], i8* [[CV]], align 1
14229 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT19]]
14230 // CHECK:       cx.atomic.exit19:
14231 // CHECK-NEXT:    [[TMP225:%.*]] = extractvalue { i8, i1 } [[TMP222]], 1
14232 // CHECK-NEXT:    [[TMP226:%.*]] = sext i1 [[TMP225]] to i8
14233 // CHECK-NEXT:    store i8 [[TMP226]], i8* [[CR]], align 1
14234 // CHECK-NEXT:    [[TMP227:%.*]] = load i8, i8* [[CE]], align 1
14235 // CHECK-NEXT:    [[TMP228:%.*]] = load i8, i8* [[CD]], align 1
14236 // CHECK-NEXT:    [[TMP229:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP227]], i8 [[TMP228]] acquire acquire, align 1
14237 // CHECK-NEXT:    [[TMP230:%.*]] = extractvalue { i8, i1 } [[TMP229]], 0
14238 // CHECK-NEXT:    [[TMP231:%.*]] = extractvalue { i8, i1 } [[TMP229]], 1
14239 // CHECK-NEXT:    br i1 [[TMP231]], label [[CX_ATOMIC_EXIT21:%.*]], label [[CX_ATOMIC_CONT22:%.*]]
14240 // CHECK:       cx.atomic.cont22:
14241 // CHECK-NEXT:    store i8 [[TMP230]], i8* [[CV]], align 1
14242 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT21]]
14243 // CHECK:       cx.atomic.exit21:
14244 // CHECK-NEXT:    [[TMP232:%.*]] = extractvalue { i8, i1 } [[TMP229]], 1
14245 // CHECK-NEXT:    [[TMP233:%.*]] = sext i1 [[TMP232]] to i8
14246 // CHECK-NEXT:    store i8 [[TMP233]], i8* [[CR]], align 1
14247 // CHECK-NEXT:    [[TMP234:%.*]] = load i8, i8* [[CE]], align 1
14248 // CHECK-NEXT:    [[TMP235:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP234]] monotonic, align 1
14249 // CHECK-NEXT:    store i8 [[TMP235]], i8* [[CV]], align 1
14250 // CHECK-NEXT:    [[TMP236:%.*]] = load i8, i8* [[CE]], align 1
14251 // CHECK-NEXT:    [[TMP237:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP236]] monotonic, align 1
14252 // CHECK-NEXT:    store i8 [[TMP237]], i8* [[CV]], align 1
14253 // CHECK-NEXT:    [[TMP238:%.*]] = load i8, i8* [[CE]], align 1
14254 // CHECK-NEXT:    [[TMP239:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP238]] monotonic, align 1
14255 // CHECK-NEXT:    store i8 [[TMP239]], i8* [[CV]], align 1
14256 // CHECK-NEXT:    [[TMP240:%.*]] = load i8, i8* [[CE]], align 1
14257 // CHECK-NEXT:    [[TMP241:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP240]] monotonic, align 1
14258 // CHECK-NEXT:    store i8 [[TMP241]], i8* [[CV]], align 1
14259 // CHECK-NEXT:    [[TMP242:%.*]] = load i8, i8* [[CE]], align 1
14260 // CHECK-NEXT:    [[TMP243:%.*]] = load i8, i8* [[CD]], align 1
14261 // CHECK-NEXT:    [[TMP244:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP242]], i8 [[TMP243]] monotonic monotonic, align 1
14262 // CHECK-NEXT:    [[TMP245:%.*]] = extractvalue { i8, i1 } [[TMP244]], 0
14263 // CHECK-NEXT:    store i8 [[TMP245]], i8* [[CV]], align 1
14264 // CHECK-NEXT:    [[TMP246:%.*]] = load i8, i8* [[CE]], align 1
14265 // CHECK-NEXT:    [[TMP247:%.*]] = load i8, i8* [[CD]], align 1
14266 // CHECK-NEXT:    [[TMP248:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP246]], i8 [[TMP247]] monotonic monotonic, align 1
14267 // CHECK-NEXT:    [[TMP249:%.*]] = extractvalue { i8, i1 } [[TMP248]], 0
14268 // CHECK-NEXT:    store i8 [[TMP249]], i8* [[CV]], align 1
14269 // CHECK-NEXT:    [[TMP250:%.*]] = load i8, i8* [[CE]], align 1
14270 // CHECK-NEXT:    [[TMP251:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP250]] monotonic, align 1
14271 // CHECK-NEXT:    [[TMP252:%.*]] = icmp sgt i8 [[TMP251]], [[TMP250]]
14272 // CHECK-NEXT:    [[TMP253:%.*]] = select i1 [[TMP252]], i8 [[TMP250]], i8 [[TMP251]]
14273 // CHECK-NEXT:    store i8 [[TMP253]], i8* [[CV]], align 1
14274 // CHECK-NEXT:    [[TMP254:%.*]] = load i8, i8* [[CE]], align 1
14275 // CHECK-NEXT:    [[TMP255:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP254]] monotonic, align 1
14276 // CHECK-NEXT:    [[TMP256:%.*]] = icmp slt i8 [[TMP255]], [[TMP254]]
14277 // CHECK-NEXT:    [[TMP257:%.*]] = select i1 [[TMP256]], i8 [[TMP254]], i8 [[TMP255]]
14278 // CHECK-NEXT:    store i8 [[TMP257]], i8* [[CV]], align 1
14279 // CHECK-NEXT:    [[TMP258:%.*]] = load i8, i8* [[CE]], align 1
14280 // CHECK-NEXT:    [[TMP259:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP258]] monotonic, align 1
14281 // CHECK-NEXT:    [[TMP260:%.*]] = icmp slt i8 [[TMP259]], [[TMP258]]
14282 // CHECK-NEXT:    [[TMP261:%.*]] = select i1 [[TMP260]], i8 [[TMP258]], i8 [[TMP259]]
14283 // CHECK-NEXT:    store i8 [[TMP261]], i8* [[CV]], align 1
14284 // CHECK-NEXT:    [[TMP262:%.*]] = load i8, i8* [[CE]], align 1
14285 // CHECK-NEXT:    [[TMP263:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP262]] monotonic, align 1
14286 // CHECK-NEXT:    [[TMP264:%.*]] = icmp sgt i8 [[TMP263]], [[TMP262]]
14287 // CHECK-NEXT:    [[TMP265:%.*]] = select i1 [[TMP264]], i8 [[TMP262]], i8 [[TMP263]]
14288 // CHECK-NEXT:    store i8 [[TMP265]], i8* [[CV]], align 1
14289 // CHECK-NEXT:    [[TMP266:%.*]] = load i8, i8* [[CE]], align 1
14290 // CHECK-NEXT:    [[TMP267:%.*]] = load i8, i8* [[CD]], align 1
14291 // CHECK-NEXT:    [[TMP268:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP266]], i8 [[TMP267]] monotonic monotonic, align 1
14292 // CHECK-NEXT:    [[TMP269:%.*]] = extractvalue { i8, i1 } [[TMP268]], 0
14293 // CHECK-NEXT:    [[TMP270:%.*]] = extractvalue { i8, i1 } [[TMP268]], 1
14294 // CHECK-NEXT:    [[TMP271:%.*]] = select i1 [[TMP270]], i8 [[TMP266]], i8 [[TMP269]]
14295 // CHECK-NEXT:    store i8 [[TMP271]], i8* [[CV]], align 1
14296 // CHECK-NEXT:    [[TMP272:%.*]] = load i8, i8* [[CE]], align 1
14297 // CHECK-NEXT:    [[TMP273:%.*]] = load i8, i8* [[CD]], align 1
14298 // CHECK-NEXT:    [[TMP274:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP272]], i8 [[TMP273]] monotonic monotonic, align 1
14299 // CHECK-NEXT:    [[TMP275:%.*]] = extractvalue { i8, i1 } [[TMP274]], 0
14300 // CHECK-NEXT:    [[TMP276:%.*]] = extractvalue { i8, i1 } [[TMP274]], 1
14301 // CHECK-NEXT:    [[TMP277:%.*]] = select i1 [[TMP276]], i8 [[TMP272]], i8 [[TMP275]]
14302 // CHECK-NEXT:    store i8 [[TMP277]], i8* [[CV]], align 1
14303 // CHECK-NEXT:    [[TMP278:%.*]] = load i8, i8* [[CE]], align 1
14304 // CHECK-NEXT:    [[TMP279:%.*]] = load i8, i8* [[CD]], align 1
14305 // CHECK-NEXT:    [[TMP280:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP278]], i8 [[TMP279]] monotonic monotonic, align 1
14306 // CHECK-NEXT:    [[TMP281:%.*]] = extractvalue { i8, i1 } [[TMP280]], 0
14307 // CHECK-NEXT:    [[TMP282:%.*]] = extractvalue { i8, i1 } [[TMP280]], 1
14308 // CHECK-NEXT:    br i1 [[TMP282]], label [[CX_ATOMIC_EXIT23:%.*]], label [[CX_ATOMIC_CONT24:%.*]]
14309 // CHECK:       cx.atomic.cont24:
14310 // CHECK-NEXT:    store i8 [[TMP281]], i8* [[CV]], align 1
14311 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT23]]
14312 // CHECK:       cx.atomic.exit23:
14313 // CHECK-NEXT:    [[TMP283:%.*]] = load i8, i8* [[CE]], align 1
14314 // CHECK-NEXT:    [[TMP284:%.*]] = load i8, i8* [[CD]], align 1
14315 // CHECK-NEXT:    [[TMP285:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP283]], i8 [[TMP284]] monotonic monotonic, align 1
14316 // CHECK-NEXT:    [[TMP286:%.*]] = extractvalue { i8, i1 } [[TMP285]], 0
14317 // CHECK-NEXT:    [[TMP287:%.*]] = extractvalue { i8, i1 } [[TMP285]], 1
14318 // CHECK-NEXT:    br i1 [[TMP287]], label [[CX_ATOMIC_EXIT25:%.*]], label [[CX_ATOMIC_CONT26:%.*]]
14319 // CHECK:       cx.atomic.cont26:
14320 // CHECK-NEXT:    store i8 [[TMP286]], i8* [[CV]], align 1
14321 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT25]]
14322 // CHECK:       cx.atomic.exit25:
14323 // CHECK-NEXT:    [[TMP288:%.*]] = load i8, i8* [[CE]], align 1
14324 // CHECK-NEXT:    [[TMP289:%.*]] = load i8, i8* [[CD]], align 1
14325 // CHECK-NEXT:    [[TMP290:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP288]], i8 [[TMP289]] monotonic monotonic, align 1
14326 // CHECK-NEXT:    [[TMP291:%.*]] = extractvalue { i8, i1 } [[TMP290]], 1
14327 // CHECK-NEXT:    [[TMP292:%.*]] = sext i1 [[TMP291]] to i8
14328 // CHECK-NEXT:    store i8 [[TMP292]], i8* [[CR]], align 1
14329 // CHECK-NEXT:    [[TMP293:%.*]] = load i8, i8* [[CE]], align 1
14330 // CHECK-NEXT:    [[TMP294:%.*]] = load i8, i8* [[CD]], align 1
14331 // CHECK-NEXT:    [[TMP295:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP293]], i8 [[TMP294]] monotonic monotonic, align 1
14332 // CHECK-NEXT:    [[TMP296:%.*]] = extractvalue { i8, i1 } [[TMP295]], 1
14333 // CHECK-NEXT:    [[TMP297:%.*]] = sext i1 [[TMP296]] to i8
14334 // CHECK-NEXT:    store i8 [[TMP297]], i8* [[CR]], align 1
14335 // CHECK-NEXT:    [[TMP298:%.*]] = load i8, i8* [[CE]], align 1
14336 // CHECK-NEXT:    [[TMP299:%.*]] = load i8, i8* [[CD]], align 1
14337 // CHECK-NEXT:    [[TMP300:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP298]], i8 [[TMP299]] monotonic monotonic, align 1
14338 // CHECK-NEXT:    [[TMP301:%.*]] = extractvalue { i8, i1 } [[TMP300]], 0
14339 // CHECK-NEXT:    [[TMP302:%.*]] = extractvalue { i8, i1 } [[TMP300]], 1
14340 // CHECK-NEXT:    br i1 [[TMP302]], label [[CX_ATOMIC_EXIT27:%.*]], label [[CX_ATOMIC_CONT28:%.*]]
14341 // CHECK:       cx.atomic.cont28:
14342 // CHECK-NEXT:    store i8 [[TMP301]], i8* [[CV]], align 1
14343 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT27]]
14344 // CHECK:       cx.atomic.exit27:
14345 // CHECK-NEXT:    [[TMP303:%.*]] = extractvalue { i8, i1 } [[TMP300]], 1
14346 // CHECK-NEXT:    [[TMP304:%.*]] = sext i1 [[TMP303]] to i8
14347 // CHECK-NEXT:    store i8 [[TMP304]], i8* [[CR]], align 1
14348 // CHECK-NEXT:    [[TMP305:%.*]] = load i8, i8* [[CE]], align 1
14349 // CHECK-NEXT:    [[TMP306:%.*]] = load i8, i8* [[CD]], align 1
14350 // CHECK-NEXT:    [[TMP307:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP305]], i8 [[TMP306]] monotonic monotonic, align 1
14351 // CHECK-NEXT:    [[TMP308:%.*]] = extractvalue { i8, i1 } [[TMP307]], 0
14352 // CHECK-NEXT:    [[TMP309:%.*]] = extractvalue { i8, i1 } [[TMP307]], 1
14353 // CHECK-NEXT:    br i1 [[TMP309]], label [[CX_ATOMIC_EXIT29:%.*]], label [[CX_ATOMIC_CONT30:%.*]]
14354 // CHECK:       cx.atomic.cont30:
14355 // CHECK-NEXT:    store i8 [[TMP308]], i8* [[CV]], align 1
14356 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT29]]
14357 // CHECK:       cx.atomic.exit29:
14358 // CHECK-NEXT:    [[TMP310:%.*]] = extractvalue { i8, i1 } [[TMP307]], 1
14359 // CHECK-NEXT:    [[TMP311:%.*]] = sext i1 [[TMP310]] to i8
14360 // CHECK-NEXT:    store i8 [[TMP311]], i8* [[CR]], align 1
14361 // CHECK-NEXT:    [[TMP312:%.*]] = load i8, i8* [[CE]], align 1
14362 // CHECK-NEXT:    [[TMP313:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP312]] release, align 1
14363 // CHECK-NEXT:    store i8 [[TMP313]], i8* [[CV]], align 1
14364 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14365 // CHECK-NEXT:    [[TMP314:%.*]] = load i8, i8* [[CE]], align 1
14366 // CHECK-NEXT:    [[TMP315:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP314]] release, align 1
14367 // CHECK-NEXT:    store i8 [[TMP315]], i8* [[CV]], align 1
14368 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14369 // CHECK-NEXT:    [[TMP316:%.*]] = load i8, i8* [[CE]], align 1
14370 // CHECK-NEXT:    [[TMP317:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP316]] release, align 1
14371 // CHECK-NEXT:    store i8 [[TMP317]], i8* [[CV]], align 1
14372 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14373 // CHECK-NEXT:    [[TMP318:%.*]] = load i8, i8* [[CE]], align 1
14374 // CHECK-NEXT:    [[TMP319:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP318]] release, align 1
14375 // CHECK-NEXT:    store i8 [[TMP319]], i8* [[CV]], align 1
14376 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14377 // CHECK-NEXT:    [[TMP320:%.*]] = load i8, i8* [[CE]], align 1
14378 // CHECK-NEXT:    [[TMP321:%.*]] = load i8, i8* [[CD]], align 1
14379 // CHECK-NEXT:    [[TMP322:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP320]], i8 [[TMP321]] release monotonic, align 1
14380 // CHECK-NEXT:    [[TMP323:%.*]] = extractvalue { i8, i1 } [[TMP322]], 0
14381 // CHECK-NEXT:    store i8 [[TMP323]], i8* [[CV]], align 1
14382 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14383 // CHECK-NEXT:    [[TMP324:%.*]] = load i8, i8* [[CE]], align 1
14384 // CHECK-NEXT:    [[TMP325:%.*]] = load i8, i8* [[CD]], align 1
14385 // CHECK-NEXT:    [[TMP326:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP324]], i8 [[TMP325]] release monotonic, align 1
14386 // CHECK-NEXT:    [[TMP327:%.*]] = extractvalue { i8, i1 } [[TMP326]], 0
14387 // CHECK-NEXT:    store i8 [[TMP327]], i8* [[CV]], align 1
14388 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14389 // CHECK-NEXT:    [[TMP328:%.*]] = load i8, i8* [[CE]], align 1
14390 // CHECK-NEXT:    [[TMP329:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP328]] release, align 1
14391 // CHECK-NEXT:    [[TMP330:%.*]] = icmp sgt i8 [[TMP329]], [[TMP328]]
14392 // CHECK-NEXT:    [[TMP331:%.*]] = select i1 [[TMP330]], i8 [[TMP328]], i8 [[TMP329]]
14393 // CHECK-NEXT:    store i8 [[TMP331]], i8* [[CV]], align 1
14394 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14395 // CHECK-NEXT:    [[TMP332:%.*]] = load i8, i8* [[CE]], align 1
14396 // CHECK-NEXT:    [[TMP333:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP332]] release, align 1
14397 // CHECK-NEXT:    [[TMP334:%.*]] = icmp slt i8 [[TMP333]], [[TMP332]]
14398 // CHECK-NEXT:    [[TMP335:%.*]] = select i1 [[TMP334]], i8 [[TMP332]], i8 [[TMP333]]
14399 // CHECK-NEXT:    store i8 [[TMP335]], i8* [[CV]], align 1
14400 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14401 // CHECK-NEXT:    [[TMP336:%.*]] = load i8, i8* [[CE]], align 1
14402 // CHECK-NEXT:    [[TMP337:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP336]] release, align 1
14403 // CHECK-NEXT:    [[TMP338:%.*]] = icmp slt i8 [[TMP337]], [[TMP336]]
14404 // CHECK-NEXT:    [[TMP339:%.*]] = select i1 [[TMP338]], i8 [[TMP336]], i8 [[TMP337]]
14405 // CHECK-NEXT:    store i8 [[TMP339]], i8* [[CV]], align 1
14406 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14407 // CHECK-NEXT:    [[TMP340:%.*]] = load i8, i8* [[CE]], align 1
14408 // CHECK-NEXT:    [[TMP341:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP340]] release, align 1
14409 // CHECK-NEXT:    [[TMP342:%.*]] = icmp sgt i8 [[TMP341]], [[TMP340]]
14410 // CHECK-NEXT:    [[TMP343:%.*]] = select i1 [[TMP342]], i8 [[TMP340]], i8 [[TMP341]]
14411 // CHECK-NEXT:    store i8 [[TMP343]], i8* [[CV]], align 1
14412 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14413 // CHECK-NEXT:    [[TMP344:%.*]] = load i8, i8* [[CE]], align 1
14414 // CHECK-NEXT:    [[TMP345:%.*]] = load i8, i8* [[CD]], align 1
14415 // CHECK-NEXT:    [[TMP346:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP344]], i8 [[TMP345]] release monotonic, align 1
14416 // CHECK-NEXT:    [[TMP347:%.*]] = extractvalue { i8, i1 } [[TMP346]], 0
14417 // CHECK-NEXT:    [[TMP348:%.*]] = extractvalue { i8, i1 } [[TMP346]], 1
14418 // CHECK-NEXT:    [[TMP349:%.*]] = select i1 [[TMP348]], i8 [[TMP344]], i8 [[TMP347]]
14419 // CHECK-NEXT:    store i8 [[TMP349]], i8* [[CV]], align 1
14420 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14421 // CHECK-NEXT:    [[TMP350:%.*]] = load i8, i8* [[CE]], align 1
14422 // CHECK-NEXT:    [[TMP351:%.*]] = load i8, i8* [[CD]], align 1
14423 // CHECK-NEXT:    [[TMP352:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP350]], i8 [[TMP351]] release monotonic, align 1
14424 // CHECK-NEXT:    [[TMP353:%.*]] = extractvalue { i8, i1 } [[TMP352]], 0
14425 // CHECK-NEXT:    [[TMP354:%.*]] = extractvalue { i8, i1 } [[TMP352]], 1
14426 // CHECK-NEXT:    [[TMP355:%.*]] = select i1 [[TMP354]], i8 [[TMP350]], i8 [[TMP353]]
14427 // CHECK-NEXT:    store i8 [[TMP355]], i8* [[CV]], align 1
14428 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14429 // CHECK-NEXT:    [[TMP356:%.*]] = load i8, i8* [[CE]], align 1
14430 // CHECK-NEXT:    [[TMP357:%.*]] = load i8, i8* [[CD]], align 1
14431 // CHECK-NEXT:    [[TMP358:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP356]], i8 [[TMP357]] release monotonic, align 1
14432 // CHECK-NEXT:    [[TMP359:%.*]] = extractvalue { i8, i1 } [[TMP358]], 0
14433 // CHECK-NEXT:    [[TMP360:%.*]] = extractvalue { i8, i1 } [[TMP358]], 1
14434 // CHECK-NEXT:    br i1 [[TMP360]], label [[CX_ATOMIC_EXIT31:%.*]], label [[CX_ATOMIC_CONT32:%.*]]
14435 // CHECK:       cx.atomic.cont32:
14436 // CHECK-NEXT:    store i8 [[TMP359]], i8* [[CV]], align 1
14437 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT31]]
14438 // CHECK:       cx.atomic.exit31:
14439 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14440 // CHECK-NEXT:    [[TMP361:%.*]] = load i8, i8* [[CE]], align 1
14441 // CHECK-NEXT:    [[TMP362:%.*]] = load i8, i8* [[CD]], align 1
14442 // CHECK-NEXT:    [[TMP363:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP361]], i8 [[TMP362]] release monotonic, align 1
14443 // CHECK-NEXT:    [[TMP364:%.*]] = extractvalue { i8, i1 } [[TMP363]], 0
14444 // CHECK-NEXT:    [[TMP365:%.*]] = extractvalue { i8, i1 } [[TMP363]], 1
14445 // CHECK-NEXT:    br i1 [[TMP365]], label [[CX_ATOMIC_EXIT33:%.*]], label [[CX_ATOMIC_CONT34:%.*]]
14446 // CHECK:       cx.atomic.cont34:
14447 // CHECK-NEXT:    store i8 [[TMP364]], i8* [[CV]], align 1
14448 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT33]]
14449 // CHECK:       cx.atomic.exit33:
14450 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14451 // CHECK-NEXT:    [[TMP366:%.*]] = load i8, i8* [[CE]], align 1
14452 // CHECK-NEXT:    [[TMP367:%.*]] = load i8, i8* [[CD]], align 1
14453 // CHECK-NEXT:    [[TMP368:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP366]], i8 [[TMP367]] release monotonic, align 1
14454 // CHECK-NEXT:    [[TMP369:%.*]] = extractvalue { i8, i1 } [[TMP368]], 1
14455 // CHECK-NEXT:    [[TMP370:%.*]] = sext i1 [[TMP369]] to i8
14456 // CHECK-NEXT:    store i8 [[TMP370]], i8* [[CR]], align 1
14457 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14458 // CHECK-NEXT:    [[TMP371:%.*]] = load i8, i8* [[CE]], align 1
14459 // CHECK-NEXT:    [[TMP372:%.*]] = load i8, i8* [[CD]], align 1
14460 // CHECK-NEXT:    [[TMP373:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP371]], i8 [[TMP372]] release monotonic, align 1
14461 // CHECK-NEXT:    [[TMP374:%.*]] = extractvalue { i8, i1 } [[TMP373]], 1
14462 // CHECK-NEXT:    [[TMP375:%.*]] = sext i1 [[TMP374]] to i8
14463 // CHECK-NEXT:    store i8 [[TMP375]], i8* [[CR]], align 1
14464 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14465 // CHECK-NEXT:    [[TMP376:%.*]] = load i8, i8* [[CE]], align 1
14466 // CHECK-NEXT:    [[TMP377:%.*]] = load i8, i8* [[CD]], align 1
14467 // CHECK-NEXT:    [[TMP378:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP376]], i8 [[TMP377]] release monotonic, align 1
14468 // CHECK-NEXT:    [[TMP379:%.*]] = extractvalue { i8, i1 } [[TMP378]], 0
14469 // CHECK-NEXT:    [[TMP380:%.*]] = extractvalue { i8, i1 } [[TMP378]], 1
14470 // CHECK-NEXT:    br i1 [[TMP380]], label [[CX_ATOMIC_EXIT35:%.*]], label [[CX_ATOMIC_CONT36:%.*]]
14471 // CHECK:       cx.atomic.cont36:
14472 // CHECK-NEXT:    store i8 [[TMP379]], i8* [[CV]], align 1
14473 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT35]]
14474 // CHECK:       cx.atomic.exit35:
14475 // CHECK-NEXT:    [[TMP381:%.*]] = extractvalue { i8, i1 } [[TMP378]], 1
14476 // CHECK-NEXT:    [[TMP382:%.*]] = sext i1 [[TMP381]] to i8
14477 // CHECK-NEXT:    store i8 [[TMP382]], i8* [[CR]], align 1
14478 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14479 // CHECK-NEXT:    [[TMP383:%.*]] = load i8, i8* [[CE]], align 1
14480 // CHECK-NEXT:    [[TMP384:%.*]] = load i8, i8* [[CD]], align 1
14481 // CHECK-NEXT:    [[TMP385:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP383]], i8 [[TMP384]] release monotonic, align 1
14482 // CHECK-NEXT:    [[TMP386:%.*]] = extractvalue { i8, i1 } [[TMP385]], 0
14483 // CHECK-NEXT:    [[TMP387:%.*]] = extractvalue { i8, i1 } [[TMP385]], 1
14484 // CHECK-NEXT:    br i1 [[TMP387]], label [[CX_ATOMIC_EXIT37:%.*]], label [[CX_ATOMIC_CONT38:%.*]]
14485 // CHECK:       cx.atomic.cont38:
14486 // CHECK-NEXT:    store i8 [[TMP386]], i8* [[CV]], align 1
14487 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT37]]
14488 // CHECK:       cx.atomic.exit37:
14489 // CHECK-NEXT:    [[TMP388:%.*]] = extractvalue { i8, i1 } [[TMP385]], 1
14490 // CHECK-NEXT:    [[TMP389:%.*]] = sext i1 [[TMP388]] to i8
14491 // CHECK-NEXT:    store i8 [[TMP389]], i8* [[CR]], align 1
14492 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14493 // CHECK-NEXT:    [[TMP390:%.*]] = load i8, i8* [[CE]], align 1
14494 // CHECK-NEXT:    [[TMP391:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP390]] seq_cst, align 1
14495 // CHECK-NEXT:    store i8 [[TMP391]], i8* [[CV]], align 1
14496 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14497 // CHECK-NEXT:    [[TMP392:%.*]] = load i8, i8* [[CE]], align 1
14498 // CHECK-NEXT:    [[TMP393:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP392]] seq_cst, align 1
14499 // CHECK-NEXT:    store i8 [[TMP393]], i8* [[CV]], align 1
14500 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14501 // CHECK-NEXT:    [[TMP394:%.*]] = load i8, i8* [[CE]], align 1
14502 // CHECK-NEXT:    [[TMP395:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP394]] seq_cst, align 1
14503 // CHECK-NEXT:    store i8 [[TMP395]], i8* [[CV]], align 1
14504 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14505 // CHECK-NEXT:    [[TMP396:%.*]] = load i8, i8* [[CE]], align 1
14506 // CHECK-NEXT:    [[TMP397:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP396]] seq_cst, align 1
14507 // CHECK-NEXT:    store i8 [[TMP397]], i8* [[CV]], align 1
14508 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14509 // CHECK-NEXT:    [[TMP398:%.*]] = load i8, i8* [[CE]], align 1
14510 // CHECK-NEXT:    [[TMP399:%.*]] = load i8, i8* [[CD]], align 1
14511 // CHECK-NEXT:    [[TMP400:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP398]], i8 [[TMP399]] seq_cst seq_cst, align 1
14512 // CHECK-NEXT:    [[TMP401:%.*]] = extractvalue { i8, i1 } [[TMP400]], 0
14513 // CHECK-NEXT:    store i8 [[TMP401]], i8* [[CV]], align 1
14514 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14515 // CHECK-NEXT:    [[TMP402:%.*]] = load i8, i8* [[CE]], align 1
14516 // CHECK-NEXT:    [[TMP403:%.*]] = load i8, i8* [[CD]], align 1
14517 // CHECK-NEXT:    [[TMP404:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP402]], i8 [[TMP403]] seq_cst seq_cst, align 1
14518 // CHECK-NEXT:    [[TMP405:%.*]] = extractvalue { i8, i1 } [[TMP404]], 0
14519 // CHECK-NEXT:    store i8 [[TMP405]], i8* [[CV]], align 1
14520 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14521 // CHECK-NEXT:    [[TMP406:%.*]] = load i8, i8* [[CE]], align 1
14522 // CHECK-NEXT:    [[TMP407:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP406]] seq_cst, align 1
14523 // CHECK-NEXT:    [[TMP408:%.*]] = icmp sgt i8 [[TMP407]], [[TMP406]]
14524 // CHECK-NEXT:    [[TMP409:%.*]] = select i1 [[TMP408]], i8 [[TMP406]], i8 [[TMP407]]
14525 // CHECK-NEXT:    store i8 [[TMP409]], i8* [[CV]], align 1
14526 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14527 // CHECK-NEXT:    [[TMP410:%.*]] = load i8, i8* [[CE]], align 1
14528 // CHECK-NEXT:    [[TMP411:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP410]] seq_cst, align 1
14529 // CHECK-NEXT:    [[TMP412:%.*]] = icmp slt i8 [[TMP411]], [[TMP410]]
14530 // CHECK-NEXT:    [[TMP413:%.*]] = select i1 [[TMP412]], i8 [[TMP410]], i8 [[TMP411]]
14531 // CHECK-NEXT:    store i8 [[TMP413]], i8* [[CV]], align 1
14532 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14533 // CHECK-NEXT:    [[TMP414:%.*]] = load i8, i8* [[CE]], align 1
14534 // CHECK-NEXT:    [[TMP415:%.*]] = atomicrmw min i8* [[CX]], i8 [[TMP414]] seq_cst, align 1
14535 // CHECK-NEXT:    [[TMP416:%.*]] = icmp slt i8 [[TMP415]], [[TMP414]]
14536 // CHECK-NEXT:    [[TMP417:%.*]] = select i1 [[TMP416]], i8 [[TMP414]], i8 [[TMP415]]
14537 // CHECK-NEXT:    store i8 [[TMP417]], i8* [[CV]], align 1
14538 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14539 // CHECK-NEXT:    [[TMP418:%.*]] = load i8, i8* [[CE]], align 1
14540 // CHECK-NEXT:    [[TMP419:%.*]] = atomicrmw max i8* [[CX]], i8 [[TMP418]] seq_cst, align 1
14541 // CHECK-NEXT:    [[TMP420:%.*]] = icmp sgt i8 [[TMP419]], [[TMP418]]
14542 // CHECK-NEXT:    [[TMP421:%.*]] = select i1 [[TMP420]], i8 [[TMP418]], i8 [[TMP419]]
14543 // CHECK-NEXT:    store i8 [[TMP421]], i8* [[CV]], align 1
14544 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14545 // CHECK-NEXT:    [[TMP422:%.*]] = load i8, i8* [[CE]], align 1
14546 // CHECK-NEXT:    [[TMP423:%.*]] = load i8, i8* [[CD]], align 1
14547 // CHECK-NEXT:    [[TMP424:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP422]], i8 [[TMP423]] seq_cst seq_cst, align 1
14548 // CHECK-NEXT:    [[TMP425:%.*]] = extractvalue { i8, i1 } [[TMP424]], 0
14549 // CHECK-NEXT:    [[TMP426:%.*]] = extractvalue { i8, i1 } [[TMP424]], 1
14550 // CHECK-NEXT:    [[TMP427:%.*]] = select i1 [[TMP426]], i8 [[TMP422]], i8 [[TMP425]]
14551 // CHECK-NEXT:    store i8 [[TMP427]], i8* [[CV]], align 1
14552 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14553 // CHECK-NEXT:    [[TMP428:%.*]] = load i8, i8* [[CE]], align 1
14554 // CHECK-NEXT:    [[TMP429:%.*]] = load i8, i8* [[CD]], align 1
14555 // CHECK-NEXT:    [[TMP430:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP428]], i8 [[TMP429]] seq_cst seq_cst, align 1
14556 // CHECK-NEXT:    [[TMP431:%.*]] = extractvalue { i8, i1 } [[TMP430]], 0
14557 // CHECK-NEXT:    [[TMP432:%.*]] = extractvalue { i8, i1 } [[TMP430]], 1
14558 // CHECK-NEXT:    [[TMP433:%.*]] = select i1 [[TMP432]], i8 [[TMP428]], i8 [[TMP431]]
14559 // CHECK-NEXT:    store i8 [[TMP433]], i8* [[CV]], align 1
14560 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14561 // CHECK-NEXT:    [[TMP434:%.*]] = load i8, i8* [[CE]], align 1
14562 // CHECK-NEXT:    [[TMP435:%.*]] = load i8, i8* [[CD]], align 1
14563 // CHECK-NEXT:    [[TMP436:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP434]], i8 [[TMP435]] seq_cst seq_cst, align 1
14564 // CHECK-NEXT:    [[TMP437:%.*]] = extractvalue { i8, i1 } [[TMP436]], 0
14565 // CHECK-NEXT:    [[TMP438:%.*]] = extractvalue { i8, i1 } [[TMP436]], 1
14566 // CHECK-NEXT:    br i1 [[TMP438]], label [[CX_ATOMIC_EXIT39:%.*]], label [[CX_ATOMIC_CONT40:%.*]]
14567 // CHECK:       cx.atomic.cont40:
14568 // CHECK-NEXT:    store i8 [[TMP437]], i8* [[CV]], align 1
14569 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT39]]
14570 // CHECK:       cx.atomic.exit39:
14571 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14572 // CHECK-NEXT:    [[TMP439:%.*]] = load i8, i8* [[CE]], align 1
14573 // CHECK-NEXT:    [[TMP440:%.*]] = load i8, i8* [[CD]], align 1
14574 // CHECK-NEXT:    [[TMP441:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP439]], i8 [[TMP440]] seq_cst seq_cst, align 1
14575 // CHECK-NEXT:    [[TMP442:%.*]] = extractvalue { i8, i1 } [[TMP441]], 0
14576 // CHECK-NEXT:    [[TMP443:%.*]] = extractvalue { i8, i1 } [[TMP441]], 1
14577 // CHECK-NEXT:    br i1 [[TMP443]], label [[CX_ATOMIC_EXIT41:%.*]], label [[CX_ATOMIC_CONT42:%.*]]
14578 // CHECK:       cx.atomic.cont42:
14579 // CHECK-NEXT:    store i8 [[TMP442]], i8* [[CV]], align 1
14580 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT41]]
14581 // CHECK:       cx.atomic.exit41:
14582 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14583 // CHECK-NEXT:    [[TMP444:%.*]] = load i8, i8* [[CE]], align 1
14584 // CHECK-NEXT:    [[TMP445:%.*]] = load i8, i8* [[CD]], align 1
14585 // CHECK-NEXT:    [[TMP446:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP444]], i8 [[TMP445]] seq_cst seq_cst, align 1
14586 // CHECK-NEXT:    [[TMP447:%.*]] = extractvalue { i8, i1 } [[TMP446]], 1
14587 // CHECK-NEXT:    [[TMP448:%.*]] = sext i1 [[TMP447]] to i8
14588 // CHECK-NEXT:    store i8 [[TMP448]], i8* [[CR]], align 1
14589 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14590 // CHECK-NEXT:    [[TMP449:%.*]] = load i8, i8* [[CE]], align 1
14591 // CHECK-NEXT:    [[TMP450:%.*]] = load i8, i8* [[CD]], align 1
14592 // CHECK-NEXT:    [[TMP451:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP449]], i8 [[TMP450]] seq_cst seq_cst, align 1
14593 // CHECK-NEXT:    [[TMP452:%.*]] = extractvalue { i8, i1 } [[TMP451]], 1
14594 // CHECK-NEXT:    [[TMP453:%.*]] = sext i1 [[TMP452]] to i8
14595 // CHECK-NEXT:    store i8 [[TMP453]], i8* [[CR]], align 1
14596 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14597 // CHECK-NEXT:    [[TMP454:%.*]] = load i8, i8* [[CE]], align 1
14598 // CHECK-NEXT:    [[TMP455:%.*]] = load i8, i8* [[CD]], align 1
14599 // CHECK-NEXT:    [[TMP456:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP454]], i8 [[TMP455]] seq_cst seq_cst, align 1
14600 // CHECK-NEXT:    [[TMP457:%.*]] = extractvalue { i8, i1 } [[TMP456]], 0
14601 // CHECK-NEXT:    [[TMP458:%.*]] = extractvalue { i8, i1 } [[TMP456]], 1
14602 // CHECK-NEXT:    br i1 [[TMP458]], label [[CX_ATOMIC_EXIT43:%.*]], label [[CX_ATOMIC_CONT44:%.*]]
14603 // CHECK:       cx.atomic.cont44:
14604 // CHECK-NEXT:    store i8 [[TMP457]], i8* [[CV]], align 1
14605 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT43]]
14606 // CHECK:       cx.atomic.exit43:
14607 // CHECK-NEXT:    [[TMP459:%.*]] = extractvalue { i8, i1 } [[TMP456]], 1
14608 // CHECK-NEXT:    [[TMP460:%.*]] = sext i1 [[TMP459]] to i8
14609 // CHECK-NEXT:    store i8 [[TMP460]], i8* [[CR]], align 1
14610 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14611 // CHECK-NEXT:    [[TMP461:%.*]] = load i8, i8* [[CE]], align 1
14612 // CHECK-NEXT:    [[TMP462:%.*]] = load i8, i8* [[CD]], align 1
14613 // CHECK-NEXT:    [[TMP463:%.*]] = cmpxchg i8* [[CX]], i8 [[TMP461]], i8 [[TMP462]] seq_cst seq_cst, align 1
14614 // CHECK-NEXT:    [[TMP464:%.*]] = extractvalue { i8, i1 } [[TMP463]], 0
14615 // CHECK-NEXT:    [[TMP465:%.*]] = extractvalue { i8, i1 } [[TMP463]], 1
14616 // CHECK-NEXT:    br i1 [[TMP465]], label [[CX_ATOMIC_EXIT45:%.*]], label [[CX_ATOMIC_CONT46:%.*]]
14617 // CHECK:       cx.atomic.cont46:
14618 // CHECK-NEXT:    store i8 [[TMP464]], i8* [[CV]], align 1
14619 // CHECK-NEXT:    br label [[CX_ATOMIC_EXIT45]]
14620 // CHECK:       cx.atomic.exit45:
14621 // CHECK-NEXT:    [[TMP466:%.*]] = extractvalue { i8, i1 } [[TMP463]], 1
14622 // CHECK-NEXT:    [[TMP467:%.*]] = sext i1 [[TMP466]] to i8
14623 // CHECK-NEXT:    store i8 [[TMP467]], i8* [[CR]], align 1
14624 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14625 // CHECK-NEXT:    [[TMP468:%.*]] = load i8, i8* [[UCE]], align 1
14626 // CHECK-NEXT:    [[TMP469:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP468]] monotonic, align 1
14627 // CHECK-NEXT:    store i8 [[TMP469]], i8* [[UCV]], align 1
14628 // CHECK-NEXT:    [[TMP470:%.*]] = load i8, i8* [[UCE]], align 1
14629 // CHECK-NEXT:    [[TMP471:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP470]] monotonic, align 1
14630 // CHECK-NEXT:    store i8 [[TMP471]], i8* [[UCV]], align 1
14631 // CHECK-NEXT:    [[TMP472:%.*]] = load i8, i8* [[UCE]], align 1
14632 // CHECK-NEXT:    [[TMP473:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP472]] monotonic, align 1
14633 // CHECK-NEXT:    store i8 [[TMP473]], i8* [[UCV]], align 1
14634 // CHECK-NEXT:    [[TMP474:%.*]] = load i8, i8* [[UCE]], align 1
14635 // CHECK-NEXT:    [[TMP475:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP474]] monotonic, align 1
14636 // CHECK-NEXT:    store i8 [[TMP475]], i8* [[UCV]], align 1
14637 // CHECK-NEXT:    [[TMP476:%.*]] = load i8, i8* [[UCE]], align 1
14638 // CHECK-NEXT:    [[TMP477:%.*]] = load i8, i8* [[UCD]], align 1
14639 // CHECK-NEXT:    [[TMP478:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP476]], i8 [[TMP477]] monotonic monotonic, align 1
14640 // CHECK-NEXT:    [[TMP479:%.*]] = extractvalue { i8, i1 } [[TMP478]], 0
14641 // CHECK-NEXT:    store i8 [[TMP479]], i8* [[UCV]], align 1
14642 // CHECK-NEXT:    [[TMP480:%.*]] = load i8, i8* [[UCE]], align 1
14643 // CHECK-NEXT:    [[TMP481:%.*]] = load i8, i8* [[UCD]], align 1
14644 // CHECK-NEXT:    [[TMP482:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP480]], i8 [[TMP481]] monotonic monotonic, align 1
14645 // CHECK-NEXT:    [[TMP483:%.*]] = extractvalue { i8, i1 } [[TMP482]], 0
14646 // CHECK-NEXT:    store i8 [[TMP483]], i8* [[UCV]], align 1
14647 // CHECK-NEXT:    [[TMP484:%.*]] = load i8, i8* [[UCE]], align 1
14648 // CHECK-NEXT:    [[TMP485:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP484]] monotonic, align 1
14649 // CHECK-NEXT:    [[TMP486:%.*]] = icmp ugt i8 [[TMP485]], [[TMP484]]
14650 // CHECK-NEXT:    [[TMP487:%.*]] = select i1 [[TMP486]], i8 [[TMP484]], i8 [[TMP485]]
14651 // CHECK-NEXT:    store i8 [[TMP487]], i8* [[UCV]], align 1
14652 // CHECK-NEXT:    [[TMP488:%.*]] = load i8, i8* [[UCE]], align 1
14653 // CHECK-NEXT:    [[TMP489:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP488]] monotonic, align 1
14654 // CHECK-NEXT:    [[TMP490:%.*]] = icmp ult i8 [[TMP489]], [[TMP488]]
14655 // CHECK-NEXT:    [[TMP491:%.*]] = select i1 [[TMP490]], i8 [[TMP488]], i8 [[TMP489]]
14656 // CHECK-NEXT:    store i8 [[TMP491]], i8* [[UCV]], align 1
14657 // CHECK-NEXT:    [[TMP492:%.*]] = load i8, i8* [[UCE]], align 1
14658 // CHECK-NEXT:    [[TMP493:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP492]] monotonic, align 1
14659 // CHECK-NEXT:    [[TMP494:%.*]] = icmp ult i8 [[TMP493]], [[TMP492]]
14660 // CHECK-NEXT:    [[TMP495:%.*]] = select i1 [[TMP494]], i8 [[TMP492]], i8 [[TMP493]]
14661 // CHECK-NEXT:    store i8 [[TMP495]], i8* [[UCV]], align 1
14662 // CHECK-NEXT:    [[TMP496:%.*]] = load i8, i8* [[UCE]], align 1
14663 // CHECK-NEXT:    [[TMP497:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP496]] monotonic, align 1
14664 // CHECK-NEXT:    [[TMP498:%.*]] = icmp ugt i8 [[TMP497]], [[TMP496]]
14665 // CHECK-NEXT:    [[TMP499:%.*]] = select i1 [[TMP498]], i8 [[TMP496]], i8 [[TMP497]]
14666 // CHECK-NEXT:    store i8 [[TMP499]], i8* [[UCV]], align 1
14667 // CHECK-NEXT:    [[TMP500:%.*]] = load i8, i8* [[UCE]], align 1
14668 // CHECK-NEXT:    [[TMP501:%.*]] = load i8, i8* [[UCD]], align 1
14669 // CHECK-NEXT:    [[TMP502:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP500]], i8 [[TMP501]] monotonic monotonic, align 1
14670 // CHECK-NEXT:    [[TMP503:%.*]] = extractvalue { i8, i1 } [[TMP502]], 0
14671 // CHECK-NEXT:    [[TMP504:%.*]] = extractvalue { i8, i1 } [[TMP502]], 1
14672 // CHECK-NEXT:    [[TMP505:%.*]] = select i1 [[TMP504]], i8 [[TMP500]], i8 [[TMP503]]
14673 // CHECK-NEXT:    store i8 [[TMP505]], i8* [[UCV]], align 1
14674 // CHECK-NEXT:    [[TMP506:%.*]] = load i8, i8* [[UCE]], align 1
14675 // CHECK-NEXT:    [[TMP507:%.*]] = load i8, i8* [[UCD]], align 1
14676 // CHECK-NEXT:    [[TMP508:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP506]], i8 [[TMP507]] monotonic monotonic, align 1
14677 // CHECK-NEXT:    [[TMP509:%.*]] = extractvalue { i8, i1 } [[TMP508]], 0
14678 // CHECK-NEXT:    [[TMP510:%.*]] = extractvalue { i8, i1 } [[TMP508]], 1
14679 // CHECK-NEXT:    [[TMP511:%.*]] = select i1 [[TMP510]], i8 [[TMP506]], i8 [[TMP509]]
14680 // CHECK-NEXT:    store i8 [[TMP511]], i8* [[UCV]], align 1
14681 // CHECK-NEXT:    [[TMP512:%.*]] = load i8, i8* [[UCE]], align 1
14682 // CHECK-NEXT:    [[TMP513:%.*]] = load i8, i8* [[UCD]], align 1
14683 // CHECK-NEXT:    [[TMP514:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP512]], i8 [[TMP513]] monotonic monotonic, align 1
14684 // CHECK-NEXT:    [[TMP515:%.*]] = extractvalue { i8, i1 } [[TMP514]], 0
14685 // CHECK-NEXT:    [[TMP516:%.*]] = extractvalue { i8, i1 } [[TMP514]], 1
14686 // CHECK-NEXT:    br i1 [[TMP516]], label [[UCX_ATOMIC_EXIT:%.*]], label [[UCX_ATOMIC_CONT:%.*]]
14687 // CHECK:       ucx.atomic.cont:
14688 // CHECK-NEXT:    store i8 [[TMP515]], i8* [[UCV]], align 1
14689 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT]]
14690 // CHECK:       ucx.atomic.exit:
14691 // CHECK-NEXT:    [[TMP517:%.*]] = load i8, i8* [[UCE]], align 1
14692 // CHECK-NEXT:    [[TMP518:%.*]] = load i8, i8* [[UCD]], align 1
14693 // CHECK-NEXT:    [[TMP519:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP517]], i8 [[TMP518]] monotonic monotonic, align 1
14694 // CHECK-NEXT:    [[TMP520:%.*]] = extractvalue { i8, i1 } [[TMP519]], 0
14695 // CHECK-NEXT:    [[TMP521:%.*]] = extractvalue { i8, i1 } [[TMP519]], 1
14696 // CHECK-NEXT:    br i1 [[TMP521]], label [[UCX_ATOMIC_EXIT47:%.*]], label [[UCX_ATOMIC_CONT48:%.*]]
14697 // CHECK:       ucx.atomic.cont48:
14698 // CHECK-NEXT:    store i8 [[TMP520]], i8* [[UCV]], align 1
14699 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT47]]
14700 // CHECK:       ucx.atomic.exit47:
14701 // CHECK-NEXT:    [[TMP522:%.*]] = load i8, i8* [[UCE]], align 1
14702 // CHECK-NEXT:    [[TMP523:%.*]] = load i8, i8* [[UCD]], align 1
14703 // CHECK-NEXT:    [[TMP524:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP522]], i8 [[TMP523]] monotonic monotonic, align 1
14704 // CHECK-NEXT:    [[TMP525:%.*]] = extractvalue { i8, i1 } [[TMP524]], 1
14705 // CHECK-NEXT:    [[TMP526:%.*]] = zext i1 [[TMP525]] to i8
14706 // CHECK-NEXT:    store i8 [[TMP526]], i8* [[UCR]], align 1
14707 // CHECK-NEXT:    [[TMP527:%.*]] = load i8, i8* [[UCE]], align 1
14708 // CHECK-NEXT:    [[TMP528:%.*]] = load i8, i8* [[UCD]], align 1
14709 // CHECK-NEXT:    [[TMP529:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP527]], i8 [[TMP528]] monotonic monotonic, align 1
14710 // CHECK-NEXT:    [[TMP530:%.*]] = extractvalue { i8, i1 } [[TMP529]], 1
14711 // CHECK-NEXT:    [[TMP531:%.*]] = zext i1 [[TMP530]] to i8
14712 // CHECK-NEXT:    store i8 [[TMP531]], i8* [[UCR]], align 1
14713 // CHECK-NEXT:    [[TMP532:%.*]] = load i8, i8* [[UCE]], align 1
14714 // CHECK-NEXT:    [[TMP533:%.*]] = load i8, i8* [[UCD]], align 1
14715 // CHECK-NEXT:    [[TMP534:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP532]], i8 [[TMP533]] monotonic monotonic, align 1
14716 // CHECK-NEXT:    [[TMP535:%.*]] = extractvalue { i8, i1 } [[TMP534]], 0
14717 // CHECK-NEXT:    [[TMP536:%.*]] = extractvalue { i8, i1 } [[TMP534]], 1
14718 // CHECK-NEXT:    br i1 [[TMP536]], label [[UCX_ATOMIC_EXIT49:%.*]], label [[UCX_ATOMIC_CONT50:%.*]]
14719 // CHECK:       ucx.atomic.cont50:
14720 // CHECK-NEXT:    store i8 [[TMP535]], i8* [[UCV]], align 1
14721 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT49]]
14722 // CHECK:       ucx.atomic.exit49:
14723 // CHECK-NEXT:    [[TMP537:%.*]] = extractvalue { i8, i1 } [[TMP534]], 1
14724 // CHECK-NEXT:    [[TMP538:%.*]] = zext i1 [[TMP537]] to i8
14725 // CHECK-NEXT:    store i8 [[TMP538]], i8* [[UCR]], align 1
14726 // CHECK-NEXT:    [[TMP539:%.*]] = load i8, i8* [[UCE]], align 1
14727 // CHECK-NEXT:    [[TMP540:%.*]] = load i8, i8* [[UCD]], align 1
14728 // CHECK-NEXT:    [[TMP541:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP539]], i8 [[TMP540]] monotonic monotonic, align 1
14729 // CHECK-NEXT:    [[TMP542:%.*]] = extractvalue { i8, i1 } [[TMP541]], 0
14730 // CHECK-NEXT:    [[TMP543:%.*]] = extractvalue { i8, i1 } [[TMP541]], 1
14731 // CHECK-NEXT:    br i1 [[TMP543]], label [[UCX_ATOMIC_EXIT51:%.*]], label [[UCX_ATOMIC_CONT52:%.*]]
14732 // CHECK:       ucx.atomic.cont52:
14733 // CHECK-NEXT:    store i8 [[TMP542]], i8* [[UCV]], align 1
14734 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT51]]
14735 // CHECK:       ucx.atomic.exit51:
14736 // CHECK-NEXT:    [[TMP544:%.*]] = extractvalue { i8, i1 } [[TMP541]], 1
14737 // CHECK-NEXT:    [[TMP545:%.*]] = zext i1 [[TMP544]] to i8
14738 // CHECK-NEXT:    store i8 [[TMP545]], i8* [[UCR]], align 1
14739 // CHECK-NEXT:    [[TMP546:%.*]] = load i8, i8* [[UCE]], align 1
14740 // CHECK-NEXT:    [[TMP547:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP546]] acq_rel, align 1
14741 // CHECK-NEXT:    store i8 [[TMP547]], i8* [[UCV]], align 1
14742 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14743 // CHECK-NEXT:    [[TMP548:%.*]] = load i8, i8* [[UCE]], align 1
14744 // CHECK-NEXT:    [[TMP549:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP548]] acq_rel, align 1
14745 // CHECK-NEXT:    store i8 [[TMP549]], i8* [[UCV]], align 1
14746 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14747 // CHECK-NEXT:    [[TMP550:%.*]] = load i8, i8* [[UCE]], align 1
14748 // CHECK-NEXT:    [[TMP551:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP550]] acq_rel, align 1
14749 // CHECK-NEXT:    store i8 [[TMP551]], i8* [[UCV]], align 1
14750 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14751 // CHECK-NEXT:    [[TMP552:%.*]] = load i8, i8* [[UCE]], align 1
14752 // CHECK-NEXT:    [[TMP553:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP552]] acq_rel, align 1
14753 // CHECK-NEXT:    store i8 [[TMP553]], i8* [[UCV]], align 1
14754 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14755 // CHECK-NEXT:    [[TMP554:%.*]] = load i8, i8* [[UCE]], align 1
14756 // CHECK-NEXT:    [[TMP555:%.*]] = load i8, i8* [[UCD]], align 1
14757 // CHECK-NEXT:    [[TMP556:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP554]], i8 [[TMP555]] acq_rel acquire, align 1
14758 // CHECK-NEXT:    [[TMP557:%.*]] = extractvalue { i8, i1 } [[TMP556]], 0
14759 // CHECK-NEXT:    store i8 [[TMP557]], i8* [[UCV]], align 1
14760 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14761 // CHECK-NEXT:    [[TMP558:%.*]] = load i8, i8* [[UCE]], align 1
14762 // CHECK-NEXT:    [[TMP559:%.*]] = load i8, i8* [[UCD]], align 1
14763 // CHECK-NEXT:    [[TMP560:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP558]], i8 [[TMP559]] acq_rel acquire, align 1
14764 // CHECK-NEXT:    [[TMP561:%.*]] = extractvalue { i8, i1 } [[TMP560]], 0
14765 // CHECK-NEXT:    store i8 [[TMP561]], i8* [[UCV]], align 1
14766 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14767 // CHECK-NEXT:    [[TMP562:%.*]] = load i8, i8* [[UCE]], align 1
14768 // CHECK-NEXT:    [[TMP563:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP562]] acq_rel, align 1
14769 // CHECK-NEXT:    [[TMP564:%.*]] = icmp ugt i8 [[TMP563]], [[TMP562]]
14770 // CHECK-NEXT:    [[TMP565:%.*]] = select i1 [[TMP564]], i8 [[TMP562]], i8 [[TMP563]]
14771 // CHECK-NEXT:    store i8 [[TMP565]], i8* [[UCV]], align 1
14772 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14773 // CHECK-NEXT:    [[TMP566:%.*]] = load i8, i8* [[UCE]], align 1
14774 // CHECK-NEXT:    [[TMP567:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP566]] acq_rel, align 1
14775 // CHECK-NEXT:    [[TMP568:%.*]] = icmp ult i8 [[TMP567]], [[TMP566]]
14776 // CHECK-NEXT:    [[TMP569:%.*]] = select i1 [[TMP568]], i8 [[TMP566]], i8 [[TMP567]]
14777 // CHECK-NEXT:    store i8 [[TMP569]], i8* [[UCV]], align 1
14778 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14779 // CHECK-NEXT:    [[TMP570:%.*]] = load i8, i8* [[UCE]], align 1
14780 // CHECK-NEXT:    [[TMP571:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP570]] acq_rel, align 1
14781 // CHECK-NEXT:    [[TMP572:%.*]] = icmp ult i8 [[TMP571]], [[TMP570]]
14782 // CHECK-NEXT:    [[TMP573:%.*]] = select i1 [[TMP572]], i8 [[TMP570]], i8 [[TMP571]]
14783 // CHECK-NEXT:    store i8 [[TMP573]], i8* [[UCV]], align 1
14784 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14785 // CHECK-NEXT:    [[TMP574:%.*]] = load i8, i8* [[UCE]], align 1
14786 // CHECK-NEXT:    [[TMP575:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP574]] acq_rel, align 1
14787 // CHECK-NEXT:    [[TMP576:%.*]] = icmp ugt i8 [[TMP575]], [[TMP574]]
14788 // CHECK-NEXT:    [[TMP577:%.*]] = select i1 [[TMP576]], i8 [[TMP574]], i8 [[TMP575]]
14789 // CHECK-NEXT:    store i8 [[TMP577]], i8* [[UCV]], align 1
14790 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14791 // CHECK-NEXT:    [[TMP578:%.*]] = load i8, i8* [[UCE]], align 1
14792 // CHECK-NEXT:    [[TMP579:%.*]] = load i8, i8* [[UCD]], align 1
14793 // CHECK-NEXT:    [[TMP580:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP578]], i8 [[TMP579]] acq_rel acquire, align 1
14794 // CHECK-NEXT:    [[TMP581:%.*]] = extractvalue { i8, i1 } [[TMP580]], 0
14795 // CHECK-NEXT:    [[TMP582:%.*]] = extractvalue { i8, i1 } [[TMP580]], 1
14796 // CHECK-NEXT:    [[TMP583:%.*]] = select i1 [[TMP582]], i8 [[TMP578]], i8 [[TMP581]]
14797 // CHECK-NEXT:    store i8 [[TMP583]], i8* [[UCV]], align 1
14798 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14799 // CHECK-NEXT:    [[TMP584:%.*]] = load i8, i8* [[UCE]], align 1
14800 // CHECK-NEXT:    [[TMP585:%.*]] = load i8, i8* [[UCD]], align 1
14801 // CHECK-NEXT:    [[TMP586:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP584]], i8 [[TMP585]] acq_rel acquire, align 1
14802 // CHECK-NEXT:    [[TMP587:%.*]] = extractvalue { i8, i1 } [[TMP586]], 0
14803 // CHECK-NEXT:    [[TMP588:%.*]] = extractvalue { i8, i1 } [[TMP586]], 1
14804 // CHECK-NEXT:    [[TMP589:%.*]] = select i1 [[TMP588]], i8 [[TMP584]], i8 [[TMP587]]
14805 // CHECK-NEXT:    store i8 [[TMP589]], i8* [[UCV]], align 1
14806 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14807 // CHECK-NEXT:    [[TMP590:%.*]] = load i8, i8* [[UCE]], align 1
14808 // CHECK-NEXT:    [[TMP591:%.*]] = load i8, i8* [[UCD]], align 1
14809 // CHECK-NEXT:    [[TMP592:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP590]], i8 [[TMP591]] acq_rel acquire, align 1
14810 // CHECK-NEXT:    [[TMP593:%.*]] = extractvalue { i8, i1 } [[TMP592]], 0
14811 // CHECK-NEXT:    [[TMP594:%.*]] = extractvalue { i8, i1 } [[TMP592]], 1
14812 // CHECK-NEXT:    br i1 [[TMP594]], label [[UCX_ATOMIC_EXIT53:%.*]], label [[UCX_ATOMIC_CONT54:%.*]]
14813 // CHECK:       ucx.atomic.cont54:
14814 // CHECK-NEXT:    store i8 [[TMP593]], i8* [[UCV]], align 1
14815 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT53]]
14816 // CHECK:       ucx.atomic.exit53:
14817 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14818 // CHECK-NEXT:    [[TMP595:%.*]] = load i8, i8* [[UCE]], align 1
14819 // CHECK-NEXT:    [[TMP596:%.*]] = load i8, i8* [[UCD]], align 1
14820 // CHECK-NEXT:    [[TMP597:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP595]], i8 [[TMP596]] acq_rel acquire, align 1
14821 // CHECK-NEXT:    [[TMP598:%.*]] = extractvalue { i8, i1 } [[TMP597]], 0
14822 // CHECK-NEXT:    [[TMP599:%.*]] = extractvalue { i8, i1 } [[TMP597]], 1
14823 // CHECK-NEXT:    br i1 [[TMP599]], label [[UCX_ATOMIC_EXIT55:%.*]], label [[UCX_ATOMIC_CONT56:%.*]]
14824 // CHECK:       ucx.atomic.cont56:
14825 // CHECK-NEXT:    store i8 [[TMP598]], i8* [[UCV]], align 1
14826 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT55]]
14827 // CHECK:       ucx.atomic.exit55:
14828 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14829 // CHECK-NEXT:    [[TMP600:%.*]] = load i8, i8* [[UCE]], align 1
14830 // CHECK-NEXT:    [[TMP601:%.*]] = load i8, i8* [[UCD]], align 1
14831 // CHECK-NEXT:    [[TMP602:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP600]], i8 [[TMP601]] acq_rel acquire, align 1
14832 // CHECK-NEXT:    [[TMP603:%.*]] = extractvalue { i8, i1 } [[TMP602]], 1
14833 // CHECK-NEXT:    [[TMP604:%.*]] = zext i1 [[TMP603]] to i8
14834 // CHECK-NEXT:    store i8 [[TMP604]], i8* [[UCR]], align 1
14835 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14836 // CHECK-NEXT:    [[TMP605:%.*]] = load i8, i8* [[UCE]], align 1
14837 // CHECK-NEXT:    [[TMP606:%.*]] = load i8, i8* [[UCD]], align 1
14838 // CHECK-NEXT:    [[TMP607:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP605]], i8 [[TMP606]] acq_rel acquire, align 1
14839 // CHECK-NEXT:    [[TMP608:%.*]] = extractvalue { i8, i1 } [[TMP607]], 1
14840 // CHECK-NEXT:    [[TMP609:%.*]] = zext i1 [[TMP608]] to i8
14841 // CHECK-NEXT:    store i8 [[TMP609]], i8* [[UCR]], align 1
14842 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14843 // CHECK-NEXT:    [[TMP610:%.*]] = load i8, i8* [[UCE]], align 1
14844 // CHECK-NEXT:    [[TMP611:%.*]] = load i8, i8* [[UCD]], align 1
14845 // CHECK-NEXT:    [[TMP612:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP610]], i8 [[TMP611]] acq_rel acquire, align 1
14846 // CHECK-NEXT:    [[TMP613:%.*]] = extractvalue { i8, i1 } [[TMP612]], 0
14847 // CHECK-NEXT:    [[TMP614:%.*]] = extractvalue { i8, i1 } [[TMP612]], 1
14848 // CHECK-NEXT:    br i1 [[TMP614]], label [[UCX_ATOMIC_EXIT57:%.*]], label [[UCX_ATOMIC_CONT58:%.*]]
14849 // CHECK:       ucx.atomic.cont58:
14850 // CHECK-NEXT:    store i8 [[TMP613]], i8* [[UCV]], align 1
14851 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT57]]
14852 // CHECK:       ucx.atomic.exit57:
14853 // CHECK-NEXT:    [[TMP615:%.*]] = extractvalue { i8, i1 } [[TMP612]], 1
14854 // CHECK-NEXT:    [[TMP616:%.*]] = zext i1 [[TMP615]] to i8
14855 // CHECK-NEXT:    store i8 [[TMP616]], i8* [[UCR]], align 1
14856 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14857 // CHECK-NEXT:    [[TMP617:%.*]] = load i8, i8* [[UCE]], align 1
14858 // CHECK-NEXT:    [[TMP618:%.*]] = load i8, i8* [[UCD]], align 1
14859 // CHECK-NEXT:    [[TMP619:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP617]], i8 [[TMP618]] acq_rel acquire, align 1
14860 // CHECK-NEXT:    [[TMP620:%.*]] = extractvalue { i8, i1 } [[TMP619]], 0
14861 // CHECK-NEXT:    [[TMP621:%.*]] = extractvalue { i8, i1 } [[TMP619]], 1
14862 // CHECK-NEXT:    br i1 [[TMP621]], label [[UCX_ATOMIC_EXIT59:%.*]], label [[UCX_ATOMIC_CONT60:%.*]]
14863 // CHECK:       ucx.atomic.cont60:
14864 // CHECK-NEXT:    store i8 [[TMP620]], i8* [[UCV]], align 1
14865 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT59]]
14866 // CHECK:       ucx.atomic.exit59:
14867 // CHECK-NEXT:    [[TMP622:%.*]] = extractvalue { i8, i1 } [[TMP619]], 1
14868 // CHECK-NEXT:    [[TMP623:%.*]] = zext i1 [[TMP622]] to i8
14869 // CHECK-NEXT:    store i8 [[TMP623]], i8* [[UCR]], align 1
14870 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
14871 // CHECK-NEXT:    [[TMP624:%.*]] = load i8, i8* [[UCE]], align 1
14872 // CHECK-NEXT:    [[TMP625:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP624]] acquire, align 1
14873 // CHECK-NEXT:    store i8 [[TMP625]], i8* [[UCV]], align 1
14874 // CHECK-NEXT:    [[TMP626:%.*]] = load i8, i8* [[UCE]], align 1
14875 // CHECK-NEXT:    [[TMP627:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP626]] acquire, align 1
14876 // CHECK-NEXT:    store i8 [[TMP627]], i8* [[UCV]], align 1
14877 // CHECK-NEXT:    [[TMP628:%.*]] = load i8, i8* [[UCE]], align 1
14878 // CHECK-NEXT:    [[TMP629:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP628]] acquire, align 1
14879 // CHECK-NEXT:    store i8 [[TMP629]], i8* [[UCV]], align 1
14880 // CHECK-NEXT:    [[TMP630:%.*]] = load i8, i8* [[UCE]], align 1
14881 // CHECK-NEXT:    [[TMP631:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP630]] acquire, align 1
14882 // CHECK-NEXT:    store i8 [[TMP631]], i8* [[UCV]], align 1
14883 // CHECK-NEXT:    [[TMP632:%.*]] = load i8, i8* [[UCE]], align 1
14884 // CHECK-NEXT:    [[TMP633:%.*]] = load i8, i8* [[UCD]], align 1
14885 // CHECK-NEXT:    [[TMP634:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP632]], i8 [[TMP633]] acquire acquire, align 1
14886 // CHECK-NEXT:    [[TMP635:%.*]] = extractvalue { i8, i1 } [[TMP634]], 0
14887 // CHECK-NEXT:    store i8 [[TMP635]], i8* [[UCV]], align 1
14888 // CHECK-NEXT:    [[TMP636:%.*]] = load i8, i8* [[UCE]], align 1
14889 // CHECK-NEXT:    [[TMP637:%.*]] = load i8, i8* [[UCD]], align 1
14890 // CHECK-NEXT:    [[TMP638:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP636]], i8 [[TMP637]] acquire acquire, align 1
14891 // CHECK-NEXT:    [[TMP639:%.*]] = extractvalue { i8, i1 } [[TMP638]], 0
14892 // CHECK-NEXT:    store i8 [[TMP639]], i8* [[UCV]], align 1
14893 // CHECK-NEXT:    [[TMP640:%.*]] = load i8, i8* [[UCE]], align 1
14894 // CHECK-NEXT:    [[TMP641:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP640]] acquire, align 1
14895 // CHECK-NEXT:    [[TMP642:%.*]] = icmp ugt i8 [[TMP641]], [[TMP640]]
14896 // CHECK-NEXT:    [[TMP643:%.*]] = select i1 [[TMP642]], i8 [[TMP640]], i8 [[TMP641]]
14897 // CHECK-NEXT:    store i8 [[TMP643]], i8* [[UCV]], align 1
14898 // CHECK-NEXT:    [[TMP644:%.*]] = load i8, i8* [[UCE]], align 1
14899 // CHECK-NEXT:    [[TMP645:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP644]] acquire, align 1
14900 // CHECK-NEXT:    [[TMP646:%.*]] = icmp ult i8 [[TMP645]], [[TMP644]]
14901 // CHECK-NEXT:    [[TMP647:%.*]] = select i1 [[TMP646]], i8 [[TMP644]], i8 [[TMP645]]
14902 // CHECK-NEXT:    store i8 [[TMP647]], i8* [[UCV]], align 1
14903 // CHECK-NEXT:    [[TMP648:%.*]] = load i8, i8* [[UCE]], align 1
14904 // CHECK-NEXT:    [[TMP649:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP648]] acquire, align 1
14905 // CHECK-NEXT:    [[TMP650:%.*]] = icmp ult i8 [[TMP649]], [[TMP648]]
14906 // CHECK-NEXT:    [[TMP651:%.*]] = select i1 [[TMP650]], i8 [[TMP648]], i8 [[TMP649]]
14907 // CHECK-NEXT:    store i8 [[TMP651]], i8* [[UCV]], align 1
14908 // CHECK-NEXT:    [[TMP652:%.*]] = load i8, i8* [[UCE]], align 1
14909 // CHECK-NEXT:    [[TMP653:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP652]] acquire, align 1
14910 // CHECK-NEXT:    [[TMP654:%.*]] = icmp ugt i8 [[TMP653]], [[TMP652]]
14911 // CHECK-NEXT:    [[TMP655:%.*]] = select i1 [[TMP654]], i8 [[TMP652]], i8 [[TMP653]]
14912 // CHECK-NEXT:    store i8 [[TMP655]], i8* [[UCV]], align 1
14913 // CHECK-NEXT:    [[TMP656:%.*]] = load i8, i8* [[UCE]], align 1
14914 // CHECK-NEXT:    [[TMP657:%.*]] = load i8, i8* [[UCD]], align 1
14915 // CHECK-NEXT:    [[TMP658:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP656]], i8 [[TMP657]] acquire acquire, align 1
14916 // CHECK-NEXT:    [[TMP659:%.*]] = extractvalue { i8, i1 } [[TMP658]], 0
14917 // CHECK-NEXT:    [[TMP660:%.*]] = extractvalue { i8, i1 } [[TMP658]], 1
14918 // CHECK-NEXT:    [[TMP661:%.*]] = select i1 [[TMP660]], i8 [[TMP656]], i8 [[TMP659]]
14919 // CHECK-NEXT:    store i8 [[TMP661]], i8* [[UCV]], align 1
14920 // CHECK-NEXT:    [[TMP662:%.*]] = load i8, i8* [[UCE]], align 1
14921 // CHECK-NEXT:    [[TMP663:%.*]] = load i8, i8* [[UCD]], align 1
14922 // CHECK-NEXT:    [[TMP664:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP662]], i8 [[TMP663]] acquire acquire, align 1
14923 // CHECK-NEXT:    [[TMP665:%.*]] = extractvalue { i8, i1 } [[TMP664]], 0
14924 // CHECK-NEXT:    [[TMP666:%.*]] = extractvalue { i8, i1 } [[TMP664]], 1
14925 // CHECK-NEXT:    [[TMP667:%.*]] = select i1 [[TMP666]], i8 [[TMP662]], i8 [[TMP665]]
14926 // CHECK-NEXT:    store i8 [[TMP667]], i8* [[UCV]], align 1
14927 // CHECK-NEXT:    [[TMP668:%.*]] = load i8, i8* [[UCE]], align 1
14928 // CHECK-NEXT:    [[TMP669:%.*]] = load i8, i8* [[UCD]], align 1
14929 // CHECK-NEXT:    [[TMP670:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP668]], i8 [[TMP669]] acquire acquire, align 1
14930 // CHECK-NEXT:    [[TMP671:%.*]] = extractvalue { i8, i1 } [[TMP670]], 0
14931 // CHECK-NEXT:    [[TMP672:%.*]] = extractvalue { i8, i1 } [[TMP670]], 1
14932 // CHECK-NEXT:    br i1 [[TMP672]], label [[UCX_ATOMIC_EXIT61:%.*]], label [[UCX_ATOMIC_CONT62:%.*]]
14933 // CHECK:       ucx.atomic.cont62:
14934 // CHECK-NEXT:    store i8 [[TMP671]], i8* [[UCV]], align 1
14935 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT61]]
14936 // CHECK:       ucx.atomic.exit61:
14937 // CHECK-NEXT:    [[TMP673:%.*]] = load i8, i8* [[UCE]], align 1
14938 // CHECK-NEXT:    [[TMP674:%.*]] = load i8, i8* [[UCD]], align 1
14939 // CHECK-NEXT:    [[TMP675:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP673]], i8 [[TMP674]] acquire acquire, align 1
14940 // CHECK-NEXT:    [[TMP676:%.*]] = extractvalue { i8, i1 } [[TMP675]], 0
14941 // CHECK-NEXT:    [[TMP677:%.*]] = extractvalue { i8, i1 } [[TMP675]], 1
14942 // CHECK-NEXT:    br i1 [[TMP677]], label [[UCX_ATOMIC_EXIT63:%.*]], label [[UCX_ATOMIC_CONT64:%.*]]
14943 // CHECK:       ucx.atomic.cont64:
14944 // CHECK-NEXT:    store i8 [[TMP676]], i8* [[UCV]], align 1
14945 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT63]]
14946 // CHECK:       ucx.atomic.exit63:
14947 // CHECK-NEXT:    [[TMP678:%.*]] = load i8, i8* [[UCE]], align 1
14948 // CHECK-NEXT:    [[TMP679:%.*]] = load i8, i8* [[UCD]], align 1
14949 // CHECK-NEXT:    [[TMP680:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP678]], i8 [[TMP679]] acquire acquire, align 1
14950 // CHECK-NEXT:    [[TMP681:%.*]] = extractvalue { i8, i1 } [[TMP680]], 1
14951 // CHECK-NEXT:    [[TMP682:%.*]] = zext i1 [[TMP681]] to i8
14952 // CHECK-NEXT:    store i8 [[TMP682]], i8* [[UCR]], align 1
14953 // CHECK-NEXT:    [[TMP683:%.*]] = load i8, i8* [[UCE]], align 1
14954 // CHECK-NEXT:    [[TMP684:%.*]] = load i8, i8* [[UCD]], align 1
14955 // CHECK-NEXT:    [[TMP685:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP683]], i8 [[TMP684]] acquire acquire, align 1
14956 // CHECK-NEXT:    [[TMP686:%.*]] = extractvalue { i8, i1 } [[TMP685]], 1
14957 // CHECK-NEXT:    [[TMP687:%.*]] = zext i1 [[TMP686]] to i8
14958 // CHECK-NEXT:    store i8 [[TMP687]], i8* [[UCR]], align 1
14959 // CHECK-NEXT:    [[TMP688:%.*]] = load i8, i8* [[UCE]], align 1
14960 // CHECK-NEXT:    [[TMP689:%.*]] = load i8, i8* [[UCD]], align 1
14961 // CHECK-NEXT:    [[TMP690:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP688]], i8 [[TMP689]] acquire acquire, align 1
14962 // CHECK-NEXT:    [[TMP691:%.*]] = extractvalue { i8, i1 } [[TMP690]], 0
14963 // CHECK-NEXT:    [[TMP692:%.*]] = extractvalue { i8, i1 } [[TMP690]], 1
14964 // CHECK-NEXT:    br i1 [[TMP692]], label [[UCX_ATOMIC_EXIT65:%.*]], label [[UCX_ATOMIC_CONT66:%.*]]
14965 // CHECK:       ucx.atomic.cont66:
14966 // CHECK-NEXT:    store i8 [[TMP691]], i8* [[UCV]], align 1
14967 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT65]]
14968 // CHECK:       ucx.atomic.exit65:
14969 // CHECK-NEXT:    [[TMP693:%.*]] = extractvalue { i8, i1 } [[TMP690]], 1
14970 // CHECK-NEXT:    [[TMP694:%.*]] = zext i1 [[TMP693]] to i8
14971 // CHECK-NEXT:    store i8 [[TMP694]], i8* [[UCR]], align 1
14972 // CHECK-NEXT:    [[TMP695:%.*]] = load i8, i8* [[UCE]], align 1
14973 // CHECK-NEXT:    [[TMP696:%.*]] = load i8, i8* [[UCD]], align 1
14974 // CHECK-NEXT:    [[TMP697:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP695]], i8 [[TMP696]] acquire acquire, align 1
14975 // CHECK-NEXT:    [[TMP698:%.*]] = extractvalue { i8, i1 } [[TMP697]], 0
14976 // CHECK-NEXT:    [[TMP699:%.*]] = extractvalue { i8, i1 } [[TMP697]], 1
14977 // CHECK-NEXT:    br i1 [[TMP699]], label [[UCX_ATOMIC_EXIT67:%.*]], label [[UCX_ATOMIC_CONT68:%.*]]
14978 // CHECK:       ucx.atomic.cont68:
14979 // CHECK-NEXT:    store i8 [[TMP698]], i8* [[UCV]], align 1
14980 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT67]]
14981 // CHECK:       ucx.atomic.exit67:
14982 // CHECK-NEXT:    [[TMP700:%.*]] = extractvalue { i8, i1 } [[TMP697]], 1
14983 // CHECK-NEXT:    [[TMP701:%.*]] = zext i1 [[TMP700]] to i8
14984 // CHECK-NEXT:    store i8 [[TMP701]], i8* [[UCR]], align 1
14985 // CHECK-NEXT:    [[TMP702:%.*]] = load i8, i8* [[UCE]], align 1
14986 // CHECK-NEXT:    [[TMP703:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP702]] monotonic, align 1
14987 // CHECK-NEXT:    store i8 [[TMP703]], i8* [[UCV]], align 1
14988 // CHECK-NEXT:    [[TMP704:%.*]] = load i8, i8* [[UCE]], align 1
14989 // CHECK-NEXT:    [[TMP705:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP704]] monotonic, align 1
14990 // CHECK-NEXT:    store i8 [[TMP705]], i8* [[UCV]], align 1
14991 // CHECK-NEXT:    [[TMP706:%.*]] = load i8, i8* [[UCE]], align 1
14992 // CHECK-NEXT:    [[TMP707:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP706]] monotonic, align 1
14993 // CHECK-NEXT:    store i8 [[TMP707]], i8* [[UCV]], align 1
14994 // CHECK-NEXT:    [[TMP708:%.*]] = load i8, i8* [[UCE]], align 1
14995 // CHECK-NEXT:    [[TMP709:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP708]] monotonic, align 1
14996 // CHECK-NEXT:    store i8 [[TMP709]], i8* [[UCV]], align 1
14997 // CHECK-NEXT:    [[TMP710:%.*]] = load i8, i8* [[UCE]], align 1
14998 // CHECK-NEXT:    [[TMP711:%.*]] = load i8, i8* [[UCD]], align 1
14999 // CHECK-NEXT:    [[TMP712:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP710]], i8 [[TMP711]] monotonic monotonic, align 1
15000 // CHECK-NEXT:    [[TMP713:%.*]] = extractvalue { i8, i1 } [[TMP712]], 0
15001 // CHECK-NEXT:    store i8 [[TMP713]], i8* [[UCV]], align 1
15002 // CHECK-NEXT:    [[TMP714:%.*]] = load i8, i8* [[UCE]], align 1
15003 // CHECK-NEXT:    [[TMP715:%.*]] = load i8, i8* [[UCD]], align 1
15004 // CHECK-NEXT:    [[TMP716:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP714]], i8 [[TMP715]] monotonic monotonic, align 1
15005 // CHECK-NEXT:    [[TMP717:%.*]] = extractvalue { i8, i1 } [[TMP716]], 0
15006 // CHECK-NEXT:    store i8 [[TMP717]], i8* [[UCV]], align 1
15007 // CHECK-NEXT:    [[TMP718:%.*]] = load i8, i8* [[UCE]], align 1
15008 // CHECK-NEXT:    [[TMP719:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP718]] monotonic, align 1
15009 // CHECK-NEXT:    [[TMP720:%.*]] = icmp ugt i8 [[TMP719]], [[TMP718]]
15010 // CHECK-NEXT:    [[TMP721:%.*]] = select i1 [[TMP720]], i8 [[TMP718]], i8 [[TMP719]]
15011 // CHECK-NEXT:    store i8 [[TMP721]], i8* [[UCV]], align 1
15012 // CHECK-NEXT:    [[TMP722:%.*]] = load i8, i8* [[UCE]], align 1
15013 // CHECK-NEXT:    [[TMP723:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP722]] monotonic, align 1
15014 // CHECK-NEXT:    [[TMP724:%.*]] = icmp ult i8 [[TMP723]], [[TMP722]]
15015 // CHECK-NEXT:    [[TMP725:%.*]] = select i1 [[TMP724]], i8 [[TMP722]], i8 [[TMP723]]
15016 // CHECK-NEXT:    store i8 [[TMP725]], i8* [[UCV]], align 1
15017 // CHECK-NEXT:    [[TMP726:%.*]] = load i8, i8* [[UCE]], align 1
15018 // CHECK-NEXT:    [[TMP727:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP726]] monotonic, align 1
15019 // CHECK-NEXT:    [[TMP728:%.*]] = icmp ult i8 [[TMP727]], [[TMP726]]
15020 // CHECK-NEXT:    [[TMP729:%.*]] = select i1 [[TMP728]], i8 [[TMP726]], i8 [[TMP727]]
15021 // CHECK-NEXT:    store i8 [[TMP729]], i8* [[UCV]], align 1
15022 // CHECK-NEXT:    [[TMP730:%.*]] = load i8, i8* [[UCE]], align 1
15023 // CHECK-NEXT:    [[TMP731:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP730]] monotonic, align 1
15024 // CHECK-NEXT:    [[TMP732:%.*]] = icmp ugt i8 [[TMP731]], [[TMP730]]
15025 // CHECK-NEXT:    [[TMP733:%.*]] = select i1 [[TMP732]], i8 [[TMP730]], i8 [[TMP731]]
15026 // CHECK-NEXT:    store i8 [[TMP733]], i8* [[UCV]], align 1
15027 // CHECK-NEXT:    [[TMP734:%.*]] = load i8, i8* [[UCE]], align 1
15028 // CHECK-NEXT:    [[TMP735:%.*]] = load i8, i8* [[UCD]], align 1
15029 // CHECK-NEXT:    [[TMP736:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP734]], i8 [[TMP735]] monotonic monotonic, align 1
15030 // CHECK-NEXT:    [[TMP737:%.*]] = extractvalue { i8, i1 } [[TMP736]], 0
15031 // CHECK-NEXT:    [[TMP738:%.*]] = extractvalue { i8, i1 } [[TMP736]], 1
15032 // CHECK-NEXT:    [[TMP739:%.*]] = select i1 [[TMP738]], i8 [[TMP734]], i8 [[TMP737]]
15033 // CHECK-NEXT:    store i8 [[TMP739]], i8* [[UCV]], align 1
15034 // CHECK-NEXT:    [[TMP740:%.*]] = load i8, i8* [[UCE]], align 1
15035 // CHECK-NEXT:    [[TMP741:%.*]] = load i8, i8* [[UCD]], align 1
15036 // CHECK-NEXT:    [[TMP742:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP740]], i8 [[TMP741]] monotonic monotonic, align 1
15037 // CHECK-NEXT:    [[TMP743:%.*]] = extractvalue { i8, i1 } [[TMP742]], 0
15038 // CHECK-NEXT:    [[TMP744:%.*]] = extractvalue { i8, i1 } [[TMP742]], 1
15039 // CHECK-NEXT:    [[TMP745:%.*]] = select i1 [[TMP744]], i8 [[TMP740]], i8 [[TMP743]]
15040 // CHECK-NEXT:    store i8 [[TMP745]], i8* [[UCV]], align 1
15041 // CHECK-NEXT:    [[TMP746:%.*]] = load i8, i8* [[UCE]], align 1
15042 // CHECK-NEXT:    [[TMP747:%.*]] = load i8, i8* [[UCD]], align 1
15043 // CHECK-NEXT:    [[TMP748:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP746]], i8 [[TMP747]] monotonic monotonic, align 1
15044 // CHECK-NEXT:    [[TMP749:%.*]] = extractvalue { i8, i1 } [[TMP748]], 0
15045 // CHECK-NEXT:    [[TMP750:%.*]] = extractvalue { i8, i1 } [[TMP748]], 1
15046 // CHECK-NEXT:    br i1 [[TMP750]], label [[UCX_ATOMIC_EXIT69:%.*]], label [[UCX_ATOMIC_CONT70:%.*]]
15047 // CHECK:       ucx.atomic.cont70:
15048 // CHECK-NEXT:    store i8 [[TMP749]], i8* [[UCV]], align 1
15049 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT69]]
15050 // CHECK:       ucx.atomic.exit69:
15051 // CHECK-NEXT:    [[TMP751:%.*]] = load i8, i8* [[UCE]], align 1
15052 // CHECK-NEXT:    [[TMP752:%.*]] = load i8, i8* [[UCD]], align 1
15053 // CHECK-NEXT:    [[TMP753:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP751]], i8 [[TMP752]] monotonic monotonic, align 1
15054 // CHECK-NEXT:    [[TMP754:%.*]] = extractvalue { i8, i1 } [[TMP753]], 0
15055 // CHECK-NEXT:    [[TMP755:%.*]] = extractvalue { i8, i1 } [[TMP753]], 1
15056 // CHECK-NEXT:    br i1 [[TMP755]], label [[UCX_ATOMIC_EXIT71:%.*]], label [[UCX_ATOMIC_CONT72:%.*]]
15057 // CHECK:       ucx.atomic.cont72:
15058 // CHECK-NEXT:    store i8 [[TMP754]], i8* [[UCV]], align 1
15059 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT71]]
15060 // CHECK:       ucx.atomic.exit71:
15061 // CHECK-NEXT:    [[TMP756:%.*]] = load i8, i8* [[UCE]], align 1
15062 // CHECK-NEXT:    [[TMP757:%.*]] = load i8, i8* [[UCD]], align 1
15063 // CHECK-NEXT:    [[TMP758:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP756]], i8 [[TMP757]] monotonic monotonic, align 1
15064 // CHECK-NEXT:    [[TMP759:%.*]] = extractvalue { i8, i1 } [[TMP758]], 1
15065 // CHECK-NEXT:    [[TMP760:%.*]] = zext i1 [[TMP759]] to i8
15066 // CHECK-NEXT:    store i8 [[TMP760]], i8* [[UCR]], align 1
15067 // CHECK-NEXT:    [[TMP761:%.*]] = load i8, i8* [[UCE]], align 1
15068 // CHECK-NEXT:    [[TMP762:%.*]] = load i8, i8* [[UCD]], align 1
15069 // CHECK-NEXT:    [[TMP763:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP761]], i8 [[TMP762]] monotonic monotonic, align 1
15070 // CHECK-NEXT:    [[TMP764:%.*]] = extractvalue { i8, i1 } [[TMP763]], 1
15071 // CHECK-NEXT:    [[TMP765:%.*]] = zext i1 [[TMP764]] to i8
15072 // CHECK-NEXT:    store i8 [[TMP765]], i8* [[UCR]], align 1
15073 // CHECK-NEXT:    [[TMP766:%.*]] = load i8, i8* [[UCE]], align 1
15074 // CHECK-NEXT:    [[TMP767:%.*]] = load i8, i8* [[UCD]], align 1
15075 // CHECK-NEXT:    [[TMP768:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP766]], i8 [[TMP767]] monotonic monotonic, align 1
15076 // CHECK-NEXT:    [[TMP769:%.*]] = extractvalue { i8, i1 } [[TMP768]], 0
15077 // CHECK-NEXT:    [[TMP770:%.*]] = extractvalue { i8, i1 } [[TMP768]], 1
15078 // CHECK-NEXT:    br i1 [[TMP770]], label [[UCX_ATOMIC_EXIT73:%.*]], label [[UCX_ATOMIC_CONT74:%.*]]
15079 // CHECK:       ucx.atomic.cont74:
15080 // CHECK-NEXT:    store i8 [[TMP769]], i8* [[UCV]], align 1
15081 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT73]]
15082 // CHECK:       ucx.atomic.exit73:
15083 // CHECK-NEXT:    [[TMP771:%.*]] = extractvalue { i8, i1 } [[TMP768]], 1
15084 // CHECK-NEXT:    [[TMP772:%.*]] = zext i1 [[TMP771]] to i8
15085 // CHECK-NEXT:    store i8 [[TMP772]], i8* [[UCR]], align 1
15086 // CHECK-NEXT:    [[TMP773:%.*]] = load i8, i8* [[UCE]], align 1
15087 // CHECK-NEXT:    [[TMP774:%.*]] = load i8, i8* [[UCD]], align 1
15088 // CHECK-NEXT:    [[TMP775:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP773]], i8 [[TMP774]] monotonic monotonic, align 1
15089 // CHECK-NEXT:    [[TMP776:%.*]] = extractvalue { i8, i1 } [[TMP775]], 0
15090 // CHECK-NEXT:    [[TMP777:%.*]] = extractvalue { i8, i1 } [[TMP775]], 1
15091 // CHECK-NEXT:    br i1 [[TMP777]], label [[UCX_ATOMIC_EXIT75:%.*]], label [[UCX_ATOMIC_CONT76:%.*]]
15092 // CHECK:       ucx.atomic.cont76:
15093 // CHECK-NEXT:    store i8 [[TMP776]], i8* [[UCV]], align 1
15094 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT75]]
15095 // CHECK:       ucx.atomic.exit75:
15096 // CHECK-NEXT:    [[TMP778:%.*]] = extractvalue { i8, i1 } [[TMP775]], 1
15097 // CHECK-NEXT:    [[TMP779:%.*]] = zext i1 [[TMP778]] to i8
15098 // CHECK-NEXT:    store i8 [[TMP779]], i8* [[UCR]], align 1
15099 // CHECK-NEXT:    [[TMP780:%.*]] = load i8, i8* [[UCE]], align 1
15100 // CHECK-NEXT:    [[TMP781:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP780]] release, align 1
15101 // CHECK-NEXT:    store i8 [[TMP781]], i8* [[UCV]], align 1
15102 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15103 // CHECK-NEXT:    [[TMP782:%.*]] = load i8, i8* [[UCE]], align 1
15104 // CHECK-NEXT:    [[TMP783:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP782]] release, align 1
15105 // CHECK-NEXT:    store i8 [[TMP783]], i8* [[UCV]], align 1
15106 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15107 // CHECK-NEXT:    [[TMP784:%.*]] = load i8, i8* [[UCE]], align 1
15108 // CHECK-NEXT:    [[TMP785:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP784]] release, align 1
15109 // CHECK-NEXT:    store i8 [[TMP785]], i8* [[UCV]], align 1
15110 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15111 // CHECK-NEXT:    [[TMP786:%.*]] = load i8, i8* [[UCE]], align 1
15112 // CHECK-NEXT:    [[TMP787:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP786]] release, align 1
15113 // CHECK-NEXT:    store i8 [[TMP787]], i8* [[UCV]], align 1
15114 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15115 // CHECK-NEXT:    [[TMP788:%.*]] = load i8, i8* [[UCE]], align 1
15116 // CHECK-NEXT:    [[TMP789:%.*]] = load i8, i8* [[UCD]], align 1
15117 // CHECK-NEXT:    [[TMP790:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP788]], i8 [[TMP789]] release monotonic, align 1
15118 // CHECK-NEXT:    [[TMP791:%.*]] = extractvalue { i8, i1 } [[TMP790]], 0
15119 // CHECK-NEXT:    store i8 [[TMP791]], i8* [[UCV]], align 1
15120 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15121 // CHECK-NEXT:    [[TMP792:%.*]] = load i8, i8* [[UCE]], align 1
15122 // CHECK-NEXT:    [[TMP793:%.*]] = load i8, i8* [[UCD]], align 1
15123 // CHECK-NEXT:    [[TMP794:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP792]], i8 [[TMP793]] release monotonic, align 1
15124 // CHECK-NEXT:    [[TMP795:%.*]] = extractvalue { i8, i1 } [[TMP794]], 0
15125 // CHECK-NEXT:    store i8 [[TMP795]], i8* [[UCV]], align 1
15126 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15127 // CHECK-NEXT:    [[TMP796:%.*]] = load i8, i8* [[UCE]], align 1
15128 // CHECK-NEXT:    [[TMP797:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP796]] release, align 1
15129 // CHECK-NEXT:    [[TMP798:%.*]] = icmp ugt i8 [[TMP797]], [[TMP796]]
15130 // CHECK-NEXT:    [[TMP799:%.*]] = select i1 [[TMP798]], i8 [[TMP796]], i8 [[TMP797]]
15131 // CHECK-NEXT:    store i8 [[TMP799]], i8* [[UCV]], align 1
15132 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15133 // CHECK-NEXT:    [[TMP800:%.*]] = load i8, i8* [[UCE]], align 1
15134 // CHECK-NEXT:    [[TMP801:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP800]] release, align 1
15135 // CHECK-NEXT:    [[TMP802:%.*]] = icmp ult i8 [[TMP801]], [[TMP800]]
15136 // CHECK-NEXT:    [[TMP803:%.*]] = select i1 [[TMP802]], i8 [[TMP800]], i8 [[TMP801]]
15137 // CHECK-NEXT:    store i8 [[TMP803]], i8* [[UCV]], align 1
15138 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15139 // CHECK-NEXT:    [[TMP804:%.*]] = load i8, i8* [[UCE]], align 1
15140 // CHECK-NEXT:    [[TMP805:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP804]] release, align 1
15141 // CHECK-NEXT:    [[TMP806:%.*]] = icmp ult i8 [[TMP805]], [[TMP804]]
15142 // CHECK-NEXT:    [[TMP807:%.*]] = select i1 [[TMP806]], i8 [[TMP804]], i8 [[TMP805]]
15143 // CHECK-NEXT:    store i8 [[TMP807]], i8* [[UCV]], align 1
15144 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15145 // CHECK-NEXT:    [[TMP808:%.*]] = load i8, i8* [[UCE]], align 1
15146 // CHECK-NEXT:    [[TMP809:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP808]] release, align 1
15147 // CHECK-NEXT:    [[TMP810:%.*]] = icmp ugt i8 [[TMP809]], [[TMP808]]
15148 // CHECK-NEXT:    [[TMP811:%.*]] = select i1 [[TMP810]], i8 [[TMP808]], i8 [[TMP809]]
15149 // CHECK-NEXT:    store i8 [[TMP811]], i8* [[UCV]], align 1
15150 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15151 // CHECK-NEXT:    [[TMP812:%.*]] = load i8, i8* [[UCE]], align 1
15152 // CHECK-NEXT:    [[TMP813:%.*]] = load i8, i8* [[UCD]], align 1
15153 // CHECK-NEXT:    [[TMP814:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP812]], i8 [[TMP813]] release monotonic, align 1
15154 // CHECK-NEXT:    [[TMP815:%.*]] = extractvalue { i8, i1 } [[TMP814]], 0
15155 // CHECK-NEXT:    [[TMP816:%.*]] = extractvalue { i8, i1 } [[TMP814]], 1
15156 // CHECK-NEXT:    [[TMP817:%.*]] = select i1 [[TMP816]], i8 [[TMP812]], i8 [[TMP815]]
15157 // CHECK-NEXT:    store i8 [[TMP817]], i8* [[UCV]], align 1
15158 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15159 // CHECK-NEXT:    [[TMP818:%.*]] = load i8, i8* [[UCE]], align 1
15160 // CHECK-NEXT:    [[TMP819:%.*]] = load i8, i8* [[UCD]], align 1
15161 // CHECK-NEXT:    [[TMP820:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP818]], i8 [[TMP819]] release monotonic, align 1
15162 // CHECK-NEXT:    [[TMP821:%.*]] = extractvalue { i8, i1 } [[TMP820]], 0
15163 // CHECK-NEXT:    [[TMP822:%.*]] = extractvalue { i8, i1 } [[TMP820]], 1
15164 // CHECK-NEXT:    [[TMP823:%.*]] = select i1 [[TMP822]], i8 [[TMP818]], i8 [[TMP821]]
15165 // CHECK-NEXT:    store i8 [[TMP823]], i8* [[UCV]], align 1
15166 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15167 // CHECK-NEXT:    [[TMP824:%.*]] = load i8, i8* [[UCE]], align 1
15168 // CHECK-NEXT:    [[TMP825:%.*]] = load i8, i8* [[UCD]], align 1
15169 // CHECK-NEXT:    [[TMP826:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP824]], i8 [[TMP825]] release monotonic, align 1
15170 // CHECK-NEXT:    [[TMP827:%.*]] = extractvalue { i8, i1 } [[TMP826]], 0
15171 // CHECK-NEXT:    [[TMP828:%.*]] = extractvalue { i8, i1 } [[TMP826]], 1
15172 // CHECK-NEXT:    br i1 [[TMP828]], label [[UCX_ATOMIC_EXIT77:%.*]], label [[UCX_ATOMIC_CONT78:%.*]]
15173 // CHECK:       ucx.atomic.cont78:
15174 // CHECK-NEXT:    store i8 [[TMP827]], i8* [[UCV]], align 1
15175 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT77]]
15176 // CHECK:       ucx.atomic.exit77:
15177 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15178 // CHECK-NEXT:    [[TMP829:%.*]] = load i8, i8* [[UCE]], align 1
15179 // CHECK-NEXT:    [[TMP830:%.*]] = load i8, i8* [[UCD]], align 1
15180 // CHECK-NEXT:    [[TMP831:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP829]], i8 [[TMP830]] release monotonic, align 1
15181 // CHECK-NEXT:    [[TMP832:%.*]] = extractvalue { i8, i1 } [[TMP831]], 0
15182 // CHECK-NEXT:    [[TMP833:%.*]] = extractvalue { i8, i1 } [[TMP831]], 1
15183 // CHECK-NEXT:    br i1 [[TMP833]], label [[UCX_ATOMIC_EXIT79:%.*]], label [[UCX_ATOMIC_CONT80:%.*]]
15184 // CHECK:       ucx.atomic.cont80:
15185 // CHECK-NEXT:    store i8 [[TMP832]], i8* [[UCV]], align 1
15186 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT79]]
15187 // CHECK:       ucx.atomic.exit79:
15188 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15189 // CHECK-NEXT:    [[TMP834:%.*]] = load i8, i8* [[UCE]], align 1
15190 // CHECK-NEXT:    [[TMP835:%.*]] = load i8, i8* [[UCD]], align 1
15191 // CHECK-NEXT:    [[TMP836:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP834]], i8 [[TMP835]] release monotonic, align 1
15192 // CHECK-NEXT:    [[TMP837:%.*]] = extractvalue { i8, i1 } [[TMP836]], 1
15193 // CHECK-NEXT:    [[TMP838:%.*]] = zext i1 [[TMP837]] to i8
15194 // CHECK-NEXT:    store i8 [[TMP838]], i8* [[UCR]], align 1
15195 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15196 // CHECK-NEXT:    [[TMP839:%.*]] = load i8, i8* [[UCE]], align 1
15197 // CHECK-NEXT:    [[TMP840:%.*]] = load i8, i8* [[UCD]], align 1
15198 // CHECK-NEXT:    [[TMP841:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP839]], i8 [[TMP840]] release monotonic, align 1
15199 // CHECK-NEXT:    [[TMP842:%.*]] = extractvalue { i8, i1 } [[TMP841]], 1
15200 // CHECK-NEXT:    [[TMP843:%.*]] = zext i1 [[TMP842]] to i8
15201 // CHECK-NEXT:    store i8 [[TMP843]], i8* [[UCR]], align 1
15202 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15203 // CHECK-NEXT:    [[TMP844:%.*]] = load i8, i8* [[UCE]], align 1
15204 // CHECK-NEXT:    [[TMP845:%.*]] = load i8, i8* [[UCD]], align 1
15205 // CHECK-NEXT:    [[TMP846:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP844]], i8 [[TMP845]] release monotonic, align 1
15206 // CHECK-NEXT:    [[TMP847:%.*]] = extractvalue { i8, i1 } [[TMP846]], 0
15207 // CHECK-NEXT:    [[TMP848:%.*]] = extractvalue { i8, i1 } [[TMP846]], 1
15208 // CHECK-NEXT:    br i1 [[TMP848]], label [[UCX_ATOMIC_EXIT81:%.*]], label [[UCX_ATOMIC_CONT82:%.*]]
15209 // CHECK:       ucx.atomic.cont82:
15210 // CHECK-NEXT:    store i8 [[TMP847]], i8* [[UCV]], align 1
15211 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT81]]
15212 // CHECK:       ucx.atomic.exit81:
15213 // CHECK-NEXT:    [[TMP849:%.*]] = extractvalue { i8, i1 } [[TMP846]], 1
15214 // CHECK-NEXT:    [[TMP850:%.*]] = zext i1 [[TMP849]] to i8
15215 // CHECK-NEXT:    store i8 [[TMP850]], i8* [[UCR]], align 1
15216 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15217 // CHECK-NEXT:    [[TMP851:%.*]] = load i8, i8* [[UCE]], align 1
15218 // CHECK-NEXT:    [[TMP852:%.*]] = load i8, i8* [[UCD]], align 1
15219 // CHECK-NEXT:    [[TMP853:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP851]], i8 [[TMP852]] release monotonic, align 1
15220 // CHECK-NEXT:    [[TMP854:%.*]] = extractvalue { i8, i1 } [[TMP853]], 0
15221 // CHECK-NEXT:    [[TMP855:%.*]] = extractvalue { i8, i1 } [[TMP853]], 1
15222 // CHECK-NEXT:    br i1 [[TMP855]], label [[UCX_ATOMIC_EXIT83:%.*]], label [[UCX_ATOMIC_CONT84:%.*]]
15223 // CHECK:       ucx.atomic.cont84:
15224 // CHECK-NEXT:    store i8 [[TMP854]], i8* [[UCV]], align 1
15225 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT83]]
15226 // CHECK:       ucx.atomic.exit83:
15227 // CHECK-NEXT:    [[TMP856:%.*]] = extractvalue { i8, i1 } [[TMP853]], 1
15228 // CHECK-NEXT:    [[TMP857:%.*]] = zext i1 [[TMP856]] to i8
15229 // CHECK-NEXT:    store i8 [[TMP857]], i8* [[UCR]], align 1
15230 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15231 // CHECK-NEXT:    [[TMP858:%.*]] = load i8, i8* [[UCE]], align 1
15232 // CHECK-NEXT:    [[TMP859:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP858]] seq_cst, align 1
15233 // CHECK-NEXT:    store i8 [[TMP859]], i8* [[UCV]], align 1
15234 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15235 // CHECK-NEXT:    [[TMP860:%.*]] = load i8, i8* [[UCE]], align 1
15236 // CHECK-NEXT:    [[TMP861:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP860]] seq_cst, align 1
15237 // CHECK-NEXT:    store i8 [[TMP861]], i8* [[UCV]], align 1
15238 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15239 // CHECK-NEXT:    [[TMP862:%.*]] = load i8, i8* [[UCE]], align 1
15240 // CHECK-NEXT:    [[TMP863:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP862]] seq_cst, align 1
15241 // CHECK-NEXT:    store i8 [[TMP863]], i8* [[UCV]], align 1
15242 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15243 // CHECK-NEXT:    [[TMP864:%.*]] = load i8, i8* [[UCE]], align 1
15244 // CHECK-NEXT:    [[TMP865:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP864]] seq_cst, align 1
15245 // CHECK-NEXT:    store i8 [[TMP865]], i8* [[UCV]], align 1
15246 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15247 // CHECK-NEXT:    [[TMP866:%.*]] = load i8, i8* [[UCE]], align 1
15248 // CHECK-NEXT:    [[TMP867:%.*]] = load i8, i8* [[UCD]], align 1
15249 // CHECK-NEXT:    [[TMP868:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP866]], i8 [[TMP867]] seq_cst seq_cst, align 1
15250 // CHECK-NEXT:    [[TMP869:%.*]] = extractvalue { i8, i1 } [[TMP868]], 0
15251 // CHECK-NEXT:    store i8 [[TMP869]], i8* [[UCV]], align 1
15252 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15253 // CHECK-NEXT:    [[TMP870:%.*]] = load i8, i8* [[UCE]], align 1
15254 // CHECK-NEXT:    [[TMP871:%.*]] = load i8, i8* [[UCD]], align 1
15255 // CHECK-NEXT:    [[TMP872:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP870]], i8 [[TMP871]] seq_cst seq_cst, align 1
15256 // CHECK-NEXT:    [[TMP873:%.*]] = extractvalue { i8, i1 } [[TMP872]], 0
15257 // CHECK-NEXT:    store i8 [[TMP873]], i8* [[UCV]], align 1
15258 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15259 // CHECK-NEXT:    [[TMP874:%.*]] = load i8, i8* [[UCE]], align 1
15260 // CHECK-NEXT:    [[TMP875:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP874]] seq_cst, align 1
15261 // CHECK-NEXT:    [[TMP876:%.*]] = icmp ugt i8 [[TMP875]], [[TMP874]]
15262 // CHECK-NEXT:    [[TMP877:%.*]] = select i1 [[TMP876]], i8 [[TMP874]], i8 [[TMP875]]
15263 // CHECK-NEXT:    store i8 [[TMP877]], i8* [[UCV]], align 1
15264 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15265 // CHECK-NEXT:    [[TMP878:%.*]] = load i8, i8* [[UCE]], align 1
15266 // CHECK-NEXT:    [[TMP879:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP878]] seq_cst, align 1
15267 // CHECK-NEXT:    [[TMP880:%.*]] = icmp ult i8 [[TMP879]], [[TMP878]]
15268 // CHECK-NEXT:    [[TMP881:%.*]] = select i1 [[TMP880]], i8 [[TMP878]], i8 [[TMP879]]
15269 // CHECK-NEXT:    store i8 [[TMP881]], i8* [[UCV]], align 1
15270 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15271 // CHECK-NEXT:    [[TMP882:%.*]] = load i8, i8* [[UCE]], align 1
15272 // CHECK-NEXT:    [[TMP883:%.*]] = atomicrmw umin i8* [[UCX]], i8 [[TMP882]] seq_cst, align 1
15273 // CHECK-NEXT:    [[TMP884:%.*]] = icmp ult i8 [[TMP883]], [[TMP882]]
15274 // CHECK-NEXT:    [[TMP885:%.*]] = select i1 [[TMP884]], i8 [[TMP882]], i8 [[TMP883]]
15275 // CHECK-NEXT:    store i8 [[TMP885]], i8* [[UCV]], align 1
15276 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15277 // CHECK-NEXT:    [[TMP886:%.*]] = load i8, i8* [[UCE]], align 1
15278 // CHECK-NEXT:    [[TMP887:%.*]] = atomicrmw umax i8* [[UCX]], i8 [[TMP886]] seq_cst, align 1
15279 // CHECK-NEXT:    [[TMP888:%.*]] = icmp ugt i8 [[TMP887]], [[TMP886]]
15280 // CHECK-NEXT:    [[TMP889:%.*]] = select i1 [[TMP888]], i8 [[TMP886]], i8 [[TMP887]]
15281 // CHECK-NEXT:    store i8 [[TMP889]], i8* [[UCV]], align 1
15282 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15283 // CHECK-NEXT:    [[TMP890:%.*]] = load i8, i8* [[UCE]], align 1
15284 // CHECK-NEXT:    [[TMP891:%.*]] = load i8, i8* [[UCD]], align 1
15285 // CHECK-NEXT:    [[TMP892:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP890]], i8 [[TMP891]] seq_cst seq_cst, align 1
15286 // CHECK-NEXT:    [[TMP893:%.*]] = extractvalue { i8, i1 } [[TMP892]], 0
15287 // CHECK-NEXT:    [[TMP894:%.*]] = extractvalue { i8, i1 } [[TMP892]], 1
15288 // CHECK-NEXT:    [[TMP895:%.*]] = select i1 [[TMP894]], i8 [[TMP890]], i8 [[TMP893]]
15289 // CHECK-NEXT:    store i8 [[TMP895]], i8* [[UCV]], align 1
15290 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15291 // CHECK-NEXT:    [[TMP896:%.*]] = load i8, i8* [[UCE]], align 1
15292 // CHECK-NEXT:    [[TMP897:%.*]] = load i8, i8* [[UCD]], align 1
15293 // CHECK-NEXT:    [[TMP898:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP896]], i8 [[TMP897]] seq_cst seq_cst, align 1
15294 // CHECK-NEXT:    [[TMP899:%.*]] = extractvalue { i8, i1 } [[TMP898]], 0
15295 // CHECK-NEXT:    [[TMP900:%.*]] = extractvalue { i8, i1 } [[TMP898]], 1
15296 // CHECK-NEXT:    [[TMP901:%.*]] = select i1 [[TMP900]], i8 [[TMP896]], i8 [[TMP899]]
15297 // CHECK-NEXT:    store i8 [[TMP901]], i8* [[UCV]], align 1
15298 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15299 // CHECK-NEXT:    [[TMP902:%.*]] = load i8, i8* [[UCE]], align 1
15300 // CHECK-NEXT:    [[TMP903:%.*]] = load i8, i8* [[UCD]], align 1
15301 // CHECK-NEXT:    [[TMP904:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP902]], i8 [[TMP903]] seq_cst seq_cst, align 1
15302 // CHECK-NEXT:    [[TMP905:%.*]] = extractvalue { i8, i1 } [[TMP904]], 0
15303 // CHECK-NEXT:    [[TMP906:%.*]] = extractvalue { i8, i1 } [[TMP904]], 1
15304 // CHECK-NEXT:    br i1 [[TMP906]], label [[UCX_ATOMIC_EXIT85:%.*]], label [[UCX_ATOMIC_CONT86:%.*]]
15305 // CHECK:       ucx.atomic.cont86:
15306 // CHECK-NEXT:    store i8 [[TMP905]], i8* [[UCV]], align 1
15307 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT85]]
15308 // CHECK:       ucx.atomic.exit85:
15309 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15310 // CHECK-NEXT:    [[TMP907:%.*]] = load i8, i8* [[UCE]], align 1
15311 // CHECK-NEXT:    [[TMP908:%.*]] = load i8, i8* [[UCD]], align 1
15312 // CHECK-NEXT:    [[TMP909:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP907]], i8 [[TMP908]] seq_cst seq_cst, align 1
15313 // CHECK-NEXT:    [[TMP910:%.*]] = extractvalue { i8, i1 } [[TMP909]], 0
15314 // CHECK-NEXT:    [[TMP911:%.*]] = extractvalue { i8, i1 } [[TMP909]], 1
15315 // CHECK-NEXT:    br i1 [[TMP911]], label [[UCX_ATOMIC_EXIT87:%.*]], label [[UCX_ATOMIC_CONT88:%.*]]
15316 // CHECK:       ucx.atomic.cont88:
15317 // CHECK-NEXT:    store i8 [[TMP910]], i8* [[UCV]], align 1
15318 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT87]]
15319 // CHECK:       ucx.atomic.exit87:
15320 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15321 // CHECK-NEXT:    [[TMP912:%.*]] = load i8, i8* [[UCE]], align 1
15322 // CHECK-NEXT:    [[TMP913:%.*]] = load i8, i8* [[UCD]], align 1
15323 // CHECK-NEXT:    [[TMP914:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP912]], i8 [[TMP913]] seq_cst seq_cst, align 1
15324 // CHECK-NEXT:    [[TMP915:%.*]] = extractvalue { i8, i1 } [[TMP914]], 1
15325 // CHECK-NEXT:    [[TMP916:%.*]] = zext i1 [[TMP915]] to i8
15326 // CHECK-NEXT:    store i8 [[TMP916]], i8* [[UCR]], align 1
15327 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15328 // CHECK-NEXT:    [[TMP917:%.*]] = load i8, i8* [[UCE]], align 1
15329 // CHECK-NEXT:    [[TMP918:%.*]] = load i8, i8* [[UCD]], align 1
15330 // CHECK-NEXT:    [[TMP919:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP917]], i8 [[TMP918]] seq_cst seq_cst, align 1
15331 // CHECK-NEXT:    [[TMP920:%.*]] = extractvalue { i8, i1 } [[TMP919]], 1
15332 // CHECK-NEXT:    [[TMP921:%.*]] = zext i1 [[TMP920]] to i8
15333 // CHECK-NEXT:    store i8 [[TMP921]], i8* [[UCR]], align 1
15334 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15335 // CHECK-NEXT:    [[TMP922:%.*]] = load i8, i8* [[UCE]], align 1
15336 // CHECK-NEXT:    [[TMP923:%.*]] = load i8, i8* [[UCD]], align 1
15337 // CHECK-NEXT:    [[TMP924:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP922]], i8 [[TMP923]] seq_cst seq_cst, align 1
15338 // CHECK-NEXT:    [[TMP925:%.*]] = extractvalue { i8, i1 } [[TMP924]], 0
15339 // CHECK-NEXT:    [[TMP926:%.*]] = extractvalue { i8, i1 } [[TMP924]], 1
15340 // CHECK-NEXT:    br i1 [[TMP926]], label [[UCX_ATOMIC_EXIT89:%.*]], label [[UCX_ATOMIC_CONT90:%.*]]
15341 // CHECK:       ucx.atomic.cont90:
15342 // CHECK-NEXT:    store i8 [[TMP925]], i8* [[UCV]], align 1
15343 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT89]]
15344 // CHECK:       ucx.atomic.exit89:
15345 // CHECK-NEXT:    [[TMP927:%.*]] = extractvalue { i8, i1 } [[TMP924]], 1
15346 // CHECK-NEXT:    [[TMP928:%.*]] = zext i1 [[TMP927]] to i8
15347 // CHECK-NEXT:    store i8 [[TMP928]], i8* [[UCR]], align 1
15348 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15349 // CHECK-NEXT:    [[TMP929:%.*]] = load i8, i8* [[UCE]], align 1
15350 // CHECK-NEXT:    [[TMP930:%.*]] = load i8, i8* [[UCD]], align 1
15351 // CHECK-NEXT:    [[TMP931:%.*]] = cmpxchg i8* [[UCX]], i8 [[TMP929]], i8 [[TMP930]] seq_cst seq_cst, align 1
15352 // CHECK-NEXT:    [[TMP932:%.*]] = extractvalue { i8, i1 } [[TMP931]], 0
15353 // CHECK-NEXT:    [[TMP933:%.*]] = extractvalue { i8, i1 } [[TMP931]], 1
15354 // CHECK-NEXT:    br i1 [[TMP933]], label [[UCX_ATOMIC_EXIT91:%.*]], label [[UCX_ATOMIC_CONT92:%.*]]
15355 // CHECK:       ucx.atomic.cont92:
15356 // CHECK-NEXT:    store i8 [[TMP932]], i8* [[UCV]], align 1
15357 // CHECK-NEXT:    br label [[UCX_ATOMIC_EXIT91]]
15358 // CHECK:       ucx.atomic.exit91:
15359 // CHECK-NEXT:    [[TMP934:%.*]] = extractvalue { i8, i1 } [[TMP931]], 1
15360 // CHECK-NEXT:    [[TMP935:%.*]] = zext i1 [[TMP934]] to i8
15361 // CHECK-NEXT:    store i8 [[TMP935]], i8* [[UCR]], align 1
15362 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15363 // CHECK-NEXT:    [[TMP936:%.*]] = load i16, i16* [[SE]], align 2
15364 // CHECK-NEXT:    [[TMP937:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP936]] monotonic, align 2
15365 // CHECK-NEXT:    store i16 [[TMP937]], i16* [[SV]], align 2
15366 // CHECK-NEXT:    [[TMP938:%.*]] = load i16, i16* [[SE]], align 2
15367 // CHECK-NEXT:    [[TMP939:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP938]] monotonic, align 2
15368 // CHECK-NEXT:    store i16 [[TMP939]], i16* [[SV]], align 2
15369 // CHECK-NEXT:    [[TMP940:%.*]] = load i16, i16* [[SE]], align 2
15370 // CHECK-NEXT:    [[TMP941:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP940]] monotonic, align 2
15371 // CHECK-NEXT:    store i16 [[TMP941]], i16* [[SV]], align 2
15372 // CHECK-NEXT:    [[TMP942:%.*]] = load i16, i16* [[SE]], align 2
15373 // CHECK-NEXT:    [[TMP943:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP942]] monotonic, align 2
15374 // CHECK-NEXT:    store i16 [[TMP943]], i16* [[SV]], align 2
15375 // CHECK-NEXT:    [[TMP944:%.*]] = load i16, i16* [[SE]], align 2
15376 // CHECK-NEXT:    [[TMP945:%.*]] = load i16, i16* [[SD]], align 2
15377 // CHECK-NEXT:    [[TMP946:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP944]], i16 [[TMP945]] monotonic monotonic, align 2
15378 // CHECK-NEXT:    [[TMP947:%.*]] = extractvalue { i16, i1 } [[TMP946]], 0
15379 // CHECK-NEXT:    store i16 [[TMP947]], i16* [[SV]], align 2
15380 // CHECK-NEXT:    [[TMP948:%.*]] = load i16, i16* [[SE]], align 2
15381 // CHECK-NEXT:    [[TMP949:%.*]] = load i16, i16* [[SD]], align 2
15382 // CHECK-NEXT:    [[TMP950:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP948]], i16 [[TMP949]] monotonic monotonic, align 2
15383 // CHECK-NEXT:    [[TMP951:%.*]] = extractvalue { i16, i1 } [[TMP950]], 0
15384 // CHECK-NEXT:    store i16 [[TMP951]], i16* [[SV]], align 2
15385 // CHECK-NEXT:    [[TMP952:%.*]] = load i16, i16* [[SE]], align 2
15386 // CHECK-NEXT:    [[TMP953:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP952]] monotonic, align 2
15387 // CHECK-NEXT:    [[TMP954:%.*]] = icmp sgt i16 [[TMP953]], [[TMP952]]
15388 // CHECK-NEXT:    [[TMP955:%.*]] = select i1 [[TMP954]], i16 [[TMP952]], i16 [[TMP953]]
15389 // CHECK-NEXT:    store i16 [[TMP955]], i16* [[SV]], align 2
15390 // CHECK-NEXT:    [[TMP956:%.*]] = load i16, i16* [[SE]], align 2
15391 // CHECK-NEXT:    [[TMP957:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP956]] monotonic, align 2
15392 // CHECK-NEXT:    [[TMP958:%.*]] = icmp slt i16 [[TMP957]], [[TMP956]]
15393 // CHECK-NEXT:    [[TMP959:%.*]] = select i1 [[TMP958]], i16 [[TMP956]], i16 [[TMP957]]
15394 // CHECK-NEXT:    store i16 [[TMP959]], i16* [[SV]], align 2
15395 // CHECK-NEXT:    [[TMP960:%.*]] = load i16, i16* [[SE]], align 2
15396 // CHECK-NEXT:    [[TMP961:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP960]] monotonic, align 2
15397 // CHECK-NEXT:    [[TMP962:%.*]] = icmp slt i16 [[TMP961]], [[TMP960]]
15398 // CHECK-NEXT:    [[TMP963:%.*]] = select i1 [[TMP962]], i16 [[TMP960]], i16 [[TMP961]]
15399 // CHECK-NEXT:    store i16 [[TMP963]], i16* [[SV]], align 2
15400 // CHECK-NEXT:    [[TMP964:%.*]] = load i16, i16* [[SE]], align 2
15401 // CHECK-NEXT:    [[TMP965:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP964]] monotonic, align 2
15402 // CHECK-NEXT:    [[TMP966:%.*]] = icmp sgt i16 [[TMP965]], [[TMP964]]
15403 // CHECK-NEXT:    [[TMP967:%.*]] = select i1 [[TMP966]], i16 [[TMP964]], i16 [[TMP965]]
15404 // CHECK-NEXT:    store i16 [[TMP967]], i16* [[SV]], align 2
15405 // CHECK-NEXT:    [[TMP968:%.*]] = load i16, i16* [[SE]], align 2
15406 // CHECK-NEXT:    [[TMP969:%.*]] = load i16, i16* [[SD]], align 2
15407 // CHECK-NEXT:    [[TMP970:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP968]], i16 [[TMP969]] monotonic monotonic, align 2
15408 // CHECK-NEXT:    [[TMP971:%.*]] = extractvalue { i16, i1 } [[TMP970]], 0
15409 // CHECK-NEXT:    [[TMP972:%.*]] = extractvalue { i16, i1 } [[TMP970]], 1
15410 // CHECK-NEXT:    [[TMP973:%.*]] = select i1 [[TMP972]], i16 [[TMP968]], i16 [[TMP971]]
15411 // CHECK-NEXT:    store i16 [[TMP973]], i16* [[SV]], align 2
15412 // CHECK-NEXT:    [[TMP974:%.*]] = load i16, i16* [[SE]], align 2
15413 // CHECK-NEXT:    [[TMP975:%.*]] = load i16, i16* [[SD]], align 2
15414 // CHECK-NEXT:    [[TMP976:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP974]], i16 [[TMP975]] monotonic monotonic, align 2
15415 // CHECK-NEXT:    [[TMP977:%.*]] = extractvalue { i16, i1 } [[TMP976]], 0
15416 // CHECK-NEXT:    [[TMP978:%.*]] = extractvalue { i16, i1 } [[TMP976]], 1
15417 // CHECK-NEXT:    [[TMP979:%.*]] = select i1 [[TMP978]], i16 [[TMP974]], i16 [[TMP977]]
15418 // CHECK-NEXT:    store i16 [[TMP979]], i16* [[SV]], align 2
15419 // CHECK-NEXT:    [[TMP980:%.*]] = load i16, i16* [[SE]], align 2
15420 // CHECK-NEXT:    [[TMP981:%.*]] = load i16, i16* [[SD]], align 2
15421 // CHECK-NEXT:    [[TMP982:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP980]], i16 [[TMP981]] monotonic monotonic, align 2
15422 // CHECK-NEXT:    [[TMP983:%.*]] = extractvalue { i16, i1 } [[TMP982]], 0
15423 // CHECK-NEXT:    [[TMP984:%.*]] = extractvalue { i16, i1 } [[TMP982]], 1
15424 // CHECK-NEXT:    br i1 [[TMP984]], label [[SX_ATOMIC_EXIT:%.*]], label [[SX_ATOMIC_CONT:%.*]]
15425 // CHECK:       sx.atomic.cont:
15426 // CHECK-NEXT:    store i16 [[TMP983]], i16* [[SV]], align 2
15427 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT]]
15428 // CHECK:       sx.atomic.exit:
15429 // CHECK-NEXT:    [[TMP985:%.*]] = load i16, i16* [[SE]], align 2
15430 // CHECK-NEXT:    [[TMP986:%.*]] = load i16, i16* [[SD]], align 2
15431 // CHECK-NEXT:    [[TMP987:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP985]], i16 [[TMP986]] monotonic monotonic, align 2
15432 // CHECK-NEXT:    [[TMP988:%.*]] = extractvalue { i16, i1 } [[TMP987]], 0
15433 // CHECK-NEXT:    [[TMP989:%.*]] = extractvalue { i16, i1 } [[TMP987]], 1
15434 // CHECK-NEXT:    br i1 [[TMP989]], label [[SX_ATOMIC_EXIT93:%.*]], label [[SX_ATOMIC_CONT94:%.*]]
15435 // CHECK:       sx.atomic.cont94:
15436 // CHECK-NEXT:    store i16 [[TMP988]], i16* [[SV]], align 2
15437 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT93]]
15438 // CHECK:       sx.atomic.exit93:
15439 // CHECK-NEXT:    [[TMP990:%.*]] = load i16, i16* [[SE]], align 2
15440 // CHECK-NEXT:    [[TMP991:%.*]] = load i16, i16* [[SD]], align 2
15441 // CHECK-NEXT:    [[TMP992:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP990]], i16 [[TMP991]] monotonic monotonic, align 2
15442 // CHECK-NEXT:    [[TMP993:%.*]] = extractvalue { i16, i1 } [[TMP992]], 1
15443 // CHECK-NEXT:    [[TMP994:%.*]] = sext i1 [[TMP993]] to i16
15444 // CHECK-NEXT:    store i16 [[TMP994]], i16* [[SR]], align 2
15445 // CHECK-NEXT:    [[TMP995:%.*]] = load i16, i16* [[SE]], align 2
15446 // CHECK-NEXT:    [[TMP996:%.*]] = load i16, i16* [[SD]], align 2
15447 // CHECK-NEXT:    [[TMP997:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP995]], i16 [[TMP996]] monotonic monotonic, align 2
15448 // CHECK-NEXT:    [[TMP998:%.*]] = extractvalue { i16, i1 } [[TMP997]], 1
15449 // CHECK-NEXT:    [[TMP999:%.*]] = sext i1 [[TMP998]] to i16
15450 // CHECK-NEXT:    store i16 [[TMP999]], i16* [[SR]], align 2
15451 // CHECK-NEXT:    [[TMP1000:%.*]] = load i16, i16* [[SE]], align 2
15452 // CHECK-NEXT:    [[TMP1001:%.*]] = load i16, i16* [[SD]], align 2
15453 // CHECK-NEXT:    [[TMP1002:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1000]], i16 [[TMP1001]] monotonic monotonic, align 2
15454 // CHECK-NEXT:    [[TMP1003:%.*]] = extractvalue { i16, i1 } [[TMP1002]], 0
15455 // CHECK-NEXT:    [[TMP1004:%.*]] = extractvalue { i16, i1 } [[TMP1002]], 1
15456 // CHECK-NEXT:    br i1 [[TMP1004]], label [[SX_ATOMIC_EXIT95:%.*]], label [[SX_ATOMIC_CONT96:%.*]]
15457 // CHECK:       sx.atomic.cont96:
15458 // CHECK-NEXT:    store i16 [[TMP1003]], i16* [[SV]], align 2
15459 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT95]]
15460 // CHECK:       sx.atomic.exit95:
15461 // CHECK-NEXT:    [[TMP1005:%.*]] = extractvalue { i16, i1 } [[TMP1002]], 1
15462 // CHECK-NEXT:    [[TMP1006:%.*]] = sext i1 [[TMP1005]] to i16
15463 // CHECK-NEXT:    store i16 [[TMP1006]], i16* [[SR]], align 2
15464 // CHECK-NEXT:    [[TMP1007:%.*]] = load i16, i16* [[SE]], align 2
15465 // CHECK-NEXT:    [[TMP1008:%.*]] = load i16, i16* [[SD]], align 2
15466 // CHECK-NEXT:    [[TMP1009:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1007]], i16 [[TMP1008]] monotonic monotonic, align 2
15467 // CHECK-NEXT:    [[TMP1010:%.*]] = extractvalue { i16, i1 } [[TMP1009]], 0
15468 // CHECK-NEXT:    [[TMP1011:%.*]] = extractvalue { i16, i1 } [[TMP1009]], 1
15469 // CHECK-NEXT:    br i1 [[TMP1011]], label [[SX_ATOMIC_EXIT97:%.*]], label [[SX_ATOMIC_CONT98:%.*]]
15470 // CHECK:       sx.atomic.cont98:
15471 // CHECK-NEXT:    store i16 [[TMP1010]], i16* [[SV]], align 2
15472 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT97]]
15473 // CHECK:       sx.atomic.exit97:
15474 // CHECK-NEXT:    [[TMP1012:%.*]] = extractvalue { i16, i1 } [[TMP1009]], 1
15475 // CHECK-NEXT:    [[TMP1013:%.*]] = sext i1 [[TMP1012]] to i16
15476 // CHECK-NEXT:    store i16 [[TMP1013]], i16* [[SR]], align 2
15477 // CHECK-NEXT:    [[TMP1014:%.*]] = load i16, i16* [[SE]], align 2
15478 // CHECK-NEXT:    [[TMP1015:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1014]] acq_rel, align 2
15479 // CHECK-NEXT:    store i16 [[TMP1015]], i16* [[SV]], align 2
15480 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15481 // CHECK-NEXT:    [[TMP1016:%.*]] = load i16, i16* [[SE]], align 2
15482 // CHECK-NEXT:    [[TMP1017:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1016]] acq_rel, align 2
15483 // CHECK-NEXT:    store i16 [[TMP1017]], i16* [[SV]], align 2
15484 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15485 // CHECK-NEXT:    [[TMP1018:%.*]] = load i16, i16* [[SE]], align 2
15486 // CHECK-NEXT:    [[TMP1019:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1018]] acq_rel, align 2
15487 // CHECK-NEXT:    store i16 [[TMP1019]], i16* [[SV]], align 2
15488 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15489 // CHECK-NEXT:    [[TMP1020:%.*]] = load i16, i16* [[SE]], align 2
15490 // CHECK-NEXT:    [[TMP1021:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1020]] acq_rel, align 2
15491 // CHECK-NEXT:    store i16 [[TMP1021]], i16* [[SV]], align 2
15492 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15493 // CHECK-NEXT:    [[TMP1022:%.*]] = load i16, i16* [[SE]], align 2
15494 // CHECK-NEXT:    [[TMP1023:%.*]] = load i16, i16* [[SD]], align 2
15495 // CHECK-NEXT:    [[TMP1024:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1022]], i16 [[TMP1023]] acq_rel acquire, align 2
15496 // CHECK-NEXT:    [[TMP1025:%.*]] = extractvalue { i16, i1 } [[TMP1024]], 0
15497 // CHECK-NEXT:    store i16 [[TMP1025]], i16* [[SV]], align 2
15498 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15499 // CHECK-NEXT:    [[TMP1026:%.*]] = load i16, i16* [[SE]], align 2
15500 // CHECK-NEXT:    [[TMP1027:%.*]] = load i16, i16* [[SD]], align 2
15501 // CHECK-NEXT:    [[TMP1028:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1026]], i16 [[TMP1027]] acq_rel acquire, align 2
15502 // CHECK-NEXT:    [[TMP1029:%.*]] = extractvalue { i16, i1 } [[TMP1028]], 0
15503 // CHECK-NEXT:    store i16 [[TMP1029]], i16* [[SV]], align 2
15504 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15505 // CHECK-NEXT:    [[TMP1030:%.*]] = load i16, i16* [[SE]], align 2
15506 // CHECK-NEXT:    [[TMP1031:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1030]] acq_rel, align 2
15507 // CHECK-NEXT:    [[TMP1032:%.*]] = icmp sgt i16 [[TMP1031]], [[TMP1030]]
15508 // CHECK-NEXT:    [[TMP1033:%.*]] = select i1 [[TMP1032]], i16 [[TMP1030]], i16 [[TMP1031]]
15509 // CHECK-NEXT:    store i16 [[TMP1033]], i16* [[SV]], align 2
15510 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15511 // CHECK-NEXT:    [[TMP1034:%.*]] = load i16, i16* [[SE]], align 2
15512 // CHECK-NEXT:    [[TMP1035:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1034]] acq_rel, align 2
15513 // CHECK-NEXT:    [[TMP1036:%.*]] = icmp slt i16 [[TMP1035]], [[TMP1034]]
15514 // CHECK-NEXT:    [[TMP1037:%.*]] = select i1 [[TMP1036]], i16 [[TMP1034]], i16 [[TMP1035]]
15515 // CHECK-NEXT:    store i16 [[TMP1037]], i16* [[SV]], align 2
15516 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15517 // CHECK-NEXT:    [[TMP1038:%.*]] = load i16, i16* [[SE]], align 2
15518 // CHECK-NEXT:    [[TMP1039:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1038]] acq_rel, align 2
15519 // CHECK-NEXT:    [[TMP1040:%.*]] = icmp slt i16 [[TMP1039]], [[TMP1038]]
15520 // CHECK-NEXT:    [[TMP1041:%.*]] = select i1 [[TMP1040]], i16 [[TMP1038]], i16 [[TMP1039]]
15521 // CHECK-NEXT:    store i16 [[TMP1041]], i16* [[SV]], align 2
15522 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15523 // CHECK-NEXT:    [[TMP1042:%.*]] = load i16, i16* [[SE]], align 2
15524 // CHECK-NEXT:    [[TMP1043:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1042]] acq_rel, align 2
15525 // CHECK-NEXT:    [[TMP1044:%.*]] = icmp sgt i16 [[TMP1043]], [[TMP1042]]
15526 // CHECK-NEXT:    [[TMP1045:%.*]] = select i1 [[TMP1044]], i16 [[TMP1042]], i16 [[TMP1043]]
15527 // CHECK-NEXT:    store i16 [[TMP1045]], i16* [[SV]], align 2
15528 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15529 // CHECK-NEXT:    [[TMP1046:%.*]] = load i16, i16* [[SE]], align 2
15530 // CHECK-NEXT:    [[TMP1047:%.*]] = load i16, i16* [[SD]], align 2
15531 // CHECK-NEXT:    [[TMP1048:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1046]], i16 [[TMP1047]] acq_rel acquire, align 2
15532 // CHECK-NEXT:    [[TMP1049:%.*]] = extractvalue { i16, i1 } [[TMP1048]], 0
15533 // CHECK-NEXT:    [[TMP1050:%.*]] = extractvalue { i16, i1 } [[TMP1048]], 1
15534 // CHECK-NEXT:    [[TMP1051:%.*]] = select i1 [[TMP1050]], i16 [[TMP1046]], i16 [[TMP1049]]
15535 // CHECK-NEXT:    store i16 [[TMP1051]], i16* [[SV]], align 2
15536 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15537 // CHECK-NEXT:    [[TMP1052:%.*]] = load i16, i16* [[SE]], align 2
15538 // CHECK-NEXT:    [[TMP1053:%.*]] = load i16, i16* [[SD]], align 2
15539 // CHECK-NEXT:    [[TMP1054:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1052]], i16 [[TMP1053]] acq_rel acquire, align 2
15540 // CHECK-NEXT:    [[TMP1055:%.*]] = extractvalue { i16, i1 } [[TMP1054]], 0
15541 // CHECK-NEXT:    [[TMP1056:%.*]] = extractvalue { i16, i1 } [[TMP1054]], 1
15542 // CHECK-NEXT:    [[TMP1057:%.*]] = select i1 [[TMP1056]], i16 [[TMP1052]], i16 [[TMP1055]]
15543 // CHECK-NEXT:    store i16 [[TMP1057]], i16* [[SV]], align 2
15544 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15545 // CHECK-NEXT:    [[TMP1058:%.*]] = load i16, i16* [[SE]], align 2
15546 // CHECK-NEXT:    [[TMP1059:%.*]] = load i16, i16* [[SD]], align 2
15547 // CHECK-NEXT:    [[TMP1060:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1058]], i16 [[TMP1059]] acq_rel acquire, align 2
15548 // CHECK-NEXT:    [[TMP1061:%.*]] = extractvalue { i16, i1 } [[TMP1060]], 0
15549 // CHECK-NEXT:    [[TMP1062:%.*]] = extractvalue { i16, i1 } [[TMP1060]], 1
15550 // CHECK-NEXT:    br i1 [[TMP1062]], label [[SX_ATOMIC_EXIT99:%.*]], label [[SX_ATOMIC_CONT100:%.*]]
15551 // CHECK:       sx.atomic.cont100:
15552 // CHECK-NEXT:    store i16 [[TMP1061]], i16* [[SV]], align 2
15553 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT99]]
15554 // CHECK:       sx.atomic.exit99:
15555 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15556 // CHECK-NEXT:    [[TMP1063:%.*]] = load i16, i16* [[SE]], align 2
15557 // CHECK-NEXT:    [[TMP1064:%.*]] = load i16, i16* [[SD]], align 2
15558 // CHECK-NEXT:    [[TMP1065:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1063]], i16 [[TMP1064]] acq_rel acquire, align 2
15559 // CHECK-NEXT:    [[TMP1066:%.*]] = extractvalue { i16, i1 } [[TMP1065]], 0
15560 // CHECK-NEXT:    [[TMP1067:%.*]] = extractvalue { i16, i1 } [[TMP1065]], 1
15561 // CHECK-NEXT:    br i1 [[TMP1067]], label [[SX_ATOMIC_EXIT101:%.*]], label [[SX_ATOMIC_CONT102:%.*]]
15562 // CHECK:       sx.atomic.cont102:
15563 // CHECK-NEXT:    store i16 [[TMP1066]], i16* [[SV]], align 2
15564 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT101]]
15565 // CHECK:       sx.atomic.exit101:
15566 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15567 // CHECK-NEXT:    [[TMP1068:%.*]] = load i16, i16* [[SE]], align 2
15568 // CHECK-NEXT:    [[TMP1069:%.*]] = load i16, i16* [[SD]], align 2
15569 // CHECK-NEXT:    [[TMP1070:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1068]], i16 [[TMP1069]] acq_rel acquire, align 2
15570 // CHECK-NEXT:    [[TMP1071:%.*]] = extractvalue { i16, i1 } [[TMP1070]], 1
15571 // CHECK-NEXT:    [[TMP1072:%.*]] = sext i1 [[TMP1071]] to i16
15572 // CHECK-NEXT:    store i16 [[TMP1072]], i16* [[SR]], align 2
15573 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15574 // CHECK-NEXT:    [[TMP1073:%.*]] = load i16, i16* [[SE]], align 2
15575 // CHECK-NEXT:    [[TMP1074:%.*]] = load i16, i16* [[SD]], align 2
15576 // CHECK-NEXT:    [[TMP1075:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1073]], i16 [[TMP1074]] acq_rel acquire, align 2
15577 // CHECK-NEXT:    [[TMP1076:%.*]] = extractvalue { i16, i1 } [[TMP1075]], 1
15578 // CHECK-NEXT:    [[TMP1077:%.*]] = sext i1 [[TMP1076]] to i16
15579 // CHECK-NEXT:    store i16 [[TMP1077]], i16* [[SR]], align 2
15580 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15581 // CHECK-NEXT:    [[TMP1078:%.*]] = load i16, i16* [[SE]], align 2
15582 // CHECK-NEXT:    [[TMP1079:%.*]] = load i16, i16* [[SD]], align 2
15583 // CHECK-NEXT:    [[TMP1080:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1078]], i16 [[TMP1079]] acq_rel acquire, align 2
15584 // CHECK-NEXT:    [[TMP1081:%.*]] = extractvalue { i16, i1 } [[TMP1080]], 0
15585 // CHECK-NEXT:    [[TMP1082:%.*]] = extractvalue { i16, i1 } [[TMP1080]], 1
15586 // CHECK-NEXT:    br i1 [[TMP1082]], label [[SX_ATOMIC_EXIT103:%.*]], label [[SX_ATOMIC_CONT104:%.*]]
15587 // CHECK:       sx.atomic.cont104:
15588 // CHECK-NEXT:    store i16 [[TMP1081]], i16* [[SV]], align 2
15589 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT103]]
15590 // CHECK:       sx.atomic.exit103:
15591 // CHECK-NEXT:    [[TMP1083:%.*]] = extractvalue { i16, i1 } [[TMP1080]], 1
15592 // CHECK-NEXT:    [[TMP1084:%.*]] = sext i1 [[TMP1083]] to i16
15593 // CHECK-NEXT:    store i16 [[TMP1084]], i16* [[SR]], align 2
15594 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15595 // CHECK-NEXT:    [[TMP1085:%.*]] = load i16, i16* [[SE]], align 2
15596 // CHECK-NEXT:    [[TMP1086:%.*]] = load i16, i16* [[SD]], align 2
15597 // CHECK-NEXT:    [[TMP1087:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1085]], i16 [[TMP1086]] acq_rel acquire, align 2
15598 // CHECK-NEXT:    [[TMP1088:%.*]] = extractvalue { i16, i1 } [[TMP1087]], 0
15599 // CHECK-NEXT:    [[TMP1089:%.*]] = extractvalue { i16, i1 } [[TMP1087]], 1
15600 // CHECK-NEXT:    br i1 [[TMP1089]], label [[SX_ATOMIC_EXIT105:%.*]], label [[SX_ATOMIC_CONT106:%.*]]
15601 // CHECK:       sx.atomic.cont106:
15602 // CHECK-NEXT:    store i16 [[TMP1088]], i16* [[SV]], align 2
15603 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT105]]
15604 // CHECK:       sx.atomic.exit105:
15605 // CHECK-NEXT:    [[TMP1090:%.*]] = extractvalue { i16, i1 } [[TMP1087]], 1
15606 // CHECK-NEXT:    [[TMP1091:%.*]] = sext i1 [[TMP1090]] to i16
15607 // CHECK-NEXT:    store i16 [[TMP1091]], i16* [[SR]], align 2
15608 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15609 // CHECK-NEXT:    [[TMP1092:%.*]] = load i16, i16* [[SE]], align 2
15610 // CHECK-NEXT:    [[TMP1093:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1092]] acquire, align 2
15611 // CHECK-NEXT:    store i16 [[TMP1093]], i16* [[SV]], align 2
15612 // CHECK-NEXT:    [[TMP1094:%.*]] = load i16, i16* [[SE]], align 2
15613 // CHECK-NEXT:    [[TMP1095:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1094]] acquire, align 2
15614 // CHECK-NEXT:    store i16 [[TMP1095]], i16* [[SV]], align 2
15615 // CHECK-NEXT:    [[TMP1096:%.*]] = load i16, i16* [[SE]], align 2
15616 // CHECK-NEXT:    [[TMP1097:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1096]] acquire, align 2
15617 // CHECK-NEXT:    store i16 [[TMP1097]], i16* [[SV]], align 2
15618 // CHECK-NEXT:    [[TMP1098:%.*]] = load i16, i16* [[SE]], align 2
15619 // CHECK-NEXT:    [[TMP1099:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1098]] acquire, align 2
15620 // CHECK-NEXT:    store i16 [[TMP1099]], i16* [[SV]], align 2
15621 // CHECK-NEXT:    [[TMP1100:%.*]] = load i16, i16* [[SE]], align 2
15622 // CHECK-NEXT:    [[TMP1101:%.*]] = load i16, i16* [[SD]], align 2
15623 // CHECK-NEXT:    [[TMP1102:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1100]], i16 [[TMP1101]] acquire acquire, align 2
15624 // CHECK-NEXT:    [[TMP1103:%.*]] = extractvalue { i16, i1 } [[TMP1102]], 0
15625 // CHECK-NEXT:    store i16 [[TMP1103]], i16* [[SV]], align 2
15626 // CHECK-NEXT:    [[TMP1104:%.*]] = load i16, i16* [[SE]], align 2
15627 // CHECK-NEXT:    [[TMP1105:%.*]] = load i16, i16* [[SD]], align 2
15628 // CHECK-NEXT:    [[TMP1106:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1104]], i16 [[TMP1105]] acquire acquire, align 2
15629 // CHECK-NEXT:    [[TMP1107:%.*]] = extractvalue { i16, i1 } [[TMP1106]], 0
15630 // CHECK-NEXT:    store i16 [[TMP1107]], i16* [[SV]], align 2
15631 // CHECK-NEXT:    [[TMP1108:%.*]] = load i16, i16* [[SE]], align 2
15632 // CHECK-NEXT:    [[TMP1109:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1108]] acquire, align 2
15633 // CHECK-NEXT:    [[TMP1110:%.*]] = icmp sgt i16 [[TMP1109]], [[TMP1108]]
15634 // CHECK-NEXT:    [[TMP1111:%.*]] = select i1 [[TMP1110]], i16 [[TMP1108]], i16 [[TMP1109]]
15635 // CHECK-NEXT:    store i16 [[TMP1111]], i16* [[SV]], align 2
15636 // CHECK-NEXT:    [[TMP1112:%.*]] = load i16, i16* [[SE]], align 2
15637 // CHECK-NEXT:    [[TMP1113:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1112]] acquire, align 2
15638 // CHECK-NEXT:    [[TMP1114:%.*]] = icmp slt i16 [[TMP1113]], [[TMP1112]]
15639 // CHECK-NEXT:    [[TMP1115:%.*]] = select i1 [[TMP1114]], i16 [[TMP1112]], i16 [[TMP1113]]
15640 // CHECK-NEXT:    store i16 [[TMP1115]], i16* [[SV]], align 2
15641 // CHECK-NEXT:    [[TMP1116:%.*]] = load i16, i16* [[SE]], align 2
15642 // CHECK-NEXT:    [[TMP1117:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1116]] acquire, align 2
15643 // CHECK-NEXT:    [[TMP1118:%.*]] = icmp slt i16 [[TMP1117]], [[TMP1116]]
15644 // CHECK-NEXT:    [[TMP1119:%.*]] = select i1 [[TMP1118]], i16 [[TMP1116]], i16 [[TMP1117]]
15645 // CHECK-NEXT:    store i16 [[TMP1119]], i16* [[SV]], align 2
15646 // CHECK-NEXT:    [[TMP1120:%.*]] = load i16, i16* [[SE]], align 2
15647 // CHECK-NEXT:    [[TMP1121:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1120]] acquire, align 2
15648 // CHECK-NEXT:    [[TMP1122:%.*]] = icmp sgt i16 [[TMP1121]], [[TMP1120]]
15649 // CHECK-NEXT:    [[TMP1123:%.*]] = select i1 [[TMP1122]], i16 [[TMP1120]], i16 [[TMP1121]]
15650 // CHECK-NEXT:    store i16 [[TMP1123]], i16* [[SV]], align 2
15651 // CHECK-NEXT:    [[TMP1124:%.*]] = load i16, i16* [[SE]], align 2
15652 // CHECK-NEXT:    [[TMP1125:%.*]] = load i16, i16* [[SD]], align 2
15653 // CHECK-NEXT:    [[TMP1126:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1124]], i16 [[TMP1125]] acquire acquire, align 2
15654 // CHECK-NEXT:    [[TMP1127:%.*]] = extractvalue { i16, i1 } [[TMP1126]], 0
15655 // CHECK-NEXT:    [[TMP1128:%.*]] = extractvalue { i16, i1 } [[TMP1126]], 1
15656 // CHECK-NEXT:    [[TMP1129:%.*]] = select i1 [[TMP1128]], i16 [[TMP1124]], i16 [[TMP1127]]
15657 // CHECK-NEXT:    store i16 [[TMP1129]], i16* [[SV]], align 2
15658 // CHECK-NEXT:    [[TMP1130:%.*]] = load i16, i16* [[SE]], align 2
15659 // CHECK-NEXT:    [[TMP1131:%.*]] = load i16, i16* [[SD]], align 2
15660 // CHECK-NEXT:    [[TMP1132:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1130]], i16 [[TMP1131]] acquire acquire, align 2
15661 // CHECK-NEXT:    [[TMP1133:%.*]] = extractvalue { i16, i1 } [[TMP1132]], 0
15662 // CHECK-NEXT:    [[TMP1134:%.*]] = extractvalue { i16, i1 } [[TMP1132]], 1
15663 // CHECK-NEXT:    [[TMP1135:%.*]] = select i1 [[TMP1134]], i16 [[TMP1130]], i16 [[TMP1133]]
15664 // CHECK-NEXT:    store i16 [[TMP1135]], i16* [[SV]], align 2
15665 // CHECK-NEXT:    [[TMP1136:%.*]] = load i16, i16* [[SE]], align 2
15666 // CHECK-NEXT:    [[TMP1137:%.*]] = load i16, i16* [[SD]], align 2
15667 // CHECK-NEXT:    [[TMP1138:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1136]], i16 [[TMP1137]] acquire acquire, align 2
15668 // CHECK-NEXT:    [[TMP1139:%.*]] = extractvalue { i16, i1 } [[TMP1138]], 0
15669 // CHECK-NEXT:    [[TMP1140:%.*]] = extractvalue { i16, i1 } [[TMP1138]], 1
15670 // CHECK-NEXT:    br i1 [[TMP1140]], label [[SX_ATOMIC_EXIT107:%.*]], label [[SX_ATOMIC_CONT108:%.*]]
15671 // CHECK:       sx.atomic.cont108:
15672 // CHECK-NEXT:    store i16 [[TMP1139]], i16* [[SV]], align 2
15673 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT107]]
15674 // CHECK:       sx.atomic.exit107:
15675 // CHECK-NEXT:    [[TMP1141:%.*]] = load i16, i16* [[SE]], align 2
15676 // CHECK-NEXT:    [[TMP1142:%.*]] = load i16, i16* [[SD]], align 2
15677 // CHECK-NEXT:    [[TMP1143:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1141]], i16 [[TMP1142]] acquire acquire, align 2
15678 // CHECK-NEXT:    [[TMP1144:%.*]] = extractvalue { i16, i1 } [[TMP1143]], 0
15679 // CHECK-NEXT:    [[TMP1145:%.*]] = extractvalue { i16, i1 } [[TMP1143]], 1
15680 // CHECK-NEXT:    br i1 [[TMP1145]], label [[SX_ATOMIC_EXIT109:%.*]], label [[SX_ATOMIC_CONT110:%.*]]
15681 // CHECK:       sx.atomic.cont110:
15682 // CHECK-NEXT:    store i16 [[TMP1144]], i16* [[SV]], align 2
15683 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT109]]
15684 // CHECK:       sx.atomic.exit109:
15685 // CHECK-NEXT:    [[TMP1146:%.*]] = load i16, i16* [[SE]], align 2
15686 // CHECK-NEXT:    [[TMP1147:%.*]] = load i16, i16* [[SD]], align 2
15687 // CHECK-NEXT:    [[TMP1148:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1146]], i16 [[TMP1147]] acquire acquire, align 2
15688 // CHECK-NEXT:    [[TMP1149:%.*]] = extractvalue { i16, i1 } [[TMP1148]], 1
15689 // CHECK-NEXT:    [[TMP1150:%.*]] = sext i1 [[TMP1149]] to i16
15690 // CHECK-NEXT:    store i16 [[TMP1150]], i16* [[SR]], align 2
15691 // CHECK-NEXT:    [[TMP1151:%.*]] = load i16, i16* [[SE]], align 2
15692 // CHECK-NEXT:    [[TMP1152:%.*]] = load i16, i16* [[SD]], align 2
15693 // CHECK-NEXT:    [[TMP1153:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1151]], i16 [[TMP1152]] acquire acquire, align 2
15694 // CHECK-NEXT:    [[TMP1154:%.*]] = extractvalue { i16, i1 } [[TMP1153]], 1
15695 // CHECK-NEXT:    [[TMP1155:%.*]] = sext i1 [[TMP1154]] to i16
15696 // CHECK-NEXT:    store i16 [[TMP1155]], i16* [[SR]], align 2
15697 // CHECK-NEXT:    [[TMP1156:%.*]] = load i16, i16* [[SE]], align 2
15698 // CHECK-NEXT:    [[TMP1157:%.*]] = load i16, i16* [[SD]], align 2
15699 // CHECK-NEXT:    [[TMP1158:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1156]], i16 [[TMP1157]] acquire acquire, align 2
15700 // CHECK-NEXT:    [[TMP1159:%.*]] = extractvalue { i16, i1 } [[TMP1158]], 0
15701 // CHECK-NEXT:    [[TMP1160:%.*]] = extractvalue { i16, i1 } [[TMP1158]], 1
15702 // CHECK-NEXT:    br i1 [[TMP1160]], label [[SX_ATOMIC_EXIT111:%.*]], label [[SX_ATOMIC_CONT112:%.*]]
15703 // CHECK:       sx.atomic.cont112:
15704 // CHECK-NEXT:    store i16 [[TMP1159]], i16* [[SV]], align 2
15705 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT111]]
15706 // CHECK:       sx.atomic.exit111:
15707 // CHECK-NEXT:    [[TMP1161:%.*]] = extractvalue { i16, i1 } [[TMP1158]], 1
15708 // CHECK-NEXT:    [[TMP1162:%.*]] = sext i1 [[TMP1161]] to i16
15709 // CHECK-NEXT:    store i16 [[TMP1162]], i16* [[SR]], align 2
15710 // CHECK-NEXT:    [[TMP1163:%.*]] = load i16, i16* [[SE]], align 2
15711 // CHECK-NEXT:    [[TMP1164:%.*]] = load i16, i16* [[SD]], align 2
15712 // CHECK-NEXT:    [[TMP1165:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1163]], i16 [[TMP1164]] acquire acquire, align 2
15713 // CHECK-NEXT:    [[TMP1166:%.*]] = extractvalue { i16, i1 } [[TMP1165]], 0
15714 // CHECK-NEXT:    [[TMP1167:%.*]] = extractvalue { i16, i1 } [[TMP1165]], 1
15715 // CHECK-NEXT:    br i1 [[TMP1167]], label [[SX_ATOMIC_EXIT113:%.*]], label [[SX_ATOMIC_CONT114:%.*]]
15716 // CHECK:       sx.atomic.cont114:
15717 // CHECK-NEXT:    store i16 [[TMP1166]], i16* [[SV]], align 2
15718 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT113]]
15719 // CHECK:       sx.atomic.exit113:
15720 // CHECK-NEXT:    [[TMP1168:%.*]] = extractvalue { i16, i1 } [[TMP1165]], 1
15721 // CHECK-NEXT:    [[TMP1169:%.*]] = sext i1 [[TMP1168]] to i16
15722 // CHECK-NEXT:    store i16 [[TMP1169]], i16* [[SR]], align 2
15723 // CHECK-NEXT:    [[TMP1170:%.*]] = load i16, i16* [[SE]], align 2
15724 // CHECK-NEXT:    [[TMP1171:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1170]] monotonic, align 2
15725 // CHECK-NEXT:    store i16 [[TMP1171]], i16* [[SV]], align 2
15726 // CHECK-NEXT:    [[TMP1172:%.*]] = load i16, i16* [[SE]], align 2
15727 // CHECK-NEXT:    [[TMP1173:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1172]] monotonic, align 2
15728 // CHECK-NEXT:    store i16 [[TMP1173]], i16* [[SV]], align 2
15729 // CHECK-NEXT:    [[TMP1174:%.*]] = load i16, i16* [[SE]], align 2
15730 // CHECK-NEXT:    [[TMP1175:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1174]] monotonic, align 2
15731 // CHECK-NEXT:    store i16 [[TMP1175]], i16* [[SV]], align 2
15732 // CHECK-NEXT:    [[TMP1176:%.*]] = load i16, i16* [[SE]], align 2
15733 // CHECK-NEXT:    [[TMP1177:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1176]] monotonic, align 2
15734 // CHECK-NEXT:    store i16 [[TMP1177]], i16* [[SV]], align 2
15735 // CHECK-NEXT:    [[TMP1178:%.*]] = load i16, i16* [[SE]], align 2
15736 // CHECK-NEXT:    [[TMP1179:%.*]] = load i16, i16* [[SD]], align 2
15737 // CHECK-NEXT:    [[TMP1180:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1178]], i16 [[TMP1179]] monotonic monotonic, align 2
15738 // CHECK-NEXT:    [[TMP1181:%.*]] = extractvalue { i16, i1 } [[TMP1180]], 0
15739 // CHECK-NEXT:    store i16 [[TMP1181]], i16* [[SV]], align 2
15740 // CHECK-NEXT:    [[TMP1182:%.*]] = load i16, i16* [[SE]], align 2
15741 // CHECK-NEXT:    [[TMP1183:%.*]] = load i16, i16* [[SD]], align 2
15742 // CHECK-NEXT:    [[TMP1184:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1182]], i16 [[TMP1183]] monotonic monotonic, align 2
15743 // CHECK-NEXT:    [[TMP1185:%.*]] = extractvalue { i16, i1 } [[TMP1184]], 0
15744 // CHECK-NEXT:    store i16 [[TMP1185]], i16* [[SV]], align 2
15745 // CHECK-NEXT:    [[TMP1186:%.*]] = load i16, i16* [[SE]], align 2
15746 // CHECK-NEXT:    [[TMP1187:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1186]] monotonic, align 2
15747 // CHECK-NEXT:    [[TMP1188:%.*]] = icmp sgt i16 [[TMP1187]], [[TMP1186]]
15748 // CHECK-NEXT:    [[TMP1189:%.*]] = select i1 [[TMP1188]], i16 [[TMP1186]], i16 [[TMP1187]]
15749 // CHECK-NEXT:    store i16 [[TMP1189]], i16* [[SV]], align 2
15750 // CHECK-NEXT:    [[TMP1190:%.*]] = load i16, i16* [[SE]], align 2
15751 // CHECK-NEXT:    [[TMP1191:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1190]] monotonic, align 2
15752 // CHECK-NEXT:    [[TMP1192:%.*]] = icmp slt i16 [[TMP1191]], [[TMP1190]]
15753 // CHECK-NEXT:    [[TMP1193:%.*]] = select i1 [[TMP1192]], i16 [[TMP1190]], i16 [[TMP1191]]
15754 // CHECK-NEXT:    store i16 [[TMP1193]], i16* [[SV]], align 2
15755 // CHECK-NEXT:    [[TMP1194:%.*]] = load i16, i16* [[SE]], align 2
15756 // CHECK-NEXT:    [[TMP1195:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1194]] monotonic, align 2
15757 // CHECK-NEXT:    [[TMP1196:%.*]] = icmp slt i16 [[TMP1195]], [[TMP1194]]
15758 // CHECK-NEXT:    [[TMP1197:%.*]] = select i1 [[TMP1196]], i16 [[TMP1194]], i16 [[TMP1195]]
15759 // CHECK-NEXT:    store i16 [[TMP1197]], i16* [[SV]], align 2
15760 // CHECK-NEXT:    [[TMP1198:%.*]] = load i16, i16* [[SE]], align 2
15761 // CHECK-NEXT:    [[TMP1199:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1198]] monotonic, align 2
15762 // CHECK-NEXT:    [[TMP1200:%.*]] = icmp sgt i16 [[TMP1199]], [[TMP1198]]
15763 // CHECK-NEXT:    [[TMP1201:%.*]] = select i1 [[TMP1200]], i16 [[TMP1198]], i16 [[TMP1199]]
15764 // CHECK-NEXT:    store i16 [[TMP1201]], i16* [[SV]], align 2
15765 // CHECK-NEXT:    [[TMP1202:%.*]] = load i16, i16* [[SE]], align 2
15766 // CHECK-NEXT:    [[TMP1203:%.*]] = load i16, i16* [[SD]], align 2
15767 // CHECK-NEXT:    [[TMP1204:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1202]], i16 [[TMP1203]] monotonic monotonic, align 2
15768 // CHECK-NEXT:    [[TMP1205:%.*]] = extractvalue { i16, i1 } [[TMP1204]], 0
15769 // CHECK-NEXT:    [[TMP1206:%.*]] = extractvalue { i16, i1 } [[TMP1204]], 1
15770 // CHECK-NEXT:    [[TMP1207:%.*]] = select i1 [[TMP1206]], i16 [[TMP1202]], i16 [[TMP1205]]
15771 // CHECK-NEXT:    store i16 [[TMP1207]], i16* [[SV]], align 2
15772 // CHECK-NEXT:    [[TMP1208:%.*]] = load i16, i16* [[SE]], align 2
15773 // CHECK-NEXT:    [[TMP1209:%.*]] = load i16, i16* [[SD]], align 2
15774 // CHECK-NEXT:    [[TMP1210:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1208]], i16 [[TMP1209]] monotonic monotonic, align 2
15775 // CHECK-NEXT:    [[TMP1211:%.*]] = extractvalue { i16, i1 } [[TMP1210]], 0
15776 // CHECK-NEXT:    [[TMP1212:%.*]] = extractvalue { i16, i1 } [[TMP1210]], 1
15777 // CHECK-NEXT:    [[TMP1213:%.*]] = select i1 [[TMP1212]], i16 [[TMP1208]], i16 [[TMP1211]]
15778 // CHECK-NEXT:    store i16 [[TMP1213]], i16* [[SV]], align 2
15779 // CHECK-NEXT:    [[TMP1214:%.*]] = load i16, i16* [[SE]], align 2
15780 // CHECK-NEXT:    [[TMP1215:%.*]] = load i16, i16* [[SD]], align 2
15781 // CHECK-NEXT:    [[TMP1216:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1214]], i16 [[TMP1215]] monotonic monotonic, align 2
15782 // CHECK-NEXT:    [[TMP1217:%.*]] = extractvalue { i16, i1 } [[TMP1216]], 0
15783 // CHECK-NEXT:    [[TMP1218:%.*]] = extractvalue { i16, i1 } [[TMP1216]], 1
15784 // CHECK-NEXT:    br i1 [[TMP1218]], label [[SX_ATOMIC_EXIT115:%.*]], label [[SX_ATOMIC_CONT116:%.*]]
15785 // CHECK:       sx.atomic.cont116:
15786 // CHECK-NEXT:    store i16 [[TMP1217]], i16* [[SV]], align 2
15787 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT115]]
15788 // CHECK:       sx.atomic.exit115:
15789 // CHECK-NEXT:    [[TMP1219:%.*]] = load i16, i16* [[SE]], align 2
15790 // CHECK-NEXT:    [[TMP1220:%.*]] = load i16, i16* [[SD]], align 2
15791 // CHECK-NEXT:    [[TMP1221:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1219]], i16 [[TMP1220]] monotonic monotonic, align 2
15792 // CHECK-NEXT:    [[TMP1222:%.*]] = extractvalue { i16, i1 } [[TMP1221]], 0
15793 // CHECK-NEXT:    [[TMP1223:%.*]] = extractvalue { i16, i1 } [[TMP1221]], 1
15794 // CHECK-NEXT:    br i1 [[TMP1223]], label [[SX_ATOMIC_EXIT117:%.*]], label [[SX_ATOMIC_CONT118:%.*]]
15795 // CHECK:       sx.atomic.cont118:
15796 // CHECK-NEXT:    store i16 [[TMP1222]], i16* [[SV]], align 2
15797 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT117]]
15798 // CHECK:       sx.atomic.exit117:
15799 // CHECK-NEXT:    [[TMP1224:%.*]] = load i16, i16* [[SE]], align 2
15800 // CHECK-NEXT:    [[TMP1225:%.*]] = load i16, i16* [[SD]], align 2
15801 // CHECK-NEXT:    [[TMP1226:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1224]], i16 [[TMP1225]] monotonic monotonic, align 2
15802 // CHECK-NEXT:    [[TMP1227:%.*]] = extractvalue { i16, i1 } [[TMP1226]], 1
15803 // CHECK-NEXT:    [[TMP1228:%.*]] = sext i1 [[TMP1227]] to i16
15804 // CHECK-NEXT:    store i16 [[TMP1228]], i16* [[SR]], align 2
15805 // CHECK-NEXT:    [[TMP1229:%.*]] = load i16, i16* [[SE]], align 2
15806 // CHECK-NEXT:    [[TMP1230:%.*]] = load i16, i16* [[SD]], align 2
15807 // CHECK-NEXT:    [[TMP1231:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1229]], i16 [[TMP1230]] monotonic monotonic, align 2
15808 // CHECK-NEXT:    [[TMP1232:%.*]] = extractvalue { i16, i1 } [[TMP1231]], 1
15809 // CHECK-NEXT:    [[TMP1233:%.*]] = sext i1 [[TMP1232]] to i16
15810 // CHECK-NEXT:    store i16 [[TMP1233]], i16* [[SR]], align 2
15811 // CHECK-NEXT:    [[TMP1234:%.*]] = load i16, i16* [[SE]], align 2
15812 // CHECK-NEXT:    [[TMP1235:%.*]] = load i16, i16* [[SD]], align 2
15813 // CHECK-NEXT:    [[TMP1236:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1234]], i16 [[TMP1235]] monotonic monotonic, align 2
15814 // CHECK-NEXT:    [[TMP1237:%.*]] = extractvalue { i16, i1 } [[TMP1236]], 0
15815 // CHECK-NEXT:    [[TMP1238:%.*]] = extractvalue { i16, i1 } [[TMP1236]], 1
15816 // CHECK-NEXT:    br i1 [[TMP1238]], label [[SX_ATOMIC_EXIT119:%.*]], label [[SX_ATOMIC_CONT120:%.*]]
15817 // CHECK:       sx.atomic.cont120:
15818 // CHECK-NEXT:    store i16 [[TMP1237]], i16* [[SV]], align 2
15819 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT119]]
15820 // CHECK:       sx.atomic.exit119:
15821 // CHECK-NEXT:    [[TMP1239:%.*]] = extractvalue { i16, i1 } [[TMP1236]], 1
15822 // CHECK-NEXT:    [[TMP1240:%.*]] = sext i1 [[TMP1239]] to i16
15823 // CHECK-NEXT:    store i16 [[TMP1240]], i16* [[SR]], align 2
15824 // CHECK-NEXT:    [[TMP1241:%.*]] = load i16, i16* [[SE]], align 2
15825 // CHECK-NEXT:    [[TMP1242:%.*]] = load i16, i16* [[SD]], align 2
15826 // CHECK-NEXT:    [[TMP1243:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1241]], i16 [[TMP1242]] monotonic monotonic, align 2
15827 // CHECK-NEXT:    [[TMP1244:%.*]] = extractvalue { i16, i1 } [[TMP1243]], 0
15828 // CHECK-NEXT:    [[TMP1245:%.*]] = extractvalue { i16, i1 } [[TMP1243]], 1
15829 // CHECK-NEXT:    br i1 [[TMP1245]], label [[SX_ATOMIC_EXIT121:%.*]], label [[SX_ATOMIC_CONT122:%.*]]
15830 // CHECK:       sx.atomic.cont122:
15831 // CHECK-NEXT:    store i16 [[TMP1244]], i16* [[SV]], align 2
15832 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT121]]
15833 // CHECK:       sx.atomic.exit121:
15834 // CHECK-NEXT:    [[TMP1246:%.*]] = extractvalue { i16, i1 } [[TMP1243]], 1
15835 // CHECK-NEXT:    [[TMP1247:%.*]] = sext i1 [[TMP1246]] to i16
15836 // CHECK-NEXT:    store i16 [[TMP1247]], i16* [[SR]], align 2
15837 // CHECK-NEXT:    [[TMP1248:%.*]] = load i16, i16* [[SE]], align 2
15838 // CHECK-NEXT:    [[TMP1249:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1248]] release, align 2
15839 // CHECK-NEXT:    store i16 [[TMP1249]], i16* [[SV]], align 2
15840 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15841 // CHECK-NEXT:    [[TMP1250:%.*]] = load i16, i16* [[SE]], align 2
15842 // CHECK-NEXT:    [[TMP1251:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1250]] release, align 2
15843 // CHECK-NEXT:    store i16 [[TMP1251]], i16* [[SV]], align 2
15844 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15845 // CHECK-NEXT:    [[TMP1252:%.*]] = load i16, i16* [[SE]], align 2
15846 // CHECK-NEXT:    [[TMP1253:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1252]] release, align 2
15847 // CHECK-NEXT:    store i16 [[TMP1253]], i16* [[SV]], align 2
15848 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15849 // CHECK-NEXT:    [[TMP1254:%.*]] = load i16, i16* [[SE]], align 2
15850 // CHECK-NEXT:    [[TMP1255:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1254]] release, align 2
15851 // CHECK-NEXT:    store i16 [[TMP1255]], i16* [[SV]], align 2
15852 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15853 // CHECK-NEXT:    [[TMP1256:%.*]] = load i16, i16* [[SE]], align 2
15854 // CHECK-NEXT:    [[TMP1257:%.*]] = load i16, i16* [[SD]], align 2
15855 // CHECK-NEXT:    [[TMP1258:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1256]], i16 [[TMP1257]] release monotonic, align 2
15856 // CHECK-NEXT:    [[TMP1259:%.*]] = extractvalue { i16, i1 } [[TMP1258]], 0
15857 // CHECK-NEXT:    store i16 [[TMP1259]], i16* [[SV]], align 2
15858 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15859 // CHECK-NEXT:    [[TMP1260:%.*]] = load i16, i16* [[SE]], align 2
15860 // CHECK-NEXT:    [[TMP1261:%.*]] = load i16, i16* [[SD]], align 2
15861 // CHECK-NEXT:    [[TMP1262:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1260]], i16 [[TMP1261]] release monotonic, align 2
15862 // CHECK-NEXT:    [[TMP1263:%.*]] = extractvalue { i16, i1 } [[TMP1262]], 0
15863 // CHECK-NEXT:    store i16 [[TMP1263]], i16* [[SV]], align 2
15864 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15865 // CHECK-NEXT:    [[TMP1264:%.*]] = load i16, i16* [[SE]], align 2
15866 // CHECK-NEXT:    [[TMP1265:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1264]] release, align 2
15867 // CHECK-NEXT:    [[TMP1266:%.*]] = icmp sgt i16 [[TMP1265]], [[TMP1264]]
15868 // CHECK-NEXT:    [[TMP1267:%.*]] = select i1 [[TMP1266]], i16 [[TMP1264]], i16 [[TMP1265]]
15869 // CHECK-NEXT:    store i16 [[TMP1267]], i16* [[SV]], align 2
15870 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15871 // CHECK-NEXT:    [[TMP1268:%.*]] = load i16, i16* [[SE]], align 2
15872 // CHECK-NEXT:    [[TMP1269:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1268]] release, align 2
15873 // CHECK-NEXT:    [[TMP1270:%.*]] = icmp slt i16 [[TMP1269]], [[TMP1268]]
15874 // CHECK-NEXT:    [[TMP1271:%.*]] = select i1 [[TMP1270]], i16 [[TMP1268]], i16 [[TMP1269]]
15875 // CHECK-NEXT:    store i16 [[TMP1271]], i16* [[SV]], align 2
15876 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15877 // CHECK-NEXT:    [[TMP1272:%.*]] = load i16, i16* [[SE]], align 2
15878 // CHECK-NEXT:    [[TMP1273:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1272]] release, align 2
15879 // CHECK-NEXT:    [[TMP1274:%.*]] = icmp slt i16 [[TMP1273]], [[TMP1272]]
15880 // CHECK-NEXT:    [[TMP1275:%.*]] = select i1 [[TMP1274]], i16 [[TMP1272]], i16 [[TMP1273]]
15881 // CHECK-NEXT:    store i16 [[TMP1275]], i16* [[SV]], align 2
15882 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15883 // CHECK-NEXT:    [[TMP1276:%.*]] = load i16, i16* [[SE]], align 2
15884 // CHECK-NEXT:    [[TMP1277:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1276]] release, align 2
15885 // CHECK-NEXT:    [[TMP1278:%.*]] = icmp sgt i16 [[TMP1277]], [[TMP1276]]
15886 // CHECK-NEXT:    [[TMP1279:%.*]] = select i1 [[TMP1278]], i16 [[TMP1276]], i16 [[TMP1277]]
15887 // CHECK-NEXT:    store i16 [[TMP1279]], i16* [[SV]], align 2
15888 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15889 // CHECK-NEXT:    [[TMP1280:%.*]] = load i16, i16* [[SE]], align 2
15890 // CHECK-NEXT:    [[TMP1281:%.*]] = load i16, i16* [[SD]], align 2
15891 // CHECK-NEXT:    [[TMP1282:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1280]], i16 [[TMP1281]] release monotonic, align 2
15892 // CHECK-NEXT:    [[TMP1283:%.*]] = extractvalue { i16, i1 } [[TMP1282]], 0
15893 // CHECK-NEXT:    [[TMP1284:%.*]] = extractvalue { i16, i1 } [[TMP1282]], 1
15894 // CHECK-NEXT:    [[TMP1285:%.*]] = select i1 [[TMP1284]], i16 [[TMP1280]], i16 [[TMP1283]]
15895 // CHECK-NEXT:    store i16 [[TMP1285]], i16* [[SV]], align 2
15896 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15897 // CHECK-NEXT:    [[TMP1286:%.*]] = load i16, i16* [[SE]], align 2
15898 // CHECK-NEXT:    [[TMP1287:%.*]] = load i16, i16* [[SD]], align 2
15899 // CHECK-NEXT:    [[TMP1288:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1286]], i16 [[TMP1287]] release monotonic, align 2
15900 // CHECK-NEXT:    [[TMP1289:%.*]] = extractvalue { i16, i1 } [[TMP1288]], 0
15901 // CHECK-NEXT:    [[TMP1290:%.*]] = extractvalue { i16, i1 } [[TMP1288]], 1
15902 // CHECK-NEXT:    [[TMP1291:%.*]] = select i1 [[TMP1290]], i16 [[TMP1286]], i16 [[TMP1289]]
15903 // CHECK-NEXT:    store i16 [[TMP1291]], i16* [[SV]], align 2
15904 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15905 // CHECK-NEXT:    [[TMP1292:%.*]] = load i16, i16* [[SE]], align 2
15906 // CHECK-NEXT:    [[TMP1293:%.*]] = load i16, i16* [[SD]], align 2
15907 // CHECK-NEXT:    [[TMP1294:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1292]], i16 [[TMP1293]] release monotonic, align 2
15908 // CHECK-NEXT:    [[TMP1295:%.*]] = extractvalue { i16, i1 } [[TMP1294]], 0
15909 // CHECK-NEXT:    [[TMP1296:%.*]] = extractvalue { i16, i1 } [[TMP1294]], 1
15910 // CHECK-NEXT:    br i1 [[TMP1296]], label [[SX_ATOMIC_EXIT123:%.*]], label [[SX_ATOMIC_CONT124:%.*]]
15911 // CHECK:       sx.atomic.cont124:
15912 // CHECK-NEXT:    store i16 [[TMP1295]], i16* [[SV]], align 2
15913 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT123]]
15914 // CHECK:       sx.atomic.exit123:
15915 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15916 // CHECK-NEXT:    [[TMP1297:%.*]] = load i16, i16* [[SE]], align 2
15917 // CHECK-NEXT:    [[TMP1298:%.*]] = load i16, i16* [[SD]], align 2
15918 // CHECK-NEXT:    [[TMP1299:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1297]], i16 [[TMP1298]] release monotonic, align 2
15919 // CHECK-NEXT:    [[TMP1300:%.*]] = extractvalue { i16, i1 } [[TMP1299]], 0
15920 // CHECK-NEXT:    [[TMP1301:%.*]] = extractvalue { i16, i1 } [[TMP1299]], 1
15921 // CHECK-NEXT:    br i1 [[TMP1301]], label [[SX_ATOMIC_EXIT125:%.*]], label [[SX_ATOMIC_CONT126:%.*]]
15922 // CHECK:       sx.atomic.cont126:
15923 // CHECK-NEXT:    store i16 [[TMP1300]], i16* [[SV]], align 2
15924 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT125]]
15925 // CHECK:       sx.atomic.exit125:
15926 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15927 // CHECK-NEXT:    [[TMP1302:%.*]] = load i16, i16* [[SE]], align 2
15928 // CHECK-NEXT:    [[TMP1303:%.*]] = load i16, i16* [[SD]], align 2
15929 // CHECK-NEXT:    [[TMP1304:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1302]], i16 [[TMP1303]] release monotonic, align 2
15930 // CHECK-NEXT:    [[TMP1305:%.*]] = extractvalue { i16, i1 } [[TMP1304]], 1
15931 // CHECK-NEXT:    [[TMP1306:%.*]] = sext i1 [[TMP1305]] to i16
15932 // CHECK-NEXT:    store i16 [[TMP1306]], i16* [[SR]], align 2
15933 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15934 // CHECK-NEXT:    [[TMP1307:%.*]] = load i16, i16* [[SE]], align 2
15935 // CHECK-NEXT:    [[TMP1308:%.*]] = load i16, i16* [[SD]], align 2
15936 // CHECK-NEXT:    [[TMP1309:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1307]], i16 [[TMP1308]] release monotonic, align 2
15937 // CHECK-NEXT:    [[TMP1310:%.*]] = extractvalue { i16, i1 } [[TMP1309]], 1
15938 // CHECK-NEXT:    [[TMP1311:%.*]] = sext i1 [[TMP1310]] to i16
15939 // CHECK-NEXT:    store i16 [[TMP1311]], i16* [[SR]], align 2
15940 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15941 // CHECK-NEXT:    [[TMP1312:%.*]] = load i16, i16* [[SE]], align 2
15942 // CHECK-NEXT:    [[TMP1313:%.*]] = load i16, i16* [[SD]], align 2
15943 // CHECK-NEXT:    [[TMP1314:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1312]], i16 [[TMP1313]] release monotonic, align 2
15944 // CHECK-NEXT:    [[TMP1315:%.*]] = extractvalue { i16, i1 } [[TMP1314]], 0
15945 // CHECK-NEXT:    [[TMP1316:%.*]] = extractvalue { i16, i1 } [[TMP1314]], 1
15946 // CHECK-NEXT:    br i1 [[TMP1316]], label [[SX_ATOMIC_EXIT127:%.*]], label [[SX_ATOMIC_CONT128:%.*]]
15947 // CHECK:       sx.atomic.cont128:
15948 // CHECK-NEXT:    store i16 [[TMP1315]], i16* [[SV]], align 2
15949 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT127]]
15950 // CHECK:       sx.atomic.exit127:
15951 // CHECK-NEXT:    [[TMP1317:%.*]] = extractvalue { i16, i1 } [[TMP1314]], 1
15952 // CHECK-NEXT:    [[TMP1318:%.*]] = sext i1 [[TMP1317]] to i16
15953 // CHECK-NEXT:    store i16 [[TMP1318]], i16* [[SR]], align 2
15954 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15955 // CHECK-NEXT:    [[TMP1319:%.*]] = load i16, i16* [[SE]], align 2
15956 // CHECK-NEXT:    [[TMP1320:%.*]] = load i16, i16* [[SD]], align 2
15957 // CHECK-NEXT:    [[TMP1321:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1319]], i16 [[TMP1320]] release monotonic, align 2
15958 // CHECK-NEXT:    [[TMP1322:%.*]] = extractvalue { i16, i1 } [[TMP1321]], 0
15959 // CHECK-NEXT:    [[TMP1323:%.*]] = extractvalue { i16, i1 } [[TMP1321]], 1
15960 // CHECK-NEXT:    br i1 [[TMP1323]], label [[SX_ATOMIC_EXIT129:%.*]], label [[SX_ATOMIC_CONT130:%.*]]
15961 // CHECK:       sx.atomic.cont130:
15962 // CHECK-NEXT:    store i16 [[TMP1322]], i16* [[SV]], align 2
15963 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT129]]
15964 // CHECK:       sx.atomic.exit129:
15965 // CHECK-NEXT:    [[TMP1324:%.*]] = extractvalue { i16, i1 } [[TMP1321]], 1
15966 // CHECK-NEXT:    [[TMP1325:%.*]] = sext i1 [[TMP1324]] to i16
15967 // CHECK-NEXT:    store i16 [[TMP1325]], i16* [[SR]], align 2
15968 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15969 // CHECK-NEXT:    [[TMP1326:%.*]] = load i16, i16* [[SE]], align 2
15970 // CHECK-NEXT:    [[TMP1327:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1326]] seq_cst, align 2
15971 // CHECK-NEXT:    store i16 [[TMP1327]], i16* [[SV]], align 2
15972 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15973 // CHECK-NEXT:    [[TMP1328:%.*]] = load i16, i16* [[SE]], align 2
15974 // CHECK-NEXT:    [[TMP1329:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1328]] seq_cst, align 2
15975 // CHECK-NEXT:    store i16 [[TMP1329]], i16* [[SV]], align 2
15976 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15977 // CHECK-NEXT:    [[TMP1330:%.*]] = load i16, i16* [[SE]], align 2
15978 // CHECK-NEXT:    [[TMP1331:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1330]] seq_cst, align 2
15979 // CHECK-NEXT:    store i16 [[TMP1331]], i16* [[SV]], align 2
15980 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15981 // CHECK-NEXT:    [[TMP1332:%.*]] = load i16, i16* [[SE]], align 2
15982 // CHECK-NEXT:    [[TMP1333:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1332]] seq_cst, align 2
15983 // CHECK-NEXT:    store i16 [[TMP1333]], i16* [[SV]], align 2
15984 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15985 // CHECK-NEXT:    [[TMP1334:%.*]] = load i16, i16* [[SE]], align 2
15986 // CHECK-NEXT:    [[TMP1335:%.*]] = load i16, i16* [[SD]], align 2
15987 // CHECK-NEXT:    [[TMP1336:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1334]], i16 [[TMP1335]] seq_cst seq_cst, align 2
15988 // CHECK-NEXT:    [[TMP1337:%.*]] = extractvalue { i16, i1 } [[TMP1336]], 0
15989 // CHECK-NEXT:    store i16 [[TMP1337]], i16* [[SV]], align 2
15990 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15991 // CHECK-NEXT:    [[TMP1338:%.*]] = load i16, i16* [[SE]], align 2
15992 // CHECK-NEXT:    [[TMP1339:%.*]] = load i16, i16* [[SD]], align 2
15993 // CHECK-NEXT:    [[TMP1340:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1338]], i16 [[TMP1339]] seq_cst seq_cst, align 2
15994 // CHECK-NEXT:    [[TMP1341:%.*]] = extractvalue { i16, i1 } [[TMP1340]], 0
15995 // CHECK-NEXT:    store i16 [[TMP1341]], i16* [[SV]], align 2
15996 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
15997 // CHECK-NEXT:    [[TMP1342:%.*]] = load i16, i16* [[SE]], align 2
15998 // CHECK-NEXT:    [[TMP1343:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1342]] seq_cst, align 2
15999 // CHECK-NEXT:    [[TMP1344:%.*]] = icmp sgt i16 [[TMP1343]], [[TMP1342]]
16000 // CHECK-NEXT:    [[TMP1345:%.*]] = select i1 [[TMP1344]], i16 [[TMP1342]], i16 [[TMP1343]]
16001 // CHECK-NEXT:    store i16 [[TMP1345]], i16* [[SV]], align 2
16002 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16003 // CHECK-NEXT:    [[TMP1346:%.*]] = load i16, i16* [[SE]], align 2
16004 // CHECK-NEXT:    [[TMP1347:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1346]] seq_cst, align 2
16005 // CHECK-NEXT:    [[TMP1348:%.*]] = icmp slt i16 [[TMP1347]], [[TMP1346]]
16006 // CHECK-NEXT:    [[TMP1349:%.*]] = select i1 [[TMP1348]], i16 [[TMP1346]], i16 [[TMP1347]]
16007 // CHECK-NEXT:    store i16 [[TMP1349]], i16* [[SV]], align 2
16008 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16009 // CHECK-NEXT:    [[TMP1350:%.*]] = load i16, i16* [[SE]], align 2
16010 // CHECK-NEXT:    [[TMP1351:%.*]] = atomicrmw min i16* [[SX]], i16 [[TMP1350]] seq_cst, align 2
16011 // CHECK-NEXT:    [[TMP1352:%.*]] = icmp slt i16 [[TMP1351]], [[TMP1350]]
16012 // CHECK-NEXT:    [[TMP1353:%.*]] = select i1 [[TMP1352]], i16 [[TMP1350]], i16 [[TMP1351]]
16013 // CHECK-NEXT:    store i16 [[TMP1353]], i16* [[SV]], align 2
16014 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16015 // CHECK-NEXT:    [[TMP1354:%.*]] = load i16, i16* [[SE]], align 2
16016 // CHECK-NEXT:    [[TMP1355:%.*]] = atomicrmw max i16* [[SX]], i16 [[TMP1354]] seq_cst, align 2
16017 // CHECK-NEXT:    [[TMP1356:%.*]] = icmp sgt i16 [[TMP1355]], [[TMP1354]]
16018 // CHECK-NEXT:    [[TMP1357:%.*]] = select i1 [[TMP1356]], i16 [[TMP1354]], i16 [[TMP1355]]
16019 // CHECK-NEXT:    store i16 [[TMP1357]], i16* [[SV]], align 2
16020 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16021 // CHECK-NEXT:    [[TMP1358:%.*]] = load i16, i16* [[SE]], align 2
16022 // CHECK-NEXT:    [[TMP1359:%.*]] = load i16, i16* [[SD]], align 2
16023 // CHECK-NEXT:    [[TMP1360:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1358]], i16 [[TMP1359]] seq_cst seq_cst, align 2
16024 // CHECK-NEXT:    [[TMP1361:%.*]] = extractvalue { i16, i1 } [[TMP1360]], 0
16025 // CHECK-NEXT:    [[TMP1362:%.*]] = extractvalue { i16, i1 } [[TMP1360]], 1
16026 // CHECK-NEXT:    [[TMP1363:%.*]] = select i1 [[TMP1362]], i16 [[TMP1358]], i16 [[TMP1361]]
16027 // CHECK-NEXT:    store i16 [[TMP1363]], i16* [[SV]], align 2
16028 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16029 // CHECK-NEXT:    [[TMP1364:%.*]] = load i16, i16* [[SE]], align 2
16030 // CHECK-NEXT:    [[TMP1365:%.*]] = load i16, i16* [[SD]], align 2
16031 // CHECK-NEXT:    [[TMP1366:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1364]], i16 [[TMP1365]] seq_cst seq_cst, align 2
16032 // CHECK-NEXT:    [[TMP1367:%.*]] = extractvalue { i16, i1 } [[TMP1366]], 0
16033 // CHECK-NEXT:    [[TMP1368:%.*]] = extractvalue { i16, i1 } [[TMP1366]], 1
16034 // CHECK-NEXT:    [[TMP1369:%.*]] = select i1 [[TMP1368]], i16 [[TMP1364]], i16 [[TMP1367]]
16035 // CHECK-NEXT:    store i16 [[TMP1369]], i16* [[SV]], align 2
16036 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16037 // CHECK-NEXT:    [[TMP1370:%.*]] = load i16, i16* [[SE]], align 2
16038 // CHECK-NEXT:    [[TMP1371:%.*]] = load i16, i16* [[SD]], align 2
16039 // CHECK-NEXT:    [[TMP1372:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1370]], i16 [[TMP1371]] seq_cst seq_cst, align 2
16040 // CHECK-NEXT:    [[TMP1373:%.*]] = extractvalue { i16, i1 } [[TMP1372]], 0
16041 // CHECK-NEXT:    [[TMP1374:%.*]] = extractvalue { i16, i1 } [[TMP1372]], 1
16042 // CHECK-NEXT:    br i1 [[TMP1374]], label [[SX_ATOMIC_EXIT131:%.*]], label [[SX_ATOMIC_CONT132:%.*]]
16043 // CHECK:       sx.atomic.cont132:
16044 // CHECK-NEXT:    store i16 [[TMP1373]], i16* [[SV]], align 2
16045 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT131]]
16046 // CHECK:       sx.atomic.exit131:
16047 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16048 // CHECK-NEXT:    [[TMP1375:%.*]] = load i16, i16* [[SE]], align 2
16049 // CHECK-NEXT:    [[TMP1376:%.*]] = load i16, i16* [[SD]], align 2
16050 // CHECK-NEXT:    [[TMP1377:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1375]], i16 [[TMP1376]] seq_cst seq_cst, align 2
16051 // CHECK-NEXT:    [[TMP1378:%.*]] = extractvalue { i16, i1 } [[TMP1377]], 0
16052 // CHECK-NEXT:    [[TMP1379:%.*]] = extractvalue { i16, i1 } [[TMP1377]], 1
16053 // CHECK-NEXT:    br i1 [[TMP1379]], label [[SX_ATOMIC_EXIT133:%.*]], label [[SX_ATOMIC_CONT134:%.*]]
16054 // CHECK:       sx.atomic.cont134:
16055 // CHECK-NEXT:    store i16 [[TMP1378]], i16* [[SV]], align 2
16056 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT133]]
16057 // CHECK:       sx.atomic.exit133:
16058 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16059 // CHECK-NEXT:    [[TMP1380:%.*]] = load i16, i16* [[SE]], align 2
16060 // CHECK-NEXT:    [[TMP1381:%.*]] = load i16, i16* [[SD]], align 2
16061 // CHECK-NEXT:    [[TMP1382:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1380]], i16 [[TMP1381]] seq_cst seq_cst, align 2
16062 // CHECK-NEXT:    [[TMP1383:%.*]] = extractvalue { i16, i1 } [[TMP1382]], 1
16063 // CHECK-NEXT:    [[TMP1384:%.*]] = sext i1 [[TMP1383]] to i16
16064 // CHECK-NEXT:    store i16 [[TMP1384]], i16* [[SR]], align 2
16065 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16066 // CHECK-NEXT:    [[TMP1385:%.*]] = load i16, i16* [[SE]], align 2
16067 // CHECK-NEXT:    [[TMP1386:%.*]] = load i16, i16* [[SD]], align 2
16068 // CHECK-NEXT:    [[TMP1387:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1385]], i16 [[TMP1386]] seq_cst seq_cst, align 2
16069 // CHECK-NEXT:    [[TMP1388:%.*]] = extractvalue { i16, i1 } [[TMP1387]], 1
16070 // CHECK-NEXT:    [[TMP1389:%.*]] = sext i1 [[TMP1388]] to i16
16071 // CHECK-NEXT:    store i16 [[TMP1389]], i16* [[SR]], align 2
16072 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16073 // CHECK-NEXT:    [[TMP1390:%.*]] = load i16, i16* [[SE]], align 2
16074 // CHECK-NEXT:    [[TMP1391:%.*]] = load i16, i16* [[SD]], align 2
16075 // CHECK-NEXT:    [[TMP1392:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1390]], i16 [[TMP1391]] seq_cst seq_cst, align 2
16076 // CHECK-NEXT:    [[TMP1393:%.*]] = extractvalue { i16, i1 } [[TMP1392]], 0
16077 // CHECK-NEXT:    [[TMP1394:%.*]] = extractvalue { i16, i1 } [[TMP1392]], 1
16078 // CHECK-NEXT:    br i1 [[TMP1394]], label [[SX_ATOMIC_EXIT135:%.*]], label [[SX_ATOMIC_CONT136:%.*]]
16079 // CHECK:       sx.atomic.cont136:
16080 // CHECK-NEXT:    store i16 [[TMP1393]], i16* [[SV]], align 2
16081 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT135]]
16082 // CHECK:       sx.atomic.exit135:
16083 // CHECK-NEXT:    [[TMP1395:%.*]] = extractvalue { i16, i1 } [[TMP1392]], 1
16084 // CHECK-NEXT:    [[TMP1396:%.*]] = sext i1 [[TMP1395]] to i16
16085 // CHECK-NEXT:    store i16 [[TMP1396]], i16* [[SR]], align 2
16086 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16087 // CHECK-NEXT:    [[TMP1397:%.*]] = load i16, i16* [[SE]], align 2
16088 // CHECK-NEXT:    [[TMP1398:%.*]] = load i16, i16* [[SD]], align 2
16089 // CHECK-NEXT:    [[TMP1399:%.*]] = cmpxchg i16* [[SX]], i16 [[TMP1397]], i16 [[TMP1398]] seq_cst seq_cst, align 2
16090 // CHECK-NEXT:    [[TMP1400:%.*]] = extractvalue { i16, i1 } [[TMP1399]], 0
16091 // CHECK-NEXT:    [[TMP1401:%.*]] = extractvalue { i16, i1 } [[TMP1399]], 1
16092 // CHECK-NEXT:    br i1 [[TMP1401]], label [[SX_ATOMIC_EXIT137:%.*]], label [[SX_ATOMIC_CONT138:%.*]]
16093 // CHECK:       sx.atomic.cont138:
16094 // CHECK-NEXT:    store i16 [[TMP1400]], i16* [[SV]], align 2
16095 // CHECK-NEXT:    br label [[SX_ATOMIC_EXIT137]]
16096 // CHECK:       sx.atomic.exit137:
16097 // CHECK-NEXT:    [[TMP1402:%.*]] = extractvalue { i16, i1 } [[TMP1399]], 1
16098 // CHECK-NEXT:    [[TMP1403:%.*]] = sext i1 [[TMP1402]] to i16
16099 // CHECK-NEXT:    store i16 [[TMP1403]], i16* [[SR]], align 2
16100 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16101 // CHECK-NEXT:    [[TMP1404:%.*]] = load i16, i16* [[USE]], align 2
16102 // CHECK-NEXT:    [[TMP1405:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1404]] monotonic, align 2
16103 // CHECK-NEXT:    store i16 [[TMP1405]], i16* [[USV]], align 2
16104 // CHECK-NEXT:    [[TMP1406:%.*]] = load i16, i16* [[USE]], align 2
16105 // CHECK-NEXT:    [[TMP1407:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1406]] monotonic, align 2
16106 // CHECK-NEXT:    store i16 [[TMP1407]], i16* [[USV]], align 2
16107 // CHECK-NEXT:    [[TMP1408:%.*]] = load i16, i16* [[USE]], align 2
16108 // CHECK-NEXT:    [[TMP1409:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1408]] monotonic, align 2
16109 // CHECK-NEXT:    store i16 [[TMP1409]], i16* [[USV]], align 2
16110 // CHECK-NEXT:    [[TMP1410:%.*]] = load i16, i16* [[USE]], align 2
16111 // CHECK-NEXT:    [[TMP1411:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1410]] monotonic, align 2
16112 // CHECK-NEXT:    store i16 [[TMP1411]], i16* [[USV]], align 2
16113 // CHECK-NEXT:    [[TMP1412:%.*]] = load i16, i16* [[USE]], align 2
16114 // CHECK-NEXT:    [[TMP1413:%.*]] = load i16, i16* [[USD]], align 2
16115 // CHECK-NEXT:    [[TMP1414:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1412]], i16 [[TMP1413]] monotonic monotonic, align 2
16116 // CHECK-NEXT:    [[TMP1415:%.*]] = extractvalue { i16, i1 } [[TMP1414]], 0
16117 // CHECK-NEXT:    store i16 [[TMP1415]], i16* [[USV]], align 2
16118 // CHECK-NEXT:    [[TMP1416:%.*]] = load i16, i16* [[USE]], align 2
16119 // CHECK-NEXT:    [[TMP1417:%.*]] = load i16, i16* [[USD]], align 2
16120 // CHECK-NEXT:    [[TMP1418:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1416]], i16 [[TMP1417]] monotonic monotonic, align 2
16121 // CHECK-NEXT:    [[TMP1419:%.*]] = extractvalue { i16, i1 } [[TMP1418]], 0
16122 // CHECK-NEXT:    store i16 [[TMP1419]], i16* [[USV]], align 2
16123 // CHECK-NEXT:    [[TMP1420:%.*]] = load i16, i16* [[USE]], align 2
16124 // CHECK-NEXT:    [[TMP1421:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1420]] monotonic, align 2
16125 // CHECK-NEXT:    [[TMP1422:%.*]] = icmp ugt i16 [[TMP1421]], [[TMP1420]]
16126 // CHECK-NEXT:    [[TMP1423:%.*]] = select i1 [[TMP1422]], i16 [[TMP1420]], i16 [[TMP1421]]
16127 // CHECK-NEXT:    store i16 [[TMP1423]], i16* [[USV]], align 2
16128 // CHECK-NEXT:    [[TMP1424:%.*]] = load i16, i16* [[USE]], align 2
16129 // CHECK-NEXT:    [[TMP1425:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1424]] monotonic, align 2
16130 // CHECK-NEXT:    [[TMP1426:%.*]] = icmp ult i16 [[TMP1425]], [[TMP1424]]
16131 // CHECK-NEXT:    [[TMP1427:%.*]] = select i1 [[TMP1426]], i16 [[TMP1424]], i16 [[TMP1425]]
16132 // CHECK-NEXT:    store i16 [[TMP1427]], i16* [[USV]], align 2
16133 // CHECK-NEXT:    [[TMP1428:%.*]] = load i16, i16* [[USE]], align 2
16134 // CHECK-NEXT:    [[TMP1429:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1428]] monotonic, align 2
16135 // CHECK-NEXT:    [[TMP1430:%.*]] = icmp ult i16 [[TMP1429]], [[TMP1428]]
16136 // CHECK-NEXT:    [[TMP1431:%.*]] = select i1 [[TMP1430]], i16 [[TMP1428]], i16 [[TMP1429]]
16137 // CHECK-NEXT:    store i16 [[TMP1431]], i16* [[USV]], align 2
16138 // CHECK-NEXT:    [[TMP1432:%.*]] = load i16, i16* [[USE]], align 2
16139 // CHECK-NEXT:    [[TMP1433:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1432]] monotonic, align 2
16140 // CHECK-NEXT:    [[TMP1434:%.*]] = icmp ugt i16 [[TMP1433]], [[TMP1432]]
16141 // CHECK-NEXT:    [[TMP1435:%.*]] = select i1 [[TMP1434]], i16 [[TMP1432]], i16 [[TMP1433]]
16142 // CHECK-NEXT:    store i16 [[TMP1435]], i16* [[USV]], align 2
16143 // CHECK-NEXT:    [[TMP1436:%.*]] = load i16, i16* [[USE]], align 2
16144 // CHECK-NEXT:    [[TMP1437:%.*]] = load i16, i16* [[USD]], align 2
16145 // CHECK-NEXT:    [[TMP1438:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1436]], i16 [[TMP1437]] monotonic monotonic, align 2
16146 // CHECK-NEXT:    [[TMP1439:%.*]] = extractvalue { i16, i1 } [[TMP1438]], 0
16147 // CHECK-NEXT:    [[TMP1440:%.*]] = extractvalue { i16, i1 } [[TMP1438]], 1
16148 // CHECK-NEXT:    [[TMP1441:%.*]] = select i1 [[TMP1440]], i16 [[TMP1436]], i16 [[TMP1439]]
16149 // CHECK-NEXT:    store i16 [[TMP1441]], i16* [[USV]], align 2
16150 // CHECK-NEXT:    [[TMP1442:%.*]] = load i16, i16* [[USE]], align 2
16151 // CHECK-NEXT:    [[TMP1443:%.*]] = load i16, i16* [[USD]], align 2
16152 // CHECK-NEXT:    [[TMP1444:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1442]], i16 [[TMP1443]] monotonic monotonic, align 2
16153 // CHECK-NEXT:    [[TMP1445:%.*]] = extractvalue { i16, i1 } [[TMP1444]], 0
16154 // CHECK-NEXT:    [[TMP1446:%.*]] = extractvalue { i16, i1 } [[TMP1444]], 1
16155 // CHECK-NEXT:    [[TMP1447:%.*]] = select i1 [[TMP1446]], i16 [[TMP1442]], i16 [[TMP1445]]
16156 // CHECK-NEXT:    store i16 [[TMP1447]], i16* [[USV]], align 2
16157 // CHECK-NEXT:    [[TMP1448:%.*]] = load i16, i16* [[USE]], align 2
16158 // CHECK-NEXT:    [[TMP1449:%.*]] = load i16, i16* [[USD]], align 2
16159 // CHECK-NEXT:    [[TMP1450:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1448]], i16 [[TMP1449]] monotonic monotonic, align 2
16160 // CHECK-NEXT:    [[TMP1451:%.*]] = extractvalue { i16, i1 } [[TMP1450]], 0
16161 // CHECK-NEXT:    [[TMP1452:%.*]] = extractvalue { i16, i1 } [[TMP1450]], 1
16162 // CHECK-NEXT:    br i1 [[TMP1452]], label [[USX_ATOMIC_EXIT:%.*]], label [[USX_ATOMIC_CONT:%.*]]
16163 // CHECK:       usx.atomic.cont:
16164 // CHECK-NEXT:    store i16 [[TMP1451]], i16* [[USV]], align 2
16165 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT]]
16166 // CHECK:       usx.atomic.exit:
16167 // CHECK-NEXT:    [[TMP1453:%.*]] = load i16, i16* [[USE]], align 2
16168 // CHECK-NEXT:    [[TMP1454:%.*]] = load i16, i16* [[USD]], align 2
16169 // CHECK-NEXT:    [[TMP1455:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1453]], i16 [[TMP1454]] monotonic monotonic, align 2
16170 // CHECK-NEXT:    [[TMP1456:%.*]] = extractvalue { i16, i1 } [[TMP1455]], 0
16171 // CHECK-NEXT:    [[TMP1457:%.*]] = extractvalue { i16, i1 } [[TMP1455]], 1
16172 // CHECK-NEXT:    br i1 [[TMP1457]], label [[USX_ATOMIC_EXIT139:%.*]], label [[USX_ATOMIC_CONT140:%.*]]
16173 // CHECK:       usx.atomic.cont140:
16174 // CHECK-NEXT:    store i16 [[TMP1456]], i16* [[USV]], align 2
16175 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT139]]
16176 // CHECK:       usx.atomic.exit139:
16177 // CHECK-NEXT:    [[TMP1458:%.*]] = load i16, i16* [[USE]], align 2
16178 // CHECK-NEXT:    [[TMP1459:%.*]] = load i16, i16* [[USD]], align 2
16179 // CHECK-NEXT:    [[TMP1460:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1458]], i16 [[TMP1459]] monotonic monotonic, align 2
16180 // CHECK-NEXT:    [[TMP1461:%.*]] = extractvalue { i16, i1 } [[TMP1460]], 1
16181 // CHECK-NEXT:    [[TMP1462:%.*]] = zext i1 [[TMP1461]] to i16
16182 // CHECK-NEXT:    store i16 [[TMP1462]], i16* [[USR]], align 2
16183 // CHECK-NEXT:    [[TMP1463:%.*]] = load i16, i16* [[USE]], align 2
16184 // CHECK-NEXT:    [[TMP1464:%.*]] = load i16, i16* [[USD]], align 2
16185 // CHECK-NEXT:    [[TMP1465:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1463]], i16 [[TMP1464]] monotonic monotonic, align 2
16186 // CHECK-NEXT:    [[TMP1466:%.*]] = extractvalue { i16, i1 } [[TMP1465]], 1
16187 // CHECK-NEXT:    [[TMP1467:%.*]] = zext i1 [[TMP1466]] to i16
16188 // CHECK-NEXT:    store i16 [[TMP1467]], i16* [[USR]], align 2
16189 // CHECK-NEXT:    [[TMP1468:%.*]] = load i16, i16* [[USE]], align 2
16190 // CHECK-NEXT:    [[TMP1469:%.*]] = load i16, i16* [[USD]], align 2
16191 // CHECK-NEXT:    [[TMP1470:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1468]], i16 [[TMP1469]] monotonic monotonic, align 2
16192 // CHECK-NEXT:    [[TMP1471:%.*]] = extractvalue { i16, i1 } [[TMP1470]], 0
16193 // CHECK-NEXT:    [[TMP1472:%.*]] = extractvalue { i16, i1 } [[TMP1470]], 1
16194 // CHECK-NEXT:    br i1 [[TMP1472]], label [[USX_ATOMIC_EXIT141:%.*]], label [[USX_ATOMIC_CONT142:%.*]]
16195 // CHECK:       usx.atomic.cont142:
16196 // CHECK-NEXT:    store i16 [[TMP1471]], i16* [[USV]], align 2
16197 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT141]]
16198 // CHECK:       usx.atomic.exit141:
16199 // CHECK-NEXT:    [[TMP1473:%.*]] = extractvalue { i16, i1 } [[TMP1470]], 1
16200 // CHECK-NEXT:    [[TMP1474:%.*]] = zext i1 [[TMP1473]] to i16
16201 // CHECK-NEXT:    store i16 [[TMP1474]], i16* [[USR]], align 2
16202 // CHECK-NEXT:    [[TMP1475:%.*]] = load i16, i16* [[USE]], align 2
16203 // CHECK-NEXT:    [[TMP1476:%.*]] = load i16, i16* [[USD]], align 2
16204 // CHECK-NEXT:    [[TMP1477:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1475]], i16 [[TMP1476]] monotonic monotonic, align 2
16205 // CHECK-NEXT:    [[TMP1478:%.*]] = extractvalue { i16, i1 } [[TMP1477]], 0
16206 // CHECK-NEXT:    [[TMP1479:%.*]] = extractvalue { i16, i1 } [[TMP1477]], 1
16207 // CHECK-NEXT:    br i1 [[TMP1479]], label [[USX_ATOMIC_EXIT143:%.*]], label [[USX_ATOMIC_CONT144:%.*]]
16208 // CHECK:       usx.atomic.cont144:
16209 // CHECK-NEXT:    store i16 [[TMP1478]], i16* [[USV]], align 2
16210 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT143]]
16211 // CHECK:       usx.atomic.exit143:
16212 // CHECK-NEXT:    [[TMP1480:%.*]] = extractvalue { i16, i1 } [[TMP1477]], 1
16213 // CHECK-NEXT:    [[TMP1481:%.*]] = zext i1 [[TMP1480]] to i16
16214 // CHECK-NEXT:    store i16 [[TMP1481]], i16* [[USR]], align 2
16215 // CHECK-NEXT:    [[TMP1482:%.*]] = load i16, i16* [[USE]], align 2
16216 // CHECK-NEXT:    [[TMP1483:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1482]] acq_rel, align 2
16217 // CHECK-NEXT:    store i16 [[TMP1483]], i16* [[USV]], align 2
16218 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16219 // CHECK-NEXT:    [[TMP1484:%.*]] = load i16, i16* [[USE]], align 2
16220 // CHECK-NEXT:    [[TMP1485:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1484]] acq_rel, align 2
16221 // CHECK-NEXT:    store i16 [[TMP1485]], i16* [[USV]], align 2
16222 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16223 // CHECK-NEXT:    [[TMP1486:%.*]] = load i16, i16* [[USE]], align 2
16224 // CHECK-NEXT:    [[TMP1487:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1486]] acq_rel, align 2
16225 // CHECK-NEXT:    store i16 [[TMP1487]], i16* [[USV]], align 2
16226 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16227 // CHECK-NEXT:    [[TMP1488:%.*]] = load i16, i16* [[USE]], align 2
16228 // CHECK-NEXT:    [[TMP1489:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1488]] acq_rel, align 2
16229 // CHECK-NEXT:    store i16 [[TMP1489]], i16* [[USV]], align 2
16230 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16231 // CHECK-NEXT:    [[TMP1490:%.*]] = load i16, i16* [[USE]], align 2
16232 // CHECK-NEXT:    [[TMP1491:%.*]] = load i16, i16* [[USD]], align 2
16233 // CHECK-NEXT:    [[TMP1492:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1490]], i16 [[TMP1491]] acq_rel acquire, align 2
16234 // CHECK-NEXT:    [[TMP1493:%.*]] = extractvalue { i16, i1 } [[TMP1492]], 0
16235 // CHECK-NEXT:    store i16 [[TMP1493]], i16* [[USV]], align 2
16236 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16237 // CHECK-NEXT:    [[TMP1494:%.*]] = load i16, i16* [[USE]], align 2
16238 // CHECK-NEXT:    [[TMP1495:%.*]] = load i16, i16* [[USD]], align 2
16239 // CHECK-NEXT:    [[TMP1496:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1494]], i16 [[TMP1495]] acq_rel acquire, align 2
16240 // CHECK-NEXT:    [[TMP1497:%.*]] = extractvalue { i16, i1 } [[TMP1496]], 0
16241 // CHECK-NEXT:    store i16 [[TMP1497]], i16* [[USV]], align 2
16242 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16243 // CHECK-NEXT:    [[TMP1498:%.*]] = load i16, i16* [[USE]], align 2
16244 // CHECK-NEXT:    [[TMP1499:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1498]] acq_rel, align 2
16245 // CHECK-NEXT:    [[TMP1500:%.*]] = icmp ugt i16 [[TMP1499]], [[TMP1498]]
16246 // CHECK-NEXT:    [[TMP1501:%.*]] = select i1 [[TMP1500]], i16 [[TMP1498]], i16 [[TMP1499]]
16247 // CHECK-NEXT:    store i16 [[TMP1501]], i16* [[USV]], align 2
16248 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16249 // CHECK-NEXT:    [[TMP1502:%.*]] = load i16, i16* [[USE]], align 2
16250 // CHECK-NEXT:    [[TMP1503:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1502]] acq_rel, align 2
16251 // CHECK-NEXT:    [[TMP1504:%.*]] = icmp ult i16 [[TMP1503]], [[TMP1502]]
16252 // CHECK-NEXT:    [[TMP1505:%.*]] = select i1 [[TMP1504]], i16 [[TMP1502]], i16 [[TMP1503]]
16253 // CHECK-NEXT:    store i16 [[TMP1505]], i16* [[USV]], align 2
16254 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16255 // CHECK-NEXT:    [[TMP1506:%.*]] = load i16, i16* [[USE]], align 2
16256 // CHECK-NEXT:    [[TMP1507:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1506]] acq_rel, align 2
16257 // CHECK-NEXT:    [[TMP1508:%.*]] = icmp ult i16 [[TMP1507]], [[TMP1506]]
16258 // CHECK-NEXT:    [[TMP1509:%.*]] = select i1 [[TMP1508]], i16 [[TMP1506]], i16 [[TMP1507]]
16259 // CHECK-NEXT:    store i16 [[TMP1509]], i16* [[USV]], align 2
16260 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16261 // CHECK-NEXT:    [[TMP1510:%.*]] = load i16, i16* [[USE]], align 2
16262 // CHECK-NEXT:    [[TMP1511:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1510]] acq_rel, align 2
16263 // CHECK-NEXT:    [[TMP1512:%.*]] = icmp ugt i16 [[TMP1511]], [[TMP1510]]
16264 // CHECK-NEXT:    [[TMP1513:%.*]] = select i1 [[TMP1512]], i16 [[TMP1510]], i16 [[TMP1511]]
16265 // CHECK-NEXT:    store i16 [[TMP1513]], i16* [[USV]], align 2
16266 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16267 // CHECK-NEXT:    [[TMP1514:%.*]] = load i16, i16* [[USE]], align 2
16268 // CHECK-NEXT:    [[TMP1515:%.*]] = load i16, i16* [[USD]], align 2
16269 // CHECK-NEXT:    [[TMP1516:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1514]], i16 [[TMP1515]] acq_rel acquire, align 2
16270 // CHECK-NEXT:    [[TMP1517:%.*]] = extractvalue { i16, i1 } [[TMP1516]], 0
16271 // CHECK-NEXT:    [[TMP1518:%.*]] = extractvalue { i16, i1 } [[TMP1516]], 1
16272 // CHECK-NEXT:    [[TMP1519:%.*]] = select i1 [[TMP1518]], i16 [[TMP1514]], i16 [[TMP1517]]
16273 // CHECK-NEXT:    store i16 [[TMP1519]], i16* [[USV]], align 2
16274 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16275 // CHECK-NEXT:    [[TMP1520:%.*]] = load i16, i16* [[USE]], align 2
16276 // CHECK-NEXT:    [[TMP1521:%.*]] = load i16, i16* [[USD]], align 2
16277 // CHECK-NEXT:    [[TMP1522:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1520]], i16 [[TMP1521]] acq_rel acquire, align 2
16278 // CHECK-NEXT:    [[TMP1523:%.*]] = extractvalue { i16, i1 } [[TMP1522]], 0
16279 // CHECK-NEXT:    [[TMP1524:%.*]] = extractvalue { i16, i1 } [[TMP1522]], 1
16280 // CHECK-NEXT:    [[TMP1525:%.*]] = select i1 [[TMP1524]], i16 [[TMP1520]], i16 [[TMP1523]]
16281 // CHECK-NEXT:    store i16 [[TMP1525]], i16* [[USV]], align 2
16282 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16283 // CHECK-NEXT:    [[TMP1526:%.*]] = load i16, i16* [[USE]], align 2
16284 // CHECK-NEXT:    [[TMP1527:%.*]] = load i16, i16* [[USD]], align 2
16285 // CHECK-NEXT:    [[TMP1528:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1526]], i16 [[TMP1527]] acq_rel acquire, align 2
16286 // CHECK-NEXT:    [[TMP1529:%.*]] = extractvalue { i16, i1 } [[TMP1528]], 0
16287 // CHECK-NEXT:    [[TMP1530:%.*]] = extractvalue { i16, i1 } [[TMP1528]], 1
16288 // CHECK-NEXT:    br i1 [[TMP1530]], label [[USX_ATOMIC_EXIT145:%.*]], label [[USX_ATOMIC_CONT146:%.*]]
16289 // CHECK:       usx.atomic.cont146:
16290 // CHECK-NEXT:    store i16 [[TMP1529]], i16* [[USV]], align 2
16291 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT145]]
16292 // CHECK:       usx.atomic.exit145:
16293 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16294 // CHECK-NEXT:    [[TMP1531:%.*]] = load i16, i16* [[USE]], align 2
16295 // CHECK-NEXT:    [[TMP1532:%.*]] = load i16, i16* [[USD]], align 2
16296 // CHECK-NEXT:    [[TMP1533:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1531]], i16 [[TMP1532]] acq_rel acquire, align 2
16297 // CHECK-NEXT:    [[TMP1534:%.*]] = extractvalue { i16, i1 } [[TMP1533]], 0
16298 // CHECK-NEXT:    [[TMP1535:%.*]] = extractvalue { i16, i1 } [[TMP1533]], 1
16299 // CHECK-NEXT:    br i1 [[TMP1535]], label [[USX_ATOMIC_EXIT147:%.*]], label [[USX_ATOMIC_CONT148:%.*]]
16300 // CHECK:       usx.atomic.cont148:
16301 // CHECK-NEXT:    store i16 [[TMP1534]], i16* [[USV]], align 2
16302 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT147]]
16303 // CHECK:       usx.atomic.exit147:
16304 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16305 // CHECK-NEXT:    [[TMP1536:%.*]] = load i16, i16* [[USE]], align 2
16306 // CHECK-NEXT:    [[TMP1537:%.*]] = load i16, i16* [[USD]], align 2
16307 // CHECK-NEXT:    [[TMP1538:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1536]], i16 [[TMP1537]] acq_rel acquire, align 2
16308 // CHECK-NEXT:    [[TMP1539:%.*]] = extractvalue { i16, i1 } [[TMP1538]], 1
16309 // CHECK-NEXT:    [[TMP1540:%.*]] = zext i1 [[TMP1539]] to i16
16310 // CHECK-NEXT:    store i16 [[TMP1540]], i16* [[USR]], align 2
16311 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16312 // CHECK-NEXT:    [[TMP1541:%.*]] = load i16, i16* [[USE]], align 2
16313 // CHECK-NEXT:    [[TMP1542:%.*]] = load i16, i16* [[USD]], align 2
16314 // CHECK-NEXT:    [[TMP1543:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1541]], i16 [[TMP1542]] acq_rel acquire, align 2
16315 // CHECK-NEXT:    [[TMP1544:%.*]] = extractvalue { i16, i1 } [[TMP1543]], 1
16316 // CHECK-NEXT:    [[TMP1545:%.*]] = zext i1 [[TMP1544]] to i16
16317 // CHECK-NEXT:    store i16 [[TMP1545]], i16* [[USR]], align 2
16318 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16319 // CHECK-NEXT:    [[TMP1546:%.*]] = load i16, i16* [[USE]], align 2
16320 // CHECK-NEXT:    [[TMP1547:%.*]] = load i16, i16* [[USD]], align 2
16321 // CHECK-NEXT:    [[TMP1548:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1546]], i16 [[TMP1547]] acq_rel acquire, align 2
16322 // CHECK-NEXT:    [[TMP1549:%.*]] = extractvalue { i16, i1 } [[TMP1548]], 0
16323 // CHECK-NEXT:    [[TMP1550:%.*]] = extractvalue { i16, i1 } [[TMP1548]], 1
16324 // CHECK-NEXT:    br i1 [[TMP1550]], label [[USX_ATOMIC_EXIT149:%.*]], label [[USX_ATOMIC_CONT150:%.*]]
16325 // CHECK:       usx.atomic.cont150:
16326 // CHECK-NEXT:    store i16 [[TMP1549]], i16* [[USV]], align 2
16327 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT149]]
16328 // CHECK:       usx.atomic.exit149:
16329 // CHECK-NEXT:    [[TMP1551:%.*]] = extractvalue { i16, i1 } [[TMP1548]], 1
16330 // CHECK-NEXT:    [[TMP1552:%.*]] = zext i1 [[TMP1551]] to i16
16331 // CHECK-NEXT:    store i16 [[TMP1552]], i16* [[USR]], align 2
16332 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16333 // CHECK-NEXT:    [[TMP1553:%.*]] = load i16, i16* [[USE]], align 2
16334 // CHECK-NEXT:    [[TMP1554:%.*]] = load i16, i16* [[USD]], align 2
16335 // CHECK-NEXT:    [[TMP1555:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1553]], i16 [[TMP1554]] acq_rel acquire, align 2
16336 // CHECK-NEXT:    [[TMP1556:%.*]] = extractvalue { i16, i1 } [[TMP1555]], 0
16337 // CHECK-NEXT:    [[TMP1557:%.*]] = extractvalue { i16, i1 } [[TMP1555]], 1
16338 // CHECK-NEXT:    br i1 [[TMP1557]], label [[USX_ATOMIC_EXIT151:%.*]], label [[USX_ATOMIC_CONT152:%.*]]
16339 // CHECK:       usx.atomic.cont152:
16340 // CHECK-NEXT:    store i16 [[TMP1556]], i16* [[USV]], align 2
16341 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT151]]
16342 // CHECK:       usx.atomic.exit151:
16343 // CHECK-NEXT:    [[TMP1558:%.*]] = extractvalue { i16, i1 } [[TMP1555]], 1
16344 // CHECK-NEXT:    [[TMP1559:%.*]] = zext i1 [[TMP1558]] to i16
16345 // CHECK-NEXT:    store i16 [[TMP1559]], i16* [[USR]], align 2
16346 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16347 // CHECK-NEXT:    [[TMP1560:%.*]] = load i16, i16* [[USE]], align 2
16348 // CHECK-NEXT:    [[TMP1561:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1560]] acquire, align 2
16349 // CHECK-NEXT:    store i16 [[TMP1561]], i16* [[USV]], align 2
16350 // CHECK-NEXT:    [[TMP1562:%.*]] = load i16, i16* [[USE]], align 2
16351 // CHECK-NEXT:    [[TMP1563:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1562]] acquire, align 2
16352 // CHECK-NEXT:    store i16 [[TMP1563]], i16* [[USV]], align 2
16353 // CHECK-NEXT:    [[TMP1564:%.*]] = load i16, i16* [[USE]], align 2
16354 // CHECK-NEXT:    [[TMP1565:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1564]] acquire, align 2
16355 // CHECK-NEXT:    store i16 [[TMP1565]], i16* [[USV]], align 2
16356 // CHECK-NEXT:    [[TMP1566:%.*]] = load i16, i16* [[USE]], align 2
16357 // CHECK-NEXT:    [[TMP1567:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1566]] acquire, align 2
16358 // CHECK-NEXT:    store i16 [[TMP1567]], i16* [[USV]], align 2
16359 // CHECK-NEXT:    [[TMP1568:%.*]] = load i16, i16* [[USE]], align 2
16360 // CHECK-NEXT:    [[TMP1569:%.*]] = load i16, i16* [[USD]], align 2
16361 // CHECK-NEXT:    [[TMP1570:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1568]], i16 [[TMP1569]] acquire acquire, align 2
16362 // CHECK-NEXT:    [[TMP1571:%.*]] = extractvalue { i16, i1 } [[TMP1570]], 0
16363 // CHECK-NEXT:    store i16 [[TMP1571]], i16* [[USV]], align 2
16364 // CHECK-NEXT:    [[TMP1572:%.*]] = load i16, i16* [[USE]], align 2
16365 // CHECK-NEXT:    [[TMP1573:%.*]] = load i16, i16* [[USD]], align 2
16366 // CHECK-NEXT:    [[TMP1574:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1572]], i16 [[TMP1573]] acquire acquire, align 2
16367 // CHECK-NEXT:    [[TMP1575:%.*]] = extractvalue { i16, i1 } [[TMP1574]], 0
16368 // CHECK-NEXT:    store i16 [[TMP1575]], i16* [[USV]], align 2
16369 // CHECK-NEXT:    [[TMP1576:%.*]] = load i16, i16* [[USE]], align 2
16370 // CHECK-NEXT:    [[TMP1577:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1576]] acquire, align 2
16371 // CHECK-NEXT:    [[TMP1578:%.*]] = icmp ugt i16 [[TMP1577]], [[TMP1576]]
16372 // CHECK-NEXT:    [[TMP1579:%.*]] = select i1 [[TMP1578]], i16 [[TMP1576]], i16 [[TMP1577]]
16373 // CHECK-NEXT:    store i16 [[TMP1579]], i16* [[USV]], align 2
16374 // CHECK-NEXT:    [[TMP1580:%.*]] = load i16, i16* [[USE]], align 2
16375 // CHECK-NEXT:    [[TMP1581:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1580]] acquire, align 2
16376 // CHECK-NEXT:    [[TMP1582:%.*]] = icmp ult i16 [[TMP1581]], [[TMP1580]]
16377 // CHECK-NEXT:    [[TMP1583:%.*]] = select i1 [[TMP1582]], i16 [[TMP1580]], i16 [[TMP1581]]
16378 // CHECK-NEXT:    store i16 [[TMP1583]], i16* [[USV]], align 2
16379 // CHECK-NEXT:    [[TMP1584:%.*]] = load i16, i16* [[USE]], align 2
16380 // CHECK-NEXT:    [[TMP1585:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1584]] acquire, align 2
16381 // CHECK-NEXT:    [[TMP1586:%.*]] = icmp ult i16 [[TMP1585]], [[TMP1584]]
16382 // CHECK-NEXT:    [[TMP1587:%.*]] = select i1 [[TMP1586]], i16 [[TMP1584]], i16 [[TMP1585]]
16383 // CHECK-NEXT:    store i16 [[TMP1587]], i16* [[USV]], align 2
16384 // CHECK-NEXT:    [[TMP1588:%.*]] = load i16, i16* [[USE]], align 2
16385 // CHECK-NEXT:    [[TMP1589:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1588]] acquire, align 2
16386 // CHECK-NEXT:    [[TMP1590:%.*]] = icmp ugt i16 [[TMP1589]], [[TMP1588]]
16387 // CHECK-NEXT:    [[TMP1591:%.*]] = select i1 [[TMP1590]], i16 [[TMP1588]], i16 [[TMP1589]]
16388 // CHECK-NEXT:    store i16 [[TMP1591]], i16* [[USV]], align 2
16389 // CHECK-NEXT:    [[TMP1592:%.*]] = load i16, i16* [[USE]], align 2
16390 // CHECK-NEXT:    [[TMP1593:%.*]] = load i16, i16* [[USD]], align 2
16391 // CHECK-NEXT:    [[TMP1594:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1592]], i16 [[TMP1593]] acquire acquire, align 2
16392 // CHECK-NEXT:    [[TMP1595:%.*]] = extractvalue { i16, i1 } [[TMP1594]], 0
16393 // CHECK-NEXT:    [[TMP1596:%.*]] = extractvalue { i16, i1 } [[TMP1594]], 1
16394 // CHECK-NEXT:    [[TMP1597:%.*]] = select i1 [[TMP1596]], i16 [[TMP1592]], i16 [[TMP1595]]
16395 // CHECK-NEXT:    store i16 [[TMP1597]], i16* [[USV]], align 2
16396 // CHECK-NEXT:    [[TMP1598:%.*]] = load i16, i16* [[USE]], align 2
16397 // CHECK-NEXT:    [[TMP1599:%.*]] = load i16, i16* [[USD]], align 2
16398 // CHECK-NEXT:    [[TMP1600:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1598]], i16 [[TMP1599]] acquire acquire, align 2
16399 // CHECK-NEXT:    [[TMP1601:%.*]] = extractvalue { i16, i1 } [[TMP1600]], 0
16400 // CHECK-NEXT:    [[TMP1602:%.*]] = extractvalue { i16, i1 } [[TMP1600]], 1
16401 // CHECK-NEXT:    [[TMP1603:%.*]] = select i1 [[TMP1602]], i16 [[TMP1598]], i16 [[TMP1601]]
16402 // CHECK-NEXT:    store i16 [[TMP1603]], i16* [[USV]], align 2
16403 // CHECK-NEXT:    [[TMP1604:%.*]] = load i16, i16* [[USE]], align 2
16404 // CHECK-NEXT:    [[TMP1605:%.*]] = load i16, i16* [[USD]], align 2
16405 // CHECK-NEXT:    [[TMP1606:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1604]], i16 [[TMP1605]] acquire acquire, align 2
16406 // CHECK-NEXT:    [[TMP1607:%.*]] = extractvalue { i16, i1 } [[TMP1606]], 0
16407 // CHECK-NEXT:    [[TMP1608:%.*]] = extractvalue { i16, i1 } [[TMP1606]], 1
16408 // CHECK-NEXT:    br i1 [[TMP1608]], label [[USX_ATOMIC_EXIT153:%.*]], label [[USX_ATOMIC_CONT154:%.*]]
16409 // CHECK:       usx.atomic.cont154:
16410 // CHECK-NEXT:    store i16 [[TMP1607]], i16* [[USV]], align 2
16411 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT153]]
16412 // CHECK:       usx.atomic.exit153:
16413 // CHECK-NEXT:    [[TMP1609:%.*]] = load i16, i16* [[USE]], align 2
16414 // CHECK-NEXT:    [[TMP1610:%.*]] = load i16, i16* [[USD]], align 2
16415 // CHECK-NEXT:    [[TMP1611:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1609]], i16 [[TMP1610]] acquire acquire, align 2
16416 // CHECK-NEXT:    [[TMP1612:%.*]] = extractvalue { i16, i1 } [[TMP1611]], 0
16417 // CHECK-NEXT:    [[TMP1613:%.*]] = extractvalue { i16, i1 } [[TMP1611]], 1
16418 // CHECK-NEXT:    br i1 [[TMP1613]], label [[USX_ATOMIC_EXIT155:%.*]], label [[USX_ATOMIC_CONT156:%.*]]
16419 // CHECK:       usx.atomic.cont156:
16420 // CHECK-NEXT:    store i16 [[TMP1612]], i16* [[USV]], align 2
16421 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT155]]
16422 // CHECK:       usx.atomic.exit155:
16423 // CHECK-NEXT:    [[TMP1614:%.*]] = load i16, i16* [[USE]], align 2
16424 // CHECK-NEXT:    [[TMP1615:%.*]] = load i16, i16* [[USD]], align 2
16425 // CHECK-NEXT:    [[TMP1616:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1614]], i16 [[TMP1615]] acquire acquire, align 2
16426 // CHECK-NEXT:    [[TMP1617:%.*]] = extractvalue { i16, i1 } [[TMP1616]], 1
16427 // CHECK-NEXT:    [[TMP1618:%.*]] = zext i1 [[TMP1617]] to i16
16428 // CHECK-NEXT:    store i16 [[TMP1618]], i16* [[USR]], align 2
16429 // CHECK-NEXT:    [[TMP1619:%.*]] = load i16, i16* [[USE]], align 2
16430 // CHECK-NEXT:    [[TMP1620:%.*]] = load i16, i16* [[USD]], align 2
16431 // CHECK-NEXT:    [[TMP1621:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1619]], i16 [[TMP1620]] acquire acquire, align 2
16432 // CHECK-NEXT:    [[TMP1622:%.*]] = extractvalue { i16, i1 } [[TMP1621]], 1
16433 // CHECK-NEXT:    [[TMP1623:%.*]] = zext i1 [[TMP1622]] to i16
16434 // CHECK-NEXT:    store i16 [[TMP1623]], i16* [[USR]], align 2
16435 // CHECK-NEXT:    [[TMP1624:%.*]] = load i16, i16* [[USE]], align 2
16436 // CHECK-NEXT:    [[TMP1625:%.*]] = load i16, i16* [[USD]], align 2
16437 // CHECK-NEXT:    [[TMP1626:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1624]], i16 [[TMP1625]] acquire acquire, align 2
16438 // CHECK-NEXT:    [[TMP1627:%.*]] = extractvalue { i16, i1 } [[TMP1626]], 0
16439 // CHECK-NEXT:    [[TMP1628:%.*]] = extractvalue { i16, i1 } [[TMP1626]], 1
16440 // CHECK-NEXT:    br i1 [[TMP1628]], label [[USX_ATOMIC_EXIT157:%.*]], label [[USX_ATOMIC_CONT158:%.*]]
16441 // CHECK:       usx.atomic.cont158:
16442 // CHECK-NEXT:    store i16 [[TMP1627]], i16* [[USV]], align 2
16443 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT157]]
16444 // CHECK:       usx.atomic.exit157:
16445 // CHECK-NEXT:    [[TMP1629:%.*]] = extractvalue { i16, i1 } [[TMP1626]], 1
16446 // CHECK-NEXT:    [[TMP1630:%.*]] = zext i1 [[TMP1629]] to i16
16447 // CHECK-NEXT:    store i16 [[TMP1630]], i16* [[USR]], align 2
16448 // CHECK-NEXT:    [[TMP1631:%.*]] = load i16, i16* [[USE]], align 2
16449 // CHECK-NEXT:    [[TMP1632:%.*]] = load i16, i16* [[USD]], align 2
16450 // CHECK-NEXT:    [[TMP1633:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1631]], i16 [[TMP1632]] acquire acquire, align 2
16451 // CHECK-NEXT:    [[TMP1634:%.*]] = extractvalue { i16, i1 } [[TMP1633]], 0
16452 // CHECK-NEXT:    [[TMP1635:%.*]] = extractvalue { i16, i1 } [[TMP1633]], 1
16453 // CHECK-NEXT:    br i1 [[TMP1635]], label [[USX_ATOMIC_EXIT159:%.*]], label [[USX_ATOMIC_CONT160:%.*]]
16454 // CHECK:       usx.atomic.cont160:
16455 // CHECK-NEXT:    store i16 [[TMP1634]], i16* [[USV]], align 2
16456 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT159]]
16457 // CHECK:       usx.atomic.exit159:
16458 // CHECK-NEXT:    [[TMP1636:%.*]] = extractvalue { i16, i1 } [[TMP1633]], 1
16459 // CHECK-NEXT:    [[TMP1637:%.*]] = zext i1 [[TMP1636]] to i16
16460 // CHECK-NEXT:    store i16 [[TMP1637]], i16* [[USR]], align 2
16461 // CHECK-NEXT:    [[TMP1638:%.*]] = load i16, i16* [[USE]], align 2
16462 // CHECK-NEXT:    [[TMP1639:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1638]] monotonic, align 2
16463 // CHECK-NEXT:    store i16 [[TMP1639]], i16* [[USV]], align 2
16464 // CHECK-NEXT:    [[TMP1640:%.*]] = load i16, i16* [[USE]], align 2
16465 // CHECK-NEXT:    [[TMP1641:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1640]] monotonic, align 2
16466 // CHECK-NEXT:    store i16 [[TMP1641]], i16* [[USV]], align 2
16467 // CHECK-NEXT:    [[TMP1642:%.*]] = load i16, i16* [[USE]], align 2
16468 // CHECK-NEXT:    [[TMP1643:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1642]] monotonic, align 2
16469 // CHECK-NEXT:    store i16 [[TMP1643]], i16* [[USV]], align 2
16470 // CHECK-NEXT:    [[TMP1644:%.*]] = load i16, i16* [[USE]], align 2
16471 // CHECK-NEXT:    [[TMP1645:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1644]] monotonic, align 2
16472 // CHECK-NEXT:    store i16 [[TMP1645]], i16* [[USV]], align 2
16473 // CHECK-NEXT:    [[TMP1646:%.*]] = load i16, i16* [[USE]], align 2
16474 // CHECK-NEXT:    [[TMP1647:%.*]] = load i16, i16* [[USD]], align 2
16475 // CHECK-NEXT:    [[TMP1648:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1646]], i16 [[TMP1647]] monotonic monotonic, align 2
16476 // CHECK-NEXT:    [[TMP1649:%.*]] = extractvalue { i16, i1 } [[TMP1648]], 0
16477 // CHECK-NEXT:    store i16 [[TMP1649]], i16* [[USV]], align 2
16478 // CHECK-NEXT:    [[TMP1650:%.*]] = load i16, i16* [[USE]], align 2
16479 // CHECK-NEXT:    [[TMP1651:%.*]] = load i16, i16* [[USD]], align 2
16480 // CHECK-NEXT:    [[TMP1652:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1650]], i16 [[TMP1651]] monotonic monotonic, align 2
16481 // CHECK-NEXT:    [[TMP1653:%.*]] = extractvalue { i16, i1 } [[TMP1652]], 0
16482 // CHECK-NEXT:    store i16 [[TMP1653]], i16* [[USV]], align 2
16483 // CHECK-NEXT:    [[TMP1654:%.*]] = load i16, i16* [[USE]], align 2
16484 // CHECK-NEXT:    [[TMP1655:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1654]] monotonic, align 2
16485 // CHECK-NEXT:    [[TMP1656:%.*]] = icmp ugt i16 [[TMP1655]], [[TMP1654]]
16486 // CHECK-NEXT:    [[TMP1657:%.*]] = select i1 [[TMP1656]], i16 [[TMP1654]], i16 [[TMP1655]]
16487 // CHECK-NEXT:    store i16 [[TMP1657]], i16* [[USV]], align 2
16488 // CHECK-NEXT:    [[TMP1658:%.*]] = load i16, i16* [[USE]], align 2
16489 // CHECK-NEXT:    [[TMP1659:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1658]] monotonic, align 2
16490 // CHECK-NEXT:    [[TMP1660:%.*]] = icmp ult i16 [[TMP1659]], [[TMP1658]]
16491 // CHECK-NEXT:    [[TMP1661:%.*]] = select i1 [[TMP1660]], i16 [[TMP1658]], i16 [[TMP1659]]
16492 // CHECK-NEXT:    store i16 [[TMP1661]], i16* [[USV]], align 2
16493 // CHECK-NEXT:    [[TMP1662:%.*]] = load i16, i16* [[USE]], align 2
16494 // CHECK-NEXT:    [[TMP1663:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1662]] monotonic, align 2
16495 // CHECK-NEXT:    [[TMP1664:%.*]] = icmp ult i16 [[TMP1663]], [[TMP1662]]
16496 // CHECK-NEXT:    [[TMP1665:%.*]] = select i1 [[TMP1664]], i16 [[TMP1662]], i16 [[TMP1663]]
16497 // CHECK-NEXT:    store i16 [[TMP1665]], i16* [[USV]], align 2
16498 // CHECK-NEXT:    [[TMP1666:%.*]] = load i16, i16* [[USE]], align 2
16499 // CHECK-NEXT:    [[TMP1667:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1666]] monotonic, align 2
16500 // CHECK-NEXT:    [[TMP1668:%.*]] = icmp ugt i16 [[TMP1667]], [[TMP1666]]
16501 // CHECK-NEXT:    [[TMP1669:%.*]] = select i1 [[TMP1668]], i16 [[TMP1666]], i16 [[TMP1667]]
16502 // CHECK-NEXT:    store i16 [[TMP1669]], i16* [[USV]], align 2
16503 // CHECK-NEXT:    [[TMP1670:%.*]] = load i16, i16* [[USE]], align 2
16504 // CHECK-NEXT:    [[TMP1671:%.*]] = load i16, i16* [[USD]], align 2
16505 // CHECK-NEXT:    [[TMP1672:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1670]], i16 [[TMP1671]] monotonic monotonic, align 2
16506 // CHECK-NEXT:    [[TMP1673:%.*]] = extractvalue { i16, i1 } [[TMP1672]], 0
16507 // CHECK-NEXT:    [[TMP1674:%.*]] = extractvalue { i16, i1 } [[TMP1672]], 1
16508 // CHECK-NEXT:    [[TMP1675:%.*]] = select i1 [[TMP1674]], i16 [[TMP1670]], i16 [[TMP1673]]
16509 // CHECK-NEXT:    store i16 [[TMP1675]], i16* [[USV]], align 2
16510 // CHECK-NEXT:    [[TMP1676:%.*]] = load i16, i16* [[USE]], align 2
16511 // CHECK-NEXT:    [[TMP1677:%.*]] = load i16, i16* [[USD]], align 2
16512 // CHECK-NEXT:    [[TMP1678:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1676]], i16 [[TMP1677]] monotonic monotonic, align 2
16513 // CHECK-NEXT:    [[TMP1679:%.*]] = extractvalue { i16, i1 } [[TMP1678]], 0
16514 // CHECK-NEXT:    [[TMP1680:%.*]] = extractvalue { i16, i1 } [[TMP1678]], 1
16515 // CHECK-NEXT:    [[TMP1681:%.*]] = select i1 [[TMP1680]], i16 [[TMP1676]], i16 [[TMP1679]]
16516 // CHECK-NEXT:    store i16 [[TMP1681]], i16* [[USV]], align 2
16517 // CHECK-NEXT:    [[TMP1682:%.*]] = load i16, i16* [[USE]], align 2
16518 // CHECK-NEXT:    [[TMP1683:%.*]] = load i16, i16* [[USD]], align 2
16519 // CHECK-NEXT:    [[TMP1684:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1682]], i16 [[TMP1683]] monotonic monotonic, align 2
16520 // CHECK-NEXT:    [[TMP1685:%.*]] = extractvalue { i16, i1 } [[TMP1684]], 0
16521 // CHECK-NEXT:    [[TMP1686:%.*]] = extractvalue { i16, i1 } [[TMP1684]], 1
16522 // CHECK-NEXT:    br i1 [[TMP1686]], label [[USX_ATOMIC_EXIT161:%.*]], label [[USX_ATOMIC_CONT162:%.*]]
16523 // CHECK:       usx.atomic.cont162:
16524 // CHECK-NEXT:    store i16 [[TMP1685]], i16* [[USV]], align 2
16525 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT161]]
16526 // CHECK:       usx.atomic.exit161:
16527 // CHECK-NEXT:    [[TMP1687:%.*]] = load i16, i16* [[USE]], align 2
16528 // CHECK-NEXT:    [[TMP1688:%.*]] = load i16, i16* [[USD]], align 2
16529 // CHECK-NEXT:    [[TMP1689:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1687]], i16 [[TMP1688]] monotonic monotonic, align 2
16530 // CHECK-NEXT:    [[TMP1690:%.*]] = extractvalue { i16, i1 } [[TMP1689]], 0
16531 // CHECK-NEXT:    [[TMP1691:%.*]] = extractvalue { i16, i1 } [[TMP1689]], 1
16532 // CHECK-NEXT:    br i1 [[TMP1691]], label [[USX_ATOMIC_EXIT163:%.*]], label [[USX_ATOMIC_CONT164:%.*]]
16533 // CHECK:       usx.atomic.cont164:
16534 // CHECK-NEXT:    store i16 [[TMP1690]], i16* [[USV]], align 2
16535 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT163]]
16536 // CHECK:       usx.atomic.exit163:
16537 // CHECK-NEXT:    [[TMP1692:%.*]] = load i16, i16* [[USE]], align 2
16538 // CHECK-NEXT:    [[TMP1693:%.*]] = load i16, i16* [[USD]], align 2
16539 // CHECK-NEXT:    [[TMP1694:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1692]], i16 [[TMP1693]] monotonic monotonic, align 2
16540 // CHECK-NEXT:    [[TMP1695:%.*]] = extractvalue { i16, i1 } [[TMP1694]], 1
16541 // CHECK-NEXT:    [[TMP1696:%.*]] = zext i1 [[TMP1695]] to i16
16542 // CHECK-NEXT:    store i16 [[TMP1696]], i16* [[USR]], align 2
16543 // CHECK-NEXT:    [[TMP1697:%.*]] = load i16, i16* [[USE]], align 2
16544 // CHECK-NEXT:    [[TMP1698:%.*]] = load i16, i16* [[USD]], align 2
16545 // CHECK-NEXT:    [[TMP1699:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1697]], i16 [[TMP1698]] monotonic monotonic, align 2
16546 // CHECK-NEXT:    [[TMP1700:%.*]] = extractvalue { i16, i1 } [[TMP1699]], 1
16547 // CHECK-NEXT:    [[TMP1701:%.*]] = zext i1 [[TMP1700]] to i16
16548 // CHECK-NEXT:    store i16 [[TMP1701]], i16* [[USR]], align 2
16549 // CHECK-NEXT:    [[TMP1702:%.*]] = load i16, i16* [[USE]], align 2
16550 // CHECK-NEXT:    [[TMP1703:%.*]] = load i16, i16* [[USD]], align 2
16551 // CHECK-NEXT:    [[TMP1704:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1702]], i16 [[TMP1703]] monotonic monotonic, align 2
16552 // CHECK-NEXT:    [[TMP1705:%.*]] = extractvalue { i16, i1 } [[TMP1704]], 0
16553 // CHECK-NEXT:    [[TMP1706:%.*]] = extractvalue { i16, i1 } [[TMP1704]], 1
16554 // CHECK-NEXT:    br i1 [[TMP1706]], label [[USX_ATOMIC_EXIT165:%.*]], label [[USX_ATOMIC_CONT166:%.*]]
16555 // CHECK:       usx.atomic.cont166:
16556 // CHECK-NEXT:    store i16 [[TMP1705]], i16* [[USV]], align 2
16557 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT165]]
16558 // CHECK:       usx.atomic.exit165:
16559 // CHECK-NEXT:    [[TMP1707:%.*]] = extractvalue { i16, i1 } [[TMP1704]], 1
16560 // CHECK-NEXT:    [[TMP1708:%.*]] = zext i1 [[TMP1707]] to i16
16561 // CHECK-NEXT:    store i16 [[TMP1708]], i16* [[USR]], align 2
16562 // CHECK-NEXT:    [[TMP1709:%.*]] = load i16, i16* [[USE]], align 2
16563 // CHECK-NEXT:    [[TMP1710:%.*]] = load i16, i16* [[USD]], align 2
16564 // CHECK-NEXT:    [[TMP1711:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1709]], i16 [[TMP1710]] monotonic monotonic, align 2
16565 // CHECK-NEXT:    [[TMP1712:%.*]] = extractvalue { i16, i1 } [[TMP1711]], 0
16566 // CHECK-NEXT:    [[TMP1713:%.*]] = extractvalue { i16, i1 } [[TMP1711]], 1
16567 // CHECK-NEXT:    br i1 [[TMP1713]], label [[USX_ATOMIC_EXIT167:%.*]], label [[USX_ATOMIC_CONT168:%.*]]
16568 // CHECK:       usx.atomic.cont168:
16569 // CHECK-NEXT:    store i16 [[TMP1712]], i16* [[USV]], align 2
16570 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT167]]
16571 // CHECK:       usx.atomic.exit167:
16572 // CHECK-NEXT:    [[TMP1714:%.*]] = extractvalue { i16, i1 } [[TMP1711]], 1
16573 // CHECK-NEXT:    [[TMP1715:%.*]] = zext i1 [[TMP1714]] to i16
16574 // CHECK-NEXT:    store i16 [[TMP1715]], i16* [[USR]], align 2
16575 // CHECK-NEXT:    [[TMP1716:%.*]] = load i16, i16* [[USE]], align 2
16576 // CHECK-NEXT:    [[TMP1717:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1716]] release, align 2
16577 // CHECK-NEXT:    store i16 [[TMP1717]], i16* [[USV]], align 2
16578 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16579 // CHECK-NEXT:    [[TMP1718:%.*]] = load i16, i16* [[USE]], align 2
16580 // CHECK-NEXT:    [[TMP1719:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1718]] release, align 2
16581 // CHECK-NEXT:    store i16 [[TMP1719]], i16* [[USV]], align 2
16582 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16583 // CHECK-NEXT:    [[TMP1720:%.*]] = load i16, i16* [[USE]], align 2
16584 // CHECK-NEXT:    [[TMP1721:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1720]] release, align 2
16585 // CHECK-NEXT:    store i16 [[TMP1721]], i16* [[USV]], align 2
16586 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16587 // CHECK-NEXT:    [[TMP1722:%.*]] = load i16, i16* [[USE]], align 2
16588 // CHECK-NEXT:    [[TMP1723:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1722]] release, align 2
16589 // CHECK-NEXT:    store i16 [[TMP1723]], i16* [[USV]], align 2
16590 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16591 // CHECK-NEXT:    [[TMP1724:%.*]] = load i16, i16* [[USE]], align 2
16592 // CHECK-NEXT:    [[TMP1725:%.*]] = load i16, i16* [[USD]], align 2
16593 // CHECK-NEXT:    [[TMP1726:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1724]], i16 [[TMP1725]] release monotonic, align 2
16594 // CHECK-NEXT:    [[TMP1727:%.*]] = extractvalue { i16, i1 } [[TMP1726]], 0
16595 // CHECK-NEXT:    store i16 [[TMP1727]], i16* [[USV]], align 2
16596 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16597 // CHECK-NEXT:    [[TMP1728:%.*]] = load i16, i16* [[USE]], align 2
16598 // CHECK-NEXT:    [[TMP1729:%.*]] = load i16, i16* [[USD]], align 2
16599 // CHECK-NEXT:    [[TMP1730:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1728]], i16 [[TMP1729]] release monotonic, align 2
16600 // CHECK-NEXT:    [[TMP1731:%.*]] = extractvalue { i16, i1 } [[TMP1730]], 0
16601 // CHECK-NEXT:    store i16 [[TMP1731]], i16* [[USV]], align 2
16602 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16603 // CHECK-NEXT:    [[TMP1732:%.*]] = load i16, i16* [[USE]], align 2
16604 // CHECK-NEXT:    [[TMP1733:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1732]] release, align 2
16605 // CHECK-NEXT:    [[TMP1734:%.*]] = icmp ugt i16 [[TMP1733]], [[TMP1732]]
16606 // CHECK-NEXT:    [[TMP1735:%.*]] = select i1 [[TMP1734]], i16 [[TMP1732]], i16 [[TMP1733]]
16607 // CHECK-NEXT:    store i16 [[TMP1735]], i16* [[USV]], align 2
16608 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16609 // CHECK-NEXT:    [[TMP1736:%.*]] = load i16, i16* [[USE]], align 2
16610 // CHECK-NEXT:    [[TMP1737:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1736]] release, align 2
16611 // CHECK-NEXT:    [[TMP1738:%.*]] = icmp ult i16 [[TMP1737]], [[TMP1736]]
16612 // CHECK-NEXT:    [[TMP1739:%.*]] = select i1 [[TMP1738]], i16 [[TMP1736]], i16 [[TMP1737]]
16613 // CHECK-NEXT:    store i16 [[TMP1739]], i16* [[USV]], align 2
16614 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16615 // CHECK-NEXT:    [[TMP1740:%.*]] = load i16, i16* [[USE]], align 2
16616 // CHECK-NEXT:    [[TMP1741:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1740]] release, align 2
16617 // CHECK-NEXT:    [[TMP1742:%.*]] = icmp ult i16 [[TMP1741]], [[TMP1740]]
16618 // CHECK-NEXT:    [[TMP1743:%.*]] = select i1 [[TMP1742]], i16 [[TMP1740]], i16 [[TMP1741]]
16619 // CHECK-NEXT:    store i16 [[TMP1743]], i16* [[USV]], align 2
16620 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16621 // CHECK-NEXT:    [[TMP1744:%.*]] = load i16, i16* [[USE]], align 2
16622 // CHECK-NEXT:    [[TMP1745:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1744]] release, align 2
16623 // CHECK-NEXT:    [[TMP1746:%.*]] = icmp ugt i16 [[TMP1745]], [[TMP1744]]
16624 // CHECK-NEXT:    [[TMP1747:%.*]] = select i1 [[TMP1746]], i16 [[TMP1744]], i16 [[TMP1745]]
16625 // CHECK-NEXT:    store i16 [[TMP1747]], i16* [[USV]], align 2
16626 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16627 // CHECK-NEXT:    [[TMP1748:%.*]] = load i16, i16* [[USE]], align 2
16628 // CHECK-NEXT:    [[TMP1749:%.*]] = load i16, i16* [[USD]], align 2
16629 // CHECK-NEXT:    [[TMP1750:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1748]], i16 [[TMP1749]] release monotonic, align 2
16630 // CHECK-NEXT:    [[TMP1751:%.*]] = extractvalue { i16, i1 } [[TMP1750]], 0
16631 // CHECK-NEXT:    [[TMP1752:%.*]] = extractvalue { i16, i1 } [[TMP1750]], 1
16632 // CHECK-NEXT:    [[TMP1753:%.*]] = select i1 [[TMP1752]], i16 [[TMP1748]], i16 [[TMP1751]]
16633 // CHECK-NEXT:    store i16 [[TMP1753]], i16* [[USV]], align 2
16634 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16635 // CHECK-NEXT:    [[TMP1754:%.*]] = load i16, i16* [[USE]], align 2
16636 // CHECK-NEXT:    [[TMP1755:%.*]] = load i16, i16* [[USD]], align 2
16637 // CHECK-NEXT:    [[TMP1756:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1754]], i16 [[TMP1755]] release monotonic, align 2
16638 // CHECK-NEXT:    [[TMP1757:%.*]] = extractvalue { i16, i1 } [[TMP1756]], 0
16639 // CHECK-NEXT:    [[TMP1758:%.*]] = extractvalue { i16, i1 } [[TMP1756]], 1
16640 // CHECK-NEXT:    [[TMP1759:%.*]] = select i1 [[TMP1758]], i16 [[TMP1754]], i16 [[TMP1757]]
16641 // CHECK-NEXT:    store i16 [[TMP1759]], i16* [[USV]], align 2
16642 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16643 // CHECK-NEXT:    [[TMP1760:%.*]] = load i16, i16* [[USE]], align 2
16644 // CHECK-NEXT:    [[TMP1761:%.*]] = load i16, i16* [[USD]], align 2
16645 // CHECK-NEXT:    [[TMP1762:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1760]], i16 [[TMP1761]] release monotonic, align 2
16646 // CHECK-NEXT:    [[TMP1763:%.*]] = extractvalue { i16, i1 } [[TMP1762]], 0
16647 // CHECK-NEXT:    [[TMP1764:%.*]] = extractvalue { i16, i1 } [[TMP1762]], 1
16648 // CHECK-NEXT:    br i1 [[TMP1764]], label [[USX_ATOMIC_EXIT169:%.*]], label [[USX_ATOMIC_CONT170:%.*]]
16649 // CHECK:       usx.atomic.cont170:
16650 // CHECK-NEXT:    store i16 [[TMP1763]], i16* [[USV]], align 2
16651 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT169]]
16652 // CHECK:       usx.atomic.exit169:
16653 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16654 // CHECK-NEXT:    [[TMP1765:%.*]] = load i16, i16* [[USE]], align 2
16655 // CHECK-NEXT:    [[TMP1766:%.*]] = load i16, i16* [[USD]], align 2
16656 // CHECK-NEXT:    [[TMP1767:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1765]], i16 [[TMP1766]] release monotonic, align 2
16657 // CHECK-NEXT:    [[TMP1768:%.*]] = extractvalue { i16, i1 } [[TMP1767]], 0
16658 // CHECK-NEXT:    [[TMP1769:%.*]] = extractvalue { i16, i1 } [[TMP1767]], 1
16659 // CHECK-NEXT:    br i1 [[TMP1769]], label [[USX_ATOMIC_EXIT171:%.*]], label [[USX_ATOMIC_CONT172:%.*]]
16660 // CHECK:       usx.atomic.cont172:
16661 // CHECK-NEXT:    store i16 [[TMP1768]], i16* [[USV]], align 2
16662 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT171]]
16663 // CHECK:       usx.atomic.exit171:
16664 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16665 // CHECK-NEXT:    [[TMP1770:%.*]] = load i16, i16* [[USE]], align 2
16666 // CHECK-NEXT:    [[TMP1771:%.*]] = load i16, i16* [[USD]], align 2
16667 // CHECK-NEXT:    [[TMP1772:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1770]], i16 [[TMP1771]] release monotonic, align 2
16668 // CHECK-NEXT:    [[TMP1773:%.*]] = extractvalue { i16, i1 } [[TMP1772]], 1
16669 // CHECK-NEXT:    [[TMP1774:%.*]] = zext i1 [[TMP1773]] to i16
16670 // CHECK-NEXT:    store i16 [[TMP1774]], i16* [[USR]], align 2
16671 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16672 // CHECK-NEXT:    [[TMP1775:%.*]] = load i16, i16* [[USE]], align 2
16673 // CHECK-NEXT:    [[TMP1776:%.*]] = load i16, i16* [[USD]], align 2
16674 // CHECK-NEXT:    [[TMP1777:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1775]], i16 [[TMP1776]] release monotonic, align 2
16675 // CHECK-NEXT:    [[TMP1778:%.*]] = extractvalue { i16, i1 } [[TMP1777]], 1
16676 // CHECK-NEXT:    [[TMP1779:%.*]] = zext i1 [[TMP1778]] to i16
16677 // CHECK-NEXT:    store i16 [[TMP1779]], i16* [[USR]], align 2
16678 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16679 // CHECK-NEXT:    [[TMP1780:%.*]] = load i16, i16* [[USE]], align 2
16680 // CHECK-NEXT:    [[TMP1781:%.*]] = load i16, i16* [[USD]], align 2
16681 // CHECK-NEXT:    [[TMP1782:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1780]], i16 [[TMP1781]] release monotonic, align 2
16682 // CHECK-NEXT:    [[TMP1783:%.*]] = extractvalue { i16, i1 } [[TMP1782]], 0
16683 // CHECK-NEXT:    [[TMP1784:%.*]] = extractvalue { i16, i1 } [[TMP1782]], 1
16684 // CHECK-NEXT:    br i1 [[TMP1784]], label [[USX_ATOMIC_EXIT173:%.*]], label [[USX_ATOMIC_CONT174:%.*]]
16685 // CHECK:       usx.atomic.cont174:
16686 // CHECK-NEXT:    store i16 [[TMP1783]], i16* [[USV]], align 2
16687 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT173]]
16688 // CHECK:       usx.atomic.exit173:
16689 // CHECK-NEXT:    [[TMP1785:%.*]] = extractvalue { i16, i1 } [[TMP1782]], 1
16690 // CHECK-NEXT:    [[TMP1786:%.*]] = zext i1 [[TMP1785]] to i16
16691 // CHECK-NEXT:    store i16 [[TMP1786]], i16* [[USR]], align 2
16692 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16693 // CHECK-NEXT:    [[TMP1787:%.*]] = load i16, i16* [[USE]], align 2
16694 // CHECK-NEXT:    [[TMP1788:%.*]] = load i16, i16* [[USD]], align 2
16695 // CHECK-NEXT:    [[TMP1789:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1787]], i16 [[TMP1788]] release monotonic, align 2
16696 // CHECK-NEXT:    [[TMP1790:%.*]] = extractvalue { i16, i1 } [[TMP1789]], 0
16697 // CHECK-NEXT:    [[TMP1791:%.*]] = extractvalue { i16, i1 } [[TMP1789]], 1
16698 // CHECK-NEXT:    br i1 [[TMP1791]], label [[USX_ATOMIC_EXIT175:%.*]], label [[USX_ATOMIC_CONT176:%.*]]
16699 // CHECK:       usx.atomic.cont176:
16700 // CHECK-NEXT:    store i16 [[TMP1790]], i16* [[USV]], align 2
16701 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT175]]
16702 // CHECK:       usx.atomic.exit175:
16703 // CHECK-NEXT:    [[TMP1792:%.*]] = extractvalue { i16, i1 } [[TMP1789]], 1
16704 // CHECK-NEXT:    [[TMP1793:%.*]] = zext i1 [[TMP1792]] to i16
16705 // CHECK-NEXT:    store i16 [[TMP1793]], i16* [[USR]], align 2
16706 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16707 // CHECK-NEXT:    [[TMP1794:%.*]] = load i16, i16* [[USE]], align 2
16708 // CHECK-NEXT:    [[TMP1795:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1794]] seq_cst, align 2
16709 // CHECK-NEXT:    store i16 [[TMP1795]], i16* [[USV]], align 2
16710 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16711 // CHECK-NEXT:    [[TMP1796:%.*]] = load i16, i16* [[USE]], align 2
16712 // CHECK-NEXT:    [[TMP1797:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1796]] seq_cst, align 2
16713 // CHECK-NEXT:    store i16 [[TMP1797]], i16* [[USV]], align 2
16714 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16715 // CHECK-NEXT:    [[TMP1798:%.*]] = load i16, i16* [[USE]], align 2
16716 // CHECK-NEXT:    [[TMP1799:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1798]] seq_cst, align 2
16717 // CHECK-NEXT:    store i16 [[TMP1799]], i16* [[USV]], align 2
16718 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16719 // CHECK-NEXT:    [[TMP1800:%.*]] = load i16, i16* [[USE]], align 2
16720 // CHECK-NEXT:    [[TMP1801:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1800]] seq_cst, align 2
16721 // CHECK-NEXT:    store i16 [[TMP1801]], i16* [[USV]], align 2
16722 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16723 // CHECK-NEXT:    [[TMP1802:%.*]] = load i16, i16* [[USE]], align 2
16724 // CHECK-NEXT:    [[TMP1803:%.*]] = load i16, i16* [[USD]], align 2
16725 // CHECK-NEXT:    [[TMP1804:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1802]], i16 [[TMP1803]] seq_cst seq_cst, align 2
16726 // CHECK-NEXT:    [[TMP1805:%.*]] = extractvalue { i16, i1 } [[TMP1804]], 0
16727 // CHECK-NEXT:    store i16 [[TMP1805]], i16* [[USV]], align 2
16728 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16729 // CHECK-NEXT:    [[TMP1806:%.*]] = load i16, i16* [[USE]], align 2
16730 // CHECK-NEXT:    [[TMP1807:%.*]] = load i16, i16* [[USD]], align 2
16731 // CHECK-NEXT:    [[TMP1808:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1806]], i16 [[TMP1807]] seq_cst seq_cst, align 2
16732 // CHECK-NEXT:    [[TMP1809:%.*]] = extractvalue { i16, i1 } [[TMP1808]], 0
16733 // CHECK-NEXT:    store i16 [[TMP1809]], i16* [[USV]], align 2
16734 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16735 // CHECK-NEXT:    [[TMP1810:%.*]] = load i16, i16* [[USE]], align 2
16736 // CHECK-NEXT:    [[TMP1811:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1810]] seq_cst, align 2
16737 // CHECK-NEXT:    [[TMP1812:%.*]] = icmp ugt i16 [[TMP1811]], [[TMP1810]]
16738 // CHECK-NEXT:    [[TMP1813:%.*]] = select i1 [[TMP1812]], i16 [[TMP1810]], i16 [[TMP1811]]
16739 // CHECK-NEXT:    store i16 [[TMP1813]], i16* [[USV]], align 2
16740 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16741 // CHECK-NEXT:    [[TMP1814:%.*]] = load i16, i16* [[USE]], align 2
16742 // CHECK-NEXT:    [[TMP1815:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1814]] seq_cst, align 2
16743 // CHECK-NEXT:    [[TMP1816:%.*]] = icmp ult i16 [[TMP1815]], [[TMP1814]]
16744 // CHECK-NEXT:    [[TMP1817:%.*]] = select i1 [[TMP1816]], i16 [[TMP1814]], i16 [[TMP1815]]
16745 // CHECK-NEXT:    store i16 [[TMP1817]], i16* [[USV]], align 2
16746 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16747 // CHECK-NEXT:    [[TMP1818:%.*]] = load i16, i16* [[USE]], align 2
16748 // CHECK-NEXT:    [[TMP1819:%.*]] = atomicrmw umin i16* [[USX]], i16 [[TMP1818]] seq_cst, align 2
16749 // CHECK-NEXT:    [[TMP1820:%.*]] = icmp ult i16 [[TMP1819]], [[TMP1818]]
16750 // CHECK-NEXT:    [[TMP1821:%.*]] = select i1 [[TMP1820]], i16 [[TMP1818]], i16 [[TMP1819]]
16751 // CHECK-NEXT:    store i16 [[TMP1821]], i16* [[USV]], align 2
16752 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16753 // CHECK-NEXT:    [[TMP1822:%.*]] = load i16, i16* [[USE]], align 2
16754 // CHECK-NEXT:    [[TMP1823:%.*]] = atomicrmw umax i16* [[USX]], i16 [[TMP1822]] seq_cst, align 2
16755 // CHECK-NEXT:    [[TMP1824:%.*]] = icmp ugt i16 [[TMP1823]], [[TMP1822]]
16756 // CHECK-NEXT:    [[TMP1825:%.*]] = select i1 [[TMP1824]], i16 [[TMP1822]], i16 [[TMP1823]]
16757 // CHECK-NEXT:    store i16 [[TMP1825]], i16* [[USV]], align 2
16758 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16759 // CHECK-NEXT:    [[TMP1826:%.*]] = load i16, i16* [[USE]], align 2
16760 // CHECK-NEXT:    [[TMP1827:%.*]] = load i16, i16* [[USD]], align 2
16761 // CHECK-NEXT:    [[TMP1828:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1826]], i16 [[TMP1827]] seq_cst seq_cst, align 2
16762 // CHECK-NEXT:    [[TMP1829:%.*]] = extractvalue { i16, i1 } [[TMP1828]], 0
16763 // CHECK-NEXT:    [[TMP1830:%.*]] = extractvalue { i16, i1 } [[TMP1828]], 1
16764 // CHECK-NEXT:    [[TMP1831:%.*]] = select i1 [[TMP1830]], i16 [[TMP1826]], i16 [[TMP1829]]
16765 // CHECK-NEXT:    store i16 [[TMP1831]], i16* [[USV]], align 2
16766 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16767 // CHECK-NEXT:    [[TMP1832:%.*]] = load i16, i16* [[USE]], align 2
16768 // CHECK-NEXT:    [[TMP1833:%.*]] = load i16, i16* [[USD]], align 2
16769 // CHECK-NEXT:    [[TMP1834:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1832]], i16 [[TMP1833]] seq_cst seq_cst, align 2
16770 // CHECK-NEXT:    [[TMP1835:%.*]] = extractvalue { i16, i1 } [[TMP1834]], 0
16771 // CHECK-NEXT:    [[TMP1836:%.*]] = extractvalue { i16, i1 } [[TMP1834]], 1
16772 // CHECK-NEXT:    [[TMP1837:%.*]] = select i1 [[TMP1836]], i16 [[TMP1832]], i16 [[TMP1835]]
16773 // CHECK-NEXT:    store i16 [[TMP1837]], i16* [[USV]], align 2
16774 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16775 // CHECK-NEXT:    [[TMP1838:%.*]] = load i16, i16* [[USE]], align 2
16776 // CHECK-NEXT:    [[TMP1839:%.*]] = load i16, i16* [[USD]], align 2
16777 // CHECK-NEXT:    [[TMP1840:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1838]], i16 [[TMP1839]] seq_cst seq_cst, align 2
16778 // CHECK-NEXT:    [[TMP1841:%.*]] = extractvalue { i16, i1 } [[TMP1840]], 0
16779 // CHECK-NEXT:    [[TMP1842:%.*]] = extractvalue { i16, i1 } [[TMP1840]], 1
16780 // CHECK-NEXT:    br i1 [[TMP1842]], label [[USX_ATOMIC_EXIT177:%.*]], label [[USX_ATOMIC_CONT178:%.*]]
16781 // CHECK:       usx.atomic.cont178:
16782 // CHECK-NEXT:    store i16 [[TMP1841]], i16* [[USV]], align 2
16783 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT177]]
16784 // CHECK:       usx.atomic.exit177:
16785 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16786 // CHECK-NEXT:    [[TMP1843:%.*]] = load i16, i16* [[USE]], align 2
16787 // CHECK-NEXT:    [[TMP1844:%.*]] = load i16, i16* [[USD]], align 2
16788 // CHECK-NEXT:    [[TMP1845:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1843]], i16 [[TMP1844]] seq_cst seq_cst, align 2
16789 // CHECK-NEXT:    [[TMP1846:%.*]] = extractvalue { i16, i1 } [[TMP1845]], 0
16790 // CHECK-NEXT:    [[TMP1847:%.*]] = extractvalue { i16, i1 } [[TMP1845]], 1
16791 // CHECK-NEXT:    br i1 [[TMP1847]], label [[USX_ATOMIC_EXIT179:%.*]], label [[USX_ATOMIC_CONT180:%.*]]
16792 // CHECK:       usx.atomic.cont180:
16793 // CHECK-NEXT:    store i16 [[TMP1846]], i16* [[USV]], align 2
16794 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT179]]
16795 // CHECK:       usx.atomic.exit179:
16796 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16797 // CHECK-NEXT:    [[TMP1848:%.*]] = load i16, i16* [[USE]], align 2
16798 // CHECK-NEXT:    [[TMP1849:%.*]] = load i16, i16* [[USD]], align 2
16799 // CHECK-NEXT:    [[TMP1850:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1848]], i16 [[TMP1849]] seq_cst seq_cst, align 2
16800 // CHECK-NEXT:    [[TMP1851:%.*]] = extractvalue { i16, i1 } [[TMP1850]], 1
16801 // CHECK-NEXT:    [[TMP1852:%.*]] = zext i1 [[TMP1851]] to i16
16802 // CHECK-NEXT:    store i16 [[TMP1852]], i16* [[USR]], align 2
16803 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16804 // CHECK-NEXT:    [[TMP1853:%.*]] = load i16, i16* [[USE]], align 2
16805 // CHECK-NEXT:    [[TMP1854:%.*]] = load i16, i16* [[USD]], align 2
16806 // CHECK-NEXT:    [[TMP1855:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1853]], i16 [[TMP1854]] seq_cst seq_cst, align 2
16807 // CHECK-NEXT:    [[TMP1856:%.*]] = extractvalue { i16, i1 } [[TMP1855]], 1
16808 // CHECK-NEXT:    [[TMP1857:%.*]] = zext i1 [[TMP1856]] to i16
16809 // CHECK-NEXT:    store i16 [[TMP1857]], i16* [[USR]], align 2
16810 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16811 // CHECK-NEXT:    [[TMP1858:%.*]] = load i16, i16* [[USE]], align 2
16812 // CHECK-NEXT:    [[TMP1859:%.*]] = load i16, i16* [[USD]], align 2
16813 // CHECK-NEXT:    [[TMP1860:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1858]], i16 [[TMP1859]] seq_cst seq_cst, align 2
16814 // CHECK-NEXT:    [[TMP1861:%.*]] = extractvalue { i16, i1 } [[TMP1860]], 0
16815 // CHECK-NEXT:    [[TMP1862:%.*]] = extractvalue { i16, i1 } [[TMP1860]], 1
16816 // CHECK-NEXT:    br i1 [[TMP1862]], label [[USX_ATOMIC_EXIT181:%.*]], label [[USX_ATOMIC_CONT182:%.*]]
16817 // CHECK:       usx.atomic.cont182:
16818 // CHECK-NEXT:    store i16 [[TMP1861]], i16* [[USV]], align 2
16819 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT181]]
16820 // CHECK:       usx.atomic.exit181:
16821 // CHECK-NEXT:    [[TMP1863:%.*]] = extractvalue { i16, i1 } [[TMP1860]], 1
16822 // CHECK-NEXT:    [[TMP1864:%.*]] = zext i1 [[TMP1863]] to i16
16823 // CHECK-NEXT:    store i16 [[TMP1864]], i16* [[USR]], align 2
16824 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16825 // CHECK-NEXT:    [[TMP1865:%.*]] = load i16, i16* [[USE]], align 2
16826 // CHECK-NEXT:    [[TMP1866:%.*]] = load i16, i16* [[USD]], align 2
16827 // CHECK-NEXT:    [[TMP1867:%.*]] = cmpxchg i16* [[USX]], i16 [[TMP1865]], i16 [[TMP1866]] seq_cst seq_cst, align 2
16828 // CHECK-NEXT:    [[TMP1868:%.*]] = extractvalue { i16, i1 } [[TMP1867]], 0
16829 // CHECK-NEXT:    [[TMP1869:%.*]] = extractvalue { i16, i1 } [[TMP1867]], 1
16830 // CHECK-NEXT:    br i1 [[TMP1869]], label [[USX_ATOMIC_EXIT183:%.*]], label [[USX_ATOMIC_CONT184:%.*]]
16831 // CHECK:       usx.atomic.cont184:
16832 // CHECK-NEXT:    store i16 [[TMP1868]], i16* [[USV]], align 2
16833 // CHECK-NEXT:    br label [[USX_ATOMIC_EXIT183]]
16834 // CHECK:       usx.atomic.exit183:
16835 // CHECK-NEXT:    [[TMP1870:%.*]] = extractvalue { i16, i1 } [[TMP1867]], 1
16836 // CHECK-NEXT:    [[TMP1871:%.*]] = zext i1 [[TMP1870]] to i16
16837 // CHECK-NEXT:    store i16 [[TMP1871]], i16* [[USR]], align 2
16838 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16839 // CHECK-NEXT:    [[TMP1872:%.*]] = load i32, i32* [[IE]], align 4
16840 // CHECK-NEXT:    [[TMP1873:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1872]] monotonic, align 4
16841 // CHECK-NEXT:    store i32 [[TMP1873]], i32* [[IV]], align 4
16842 // CHECK-NEXT:    [[TMP1874:%.*]] = load i32, i32* [[IE]], align 4
16843 // CHECK-NEXT:    [[TMP1875:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1874]] monotonic, align 4
16844 // CHECK-NEXT:    store i32 [[TMP1875]], i32* [[IV]], align 4
16845 // CHECK-NEXT:    [[TMP1876:%.*]] = load i32, i32* [[IE]], align 4
16846 // CHECK-NEXT:    [[TMP1877:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1876]] monotonic, align 4
16847 // CHECK-NEXT:    store i32 [[TMP1877]], i32* [[IV]], align 4
16848 // CHECK-NEXT:    [[TMP1878:%.*]] = load i32, i32* [[IE]], align 4
16849 // CHECK-NEXT:    [[TMP1879:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1878]] monotonic, align 4
16850 // CHECK-NEXT:    store i32 [[TMP1879]], i32* [[IV]], align 4
16851 // CHECK-NEXT:    [[TMP1880:%.*]] = load i32, i32* [[IE]], align 4
16852 // CHECK-NEXT:    [[TMP1881:%.*]] = load i32, i32* [[ID]], align 4
16853 // CHECK-NEXT:    [[TMP1882:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1880]], i32 [[TMP1881]] monotonic monotonic, align 4
16854 // CHECK-NEXT:    [[TMP1883:%.*]] = extractvalue { i32, i1 } [[TMP1882]], 0
16855 // CHECK-NEXT:    store i32 [[TMP1883]], i32* [[IV]], align 4
16856 // CHECK-NEXT:    [[TMP1884:%.*]] = load i32, i32* [[IE]], align 4
16857 // CHECK-NEXT:    [[TMP1885:%.*]] = load i32, i32* [[ID]], align 4
16858 // CHECK-NEXT:    [[TMP1886:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1884]], i32 [[TMP1885]] monotonic monotonic, align 4
16859 // CHECK-NEXT:    [[TMP1887:%.*]] = extractvalue { i32, i1 } [[TMP1886]], 0
16860 // CHECK-NEXT:    store i32 [[TMP1887]], i32* [[IV]], align 4
16861 // CHECK-NEXT:    [[TMP1888:%.*]] = load i32, i32* [[IE]], align 4
16862 // CHECK-NEXT:    [[TMP1889:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1888]] monotonic, align 4
16863 // CHECK-NEXT:    [[TMP1890:%.*]] = icmp sgt i32 [[TMP1889]], [[TMP1888]]
16864 // CHECK-NEXT:    [[TMP1891:%.*]] = select i1 [[TMP1890]], i32 [[TMP1888]], i32 [[TMP1889]]
16865 // CHECK-NEXT:    store i32 [[TMP1891]], i32* [[IV]], align 4
16866 // CHECK-NEXT:    [[TMP1892:%.*]] = load i32, i32* [[IE]], align 4
16867 // CHECK-NEXT:    [[TMP1893:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1892]] monotonic, align 4
16868 // CHECK-NEXT:    [[TMP1894:%.*]] = icmp slt i32 [[TMP1893]], [[TMP1892]]
16869 // CHECK-NEXT:    [[TMP1895:%.*]] = select i1 [[TMP1894]], i32 [[TMP1892]], i32 [[TMP1893]]
16870 // CHECK-NEXT:    store i32 [[TMP1895]], i32* [[IV]], align 4
16871 // CHECK-NEXT:    [[TMP1896:%.*]] = load i32, i32* [[IE]], align 4
16872 // CHECK-NEXT:    [[TMP1897:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1896]] monotonic, align 4
16873 // CHECK-NEXT:    [[TMP1898:%.*]] = icmp slt i32 [[TMP1897]], [[TMP1896]]
16874 // CHECK-NEXT:    [[TMP1899:%.*]] = select i1 [[TMP1898]], i32 [[TMP1896]], i32 [[TMP1897]]
16875 // CHECK-NEXT:    store i32 [[TMP1899]], i32* [[IV]], align 4
16876 // CHECK-NEXT:    [[TMP1900:%.*]] = load i32, i32* [[IE]], align 4
16877 // CHECK-NEXT:    [[TMP1901:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1900]] monotonic, align 4
16878 // CHECK-NEXT:    [[TMP1902:%.*]] = icmp sgt i32 [[TMP1901]], [[TMP1900]]
16879 // CHECK-NEXT:    [[TMP1903:%.*]] = select i1 [[TMP1902]], i32 [[TMP1900]], i32 [[TMP1901]]
16880 // CHECK-NEXT:    store i32 [[TMP1903]], i32* [[IV]], align 4
16881 // CHECK-NEXT:    [[TMP1904:%.*]] = load i32, i32* [[IE]], align 4
16882 // CHECK-NEXT:    [[TMP1905:%.*]] = load i32, i32* [[ID]], align 4
16883 // CHECK-NEXT:    [[TMP1906:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1904]], i32 [[TMP1905]] monotonic monotonic, align 4
16884 // CHECK-NEXT:    [[TMP1907:%.*]] = extractvalue { i32, i1 } [[TMP1906]], 0
16885 // CHECK-NEXT:    [[TMP1908:%.*]] = extractvalue { i32, i1 } [[TMP1906]], 1
16886 // CHECK-NEXT:    [[TMP1909:%.*]] = select i1 [[TMP1908]], i32 [[TMP1904]], i32 [[TMP1907]]
16887 // CHECK-NEXT:    store i32 [[TMP1909]], i32* [[IV]], align 4
16888 // CHECK-NEXT:    [[TMP1910:%.*]] = load i32, i32* [[IE]], align 4
16889 // CHECK-NEXT:    [[TMP1911:%.*]] = load i32, i32* [[ID]], align 4
16890 // CHECK-NEXT:    [[TMP1912:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1910]], i32 [[TMP1911]] monotonic monotonic, align 4
16891 // CHECK-NEXT:    [[TMP1913:%.*]] = extractvalue { i32, i1 } [[TMP1912]], 0
16892 // CHECK-NEXT:    [[TMP1914:%.*]] = extractvalue { i32, i1 } [[TMP1912]], 1
16893 // CHECK-NEXT:    [[TMP1915:%.*]] = select i1 [[TMP1914]], i32 [[TMP1910]], i32 [[TMP1913]]
16894 // CHECK-NEXT:    store i32 [[TMP1915]], i32* [[IV]], align 4
16895 // CHECK-NEXT:    [[TMP1916:%.*]] = load i32, i32* [[IE]], align 4
16896 // CHECK-NEXT:    [[TMP1917:%.*]] = load i32, i32* [[ID]], align 4
16897 // CHECK-NEXT:    [[TMP1918:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1916]], i32 [[TMP1917]] monotonic monotonic, align 4
16898 // CHECK-NEXT:    [[TMP1919:%.*]] = extractvalue { i32, i1 } [[TMP1918]], 0
16899 // CHECK-NEXT:    [[TMP1920:%.*]] = extractvalue { i32, i1 } [[TMP1918]], 1
16900 // CHECK-NEXT:    br i1 [[TMP1920]], label [[IX_ATOMIC_EXIT:%.*]], label [[IX_ATOMIC_CONT:%.*]]
16901 // CHECK:       ix.atomic.cont:
16902 // CHECK-NEXT:    store i32 [[TMP1919]], i32* [[IV]], align 4
16903 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT]]
16904 // CHECK:       ix.atomic.exit:
16905 // CHECK-NEXT:    [[TMP1921:%.*]] = load i32, i32* [[IE]], align 4
16906 // CHECK-NEXT:    [[TMP1922:%.*]] = load i32, i32* [[ID]], align 4
16907 // CHECK-NEXT:    [[TMP1923:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1921]], i32 [[TMP1922]] monotonic monotonic, align 4
16908 // CHECK-NEXT:    [[TMP1924:%.*]] = extractvalue { i32, i1 } [[TMP1923]], 0
16909 // CHECK-NEXT:    [[TMP1925:%.*]] = extractvalue { i32, i1 } [[TMP1923]], 1
16910 // CHECK-NEXT:    br i1 [[TMP1925]], label [[IX_ATOMIC_EXIT185:%.*]], label [[IX_ATOMIC_CONT186:%.*]]
16911 // CHECK:       ix.atomic.cont186:
16912 // CHECK-NEXT:    store i32 [[TMP1924]], i32* [[IV]], align 4
16913 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT185]]
16914 // CHECK:       ix.atomic.exit185:
16915 // CHECK-NEXT:    [[TMP1926:%.*]] = load i32, i32* [[IE]], align 4
16916 // CHECK-NEXT:    [[TMP1927:%.*]] = load i32, i32* [[ID]], align 4
16917 // CHECK-NEXT:    [[TMP1928:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1926]], i32 [[TMP1927]] monotonic monotonic, align 4
16918 // CHECK-NEXT:    [[TMP1929:%.*]] = extractvalue { i32, i1 } [[TMP1928]], 1
16919 // CHECK-NEXT:    [[TMP1930:%.*]] = sext i1 [[TMP1929]] to i32
16920 // CHECK-NEXT:    store i32 [[TMP1930]], i32* [[IR]], align 4
16921 // CHECK-NEXT:    [[TMP1931:%.*]] = load i32, i32* [[IE]], align 4
16922 // CHECK-NEXT:    [[TMP1932:%.*]] = load i32, i32* [[ID]], align 4
16923 // CHECK-NEXT:    [[TMP1933:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1931]], i32 [[TMP1932]] monotonic monotonic, align 4
16924 // CHECK-NEXT:    [[TMP1934:%.*]] = extractvalue { i32, i1 } [[TMP1933]], 1
16925 // CHECK-NEXT:    [[TMP1935:%.*]] = sext i1 [[TMP1934]] to i32
16926 // CHECK-NEXT:    store i32 [[TMP1935]], i32* [[IR]], align 4
16927 // CHECK-NEXT:    [[TMP1936:%.*]] = load i32, i32* [[IE]], align 4
16928 // CHECK-NEXT:    [[TMP1937:%.*]] = load i32, i32* [[ID]], align 4
16929 // CHECK-NEXT:    [[TMP1938:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1936]], i32 [[TMP1937]] monotonic monotonic, align 4
16930 // CHECK-NEXT:    [[TMP1939:%.*]] = extractvalue { i32, i1 } [[TMP1938]], 0
16931 // CHECK-NEXT:    [[TMP1940:%.*]] = extractvalue { i32, i1 } [[TMP1938]], 1
16932 // CHECK-NEXT:    br i1 [[TMP1940]], label [[IX_ATOMIC_EXIT187:%.*]], label [[IX_ATOMIC_CONT188:%.*]]
16933 // CHECK:       ix.atomic.cont188:
16934 // CHECK-NEXT:    store i32 [[TMP1939]], i32* [[IV]], align 4
16935 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT187]]
16936 // CHECK:       ix.atomic.exit187:
16937 // CHECK-NEXT:    [[TMP1941:%.*]] = extractvalue { i32, i1 } [[TMP1938]], 1
16938 // CHECK-NEXT:    [[TMP1942:%.*]] = sext i1 [[TMP1941]] to i32
16939 // CHECK-NEXT:    store i32 [[TMP1942]], i32* [[IR]], align 4
16940 // CHECK-NEXT:    [[TMP1943:%.*]] = load i32, i32* [[IE]], align 4
16941 // CHECK-NEXT:    [[TMP1944:%.*]] = load i32, i32* [[ID]], align 4
16942 // CHECK-NEXT:    [[TMP1945:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1943]], i32 [[TMP1944]] monotonic monotonic, align 4
16943 // CHECK-NEXT:    [[TMP1946:%.*]] = extractvalue { i32, i1 } [[TMP1945]], 0
16944 // CHECK-NEXT:    [[TMP1947:%.*]] = extractvalue { i32, i1 } [[TMP1945]], 1
16945 // CHECK-NEXT:    br i1 [[TMP1947]], label [[IX_ATOMIC_EXIT189:%.*]], label [[IX_ATOMIC_CONT190:%.*]]
16946 // CHECK:       ix.atomic.cont190:
16947 // CHECK-NEXT:    store i32 [[TMP1946]], i32* [[IV]], align 4
16948 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT189]]
16949 // CHECK:       ix.atomic.exit189:
16950 // CHECK-NEXT:    [[TMP1948:%.*]] = extractvalue { i32, i1 } [[TMP1945]], 1
16951 // CHECK-NEXT:    [[TMP1949:%.*]] = sext i1 [[TMP1948]] to i32
16952 // CHECK-NEXT:    store i32 [[TMP1949]], i32* [[IR]], align 4
16953 // CHECK-NEXT:    [[TMP1950:%.*]] = load i32, i32* [[IE]], align 4
16954 // CHECK-NEXT:    [[TMP1951:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1950]] acq_rel, align 4
16955 // CHECK-NEXT:    store i32 [[TMP1951]], i32* [[IV]], align 4
16956 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16957 // CHECK-NEXT:    [[TMP1952:%.*]] = load i32, i32* [[IE]], align 4
16958 // CHECK-NEXT:    [[TMP1953:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1952]] acq_rel, align 4
16959 // CHECK-NEXT:    store i32 [[TMP1953]], i32* [[IV]], align 4
16960 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16961 // CHECK-NEXT:    [[TMP1954:%.*]] = load i32, i32* [[IE]], align 4
16962 // CHECK-NEXT:    [[TMP1955:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1954]] acq_rel, align 4
16963 // CHECK-NEXT:    store i32 [[TMP1955]], i32* [[IV]], align 4
16964 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16965 // CHECK-NEXT:    [[TMP1956:%.*]] = load i32, i32* [[IE]], align 4
16966 // CHECK-NEXT:    [[TMP1957:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1956]] acq_rel, align 4
16967 // CHECK-NEXT:    store i32 [[TMP1957]], i32* [[IV]], align 4
16968 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16969 // CHECK-NEXT:    [[TMP1958:%.*]] = load i32, i32* [[IE]], align 4
16970 // CHECK-NEXT:    [[TMP1959:%.*]] = load i32, i32* [[ID]], align 4
16971 // CHECK-NEXT:    [[TMP1960:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1958]], i32 [[TMP1959]] acq_rel acquire, align 4
16972 // CHECK-NEXT:    [[TMP1961:%.*]] = extractvalue { i32, i1 } [[TMP1960]], 0
16973 // CHECK-NEXT:    store i32 [[TMP1961]], i32* [[IV]], align 4
16974 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16975 // CHECK-NEXT:    [[TMP1962:%.*]] = load i32, i32* [[IE]], align 4
16976 // CHECK-NEXT:    [[TMP1963:%.*]] = load i32, i32* [[ID]], align 4
16977 // CHECK-NEXT:    [[TMP1964:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1962]], i32 [[TMP1963]] acq_rel acquire, align 4
16978 // CHECK-NEXT:    [[TMP1965:%.*]] = extractvalue { i32, i1 } [[TMP1964]], 0
16979 // CHECK-NEXT:    store i32 [[TMP1965]], i32* [[IV]], align 4
16980 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16981 // CHECK-NEXT:    [[TMP1966:%.*]] = load i32, i32* [[IE]], align 4
16982 // CHECK-NEXT:    [[TMP1967:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1966]] acq_rel, align 4
16983 // CHECK-NEXT:    [[TMP1968:%.*]] = icmp sgt i32 [[TMP1967]], [[TMP1966]]
16984 // CHECK-NEXT:    [[TMP1969:%.*]] = select i1 [[TMP1968]], i32 [[TMP1966]], i32 [[TMP1967]]
16985 // CHECK-NEXT:    store i32 [[TMP1969]], i32* [[IV]], align 4
16986 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16987 // CHECK-NEXT:    [[TMP1970:%.*]] = load i32, i32* [[IE]], align 4
16988 // CHECK-NEXT:    [[TMP1971:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1970]] acq_rel, align 4
16989 // CHECK-NEXT:    [[TMP1972:%.*]] = icmp slt i32 [[TMP1971]], [[TMP1970]]
16990 // CHECK-NEXT:    [[TMP1973:%.*]] = select i1 [[TMP1972]], i32 [[TMP1970]], i32 [[TMP1971]]
16991 // CHECK-NEXT:    store i32 [[TMP1973]], i32* [[IV]], align 4
16992 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16993 // CHECK-NEXT:    [[TMP1974:%.*]] = load i32, i32* [[IE]], align 4
16994 // CHECK-NEXT:    [[TMP1975:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP1974]] acq_rel, align 4
16995 // CHECK-NEXT:    [[TMP1976:%.*]] = icmp slt i32 [[TMP1975]], [[TMP1974]]
16996 // CHECK-NEXT:    [[TMP1977:%.*]] = select i1 [[TMP1976]], i32 [[TMP1974]], i32 [[TMP1975]]
16997 // CHECK-NEXT:    store i32 [[TMP1977]], i32* [[IV]], align 4
16998 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
16999 // CHECK-NEXT:    [[TMP1978:%.*]] = load i32, i32* [[IE]], align 4
17000 // CHECK-NEXT:    [[TMP1979:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP1978]] acq_rel, align 4
17001 // CHECK-NEXT:    [[TMP1980:%.*]] = icmp sgt i32 [[TMP1979]], [[TMP1978]]
17002 // CHECK-NEXT:    [[TMP1981:%.*]] = select i1 [[TMP1980]], i32 [[TMP1978]], i32 [[TMP1979]]
17003 // CHECK-NEXT:    store i32 [[TMP1981]], i32* [[IV]], align 4
17004 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17005 // CHECK-NEXT:    [[TMP1982:%.*]] = load i32, i32* [[IE]], align 4
17006 // CHECK-NEXT:    [[TMP1983:%.*]] = load i32, i32* [[ID]], align 4
17007 // CHECK-NEXT:    [[TMP1984:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1982]], i32 [[TMP1983]] acq_rel acquire, align 4
17008 // CHECK-NEXT:    [[TMP1985:%.*]] = extractvalue { i32, i1 } [[TMP1984]], 0
17009 // CHECK-NEXT:    [[TMP1986:%.*]] = extractvalue { i32, i1 } [[TMP1984]], 1
17010 // CHECK-NEXT:    [[TMP1987:%.*]] = select i1 [[TMP1986]], i32 [[TMP1982]], i32 [[TMP1985]]
17011 // CHECK-NEXT:    store i32 [[TMP1987]], i32* [[IV]], align 4
17012 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17013 // CHECK-NEXT:    [[TMP1988:%.*]] = load i32, i32* [[IE]], align 4
17014 // CHECK-NEXT:    [[TMP1989:%.*]] = load i32, i32* [[ID]], align 4
17015 // CHECK-NEXT:    [[TMP1990:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1988]], i32 [[TMP1989]] acq_rel acquire, align 4
17016 // CHECK-NEXT:    [[TMP1991:%.*]] = extractvalue { i32, i1 } [[TMP1990]], 0
17017 // CHECK-NEXT:    [[TMP1992:%.*]] = extractvalue { i32, i1 } [[TMP1990]], 1
17018 // CHECK-NEXT:    [[TMP1993:%.*]] = select i1 [[TMP1992]], i32 [[TMP1988]], i32 [[TMP1991]]
17019 // CHECK-NEXT:    store i32 [[TMP1993]], i32* [[IV]], align 4
17020 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17021 // CHECK-NEXT:    [[TMP1994:%.*]] = load i32, i32* [[IE]], align 4
17022 // CHECK-NEXT:    [[TMP1995:%.*]] = load i32, i32* [[ID]], align 4
17023 // CHECK-NEXT:    [[TMP1996:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1994]], i32 [[TMP1995]] acq_rel acquire, align 4
17024 // CHECK-NEXT:    [[TMP1997:%.*]] = extractvalue { i32, i1 } [[TMP1996]], 0
17025 // CHECK-NEXT:    [[TMP1998:%.*]] = extractvalue { i32, i1 } [[TMP1996]], 1
17026 // CHECK-NEXT:    br i1 [[TMP1998]], label [[IX_ATOMIC_EXIT191:%.*]], label [[IX_ATOMIC_CONT192:%.*]]
17027 // CHECK:       ix.atomic.cont192:
17028 // CHECK-NEXT:    store i32 [[TMP1997]], i32* [[IV]], align 4
17029 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT191]]
17030 // CHECK:       ix.atomic.exit191:
17031 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17032 // CHECK-NEXT:    [[TMP1999:%.*]] = load i32, i32* [[IE]], align 4
17033 // CHECK-NEXT:    [[TMP2000:%.*]] = load i32, i32* [[ID]], align 4
17034 // CHECK-NEXT:    [[TMP2001:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP1999]], i32 [[TMP2000]] acq_rel acquire, align 4
17035 // CHECK-NEXT:    [[TMP2002:%.*]] = extractvalue { i32, i1 } [[TMP2001]], 0
17036 // CHECK-NEXT:    [[TMP2003:%.*]] = extractvalue { i32, i1 } [[TMP2001]], 1
17037 // CHECK-NEXT:    br i1 [[TMP2003]], label [[IX_ATOMIC_EXIT193:%.*]], label [[IX_ATOMIC_CONT194:%.*]]
17038 // CHECK:       ix.atomic.cont194:
17039 // CHECK-NEXT:    store i32 [[TMP2002]], i32* [[IV]], align 4
17040 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT193]]
17041 // CHECK:       ix.atomic.exit193:
17042 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17043 // CHECK-NEXT:    [[TMP2004:%.*]] = load i32, i32* [[IE]], align 4
17044 // CHECK-NEXT:    [[TMP2005:%.*]] = load i32, i32* [[ID]], align 4
17045 // CHECK-NEXT:    [[TMP2006:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2004]], i32 [[TMP2005]] acq_rel acquire, align 4
17046 // CHECK-NEXT:    [[TMP2007:%.*]] = extractvalue { i32, i1 } [[TMP2006]], 1
17047 // CHECK-NEXT:    [[TMP2008:%.*]] = sext i1 [[TMP2007]] to i32
17048 // CHECK-NEXT:    store i32 [[TMP2008]], i32* [[IR]], align 4
17049 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17050 // CHECK-NEXT:    [[TMP2009:%.*]] = load i32, i32* [[IE]], align 4
17051 // CHECK-NEXT:    [[TMP2010:%.*]] = load i32, i32* [[ID]], align 4
17052 // CHECK-NEXT:    [[TMP2011:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2009]], i32 [[TMP2010]] acq_rel acquire, align 4
17053 // CHECK-NEXT:    [[TMP2012:%.*]] = extractvalue { i32, i1 } [[TMP2011]], 1
17054 // CHECK-NEXT:    [[TMP2013:%.*]] = sext i1 [[TMP2012]] to i32
17055 // CHECK-NEXT:    store i32 [[TMP2013]], i32* [[IR]], align 4
17056 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17057 // CHECK-NEXT:    [[TMP2014:%.*]] = load i32, i32* [[IE]], align 4
17058 // CHECK-NEXT:    [[TMP2015:%.*]] = load i32, i32* [[ID]], align 4
17059 // CHECK-NEXT:    [[TMP2016:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2014]], i32 [[TMP2015]] acq_rel acquire, align 4
17060 // CHECK-NEXT:    [[TMP2017:%.*]] = extractvalue { i32, i1 } [[TMP2016]], 0
17061 // CHECK-NEXT:    [[TMP2018:%.*]] = extractvalue { i32, i1 } [[TMP2016]], 1
17062 // CHECK-NEXT:    br i1 [[TMP2018]], label [[IX_ATOMIC_EXIT195:%.*]], label [[IX_ATOMIC_CONT196:%.*]]
17063 // CHECK:       ix.atomic.cont196:
17064 // CHECK-NEXT:    store i32 [[TMP2017]], i32* [[IV]], align 4
17065 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT195]]
17066 // CHECK:       ix.atomic.exit195:
17067 // CHECK-NEXT:    [[TMP2019:%.*]] = extractvalue { i32, i1 } [[TMP2016]], 1
17068 // CHECK-NEXT:    [[TMP2020:%.*]] = sext i1 [[TMP2019]] to i32
17069 // CHECK-NEXT:    store i32 [[TMP2020]], i32* [[IR]], align 4
17070 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17071 // CHECK-NEXT:    [[TMP2021:%.*]] = load i32, i32* [[IE]], align 4
17072 // CHECK-NEXT:    [[TMP2022:%.*]] = load i32, i32* [[ID]], align 4
17073 // CHECK-NEXT:    [[TMP2023:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2021]], i32 [[TMP2022]] acq_rel acquire, align 4
17074 // CHECK-NEXT:    [[TMP2024:%.*]] = extractvalue { i32, i1 } [[TMP2023]], 0
17075 // CHECK-NEXT:    [[TMP2025:%.*]] = extractvalue { i32, i1 } [[TMP2023]], 1
17076 // CHECK-NEXT:    br i1 [[TMP2025]], label [[IX_ATOMIC_EXIT197:%.*]], label [[IX_ATOMIC_CONT198:%.*]]
17077 // CHECK:       ix.atomic.cont198:
17078 // CHECK-NEXT:    store i32 [[TMP2024]], i32* [[IV]], align 4
17079 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT197]]
17080 // CHECK:       ix.atomic.exit197:
17081 // CHECK-NEXT:    [[TMP2026:%.*]] = extractvalue { i32, i1 } [[TMP2023]], 1
17082 // CHECK-NEXT:    [[TMP2027:%.*]] = sext i1 [[TMP2026]] to i32
17083 // CHECK-NEXT:    store i32 [[TMP2027]], i32* [[IR]], align 4
17084 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17085 // CHECK-NEXT:    [[TMP2028:%.*]] = load i32, i32* [[IE]], align 4
17086 // CHECK-NEXT:    [[TMP2029:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2028]] acquire, align 4
17087 // CHECK-NEXT:    store i32 [[TMP2029]], i32* [[IV]], align 4
17088 // CHECK-NEXT:    [[TMP2030:%.*]] = load i32, i32* [[IE]], align 4
17089 // CHECK-NEXT:    [[TMP2031:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2030]] acquire, align 4
17090 // CHECK-NEXT:    store i32 [[TMP2031]], i32* [[IV]], align 4
17091 // CHECK-NEXT:    [[TMP2032:%.*]] = load i32, i32* [[IE]], align 4
17092 // CHECK-NEXT:    [[TMP2033:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2032]] acquire, align 4
17093 // CHECK-NEXT:    store i32 [[TMP2033]], i32* [[IV]], align 4
17094 // CHECK-NEXT:    [[TMP2034:%.*]] = load i32, i32* [[IE]], align 4
17095 // CHECK-NEXT:    [[TMP2035:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2034]] acquire, align 4
17096 // CHECK-NEXT:    store i32 [[TMP2035]], i32* [[IV]], align 4
17097 // CHECK-NEXT:    [[TMP2036:%.*]] = load i32, i32* [[IE]], align 4
17098 // CHECK-NEXT:    [[TMP2037:%.*]] = load i32, i32* [[ID]], align 4
17099 // CHECK-NEXT:    [[TMP2038:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2036]], i32 [[TMP2037]] acquire acquire, align 4
17100 // CHECK-NEXT:    [[TMP2039:%.*]] = extractvalue { i32, i1 } [[TMP2038]], 0
17101 // CHECK-NEXT:    store i32 [[TMP2039]], i32* [[IV]], align 4
17102 // CHECK-NEXT:    [[TMP2040:%.*]] = load i32, i32* [[IE]], align 4
17103 // CHECK-NEXT:    [[TMP2041:%.*]] = load i32, i32* [[ID]], align 4
17104 // CHECK-NEXT:    [[TMP2042:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2040]], i32 [[TMP2041]] acquire acquire, align 4
17105 // CHECK-NEXT:    [[TMP2043:%.*]] = extractvalue { i32, i1 } [[TMP2042]], 0
17106 // CHECK-NEXT:    store i32 [[TMP2043]], i32* [[IV]], align 4
17107 // CHECK-NEXT:    [[TMP2044:%.*]] = load i32, i32* [[IE]], align 4
17108 // CHECK-NEXT:    [[TMP2045:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2044]] acquire, align 4
17109 // CHECK-NEXT:    [[TMP2046:%.*]] = icmp sgt i32 [[TMP2045]], [[TMP2044]]
17110 // CHECK-NEXT:    [[TMP2047:%.*]] = select i1 [[TMP2046]], i32 [[TMP2044]], i32 [[TMP2045]]
17111 // CHECK-NEXT:    store i32 [[TMP2047]], i32* [[IV]], align 4
17112 // CHECK-NEXT:    [[TMP2048:%.*]] = load i32, i32* [[IE]], align 4
17113 // CHECK-NEXT:    [[TMP2049:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2048]] acquire, align 4
17114 // CHECK-NEXT:    [[TMP2050:%.*]] = icmp slt i32 [[TMP2049]], [[TMP2048]]
17115 // CHECK-NEXT:    [[TMP2051:%.*]] = select i1 [[TMP2050]], i32 [[TMP2048]], i32 [[TMP2049]]
17116 // CHECK-NEXT:    store i32 [[TMP2051]], i32* [[IV]], align 4
17117 // CHECK-NEXT:    [[TMP2052:%.*]] = load i32, i32* [[IE]], align 4
17118 // CHECK-NEXT:    [[TMP2053:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2052]] acquire, align 4
17119 // CHECK-NEXT:    [[TMP2054:%.*]] = icmp slt i32 [[TMP2053]], [[TMP2052]]
17120 // CHECK-NEXT:    [[TMP2055:%.*]] = select i1 [[TMP2054]], i32 [[TMP2052]], i32 [[TMP2053]]
17121 // CHECK-NEXT:    store i32 [[TMP2055]], i32* [[IV]], align 4
17122 // CHECK-NEXT:    [[TMP2056:%.*]] = load i32, i32* [[IE]], align 4
17123 // CHECK-NEXT:    [[TMP2057:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2056]] acquire, align 4
17124 // CHECK-NEXT:    [[TMP2058:%.*]] = icmp sgt i32 [[TMP2057]], [[TMP2056]]
17125 // CHECK-NEXT:    [[TMP2059:%.*]] = select i1 [[TMP2058]], i32 [[TMP2056]], i32 [[TMP2057]]
17126 // CHECK-NEXT:    store i32 [[TMP2059]], i32* [[IV]], align 4
17127 // CHECK-NEXT:    [[TMP2060:%.*]] = load i32, i32* [[IE]], align 4
17128 // CHECK-NEXT:    [[TMP2061:%.*]] = load i32, i32* [[ID]], align 4
17129 // CHECK-NEXT:    [[TMP2062:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2060]], i32 [[TMP2061]] acquire acquire, align 4
17130 // CHECK-NEXT:    [[TMP2063:%.*]] = extractvalue { i32, i1 } [[TMP2062]], 0
17131 // CHECK-NEXT:    [[TMP2064:%.*]] = extractvalue { i32, i1 } [[TMP2062]], 1
17132 // CHECK-NEXT:    [[TMP2065:%.*]] = select i1 [[TMP2064]], i32 [[TMP2060]], i32 [[TMP2063]]
17133 // CHECK-NEXT:    store i32 [[TMP2065]], i32* [[IV]], align 4
17134 // CHECK-NEXT:    [[TMP2066:%.*]] = load i32, i32* [[IE]], align 4
17135 // CHECK-NEXT:    [[TMP2067:%.*]] = load i32, i32* [[ID]], align 4
17136 // CHECK-NEXT:    [[TMP2068:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2066]], i32 [[TMP2067]] acquire acquire, align 4
17137 // CHECK-NEXT:    [[TMP2069:%.*]] = extractvalue { i32, i1 } [[TMP2068]], 0
17138 // CHECK-NEXT:    [[TMP2070:%.*]] = extractvalue { i32, i1 } [[TMP2068]], 1
17139 // CHECK-NEXT:    [[TMP2071:%.*]] = select i1 [[TMP2070]], i32 [[TMP2066]], i32 [[TMP2069]]
17140 // CHECK-NEXT:    store i32 [[TMP2071]], i32* [[IV]], align 4
17141 // CHECK-NEXT:    [[TMP2072:%.*]] = load i32, i32* [[IE]], align 4
17142 // CHECK-NEXT:    [[TMP2073:%.*]] = load i32, i32* [[ID]], align 4
17143 // CHECK-NEXT:    [[TMP2074:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2072]], i32 [[TMP2073]] acquire acquire, align 4
17144 // CHECK-NEXT:    [[TMP2075:%.*]] = extractvalue { i32, i1 } [[TMP2074]], 0
17145 // CHECK-NEXT:    [[TMP2076:%.*]] = extractvalue { i32, i1 } [[TMP2074]], 1
17146 // CHECK-NEXT:    br i1 [[TMP2076]], label [[IX_ATOMIC_EXIT199:%.*]], label [[IX_ATOMIC_CONT200:%.*]]
17147 // CHECK:       ix.atomic.cont200:
17148 // CHECK-NEXT:    store i32 [[TMP2075]], i32* [[IV]], align 4
17149 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT199]]
17150 // CHECK:       ix.atomic.exit199:
17151 // CHECK-NEXT:    [[TMP2077:%.*]] = load i32, i32* [[IE]], align 4
17152 // CHECK-NEXT:    [[TMP2078:%.*]] = load i32, i32* [[ID]], align 4
17153 // CHECK-NEXT:    [[TMP2079:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2077]], i32 [[TMP2078]] acquire acquire, align 4
17154 // CHECK-NEXT:    [[TMP2080:%.*]] = extractvalue { i32, i1 } [[TMP2079]], 0
17155 // CHECK-NEXT:    [[TMP2081:%.*]] = extractvalue { i32, i1 } [[TMP2079]], 1
17156 // CHECK-NEXT:    br i1 [[TMP2081]], label [[IX_ATOMIC_EXIT201:%.*]], label [[IX_ATOMIC_CONT202:%.*]]
17157 // CHECK:       ix.atomic.cont202:
17158 // CHECK-NEXT:    store i32 [[TMP2080]], i32* [[IV]], align 4
17159 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT201]]
17160 // CHECK:       ix.atomic.exit201:
17161 // CHECK-NEXT:    [[TMP2082:%.*]] = load i32, i32* [[IE]], align 4
17162 // CHECK-NEXT:    [[TMP2083:%.*]] = load i32, i32* [[ID]], align 4
17163 // CHECK-NEXT:    [[TMP2084:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2082]], i32 [[TMP2083]] acquire acquire, align 4
17164 // CHECK-NEXT:    [[TMP2085:%.*]] = extractvalue { i32, i1 } [[TMP2084]], 1
17165 // CHECK-NEXT:    [[TMP2086:%.*]] = sext i1 [[TMP2085]] to i32
17166 // CHECK-NEXT:    store i32 [[TMP2086]], i32* [[IR]], align 4
17167 // CHECK-NEXT:    [[TMP2087:%.*]] = load i32, i32* [[IE]], align 4
17168 // CHECK-NEXT:    [[TMP2088:%.*]] = load i32, i32* [[ID]], align 4
17169 // CHECK-NEXT:    [[TMP2089:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2087]], i32 [[TMP2088]] acquire acquire, align 4
17170 // CHECK-NEXT:    [[TMP2090:%.*]] = extractvalue { i32, i1 } [[TMP2089]], 1
17171 // CHECK-NEXT:    [[TMP2091:%.*]] = sext i1 [[TMP2090]] to i32
17172 // CHECK-NEXT:    store i32 [[TMP2091]], i32* [[IR]], align 4
17173 // CHECK-NEXT:    [[TMP2092:%.*]] = load i32, i32* [[IE]], align 4
17174 // CHECK-NEXT:    [[TMP2093:%.*]] = load i32, i32* [[ID]], align 4
17175 // CHECK-NEXT:    [[TMP2094:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2092]], i32 [[TMP2093]] acquire acquire, align 4
17176 // CHECK-NEXT:    [[TMP2095:%.*]] = extractvalue { i32, i1 } [[TMP2094]], 0
17177 // CHECK-NEXT:    [[TMP2096:%.*]] = extractvalue { i32, i1 } [[TMP2094]], 1
17178 // CHECK-NEXT:    br i1 [[TMP2096]], label [[IX_ATOMIC_EXIT203:%.*]], label [[IX_ATOMIC_CONT204:%.*]]
17179 // CHECK:       ix.atomic.cont204:
17180 // CHECK-NEXT:    store i32 [[TMP2095]], i32* [[IV]], align 4
17181 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT203]]
17182 // CHECK:       ix.atomic.exit203:
17183 // CHECK-NEXT:    [[TMP2097:%.*]] = extractvalue { i32, i1 } [[TMP2094]], 1
17184 // CHECK-NEXT:    [[TMP2098:%.*]] = sext i1 [[TMP2097]] to i32
17185 // CHECK-NEXT:    store i32 [[TMP2098]], i32* [[IR]], align 4
17186 // CHECK-NEXT:    [[TMP2099:%.*]] = load i32, i32* [[IE]], align 4
17187 // CHECK-NEXT:    [[TMP2100:%.*]] = load i32, i32* [[ID]], align 4
17188 // CHECK-NEXT:    [[TMP2101:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2099]], i32 [[TMP2100]] acquire acquire, align 4
17189 // CHECK-NEXT:    [[TMP2102:%.*]] = extractvalue { i32, i1 } [[TMP2101]], 0
17190 // CHECK-NEXT:    [[TMP2103:%.*]] = extractvalue { i32, i1 } [[TMP2101]], 1
17191 // CHECK-NEXT:    br i1 [[TMP2103]], label [[IX_ATOMIC_EXIT205:%.*]], label [[IX_ATOMIC_CONT206:%.*]]
17192 // CHECK:       ix.atomic.cont206:
17193 // CHECK-NEXT:    store i32 [[TMP2102]], i32* [[IV]], align 4
17194 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT205]]
17195 // CHECK:       ix.atomic.exit205:
17196 // CHECK-NEXT:    [[TMP2104:%.*]] = extractvalue { i32, i1 } [[TMP2101]], 1
17197 // CHECK-NEXT:    [[TMP2105:%.*]] = sext i1 [[TMP2104]] to i32
17198 // CHECK-NEXT:    store i32 [[TMP2105]], i32* [[IR]], align 4
17199 // CHECK-NEXT:    [[TMP2106:%.*]] = load i32, i32* [[IE]], align 4
17200 // CHECK-NEXT:    [[TMP2107:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2106]] monotonic, align 4
17201 // CHECK-NEXT:    store i32 [[TMP2107]], i32* [[IV]], align 4
17202 // CHECK-NEXT:    [[TMP2108:%.*]] = load i32, i32* [[IE]], align 4
17203 // CHECK-NEXT:    [[TMP2109:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2108]] monotonic, align 4
17204 // CHECK-NEXT:    store i32 [[TMP2109]], i32* [[IV]], align 4
17205 // CHECK-NEXT:    [[TMP2110:%.*]] = load i32, i32* [[IE]], align 4
17206 // CHECK-NEXT:    [[TMP2111:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2110]] monotonic, align 4
17207 // CHECK-NEXT:    store i32 [[TMP2111]], i32* [[IV]], align 4
17208 // CHECK-NEXT:    [[TMP2112:%.*]] = load i32, i32* [[IE]], align 4
17209 // CHECK-NEXT:    [[TMP2113:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2112]] monotonic, align 4
17210 // CHECK-NEXT:    store i32 [[TMP2113]], i32* [[IV]], align 4
17211 // CHECK-NEXT:    [[TMP2114:%.*]] = load i32, i32* [[IE]], align 4
17212 // CHECK-NEXT:    [[TMP2115:%.*]] = load i32, i32* [[ID]], align 4
17213 // CHECK-NEXT:    [[TMP2116:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2114]], i32 [[TMP2115]] monotonic monotonic, align 4
17214 // CHECK-NEXT:    [[TMP2117:%.*]] = extractvalue { i32, i1 } [[TMP2116]], 0
17215 // CHECK-NEXT:    store i32 [[TMP2117]], i32* [[IV]], align 4
17216 // CHECK-NEXT:    [[TMP2118:%.*]] = load i32, i32* [[IE]], align 4
17217 // CHECK-NEXT:    [[TMP2119:%.*]] = load i32, i32* [[ID]], align 4
17218 // CHECK-NEXT:    [[TMP2120:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2118]], i32 [[TMP2119]] monotonic monotonic, align 4
17219 // CHECK-NEXT:    [[TMP2121:%.*]] = extractvalue { i32, i1 } [[TMP2120]], 0
17220 // CHECK-NEXT:    store i32 [[TMP2121]], i32* [[IV]], align 4
17221 // CHECK-NEXT:    [[TMP2122:%.*]] = load i32, i32* [[IE]], align 4
17222 // CHECK-NEXT:    [[TMP2123:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2122]] monotonic, align 4
17223 // CHECK-NEXT:    [[TMP2124:%.*]] = icmp sgt i32 [[TMP2123]], [[TMP2122]]
17224 // CHECK-NEXT:    [[TMP2125:%.*]] = select i1 [[TMP2124]], i32 [[TMP2122]], i32 [[TMP2123]]
17225 // CHECK-NEXT:    store i32 [[TMP2125]], i32* [[IV]], align 4
17226 // CHECK-NEXT:    [[TMP2126:%.*]] = load i32, i32* [[IE]], align 4
17227 // CHECK-NEXT:    [[TMP2127:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2126]] monotonic, align 4
17228 // CHECK-NEXT:    [[TMP2128:%.*]] = icmp slt i32 [[TMP2127]], [[TMP2126]]
17229 // CHECK-NEXT:    [[TMP2129:%.*]] = select i1 [[TMP2128]], i32 [[TMP2126]], i32 [[TMP2127]]
17230 // CHECK-NEXT:    store i32 [[TMP2129]], i32* [[IV]], align 4
17231 // CHECK-NEXT:    [[TMP2130:%.*]] = load i32, i32* [[IE]], align 4
17232 // CHECK-NEXT:    [[TMP2131:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2130]] monotonic, align 4
17233 // CHECK-NEXT:    [[TMP2132:%.*]] = icmp slt i32 [[TMP2131]], [[TMP2130]]
17234 // CHECK-NEXT:    [[TMP2133:%.*]] = select i1 [[TMP2132]], i32 [[TMP2130]], i32 [[TMP2131]]
17235 // CHECK-NEXT:    store i32 [[TMP2133]], i32* [[IV]], align 4
17236 // CHECK-NEXT:    [[TMP2134:%.*]] = load i32, i32* [[IE]], align 4
17237 // CHECK-NEXT:    [[TMP2135:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2134]] monotonic, align 4
17238 // CHECK-NEXT:    [[TMP2136:%.*]] = icmp sgt i32 [[TMP2135]], [[TMP2134]]
17239 // CHECK-NEXT:    [[TMP2137:%.*]] = select i1 [[TMP2136]], i32 [[TMP2134]], i32 [[TMP2135]]
17240 // CHECK-NEXT:    store i32 [[TMP2137]], i32* [[IV]], align 4
17241 // CHECK-NEXT:    [[TMP2138:%.*]] = load i32, i32* [[IE]], align 4
17242 // CHECK-NEXT:    [[TMP2139:%.*]] = load i32, i32* [[ID]], align 4
17243 // CHECK-NEXT:    [[TMP2140:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2138]], i32 [[TMP2139]] monotonic monotonic, align 4
17244 // CHECK-NEXT:    [[TMP2141:%.*]] = extractvalue { i32, i1 } [[TMP2140]], 0
17245 // CHECK-NEXT:    [[TMP2142:%.*]] = extractvalue { i32, i1 } [[TMP2140]], 1
17246 // CHECK-NEXT:    [[TMP2143:%.*]] = select i1 [[TMP2142]], i32 [[TMP2138]], i32 [[TMP2141]]
17247 // CHECK-NEXT:    store i32 [[TMP2143]], i32* [[IV]], align 4
17248 // CHECK-NEXT:    [[TMP2144:%.*]] = load i32, i32* [[IE]], align 4
17249 // CHECK-NEXT:    [[TMP2145:%.*]] = load i32, i32* [[ID]], align 4
17250 // CHECK-NEXT:    [[TMP2146:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2144]], i32 [[TMP2145]] monotonic monotonic, align 4
17251 // CHECK-NEXT:    [[TMP2147:%.*]] = extractvalue { i32, i1 } [[TMP2146]], 0
17252 // CHECK-NEXT:    [[TMP2148:%.*]] = extractvalue { i32, i1 } [[TMP2146]], 1
17253 // CHECK-NEXT:    [[TMP2149:%.*]] = select i1 [[TMP2148]], i32 [[TMP2144]], i32 [[TMP2147]]
17254 // CHECK-NEXT:    store i32 [[TMP2149]], i32* [[IV]], align 4
17255 // CHECK-NEXT:    [[TMP2150:%.*]] = load i32, i32* [[IE]], align 4
17256 // CHECK-NEXT:    [[TMP2151:%.*]] = load i32, i32* [[ID]], align 4
17257 // CHECK-NEXT:    [[TMP2152:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2150]], i32 [[TMP2151]] monotonic monotonic, align 4
17258 // CHECK-NEXT:    [[TMP2153:%.*]] = extractvalue { i32, i1 } [[TMP2152]], 0
17259 // CHECK-NEXT:    [[TMP2154:%.*]] = extractvalue { i32, i1 } [[TMP2152]], 1
17260 // CHECK-NEXT:    br i1 [[TMP2154]], label [[IX_ATOMIC_EXIT207:%.*]], label [[IX_ATOMIC_CONT208:%.*]]
17261 // CHECK:       ix.atomic.cont208:
17262 // CHECK-NEXT:    store i32 [[TMP2153]], i32* [[IV]], align 4
17263 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT207]]
17264 // CHECK:       ix.atomic.exit207:
17265 // CHECK-NEXT:    [[TMP2155:%.*]] = load i32, i32* [[IE]], align 4
17266 // CHECK-NEXT:    [[TMP2156:%.*]] = load i32, i32* [[ID]], align 4
17267 // CHECK-NEXT:    [[TMP2157:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2155]], i32 [[TMP2156]] monotonic monotonic, align 4
17268 // CHECK-NEXT:    [[TMP2158:%.*]] = extractvalue { i32, i1 } [[TMP2157]], 0
17269 // CHECK-NEXT:    [[TMP2159:%.*]] = extractvalue { i32, i1 } [[TMP2157]], 1
17270 // CHECK-NEXT:    br i1 [[TMP2159]], label [[IX_ATOMIC_EXIT209:%.*]], label [[IX_ATOMIC_CONT210:%.*]]
17271 // CHECK:       ix.atomic.cont210:
17272 // CHECK-NEXT:    store i32 [[TMP2158]], i32* [[IV]], align 4
17273 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT209]]
17274 // CHECK:       ix.atomic.exit209:
17275 // CHECK-NEXT:    [[TMP2160:%.*]] = load i32, i32* [[IE]], align 4
17276 // CHECK-NEXT:    [[TMP2161:%.*]] = load i32, i32* [[ID]], align 4
17277 // CHECK-NEXT:    [[TMP2162:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2160]], i32 [[TMP2161]] monotonic monotonic, align 4
17278 // CHECK-NEXT:    [[TMP2163:%.*]] = extractvalue { i32, i1 } [[TMP2162]], 1
17279 // CHECK-NEXT:    [[TMP2164:%.*]] = sext i1 [[TMP2163]] to i32
17280 // CHECK-NEXT:    store i32 [[TMP2164]], i32* [[IR]], align 4
17281 // CHECK-NEXT:    [[TMP2165:%.*]] = load i32, i32* [[IE]], align 4
17282 // CHECK-NEXT:    [[TMP2166:%.*]] = load i32, i32* [[ID]], align 4
17283 // CHECK-NEXT:    [[TMP2167:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2165]], i32 [[TMP2166]] monotonic monotonic, align 4
17284 // CHECK-NEXT:    [[TMP2168:%.*]] = extractvalue { i32, i1 } [[TMP2167]], 1
17285 // CHECK-NEXT:    [[TMP2169:%.*]] = sext i1 [[TMP2168]] to i32
17286 // CHECK-NEXT:    store i32 [[TMP2169]], i32* [[IR]], align 4
17287 // CHECK-NEXT:    [[TMP2170:%.*]] = load i32, i32* [[IE]], align 4
17288 // CHECK-NEXT:    [[TMP2171:%.*]] = load i32, i32* [[ID]], align 4
17289 // CHECK-NEXT:    [[TMP2172:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2170]], i32 [[TMP2171]] monotonic monotonic, align 4
17290 // CHECK-NEXT:    [[TMP2173:%.*]] = extractvalue { i32, i1 } [[TMP2172]], 0
17291 // CHECK-NEXT:    [[TMP2174:%.*]] = extractvalue { i32, i1 } [[TMP2172]], 1
17292 // CHECK-NEXT:    br i1 [[TMP2174]], label [[IX_ATOMIC_EXIT211:%.*]], label [[IX_ATOMIC_CONT212:%.*]]
17293 // CHECK:       ix.atomic.cont212:
17294 // CHECK-NEXT:    store i32 [[TMP2173]], i32* [[IV]], align 4
17295 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT211]]
17296 // CHECK:       ix.atomic.exit211:
17297 // CHECK-NEXT:    [[TMP2175:%.*]] = extractvalue { i32, i1 } [[TMP2172]], 1
17298 // CHECK-NEXT:    [[TMP2176:%.*]] = sext i1 [[TMP2175]] to i32
17299 // CHECK-NEXT:    store i32 [[TMP2176]], i32* [[IR]], align 4
17300 // CHECK-NEXT:    [[TMP2177:%.*]] = load i32, i32* [[IE]], align 4
17301 // CHECK-NEXT:    [[TMP2178:%.*]] = load i32, i32* [[ID]], align 4
17302 // CHECK-NEXT:    [[TMP2179:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2177]], i32 [[TMP2178]] monotonic monotonic, align 4
17303 // CHECK-NEXT:    [[TMP2180:%.*]] = extractvalue { i32, i1 } [[TMP2179]], 0
17304 // CHECK-NEXT:    [[TMP2181:%.*]] = extractvalue { i32, i1 } [[TMP2179]], 1
17305 // CHECK-NEXT:    br i1 [[TMP2181]], label [[IX_ATOMIC_EXIT213:%.*]], label [[IX_ATOMIC_CONT214:%.*]]
17306 // CHECK:       ix.atomic.cont214:
17307 // CHECK-NEXT:    store i32 [[TMP2180]], i32* [[IV]], align 4
17308 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT213]]
17309 // CHECK:       ix.atomic.exit213:
17310 // CHECK-NEXT:    [[TMP2182:%.*]] = extractvalue { i32, i1 } [[TMP2179]], 1
17311 // CHECK-NEXT:    [[TMP2183:%.*]] = sext i1 [[TMP2182]] to i32
17312 // CHECK-NEXT:    store i32 [[TMP2183]], i32* [[IR]], align 4
17313 // CHECK-NEXT:    [[TMP2184:%.*]] = load i32, i32* [[IE]], align 4
17314 // CHECK-NEXT:    [[TMP2185:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2184]] release, align 4
17315 // CHECK-NEXT:    store i32 [[TMP2185]], i32* [[IV]], align 4
17316 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17317 // CHECK-NEXT:    [[TMP2186:%.*]] = load i32, i32* [[IE]], align 4
17318 // CHECK-NEXT:    [[TMP2187:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2186]] release, align 4
17319 // CHECK-NEXT:    store i32 [[TMP2187]], i32* [[IV]], align 4
17320 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17321 // CHECK-NEXT:    [[TMP2188:%.*]] = load i32, i32* [[IE]], align 4
17322 // CHECK-NEXT:    [[TMP2189:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2188]] release, align 4
17323 // CHECK-NEXT:    store i32 [[TMP2189]], i32* [[IV]], align 4
17324 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17325 // CHECK-NEXT:    [[TMP2190:%.*]] = load i32, i32* [[IE]], align 4
17326 // CHECK-NEXT:    [[TMP2191:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2190]] release, align 4
17327 // CHECK-NEXT:    store i32 [[TMP2191]], i32* [[IV]], align 4
17328 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17329 // CHECK-NEXT:    [[TMP2192:%.*]] = load i32, i32* [[IE]], align 4
17330 // CHECK-NEXT:    [[TMP2193:%.*]] = load i32, i32* [[ID]], align 4
17331 // CHECK-NEXT:    [[TMP2194:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2192]], i32 [[TMP2193]] release monotonic, align 4
17332 // CHECK-NEXT:    [[TMP2195:%.*]] = extractvalue { i32, i1 } [[TMP2194]], 0
17333 // CHECK-NEXT:    store i32 [[TMP2195]], i32* [[IV]], align 4
17334 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17335 // CHECK-NEXT:    [[TMP2196:%.*]] = load i32, i32* [[IE]], align 4
17336 // CHECK-NEXT:    [[TMP2197:%.*]] = load i32, i32* [[ID]], align 4
17337 // CHECK-NEXT:    [[TMP2198:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2196]], i32 [[TMP2197]] release monotonic, align 4
17338 // CHECK-NEXT:    [[TMP2199:%.*]] = extractvalue { i32, i1 } [[TMP2198]], 0
17339 // CHECK-NEXT:    store i32 [[TMP2199]], i32* [[IV]], align 4
17340 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17341 // CHECK-NEXT:    [[TMP2200:%.*]] = load i32, i32* [[IE]], align 4
17342 // CHECK-NEXT:    [[TMP2201:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2200]] release, align 4
17343 // CHECK-NEXT:    [[TMP2202:%.*]] = icmp sgt i32 [[TMP2201]], [[TMP2200]]
17344 // CHECK-NEXT:    [[TMP2203:%.*]] = select i1 [[TMP2202]], i32 [[TMP2200]], i32 [[TMP2201]]
17345 // CHECK-NEXT:    store i32 [[TMP2203]], i32* [[IV]], align 4
17346 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17347 // CHECK-NEXT:    [[TMP2204:%.*]] = load i32, i32* [[IE]], align 4
17348 // CHECK-NEXT:    [[TMP2205:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2204]] release, align 4
17349 // CHECK-NEXT:    [[TMP2206:%.*]] = icmp slt i32 [[TMP2205]], [[TMP2204]]
17350 // CHECK-NEXT:    [[TMP2207:%.*]] = select i1 [[TMP2206]], i32 [[TMP2204]], i32 [[TMP2205]]
17351 // CHECK-NEXT:    store i32 [[TMP2207]], i32* [[IV]], align 4
17352 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17353 // CHECK-NEXT:    [[TMP2208:%.*]] = load i32, i32* [[IE]], align 4
17354 // CHECK-NEXT:    [[TMP2209:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2208]] release, align 4
17355 // CHECK-NEXT:    [[TMP2210:%.*]] = icmp slt i32 [[TMP2209]], [[TMP2208]]
17356 // CHECK-NEXT:    [[TMP2211:%.*]] = select i1 [[TMP2210]], i32 [[TMP2208]], i32 [[TMP2209]]
17357 // CHECK-NEXT:    store i32 [[TMP2211]], i32* [[IV]], align 4
17358 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17359 // CHECK-NEXT:    [[TMP2212:%.*]] = load i32, i32* [[IE]], align 4
17360 // CHECK-NEXT:    [[TMP2213:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2212]] release, align 4
17361 // CHECK-NEXT:    [[TMP2214:%.*]] = icmp sgt i32 [[TMP2213]], [[TMP2212]]
17362 // CHECK-NEXT:    [[TMP2215:%.*]] = select i1 [[TMP2214]], i32 [[TMP2212]], i32 [[TMP2213]]
17363 // CHECK-NEXT:    store i32 [[TMP2215]], i32* [[IV]], align 4
17364 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17365 // CHECK-NEXT:    [[TMP2216:%.*]] = load i32, i32* [[IE]], align 4
17366 // CHECK-NEXT:    [[TMP2217:%.*]] = load i32, i32* [[ID]], align 4
17367 // CHECK-NEXT:    [[TMP2218:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2216]], i32 [[TMP2217]] release monotonic, align 4
17368 // CHECK-NEXT:    [[TMP2219:%.*]] = extractvalue { i32, i1 } [[TMP2218]], 0
17369 // CHECK-NEXT:    [[TMP2220:%.*]] = extractvalue { i32, i1 } [[TMP2218]], 1
17370 // CHECK-NEXT:    [[TMP2221:%.*]] = select i1 [[TMP2220]], i32 [[TMP2216]], i32 [[TMP2219]]
17371 // CHECK-NEXT:    store i32 [[TMP2221]], i32* [[IV]], align 4
17372 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17373 // CHECK-NEXT:    [[TMP2222:%.*]] = load i32, i32* [[IE]], align 4
17374 // CHECK-NEXT:    [[TMP2223:%.*]] = load i32, i32* [[ID]], align 4
17375 // CHECK-NEXT:    [[TMP2224:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2222]], i32 [[TMP2223]] release monotonic, align 4
17376 // CHECK-NEXT:    [[TMP2225:%.*]] = extractvalue { i32, i1 } [[TMP2224]], 0
17377 // CHECK-NEXT:    [[TMP2226:%.*]] = extractvalue { i32, i1 } [[TMP2224]], 1
17378 // CHECK-NEXT:    [[TMP2227:%.*]] = select i1 [[TMP2226]], i32 [[TMP2222]], i32 [[TMP2225]]
17379 // CHECK-NEXT:    store i32 [[TMP2227]], i32* [[IV]], align 4
17380 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17381 // CHECK-NEXT:    [[TMP2228:%.*]] = load i32, i32* [[IE]], align 4
17382 // CHECK-NEXT:    [[TMP2229:%.*]] = load i32, i32* [[ID]], align 4
17383 // CHECK-NEXT:    [[TMP2230:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2228]], i32 [[TMP2229]] release monotonic, align 4
17384 // CHECK-NEXT:    [[TMP2231:%.*]] = extractvalue { i32, i1 } [[TMP2230]], 0
17385 // CHECK-NEXT:    [[TMP2232:%.*]] = extractvalue { i32, i1 } [[TMP2230]], 1
17386 // CHECK-NEXT:    br i1 [[TMP2232]], label [[IX_ATOMIC_EXIT215:%.*]], label [[IX_ATOMIC_CONT216:%.*]]
17387 // CHECK:       ix.atomic.cont216:
17388 // CHECK-NEXT:    store i32 [[TMP2231]], i32* [[IV]], align 4
17389 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT215]]
17390 // CHECK:       ix.atomic.exit215:
17391 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17392 // CHECK-NEXT:    [[TMP2233:%.*]] = load i32, i32* [[IE]], align 4
17393 // CHECK-NEXT:    [[TMP2234:%.*]] = load i32, i32* [[ID]], align 4
17394 // CHECK-NEXT:    [[TMP2235:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2233]], i32 [[TMP2234]] release monotonic, align 4
17395 // CHECK-NEXT:    [[TMP2236:%.*]] = extractvalue { i32, i1 } [[TMP2235]], 0
17396 // CHECK-NEXT:    [[TMP2237:%.*]] = extractvalue { i32, i1 } [[TMP2235]], 1
17397 // CHECK-NEXT:    br i1 [[TMP2237]], label [[IX_ATOMIC_EXIT217:%.*]], label [[IX_ATOMIC_CONT218:%.*]]
17398 // CHECK:       ix.atomic.cont218:
17399 // CHECK-NEXT:    store i32 [[TMP2236]], i32* [[IV]], align 4
17400 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT217]]
17401 // CHECK:       ix.atomic.exit217:
17402 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17403 // CHECK-NEXT:    [[TMP2238:%.*]] = load i32, i32* [[IE]], align 4
17404 // CHECK-NEXT:    [[TMP2239:%.*]] = load i32, i32* [[ID]], align 4
17405 // CHECK-NEXT:    [[TMP2240:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2238]], i32 [[TMP2239]] release monotonic, align 4
17406 // CHECK-NEXT:    [[TMP2241:%.*]] = extractvalue { i32, i1 } [[TMP2240]], 1
17407 // CHECK-NEXT:    [[TMP2242:%.*]] = sext i1 [[TMP2241]] to i32
17408 // CHECK-NEXT:    store i32 [[TMP2242]], i32* [[IR]], align 4
17409 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17410 // CHECK-NEXT:    [[TMP2243:%.*]] = load i32, i32* [[IE]], align 4
17411 // CHECK-NEXT:    [[TMP2244:%.*]] = load i32, i32* [[ID]], align 4
17412 // CHECK-NEXT:    [[TMP2245:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2243]], i32 [[TMP2244]] release monotonic, align 4
17413 // CHECK-NEXT:    [[TMP2246:%.*]] = extractvalue { i32, i1 } [[TMP2245]], 1
17414 // CHECK-NEXT:    [[TMP2247:%.*]] = sext i1 [[TMP2246]] to i32
17415 // CHECK-NEXT:    store i32 [[TMP2247]], i32* [[IR]], align 4
17416 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17417 // CHECK-NEXT:    [[TMP2248:%.*]] = load i32, i32* [[IE]], align 4
17418 // CHECK-NEXT:    [[TMP2249:%.*]] = load i32, i32* [[ID]], align 4
17419 // CHECK-NEXT:    [[TMP2250:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2248]], i32 [[TMP2249]] release monotonic, align 4
17420 // CHECK-NEXT:    [[TMP2251:%.*]] = extractvalue { i32, i1 } [[TMP2250]], 0
17421 // CHECK-NEXT:    [[TMP2252:%.*]] = extractvalue { i32, i1 } [[TMP2250]], 1
17422 // CHECK-NEXT:    br i1 [[TMP2252]], label [[IX_ATOMIC_EXIT219:%.*]], label [[IX_ATOMIC_CONT220:%.*]]
17423 // CHECK:       ix.atomic.cont220:
17424 // CHECK-NEXT:    store i32 [[TMP2251]], i32* [[IV]], align 4
17425 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT219]]
17426 // CHECK:       ix.atomic.exit219:
17427 // CHECK-NEXT:    [[TMP2253:%.*]] = extractvalue { i32, i1 } [[TMP2250]], 1
17428 // CHECK-NEXT:    [[TMP2254:%.*]] = sext i1 [[TMP2253]] to i32
17429 // CHECK-NEXT:    store i32 [[TMP2254]], i32* [[IR]], align 4
17430 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17431 // CHECK-NEXT:    [[TMP2255:%.*]] = load i32, i32* [[IE]], align 4
17432 // CHECK-NEXT:    [[TMP2256:%.*]] = load i32, i32* [[ID]], align 4
17433 // CHECK-NEXT:    [[TMP2257:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2255]], i32 [[TMP2256]] release monotonic, align 4
17434 // CHECK-NEXT:    [[TMP2258:%.*]] = extractvalue { i32, i1 } [[TMP2257]], 0
17435 // CHECK-NEXT:    [[TMP2259:%.*]] = extractvalue { i32, i1 } [[TMP2257]], 1
17436 // CHECK-NEXT:    br i1 [[TMP2259]], label [[IX_ATOMIC_EXIT221:%.*]], label [[IX_ATOMIC_CONT222:%.*]]
17437 // CHECK:       ix.atomic.cont222:
17438 // CHECK-NEXT:    store i32 [[TMP2258]], i32* [[IV]], align 4
17439 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT221]]
17440 // CHECK:       ix.atomic.exit221:
17441 // CHECK-NEXT:    [[TMP2260:%.*]] = extractvalue { i32, i1 } [[TMP2257]], 1
17442 // CHECK-NEXT:    [[TMP2261:%.*]] = sext i1 [[TMP2260]] to i32
17443 // CHECK-NEXT:    store i32 [[TMP2261]], i32* [[IR]], align 4
17444 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17445 // CHECK-NEXT:    [[TMP2262:%.*]] = load i32, i32* [[IE]], align 4
17446 // CHECK-NEXT:    [[TMP2263:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2262]] seq_cst, align 4
17447 // CHECK-NEXT:    store i32 [[TMP2263]], i32* [[IV]], align 4
17448 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17449 // CHECK-NEXT:    [[TMP2264:%.*]] = load i32, i32* [[IE]], align 4
17450 // CHECK-NEXT:    [[TMP2265:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2264]] seq_cst, align 4
17451 // CHECK-NEXT:    store i32 [[TMP2265]], i32* [[IV]], align 4
17452 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17453 // CHECK-NEXT:    [[TMP2266:%.*]] = load i32, i32* [[IE]], align 4
17454 // CHECK-NEXT:    [[TMP2267:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2266]] seq_cst, align 4
17455 // CHECK-NEXT:    store i32 [[TMP2267]], i32* [[IV]], align 4
17456 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17457 // CHECK-NEXT:    [[TMP2268:%.*]] = load i32, i32* [[IE]], align 4
17458 // CHECK-NEXT:    [[TMP2269:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2268]] seq_cst, align 4
17459 // CHECK-NEXT:    store i32 [[TMP2269]], i32* [[IV]], align 4
17460 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17461 // CHECK-NEXT:    [[TMP2270:%.*]] = load i32, i32* [[IE]], align 4
17462 // CHECK-NEXT:    [[TMP2271:%.*]] = load i32, i32* [[ID]], align 4
17463 // CHECK-NEXT:    [[TMP2272:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2270]], i32 [[TMP2271]] seq_cst seq_cst, align 4
17464 // CHECK-NEXT:    [[TMP2273:%.*]] = extractvalue { i32, i1 } [[TMP2272]], 0
17465 // CHECK-NEXT:    store i32 [[TMP2273]], i32* [[IV]], align 4
17466 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17467 // CHECK-NEXT:    [[TMP2274:%.*]] = load i32, i32* [[IE]], align 4
17468 // CHECK-NEXT:    [[TMP2275:%.*]] = load i32, i32* [[ID]], align 4
17469 // CHECK-NEXT:    [[TMP2276:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2274]], i32 [[TMP2275]] seq_cst seq_cst, align 4
17470 // CHECK-NEXT:    [[TMP2277:%.*]] = extractvalue { i32, i1 } [[TMP2276]], 0
17471 // CHECK-NEXT:    store i32 [[TMP2277]], i32* [[IV]], align 4
17472 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17473 // CHECK-NEXT:    [[TMP2278:%.*]] = load i32, i32* [[IE]], align 4
17474 // CHECK-NEXT:    [[TMP2279:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2278]] seq_cst, align 4
17475 // CHECK-NEXT:    [[TMP2280:%.*]] = icmp sgt i32 [[TMP2279]], [[TMP2278]]
17476 // CHECK-NEXT:    [[TMP2281:%.*]] = select i1 [[TMP2280]], i32 [[TMP2278]], i32 [[TMP2279]]
17477 // CHECK-NEXT:    store i32 [[TMP2281]], i32* [[IV]], align 4
17478 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17479 // CHECK-NEXT:    [[TMP2282:%.*]] = load i32, i32* [[IE]], align 4
17480 // CHECK-NEXT:    [[TMP2283:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2282]] seq_cst, align 4
17481 // CHECK-NEXT:    [[TMP2284:%.*]] = icmp slt i32 [[TMP2283]], [[TMP2282]]
17482 // CHECK-NEXT:    [[TMP2285:%.*]] = select i1 [[TMP2284]], i32 [[TMP2282]], i32 [[TMP2283]]
17483 // CHECK-NEXT:    store i32 [[TMP2285]], i32* [[IV]], align 4
17484 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17485 // CHECK-NEXT:    [[TMP2286:%.*]] = load i32, i32* [[IE]], align 4
17486 // CHECK-NEXT:    [[TMP2287:%.*]] = atomicrmw min i32* [[IX]], i32 [[TMP2286]] seq_cst, align 4
17487 // CHECK-NEXT:    [[TMP2288:%.*]] = icmp slt i32 [[TMP2287]], [[TMP2286]]
17488 // CHECK-NEXT:    [[TMP2289:%.*]] = select i1 [[TMP2288]], i32 [[TMP2286]], i32 [[TMP2287]]
17489 // CHECK-NEXT:    store i32 [[TMP2289]], i32* [[IV]], align 4
17490 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17491 // CHECK-NEXT:    [[TMP2290:%.*]] = load i32, i32* [[IE]], align 4
17492 // CHECK-NEXT:    [[TMP2291:%.*]] = atomicrmw max i32* [[IX]], i32 [[TMP2290]] seq_cst, align 4
17493 // CHECK-NEXT:    [[TMP2292:%.*]] = icmp sgt i32 [[TMP2291]], [[TMP2290]]
17494 // CHECK-NEXT:    [[TMP2293:%.*]] = select i1 [[TMP2292]], i32 [[TMP2290]], i32 [[TMP2291]]
17495 // CHECK-NEXT:    store i32 [[TMP2293]], i32* [[IV]], align 4
17496 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17497 // CHECK-NEXT:    [[TMP2294:%.*]] = load i32, i32* [[IE]], align 4
17498 // CHECK-NEXT:    [[TMP2295:%.*]] = load i32, i32* [[ID]], align 4
17499 // CHECK-NEXT:    [[TMP2296:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2294]], i32 [[TMP2295]] seq_cst seq_cst, align 4
17500 // CHECK-NEXT:    [[TMP2297:%.*]] = extractvalue { i32, i1 } [[TMP2296]], 0
17501 // CHECK-NEXT:    [[TMP2298:%.*]] = extractvalue { i32, i1 } [[TMP2296]], 1
17502 // CHECK-NEXT:    [[TMP2299:%.*]] = select i1 [[TMP2298]], i32 [[TMP2294]], i32 [[TMP2297]]
17503 // CHECK-NEXT:    store i32 [[TMP2299]], i32* [[IV]], align 4
17504 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17505 // CHECK-NEXT:    [[TMP2300:%.*]] = load i32, i32* [[IE]], align 4
17506 // CHECK-NEXT:    [[TMP2301:%.*]] = load i32, i32* [[ID]], align 4
17507 // CHECK-NEXT:    [[TMP2302:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2300]], i32 [[TMP2301]] seq_cst seq_cst, align 4
17508 // CHECK-NEXT:    [[TMP2303:%.*]] = extractvalue { i32, i1 } [[TMP2302]], 0
17509 // CHECK-NEXT:    [[TMP2304:%.*]] = extractvalue { i32, i1 } [[TMP2302]], 1
17510 // CHECK-NEXT:    [[TMP2305:%.*]] = select i1 [[TMP2304]], i32 [[TMP2300]], i32 [[TMP2303]]
17511 // CHECK-NEXT:    store i32 [[TMP2305]], i32* [[IV]], align 4
17512 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17513 // CHECK-NEXT:    [[TMP2306:%.*]] = load i32, i32* [[IE]], align 4
17514 // CHECK-NEXT:    [[TMP2307:%.*]] = load i32, i32* [[ID]], align 4
17515 // CHECK-NEXT:    [[TMP2308:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2306]], i32 [[TMP2307]] seq_cst seq_cst, align 4
17516 // CHECK-NEXT:    [[TMP2309:%.*]] = extractvalue { i32, i1 } [[TMP2308]], 0
17517 // CHECK-NEXT:    [[TMP2310:%.*]] = extractvalue { i32, i1 } [[TMP2308]], 1
17518 // CHECK-NEXT:    br i1 [[TMP2310]], label [[IX_ATOMIC_EXIT223:%.*]], label [[IX_ATOMIC_CONT224:%.*]]
17519 // CHECK:       ix.atomic.cont224:
17520 // CHECK-NEXT:    store i32 [[TMP2309]], i32* [[IV]], align 4
17521 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT223]]
17522 // CHECK:       ix.atomic.exit223:
17523 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17524 // CHECK-NEXT:    [[TMP2311:%.*]] = load i32, i32* [[IE]], align 4
17525 // CHECK-NEXT:    [[TMP2312:%.*]] = load i32, i32* [[ID]], align 4
17526 // CHECK-NEXT:    [[TMP2313:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2311]], i32 [[TMP2312]] seq_cst seq_cst, align 4
17527 // CHECK-NEXT:    [[TMP2314:%.*]] = extractvalue { i32, i1 } [[TMP2313]], 0
17528 // CHECK-NEXT:    [[TMP2315:%.*]] = extractvalue { i32, i1 } [[TMP2313]], 1
17529 // CHECK-NEXT:    br i1 [[TMP2315]], label [[IX_ATOMIC_EXIT225:%.*]], label [[IX_ATOMIC_CONT226:%.*]]
17530 // CHECK:       ix.atomic.cont226:
17531 // CHECK-NEXT:    store i32 [[TMP2314]], i32* [[IV]], align 4
17532 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT225]]
17533 // CHECK:       ix.atomic.exit225:
17534 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17535 // CHECK-NEXT:    [[TMP2316:%.*]] = load i32, i32* [[IE]], align 4
17536 // CHECK-NEXT:    [[TMP2317:%.*]] = load i32, i32* [[ID]], align 4
17537 // CHECK-NEXT:    [[TMP2318:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2316]], i32 [[TMP2317]] seq_cst seq_cst, align 4
17538 // CHECK-NEXT:    [[TMP2319:%.*]] = extractvalue { i32, i1 } [[TMP2318]], 1
17539 // CHECK-NEXT:    [[TMP2320:%.*]] = sext i1 [[TMP2319]] to i32
17540 // CHECK-NEXT:    store i32 [[TMP2320]], i32* [[IR]], align 4
17541 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17542 // CHECK-NEXT:    [[TMP2321:%.*]] = load i32, i32* [[IE]], align 4
17543 // CHECK-NEXT:    [[TMP2322:%.*]] = load i32, i32* [[ID]], align 4
17544 // CHECK-NEXT:    [[TMP2323:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2321]], i32 [[TMP2322]] seq_cst seq_cst, align 4
17545 // CHECK-NEXT:    [[TMP2324:%.*]] = extractvalue { i32, i1 } [[TMP2323]], 1
17546 // CHECK-NEXT:    [[TMP2325:%.*]] = sext i1 [[TMP2324]] to i32
17547 // CHECK-NEXT:    store i32 [[TMP2325]], i32* [[IR]], align 4
17548 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17549 // CHECK-NEXT:    [[TMP2326:%.*]] = load i32, i32* [[IE]], align 4
17550 // CHECK-NEXT:    [[TMP2327:%.*]] = load i32, i32* [[ID]], align 4
17551 // CHECK-NEXT:    [[TMP2328:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2326]], i32 [[TMP2327]] seq_cst seq_cst, align 4
17552 // CHECK-NEXT:    [[TMP2329:%.*]] = extractvalue { i32, i1 } [[TMP2328]], 0
17553 // CHECK-NEXT:    [[TMP2330:%.*]] = extractvalue { i32, i1 } [[TMP2328]], 1
17554 // CHECK-NEXT:    br i1 [[TMP2330]], label [[IX_ATOMIC_EXIT227:%.*]], label [[IX_ATOMIC_CONT228:%.*]]
17555 // CHECK:       ix.atomic.cont228:
17556 // CHECK-NEXT:    store i32 [[TMP2329]], i32* [[IV]], align 4
17557 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT227]]
17558 // CHECK:       ix.atomic.exit227:
17559 // CHECK-NEXT:    [[TMP2331:%.*]] = extractvalue { i32, i1 } [[TMP2328]], 1
17560 // CHECK-NEXT:    [[TMP2332:%.*]] = sext i1 [[TMP2331]] to i32
17561 // CHECK-NEXT:    store i32 [[TMP2332]], i32* [[IR]], align 4
17562 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17563 // CHECK-NEXT:    [[TMP2333:%.*]] = load i32, i32* [[IE]], align 4
17564 // CHECK-NEXT:    [[TMP2334:%.*]] = load i32, i32* [[ID]], align 4
17565 // CHECK-NEXT:    [[TMP2335:%.*]] = cmpxchg i32* [[IX]], i32 [[TMP2333]], i32 [[TMP2334]] seq_cst seq_cst, align 4
17566 // CHECK-NEXT:    [[TMP2336:%.*]] = extractvalue { i32, i1 } [[TMP2335]], 0
17567 // CHECK-NEXT:    [[TMP2337:%.*]] = extractvalue { i32, i1 } [[TMP2335]], 1
17568 // CHECK-NEXT:    br i1 [[TMP2337]], label [[IX_ATOMIC_EXIT229:%.*]], label [[IX_ATOMIC_CONT230:%.*]]
17569 // CHECK:       ix.atomic.cont230:
17570 // CHECK-NEXT:    store i32 [[TMP2336]], i32* [[IV]], align 4
17571 // CHECK-NEXT:    br label [[IX_ATOMIC_EXIT229]]
17572 // CHECK:       ix.atomic.exit229:
17573 // CHECK-NEXT:    [[TMP2338:%.*]] = extractvalue { i32, i1 } [[TMP2335]], 1
17574 // CHECK-NEXT:    [[TMP2339:%.*]] = sext i1 [[TMP2338]] to i32
17575 // CHECK-NEXT:    store i32 [[TMP2339]], i32* [[IR]], align 4
17576 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17577 // CHECK-NEXT:    [[TMP2340:%.*]] = load i32, i32* [[UIE]], align 4
17578 // CHECK-NEXT:    [[TMP2341:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2340]] monotonic, align 4
17579 // CHECK-NEXT:    store i32 [[TMP2341]], i32* [[UIV]], align 4
17580 // CHECK-NEXT:    [[TMP2342:%.*]] = load i32, i32* [[UIE]], align 4
17581 // CHECK-NEXT:    [[TMP2343:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2342]] monotonic, align 4
17582 // CHECK-NEXT:    store i32 [[TMP2343]], i32* [[UIV]], align 4
17583 // CHECK-NEXT:    [[TMP2344:%.*]] = load i32, i32* [[UIE]], align 4
17584 // CHECK-NEXT:    [[TMP2345:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2344]] monotonic, align 4
17585 // CHECK-NEXT:    store i32 [[TMP2345]], i32* [[UIV]], align 4
17586 // CHECK-NEXT:    [[TMP2346:%.*]] = load i32, i32* [[UIE]], align 4
17587 // CHECK-NEXT:    [[TMP2347:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2346]] monotonic, align 4
17588 // CHECK-NEXT:    store i32 [[TMP2347]], i32* [[UIV]], align 4
17589 // CHECK-NEXT:    [[TMP2348:%.*]] = load i32, i32* [[UIE]], align 4
17590 // CHECK-NEXT:    [[TMP2349:%.*]] = load i32, i32* [[UID]], align 4
17591 // CHECK-NEXT:    [[TMP2350:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2348]], i32 [[TMP2349]] monotonic monotonic, align 4
17592 // CHECK-NEXT:    [[TMP2351:%.*]] = extractvalue { i32, i1 } [[TMP2350]], 0
17593 // CHECK-NEXT:    store i32 [[TMP2351]], i32* [[UIV]], align 4
17594 // CHECK-NEXT:    [[TMP2352:%.*]] = load i32, i32* [[UIE]], align 4
17595 // CHECK-NEXT:    [[TMP2353:%.*]] = load i32, i32* [[UID]], align 4
17596 // CHECK-NEXT:    [[TMP2354:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2352]], i32 [[TMP2353]] monotonic monotonic, align 4
17597 // CHECK-NEXT:    [[TMP2355:%.*]] = extractvalue { i32, i1 } [[TMP2354]], 0
17598 // CHECK-NEXT:    store i32 [[TMP2355]], i32* [[UIV]], align 4
17599 // CHECK-NEXT:    [[TMP2356:%.*]] = load i32, i32* [[UIE]], align 4
17600 // CHECK-NEXT:    [[TMP2357:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2356]] monotonic, align 4
17601 // CHECK-NEXT:    [[TMP2358:%.*]] = icmp ugt i32 [[TMP2357]], [[TMP2356]]
17602 // CHECK-NEXT:    [[TMP2359:%.*]] = select i1 [[TMP2358]], i32 [[TMP2356]], i32 [[TMP2357]]
17603 // CHECK-NEXT:    store i32 [[TMP2359]], i32* [[UIV]], align 4
17604 // CHECK-NEXT:    [[TMP2360:%.*]] = load i32, i32* [[UIE]], align 4
17605 // CHECK-NEXT:    [[TMP2361:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2360]] monotonic, align 4
17606 // CHECK-NEXT:    [[TMP2362:%.*]] = icmp ult i32 [[TMP2361]], [[TMP2360]]
17607 // CHECK-NEXT:    [[TMP2363:%.*]] = select i1 [[TMP2362]], i32 [[TMP2360]], i32 [[TMP2361]]
17608 // CHECK-NEXT:    store i32 [[TMP2363]], i32* [[UIV]], align 4
17609 // CHECK-NEXT:    [[TMP2364:%.*]] = load i32, i32* [[UIE]], align 4
17610 // CHECK-NEXT:    [[TMP2365:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2364]] monotonic, align 4
17611 // CHECK-NEXT:    [[TMP2366:%.*]] = icmp ult i32 [[TMP2365]], [[TMP2364]]
17612 // CHECK-NEXT:    [[TMP2367:%.*]] = select i1 [[TMP2366]], i32 [[TMP2364]], i32 [[TMP2365]]
17613 // CHECK-NEXT:    store i32 [[TMP2367]], i32* [[UIV]], align 4
17614 // CHECK-NEXT:    [[TMP2368:%.*]] = load i32, i32* [[UIE]], align 4
17615 // CHECK-NEXT:    [[TMP2369:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2368]] monotonic, align 4
17616 // CHECK-NEXT:    [[TMP2370:%.*]] = icmp ugt i32 [[TMP2369]], [[TMP2368]]
17617 // CHECK-NEXT:    [[TMP2371:%.*]] = select i1 [[TMP2370]], i32 [[TMP2368]], i32 [[TMP2369]]
17618 // CHECK-NEXT:    store i32 [[TMP2371]], i32* [[UIV]], align 4
17619 // CHECK-NEXT:    [[TMP2372:%.*]] = load i32, i32* [[UIE]], align 4
17620 // CHECK-NEXT:    [[TMP2373:%.*]] = load i32, i32* [[UID]], align 4
17621 // CHECK-NEXT:    [[TMP2374:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2372]], i32 [[TMP2373]] monotonic monotonic, align 4
17622 // CHECK-NEXT:    [[TMP2375:%.*]] = extractvalue { i32, i1 } [[TMP2374]], 0
17623 // CHECK-NEXT:    [[TMP2376:%.*]] = extractvalue { i32, i1 } [[TMP2374]], 1
17624 // CHECK-NEXT:    [[TMP2377:%.*]] = select i1 [[TMP2376]], i32 [[TMP2372]], i32 [[TMP2375]]
17625 // CHECK-NEXT:    store i32 [[TMP2377]], i32* [[UIV]], align 4
17626 // CHECK-NEXT:    [[TMP2378:%.*]] = load i32, i32* [[UIE]], align 4
17627 // CHECK-NEXT:    [[TMP2379:%.*]] = load i32, i32* [[UID]], align 4
17628 // CHECK-NEXT:    [[TMP2380:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2378]], i32 [[TMP2379]] monotonic monotonic, align 4
17629 // CHECK-NEXT:    [[TMP2381:%.*]] = extractvalue { i32, i1 } [[TMP2380]], 0
17630 // CHECK-NEXT:    [[TMP2382:%.*]] = extractvalue { i32, i1 } [[TMP2380]], 1
17631 // CHECK-NEXT:    [[TMP2383:%.*]] = select i1 [[TMP2382]], i32 [[TMP2378]], i32 [[TMP2381]]
17632 // CHECK-NEXT:    store i32 [[TMP2383]], i32* [[UIV]], align 4
17633 // CHECK-NEXT:    [[TMP2384:%.*]] = load i32, i32* [[UIE]], align 4
17634 // CHECK-NEXT:    [[TMP2385:%.*]] = load i32, i32* [[UID]], align 4
17635 // CHECK-NEXT:    [[TMP2386:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2384]], i32 [[TMP2385]] monotonic monotonic, align 4
17636 // CHECK-NEXT:    [[TMP2387:%.*]] = extractvalue { i32, i1 } [[TMP2386]], 0
17637 // CHECK-NEXT:    [[TMP2388:%.*]] = extractvalue { i32, i1 } [[TMP2386]], 1
17638 // CHECK-NEXT:    br i1 [[TMP2388]], label [[UIX_ATOMIC_EXIT:%.*]], label [[UIX_ATOMIC_CONT:%.*]]
17639 // CHECK:       uix.atomic.cont:
17640 // CHECK-NEXT:    store i32 [[TMP2387]], i32* [[UIV]], align 4
17641 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT]]
17642 // CHECK:       uix.atomic.exit:
17643 // CHECK-NEXT:    [[TMP2389:%.*]] = load i32, i32* [[UIE]], align 4
17644 // CHECK-NEXT:    [[TMP2390:%.*]] = load i32, i32* [[UID]], align 4
17645 // CHECK-NEXT:    [[TMP2391:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2389]], i32 [[TMP2390]] monotonic monotonic, align 4
17646 // CHECK-NEXT:    [[TMP2392:%.*]] = extractvalue { i32, i1 } [[TMP2391]], 0
17647 // CHECK-NEXT:    [[TMP2393:%.*]] = extractvalue { i32, i1 } [[TMP2391]], 1
17648 // CHECK-NEXT:    br i1 [[TMP2393]], label [[UIX_ATOMIC_EXIT231:%.*]], label [[UIX_ATOMIC_CONT232:%.*]]
17649 // CHECK:       uix.atomic.cont232:
17650 // CHECK-NEXT:    store i32 [[TMP2392]], i32* [[UIV]], align 4
17651 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT231]]
17652 // CHECK:       uix.atomic.exit231:
17653 // CHECK-NEXT:    [[TMP2394:%.*]] = load i32, i32* [[UIE]], align 4
17654 // CHECK-NEXT:    [[TMP2395:%.*]] = load i32, i32* [[UID]], align 4
17655 // CHECK-NEXT:    [[TMP2396:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2394]], i32 [[TMP2395]] monotonic monotonic, align 4
17656 // CHECK-NEXT:    [[TMP2397:%.*]] = extractvalue { i32, i1 } [[TMP2396]], 1
17657 // CHECK-NEXT:    [[TMP2398:%.*]] = zext i1 [[TMP2397]] to i32
17658 // CHECK-NEXT:    store i32 [[TMP2398]], i32* [[UIR]], align 4
17659 // CHECK-NEXT:    [[TMP2399:%.*]] = load i32, i32* [[UIE]], align 4
17660 // CHECK-NEXT:    [[TMP2400:%.*]] = load i32, i32* [[UID]], align 4
17661 // CHECK-NEXT:    [[TMP2401:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2399]], i32 [[TMP2400]] monotonic monotonic, align 4
17662 // CHECK-NEXT:    [[TMP2402:%.*]] = extractvalue { i32, i1 } [[TMP2401]], 1
17663 // CHECK-NEXT:    [[TMP2403:%.*]] = zext i1 [[TMP2402]] to i32
17664 // CHECK-NEXT:    store i32 [[TMP2403]], i32* [[UIR]], align 4
17665 // CHECK-NEXT:    [[TMP2404:%.*]] = load i32, i32* [[UIE]], align 4
17666 // CHECK-NEXT:    [[TMP2405:%.*]] = load i32, i32* [[UID]], align 4
17667 // CHECK-NEXT:    [[TMP2406:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2404]], i32 [[TMP2405]] monotonic monotonic, align 4
17668 // CHECK-NEXT:    [[TMP2407:%.*]] = extractvalue { i32, i1 } [[TMP2406]], 0
17669 // CHECK-NEXT:    [[TMP2408:%.*]] = extractvalue { i32, i1 } [[TMP2406]], 1
17670 // CHECK-NEXT:    br i1 [[TMP2408]], label [[UIX_ATOMIC_EXIT233:%.*]], label [[UIX_ATOMIC_CONT234:%.*]]
17671 // CHECK:       uix.atomic.cont234:
17672 // CHECK-NEXT:    store i32 [[TMP2407]], i32* [[UIV]], align 4
17673 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT233]]
17674 // CHECK:       uix.atomic.exit233:
17675 // CHECK-NEXT:    [[TMP2409:%.*]] = extractvalue { i32, i1 } [[TMP2406]], 1
17676 // CHECK-NEXT:    [[TMP2410:%.*]] = zext i1 [[TMP2409]] to i32
17677 // CHECK-NEXT:    store i32 [[TMP2410]], i32* [[UIR]], align 4
17678 // CHECK-NEXT:    [[TMP2411:%.*]] = load i32, i32* [[UIE]], align 4
17679 // CHECK-NEXT:    [[TMP2412:%.*]] = load i32, i32* [[UID]], align 4
17680 // CHECK-NEXT:    [[TMP2413:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2411]], i32 [[TMP2412]] monotonic monotonic, align 4
17681 // CHECK-NEXT:    [[TMP2414:%.*]] = extractvalue { i32, i1 } [[TMP2413]], 0
17682 // CHECK-NEXT:    [[TMP2415:%.*]] = extractvalue { i32, i1 } [[TMP2413]], 1
17683 // CHECK-NEXT:    br i1 [[TMP2415]], label [[UIX_ATOMIC_EXIT235:%.*]], label [[UIX_ATOMIC_CONT236:%.*]]
17684 // CHECK:       uix.atomic.cont236:
17685 // CHECK-NEXT:    store i32 [[TMP2414]], i32* [[UIV]], align 4
17686 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT235]]
17687 // CHECK:       uix.atomic.exit235:
17688 // CHECK-NEXT:    [[TMP2416:%.*]] = extractvalue { i32, i1 } [[TMP2413]], 1
17689 // CHECK-NEXT:    [[TMP2417:%.*]] = zext i1 [[TMP2416]] to i32
17690 // CHECK-NEXT:    store i32 [[TMP2417]], i32* [[UIR]], align 4
17691 // CHECK-NEXT:    [[TMP2418:%.*]] = load i32, i32* [[UIE]], align 4
17692 // CHECK-NEXT:    [[TMP2419:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2418]] acq_rel, align 4
17693 // CHECK-NEXT:    store i32 [[TMP2419]], i32* [[UIV]], align 4
17694 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17695 // CHECK-NEXT:    [[TMP2420:%.*]] = load i32, i32* [[UIE]], align 4
17696 // CHECK-NEXT:    [[TMP2421:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2420]] acq_rel, align 4
17697 // CHECK-NEXT:    store i32 [[TMP2421]], i32* [[UIV]], align 4
17698 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17699 // CHECK-NEXT:    [[TMP2422:%.*]] = load i32, i32* [[UIE]], align 4
17700 // CHECK-NEXT:    [[TMP2423:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2422]] acq_rel, align 4
17701 // CHECK-NEXT:    store i32 [[TMP2423]], i32* [[UIV]], align 4
17702 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17703 // CHECK-NEXT:    [[TMP2424:%.*]] = load i32, i32* [[UIE]], align 4
17704 // CHECK-NEXT:    [[TMP2425:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2424]] acq_rel, align 4
17705 // CHECK-NEXT:    store i32 [[TMP2425]], i32* [[UIV]], align 4
17706 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17707 // CHECK-NEXT:    [[TMP2426:%.*]] = load i32, i32* [[UIE]], align 4
17708 // CHECK-NEXT:    [[TMP2427:%.*]] = load i32, i32* [[UID]], align 4
17709 // CHECK-NEXT:    [[TMP2428:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2426]], i32 [[TMP2427]] acq_rel acquire, align 4
17710 // CHECK-NEXT:    [[TMP2429:%.*]] = extractvalue { i32, i1 } [[TMP2428]], 0
17711 // CHECK-NEXT:    store i32 [[TMP2429]], i32* [[UIV]], align 4
17712 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17713 // CHECK-NEXT:    [[TMP2430:%.*]] = load i32, i32* [[UIE]], align 4
17714 // CHECK-NEXT:    [[TMP2431:%.*]] = load i32, i32* [[UID]], align 4
17715 // CHECK-NEXT:    [[TMP2432:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2430]], i32 [[TMP2431]] acq_rel acquire, align 4
17716 // CHECK-NEXT:    [[TMP2433:%.*]] = extractvalue { i32, i1 } [[TMP2432]], 0
17717 // CHECK-NEXT:    store i32 [[TMP2433]], i32* [[UIV]], align 4
17718 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17719 // CHECK-NEXT:    [[TMP2434:%.*]] = load i32, i32* [[UIE]], align 4
17720 // CHECK-NEXT:    [[TMP2435:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2434]] acq_rel, align 4
17721 // CHECK-NEXT:    [[TMP2436:%.*]] = icmp ugt i32 [[TMP2435]], [[TMP2434]]
17722 // CHECK-NEXT:    [[TMP2437:%.*]] = select i1 [[TMP2436]], i32 [[TMP2434]], i32 [[TMP2435]]
17723 // CHECK-NEXT:    store i32 [[TMP2437]], i32* [[UIV]], align 4
17724 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17725 // CHECK-NEXT:    [[TMP2438:%.*]] = load i32, i32* [[UIE]], align 4
17726 // CHECK-NEXT:    [[TMP2439:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2438]] acq_rel, align 4
17727 // CHECK-NEXT:    [[TMP2440:%.*]] = icmp ult i32 [[TMP2439]], [[TMP2438]]
17728 // CHECK-NEXT:    [[TMP2441:%.*]] = select i1 [[TMP2440]], i32 [[TMP2438]], i32 [[TMP2439]]
17729 // CHECK-NEXT:    store i32 [[TMP2441]], i32* [[UIV]], align 4
17730 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17731 // CHECK-NEXT:    [[TMP2442:%.*]] = load i32, i32* [[UIE]], align 4
17732 // CHECK-NEXT:    [[TMP2443:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2442]] acq_rel, align 4
17733 // CHECK-NEXT:    [[TMP2444:%.*]] = icmp ult i32 [[TMP2443]], [[TMP2442]]
17734 // CHECK-NEXT:    [[TMP2445:%.*]] = select i1 [[TMP2444]], i32 [[TMP2442]], i32 [[TMP2443]]
17735 // CHECK-NEXT:    store i32 [[TMP2445]], i32* [[UIV]], align 4
17736 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17737 // CHECK-NEXT:    [[TMP2446:%.*]] = load i32, i32* [[UIE]], align 4
17738 // CHECK-NEXT:    [[TMP2447:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2446]] acq_rel, align 4
17739 // CHECK-NEXT:    [[TMP2448:%.*]] = icmp ugt i32 [[TMP2447]], [[TMP2446]]
17740 // CHECK-NEXT:    [[TMP2449:%.*]] = select i1 [[TMP2448]], i32 [[TMP2446]], i32 [[TMP2447]]
17741 // CHECK-NEXT:    store i32 [[TMP2449]], i32* [[UIV]], align 4
17742 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17743 // CHECK-NEXT:    [[TMP2450:%.*]] = load i32, i32* [[UIE]], align 4
17744 // CHECK-NEXT:    [[TMP2451:%.*]] = load i32, i32* [[UID]], align 4
17745 // CHECK-NEXT:    [[TMP2452:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2450]], i32 [[TMP2451]] acq_rel acquire, align 4
17746 // CHECK-NEXT:    [[TMP2453:%.*]] = extractvalue { i32, i1 } [[TMP2452]], 0
17747 // CHECK-NEXT:    [[TMP2454:%.*]] = extractvalue { i32, i1 } [[TMP2452]], 1
17748 // CHECK-NEXT:    [[TMP2455:%.*]] = select i1 [[TMP2454]], i32 [[TMP2450]], i32 [[TMP2453]]
17749 // CHECK-NEXT:    store i32 [[TMP2455]], i32* [[UIV]], align 4
17750 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17751 // CHECK-NEXT:    [[TMP2456:%.*]] = load i32, i32* [[UIE]], align 4
17752 // CHECK-NEXT:    [[TMP2457:%.*]] = load i32, i32* [[UID]], align 4
17753 // CHECK-NEXT:    [[TMP2458:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2456]], i32 [[TMP2457]] acq_rel acquire, align 4
17754 // CHECK-NEXT:    [[TMP2459:%.*]] = extractvalue { i32, i1 } [[TMP2458]], 0
17755 // CHECK-NEXT:    [[TMP2460:%.*]] = extractvalue { i32, i1 } [[TMP2458]], 1
17756 // CHECK-NEXT:    [[TMP2461:%.*]] = select i1 [[TMP2460]], i32 [[TMP2456]], i32 [[TMP2459]]
17757 // CHECK-NEXT:    store i32 [[TMP2461]], i32* [[UIV]], align 4
17758 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17759 // CHECK-NEXT:    [[TMP2462:%.*]] = load i32, i32* [[UIE]], align 4
17760 // CHECK-NEXT:    [[TMP2463:%.*]] = load i32, i32* [[UID]], align 4
17761 // CHECK-NEXT:    [[TMP2464:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2462]], i32 [[TMP2463]] acq_rel acquire, align 4
17762 // CHECK-NEXT:    [[TMP2465:%.*]] = extractvalue { i32, i1 } [[TMP2464]], 0
17763 // CHECK-NEXT:    [[TMP2466:%.*]] = extractvalue { i32, i1 } [[TMP2464]], 1
17764 // CHECK-NEXT:    br i1 [[TMP2466]], label [[UIX_ATOMIC_EXIT237:%.*]], label [[UIX_ATOMIC_CONT238:%.*]]
17765 // CHECK:       uix.atomic.cont238:
17766 // CHECK-NEXT:    store i32 [[TMP2465]], i32* [[UIV]], align 4
17767 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT237]]
17768 // CHECK:       uix.atomic.exit237:
17769 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17770 // CHECK-NEXT:    [[TMP2467:%.*]] = load i32, i32* [[UIE]], align 4
17771 // CHECK-NEXT:    [[TMP2468:%.*]] = load i32, i32* [[UID]], align 4
17772 // CHECK-NEXT:    [[TMP2469:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2467]], i32 [[TMP2468]] acq_rel acquire, align 4
17773 // CHECK-NEXT:    [[TMP2470:%.*]] = extractvalue { i32, i1 } [[TMP2469]], 0
17774 // CHECK-NEXT:    [[TMP2471:%.*]] = extractvalue { i32, i1 } [[TMP2469]], 1
17775 // CHECK-NEXT:    br i1 [[TMP2471]], label [[UIX_ATOMIC_EXIT239:%.*]], label [[UIX_ATOMIC_CONT240:%.*]]
17776 // CHECK:       uix.atomic.cont240:
17777 // CHECK-NEXT:    store i32 [[TMP2470]], i32* [[UIV]], align 4
17778 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT239]]
17779 // CHECK:       uix.atomic.exit239:
17780 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17781 // CHECK-NEXT:    [[TMP2472:%.*]] = load i32, i32* [[UIE]], align 4
17782 // CHECK-NEXT:    [[TMP2473:%.*]] = load i32, i32* [[UID]], align 4
17783 // CHECK-NEXT:    [[TMP2474:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2472]], i32 [[TMP2473]] acq_rel acquire, align 4
17784 // CHECK-NEXT:    [[TMP2475:%.*]] = extractvalue { i32, i1 } [[TMP2474]], 1
17785 // CHECK-NEXT:    [[TMP2476:%.*]] = zext i1 [[TMP2475]] to i32
17786 // CHECK-NEXT:    store i32 [[TMP2476]], i32* [[UIR]], align 4
17787 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17788 // CHECK-NEXT:    [[TMP2477:%.*]] = load i32, i32* [[UIE]], align 4
17789 // CHECK-NEXT:    [[TMP2478:%.*]] = load i32, i32* [[UID]], align 4
17790 // CHECK-NEXT:    [[TMP2479:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2477]], i32 [[TMP2478]] acq_rel acquire, align 4
17791 // CHECK-NEXT:    [[TMP2480:%.*]] = extractvalue { i32, i1 } [[TMP2479]], 1
17792 // CHECK-NEXT:    [[TMP2481:%.*]] = zext i1 [[TMP2480]] to i32
17793 // CHECK-NEXT:    store i32 [[TMP2481]], i32* [[UIR]], align 4
17794 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17795 // CHECK-NEXT:    [[TMP2482:%.*]] = load i32, i32* [[UIE]], align 4
17796 // CHECK-NEXT:    [[TMP2483:%.*]] = load i32, i32* [[UID]], align 4
17797 // CHECK-NEXT:    [[TMP2484:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2482]], i32 [[TMP2483]] acq_rel acquire, align 4
17798 // CHECK-NEXT:    [[TMP2485:%.*]] = extractvalue { i32, i1 } [[TMP2484]], 0
17799 // CHECK-NEXT:    [[TMP2486:%.*]] = extractvalue { i32, i1 } [[TMP2484]], 1
17800 // CHECK-NEXT:    br i1 [[TMP2486]], label [[UIX_ATOMIC_EXIT241:%.*]], label [[UIX_ATOMIC_CONT242:%.*]]
17801 // CHECK:       uix.atomic.cont242:
17802 // CHECK-NEXT:    store i32 [[TMP2485]], i32* [[UIV]], align 4
17803 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT241]]
17804 // CHECK:       uix.atomic.exit241:
17805 // CHECK-NEXT:    [[TMP2487:%.*]] = extractvalue { i32, i1 } [[TMP2484]], 1
17806 // CHECK-NEXT:    [[TMP2488:%.*]] = zext i1 [[TMP2487]] to i32
17807 // CHECK-NEXT:    store i32 [[TMP2488]], i32* [[UIR]], align 4
17808 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17809 // CHECK-NEXT:    [[TMP2489:%.*]] = load i32, i32* [[UIE]], align 4
17810 // CHECK-NEXT:    [[TMP2490:%.*]] = load i32, i32* [[UID]], align 4
17811 // CHECK-NEXT:    [[TMP2491:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2489]], i32 [[TMP2490]] acq_rel acquire, align 4
17812 // CHECK-NEXT:    [[TMP2492:%.*]] = extractvalue { i32, i1 } [[TMP2491]], 0
17813 // CHECK-NEXT:    [[TMP2493:%.*]] = extractvalue { i32, i1 } [[TMP2491]], 1
17814 // CHECK-NEXT:    br i1 [[TMP2493]], label [[UIX_ATOMIC_EXIT243:%.*]], label [[UIX_ATOMIC_CONT244:%.*]]
17815 // CHECK:       uix.atomic.cont244:
17816 // CHECK-NEXT:    store i32 [[TMP2492]], i32* [[UIV]], align 4
17817 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT243]]
17818 // CHECK:       uix.atomic.exit243:
17819 // CHECK-NEXT:    [[TMP2494:%.*]] = extractvalue { i32, i1 } [[TMP2491]], 1
17820 // CHECK-NEXT:    [[TMP2495:%.*]] = zext i1 [[TMP2494]] to i32
17821 // CHECK-NEXT:    store i32 [[TMP2495]], i32* [[UIR]], align 4
17822 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
17823 // CHECK-NEXT:    [[TMP2496:%.*]] = load i32, i32* [[UIE]], align 4
17824 // CHECK-NEXT:    [[TMP2497:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2496]] acquire, align 4
17825 // CHECK-NEXT:    store i32 [[TMP2497]], i32* [[UIV]], align 4
17826 // CHECK-NEXT:    [[TMP2498:%.*]] = load i32, i32* [[UIE]], align 4
17827 // CHECK-NEXT:    [[TMP2499:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2498]] acquire, align 4
17828 // CHECK-NEXT:    store i32 [[TMP2499]], i32* [[UIV]], align 4
17829 // CHECK-NEXT:    [[TMP2500:%.*]] = load i32, i32* [[UIE]], align 4
17830 // CHECK-NEXT:    [[TMP2501:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2500]] acquire, align 4
17831 // CHECK-NEXT:    store i32 [[TMP2501]], i32* [[UIV]], align 4
17832 // CHECK-NEXT:    [[TMP2502:%.*]] = load i32, i32* [[UIE]], align 4
17833 // CHECK-NEXT:    [[TMP2503:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2502]] acquire, align 4
17834 // CHECK-NEXT:    store i32 [[TMP2503]], i32* [[UIV]], align 4
17835 // CHECK-NEXT:    [[TMP2504:%.*]] = load i32, i32* [[UIE]], align 4
17836 // CHECK-NEXT:    [[TMP2505:%.*]] = load i32, i32* [[UID]], align 4
17837 // CHECK-NEXT:    [[TMP2506:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2504]], i32 [[TMP2505]] acquire acquire, align 4
17838 // CHECK-NEXT:    [[TMP2507:%.*]] = extractvalue { i32, i1 } [[TMP2506]], 0
17839 // CHECK-NEXT:    store i32 [[TMP2507]], i32* [[UIV]], align 4
17840 // CHECK-NEXT:    [[TMP2508:%.*]] = load i32, i32* [[UIE]], align 4
17841 // CHECK-NEXT:    [[TMP2509:%.*]] = load i32, i32* [[UID]], align 4
17842 // CHECK-NEXT:    [[TMP2510:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2508]], i32 [[TMP2509]] acquire acquire, align 4
17843 // CHECK-NEXT:    [[TMP2511:%.*]] = extractvalue { i32, i1 } [[TMP2510]], 0
17844 // CHECK-NEXT:    store i32 [[TMP2511]], i32* [[UIV]], align 4
17845 // CHECK-NEXT:    [[TMP2512:%.*]] = load i32, i32* [[UIE]], align 4
17846 // CHECK-NEXT:    [[TMP2513:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2512]] acquire, align 4
17847 // CHECK-NEXT:    [[TMP2514:%.*]] = icmp ugt i32 [[TMP2513]], [[TMP2512]]
17848 // CHECK-NEXT:    [[TMP2515:%.*]] = select i1 [[TMP2514]], i32 [[TMP2512]], i32 [[TMP2513]]
17849 // CHECK-NEXT:    store i32 [[TMP2515]], i32* [[UIV]], align 4
17850 // CHECK-NEXT:    [[TMP2516:%.*]] = load i32, i32* [[UIE]], align 4
17851 // CHECK-NEXT:    [[TMP2517:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2516]] acquire, align 4
17852 // CHECK-NEXT:    [[TMP2518:%.*]] = icmp ult i32 [[TMP2517]], [[TMP2516]]
17853 // CHECK-NEXT:    [[TMP2519:%.*]] = select i1 [[TMP2518]], i32 [[TMP2516]], i32 [[TMP2517]]
17854 // CHECK-NEXT:    store i32 [[TMP2519]], i32* [[UIV]], align 4
17855 // CHECK-NEXT:    [[TMP2520:%.*]] = load i32, i32* [[UIE]], align 4
17856 // CHECK-NEXT:    [[TMP2521:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2520]] acquire, align 4
17857 // CHECK-NEXT:    [[TMP2522:%.*]] = icmp ult i32 [[TMP2521]], [[TMP2520]]
17858 // CHECK-NEXT:    [[TMP2523:%.*]] = select i1 [[TMP2522]], i32 [[TMP2520]], i32 [[TMP2521]]
17859 // CHECK-NEXT:    store i32 [[TMP2523]], i32* [[UIV]], align 4
17860 // CHECK-NEXT:    [[TMP2524:%.*]] = load i32, i32* [[UIE]], align 4
17861 // CHECK-NEXT:    [[TMP2525:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2524]] acquire, align 4
17862 // CHECK-NEXT:    [[TMP2526:%.*]] = icmp ugt i32 [[TMP2525]], [[TMP2524]]
17863 // CHECK-NEXT:    [[TMP2527:%.*]] = select i1 [[TMP2526]], i32 [[TMP2524]], i32 [[TMP2525]]
17864 // CHECK-NEXT:    store i32 [[TMP2527]], i32* [[UIV]], align 4
17865 // CHECK-NEXT:    [[TMP2528:%.*]] = load i32, i32* [[UIE]], align 4
17866 // CHECK-NEXT:    [[TMP2529:%.*]] = load i32, i32* [[UID]], align 4
17867 // CHECK-NEXT:    [[TMP2530:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2528]], i32 [[TMP2529]] acquire acquire, align 4
17868 // CHECK-NEXT:    [[TMP2531:%.*]] = extractvalue { i32, i1 } [[TMP2530]], 0
17869 // CHECK-NEXT:    [[TMP2532:%.*]] = extractvalue { i32, i1 } [[TMP2530]], 1
17870 // CHECK-NEXT:    [[TMP2533:%.*]] = select i1 [[TMP2532]], i32 [[TMP2528]], i32 [[TMP2531]]
17871 // CHECK-NEXT:    store i32 [[TMP2533]], i32* [[UIV]], align 4
17872 // CHECK-NEXT:    [[TMP2534:%.*]] = load i32, i32* [[UIE]], align 4
17873 // CHECK-NEXT:    [[TMP2535:%.*]] = load i32, i32* [[UID]], align 4
17874 // CHECK-NEXT:    [[TMP2536:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2534]], i32 [[TMP2535]] acquire acquire, align 4
17875 // CHECK-NEXT:    [[TMP2537:%.*]] = extractvalue { i32, i1 } [[TMP2536]], 0
17876 // CHECK-NEXT:    [[TMP2538:%.*]] = extractvalue { i32, i1 } [[TMP2536]], 1
17877 // CHECK-NEXT:    [[TMP2539:%.*]] = select i1 [[TMP2538]], i32 [[TMP2534]], i32 [[TMP2537]]
17878 // CHECK-NEXT:    store i32 [[TMP2539]], i32* [[UIV]], align 4
17879 // CHECK-NEXT:    [[TMP2540:%.*]] = load i32, i32* [[UIE]], align 4
17880 // CHECK-NEXT:    [[TMP2541:%.*]] = load i32, i32* [[UID]], align 4
17881 // CHECK-NEXT:    [[TMP2542:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2540]], i32 [[TMP2541]] acquire acquire, align 4
17882 // CHECK-NEXT:    [[TMP2543:%.*]] = extractvalue { i32, i1 } [[TMP2542]], 0
17883 // CHECK-NEXT:    [[TMP2544:%.*]] = extractvalue { i32, i1 } [[TMP2542]], 1
17884 // CHECK-NEXT:    br i1 [[TMP2544]], label [[UIX_ATOMIC_EXIT245:%.*]], label [[UIX_ATOMIC_CONT246:%.*]]
17885 // CHECK:       uix.atomic.cont246:
17886 // CHECK-NEXT:    store i32 [[TMP2543]], i32* [[UIV]], align 4
17887 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT245]]
17888 // CHECK:       uix.atomic.exit245:
17889 // CHECK-NEXT:    [[TMP2545:%.*]] = load i32, i32* [[UIE]], align 4
17890 // CHECK-NEXT:    [[TMP2546:%.*]] = load i32, i32* [[UID]], align 4
17891 // CHECK-NEXT:    [[TMP2547:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2545]], i32 [[TMP2546]] acquire acquire, align 4
17892 // CHECK-NEXT:    [[TMP2548:%.*]] = extractvalue { i32, i1 } [[TMP2547]], 0
17893 // CHECK-NEXT:    [[TMP2549:%.*]] = extractvalue { i32, i1 } [[TMP2547]], 1
17894 // CHECK-NEXT:    br i1 [[TMP2549]], label [[UIX_ATOMIC_EXIT247:%.*]], label [[UIX_ATOMIC_CONT248:%.*]]
17895 // CHECK:       uix.atomic.cont248:
17896 // CHECK-NEXT:    store i32 [[TMP2548]], i32* [[UIV]], align 4
17897 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT247]]
17898 // CHECK:       uix.atomic.exit247:
17899 // CHECK-NEXT:    [[TMP2550:%.*]] = load i32, i32* [[UIE]], align 4
17900 // CHECK-NEXT:    [[TMP2551:%.*]] = load i32, i32* [[UID]], align 4
17901 // CHECK-NEXT:    [[TMP2552:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2550]], i32 [[TMP2551]] acquire acquire, align 4
17902 // CHECK-NEXT:    [[TMP2553:%.*]] = extractvalue { i32, i1 } [[TMP2552]], 1
17903 // CHECK-NEXT:    [[TMP2554:%.*]] = zext i1 [[TMP2553]] to i32
17904 // CHECK-NEXT:    store i32 [[TMP2554]], i32* [[UIR]], align 4
17905 // CHECK-NEXT:    [[TMP2555:%.*]] = load i32, i32* [[UIE]], align 4
17906 // CHECK-NEXT:    [[TMP2556:%.*]] = load i32, i32* [[UID]], align 4
17907 // CHECK-NEXT:    [[TMP2557:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2555]], i32 [[TMP2556]] acquire acquire, align 4
17908 // CHECK-NEXT:    [[TMP2558:%.*]] = extractvalue { i32, i1 } [[TMP2557]], 1
17909 // CHECK-NEXT:    [[TMP2559:%.*]] = zext i1 [[TMP2558]] to i32
17910 // CHECK-NEXT:    store i32 [[TMP2559]], i32* [[UIR]], align 4
17911 // CHECK-NEXT:    [[TMP2560:%.*]] = load i32, i32* [[UIE]], align 4
17912 // CHECK-NEXT:    [[TMP2561:%.*]] = load i32, i32* [[UID]], align 4
17913 // CHECK-NEXT:    [[TMP2562:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2560]], i32 [[TMP2561]] acquire acquire, align 4
17914 // CHECK-NEXT:    [[TMP2563:%.*]] = extractvalue { i32, i1 } [[TMP2562]], 0
17915 // CHECK-NEXT:    [[TMP2564:%.*]] = extractvalue { i32, i1 } [[TMP2562]], 1
17916 // CHECK-NEXT:    br i1 [[TMP2564]], label [[UIX_ATOMIC_EXIT249:%.*]], label [[UIX_ATOMIC_CONT250:%.*]]
17917 // CHECK:       uix.atomic.cont250:
17918 // CHECK-NEXT:    store i32 [[TMP2563]], i32* [[UIV]], align 4
17919 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT249]]
17920 // CHECK:       uix.atomic.exit249:
17921 // CHECK-NEXT:    [[TMP2565:%.*]] = extractvalue { i32, i1 } [[TMP2562]], 1
17922 // CHECK-NEXT:    [[TMP2566:%.*]] = zext i1 [[TMP2565]] to i32
17923 // CHECK-NEXT:    store i32 [[TMP2566]], i32* [[UIR]], align 4
17924 // CHECK-NEXT:    [[TMP2567:%.*]] = load i32, i32* [[UIE]], align 4
17925 // CHECK-NEXT:    [[TMP2568:%.*]] = load i32, i32* [[UID]], align 4
17926 // CHECK-NEXT:    [[TMP2569:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2567]], i32 [[TMP2568]] acquire acquire, align 4
17927 // CHECK-NEXT:    [[TMP2570:%.*]] = extractvalue { i32, i1 } [[TMP2569]], 0
17928 // CHECK-NEXT:    [[TMP2571:%.*]] = extractvalue { i32, i1 } [[TMP2569]], 1
17929 // CHECK-NEXT:    br i1 [[TMP2571]], label [[UIX_ATOMIC_EXIT251:%.*]], label [[UIX_ATOMIC_CONT252:%.*]]
17930 // CHECK:       uix.atomic.cont252:
17931 // CHECK-NEXT:    store i32 [[TMP2570]], i32* [[UIV]], align 4
17932 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT251]]
17933 // CHECK:       uix.atomic.exit251:
17934 // CHECK-NEXT:    [[TMP2572:%.*]] = extractvalue { i32, i1 } [[TMP2569]], 1
17935 // CHECK-NEXT:    [[TMP2573:%.*]] = zext i1 [[TMP2572]] to i32
17936 // CHECK-NEXT:    store i32 [[TMP2573]], i32* [[UIR]], align 4
17937 // CHECK-NEXT:    [[TMP2574:%.*]] = load i32, i32* [[UIE]], align 4
17938 // CHECK-NEXT:    [[TMP2575:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2574]] monotonic, align 4
17939 // CHECK-NEXT:    store i32 [[TMP2575]], i32* [[UIV]], align 4
17940 // CHECK-NEXT:    [[TMP2576:%.*]] = load i32, i32* [[UIE]], align 4
17941 // CHECK-NEXT:    [[TMP2577:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2576]] monotonic, align 4
17942 // CHECK-NEXT:    store i32 [[TMP2577]], i32* [[UIV]], align 4
17943 // CHECK-NEXT:    [[TMP2578:%.*]] = load i32, i32* [[UIE]], align 4
17944 // CHECK-NEXT:    [[TMP2579:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2578]] monotonic, align 4
17945 // CHECK-NEXT:    store i32 [[TMP2579]], i32* [[UIV]], align 4
17946 // CHECK-NEXT:    [[TMP2580:%.*]] = load i32, i32* [[UIE]], align 4
17947 // CHECK-NEXT:    [[TMP2581:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2580]] monotonic, align 4
17948 // CHECK-NEXT:    store i32 [[TMP2581]], i32* [[UIV]], align 4
17949 // CHECK-NEXT:    [[TMP2582:%.*]] = load i32, i32* [[UIE]], align 4
17950 // CHECK-NEXT:    [[TMP2583:%.*]] = load i32, i32* [[UID]], align 4
17951 // CHECK-NEXT:    [[TMP2584:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2582]], i32 [[TMP2583]] monotonic monotonic, align 4
17952 // CHECK-NEXT:    [[TMP2585:%.*]] = extractvalue { i32, i1 } [[TMP2584]], 0
17953 // CHECK-NEXT:    store i32 [[TMP2585]], i32* [[UIV]], align 4
17954 // CHECK-NEXT:    [[TMP2586:%.*]] = load i32, i32* [[UIE]], align 4
17955 // CHECK-NEXT:    [[TMP2587:%.*]] = load i32, i32* [[UID]], align 4
17956 // CHECK-NEXT:    [[TMP2588:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2586]], i32 [[TMP2587]] monotonic monotonic, align 4
17957 // CHECK-NEXT:    [[TMP2589:%.*]] = extractvalue { i32, i1 } [[TMP2588]], 0
17958 // CHECK-NEXT:    store i32 [[TMP2589]], i32* [[UIV]], align 4
17959 // CHECK-NEXT:    [[TMP2590:%.*]] = load i32, i32* [[UIE]], align 4
17960 // CHECK-NEXT:    [[TMP2591:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2590]] monotonic, align 4
17961 // CHECK-NEXT:    [[TMP2592:%.*]] = icmp ugt i32 [[TMP2591]], [[TMP2590]]
17962 // CHECK-NEXT:    [[TMP2593:%.*]] = select i1 [[TMP2592]], i32 [[TMP2590]], i32 [[TMP2591]]
17963 // CHECK-NEXT:    store i32 [[TMP2593]], i32* [[UIV]], align 4
17964 // CHECK-NEXT:    [[TMP2594:%.*]] = load i32, i32* [[UIE]], align 4
17965 // CHECK-NEXT:    [[TMP2595:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2594]] monotonic, align 4
17966 // CHECK-NEXT:    [[TMP2596:%.*]] = icmp ult i32 [[TMP2595]], [[TMP2594]]
17967 // CHECK-NEXT:    [[TMP2597:%.*]] = select i1 [[TMP2596]], i32 [[TMP2594]], i32 [[TMP2595]]
17968 // CHECK-NEXT:    store i32 [[TMP2597]], i32* [[UIV]], align 4
17969 // CHECK-NEXT:    [[TMP2598:%.*]] = load i32, i32* [[UIE]], align 4
17970 // CHECK-NEXT:    [[TMP2599:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2598]] monotonic, align 4
17971 // CHECK-NEXT:    [[TMP2600:%.*]] = icmp ult i32 [[TMP2599]], [[TMP2598]]
17972 // CHECK-NEXT:    [[TMP2601:%.*]] = select i1 [[TMP2600]], i32 [[TMP2598]], i32 [[TMP2599]]
17973 // CHECK-NEXT:    store i32 [[TMP2601]], i32* [[UIV]], align 4
17974 // CHECK-NEXT:    [[TMP2602:%.*]] = load i32, i32* [[UIE]], align 4
17975 // CHECK-NEXT:    [[TMP2603:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2602]] monotonic, align 4
17976 // CHECK-NEXT:    [[TMP2604:%.*]] = icmp ugt i32 [[TMP2603]], [[TMP2602]]
17977 // CHECK-NEXT:    [[TMP2605:%.*]] = select i1 [[TMP2604]], i32 [[TMP2602]], i32 [[TMP2603]]
17978 // CHECK-NEXT:    store i32 [[TMP2605]], i32* [[UIV]], align 4
17979 // CHECK-NEXT:    [[TMP2606:%.*]] = load i32, i32* [[UIE]], align 4
17980 // CHECK-NEXT:    [[TMP2607:%.*]] = load i32, i32* [[UID]], align 4
17981 // CHECK-NEXT:    [[TMP2608:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2606]], i32 [[TMP2607]] monotonic monotonic, align 4
17982 // CHECK-NEXT:    [[TMP2609:%.*]] = extractvalue { i32, i1 } [[TMP2608]], 0
17983 // CHECK-NEXT:    [[TMP2610:%.*]] = extractvalue { i32, i1 } [[TMP2608]], 1
17984 // CHECK-NEXT:    [[TMP2611:%.*]] = select i1 [[TMP2610]], i32 [[TMP2606]], i32 [[TMP2609]]
17985 // CHECK-NEXT:    store i32 [[TMP2611]], i32* [[UIV]], align 4
17986 // CHECK-NEXT:    [[TMP2612:%.*]] = load i32, i32* [[UIE]], align 4
17987 // CHECK-NEXT:    [[TMP2613:%.*]] = load i32, i32* [[UID]], align 4
17988 // CHECK-NEXT:    [[TMP2614:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2612]], i32 [[TMP2613]] monotonic monotonic, align 4
17989 // CHECK-NEXT:    [[TMP2615:%.*]] = extractvalue { i32, i1 } [[TMP2614]], 0
17990 // CHECK-NEXT:    [[TMP2616:%.*]] = extractvalue { i32, i1 } [[TMP2614]], 1
17991 // CHECK-NEXT:    [[TMP2617:%.*]] = select i1 [[TMP2616]], i32 [[TMP2612]], i32 [[TMP2615]]
17992 // CHECK-NEXT:    store i32 [[TMP2617]], i32* [[UIV]], align 4
17993 // CHECK-NEXT:    [[TMP2618:%.*]] = load i32, i32* [[UIE]], align 4
17994 // CHECK-NEXT:    [[TMP2619:%.*]] = load i32, i32* [[UID]], align 4
17995 // CHECK-NEXT:    [[TMP2620:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2618]], i32 [[TMP2619]] monotonic monotonic, align 4
17996 // CHECK-NEXT:    [[TMP2621:%.*]] = extractvalue { i32, i1 } [[TMP2620]], 0
17997 // CHECK-NEXT:    [[TMP2622:%.*]] = extractvalue { i32, i1 } [[TMP2620]], 1
17998 // CHECK-NEXT:    br i1 [[TMP2622]], label [[UIX_ATOMIC_EXIT253:%.*]], label [[UIX_ATOMIC_CONT254:%.*]]
17999 // CHECK:       uix.atomic.cont254:
18000 // CHECK-NEXT:    store i32 [[TMP2621]], i32* [[UIV]], align 4
18001 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT253]]
18002 // CHECK:       uix.atomic.exit253:
18003 // CHECK-NEXT:    [[TMP2623:%.*]] = load i32, i32* [[UIE]], align 4
18004 // CHECK-NEXT:    [[TMP2624:%.*]] = load i32, i32* [[UID]], align 4
18005 // CHECK-NEXT:    [[TMP2625:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2623]], i32 [[TMP2624]] monotonic monotonic, align 4
18006 // CHECK-NEXT:    [[TMP2626:%.*]] = extractvalue { i32, i1 } [[TMP2625]], 0
18007 // CHECK-NEXT:    [[TMP2627:%.*]] = extractvalue { i32, i1 } [[TMP2625]], 1
18008 // CHECK-NEXT:    br i1 [[TMP2627]], label [[UIX_ATOMIC_EXIT255:%.*]], label [[UIX_ATOMIC_CONT256:%.*]]
18009 // CHECK:       uix.atomic.cont256:
18010 // CHECK-NEXT:    store i32 [[TMP2626]], i32* [[UIV]], align 4
18011 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT255]]
18012 // CHECK:       uix.atomic.exit255:
18013 // CHECK-NEXT:    [[TMP2628:%.*]] = load i32, i32* [[UIE]], align 4
18014 // CHECK-NEXT:    [[TMP2629:%.*]] = load i32, i32* [[UID]], align 4
18015 // CHECK-NEXT:    [[TMP2630:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2628]], i32 [[TMP2629]] monotonic monotonic, align 4
18016 // CHECK-NEXT:    [[TMP2631:%.*]] = extractvalue { i32, i1 } [[TMP2630]], 1
18017 // CHECK-NEXT:    [[TMP2632:%.*]] = zext i1 [[TMP2631]] to i32
18018 // CHECK-NEXT:    store i32 [[TMP2632]], i32* [[UIR]], align 4
18019 // CHECK-NEXT:    [[TMP2633:%.*]] = load i32, i32* [[UIE]], align 4
18020 // CHECK-NEXT:    [[TMP2634:%.*]] = load i32, i32* [[UID]], align 4
18021 // CHECK-NEXT:    [[TMP2635:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2633]], i32 [[TMP2634]] monotonic monotonic, align 4
18022 // CHECK-NEXT:    [[TMP2636:%.*]] = extractvalue { i32, i1 } [[TMP2635]], 1
18023 // CHECK-NEXT:    [[TMP2637:%.*]] = zext i1 [[TMP2636]] to i32
18024 // CHECK-NEXT:    store i32 [[TMP2637]], i32* [[UIR]], align 4
18025 // CHECK-NEXT:    [[TMP2638:%.*]] = load i32, i32* [[UIE]], align 4
18026 // CHECK-NEXT:    [[TMP2639:%.*]] = load i32, i32* [[UID]], align 4
18027 // CHECK-NEXT:    [[TMP2640:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2638]], i32 [[TMP2639]] monotonic monotonic, align 4
18028 // CHECK-NEXT:    [[TMP2641:%.*]] = extractvalue { i32, i1 } [[TMP2640]], 0
18029 // CHECK-NEXT:    [[TMP2642:%.*]] = extractvalue { i32, i1 } [[TMP2640]], 1
18030 // CHECK-NEXT:    br i1 [[TMP2642]], label [[UIX_ATOMIC_EXIT257:%.*]], label [[UIX_ATOMIC_CONT258:%.*]]
18031 // CHECK:       uix.atomic.cont258:
18032 // CHECK-NEXT:    store i32 [[TMP2641]], i32* [[UIV]], align 4
18033 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT257]]
18034 // CHECK:       uix.atomic.exit257:
18035 // CHECK-NEXT:    [[TMP2643:%.*]] = extractvalue { i32, i1 } [[TMP2640]], 1
18036 // CHECK-NEXT:    [[TMP2644:%.*]] = zext i1 [[TMP2643]] to i32
18037 // CHECK-NEXT:    store i32 [[TMP2644]], i32* [[UIR]], align 4
18038 // CHECK-NEXT:    [[TMP2645:%.*]] = load i32, i32* [[UIE]], align 4
18039 // CHECK-NEXT:    [[TMP2646:%.*]] = load i32, i32* [[UID]], align 4
18040 // CHECK-NEXT:    [[TMP2647:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2645]], i32 [[TMP2646]] monotonic monotonic, align 4
18041 // CHECK-NEXT:    [[TMP2648:%.*]] = extractvalue { i32, i1 } [[TMP2647]], 0
18042 // CHECK-NEXT:    [[TMP2649:%.*]] = extractvalue { i32, i1 } [[TMP2647]], 1
18043 // CHECK-NEXT:    br i1 [[TMP2649]], label [[UIX_ATOMIC_EXIT259:%.*]], label [[UIX_ATOMIC_CONT260:%.*]]
18044 // CHECK:       uix.atomic.cont260:
18045 // CHECK-NEXT:    store i32 [[TMP2648]], i32* [[UIV]], align 4
18046 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT259]]
18047 // CHECK:       uix.atomic.exit259:
18048 // CHECK-NEXT:    [[TMP2650:%.*]] = extractvalue { i32, i1 } [[TMP2647]], 1
18049 // CHECK-NEXT:    [[TMP2651:%.*]] = zext i1 [[TMP2650]] to i32
18050 // CHECK-NEXT:    store i32 [[TMP2651]], i32* [[UIR]], align 4
18051 // CHECK-NEXT:    [[TMP2652:%.*]] = load i32, i32* [[UIE]], align 4
18052 // CHECK-NEXT:    [[TMP2653:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2652]] release, align 4
18053 // CHECK-NEXT:    store i32 [[TMP2653]], i32* [[UIV]], align 4
18054 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18055 // CHECK-NEXT:    [[TMP2654:%.*]] = load i32, i32* [[UIE]], align 4
18056 // CHECK-NEXT:    [[TMP2655:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2654]] release, align 4
18057 // CHECK-NEXT:    store i32 [[TMP2655]], i32* [[UIV]], align 4
18058 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18059 // CHECK-NEXT:    [[TMP2656:%.*]] = load i32, i32* [[UIE]], align 4
18060 // CHECK-NEXT:    [[TMP2657:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2656]] release, align 4
18061 // CHECK-NEXT:    store i32 [[TMP2657]], i32* [[UIV]], align 4
18062 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18063 // CHECK-NEXT:    [[TMP2658:%.*]] = load i32, i32* [[UIE]], align 4
18064 // CHECK-NEXT:    [[TMP2659:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2658]] release, align 4
18065 // CHECK-NEXT:    store i32 [[TMP2659]], i32* [[UIV]], align 4
18066 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18067 // CHECK-NEXT:    [[TMP2660:%.*]] = load i32, i32* [[UIE]], align 4
18068 // CHECK-NEXT:    [[TMP2661:%.*]] = load i32, i32* [[UID]], align 4
18069 // CHECK-NEXT:    [[TMP2662:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2660]], i32 [[TMP2661]] release monotonic, align 4
18070 // CHECK-NEXT:    [[TMP2663:%.*]] = extractvalue { i32, i1 } [[TMP2662]], 0
18071 // CHECK-NEXT:    store i32 [[TMP2663]], i32* [[UIV]], align 4
18072 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18073 // CHECK-NEXT:    [[TMP2664:%.*]] = load i32, i32* [[UIE]], align 4
18074 // CHECK-NEXT:    [[TMP2665:%.*]] = load i32, i32* [[UID]], align 4
18075 // CHECK-NEXT:    [[TMP2666:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2664]], i32 [[TMP2665]] release monotonic, align 4
18076 // CHECK-NEXT:    [[TMP2667:%.*]] = extractvalue { i32, i1 } [[TMP2666]], 0
18077 // CHECK-NEXT:    store i32 [[TMP2667]], i32* [[UIV]], align 4
18078 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18079 // CHECK-NEXT:    [[TMP2668:%.*]] = load i32, i32* [[UIE]], align 4
18080 // CHECK-NEXT:    [[TMP2669:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2668]] release, align 4
18081 // CHECK-NEXT:    [[TMP2670:%.*]] = icmp ugt i32 [[TMP2669]], [[TMP2668]]
18082 // CHECK-NEXT:    [[TMP2671:%.*]] = select i1 [[TMP2670]], i32 [[TMP2668]], i32 [[TMP2669]]
18083 // CHECK-NEXT:    store i32 [[TMP2671]], i32* [[UIV]], align 4
18084 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18085 // CHECK-NEXT:    [[TMP2672:%.*]] = load i32, i32* [[UIE]], align 4
18086 // CHECK-NEXT:    [[TMP2673:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2672]] release, align 4
18087 // CHECK-NEXT:    [[TMP2674:%.*]] = icmp ult i32 [[TMP2673]], [[TMP2672]]
18088 // CHECK-NEXT:    [[TMP2675:%.*]] = select i1 [[TMP2674]], i32 [[TMP2672]], i32 [[TMP2673]]
18089 // CHECK-NEXT:    store i32 [[TMP2675]], i32* [[UIV]], align 4
18090 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18091 // CHECK-NEXT:    [[TMP2676:%.*]] = load i32, i32* [[UIE]], align 4
18092 // CHECK-NEXT:    [[TMP2677:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2676]] release, align 4
18093 // CHECK-NEXT:    [[TMP2678:%.*]] = icmp ult i32 [[TMP2677]], [[TMP2676]]
18094 // CHECK-NEXT:    [[TMP2679:%.*]] = select i1 [[TMP2678]], i32 [[TMP2676]], i32 [[TMP2677]]
18095 // CHECK-NEXT:    store i32 [[TMP2679]], i32* [[UIV]], align 4
18096 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18097 // CHECK-NEXT:    [[TMP2680:%.*]] = load i32, i32* [[UIE]], align 4
18098 // CHECK-NEXT:    [[TMP2681:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2680]] release, align 4
18099 // CHECK-NEXT:    [[TMP2682:%.*]] = icmp ugt i32 [[TMP2681]], [[TMP2680]]
18100 // CHECK-NEXT:    [[TMP2683:%.*]] = select i1 [[TMP2682]], i32 [[TMP2680]], i32 [[TMP2681]]
18101 // CHECK-NEXT:    store i32 [[TMP2683]], i32* [[UIV]], align 4
18102 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18103 // CHECK-NEXT:    [[TMP2684:%.*]] = load i32, i32* [[UIE]], align 4
18104 // CHECK-NEXT:    [[TMP2685:%.*]] = load i32, i32* [[UID]], align 4
18105 // CHECK-NEXT:    [[TMP2686:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2684]], i32 [[TMP2685]] release monotonic, align 4
18106 // CHECK-NEXT:    [[TMP2687:%.*]] = extractvalue { i32, i1 } [[TMP2686]], 0
18107 // CHECK-NEXT:    [[TMP2688:%.*]] = extractvalue { i32, i1 } [[TMP2686]], 1
18108 // CHECK-NEXT:    [[TMP2689:%.*]] = select i1 [[TMP2688]], i32 [[TMP2684]], i32 [[TMP2687]]
18109 // CHECK-NEXT:    store i32 [[TMP2689]], i32* [[UIV]], align 4
18110 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18111 // CHECK-NEXT:    [[TMP2690:%.*]] = load i32, i32* [[UIE]], align 4
18112 // CHECK-NEXT:    [[TMP2691:%.*]] = load i32, i32* [[UID]], align 4
18113 // CHECK-NEXT:    [[TMP2692:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2690]], i32 [[TMP2691]] release monotonic, align 4
18114 // CHECK-NEXT:    [[TMP2693:%.*]] = extractvalue { i32, i1 } [[TMP2692]], 0
18115 // CHECK-NEXT:    [[TMP2694:%.*]] = extractvalue { i32, i1 } [[TMP2692]], 1
18116 // CHECK-NEXT:    [[TMP2695:%.*]] = select i1 [[TMP2694]], i32 [[TMP2690]], i32 [[TMP2693]]
18117 // CHECK-NEXT:    store i32 [[TMP2695]], i32* [[UIV]], align 4
18118 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18119 // CHECK-NEXT:    [[TMP2696:%.*]] = load i32, i32* [[UIE]], align 4
18120 // CHECK-NEXT:    [[TMP2697:%.*]] = load i32, i32* [[UID]], align 4
18121 // CHECK-NEXT:    [[TMP2698:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2696]], i32 [[TMP2697]] release monotonic, align 4
18122 // CHECK-NEXT:    [[TMP2699:%.*]] = extractvalue { i32, i1 } [[TMP2698]], 0
18123 // CHECK-NEXT:    [[TMP2700:%.*]] = extractvalue { i32, i1 } [[TMP2698]], 1
18124 // CHECK-NEXT:    br i1 [[TMP2700]], label [[UIX_ATOMIC_EXIT261:%.*]], label [[UIX_ATOMIC_CONT262:%.*]]
18125 // CHECK:       uix.atomic.cont262:
18126 // CHECK-NEXT:    store i32 [[TMP2699]], i32* [[UIV]], align 4
18127 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT261]]
18128 // CHECK:       uix.atomic.exit261:
18129 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18130 // CHECK-NEXT:    [[TMP2701:%.*]] = load i32, i32* [[UIE]], align 4
18131 // CHECK-NEXT:    [[TMP2702:%.*]] = load i32, i32* [[UID]], align 4
18132 // CHECK-NEXT:    [[TMP2703:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2701]], i32 [[TMP2702]] release monotonic, align 4
18133 // CHECK-NEXT:    [[TMP2704:%.*]] = extractvalue { i32, i1 } [[TMP2703]], 0
18134 // CHECK-NEXT:    [[TMP2705:%.*]] = extractvalue { i32, i1 } [[TMP2703]], 1
18135 // CHECK-NEXT:    br i1 [[TMP2705]], label [[UIX_ATOMIC_EXIT263:%.*]], label [[UIX_ATOMIC_CONT264:%.*]]
18136 // CHECK:       uix.atomic.cont264:
18137 // CHECK-NEXT:    store i32 [[TMP2704]], i32* [[UIV]], align 4
18138 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT263]]
18139 // CHECK:       uix.atomic.exit263:
18140 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18141 // CHECK-NEXT:    [[TMP2706:%.*]] = load i32, i32* [[UIE]], align 4
18142 // CHECK-NEXT:    [[TMP2707:%.*]] = load i32, i32* [[UID]], align 4
18143 // CHECK-NEXT:    [[TMP2708:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2706]], i32 [[TMP2707]] release monotonic, align 4
18144 // CHECK-NEXT:    [[TMP2709:%.*]] = extractvalue { i32, i1 } [[TMP2708]], 1
18145 // CHECK-NEXT:    [[TMP2710:%.*]] = zext i1 [[TMP2709]] to i32
18146 // CHECK-NEXT:    store i32 [[TMP2710]], i32* [[UIR]], align 4
18147 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18148 // CHECK-NEXT:    [[TMP2711:%.*]] = load i32, i32* [[UIE]], align 4
18149 // CHECK-NEXT:    [[TMP2712:%.*]] = load i32, i32* [[UID]], align 4
18150 // CHECK-NEXT:    [[TMP2713:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2711]], i32 [[TMP2712]] release monotonic, align 4
18151 // CHECK-NEXT:    [[TMP2714:%.*]] = extractvalue { i32, i1 } [[TMP2713]], 1
18152 // CHECK-NEXT:    [[TMP2715:%.*]] = zext i1 [[TMP2714]] to i32
18153 // CHECK-NEXT:    store i32 [[TMP2715]], i32* [[UIR]], align 4
18154 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18155 // CHECK-NEXT:    [[TMP2716:%.*]] = load i32, i32* [[UIE]], align 4
18156 // CHECK-NEXT:    [[TMP2717:%.*]] = load i32, i32* [[UID]], align 4
18157 // CHECK-NEXT:    [[TMP2718:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2716]], i32 [[TMP2717]] release monotonic, align 4
18158 // CHECK-NEXT:    [[TMP2719:%.*]] = extractvalue { i32, i1 } [[TMP2718]], 0
18159 // CHECK-NEXT:    [[TMP2720:%.*]] = extractvalue { i32, i1 } [[TMP2718]], 1
18160 // CHECK-NEXT:    br i1 [[TMP2720]], label [[UIX_ATOMIC_EXIT265:%.*]], label [[UIX_ATOMIC_CONT266:%.*]]
18161 // CHECK:       uix.atomic.cont266:
18162 // CHECK-NEXT:    store i32 [[TMP2719]], i32* [[UIV]], align 4
18163 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT265]]
18164 // CHECK:       uix.atomic.exit265:
18165 // CHECK-NEXT:    [[TMP2721:%.*]] = extractvalue { i32, i1 } [[TMP2718]], 1
18166 // CHECK-NEXT:    [[TMP2722:%.*]] = zext i1 [[TMP2721]] to i32
18167 // CHECK-NEXT:    store i32 [[TMP2722]], i32* [[UIR]], align 4
18168 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18169 // CHECK-NEXT:    [[TMP2723:%.*]] = load i32, i32* [[UIE]], align 4
18170 // CHECK-NEXT:    [[TMP2724:%.*]] = load i32, i32* [[UID]], align 4
18171 // CHECK-NEXT:    [[TMP2725:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2723]], i32 [[TMP2724]] release monotonic, align 4
18172 // CHECK-NEXT:    [[TMP2726:%.*]] = extractvalue { i32, i1 } [[TMP2725]], 0
18173 // CHECK-NEXT:    [[TMP2727:%.*]] = extractvalue { i32, i1 } [[TMP2725]], 1
18174 // CHECK-NEXT:    br i1 [[TMP2727]], label [[UIX_ATOMIC_EXIT267:%.*]], label [[UIX_ATOMIC_CONT268:%.*]]
18175 // CHECK:       uix.atomic.cont268:
18176 // CHECK-NEXT:    store i32 [[TMP2726]], i32* [[UIV]], align 4
18177 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT267]]
18178 // CHECK:       uix.atomic.exit267:
18179 // CHECK-NEXT:    [[TMP2728:%.*]] = extractvalue { i32, i1 } [[TMP2725]], 1
18180 // CHECK-NEXT:    [[TMP2729:%.*]] = zext i1 [[TMP2728]] to i32
18181 // CHECK-NEXT:    store i32 [[TMP2729]], i32* [[UIR]], align 4
18182 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18183 // CHECK-NEXT:    [[TMP2730:%.*]] = load i32, i32* [[UIE]], align 4
18184 // CHECK-NEXT:    [[TMP2731:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2730]] seq_cst, align 4
18185 // CHECK-NEXT:    store i32 [[TMP2731]], i32* [[UIV]], align 4
18186 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18187 // CHECK-NEXT:    [[TMP2732:%.*]] = load i32, i32* [[UIE]], align 4
18188 // CHECK-NEXT:    [[TMP2733:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2732]] seq_cst, align 4
18189 // CHECK-NEXT:    store i32 [[TMP2733]], i32* [[UIV]], align 4
18190 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18191 // CHECK-NEXT:    [[TMP2734:%.*]] = load i32, i32* [[UIE]], align 4
18192 // CHECK-NEXT:    [[TMP2735:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2734]] seq_cst, align 4
18193 // CHECK-NEXT:    store i32 [[TMP2735]], i32* [[UIV]], align 4
18194 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18195 // CHECK-NEXT:    [[TMP2736:%.*]] = load i32, i32* [[UIE]], align 4
18196 // CHECK-NEXT:    [[TMP2737:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2736]] seq_cst, align 4
18197 // CHECK-NEXT:    store i32 [[TMP2737]], i32* [[UIV]], align 4
18198 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18199 // CHECK-NEXT:    [[TMP2738:%.*]] = load i32, i32* [[UIE]], align 4
18200 // CHECK-NEXT:    [[TMP2739:%.*]] = load i32, i32* [[UID]], align 4
18201 // CHECK-NEXT:    [[TMP2740:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2738]], i32 [[TMP2739]] seq_cst seq_cst, align 4
18202 // CHECK-NEXT:    [[TMP2741:%.*]] = extractvalue { i32, i1 } [[TMP2740]], 0
18203 // CHECK-NEXT:    store i32 [[TMP2741]], i32* [[UIV]], align 4
18204 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18205 // CHECK-NEXT:    [[TMP2742:%.*]] = load i32, i32* [[UIE]], align 4
18206 // CHECK-NEXT:    [[TMP2743:%.*]] = load i32, i32* [[UID]], align 4
18207 // CHECK-NEXT:    [[TMP2744:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2742]], i32 [[TMP2743]] seq_cst seq_cst, align 4
18208 // CHECK-NEXT:    [[TMP2745:%.*]] = extractvalue { i32, i1 } [[TMP2744]], 0
18209 // CHECK-NEXT:    store i32 [[TMP2745]], i32* [[UIV]], align 4
18210 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18211 // CHECK-NEXT:    [[TMP2746:%.*]] = load i32, i32* [[UIE]], align 4
18212 // CHECK-NEXT:    [[TMP2747:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2746]] seq_cst, align 4
18213 // CHECK-NEXT:    [[TMP2748:%.*]] = icmp ugt i32 [[TMP2747]], [[TMP2746]]
18214 // CHECK-NEXT:    [[TMP2749:%.*]] = select i1 [[TMP2748]], i32 [[TMP2746]], i32 [[TMP2747]]
18215 // CHECK-NEXT:    store i32 [[TMP2749]], i32* [[UIV]], align 4
18216 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18217 // CHECK-NEXT:    [[TMP2750:%.*]] = load i32, i32* [[UIE]], align 4
18218 // CHECK-NEXT:    [[TMP2751:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2750]] seq_cst, align 4
18219 // CHECK-NEXT:    [[TMP2752:%.*]] = icmp ult i32 [[TMP2751]], [[TMP2750]]
18220 // CHECK-NEXT:    [[TMP2753:%.*]] = select i1 [[TMP2752]], i32 [[TMP2750]], i32 [[TMP2751]]
18221 // CHECK-NEXT:    store i32 [[TMP2753]], i32* [[UIV]], align 4
18222 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18223 // CHECK-NEXT:    [[TMP2754:%.*]] = load i32, i32* [[UIE]], align 4
18224 // CHECK-NEXT:    [[TMP2755:%.*]] = atomicrmw umin i32* [[UIX]], i32 [[TMP2754]] seq_cst, align 4
18225 // CHECK-NEXT:    [[TMP2756:%.*]] = icmp ult i32 [[TMP2755]], [[TMP2754]]
18226 // CHECK-NEXT:    [[TMP2757:%.*]] = select i1 [[TMP2756]], i32 [[TMP2754]], i32 [[TMP2755]]
18227 // CHECK-NEXT:    store i32 [[TMP2757]], i32* [[UIV]], align 4
18228 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18229 // CHECK-NEXT:    [[TMP2758:%.*]] = load i32, i32* [[UIE]], align 4
18230 // CHECK-NEXT:    [[TMP2759:%.*]] = atomicrmw umax i32* [[UIX]], i32 [[TMP2758]] seq_cst, align 4
18231 // CHECK-NEXT:    [[TMP2760:%.*]] = icmp ugt i32 [[TMP2759]], [[TMP2758]]
18232 // CHECK-NEXT:    [[TMP2761:%.*]] = select i1 [[TMP2760]], i32 [[TMP2758]], i32 [[TMP2759]]
18233 // CHECK-NEXT:    store i32 [[TMP2761]], i32* [[UIV]], align 4
18234 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18235 // CHECK-NEXT:    [[TMP2762:%.*]] = load i32, i32* [[UIE]], align 4
18236 // CHECK-NEXT:    [[TMP2763:%.*]] = load i32, i32* [[UID]], align 4
18237 // CHECK-NEXT:    [[TMP2764:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2762]], i32 [[TMP2763]] seq_cst seq_cst, align 4
18238 // CHECK-NEXT:    [[TMP2765:%.*]] = extractvalue { i32, i1 } [[TMP2764]], 0
18239 // CHECK-NEXT:    [[TMP2766:%.*]] = extractvalue { i32, i1 } [[TMP2764]], 1
18240 // CHECK-NEXT:    [[TMP2767:%.*]] = select i1 [[TMP2766]], i32 [[TMP2762]], i32 [[TMP2765]]
18241 // CHECK-NEXT:    store i32 [[TMP2767]], i32* [[UIV]], align 4
18242 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18243 // CHECK-NEXT:    [[TMP2768:%.*]] = load i32, i32* [[UIE]], align 4
18244 // CHECK-NEXT:    [[TMP2769:%.*]] = load i32, i32* [[UID]], align 4
18245 // CHECK-NEXT:    [[TMP2770:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2768]], i32 [[TMP2769]] seq_cst seq_cst, align 4
18246 // CHECK-NEXT:    [[TMP2771:%.*]] = extractvalue { i32, i1 } [[TMP2770]], 0
18247 // CHECK-NEXT:    [[TMP2772:%.*]] = extractvalue { i32, i1 } [[TMP2770]], 1
18248 // CHECK-NEXT:    [[TMP2773:%.*]] = select i1 [[TMP2772]], i32 [[TMP2768]], i32 [[TMP2771]]
18249 // CHECK-NEXT:    store i32 [[TMP2773]], i32* [[UIV]], align 4
18250 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18251 // CHECK-NEXT:    [[TMP2774:%.*]] = load i32, i32* [[UIE]], align 4
18252 // CHECK-NEXT:    [[TMP2775:%.*]] = load i32, i32* [[UID]], align 4
18253 // CHECK-NEXT:    [[TMP2776:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2774]], i32 [[TMP2775]] seq_cst seq_cst, align 4
18254 // CHECK-NEXT:    [[TMP2777:%.*]] = extractvalue { i32, i1 } [[TMP2776]], 0
18255 // CHECK-NEXT:    [[TMP2778:%.*]] = extractvalue { i32, i1 } [[TMP2776]], 1
18256 // CHECK-NEXT:    br i1 [[TMP2778]], label [[UIX_ATOMIC_EXIT269:%.*]], label [[UIX_ATOMIC_CONT270:%.*]]
18257 // CHECK:       uix.atomic.cont270:
18258 // CHECK-NEXT:    store i32 [[TMP2777]], i32* [[UIV]], align 4
18259 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT269]]
18260 // CHECK:       uix.atomic.exit269:
18261 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18262 // CHECK-NEXT:    [[TMP2779:%.*]] = load i32, i32* [[UIE]], align 4
18263 // CHECK-NEXT:    [[TMP2780:%.*]] = load i32, i32* [[UID]], align 4
18264 // CHECK-NEXT:    [[TMP2781:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2779]], i32 [[TMP2780]] seq_cst seq_cst, align 4
18265 // CHECK-NEXT:    [[TMP2782:%.*]] = extractvalue { i32, i1 } [[TMP2781]], 0
18266 // CHECK-NEXT:    [[TMP2783:%.*]] = extractvalue { i32, i1 } [[TMP2781]], 1
18267 // CHECK-NEXT:    br i1 [[TMP2783]], label [[UIX_ATOMIC_EXIT271:%.*]], label [[UIX_ATOMIC_CONT272:%.*]]
18268 // CHECK:       uix.atomic.cont272:
18269 // CHECK-NEXT:    store i32 [[TMP2782]], i32* [[UIV]], align 4
18270 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT271]]
18271 // CHECK:       uix.atomic.exit271:
18272 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18273 // CHECK-NEXT:    [[TMP2784:%.*]] = load i32, i32* [[UIE]], align 4
18274 // CHECK-NEXT:    [[TMP2785:%.*]] = load i32, i32* [[UID]], align 4
18275 // CHECK-NEXT:    [[TMP2786:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2784]], i32 [[TMP2785]] seq_cst seq_cst, align 4
18276 // CHECK-NEXT:    [[TMP2787:%.*]] = extractvalue { i32, i1 } [[TMP2786]], 1
18277 // CHECK-NEXT:    [[TMP2788:%.*]] = zext i1 [[TMP2787]] to i32
18278 // CHECK-NEXT:    store i32 [[TMP2788]], i32* [[UIR]], align 4
18279 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18280 // CHECK-NEXT:    [[TMP2789:%.*]] = load i32, i32* [[UIE]], align 4
18281 // CHECK-NEXT:    [[TMP2790:%.*]] = load i32, i32* [[UID]], align 4
18282 // CHECK-NEXT:    [[TMP2791:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2789]], i32 [[TMP2790]] seq_cst seq_cst, align 4
18283 // CHECK-NEXT:    [[TMP2792:%.*]] = extractvalue { i32, i1 } [[TMP2791]], 1
18284 // CHECK-NEXT:    [[TMP2793:%.*]] = zext i1 [[TMP2792]] to i32
18285 // CHECK-NEXT:    store i32 [[TMP2793]], i32* [[UIR]], align 4
18286 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18287 // CHECK-NEXT:    [[TMP2794:%.*]] = load i32, i32* [[UIE]], align 4
18288 // CHECK-NEXT:    [[TMP2795:%.*]] = load i32, i32* [[UID]], align 4
18289 // CHECK-NEXT:    [[TMP2796:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2794]], i32 [[TMP2795]] seq_cst seq_cst, align 4
18290 // CHECK-NEXT:    [[TMP2797:%.*]] = extractvalue { i32, i1 } [[TMP2796]], 0
18291 // CHECK-NEXT:    [[TMP2798:%.*]] = extractvalue { i32, i1 } [[TMP2796]], 1
18292 // CHECK-NEXT:    br i1 [[TMP2798]], label [[UIX_ATOMIC_EXIT273:%.*]], label [[UIX_ATOMIC_CONT274:%.*]]
18293 // CHECK:       uix.atomic.cont274:
18294 // CHECK-NEXT:    store i32 [[TMP2797]], i32* [[UIV]], align 4
18295 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT273]]
18296 // CHECK:       uix.atomic.exit273:
18297 // CHECK-NEXT:    [[TMP2799:%.*]] = extractvalue { i32, i1 } [[TMP2796]], 1
18298 // CHECK-NEXT:    [[TMP2800:%.*]] = zext i1 [[TMP2799]] to i32
18299 // CHECK-NEXT:    store i32 [[TMP2800]], i32* [[UIR]], align 4
18300 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18301 // CHECK-NEXT:    [[TMP2801:%.*]] = load i32, i32* [[UIE]], align 4
18302 // CHECK-NEXT:    [[TMP2802:%.*]] = load i32, i32* [[UID]], align 4
18303 // CHECK-NEXT:    [[TMP2803:%.*]] = cmpxchg i32* [[UIX]], i32 [[TMP2801]], i32 [[TMP2802]] seq_cst seq_cst, align 4
18304 // CHECK-NEXT:    [[TMP2804:%.*]] = extractvalue { i32, i1 } [[TMP2803]], 0
18305 // CHECK-NEXT:    [[TMP2805:%.*]] = extractvalue { i32, i1 } [[TMP2803]], 1
18306 // CHECK-NEXT:    br i1 [[TMP2805]], label [[UIX_ATOMIC_EXIT275:%.*]], label [[UIX_ATOMIC_CONT276:%.*]]
18307 // CHECK:       uix.atomic.cont276:
18308 // CHECK-NEXT:    store i32 [[TMP2804]], i32* [[UIV]], align 4
18309 // CHECK-NEXT:    br label [[UIX_ATOMIC_EXIT275]]
18310 // CHECK:       uix.atomic.exit275:
18311 // CHECK-NEXT:    [[TMP2806:%.*]] = extractvalue { i32, i1 } [[TMP2803]], 1
18312 // CHECK-NEXT:    [[TMP2807:%.*]] = zext i1 [[TMP2806]] to i32
18313 // CHECK-NEXT:    store i32 [[TMP2807]], i32* [[UIR]], align 4
18314 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18315 // CHECK-NEXT:    [[TMP2808:%.*]] = load i64, i64* [[LE]], align 8
18316 // CHECK-NEXT:    [[TMP2809:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2808]] monotonic, align 8
18317 // CHECK-NEXT:    store i64 [[TMP2809]], i64* [[LV]], align 8
18318 // CHECK-NEXT:    [[TMP2810:%.*]] = load i64, i64* [[LE]], align 8
18319 // CHECK-NEXT:    [[TMP2811:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2810]] monotonic, align 8
18320 // CHECK-NEXT:    store i64 [[TMP2811]], i64* [[LV]], align 8
18321 // CHECK-NEXT:    [[TMP2812:%.*]] = load i64, i64* [[LE]], align 8
18322 // CHECK-NEXT:    [[TMP2813:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2812]] monotonic, align 8
18323 // CHECK-NEXT:    store i64 [[TMP2813]], i64* [[LV]], align 8
18324 // CHECK-NEXT:    [[TMP2814:%.*]] = load i64, i64* [[LE]], align 8
18325 // CHECK-NEXT:    [[TMP2815:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2814]] monotonic, align 8
18326 // CHECK-NEXT:    store i64 [[TMP2815]], i64* [[LV]], align 8
18327 // CHECK-NEXT:    [[TMP2816:%.*]] = load i64, i64* [[LE]], align 8
18328 // CHECK-NEXT:    [[TMP2817:%.*]] = load i64, i64* [[LD]], align 8
18329 // CHECK-NEXT:    [[TMP2818:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2816]], i64 [[TMP2817]] monotonic monotonic, align 8
18330 // CHECK-NEXT:    [[TMP2819:%.*]] = extractvalue { i64, i1 } [[TMP2818]], 0
18331 // CHECK-NEXT:    store i64 [[TMP2819]], i64* [[LV]], align 8
18332 // CHECK-NEXT:    [[TMP2820:%.*]] = load i64, i64* [[LE]], align 8
18333 // CHECK-NEXT:    [[TMP2821:%.*]] = load i64, i64* [[LD]], align 8
18334 // CHECK-NEXT:    [[TMP2822:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2820]], i64 [[TMP2821]] monotonic monotonic, align 8
18335 // CHECK-NEXT:    [[TMP2823:%.*]] = extractvalue { i64, i1 } [[TMP2822]], 0
18336 // CHECK-NEXT:    store i64 [[TMP2823]], i64* [[LV]], align 8
18337 // CHECK-NEXT:    [[TMP2824:%.*]] = load i64, i64* [[LE]], align 8
18338 // CHECK-NEXT:    [[TMP2825:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2824]] monotonic, align 8
18339 // CHECK-NEXT:    [[TMP2826:%.*]] = icmp sgt i64 [[TMP2825]], [[TMP2824]]
18340 // CHECK-NEXT:    [[TMP2827:%.*]] = select i1 [[TMP2826]], i64 [[TMP2824]], i64 [[TMP2825]]
18341 // CHECK-NEXT:    store i64 [[TMP2827]], i64* [[LV]], align 8
18342 // CHECK-NEXT:    [[TMP2828:%.*]] = load i64, i64* [[LE]], align 8
18343 // CHECK-NEXT:    [[TMP2829:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2828]] monotonic, align 8
18344 // CHECK-NEXT:    [[TMP2830:%.*]] = icmp slt i64 [[TMP2829]], [[TMP2828]]
18345 // CHECK-NEXT:    [[TMP2831:%.*]] = select i1 [[TMP2830]], i64 [[TMP2828]], i64 [[TMP2829]]
18346 // CHECK-NEXT:    store i64 [[TMP2831]], i64* [[LV]], align 8
18347 // CHECK-NEXT:    [[TMP2832:%.*]] = load i64, i64* [[LE]], align 8
18348 // CHECK-NEXT:    [[TMP2833:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2832]] monotonic, align 8
18349 // CHECK-NEXT:    [[TMP2834:%.*]] = icmp slt i64 [[TMP2833]], [[TMP2832]]
18350 // CHECK-NEXT:    [[TMP2835:%.*]] = select i1 [[TMP2834]], i64 [[TMP2832]], i64 [[TMP2833]]
18351 // CHECK-NEXT:    store i64 [[TMP2835]], i64* [[LV]], align 8
18352 // CHECK-NEXT:    [[TMP2836:%.*]] = load i64, i64* [[LE]], align 8
18353 // CHECK-NEXT:    [[TMP2837:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2836]] monotonic, align 8
18354 // CHECK-NEXT:    [[TMP2838:%.*]] = icmp sgt i64 [[TMP2837]], [[TMP2836]]
18355 // CHECK-NEXT:    [[TMP2839:%.*]] = select i1 [[TMP2838]], i64 [[TMP2836]], i64 [[TMP2837]]
18356 // CHECK-NEXT:    store i64 [[TMP2839]], i64* [[LV]], align 8
18357 // CHECK-NEXT:    [[TMP2840:%.*]] = load i64, i64* [[LE]], align 8
18358 // CHECK-NEXT:    [[TMP2841:%.*]] = load i64, i64* [[LD]], align 8
18359 // CHECK-NEXT:    [[TMP2842:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2840]], i64 [[TMP2841]] monotonic monotonic, align 8
18360 // CHECK-NEXT:    [[TMP2843:%.*]] = extractvalue { i64, i1 } [[TMP2842]], 0
18361 // CHECK-NEXT:    [[TMP2844:%.*]] = extractvalue { i64, i1 } [[TMP2842]], 1
18362 // CHECK-NEXT:    [[TMP2845:%.*]] = select i1 [[TMP2844]], i64 [[TMP2840]], i64 [[TMP2843]]
18363 // CHECK-NEXT:    store i64 [[TMP2845]], i64* [[LV]], align 8
18364 // CHECK-NEXT:    [[TMP2846:%.*]] = load i64, i64* [[LE]], align 8
18365 // CHECK-NEXT:    [[TMP2847:%.*]] = load i64, i64* [[LD]], align 8
18366 // CHECK-NEXT:    [[TMP2848:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2846]], i64 [[TMP2847]] monotonic monotonic, align 8
18367 // CHECK-NEXT:    [[TMP2849:%.*]] = extractvalue { i64, i1 } [[TMP2848]], 0
18368 // CHECK-NEXT:    [[TMP2850:%.*]] = extractvalue { i64, i1 } [[TMP2848]], 1
18369 // CHECK-NEXT:    [[TMP2851:%.*]] = select i1 [[TMP2850]], i64 [[TMP2846]], i64 [[TMP2849]]
18370 // CHECK-NEXT:    store i64 [[TMP2851]], i64* [[LV]], align 8
18371 // CHECK-NEXT:    [[TMP2852:%.*]] = load i64, i64* [[LE]], align 8
18372 // CHECK-NEXT:    [[TMP2853:%.*]] = load i64, i64* [[LD]], align 8
18373 // CHECK-NEXT:    [[TMP2854:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2852]], i64 [[TMP2853]] monotonic monotonic, align 8
18374 // CHECK-NEXT:    [[TMP2855:%.*]] = extractvalue { i64, i1 } [[TMP2854]], 0
18375 // CHECK-NEXT:    [[TMP2856:%.*]] = extractvalue { i64, i1 } [[TMP2854]], 1
18376 // CHECK-NEXT:    br i1 [[TMP2856]], label [[LX_ATOMIC_EXIT:%.*]], label [[LX_ATOMIC_CONT:%.*]]
18377 // CHECK:       lx.atomic.cont:
18378 // CHECK-NEXT:    store i64 [[TMP2855]], i64* [[LV]], align 8
18379 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT]]
18380 // CHECK:       lx.atomic.exit:
18381 // CHECK-NEXT:    [[TMP2857:%.*]] = load i64, i64* [[LE]], align 8
18382 // CHECK-NEXT:    [[TMP2858:%.*]] = load i64, i64* [[LD]], align 8
18383 // CHECK-NEXT:    [[TMP2859:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2857]], i64 [[TMP2858]] monotonic monotonic, align 8
18384 // CHECK-NEXT:    [[TMP2860:%.*]] = extractvalue { i64, i1 } [[TMP2859]], 0
18385 // CHECK-NEXT:    [[TMP2861:%.*]] = extractvalue { i64, i1 } [[TMP2859]], 1
18386 // CHECK-NEXT:    br i1 [[TMP2861]], label [[LX_ATOMIC_EXIT277:%.*]], label [[LX_ATOMIC_CONT278:%.*]]
18387 // CHECK:       lx.atomic.cont278:
18388 // CHECK-NEXT:    store i64 [[TMP2860]], i64* [[LV]], align 8
18389 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT277]]
18390 // CHECK:       lx.atomic.exit277:
18391 // CHECK-NEXT:    [[TMP2862:%.*]] = load i64, i64* [[LE]], align 8
18392 // CHECK-NEXT:    [[TMP2863:%.*]] = load i64, i64* [[LD]], align 8
18393 // CHECK-NEXT:    [[TMP2864:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2862]], i64 [[TMP2863]] monotonic monotonic, align 8
18394 // CHECK-NEXT:    [[TMP2865:%.*]] = extractvalue { i64, i1 } [[TMP2864]], 1
18395 // CHECK-NEXT:    [[TMP2866:%.*]] = sext i1 [[TMP2865]] to i64
18396 // CHECK-NEXT:    store i64 [[TMP2866]], i64* [[LR]], align 8
18397 // CHECK-NEXT:    [[TMP2867:%.*]] = load i64, i64* [[LE]], align 8
18398 // CHECK-NEXT:    [[TMP2868:%.*]] = load i64, i64* [[LD]], align 8
18399 // CHECK-NEXT:    [[TMP2869:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2867]], i64 [[TMP2868]] monotonic monotonic, align 8
18400 // CHECK-NEXT:    [[TMP2870:%.*]] = extractvalue { i64, i1 } [[TMP2869]], 1
18401 // CHECK-NEXT:    [[TMP2871:%.*]] = sext i1 [[TMP2870]] to i64
18402 // CHECK-NEXT:    store i64 [[TMP2871]], i64* [[LR]], align 8
18403 // CHECK-NEXT:    [[TMP2872:%.*]] = load i64, i64* [[LE]], align 8
18404 // CHECK-NEXT:    [[TMP2873:%.*]] = load i64, i64* [[LD]], align 8
18405 // CHECK-NEXT:    [[TMP2874:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2872]], i64 [[TMP2873]] monotonic monotonic, align 8
18406 // CHECK-NEXT:    [[TMP2875:%.*]] = extractvalue { i64, i1 } [[TMP2874]], 0
18407 // CHECK-NEXT:    [[TMP2876:%.*]] = extractvalue { i64, i1 } [[TMP2874]], 1
18408 // CHECK-NEXT:    br i1 [[TMP2876]], label [[LX_ATOMIC_EXIT279:%.*]], label [[LX_ATOMIC_CONT280:%.*]]
18409 // CHECK:       lx.atomic.cont280:
18410 // CHECK-NEXT:    store i64 [[TMP2875]], i64* [[LV]], align 8
18411 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT279]]
18412 // CHECK:       lx.atomic.exit279:
18413 // CHECK-NEXT:    [[TMP2877:%.*]] = extractvalue { i64, i1 } [[TMP2874]], 1
18414 // CHECK-NEXT:    [[TMP2878:%.*]] = sext i1 [[TMP2877]] to i64
18415 // CHECK-NEXT:    store i64 [[TMP2878]], i64* [[LR]], align 8
18416 // CHECK-NEXT:    [[TMP2879:%.*]] = load i64, i64* [[LE]], align 8
18417 // CHECK-NEXT:    [[TMP2880:%.*]] = load i64, i64* [[LD]], align 8
18418 // CHECK-NEXT:    [[TMP2881:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2879]], i64 [[TMP2880]] monotonic monotonic, align 8
18419 // CHECK-NEXT:    [[TMP2882:%.*]] = extractvalue { i64, i1 } [[TMP2881]], 0
18420 // CHECK-NEXT:    [[TMP2883:%.*]] = extractvalue { i64, i1 } [[TMP2881]], 1
18421 // CHECK-NEXT:    br i1 [[TMP2883]], label [[LX_ATOMIC_EXIT281:%.*]], label [[LX_ATOMIC_CONT282:%.*]]
18422 // CHECK:       lx.atomic.cont282:
18423 // CHECK-NEXT:    store i64 [[TMP2882]], i64* [[LV]], align 8
18424 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT281]]
18425 // CHECK:       lx.atomic.exit281:
18426 // CHECK-NEXT:    [[TMP2884:%.*]] = extractvalue { i64, i1 } [[TMP2881]], 1
18427 // CHECK-NEXT:    [[TMP2885:%.*]] = sext i1 [[TMP2884]] to i64
18428 // CHECK-NEXT:    store i64 [[TMP2885]], i64* [[LR]], align 8
18429 // CHECK-NEXT:    [[TMP2886:%.*]] = load i64, i64* [[LE]], align 8
18430 // CHECK-NEXT:    [[TMP2887:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2886]] acq_rel, align 8
18431 // CHECK-NEXT:    store i64 [[TMP2887]], i64* [[LV]], align 8
18432 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18433 // CHECK-NEXT:    [[TMP2888:%.*]] = load i64, i64* [[LE]], align 8
18434 // CHECK-NEXT:    [[TMP2889:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2888]] acq_rel, align 8
18435 // CHECK-NEXT:    store i64 [[TMP2889]], i64* [[LV]], align 8
18436 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18437 // CHECK-NEXT:    [[TMP2890:%.*]] = load i64, i64* [[LE]], align 8
18438 // CHECK-NEXT:    [[TMP2891:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2890]] acq_rel, align 8
18439 // CHECK-NEXT:    store i64 [[TMP2891]], i64* [[LV]], align 8
18440 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18441 // CHECK-NEXT:    [[TMP2892:%.*]] = load i64, i64* [[LE]], align 8
18442 // CHECK-NEXT:    [[TMP2893:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2892]] acq_rel, align 8
18443 // CHECK-NEXT:    store i64 [[TMP2893]], i64* [[LV]], align 8
18444 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18445 // CHECK-NEXT:    [[TMP2894:%.*]] = load i64, i64* [[LE]], align 8
18446 // CHECK-NEXT:    [[TMP2895:%.*]] = load i64, i64* [[LD]], align 8
18447 // CHECK-NEXT:    [[TMP2896:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2894]], i64 [[TMP2895]] acq_rel acquire, align 8
18448 // CHECK-NEXT:    [[TMP2897:%.*]] = extractvalue { i64, i1 } [[TMP2896]], 0
18449 // CHECK-NEXT:    store i64 [[TMP2897]], i64* [[LV]], align 8
18450 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18451 // CHECK-NEXT:    [[TMP2898:%.*]] = load i64, i64* [[LE]], align 8
18452 // CHECK-NEXT:    [[TMP2899:%.*]] = load i64, i64* [[LD]], align 8
18453 // CHECK-NEXT:    [[TMP2900:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2898]], i64 [[TMP2899]] acq_rel acquire, align 8
18454 // CHECK-NEXT:    [[TMP2901:%.*]] = extractvalue { i64, i1 } [[TMP2900]], 0
18455 // CHECK-NEXT:    store i64 [[TMP2901]], i64* [[LV]], align 8
18456 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18457 // CHECK-NEXT:    [[TMP2902:%.*]] = load i64, i64* [[LE]], align 8
18458 // CHECK-NEXT:    [[TMP2903:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2902]] acq_rel, align 8
18459 // CHECK-NEXT:    [[TMP2904:%.*]] = icmp sgt i64 [[TMP2903]], [[TMP2902]]
18460 // CHECK-NEXT:    [[TMP2905:%.*]] = select i1 [[TMP2904]], i64 [[TMP2902]], i64 [[TMP2903]]
18461 // CHECK-NEXT:    store i64 [[TMP2905]], i64* [[LV]], align 8
18462 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18463 // CHECK-NEXT:    [[TMP2906:%.*]] = load i64, i64* [[LE]], align 8
18464 // CHECK-NEXT:    [[TMP2907:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2906]] acq_rel, align 8
18465 // CHECK-NEXT:    [[TMP2908:%.*]] = icmp slt i64 [[TMP2907]], [[TMP2906]]
18466 // CHECK-NEXT:    [[TMP2909:%.*]] = select i1 [[TMP2908]], i64 [[TMP2906]], i64 [[TMP2907]]
18467 // CHECK-NEXT:    store i64 [[TMP2909]], i64* [[LV]], align 8
18468 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18469 // CHECK-NEXT:    [[TMP2910:%.*]] = load i64, i64* [[LE]], align 8
18470 // CHECK-NEXT:    [[TMP2911:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2910]] acq_rel, align 8
18471 // CHECK-NEXT:    [[TMP2912:%.*]] = icmp slt i64 [[TMP2911]], [[TMP2910]]
18472 // CHECK-NEXT:    [[TMP2913:%.*]] = select i1 [[TMP2912]], i64 [[TMP2910]], i64 [[TMP2911]]
18473 // CHECK-NEXT:    store i64 [[TMP2913]], i64* [[LV]], align 8
18474 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18475 // CHECK-NEXT:    [[TMP2914:%.*]] = load i64, i64* [[LE]], align 8
18476 // CHECK-NEXT:    [[TMP2915:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2914]] acq_rel, align 8
18477 // CHECK-NEXT:    [[TMP2916:%.*]] = icmp sgt i64 [[TMP2915]], [[TMP2914]]
18478 // CHECK-NEXT:    [[TMP2917:%.*]] = select i1 [[TMP2916]], i64 [[TMP2914]], i64 [[TMP2915]]
18479 // CHECK-NEXT:    store i64 [[TMP2917]], i64* [[LV]], align 8
18480 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18481 // CHECK-NEXT:    [[TMP2918:%.*]] = load i64, i64* [[LE]], align 8
18482 // CHECK-NEXT:    [[TMP2919:%.*]] = load i64, i64* [[LD]], align 8
18483 // CHECK-NEXT:    [[TMP2920:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2918]], i64 [[TMP2919]] acq_rel acquire, align 8
18484 // CHECK-NEXT:    [[TMP2921:%.*]] = extractvalue { i64, i1 } [[TMP2920]], 0
18485 // CHECK-NEXT:    [[TMP2922:%.*]] = extractvalue { i64, i1 } [[TMP2920]], 1
18486 // CHECK-NEXT:    [[TMP2923:%.*]] = select i1 [[TMP2922]], i64 [[TMP2918]], i64 [[TMP2921]]
18487 // CHECK-NEXT:    store i64 [[TMP2923]], i64* [[LV]], align 8
18488 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18489 // CHECK-NEXT:    [[TMP2924:%.*]] = load i64, i64* [[LE]], align 8
18490 // CHECK-NEXT:    [[TMP2925:%.*]] = load i64, i64* [[LD]], align 8
18491 // CHECK-NEXT:    [[TMP2926:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2924]], i64 [[TMP2925]] acq_rel acquire, align 8
18492 // CHECK-NEXT:    [[TMP2927:%.*]] = extractvalue { i64, i1 } [[TMP2926]], 0
18493 // CHECK-NEXT:    [[TMP2928:%.*]] = extractvalue { i64, i1 } [[TMP2926]], 1
18494 // CHECK-NEXT:    [[TMP2929:%.*]] = select i1 [[TMP2928]], i64 [[TMP2924]], i64 [[TMP2927]]
18495 // CHECK-NEXT:    store i64 [[TMP2929]], i64* [[LV]], align 8
18496 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18497 // CHECK-NEXT:    [[TMP2930:%.*]] = load i64, i64* [[LE]], align 8
18498 // CHECK-NEXT:    [[TMP2931:%.*]] = load i64, i64* [[LD]], align 8
18499 // CHECK-NEXT:    [[TMP2932:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2930]], i64 [[TMP2931]] acq_rel acquire, align 8
18500 // CHECK-NEXT:    [[TMP2933:%.*]] = extractvalue { i64, i1 } [[TMP2932]], 0
18501 // CHECK-NEXT:    [[TMP2934:%.*]] = extractvalue { i64, i1 } [[TMP2932]], 1
18502 // CHECK-NEXT:    br i1 [[TMP2934]], label [[LX_ATOMIC_EXIT283:%.*]], label [[LX_ATOMIC_CONT284:%.*]]
18503 // CHECK:       lx.atomic.cont284:
18504 // CHECK-NEXT:    store i64 [[TMP2933]], i64* [[LV]], align 8
18505 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT283]]
18506 // CHECK:       lx.atomic.exit283:
18507 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18508 // CHECK-NEXT:    [[TMP2935:%.*]] = load i64, i64* [[LE]], align 8
18509 // CHECK-NEXT:    [[TMP2936:%.*]] = load i64, i64* [[LD]], align 8
18510 // CHECK-NEXT:    [[TMP2937:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2935]], i64 [[TMP2936]] acq_rel acquire, align 8
18511 // CHECK-NEXT:    [[TMP2938:%.*]] = extractvalue { i64, i1 } [[TMP2937]], 0
18512 // CHECK-NEXT:    [[TMP2939:%.*]] = extractvalue { i64, i1 } [[TMP2937]], 1
18513 // CHECK-NEXT:    br i1 [[TMP2939]], label [[LX_ATOMIC_EXIT285:%.*]], label [[LX_ATOMIC_CONT286:%.*]]
18514 // CHECK:       lx.atomic.cont286:
18515 // CHECK-NEXT:    store i64 [[TMP2938]], i64* [[LV]], align 8
18516 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT285]]
18517 // CHECK:       lx.atomic.exit285:
18518 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18519 // CHECK-NEXT:    [[TMP2940:%.*]] = load i64, i64* [[LE]], align 8
18520 // CHECK-NEXT:    [[TMP2941:%.*]] = load i64, i64* [[LD]], align 8
18521 // CHECK-NEXT:    [[TMP2942:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2940]], i64 [[TMP2941]] acq_rel acquire, align 8
18522 // CHECK-NEXT:    [[TMP2943:%.*]] = extractvalue { i64, i1 } [[TMP2942]], 1
18523 // CHECK-NEXT:    [[TMP2944:%.*]] = sext i1 [[TMP2943]] to i64
18524 // CHECK-NEXT:    store i64 [[TMP2944]], i64* [[LR]], align 8
18525 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18526 // CHECK-NEXT:    [[TMP2945:%.*]] = load i64, i64* [[LE]], align 8
18527 // CHECK-NEXT:    [[TMP2946:%.*]] = load i64, i64* [[LD]], align 8
18528 // CHECK-NEXT:    [[TMP2947:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2945]], i64 [[TMP2946]] acq_rel acquire, align 8
18529 // CHECK-NEXT:    [[TMP2948:%.*]] = extractvalue { i64, i1 } [[TMP2947]], 1
18530 // CHECK-NEXT:    [[TMP2949:%.*]] = sext i1 [[TMP2948]] to i64
18531 // CHECK-NEXT:    store i64 [[TMP2949]], i64* [[LR]], align 8
18532 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18533 // CHECK-NEXT:    [[TMP2950:%.*]] = load i64, i64* [[LE]], align 8
18534 // CHECK-NEXT:    [[TMP2951:%.*]] = load i64, i64* [[LD]], align 8
18535 // CHECK-NEXT:    [[TMP2952:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2950]], i64 [[TMP2951]] acq_rel acquire, align 8
18536 // CHECK-NEXT:    [[TMP2953:%.*]] = extractvalue { i64, i1 } [[TMP2952]], 0
18537 // CHECK-NEXT:    [[TMP2954:%.*]] = extractvalue { i64, i1 } [[TMP2952]], 1
18538 // CHECK-NEXT:    br i1 [[TMP2954]], label [[LX_ATOMIC_EXIT287:%.*]], label [[LX_ATOMIC_CONT288:%.*]]
18539 // CHECK:       lx.atomic.cont288:
18540 // CHECK-NEXT:    store i64 [[TMP2953]], i64* [[LV]], align 8
18541 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT287]]
18542 // CHECK:       lx.atomic.exit287:
18543 // CHECK-NEXT:    [[TMP2955:%.*]] = extractvalue { i64, i1 } [[TMP2952]], 1
18544 // CHECK-NEXT:    [[TMP2956:%.*]] = sext i1 [[TMP2955]] to i64
18545 // CHECK-NEXT:    store i64 [[TMP2956]], i64* [[LR]], align 8
18546 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18547 // CHECK-NEXT:    [[TMP2957:%.*]] = load i64, i64* [[LE]], align 8
18548 // CHECK-NEXT:    [[TMP2958:%.*]] = load i64, i64* [[LD]], align 8
18549 // CHECK-NEXT:    [[TMP2959:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2957]], i64 [[TMP2958]] acq_rel acquire, align 8
18550 // CHECK-NEXT:    [[TMP2960:%.*]] = extractvalue { i64, i1 } [[TMP2959]], 0
18551 // CHECK-NEXT:    [[TMP2961:%.*]] = extractvalue { i64, i1 } [[TMP2959]], 1
18552 // CHECK-NEXT:    br i1 [[TMP2961]], label [[LX_ATOMIC_EXIT289:%.*]], label [[LX_ATOMIC_CONT290:%.*]]
18553 // CHECK:       lx.atomic.cont290:
18554 // CHECK-NEXT:    store i64 [[TMP2960]], i64* [[LV]], align 8
18555 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT289]]
18556 // CHECK:       lx.atomic.exit289:
18557 // CHECK-NEXT:    [[TMP2962:%.*]] = extractvalue { i64, i1 } [[TMP2959]], 1
18558 // CHECK-NEXT:    [[TMP2963:%.*]] = sext i1 [[TMP2962]] to i64
18559 // CHECK-NEXT:    store i64 [[TMP2963]], i64* [[LR]], align 8
18560 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18561 // CHECK-NEXT:    [[TMP2964:%.*]] = load i64, i64* [[LE]], align 8
18562 // CHECK-NEXT:    [[TMP2965:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2964]] acquire, align 8
18563 // CHECK-NEXT:    store i64 [[TMP2965]], i64* [[LV]], align 8
18564 // CHECK-NEXT:    [[TMP2966:%.*]] = load i64, i64* [[LE]], align 8
18565 // CHECK-NEXT:    [[TMP2967:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2966]] acquire, align 8
18566 // CHECK-NEXT:    store i64 [[TMP2967]], i64* [[LV]], align 8
18567 // CHECK-NEXT:    [[TMP2968:%.*]] = load i64, i64* [[LE]], align 8
18568 // CHECK-NEXT:    [[TMP2969:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2968]] acquire, align 8
18569 // CHECK-NEXT:    store i64 [[TMP2969]], i64* [[LV]], align 8
18570 // CHECK-NEXT:    [[TMP2970:%.*]] = load i64, i64* [[LE]], align 8
18571 // CHECK-NEXT:    [[TMP2971:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2970]] acquire, align 8
18572 // CHECK-NEXT:    store i64 [[TMP2971]], i64* [[LV]], align 8
18573 // CHECK-NEXT:    [[TMP2972:%.*]] = load i64, i64* [[LE]], align 8
18574 // CHECK-NEXT:    [[TMP2973:%.*]] = load i64, i64* [[LD]], align 8
18575 // CHECK-NEXT:    [[TMP2974:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2972]], i64 [[TMP2973]] acquire acquire, align 8
18576 // CHECK-NEXT:    [[TMP2975:%.*]] = extractvalue { i64, i1 } [[TMP2974]], 0
18577 // CHECK-NEXT:    store i64 [[TMP2975]], i64* [[LV]], align 8
18578 // CHECK-NEXT:    [[TMP2976:%.*]] = load i64, i64* [[LE]], align 8
18579 // CHECK-NEXT:    [[TMP2977:%.*]] = load i64, i64* [[LD]], align 8
18580 // CHECK-NEXT:    [[TMP2978:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2976]], i64 [[TMP2977]] acquire acquire, align 8
18581 // CHECK-NEXT:    [[TMP2979:%.*]] = extractvalue { i64, i1 } [[TMP2978]], 0
18582 // CHECK-NEXT:    store i64 [[TMP2979]], i64* [[LV]], align 8
18583 // CHECK-NEXT:    [[TMP2980:%.*]] = load i64, i64* [[LE]], align 8
18584 // CHECK-NEXT:    [[TMP2981:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2980]] acquire, align 8
18585 // CHECK-NEXT:    [[TMP2982:%.*]] = icmp sgt i64 [[TMP2981]], [[TMP2980]]
18586 // CHECK-NEXT:    [[TMP2983:%.*]] = select i1 [[TMP2982]], i64 [[TMP2980]], i64 [[TMP2981]]
18587 // CHECK-NEXT:    store i64 [[TMP2983]], i64* [[LV]], align 8
18588 // CHECK-NEXT:    [[TMP2984:%.*]] = load i64, i64* [[LE]], align 8
18589 // CHECK-NEXT:    [[TMP2985:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2984]] acquire, align 8
18590 // CHECK-NEXT:    [[TMP2986:%.*]] = icmp slt i64 [[TMP2985]], [[TMP2984]]
18591 // CHECK-NEXT:    [[TMP2987:%.*]] = select i1 [[TMP2986]], i64 [[TMP2984]], i64 [[TMP2985]]
18592 // CHECK-NEXT:    store i64 [[TMP2987]], i64* [[LV]], align 8
18593 // CHECK-NEXT:    [[TMP2988:%.*]] = load i64, i64* [[LE]], align 8
18594 // CHECK-NEXT:    [[TMP2989:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP2988]] acquire, align 8
18595 // CHECK-NEXT:    [[TMP2990:%.*]] = icmp slt i64 [[TMP2989]], [[TMP2988]]
18596 // CHECK-NEXT:    [[TMP2991:%.*]] = select i1 [[TMP2990]], i64 [[TMP2988]], i64 [[TMP2989]]
18597 // CHECK-NEXT:    store i64 [[TMP2991]], i64* [[LV]], align 8
18598 // CHECK-NEXT:    [[TMP2992:%.*]] = load i64, i64* [[LE]], align 8
18599 // CHECK-NEXT:    [[TMP2993:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP2992]] acquire, align 8
18600 // CHECK-NEXT:    [[TMP2994:%.*]] = icmp sgt i64 [[TMP2993]], [[TMP2992]]
18601 // CHECK-NEXT:    [[TMP2995:%.*]] = select i1 [[TMP2994]], i64 [[TMP2992]], i64 [[TMP2993]]
18602 // CHECK-NEXT:    store i64 [[TMP2995]], i64* [[LV]], align 8
18603 // CHECK-NEXT:    [[TMP2996:%.*]] = load i64, i64* [[LE]], align 8
18604 // CHECK-NEXT:    [[TMP2997:%.*]] = load i64, i64* [[LD]], align 8
18605 // CHECK-NEXT:    [[TMP2998:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP2996]], i64 [[TMP2997]] acquire acquire, align 8
18606 // CHECK-NEXT:    [[TMP2999:%.*]] = extractvalue { i64, i1 } [[TMP2998]], 0
18607 // CHECK-NEXT:    [[TMP3000:%.*]] = extractvalue { i64, i1 } [[TMP2998]], 1
18608 // CHECK-NEXT:    [[TMP3001:%.*]] = select i1 [[TMP3000]], i64 [[TMP2996]], i64 [[TMP2999]]
18609 // CHECK-NEXT:    store i64 [[TMP3001]], i64* [[LV]], align 8
18610 // CHECK-NEXT:    [[TMP3002:%.*]] = load i64, i64* [[LE]], align 8
18611 // CHECK-NEXT:    [[TMP3003:%.*]] = load i64, i64* [[LD]], align 8
18612 // CHECK-NEXT:    [[TMP3004:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3002]], i64 [[TMP3003]] acquire acquire, align 8
18613 // CHECK-NEXT:    [[TMP3005:%.*]] = extractvalue { i64, i1 } [[TMP3004]], 0
18614 // CHECK-NEXT:    [[TMP3006:%.*]] = extractvalue { i64, i1 } [[TMP3004]], 1
18615 // CHECK-NEXT:    [[TMP3007:%.*]] = select i1 [[TMP3006]], i64 [[TMP3002]], i64 [[TMP3005]]
18616 // CHECK-NEXT:    store i64 [[TMP3007]], i64* [[LV]], align 8
18617 // CHECK-NEXT:    [[TMP3008:%.*]] = load i64, i64* [[LE]], align 8
18618 // CHECK-NEXT:    [[TMP3009:%.*]] = load i64, i64* [[LD]], align 8
18619 // CHECK-NEXT:    [[TMP3010:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3008]], i64 [[TMP3009]] acquire acquire, align 8
18620 // CHECK-NEXT:    [[TMP3011:%.*]] = extractvalue { i64, i1 } [[TMP3010]], 0
18621 // CHECK-NEXT:    [[TMP3012:%.*]] = extractvalue { i64, i1 } [[TMP3010]], 1
18622 // CHECK-NEXT:    br i1 [[TMP3012]], label [[LX_ATOMIC_EXIT291:%.*]], label [[LX_ATOMIC_CONT292:%.*]]
18623 // CHECK:       lx.atomic.cont292:
18624 // CHECK-NEXT:    store i64 [[TMP3011]], i64* [[LV]], align 8
18625 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT291]]
18626 // CHECK:       lx.atomic.exit291:
18627 // CHECK-NEXT:    [[TMP3013:%.*]] = load i64, i64* [[LE]], align 8
18628 // CHECK-NEXT:    [[TMP3014:%.*]] = load i64, i64* [[LD]], align 8
18629 // CHECK-NEXT:    [[TMP3015:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3013]], i64 [[TMP3014]] acquire acquire, align 8
18630 // CHECK-NEXT:    [[TMP3016:%.*]] = extractvalue { i64, i1 } [[TMP3015]], 0
18631 // CHECK-NEXT:    [[TMP3017:%.*]] = extractvalue { i64, i1 } [[TMP3015]], 1
18632 // CHECK-NEXT:    br i1 [[TMP3017]], label [[LX_ATOMIC_EXIT293:%.*]], label [[LX_ATOMIC_CONT294:%.*]]
18633 // CHECK:       lx.atomic.cont294:
18634 // CHECK-NEXT:    store i64 [[TMP3016]], i64* [[LV]], align 8
18635 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT293]]
18636 // CHECK:       lx.atomic.exit293:
18637 // CHECK-NEXT:    [[TMP3018:%.*]] = load i64, i64* [[LE]], align 8
18638 // CHECK-NEXT:    [[TMP3019:%.*]] = load i64, i64* [[LD]], align 8
18639 // CHECK-NEXT:    [[TMP3020:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3018]], i64 [[TMP3019]] acquire acquire, align 8
18640 // CHECK-NEXT:    [[TMP3021:%.*]] = extractvalue { i64, i1 } [[TMP3020]], 1
18641 // CHECK-NEXT:    [[TMP3022:%.*]] = sext i1 [[TMP3021]] to i64
18642 // CHECK-NEXT:    store i64 [[TMP3022]], i64* [[LR]], align 8
18643 // CHECK-NEXT:    [[TMP3023:%.*]] = load i64, i64* [[LE]], align 8
18644 // CHECK-NEXT:    [[TMP3024:%.*]] = load i64, i64* [[LD]], align 8
18645 // CHECK-NEXT:    [[TMP3025:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3023]], i64 [[TMP3024]] acquire acquire, align 8
18646 // CHECK-NEXT:    [[TMP3026:%.*]] = extractvalue { i64, i1 } [[TMP3025]], 1
18647 // CHECK-NEXT:    [[TMP3027:%.*]] = sext i1 [[TMP3026]] to i64
18648 // CHECK-NEXT:    store i64 [[TMP3027]], i64* [[LR]], align 8
18649 // CHECK-NEXT:    [[TMP3028:%.*]] = load i64, i64* [[LE]], align 8
18650 // CHECK-NEXT:    [[TMP3029:%.*]] = load i64, i64* [[LD]], align 8
18651 // CHECK-NEXT:    [[TMP3030:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3028]], i64 [[TMP3029]] acquire acquire, align 8
18652 // CHECK-NEXT:    [[TMP3031:%.*]] = extractvalue { i64, i1 } [[TMP3030]], 0
18653 // CHECK-NEXT:    [[TMP3032:%.*]] = extractvalue { i64, i1 } [[TMP3030]], 1
18654 // CHECK-NEXT:    br i1 [[TMP3032]], label [[LX_ATOMIC_EXIT295:%.*]], label [[LX_ATOMIC_CONT296:%.*]]
18655 // CHECK:       lx.atomic.cont296:
18656 // CHECK-NEXT:    store i64 [[TMP3031]], i64* [[LV]], align 8
18657 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT295]]
18658 // CHECK:       lx.atomic.exit295:
18659 // CHECK-NEXT:    [[TMP3033:%.*]] = extractvalue { i64, i1 } [[TMP3030]], 1
18660 // CHECK-NEXT:    [[TMP3034:%.*]] = sext i1 [[TMP3033]] to i64
18661 // CHECK-NEXT:    store i64 [[TMP3034]], i64* [[LR]], align 8
18662 // CHECK-NEXT:    [[TMP3035:%.*]] = load i64, i64* [[LE]], align 8
18663 // CHECK-NEXT:    [[TMP3036:%.*]] = load i64, i64* [[LD]], align 8
18664 // CHECK-NEXT:    [[TMP3037:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3035]], i64 [[TMP3036]] acquire acquire, align 8
18665 // CHECK-NEXT:    [[TMP3038:%.*]] = extractvalue { i64, i1 } [[TMP3037]], 0
18666 // CHECK-NEXT:    [[TMP3039:%.*]] = extractvalue { i64, i1 } [[TMP3037]], 1
18667 // CHECK-NEXT:    br i1 [[TMP3039]], label [[LX_ATOMIC_EXIT297:%.*]], label [[LX_ATOMIC_CONT298:%.*]]
18668 // CHECK:       lx.atomic.cont298:
18669 // CHECK-NEXT:    store i64 [[TMP3038]], i64* [[LV]], align 8
18670 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT297]]
18671 // CHECK:       lx.atomic.exit297:
18672 // CHECK-NEXT:    [[TMP3040:%.*]] = extractvalue { i64, i1 } [[TMP3037]], 1
18673 // CHECK-NEXT:    [[TMP3041:%.*]] = sext i1 [[TMP3040]] to i64
18674 // CHECK-NEXT:    store i64 [[TMP3041]], i64* [[LR]], align 8
18675 // CHECK-NEXT:    [[TMP3042:%.*]] = load i64, i64* [[LE]], align 8
18676 // CHECK-NEXT:    [[TMP3043:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3042]] monotonic, align 8
18677 // CHECK-NEXT:    store i64 [[TMP3043]], i64* [[LV]], align 8
18678 // CHECK-NEXT:    [[TMP3044:%.*]] = load i64, i64* [[LE]], align 8
18679 // CHECK-NEXT:    [[TMP3045:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3044]] monotonic, align 8
18680 // CHECK-NEXT:    store i64 [[TMP3045]], i64* [[LV]], align 8
18681 // CHECK-NEXT:    [[TMP3046:%.*]] = load i64, i64* [[LE]], align 8
18682 // CHECK-NEXT:    [[TMP3047:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3046]] monotonic, align 8
18683 // CHECK-NEXT:    store i64 [[TMP3047]], i64* [[LV]], align 8
18684 // CHECK-NEXT:    [[TMP3048:%.*]] = load i64, i64* [[LE]], align 8
18685 // CHECK-NEXT:    [[TMP3049:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3048]] monotonic, align 8
18686 // CHECK-NEXT:    store i64 [[TMP3049]], i64* [[LV]], align 8
18687 // CHECK-NEXT:    [[TMP3050:%.*]] = load i64, i64* [[LE]], align 8
18688 // CHECK-NEXT:    [[TMP3051:%.*]] = load i64, i64* [[LD]], align 8
18689 // CHECK-NEXT:    [[TMP3052:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3050]], i64 [[TMP3051]] monotonic monotonic, align 8
18690 // CHECK-NEXT:    [[TMP3053:%.*]] = extractvalue { i64, i1 } [[TMP3052]], 0
18691 // CHECK-NEXT:    store i64 [[TMP3053]], i64* [[LV]], align 8
18692 // CHECK-NEXT:    [[TMP3054:%.*]] = load i64, i64* [[LE]], align 8
18693 // CHECK-NEXT:    [[TMP3055:%.*]] = load i64, i64* [[LD]], align 8
18694 // CHECK-NEXT:    [[TMP3056:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3054]], i64 [[TMP3055]] monotonic monotonic, align 8
18695 // CHECK-NEXT:    [[TMP3057:%.*]] = extractvalue { i64, i1 } [[TMP3056]], 0
18696 // CHECK-NEXT:    store i64 [[TMP3057]], i64* [[LV]], align 8
18697 // CHECK-NEXT:    [[TMP3058:%.*]] = load i64, i64* [[LE]], align 8
18698 // CHECK-NEXT:    [[TMP3059:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3058]] monotonic, align 8
18699 // CHECK-NEXT:    [[TMP3060:%.*]] = icmp sgt i64 [[TMP3059]], [[TMP3058]]
18700 // CHECK-NEXT:    [[TMP3061:%.*]] = select i1 [[TMP3060]], i64 [[TMP3058]], i64 [[TMP3059]]
18701 // CHECK-NEXT:    store i64 [[TMP3061]], i64* [[LV]], align 8
18702 // CHECK-NEXT:    [[TMP3062:%.*]] = load i64, i64* [[LE]], align 8
18703 // CHECK-NEXT:    [[TMP3063:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3062]] monotonic, align 8
18704 // CHECK-NEXT:    [[TMP3064:%.*]] = icmp slt i64 [[TMP3063]], [[TMP3062]]
18705 // CHECK-NEXT:    [[TMP3065:%.*]] = select i1 [[TMP3064]], i64 [[TMP3062]], i64 [[TMP3063]]
18706 // CHECK-NEXT:    store i64 [[TMP3065]], i64* [[LV]], align 8
18707 // CHECK-NEXT:    [[TMP3066:%.*]] = load i64, i64* [[LE]], align 8
18708 // CHECK-NEXT:    [[TMP3067:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3066]] monotonic, align 8
18709 // CHECK-NEXT:    [[TMP3068:%.*]] = icmp slt i64 [[TMP3067]], [[TMP3066]]
18710 // CHECK-NEXT:    [[TMP3069:%.*]] = select i1 [[TMP3068]], i64 [[TMP3066]], i64 [[TMP3067]]
18711 // CHECK-NEXT:    store i64 [[TMP3069]], i64* [[LV]], align 8
18712 // CHECK-NEXT:    [[TMP3070:%.*]] = load i64, i64* [[LE]], align 8
18713 // CHECK-NEXT:    [[TMP3071:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3070]] monotonic, align 8
18714 // CHECK-NEXT:    [[TMP3072:%.*]] = icmp sgt i64 [[TMP3071]], [[TMP3070]]
18715 // CHECK-NEXT:    [[TMP3073:%.*]] = select i1 [[TMP3072]], i64 [[TMP3070]], i64 [[TMP3071]]
18716 // CHECK-NEXT:    store i64 [[TMP3073]], i64* [[LV]], align 8
18717 // CHECK-NEXT:    [[TMP3074:%.*]] = load i64, i64* [[LE]], align 8
18718 // CHECK-NEXT:    [[TMP3075:%.*]] = load i64, i64* [[LD]], align 8
18719 // CHECK-NEXT:    [[TMP3076:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3074]], i64 [[TMP3075]] monotonic monotonic, align 8
18720 // CHECK-NEXT:    [[TMP3077:%.*]] = extractvalue { i64, i1 } [[TMP3076]], 0
18721 // CHECK-NEXT:    [[TMP3078:%.*]] = extractvalue { i64, i1 } [[TMP3076]], 1
18722 // CHECK-NEXT:    [[TMP3079:%.*]] = select i1 [[TMP3078]], i64 [[TMP3074]], i64 [[TMP3077]]
18723 // CHECK-NEXT:    store i64 [[TMP3079]], i64* [[LV]], align 8
18724 // CHECK-NEXT:    [[TMP3080:%.*]] = load i64, i64* [[LE]], align 8
18725 // CHECK-NEXT:    [[TMP3081:%.*]] = load i64, i64* [[LD]], align 8
18726 // CHECK-NEXT:    [[TMP3082:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3080]], i64 [[TMP3081]] monotonic monotonic, align 8
18727 // CHECK-NEXT:    [[TMP3083:%.*]] = extractvalue { i64, i1 } [[TMP3082]], 0
18728 // CHECK-NEXT:    [[TMP3084:%.*]] = extractvalue { i64, i1 } [[TMP3082]], 1
18729 // CHECK-NEXT:    [[TMP3085:%.*]] = select i1 [[TMP3084]], i64 [[TMP3080]], i64 [[TMP3083]]
18730 // CHECK-NEXT:    store i64 [[TMP3085]], i64* [[LV]], align 8
18731 // CHECK-NEXT:    [[TMP3086:%.*]] = load i64, i64* [[LE]], align 8
18732 // CHECK-NEXT:    [[TMP3087:%.*]] = load i64, i64* [[LD]], align 8
18733 // CHECK-NEXT:    [[TMP3088:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3086]], i64 [[TMP3087]] monotonic monotonic, align 8
18734 // CHECK-NEXT:    [[TMP3089:%.*]] = extractvalue { i64, i1 } [[TMP3088]], 0
18735 // CHECK-NEXT:    [[TMP3090:%.*]] = extractvalue { i64, i1 } [[TMP3088]], 1
18736 // CHECK-NEXT:    br i1 [[TMP3090]], label [[LX_ATOMIC_EXIT299:%.*]], label [[LX_ATOMIC_CONT300:%.*]]
18737 // CHECK:       lx.atomic.cont300:
18738 // CHECK-NEXT:    store i64 [[TMP3089]], i64* [[LV]], align 8
18739 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT299]]
18740 // CHECK:       lx.atomic.exit299:
18741 // CHECK-NEXT:    [[TMP3091:%.*]] = load i64, i64* [[LE]], align 8
18742 // CHECK-NEXT:    [[TMP3092:%.*]] = load i64, i64* [[LD]], align 8
18743 // CHECK-NEXT:    [[TMP3093:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3091]], i64 [[TMP3092]] monotonic monotonic, align 8
18744 // CHECK-NEXT:    [[TMP3094:%.*]] = extractvalue { i64, i1 } [[TMP3093]], 0
18745 // CHECK-NEXT:    [[TMP3095:%.*]] = extractvalue { i64, i1 } [[TMP3093]], 1
18746 // CHECK-NEXT:    br i1 [[TMP3095]], label [[LX_ATOMIC_EXIT301:%.*]], label [[LX_ATOMIC_CONT302:%.*]]
18747 // CHECK:       lx.atomic.cont302:
18748 // CHECK-NEXT:    store i64 [[TMP3094]], i64* [[LV]], align 8
18749 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT301]]
18750 // CHECK:       lx.atomic.exit301:
18751 // CHECK-NEXT:    [[TMP3096:%.*]] = load i64, i64* [[LE]], align 8
18752 // CHECK-NEXT:    [[TMP3097:%.*]] = load i64, i64* [[LD]], align 8
18753 // CHECK-NEXT:    [[TMP3098:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3096]], i64 [[TMP3097]] monotonic monotonic, align 8
18754 // CHECK-NEXT:    [[TMP3099:%.*]] = extractvalue { i64, i1 } [[TMP3098]], 1
18755 // CHECK-NEXT:    [[TMP3100:%.*]] = sext i1 [[TMP3099]] to i64
18756 // CHECK-NEXT:    store i64 [[TMP3100]], i64* [[LR]], align 8
18757 // CHECK-NEXT:    [[TMP3101:%.*]] = load i64, i64* [[LE]], align 8
18758 // CHECK-NEXT:    [[TMP3102:%.*]] = load i64, i64* [[LD]], align 8
18759 // CHECK-NEXT:    [[TMP3103:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3101]], i64 [[TMP3102]] monotonic monotonic, align 8
18760 // CHECK-NEXT:    [[TMP3104:%.*]] = extractvalue { i64, i1 } [[TMP3103]], 1
18761 // CHECK-NEXT:    [[TMP3105:%.*]] = sext i1 [[TMP3104]] to i64
18762 // CHECK-NEXT:    store i64 [[TMP3105]], i64* [[LR]], align 8
18763 // CHECK-NEXT:    [[TMP3106:%.*]] = load i64, i64* [[LE]], align 8
18764 // CHECK-NEXT:    [[TMP3107:%.*]] = load i64, i64* [[LD]], align 8
18765 // CHECK-NEXT:    [[TMP3108:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3106]], i64 [[TMP3107]] monotonic monotonic, align 8
18766 // CHECK-NEXT:    [[TMP3109:%.*]] = extractvalue { i64, i1 } [[TMP3108]], 0
18767 // CHECK-NEXT:    [[TMP3110:%.*]] = extractvalue { i64, i1 } [[TMP3108]], 1
18768 // CHECK-NEXT:    br i1 [[TMP3110]], label [[LX_ATOMIC_EXIT303:%.*]], label [[LX_ATOMIC_CONT304:%.*]]
18769 // CHECK:       lx.atomic.cont304:
18770 // CHECK-NEXT:    store i64 [[TMP3109]], i64* [[LV]], align 8
18771 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT303]]
18772 // CHECK:       lx.atomic.exit303:
18773 // CHECK-NEXT:    [[TMP3111:%.*]] = extractvalue { i64, i1 } [[TMP3108]], 1
18774 // CHECK-NEXT:    [[TMP3112:%.*]] = sext i1 [[TMP3111]] to i64
18775 // CHECK-NEXT:    store i64 [[TMP3112]], i64* [[LR]], align 8
18776 // CHECK-NEXT:    [[TMP3113:%.*]] = load i64, i64* [[LE]], align 8
18777 // CHECK-NEXT:    [[TMP3114:%.*]] = load i64, i64* [[LD]], align 8
18778 // CHECK-NEXT:    [[TMP3115:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3113]], i64 [[TMP3114]] monotonic monotonic, align 8
18779 // CHECK-NEXT:    [[TMP3116:%.*]] = extractvalue { i64, i1 } [[TMP3115]], 0
18780 // CHECK-NEXT:    [[TMP3117:%.*]] = extractvalue { i64, i1 } [[TMP3115]], 1
18781 // CHECK-NEXT:    br i1 [[TMP3117]], label [[LX_ATOMIC_EXIT305:%.*]], label [[LX_ATOMIC_CONT306:%.*]]
18782 // CHECK:       lx.atomic.cont306:
18783 // CHECK-NEXT:    store i64 [[TMP3116]], i64* [[LV]], align 8
18784 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT305]]
18785 // CHECK:       lx.atomic.exit305:
18786 // CHECK-NEXT:    [[TMP3118:%.*]] = extractvalue { i64, i1 } [[TMP3115]], 1
18787 // CHECK-NEXT:    [[TMP3119:%.*]] = sext i1 [[TMP3118]] to i64
18788 // CHECK-NEXT:    store i64 [[TMP3119]], i64* [[LR]], align 8
18789 // CHECK-NEXT:    [[TMP3120:%.*]] = load i64, i64* [[LE]], align 8
18790 // CHECK-NEXT:    [[TMP3121:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3120]] release, align 8
18791 // CHECK-NEXT:    store i64 [[TMP3121]], i64* [[LV]], align 8
18792 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18793 // CHECK-NEXT:    [[TMP3122:%.*]] = load i64, i64* [[LE]], align 8
18794 // CHECK-NEXT:    [[TMP3123:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3122]] release, align 8
18795 // CHECK-NEXT:    store i64 [[TMP3123]], i64* [[LV]], align 8
18796 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18797 // CHECK-NEXT:    [[TMP3124:%.*]] = load i64, i64* [[LE]], align 8
18798 // CHECK-NEXT:    [[TMP3125:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3124]] release, align 8
18799 // CHECK-NEXT:    store i64 [[TMP3125]], i64* [[LV]], align 8
18800 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18801 // CHECK-NEXT:    [[TMP3126:%.*]] = load i64, i64* [[LE]], align 8
18802 // CHECK-NEXT:    [[TMP3127:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3126]] release, align 8
18803 // CHECK-NEXT:    store i64 [[TMP3127]], i64* [[LV]], align 8
18804 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18805 // CHECK-NEXT:    [[TMP3128:%.*]] = load i64, i64* [[LE]], align 8
18806 // CHECK-NEXT:    [[TMP3129:%.*]] = load i64, i64* [[LD]], align 8
18807 // CHECK-NEXT:    [[TMP3130:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3128]], i64 [[TMP3129]] release monotonic, align 8
18808 // CHECK-NEXT:    [[TMP3131:%.*]] = extractvalue { i64, i1 } [[TMP3130]], 0
18809 // CHECK-NEXT:    store i64 [[TMP3131]], i64* [[LV]], align 8
18810 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18811 // CHECK-NEXT:    [[TMP3132:%.*]] = load i64, i64* [[LE]], align 8
18812 // CHECK-NEXT:    [[TMP3133:%.*]] = load i64, i64* [[LD]], align 8
18813 // CHECK-NEXT:    [[TMP3134:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3132]], i64 [[TMP3133]] release monotonic, align 8
18814 // CHECK-NEXT:    [[TMP3135:%.*]] = extractvalue { i64, i1 } [[TMP3134]], 0
18815 // CHECK-NEXT:    store i64 [[TMP3135]], i64* [[LV]], align 8
18816 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18817 // CHECK-NEXT:    [[TMP3136:%.*]] = load i64, i64* [[LE]], align 8
18818 // CHECK-NEXT:    [[TMP3137:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3136]] release, align 8
18819 // CHECK-NEXT:    [[TMP3138:%.*]] = icmp sgt i64 [[TMP3137]], [[TMP3136]]
18820 // CHECK-NEXT:    [[TMP3139:%.*]] = select i1 [[TMP3138]], i64 [[TMP3136]], i64 [[TMP3137]]
18821 // CHECK-NEXT:    store i64 [[TMP3139]], i64* [[LV]], align 8
18822 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18823 // CHECK-NEXT:    [[TMP3140:%.*]] = load i64, i64* [[LE]], align 8
18824 // CHECK-NEXT:    [[TMP3141:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3140]] release, align 8
18825 // CHECK-NEXT:    [[TMP3142:%.*]] = icmp slt i64 [[TMP3141]], [[TMP3140]]
18826 // CHECK-NEXT:    [[TMP3143:%.*]] = select i1 [[TMP3142]], i64 [[TMP3140]], i64 [[TMP3141]]
18827 // CHECK-NEXT:    store i64 [[TMP3143]], i64* [[LV]], align 8
18828 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18829 // CHECK-NEXT:    [[TMP3144:%.*]] = load i64, i64* [[LE]], align 8
18830 // CHECK-NEXT:    [[TMP3145:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3144]] release, align 8
18831 // CHECK-NEXT:    [[TMP3146:%.*]] = icmp slt i64 [[TMP3145]], [[TMP3144]]
18832 // CHECK-NEXT:    [[TMP3147:%.*]] = select i1 [[TMP3146]], i64 [[TMP3144]], i64 [[TMP3145]]
18833 // CHECK-NEXT:    store i64 [[TMP3147]], i64* [[LV]], align 8
18834 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18835 // CHECK-NEXT:    [[TMP3148:%.*]] = load i64, i64* [[LE]], align 8
18836 // CHECK-NEXT:    [[TMP3149:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3148]] release, align 8
18837 // CHECK-NEXT:    [[TMP3150:%.*]] = icmp sgt i64 [[TMP3149]], [[TMP3148]]
18838 // CHECK-NEXT:    [[TMP3151:%.*]] = select i1 [[TMP3150]], i64 [[TMP3148]], i64 [[TMP3149]]
18839 // CHECK-NEXT:    store i64 [[TMP3151]], i64* [[LV]], align 8
18840 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18841 // CHECK-NEXT:    [[TMP3152:%.*]] = load i64, i64* [[LE]], align 8
18842 // CHECK-NEXT:    [[TMP3153:%.*]] = load i64, i64* [[LD]], align 8
18843 // CHECK-NEXT:    [[TMP3154:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3152]], i64 [[TMP3153]] release monotonic, align 8
18844 // CHECK-NEXT:    [[TMP3155:%.*]] = extractvalue { i64, i1 } [[TMP3154]], 0
18845 // CHECK-NEXT:    [[TMP3156:%.*]] = extractvalue { i64, i1 } [[TMP3154]], 1
18846 // CHECK-NEXT:    [[TMP3157:%.*]] = select i1 [[TMP3156]], i64 [[TMP3152]], i64 [[TMP3155]]
18847 // CHECK-NEXT:    store i64 [[TMP3157]], i64* [[LV]], align 8
18848 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18849 // CHECK-NEXT:    [[TMP3158:%.*]] = load i64, i64* [[LE]], align 8
18850 // CHECK-NEXT:    [[TMP3159:%.*]] = load i64, i64* [[LD]], align 8
18851 // CHECK-NEXT:    [[TMP3160:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3158]], i64 [[TMP3159]] release monotonic, align 8
18852 // CHECK-NEXT:    [[TMP3161:%.*]] = extractvalue { i64, i1 } [[TMP3160]], 0
18853 // CHECK-NEXT:    [[TMP3162:%.*]] = extractvalue { i64, i1 } [[TMP3160]], 1
18854 // CHECK-NEXT:    [[TMP3163:%.*]] = select i1 [[TMP3162]], i64 [[TMP3158]], i64 [[TMP3161]]
18855 // CHECK-NEXT:    store i64 [[TMP3163]], i64* [[LV]], align 8
18856 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18857 // CHECK-NEXT:    [[TMP3164:%.*]] = load i64, i64* [[LE]], align 8
18858 // CHECK-NEXT:    [[TMP3165:%.*]] = load i64, i64* [[LD]], align 8
18859 // CHECK-NEXT:    [[TMP3166:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3164]], i64 [[TMP3165]] release monotonic, align 8
18860 // CHECK-NEXT:    [[TMP3167:%.*]] = extractvalue { i64, i1 } [[TMP3166]], 0
18861 // CHECK-NEXT:    [[TMP3168:%.*]] = extractvalue { i64, i1 } [[TMP3166]], 1
18862 // CHECK-NEXT:    br i1 [[TMP3168]], label [[LX_ATOMIC_EXIT307:%.*]], label [[LX_ATOMIC_CONT308:%.*]]
18863 // CHECK:       lx.atomic.cont308:
18864 // CHECK-NEXT:    store i64 [[TMP3167]], i64* [[LV]], align 8
18865 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT307]]
18866 // CHECK:       lx.atomic.exit307:
18867 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18868 // CHECK-NEXT:    [[TMP3169:%.*]] = load i64, i64* [[LE]], align 8
18869 // CHECK-NEXT:    [[TMP3170:%.*]] = load i64, i64* [[LD]], align 8
18870 // CHECK-NEXT:    [[TMP3171:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3169]], i64 [[TMP3170]] release monotonic, align 8
18871 // CHECK-NEXT:    [[TMP3172:%.*]] = extractvalue { i64, i1 } [[TMP3171]], 0
18872 // CHECK-NEXT:    [[TMP3173:%.*]] = extractvalue { i64, i1 } [[TMP3171]], 1
18873 // CHECK-NEXT:    br i1 [[TMP3173]], label [[LX_ATOMIC_EXIT309:%.*]], label [[LX_ATOMIC_CONT310:%.*]]
18874 // CHECK:       lx.atomic.cont310:
18875 // CHECK-NEXT:    store i64 [[TMP3172]], i64* [[LV]], align 8
18876 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT309]]
18877 // CHECK:       lx.atomic.exit309:
18878 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18879 // CHECK-NEXT:    [[TMP3174:%.*]] = load i64, i64* [[LE]], align 8
18880 // CHECK-NEXT:    [[TMP3175:%.*]] = load i64, i64* [[LD]], align 8
18881 // CHECK-NEXT:    [[TMP3176:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3174]], i64 [[TMP3175]] release monotonic, align 8
18882 // CHECK-NEXT:    [[TMP3177:%.*]] = extractvalue { i64, i1 } [[TMP3176]], 1
18883 // CHECK-NEXT:    [[TMP3178:%.*]] = sext i1 [[TMP3177]] to i64
18884 // CHECK-NEXT:    store i64 [[TMP3178]], i64* [[LR]], align 8
18885 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18886 // CHECK-NEXT:    [[TMP3179:%.*]] = load i64, i64* [[LE]], align 8
18887 // CHECK-NEXT:    [[TMP3180:%.*]] = load i64, i64* [[LD]], align 8
18888 // CHECK-NEXT:    [[TMP3181:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3179]], i64 [[TMP3180]] release monotonic, align 8
18889 // CHECK-NEXT:    [[TMP3182:%.*]] = extractvalue { i64, i1 } [[TMP3181]], 1
18890 // CHECK-NEXT:    [[TMP3183:%.*]] = sext i1 [[TMP3182]] to i64
18891 // CHECK-NEXT:    store i64 [[TMP3183]], i64* [[LR]], align 8
18892 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18893 // CHECK-NEXT:    [[TMP3184:%.*]] = load i64, i64* [[LE]], align 8
18894 // CHECK-NEXT:    [[TMP3185:%.*]] = load i64, i64* [[LD]], align 8
18895 // CHECK-NEXT:    [[TMP3186:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3184]], i64 [[TMP3185]] release monotonic, align 8
18896 // CHECK-NEXT:    [[TMP3187:%.*]] = extractvalue { i64, i1 } [[TMP3186]], 0
18897 // CHECK-NEXT:    [[TMP3188:%.*]] = extractvalue { i64, i1 } [[TMP3186]], 1
18898 // CHECK-NEXT:    br i1 [[TMP3188]], label [[LX_ATOMIC_EXIT311:%.*]], label [[LX_ATOMIC_CONT312:%.*]]
18899 // CHECK:       lx.atomic.cont312:
18900 // CHECK-NEXT:    store i64 [[TMP3187]], i64* [[LV]], align 8
18901 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT311]]
18902 // CHECK:       lx.atomic.exit311:
18903 // CHECK-NEXT:    [[TMP3189:%.*]] = extractvalue { i64, i1 } [[TMP3186]], 1
18904 // CHECK-NEXT:    [[TMP3190:%.*]] = sext i1 [[TMP3189]] to i64
18905 // CHECK-NEXT:    store i64 [[TMP3190]], i64* [[LR]], align 8
18906 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18907 // CHECK-NEXT:    [[TMP3191:%.*]] = load i64, i64* [[LE]], align 8
18908 // CHECK-NEXT:    [[TMP3192:%.*]] = load i64, i64* [[LD]], align 8
18909 // CHECK-NEXT:    [[TMP3193:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3191]], i64 [[TMP3192]] release monotonic, align 8
18910 // CHECK-NEXT:    [[TMP3194:%.*]] = extractvalue { i64, i1 } [[TMP3193]], 0
18911 // CHECK-NEXT:    [[TMP3195:%.*]] = extractvalue { i64, i1 } [[TMP3193]], 1
18912 // CHECK-NEXT:    br i1 [[TMP3195]], label [[LX_ATOMIC_EXIT313:%.*]], label [[LX_ATOMIC_CONT314:%.*]]
18913 // CHECK:       lx.atomic.cont314:
18914 // CHECK-NEXT:    store i64 [[TMP3194]], i64* [[LV]], align 8
18915 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT313]]
18916 // CHECK:       lx.atomic.exit313:
18917 // CHECK-NEXT:    [[TMP3196:%.*]] = extractvalue { i64, i1 } [[TMP3193]], 1
18918 // CHECK-NEXT:    [[TMP3197:%.*]] = sext i1 [[TMP3196]] to i64
18919 // CHECK-NEXT:    store i64 [[TMP3197]], i64* [[LR]], align 8
18920 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18921 // CHECK-NEXT:    [[TMP3198:%.*]] = load i64, i64* [[LE]], align 8
18922 // CHECK-NEXT:    [[TMP3199:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3198]] seq_cst, align 8
18923 // CHECK-NEXT:    store i64 [[TMP3199]], i64* [[LV]], align 8
18924 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18925 // CHECK-NEXT:    [[TMP3200:%.*]] = load i64, i64* [[LE]], align 8
18926 // CHECK-NEXT:    [[TMP3201:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3200]] seq_cst, align 8
18927 // CHECK-NEXT:    store i64 [[TMP3201]], i64* [[LV]], align 8
18928 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18929 // CHECK-NEXT:    [[TMP3202:%.*]] = load i64, i64* [[LE]], align 8
18930 // CHECK-NEXT:    [[TMP3203:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3202]] seq_cst, align 8
18931 // CHECK-NEXT:    store i64 [[TMP3203]], i64* [[LV]], align 8
18932 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18933 // CHECK-NEXT:    [[TMP3204:%.*]] = load i64, i64* [[LE]], align 8
18934 // CHECK-NEXT:    [[TMP3205:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3204]] seq_cst, align 8
18935 // CHECK-NEXT:    store i64 [[TMP3205]], i64* [[LV]], align 8
18936 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18937 // CHECK-NEXT:    [[TMP3206:%.*]] = load i64, i64* [[LE]], align 8
18938 // CHECK-NEXT:    [[TMP3207:%.*]] = load i64, i64* [[LD]], align 8
18939 // CHECK-NEXT:    [[TMP3208:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3206]], i64 [[TMP3207]] seq_cst seq_cst, align 8
18940 // CHECK-NEXT:    [[TMP3209:%.*]] = extractvalue { i64, i1 } [[TMP3208]], 0
18941 // CHECK-NEXT:    store i64 [[TMP3209]], i64* [[LV]], align 8
18942 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18943 // CHECK-NEXT:    [[TMP3210:%.*]] = load i64, i64* [[LE]], align 8
18944 // CHECK-NEXT:    [[TMP3211:%.*]] = load i64, i64* [[LD]], align 8
18945 // CHECK-NEXT:    [[TMP3212:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3210]], i64 [[TMP3211]] seq_cst seq_cst, align 8
18946 // CHECK-NEXT:    [[TMP3213:%.*]] = extractvalue { i64, i1 } [[TMP3212]], 0
18947 // CHECK-NEXT:    store i64 [[TMP3213]], i64* [[LV]], align 8
18948 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18949 // CHECK-NEXT:    [[TMP3214:%.*]] = load i64, i64* [[LE]], align 8
18950 // CHECK-NEXT:    [[TMP3215:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3214]] seq_cst, align 8
18951 // CHECK-NEXT:    [[TMP3216:%.*]] = icmp sgt i64 [[TMP3215]], [[TMP3214]]
18952 // CHECK-NEXT:    [[TMP3217:%.*]] = select i1 [[TMP3216]], i64 [[TMP3214]], i64 [[TMP3215]]
18953 // CHECK-NEXT:    store i64 [[TMP3217]], i64* [[LV]], align 8
18954 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18955 // CHECK-NEXT:    [[TMP3218:%.*]] = load i64, i64* [[LE]], align 8
18956 // CHECK-NEXT:    [[TMP3219:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3218]] seq_cst, align 8
18957 // CHECK-NEXT:    [[TMP3220:%.*]] = icmp slt i64 [[TMP3219]], [[TMP3218]]
18958 // CHECK-NEXT:    [[TMP3221:%.*]] = select i1 [[TMP3220]], i64 [[TMP3218]], i64 [[TMP3219]]
18959 // CHECK-NEXT:    store i64 [[TMP3221]], i64* [[LV]], align 8
18960 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18961 // CHECK-NEXT:    [[TMP3222:%.*]] = load i64, i64* [[LE]], align 8
18962 // CHECK-NEXT:    [[TMP3223:%.*]] = atomicrmw min i64* [[LX]], i64 [[TMP3222]] seq_cst, align 8
18963 // CHECK-NEXT:    [[TMP3224:%.*]] = icmp slt i64 [[TMP3223]], [[TMP3222]]
18964 // CHECK-NEXT:    [[TMP3225:%.*]] = select i1 [[TMP3224]], i64 [[TMP3222]], i64 [[TMP3223]]
18965 // CHECK-NEXT:    store i64 [[TMP3225]], i64* [[LV]], align 8
18966 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18967 // CHECK-NEXT:    [[TMP3226:%.*]] = load i64, i64* [[LE]], align 8
18968 // CHECK-NEXT:    [[TMP3227:%.*]] = atomicrmw max i64* [[LX]], i64 [[TMP3226]] seq_cst, align 8
18969 // CHECK-NEXT:    [[TMP3228:%.*]] = icmp sgt i64 [[TMP3227]], [[TMP3226]]
18970 // CHECK-NEXT:    [[TMP3229:%.*]] = select i1 [[TMP3228]], i64 [[TMP3226]], i64 [[TMP3227]]
18971 // CHECK-NEXT:    store i64 [[TMP3229]], i64* [[LV]], align 8
18972 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18973 // CHECK-NEXT:    [[TMP3230:%.*]] = load i64, i64* [[LE]], align 8
18974 // CHECK-NEXT:    [[TMP3231:%.*]] = load i64, i64* [[LD]], align 8
18975 // CHECK-NEXT:    [[TMP3232:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3230]], i64 [[TMP3231]] seq_cst seq_cst, align 8
18976 // CHECK-NEXT:    [[TMP3233:%.*]] = extractvalue { i64, i1 } [[TMP3232]], 0
18977 // CHECK-NEXT:    [[TMP3234:%.*]] = extractvalue { i64, i1 } [[TMP3232]], 1
18978 // CHECK-NEXT:    [[TMP3235:%.*]] = select i1 [[TMP3234]], i64 [[TMP3230]], i64 [[TMP3233]]
18979 // CHECK-NEXT:    store i64 [[TMP3235]], i64* [[LV]], align 8
18980 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18981 // CHECK-NEXT:    [[TMP3236:%.*]] = load i64, i64* [[LE]], align 8
18982 // CHECK-NEXT:    [[TMP3237:%.*]] = load i64, i64* [[LD]], align 8
18983 // CHECK-NEXT:    [[TMP3238:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3236]], i64 [[TMP3237]] seq_cst seq_cst, align 8
18984 // CHECK-NEXT:    [[TMP3239:%.*]] = extractvalue { i64, i1 } [[TMP3238]], 0
18985 // CHECK-NEXT:    [[TMP3240:%.*]] = extractvalue { i64, i1 } [[TMP3238]], 1
18986 // CHECK-NEXT:    [[TMP3241:%.*]] = select i1 [[TMP3240]], i64 [[TMP3236]], i64 [[TMP3239]]
18987 // CHECK-NEXT:    store i64 [[TMP3241]], i64* [[LV]], align 8
18988 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
18989 // CHECK-NEXT:    [[TMP3242:%.*]] = load i64, i64* [[LE]], align 8
18990 // CHECK-NEXT:    [[TMP3243:%.*]] = load i64, i64* [[LD]], align 8
18991 // CHECK-NEXT:    [[TMP3244:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3242]], i64 [[TMP3243]] seq_cst seq_cst, align 8
18992 // CHECK-NEXT:    [[TMP3245:%.*]] = extractvalue { i64, i1 } [[TMP3244]], 0
18993 // CHECK-NEXT:    [[TMP3246:%.*]] = extractvalue { i64, i1 } [[TMP3244]], 1
18994 // CHECK-NEXT:    br i1 [[TMP3246]], label [[LX_ATOMIC_EXIT315:%.*]], label [[LX_ATOMIC_CONT316:%.*]]
18995 // CHECK:       lx.atomic.cont316:
18996 // CHECK-NEXT:    store i64 [[TMP3245]], i64* [[LV]], align 8
18997 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT315]]
18998 // CHECK:       lx.atomic.exit315:
18999 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19000 // CHECK-NEXT:    [[TMP3247:%.*]] = load i64, i64* [[LE]], align 8
19001 // CHECK-NEXT:    [[TMP3248:%.*]] = load i64, i64* [[LD]], align 8
19002 // CHECK-NEXT:    [[TMP3249:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3247]], i64 [[TMP3248]] seq_cst seq_cst, align 8
19003 // CHECK-NEXT:    [[TMP3250:%.*]] = extractvalue { i64, i1 } [[TMP3249]], 0
19004 // CHECK-NEXT:    [[TMP3251:%.*]] = extractvalue { i64, i1 } [[TMP3249]], 1
19005 // CHECK-NEXT:    br i1 [[TMP3251]], label [[LX_ATOMIC_EXIT317:%.*]], label [[LX_ATOMIC_CONT318:%.*]]
19006 // CHECK:       lx.atomic.cont318:
19007 // CHECK-NEXT:    store i64 [[TMP3250]], i64* [[LV]], align 8
19008 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT317]]
19009 // CHECK:       lx.atomic.exit317:
19010 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19011 // CHECK-NEXT:    [[TMP3252:%.*]] = load i64, i64* [[LE]], align 8
19012 // CHECK-NEXT:    [[TMP3253:%.*]] = load i64, i64* [[LD]], align 8
19013 // CHECK-NEXT:    [[TMP3254:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3252]], i64 [[TMP3253]] seq_cst seq_cst, align 8
19014 // CHECK-NEXT:    [[TMP3255:%.*]] = extractvalue { i64, i1 } [[TMP3254]], 1
19015 // CHECK-NEXT:    [[TMP3256:%.*]] = sext i1 [[TMP3255]] to i64
19016 // CHECK-NEXT:    store i64 [[TMP3256]], i64* [[LR]], align 8
19017 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19018 // CHECK-NEXT:    [[TMP3257:%.*]] = load i64, i64* [[LE]], align 8
19019 // CHECK-NEXT:    [[TMP3258:%.*]] = load i64, i64* [[LD]], align 8
19020 // CHECK-NEXT:    [[TMP3259:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3257]], i64 [[TMP3258]] seq_cst seq_cst, align 8
19021 // CHECK-NEXT:    [[TMP3260:%.*]] = extractvalue { i64, i1 } [[TMP3259]], 1
19022 // CHECK-NEXT:    [[TMP3261:%.*]] = sext i1 [[TMP3260]] to i64
19023 // CHECK-NEXT:    store i64 [[TMP3261]], i64* [[LR]], align 8
19024 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19025 // CHECK-NEXT:    [[TMP3262:%.*]] = load i64, i64* [[LE]], align 8
19026 // CHECK-NEXT:    [[TMP3263:%.*]] = load i64, i64* [[LD]], align 8
19027 // CHECK-NEXT:    [[TMP3264:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3262]], i64 [[TMP3263]] seq_cst seq_cst, align 8
19028 // CHECK-NEXT:    [[TMP3265:%.*]] = extractvalue { i64, i1 } [[TMP3264]], 0
19029 // CHECK-NEXT:    [[TMP3266:%.*]] = extractvalue { i64, i1 } [[TMP3264]], 1
19030 // CHECK-NEXT:    br i1 [[TMP3266]], label [[LX_ATOMIC_EXIT319:%.*]], label [[LX_ATOMIC_CONT320:%.*]]
19031 // CHECK:       lx.atomic.cont320:
19032 // CHECK-NEXT:    store i64 [[TMP3265]], i64* [[LV]], align 8
19033 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT319]]
19034 // CHECK:       lx.atomic.exit319:
19035 // CHECK-NEXT:    [[TMP3267:%.*]] = extractvalue { i64, i1 } [[TMP3264]], 1
19036 // CHECK-NEXT:    [[TMP3268:%.*]] = sext i1 [[TMP3267]] to i64
19037 // CHECK-NEXT:    store i64 [[TMP3268]], i64* [[LR]], align 8
19038 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19039 // CHECK-NEXT:    [[TMP3269:%.*]] = load i64, i64* [[LE]], align 8
19040 // CHECK-NEXT:    [[TMP3270:%.*]] = load i64, i64* [[LD]], align 8
19041 // CHECK-NEXT:    [[TMP3271:%.*]] = cmpxchg i64* [[LX]], i64 [[TMP3269]], i64 [[TMP3270]] seq_cst seq_cst, align 8
19042 // CHECK-NEXT:    [[TMP3272:%.*]] = extractvalue { i64, i1 } [[TMP3271]], 0
19043 // CHECK-NEXT:    [[TMP3273:%.*]] = extractvalue { i64, i1 } [[TMP3271]], 1
19044 // CHECK-NEXT:    br i1 [[TMP3273]], label [[LX_ATOMIC_EXIT321:%.*]], label [[LX_ATOMIC_CONT322:%.*]]
19045 // CHECK:       lx.atomic.cont322:
19046 // CHECK-NEXT:    store i64 [[TMP3272]], i64* [[LV]], align 8
19047 // CHECK-NEXT:    br label [[LX_ATOMIC_EXIT321]]
19048 // CHECK:       lx.atomic.exit321:
19049 // CHECK-NEXT:    [[TMP3274:%.*]] = extractvalue { i64, i1 } [[TMP3271]], 1
19050 // CHECK-NEXT:    [[TMP3275:%.*]] = sext i1 [[TMP3274]] to i64
19051 // CHECK-NEXT:    store i64 [[TMP3275]], i64* [[LR]], align 8
19052 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19053 // CHECK-NEXT:    [[TMP3276:%.*]] = load i64, i64* [[ULE]], align 8
19054 // CHECK-NEXT:    [[TMP3277:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3276]] monotonic, align 8
19055 // CHECK-NEXT:    store i64 [[TMP3277]], i64* [[ULV]], align 8
19056 // CHECK-NEXT:    [[TMP3278:%.*]] = load i64, i64* [[ULE]], align 8
19057 // CHECK-NEXT:    [[TMP3279:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3278]] monotonic, align 8
19058 // CHECK-NEXT:    store i64 [[TMP3279]], i64* [[ULV]], align 8
19059 // CHECK-NEXT:    [[TMP3280:%.*]] = load i64, i64* [[ULE]], align 8
19060 // CHECK-NEXT:    [[TMP3281:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3280]] monotonic, align 8
19061 // CHECK-NEXT:    store i64 [[TMP3281]], i64* [[ULV]], align 8
19062 // CHECK-NEXT:    [[TMP3282:%.*]] = load i64, i64* [[ULE]], align 8
19063 // CHECK-NEXT:    [[TMP3283:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3282]] monotonic, align 8
19064 // CHECK-NEXT:    store i64 [[TMP3283]], i64* [[ULV]], align 8
19065 // CHECK-NEXT:    [[TMP3284:%.*]] = load i64, i64* [[ULE]], align 8
19066 // CHECK-NEXT:    [[TMP3285:%.*]] = load i64, i64* [[ULD]], align 8
19067 // CHECK-NEXT:    [[TMP3286:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3284]], i64 [[TMP3285]] monotonic monotonic, align 8
19068 // CHECK-NEXT:    [[TMP3287:%.*]] = extractvalue { i64, i1 } [[TMP3286]], 0
19069 // CHECK-NEXT:    store i64 [[TMP3287]], i64* [[ULV]], align 8
19070 // CHECK-NEXT:    [[TMP3288:%.*]] = load i64, i64* [[ULE]], align 8
19071 // CHECK-NEXT:    [[TMP3289:%.*]] = load i64, i64* [[ULD]], align 8
19072 // CHECK-NEXT:    [[TMP3290:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3288]], i64 [[TMP3289]] monotonic monotonic, align 8
19073 // CHECK-NEXT:    [[TMP3291:%.*]] = extractvalue { i64, i1 } [[TMP3290]], 0
19074 // CHECK-NEXT:    store i64 [[TMP3291]], i64* [[ULV]], align 8
19075 // CHECK-NEXT:    [[TMP3292:%.*]] = load i64, i64* [[ULE]], align 8
19076 // CHECK-NEXT:    [[TMP3293:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3292]] monotonic, align 8
19077 // CHECK-NEXT:    [[TMP3294:%.*]] = icmp ugt i64 [[TMP3293]], [[TMP3292]]
19078 // CHECK-NEXT:    [[TMP3295:%.*]] = select i1 [[TMP3294]], i64 [[TMP3292]], i64 [[TMP3293]]
19079 // CHECK-NEXT:    store i64 [[TMP3295]], i64* [[ULV]], align 8
19080 // CHECK-NEXT:    [[TMP3296:%.*]] = load i64, i64* [[ULE]], align 8
19081 // CHECK-NEXT:    [[TMP3297:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3296]] monotonic, align 8
19082 // CHECK-NEXT:    [[TMP3298:%.*]] = icmp ult i64 [[TMP3297]], [[TMP3296]]
19083 // CHECK-NEXT:    [[TMP3299:%.*]] = select i1 [[TMP3298]], i64 [[TMP3296]], i64 [[TMP3297]]
19084 // CHECK-NEXT:    store i64 [[TMP3299]], i64* [[ULV]], align 8
19085 // CHECK-NEXT:    [[TMP3300:%.*]] = load i64, i64* [[ULE]], align 8
19086 // CHECK-NEXT:    [[TMP3301:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3300]] monotonic, align 8
19087 // CHECK-NEXT:    [[TMP3302:%.*]] = icmp ult i64 [[TMP3301]], [[TMP3300]]
19088 // CHECK-NEXT:    [[TMP3303:%.*]] = select i1 [[TMP3302]], i64 [[TMP3300]], i64 [[TMP3301]]
19089 // CHECK-NEXT:    store i64 [[TMP3303]], i64* [[ULV]], align 8
19090 // CHECK-NEXT:    [[TMP3304:%.*]] = load i64, i64* [[ULE]], align 8
19091 // CHECK-NEXT:    [[TMP3305:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3304]] monotonic, align 8
19092 // CHECK-NEXT:    [[TMP3306:%.*]] = icmp ugt i64 [[TMP3305]], [[TMP3304]]
19093 // CHECK-NEXT:    [[TMP3307:%.*]] = select i1 [[TMP3306]], i64 [[TMP3304]], i64 [[TMP3305]]
19094 // CHECK-NEXT:    store i64 [[TMP3307]], i64* [[ULV]], align 8
19095 // CHECK-NEXT:    [[TMP3308:%.*]] = load i64, i64* [[ULE]], align 8
19096 // CHECK-NEXT:    [[TMP3309:%.*]] = load i64, i64* [[ULD]], align 8
19097 // CHECK-NEXT:    [[TMP3310:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3308]], i64 [[TMP3309]] monotonic monotonic, align 8
19098 // CHECK-NEXT:    [[TMP3311:%.*]] = extractvalue { i64, i1 } [[TMP3310]], 0
19099 // CHECK-NEXT:    [[TMP3312:%.*]] = extractvalue { i64, i1 } [[TMP3310]], 1
19100 // CHECK-NEXT:    [[TMP3313:%.*]] = select i1 [[TMP3312]], i64 [[TMP3308]], i64 [[TMP3311]]
19101 // CHECK-NEXT:    store i64 [[TMP3313]], i64* [[ULV]], align 8
19102 // CHECK-NEXT:    [[TMP3314:%.*]] = load i64, i64* [[ULE]], align 8
19103 // CHECK-NEXT:    [[TMP3315:%.*]] = load i64, i64* [[ULD]], align 8
19104 // CHECK-NEXT:    [[TMP3316:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3314]], i64 [[TMP3315]] monotonic monotonic, align 8
19105 // CHECK-NEXT:    [[TMP3317:%.*]] = extractvalue { i64, i1 } [[TMP3316]], 0
19106 // CHECK-NEXT:    [[TMP3318:%.*]] = extractvalue { i64, i1 } [[TMP3316]], 1
19107 // CHECK-NEXT:    [[TMP3319:%.*]] = select i1 [[TMP3318]], i64 [[TMP3314]], i64 [[TMP3317]]
19108 // CHECK-NEXT:    store i64 [[TMP3319]], i64* [[ULV]], align 8
19109 // CHECK-NEXT:    [[TMP3320:%.*]] = load i64, i64* [[ULE]], align 8
19110 // CHECK-NEXT:    [[TMP3321:%.*]] = load i64, i64* [[ULD]], align 8
19111 // CHECK-NEXT:    [[TMP3322:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3320]], i64 [[TMP3321]] monotonic monotonic, align 8
19112 // CHECK-NEXT:    [[TMP3323:%.*]] = extractvalue { i64, i1 } [[TMP3322]], 0
19113 // CHECK-NEXT:    [[TMP3324:%.*]] = extractvalue { i64, i1 } [[TMP3322]], 1
19114 // CHECK-NEXT:    br i1 [[TMP3324]], label [[ULX_ATOMIC_EXIT:%.*]], label [[ULX_ATOMIC_CONT:%.*]]
19115 // CHECK:       ulx.atomic.cont:
19116 // CHECK-NEXT:    store i64 [[TMP3323]], i64* [[ULV]], align 8
19117 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT]]
19118 // CHECK:       ulx.atomic.exit:
19119 // CHECK-NEXT:    [[TMP3325:%.*]] = load i64, i64* [[ULE]], align 8
19120 // CHECK-NEXT:    [[TMP3326:%.*]] = load i64, i64* [[ULD]], align 8
19121 // CHECK-NEXT:    [[TMP3327:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3325]], i64 [[TMP3326]] monotonic monotonic, align 8
19122 // CHECK-NEXT:    [[TMP3328:%.*]] = extractvalue { i64, i1 } [[TMP3327]], 0
19123 // CHECK-NEXT:    [[TMP3329:%.*]] = extractvalue { i64, i1 } [[TMP3327]], 1
19124 // CHECK-NEXT:    br i1 [[TMP3329]], label [[ULX_ATOMIC_EXIT323:%.*]], label [[ULX_ATOMIC_CONT324:%.*]]
19125 // CHECK:       ulx.atomic.cont324:
19126 // CHECK-NEXT:    store i64 [[TMP3328]], i64* [[ULV]], align 8
19127 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT323]]
19128 // CHECK:       ulx.atomic.exit323:
19129 // CHECK-NEXT:    [[TMP3330:%.*]] = load i64, i64* [[ULE]], align 8
19130 // CHECK-NEXT:    [[TMP3331:%.*]] = load i64, i64* [[ULD]], align 8
19131 // CHECK-NEXT:    [[TMP3332:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3330]], i64 [[TMP3331]] monotonic monotonic, align 8
19132 // CHECK-NEXT:    [[TMP3333:%.*]] = extractvalue { i64, i1 } [[TMP3332]], 1
19133 // CHECK-NEXT:    [[TMP3334:%.*]] = zext i1 [[TMP3333]] to i64
19134 // CHECK-NEXT:    store i64 [[TMP3334]], i64* [[ULR]], align 8
19135 // CHECK-NEXT:    [[TMP3335:%.*]] = load i64, i64* [[ULE]], align 8
19136 // CHECK-NEXT:    [[TMP3336:%.*]] = load i64, i64* [[ULD]], align 8
19137 // CHECK-NEXT:    [[TMP3337:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3335]], i64 [[TMP3336]] monotonic monotonic, align 8
19138 // CHECK-NEXT:    [[TMP3338:%.*]] = extractvalue { i64, i1 } [[TMP3337]], 1
19139 // CHECK-NEXT:    [[TMP3339:%.*]] = zext i1 [[TMP3338]] to i64
19140 // CHECK-NEXT:    store i64 [[TMP3339]], i64* [[ULR]], align 8
19141 // CHECK-NEXT:    [[TMP3340:%.*]] = load i64, i64* [[ULE]], align 8
19142 // CHECK-NEXT:    [[TMP3341:%.*]] = load i64, i64* [[ULD]], align 8
19143 // CHECK-NEXT:    [[TMP3342:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3340]], i64 [[TMP3341]] monotonic monotonic, align 8
19144 // CHECK-NEXT:    [[TMP3343:%.*]] = extractvalue { i64, i1 } [[TMP3342]], 0
19145 // CHECK-NEXT:    [[TMP3344:%.*]] = extractvalue { i64, i1 } [[TMP3342]], 1
19146 // CHECK-NEXT:    br i1 [[TMP3344]], label [[ULX_ATOMIC_EXIT325:%.*]], label [[ULX_ATOMIC_CONT326:%.*]]
19147 // CHECK:       ulx.atomic.cont326:
19148 // CHECK-NEXT:    store i64 [[TMP3343]], i64* [[ULV]], align 8
19149 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT325]]
19150 // CHECK:       ulx.atomic.exit325:
19151 // CHECK-NEXT:    [[TMP3345:%.*]] = extractvalue { i64, i1 } [[TMP3342]], 1
19152 // CHECK-NEXT:    [[TMP3346:%.*]] = zext i1 [[TMP3345]] to i64
19153 // CHECK-NEXT:    store i64 [[TMP3346]], i64* [[ULR]], align 8
19154 // CHECK-NEXT:    [[TMP3347:%.*]] = load i64, i64* [[ULE]], align 8
19155 // CHECK-NEXT:    [[TMP3348:%.*]] = load i64, i64* [[ULD]], align 8
19156 // CHECK-NEXT:    [[TMP3349:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3347]], i64 [[TMP3348]] monotonic monotonic, align 8
19157 // CHECK-NEXT:    [[TMP3350:%.*]] = extractvalue { i64, i1 } [[TMP3349]], 0
19158 // CHECK-NEXT:    [[TMP3351:%.*]] = extractvalue { i64, i1 } [[TMP3349]], 1
19159 // CHECK-NEXT:    br i1 [[TMP3351]], label [[ULX_ATOMIC_EXIT327:%.*]], label [[ULX_ATOMIC_CONT328:%.*]]
19160 // CHECK:       ulx.atomic.cont328:
19161 // CHECK-NEXT:    store i64 [[TMP3350]], i64* [[ULV]], align 8
19162 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT327]]
19163 // CHECK:       ulx.atomic.exit327:
19164 // CHECK-NEXT:    [[TMP3352:%.*]] = extractvalue { i64, i1 } [[TMP3349]], 1
19165 // CHECK-NEXT:    [[TMP3353:%.*]] = zext i1 [[TMP3352]] to i64
19166 // CHECK-NEXT:    store i64 [[TMP3353]], i64* [[ULR]], align 8
19167 // CHECK-NEXT:    [[TMP3354:%.*]] = load i64, i64* [[ULE]], align 8
19168 // CHECK-NEXT:    [[TMP3355:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3354]] acq_rel, align 8
19169 // CHECK-NEXT:    store i64 [[TMP3355]], i64* [[ULV]], align 8
19170 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19171 // CHECK-NEXT:    [[TMP3356:%.*]] = load i64, i64* [[ULE]], align 8
19172 // CHECK-NEXT:    [[TMP3357:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3356]] acq_rel, align 8
19173 // CHECK-NEXT:    store i64 [[TMP3357]], i64* [[ULV]], align 8
19174 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19175 // CHECK-NEXT:    [[TMP3358:%.*]] = load i64, i64* [[ULE]], align 8
19176 // CHECK-NEXT:    [[TMP3359:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3358]] acq_rel, align 8
19177 // CHECK-NEXT:    store i64 [[TMP3359]], i64* [[ULV]], align 8
19178 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19179 // CHECK-NEXT:    [[TMP3360:%.*]] = load i64, i64* [[ULE]], align 8
19180 // CHECK-NEXT:    [[TMP3361:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3360]] acq_rel, align 8
19181 // CHECK-NEXT:    store i64 [[TMP3361]], i64* [[ULV]], align 8
19182 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19183 // CHECK-NEXT:    [[TMP3362:%.*]] = load i64, i64* [[ULE]], align 8
19184 // CHECK-NEXT:    [[TMP3363:%.*]] = load i64, i64* [[ULD]], align 8
19185 // CHECK-NEXT:    [[TMP3364:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3362]], i64 [[TMP3363]] acq_rel acquire, align 8
19186 // CHECK-NEXT:    [[TMP3365:%.*]] = extractvalue { i64, i1 } [[TMP3364]], 0
19187 // CHECK-NEXT:    store i64 [[TMP3365]], i64* [[ULV]], align 8
19188 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19189 // CHECK-NEXT:    [[TMP3366:%.*]] = load i64, i64* [[ULE]], align 8
19190 // CHECK-NEXT:    [[TMP3367:%.*]] = load i64, i64* [[ULD]], align 8
19191 // CHECK-NEXT:    [[TMP3368:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3366]], i64 [[TMP3367]] acq_rel acquire, align 8
19192 // CHECK-NEXT:    [[TMP3369:%.*]] = extractvalue { i64, i1 } [[TMP3368]], 0
19193 // CHECK-NEXT:    store i64 [[TMP3369]], i64* [[ULV]], align 8
19194 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19195 // CHECK-NEXT:    [[TMP3370:%.*]] = load i64, i64* [[ULE]], align 8
19196 // CHECK-NEXT:    [[TMP3371:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3370]] acq_rel, align 8
19197 // CHECK-NEXT:    [[TMP3372:%.*]] = icmp ugt i64 [[TMP3371]], [[TMP3370]]
19198 // CHECK-NEXT:    [[TMP3373:%.*]] = select i1 [[TMP3372]], i64 [[TMP3370]], i64 [[TMP3371]]
19199 // CHECK-NEXT:    store i64 [[TMP3373]], i64* [[ULV]], align 8
19200 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19201 // CHECK-NEXT:    [[TMP3374:%.*]] = load i64, i64* [[ULE]], align 8
19202 // CHECK-NEXT:    [[TMP3375:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3374]] acq_rel, align 8
19203 // CHECK-NEXT:    [[TMP3376:%.*]] = icmp ult i64 [[TMP3375]], [[TMP3374]]
19204 // CHECK-NEXT:    [[TMP3377:%.*]] = select i1 [[TMP3376]], i64 [[TMP3374]], i64 [[TMP3375]]
19205 // CHECK-NEXT:    store i64 [[TMP3377]], i64* [[ULV]], align 8
19206 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19207 // CHECK-NEXT:    [[TMP3378:%.*]] = load i64, i64* [[ULE]], align 8
19208 // CHECK-NEXT:    [[TMP3379:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3378]] acq_rel, align 8
19209 // CHECK-NEXT:    [[TMP3380:%.*]] = icmp ult i64 [[TMP3379]], [[TMP3378]]
19210 // CHECK-NEXT:    [[TMP3381:%.*]] = select i1 [[TMP3380]], i64 [[TMP3378]], i64 [[TMP3379]]
19211 // CHECK-NEXT:    store i64 [[TMP3381]], i64* [[ULV]], align 8
19212 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19213 // CHECK-NEXT:    [[TMP3382:%.*]] = load i64, i64* [[ULE]], align 8
19214 // CHECK-NEXT:    [[TMP3383:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3382]] acq_rel, align 8
19215 // CHECK-NEXT:    [[TMP3384:%.*]] = icmp ugt i64 [[TMP3383]], [[TMP3382]]
19216 // CHECK-NEXT:    [[TMP3385:%.*]] = select i1 [[TMP3384]], i64 [[TMP3382]], i64 [[TMP3383]]
19217 // CHECK-NEXT:    store i64 [[TMP3385]], i64* [[ULV]], align 8
19218 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19219 // CHECK-NEXT:    [[TMP3386:%.*]] = load i64, i64* [[ULE]], align 8
19220 // CHECK-NEXT:    [[TMP3387:%.*]] = load i64, i64* [[ULD]], align 8
19221 // CHECK-NEXT:    [[TMP3388:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3386]], i64 [[TMP3387]] acq_rel acquire, align 8
19222 // CHECK-NEXT:    [[TMP3389:%.*]] = extractvalue { i64, i1 } [[TMP3388]], 0
19223 // CHECK-NEXT:    [[TMP3390:%.*]] = extractvalue { i64, i1 } [[TMP3388]], 1
19224 // CHECK-NEXT:    [[TMP3391:%.*]] = select i1 [[TMP3390]], i64 [[TMP3386]], i64 [[TMP3389]]
19225 // CHECK-NEXT:    store i64 [[TMP3391]], i64* [[ULV]], align 8
19226 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19227 // CHECK-NEXT:    [[TMP3392:%.*]] = load i64, i64* [[ULE]], align 8
19228 // CHECK-NEXT:    [[TMP3393:%.*]] = load i64, i64* [[ULD]], align 8
19229 // CHECK-NEXT:    [[TMP3394:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3392]], i64 [[TMP3393]] acq_rel acquire, align 8
19230 // CHECK-NEXT:    [[TMP3395:%.*]] = extractvalue { i64, i1 } [[TMP3394]], 0
19231 // CHECK-NEXT:    [[TMP3396:%.*]] = extractvalue { i64, i1 } [[TMP3394]], 1
19232 // CHECK-NEXT:    [[TMP3397:%.*]] = select i1 [[TMP3396]], i64 [[TMP3392]], i64 [[TMP3395]]
19233 // CHECK-NEXT:    store i64 [[TMP3397]], i64* [[ULV]], align 8
19234 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19235 // CHECK-NEXT:    [[TMP3398:%.*]] = load i64, i64* [[ULE]], align 8
19236 // CHECK-NEXT:    [[TMP3399:%.*]] = load i64, i64* [[ULD]], align 8
19237 // CHECK-NEXT:    [[TMP3400:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3398]], i64 [[TMP3399]] acq_rel acquire, align 8
19238 // CHECK-NEXT:    [[TMP3401:%.*]] = extractvalue { i64, i1 } [[TMP3400]], 0
19239 // CHECK-NEXT:    [[TMP3402:%.*]] = extractvalue { i64, i1 } [[TMP3400]], 1
19240 // CHECK-NEXT:    br i1 [[TMP3402]], label [[ULX_ATOMIC_EXIT329:%.*]], label [[ULX_ATOMIC_CONT330:%.*]]
19241 // CHECK:       ulx.atomic.cont330:
19242 // CHECK-NEXT:    store i64 [[TMP3401]], i64* [[ULV]], align 8
19243 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT329]]
19244 // CHECK:       ulx.atomic.exit329:
19245 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19246 // CHECK-NEXT:    [[TMP3403:%.*]] = load i64, i64* [[ULE]], align 8
19247 // CHECK-NEXT:    [[TMP3404:%.*]] = load i64, i64* [[ULD]], align 8
19248 // CHECK-NEXT:    [[TMP3405:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3403]], i64 [[TMP3404]] acq_rel acquire, align 8
19249 // CHECK-NEXT:    [[TMP3406:%.*]] = extractvalue { i64, i1 } [[TMP3405]], 0
19250 // CHECK-NEXT:    [[TMP3407:%.*]] = extractvalue { i64, i1 } [[TMP3405]], 1
19251 // CHECK-NEXT:    br i1 [[TMP3407]], label [[ULX_ATOMIC_EXIT331:%.*]], label [[ULX_ATOMIC_CONT332:%.*]]
19252 // CHECK:       ulx.atomic.cont332:
19253 // CHECK-NEXT:    store i64 [[TMP3406]], i64* [[ULV]], align 8
19254 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT331]]
19255 // CHECK:       ulx.atomic.exit331:
19256 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19257 // CHECK-NEXT:    [[TMP3408:%.*]] = load i64, i64* [[ULE]], align 8
19258 // CHECK-NEXT:    [[TMP3409:%.*]] = load i64, i64* [[ULD]], align 8
19259 // CHECK-NEXT:    [[TMP3410:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3408]], i64 [[TMP3409]] acq_rel acquire, align 8
19260 // CHECK-NEXT:    [[TMP3411:%.*]] = extractvalue { i64, i1 } [[TMP3410]], 1
19261 // CHECK-NEXT:    [[TMP3412:%.*]] = zext i1 [[TMP3411]] to i64
19262 // CHECK-NEXT:    store i64 [[TMP3412]], i64* [[ULR]], align 8
19263 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19264 // CHECK-NEXT:    [[TMP3413:%.*]] = load i64, i64* [[ULE]], align 8
19265 // CHECK-NEXT:    [[TMP3414:%.*]] = load i64, i64* [[ULD]], align 8
19266 // CHECK-NEXT:    [[TMP3415:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3413]], i64 [[TMP3414]] acq_rel acquire, align 8
19267 // CHECK-NEXT:    [[TMP3416:%.*]] = extractvalue { i64, i1 } [[TMP3415]], 1
19268 // CHECK-NEXT:    [[TMP3417:%.*]] = zext i1 [[TMP3416]] to i64
19269 // CHECK-NEXT:    store i64 [[TMP3417]], i64* [[ULR]], align 8
19270 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19271 // CHECK-NEXT:    [[TMP3418:%.*]] = load i64, i64* [[ULE]], align 8
19272 // CHECK-NEXT:    [[TMP3419:%.*]] = load i64, i64* [[ULD]], align 8
19273 // CHECK-NEXT:    [[TMP3420:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3418]], i64 [[TMP3419]] acq_rel acquire, align 8
19274 // CHECK-NEXT:    [[TMP3421:%.*]] = extractvalue { i64, i1 } [[TMP3420]], 0
19275 // CHECK-NEXT:    [[TMP3422:%.*]] = extractvalue { i64, i1 } [[TMP3420]], 1
19276 // CHECK-NEXT:    br i1 [[TMP3422]], label [[ULX_ATOMIC_EXIT333:%.*]], label [[ULX_ATOMIC_CONT334:%.*]]
19277 // CHECK:       ulx.atomic.cont334:
19278 // CHECK-NEXT:    store i64 [[TMP3421]], i64* [[ULV]], align 8
19279 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT333]]
19280 // CHECK:       ulx.atomic.exit333:
19281 // CHECK-NEXT:    [[TMP3423:%.*]] = extractvalue { i64, i1 } [[TMP3420]], 1
19282 // CHECK-NEXT:    [[TMP3424:%.*]] = zext i1 [[TMP3423]] to i64
19283 // CHECK-NEXT:    store i64 [[TMP3424]], i64* [[ULR]], align 8
19284 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19285 // CHECK-NEXT:    [[TMP3425:%.*]] = load i64, i64* [[ULE]], align 8
19286 // CHECK-NEXT:    [[TMP3426:%.*]] = load i64, i64* [[ULD]], align 8
19287 // CHECK-NEXT:    [[TMP3427:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3425]], i64 [[TMP3426]] acq_rel acquire, align 8
19288 // CHECK-NEXT:    [[TMP3428:%.*]] = extractvalue { i64, i1 } [[TMP3427]], 0
19289 // CHECK-NEXT:    [[TMP3429:%.*]] = extractvalue { i64, i1 } [[TMP3427]], 1
19290 // CHECK-NEXT:    br i1 [[TMP3429]], label [[ULX_ATOMIC_EXIT335:%.*]], label [[ULX_ATOMIC_CONT336:%.*]]
19291 // CHECK:       ulx.atomic.cont336:
19292 // CHECK-NEXT:    store i64 [[TMP3428]], i64* [[ULV]], align 8
19293 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT335]]
19294 // CHECK:       ulx.atomic.exit335:
19295 // CHECK-NEXT:    [[TMP3430:%.*]] = extractvalue { i64, i1 } [[TMP3427]], 1
19296 // CHECK-NEXT:    [[TMP3431:%.*]] = zext i1 [[TMP3430]] to i64
19297 // CHECK-NEXT:    store i64 [[TMP3431]], i64* [[ULR]], align 8
19298 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19299 // CHECK-NEXT:    [[TMP3432:%.*]] = load i64, i64* [[ULE]], align 8
19300 // CHECK-NEXT:    [[TMP3433:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3432]] acquire, align 8
19301 // CHECK-NEXT:    store i64 [[TMP3433]], i64* [[ULV]], align 8
19302 // CHECK-NEXT:    [[TMP3434:%.*]] = load i64, i64* [[ULE]], align 8
19303 // CHECK-NEXT:    [[TMP3435:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3434]] acquire, align 8
19304 // CHECK-NEXT:    store i64 [[TMP3435]], i64* [[ULV]], align 8
19305 // CHECK-NEXT:    [[TMP3436:%.*]] = load i64, i64* [[ULE]], align 8
19306 // CHECK-NEXT:    [[TMP3437:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3436]] acquire, align 8
19307 // CHECK-NEXT:    store i64 [[TMP3437]], i64* [[ULV]], align 8
19308 // CHECK-NEXT:    [[TMP3438:%.*]] = load i64, i64* [[ULE]], align 8
19309 // CHECK-NEXT:    [[TMP3439:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3438]] acquire, align 8
19310 // CHECK-NEXT:    store i64 [[TMP3439]], i64* [[ULV]], align 8
19311 // CHECK-NEXT:    [[TMP3440:%.*]] = load i64, i64* [[ULE]], align 8
19312 // CHECK-NEXT:    [[TMP3441:%.*]] = load i64, i64* [[ULD]], align 8
19313 // CHECK-NEXT:    [[TMP3442:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3440]], i64 [[TMP3441]] acquire acquire, align 8
19314 // CHECK-NEXT:    [[TMP3443:%.*]] = extractvalue { i64, i1 } [[TMP3442]], 0
19315 // CHECK-NEXT:    store i64 [[TMP3443]], i64* [[ULV]], align 8
19316 // CHECK-NEXT:    [[TMP3444:%.*]] = load i64, i64* [[ULE]], align 8
19317 // CHECK-NEXT:    [[TMP3445:%.*]] = load i64, i64* [[ULD]], align 8
19318 // CHECK-NEXT:    [[TMP3446:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3444]], i64 [[TMP3445]] acquire acquire, align 8
19319 // CHECK-NEXT:    [[TMP3447:%.*]] = extractvalue { i64, i1 } [[TMP3446]], 0
19320 // CHECK-NEXT:    store i64 [[TMP3447]], i64* [[ULV]], align 8
19321 // CHECK-NEXT:    [[TMP3448:%.*]] = load i64, i64* [[ULE]], align 8
19322 // CHECK-NEXT:    [[TMP3449:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3448]] acquire, align 8
19323 // CHECK-NEXT:    [[TMP3450:%.*]] = icmp ugt i64 [[TMP3449]], [[TMP3448]]
19324 // CHECK-NEXT:    [[TMP3451:%.*]] = select i1 [[TMP3450]], i64 [[TMP3448]], i64 [[TMP3449]]
19325 // CHECK-NEXT:    store i64 [[TMP3451]], i64* [[ULV]], align 8
19326 // CHECK-NEXT:    [[TMP3452:%.*]] = load i64, i64* [[ULE]], align 8
19327 // CHECK-NEXT:    [[TMP3453:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3452]] acquire, align 8
19328 // CHECK-NEXT:    [[TMP3454:%.*]] = icmp ult i64 [[TMP3453]], [[TMP3452]]
19329 // CHECK-NEXT:    [[TMP3455:%.*]] = select i1 [[TMP3454]], i64 [[TMP3452]], i64 [[TMP3453]]
19330 // CHECK-NEXT:    store i64 [[TMP3455]], i64* [[ULV]], align 8
19331 // CHECK-NEXT:    [[TMP3456:%.*]] = load i64, i64* [[ULE]], align 8
19332 // CHECK-NEXT:    [[TMP3457:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3456]] acquire, align 8
19333 // CHECK-NEXT:    [[TMP3458:%.*]] = icmp ult i64 [[TMP3457]], [[TMP3456]]
19334 // CHECK-NEXT:    [[TMP3459:%.*]] = select i1 [[TMP3458]], i64 [[TMP3456]], i64 [[TMP3457]]
19335 // CHECK-NEXT:    store i64 [[TMP3459]], i64* [[ULV]], align 8
19336 // CHECK-NEXT:    [[TMP3460:%.*]] = load i64, i64* [[ULE]], align 8
19337 // CHECK-NEXT:    [[TMP3461:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3460]] acquire, align 8
19338 // CHECK-NEXT:    [[TMP3462:%.*]] = icmp ugt i64 [[TMP3461]], [[TMP3460]]
19339 // CHECK-NEXT:    [[TMP3463:%.*]] = select i1 [[TMP3462]], i64 [[TMP3460]], i64 [[TMP3461]]
19340 // CHECK-NEXT:    store i64 [[TMP3463]], i64* [[ULV]], align 8
19341 // CHECK-NEXT:    [[TMP3464:%.*]] = load i64, i64* [[ULE]], align 8
19342 // CHECK-NEXT:    [[TMP3465:%.*]] = load i64, i64* [[ULD]], align 8
19343 // CHECK-NEXT:    [[TMP3466:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3464]], i64 [[TMP3465]] acquire acquire, align 8
19344 // CHECK-NEXT:    [[TMP3467:%.*]] = extractvalue { i64, i1 } [[TMP3466]], 0
19345 // CHECK-NEXT:    [[TMP3468:%.*]] = extractvalue { i64, i1 } [[TMP3466]], 1
19346 // CHECK-NEXT:    [[TMP3469:%.*]] = select i1 [[TMP3468]], i64 [[TMP3464]], i64 [[TMP3467]]
19347 // CHECK-NEXT:    store i64 [[TMP3469]], i64* [[ULV]], align 8
19348 // CHECK-NEXT:    [[TMP3470:%.*]] = load i64, i64* [[ULE]], align 8
19349 // CHECK-NEXT:    [[TMP3471:%.*]] = load i64, i64* [[ULD]], align 8
19350 // CHECK-NEXT:    [[TMP3472:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3470]], i64 [[TMP3471]] acquire acquire, align 8
19351 // CHECK-NEXT:    [[TMP3473:%.*]] = extractvalue { i64, i1 } [[TMP3472]], 0
19352 // CHECK-NEXT:    [[TMP3474:%.*]] = extractvalue { i64, i1 } [[TMP3472]], 1
19353 // CHECK-NEXT:    [[TMP3475:%.*]] = select i1 [[TMP3474]], i64 [[TMP3470]], i64 [[TMP3473]]
19354 // CHECK-NEXT:    store i64 [[TMP3475]], i64* [[ULV]], align 8
19355 // CHECK-NEXT:    [[TMP3476:%.*]] = load i64, i64* [[ULE]], align 8
19356 // CHECK-NEXT:    [[TMP3477:%.*]] = load i64, i64* [[ULD]], align 8
19357 // CHECK-NEXT:    [[TMP3478:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3476]], i64 [[TMP3477]] acquire acquire, align 8
19358 // CHECK-NEXT:    [[TMP3479:%.*]] = extractvalue { i64, i1 } [[TMP3478]], 0
19359 // CHECK-NEXT:    [[TMP3480:%.*]] = extractvalue { i64, i1 } [[TMP3478]], 1
19360 // CHECK-NEXT:    br i1 [[TMP3480]], label [[ULX_ATOMIC_EXIT337:%.*]], label [[ULX_ATOMIC_CONT338:%.*]]
19361 // CHECK:       ulx.atomic.cont338:
19362 // CHECK-NEXT:    store i64 [[TMP3479]], i64* [[ULV]], align 8
19363 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT337]]
19364 // CHECK:       ulx.atomic.exit337:
19365 // CHECK-NEXT:    [[TMP3481:%.*]] = load i64, i64* [[ULE]], align 8
19366 // CHECK-NEXT:    [[TMP3482:%.*]] = load i64, i64* [[ULD]], align 8
19367 // CHECK-NEXT:    [[TMP3483:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3481]], i64 [[TMP3482]] acquire acquire, align 8
19368 // CHECK-NEXT:    [[TMP3484:%.*]] = extractvalue { i64, i1 } [[TMP3483]], 0
19369 // CHECK-NEXT:    [[TMP3485:%.*]] = extractvalue { i64, i1 } [[TMP3483]], 1
19370 // CHECK-NEXT:    br i1 [[TMP3485]], label [[ULX_ATOMIC_EXIT339:%.*]], label [[ULX_ATOMIC_CONT340:%.*]]
19371 // CHECK:       ulx.atomic.cont340:
19372 // CHECK-NEXT:    store i64 [[TMP3484]], i64* [[ULV]], align 8
19373 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT339]]
19374 // CHECK:       ulx.atomic.exit339:
19375 // CHECK-NEXT:    [[TMP3486:%.*]] = load i64, i64* [[ULE]], align 8
19376 // CHECK-NEXT:    [[TMP3487:%.*]] = load i64, i64* [[ULD]], align 8
19377 // CHECK-NEXT:    [[TMP3488:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3486]], i64 [[TMP3487]] acquire acquire, align 8
19378 // CHECK-NEXT:    [[TMP3489:%.*]] = extractvalue { i64, i1 } [[TMP3488]], 1
19379 // CHECK-NEXT:    [[TMP3490:%.*]] = zext i1 [[TMP3489]] to i64
19380 // CHECK-NEXT:    store i64 [[TMP3490]], i64* [[ULR]], align 8
19381 // CHECK-NEXT:    [[TMP3491:%.*]] = load i64, i64* [[ULE]], align 8
19382 // CHECK-NEXT:    [[TMP3492:%.*]] = load i64, i64* [[ULD]], align 8
19383 // CHECK-NEXT:    [[TMP3493:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3491]], i64 [[TMP3492]] acquire acquire, align 8
19384 // CHECK-NEXT:    [[TMP3494:%.*]] = extractvalue { i64, i1 } [[TMP3493]], 1
19385 // CHECK-NEXT:    [[TMP3495:%.*]] = zext i1 [[TMP3494]] to i64
19386 // CHECK-NEXT:    store i64 [[TMP3495]], i64* [[ULR]], align 8
19387 // CHECK-NEXT:    [[TMP3496:%.*]] = load i64, i64* [[ULE]], align 8
19388 // CHECK-NEXT:    [[TMP3497:%.*]] = load i64, i64* [[ULD]], align 8
19389 // CHECK-NEXT:    [[TMP3498:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3496]], i64 [[TMP3497]] acquire acquire, align 8
19390 // CHECK-NEXT:    [[TMP3499:%.*]] = extractvalue { i64, i1 } [[TMP3498]], 0
19391 // CHECK-NEXT:    [[TMP3500:%.*]] = extractvalue { i64, i1 } [[TMP3498]], 1
19392 // CHECK-NEXT:    br i1 [[TMP3500]], label [[ULX_ATOMIC_EXIT341:%.*]], label [[ULX_ATOMIC_CONT342:%.*]]
19393 // CHECK:       ulx.atomic.cont342:
19394 // CHECK-NEXT:    store i64 [[TMP3499]], i64* [[ULV]], align 8
19395 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT341]]
19396 // CHECK:       ulx.atomic.exit341:
19397 // CHECK-NEXT:    [[TMP3501:%.*]] = extractvalue { i64, i1 } [[TMP3498]], 1
19398 // CHECK-NEXT:    [[TMP3502:%.*]] = zext i1 [[TMP3501]] to i64
19399 // CHECK-NEXT:    store i64 [[TMP3502]], i64* [[ULR]], align 8
19400 // CHECK-NEXT:    [[TMP3503:%.*]] = load i64, i64* [[ULE]], align 8
19401 // CHECK-NEXT:    [[TMP3504:%.*]] = load i64, i64* [[ULD]], align 8
19402 // CHECK-NEXT:    [[TMP3505:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3503]], i64 [[TMP3504]] acquire acquire, align 8
19403 // CHECK-NEXT:    [[TMP3506:%.*]] = extractvalue { i64, i1 } [[TMP3505]], 0
19404 // CHECK-NEXT:    [[TMP3507:%.*]] = extractvalue { i64, i1 } [[TMP3505]], 1
19405 // CHECK-NEXT:    br i1 [[TMP3507]], label [[ULX_ATOMIC_EXIT343:%.*]], label [[ULX_ATOMIC_CONT344:%.*]]
19406 // CHECK:       ulx.atomic.cont344:
19407 // CHECK-NEXT:    store i64 [[TMP3506]], i64* [[ULV]], align 8
19408 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT343]]
19409 // CHECK:       ulx.atomic.exit343:
19410 // CHECK-NEXT:    [[TMP3508:%.*]] = extractvalue { i64, i1 } [[TMP3505]], 1
19411 // CHECK-NEXT:    [[TMP3509:%.*]] = zext i1 [[TMP3508]] to i64
19412 // CHECK-NEXT:    store i64 [[TMP3509]], i64* [[ULR]], align 8
19413 // CHECK-NEXT:    [[TMP3510:%.*]] = load i64, i64* [[ULE]], align 8
19414 // CHECK-NEXT:    [[TMP3511:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3510]] monotonic, align 8
19415 // CHECK-NEXT:    store i64 [[TMP3511]], i64* [[ULV]], align 8
19416 // CHECK-NEXT:    [[TMP3512:%.*]] = load i64, i64* [[ULE]], align 8
19417 // CHECK-NEXT:    [[TMP3513:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3512]] monotonic, align 8
19418 // CHECK-NEXT:    store i64 [[TMP3513]], i64* [[ULV]], align 8
19419 // CHECK-NEXT:    [[TMP3514:%.*]] = load i64, i64* [[ULE]], align 8
19420 // CHECK-NEXT:    [[TMP3515:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3514]] monotonic, align 8
19421 // CHECK-NEXT:    store i64 [[TMP3515]], i64* [[ULV]], align 8
19422 // CHECK-NEXT:    [[TMP3516:%.*]] = load i64, i64* [[ULE]], align 8
19423 // CHECK-NEXT:    [[TMP3517:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3516]] monotonic, align 8
19424 // CHECK-NEXT:    store i64 [[TMP3517]], i64* [[ULV]], align 8
19425 // CHECK-NEXT:    [[TMP3518:%.*]] = load i64, i64* [[ULE]], align 8
19426 // CHECK-NEXT:    [[TMP3519:%.*]] = load i64, i64* [[ULD]], align 8
19427 // CHECK-NEXT:    [[TMP3520:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3518]], i64 [[TMP3519]] monotonic monotonic, align 8
19428 // CHECK-NEXT:    [[TMP3521:%.*]] = extractvalue { i64, i1 } [[TMP3520]], 0
19429 // CHECK-NEXT:    store i64 [[TMP3521]], i64* [[ULV]], align 8
19430 // CHECK-NEXT:    [[TMP3522:%.*]] = load i64, i64* [[ULE]], align 8
19431 // CHECK-NEXT:    [[TMP3523:%.*]] = load i64, i64* [[ULD]], align 8
19432 // CHECK-NEXT:    [[TMP3524:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3522]], i64 [[TMP3523]] monotonic monotonic, align 8
19433 // CHECK-NEXT:    [[TMP3525:%.*]] = extractvalue { i64, i1 } [[TMP3524]], 0
19434 // CHECK-NEXT:    store i64 [[TMP3525]], i64* [[ULV]], align 8
19435 // CHECK-NEXT:    [[TMP3526:%.*]] = load i64, i64* [[ULE]], align 8
19436 // CHECK-NEXT:    [[TMP3527:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3526]] monotonic, align 8
19437 // CHECK-NEXT:    [[TMP3528:%.*]] = icmp ugt i64 [[TMP3527]], [[TMP3526]]
19438 // CHECK-NEXT:    [[TMP3529:%.*]] = select i1 [[TMP3528]], i64 [[TMP3526]], i64 [[TMP3527]]
19439 // CHECK-NEXT:    store i64 [[TMP3529]], i64* [[ULV]], align 8
19440 // CHECK-NEXT:    [[TMP3530:%.*]] = load i64, i64* [[ULE]], align 8
19441 // CHECK-NEXT:    [[TMP3531:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3530]] monotonic, align 8
19442 // CHECK-NEXT:    [[TMP3532:%.*]] = icmp ult i64 [[TMP3531]], [[TMP3530]]
19443 // CHECK-NEXT:    [[TMP3533:%.*]] = select i1 [[TMP3532]], i64 [[TMP3530]], i64 [[TMP3531]]
19444 // CHECK-NEXT:    store i64 [[TMP3533]], i64* [[ULV]], align 8
19445 // CHECK-NEXT:    [[TMP3534:%.*]] = load i64, i64* [[ULE]], align 8
19446 // CHECK-NEXT:    [[TMP3535:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3534]] monotonic, align 8
19447 // CHECK-NEXT:    [[TMP3536:%.*]] = icmp ult i64 [[TMP3535]], [[TMP3534]]
19448 // CHECK-NEXT:    [[TMP3537:%.*]] = select i1 [[TMP3536]], i64 [[TMP3534]], i64 [[TMP3535]]
19449 // CHECK-NEXT:    store i64 [[TMP3537]], i64* [[ULV]], align 8
19450 // CHECK-NEXT:    [[TMP3538:%.*]] = load i64, i64* [[ULE]], align 8
19451 // CHECK-NEXT:    [[TMP3539:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3538]] monotonic, align 8
19452 // CHECK-NEXT:    [[TMP3540:%.*]] = icmp ugt i64 [[TMP3539]], [[TMP3538]]
19453 // CHECK-NEXT:    [[TMP3541:%.*]] = select i1 [[TMP3540]], i64 [[TMP3538]], i64 [[TMP3539]]
19454 // CHECK-NEXT:    store i64 [[TMP3541]], i64* [[ULV]], align 8
19455 // CHECK-NEXT:    [[TMP3542:%.*]] = load i64, i64* [[ULE]], align 8
19456 // CHECK-NEXT:    [[TMP3543:%.*]] = load i64, i64* [[ULD]], align 8
19457 // CHECK-NEXT:    [[TMP3544:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3542]], i64 [[TMP3543]] monotonic monotonic, align 8
19458 // CHECK-NEXT:    [[TMP3545:%.*]] = extractvalue { i64, i1 } [[TMP3544]], 0
19459 // CHECK-NEXT:    [[TMP3546:%.*]] = extractvalue { i64, i1 } [[TMP3544]], 1
19460 // CHECK-NEXT:    [[TMP3547:%.*]] = select i1 [[TMP3546]], i64 [[TMP3542]], i64 [[TMP3545]]
19461 // CHECK-NEXT:    store i64 [[TMP3547]], i64* [[ULV]], align 8
19462 // CHECK-NEXT:    [[TMP3548:%.*]] = load i64, i64* [[ULE]], align 8
19463 // CHECK-NEXT:    [[TMP3549:%.*]] = load i64, i64* [[ULD]], align 8
19464 // CHECK-NEXT:    [[TMP3550:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3548]], i64 [[TMP3549]] monotonic monotonic, align 8
19465 // CHECK-NEXT:    [[TMP3551:%.*]] = extractvalue { i64, i1 } [[TMP3550]], 0
19466 // CHECK-NEXT:    [[TMP3552:%.*]] = extractvalue { i64, i1 } [[TMP3550]], 1
19467 // CHECK-NEXT:    [[TMP3553:%.*]] = select i1 [[TMP3552]], i64 [[TMP3548]], i64 [[TMP3551]]
19468 // CHECK-NEXT:    store i64 [[TMP3553]], i64* [[ULV]], align 8
19469 // CHECK-NEXT:    [[TMP3554:%.*]] = load i64, i64* [[ULE]], align 8
19470 // CHECK-NEXT:    [[TMP3555:%.*]] = load i64, i64* [[ULD]], align 8
19471 // CHECK-NEXT:    [[TMP3556:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3554]], i64 [[TMP3555]] monotonic monotonic, align 8
19472 // CHECK-NEXT:    [[TMP3557:%.*]] = extractvalue { i64, i1 } [[TMP3556]], 0
19473 // CHECK-NEXT:    [[TMP3558:%.*]] = extractvalue { i64, i1 } [[TMP3556]], 1
19474 // CHECK-NEXT:    br i1 [[TMP3558]], label [[ULX_ATOMIC_EXIT345:%.*]], label [[ULX_ATOMIC_CONT346:%.*]]
19475 // CHECK:       ulx.atomic.cont346:
19476 // CHECK-NEXT:    store i64 [[TMP3557]], i64* [[ULV]], align 8
19477 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT345]]
19478 // CHECK:       ulx.atomic.exit345:
19479 // CHECK-NEXT:    [[TMP3559:%.*]] = load i64, i64* [[ULE]], align 8
19480 // CHECK-NEXT:    [[TMP3560:%.*]] = load i64, i64* [[ULD]], align 8
19481 // CHECK-NEXT:    [[TMP3561:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3559]], i64 [[TMP3560]] monotonic monotonic, align 8
19482 // CHECK-NEXT:    [[TMP3562:%.*]] = extractvalue { i64, i1 } [[TMP3561]], 0
19483 // CHECK-NEXT:    [[TMP3563:%.*]] = extractvalue { i64, i1 } [[TMP3561]], 1
19484 // CHECK-NEXT:    br i1 [[TMP3563]], label [[ULX_ATOMIC_EXIT347:%.*]], label [[ULX_ATOMIC_CONT348:%.*]]
19485 // CHECK:       ulx.atomic.cont348:
19486 // CHECK-NEXT:    store i64 [[TMP3562]], i64* [[ULV]], align 8
19487 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT347]]
19488 // CHECK:       ulx.atomic.exit347:
19489 // CHECK-NEXT:    [[TMP3564:%.*]] = load i64, i64* [[ULE]], align 8
19490 // CHECK-NEXT:    [[TMP3565:%.*]] = load i64, i64* [[ULD]], align 8
19491 // CHECK-NEXT:    [[TMP3566:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3564]], i64 [[TMP3565]] monotonic monotonic, align 8
19492 // CHECK-NEXT:    [[TMP3567:%.*]] = extractvalue { i64, i1 } [[TMP3566]], 1
19493 // CHECK-NEXT:    [[TMP3568:%.*]] = zext i1 [[TMP3567]] to i64
19494 // CHECK-NEXT:    store i64 [[TMP3568]], i64* [[ULR]], align 8
19495 // CHECK-NEXT:    [[TMP3569:%.*]] = load i64, i64* [[ULE]], align 8
19496 // CHECK-NEXT:    [[TMP3570:%.*]] = load i64, i64* [[ULD]], align 8
19497 // CHECK-NEXT:    [[TMP3571:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3569]], i64 [[TMP3570]] monotonic monotonic, align 8
19498 // CHECK-NEXT:    [[TMP3572:%.*]] = extractvalue { i64, i1 } [[TMP3571]], 1
19499 // CHECK-NEXT:    [[TMP3573:%.*]] = zext i1 [[TMP3572]] to i64
19500 // CHECK-NEXT:    store i64 [[TMP3573]], i64* [[ULR]], align 8
19501 // CHECK-NEXT:    [[TMP3574:%.*]] = load i64, i64* [[ULE]], align 8
19502 // CHECK-NEXT:    [[TMP3575:%.*]] = load i64, i64* [[ULD]], align 8
19503 // CHECK-NEXT:    [[TMP3576:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3574]], i64 [[TMP3575]] monotonic monotonic, align 8
19504 // CHECK-NEXT:    [[TMP3577:%.*]] = extractvalue { i64, i1 } [[TMP3576]], 0
19505 // CHECK-NEXT:    [[TMP3578:%.*]] = extractvalue { i64, i1 } [[TMP3576]], 1
19506 // CHECK-NEXT:    br i1 [[TMP3578]], label [[ULX_ATOMIC_EXIT349:%.*]], label [[ULX_ATOMIC_CONT350:%.*]]
19507 // CHECK:       ulx.atomic.cont350:
19508 // CHECK-NEXT:    store i64 [[TMP3577]], i64* [[ULV]], align 8
19509 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT349]]
19510 // CHECK:       ulx.atomic.exit349:
19511 // CHECK-NEXT:    [[TMP3579:%.*]] = extractvalue { i64, i1 } [[TMP3576]], 1
19512 // CHECK-NEXT:    [[TMP3580:%.*]] = zext i1 [[TMP3579]] to i64
19513 // CHECK-NEXT:    store i64 [[TMP3580]], i64* [[ULR]], align 8
19514 // CHECK-NEXT:    [[TMP3581:%.*]] = load i64, i64* [[ULE]], align 8
19515 // CHECK-NEXT:    [[TMP3582:%.*]] = load i64, i64* [[ULD]], align 8
19516 // CHECK-NEXT:    [[TMP3583:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3581]], i64 [[TMP3582]] monotonic monotonic, align 8
19517 // CHECK-NEXT:    [[TMP3584:%.*]] = extractvalue { i64, i1 } [[TMP3583]], 0
19518 // CHECK-NEXT:    [[TMP3585:%.*]] = extractvalue { i64, i1 } [[TMP3583]], 1
19519 // CHECK-NEXT:    br i1 [[TMP3585]], label [[ULX_ATOMIC_EXIT351:%.*]], label [[ULX_ATOMIC_CONT352:%.*]]
19520 // CHECK:       ulx.atomic.cont352:
19521 // CHECK-NEXT:    store i64 [[TMP3584]], i64* [[ULV]], align 8
19522 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT351]]
19523 // CHECK:       ulx.atomic.exit351:
19524 // CHECK-NEXT:    [[TMP3586:%.*]] = extractvalue { i64, i1 } [[TMP3583]], 1
19525 // CHECK-NEXT:    [[TMP3587:%.*]] = zext i1 [[TMP3586]] to i64
19526 // CHECK-NEXT:    store i64 [[TMP3587]], i64* [[ULR]], align 8
19527 // CHECK-NEXT:    [[TMP3588:%.*]] = load i64, i64* [[ULE]], align 8
19528 // CHECK-NEXT:    [[TMP3589:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3588]] release, align 8
19529 // CHECK-NEXT:    store i64 [[TMP3589]], i64* [[ULV]], align 8
19530 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19531 // CHECK-NEXT:    [[TMP3590:%.*]] = load i64, i64* [[ULE]], align 8
19532 // CHECK-NEXT:    [[TMP3591:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3590]] release, align 8
19533 // CHECK-NEXT:    store i64 [[TMP3591]], i64* [[ULV]], align 8
19534 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19535 // CHECK-NEXT:    [[TMP3592:%.*]] = load i64, i64* [[ULE]], align 8
19536 // CHECK-NEXT:    [[TMP3593:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3592]] release, align 8
19537 // CHECK-NEXT:    store i64 [[TMP3593]], i64* [[ULV]], align 8
19538 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19539 // CHECK-NEXT:    [[TMP3594:%.*]] = load i64, i64* [[ULE]], align 8
19540 // CHECK-NEXT:    [[TMP3595:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3594]] release, align 8
19541 // CHECK-NEXT:    store i64 [[TMP3595]], i64* [[ULV]], align 8
19542 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19543 // CHECK-NEXT:    [[TMP3596:%.*]] = load i64, i64* [[ULE]], align 8
19544 // CHECK-NEXT:    [[TMP3597:%.*]] = load i64, i64* [[ULD]], align 8
19545 // CHECK-NEXT:    [[TMP3598:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3596]], i64 [[TMP3597]] release monotonic, align 8
19546 // CHECK-NEXT:    [[TMP3599:%.*]] = extractvalue { i64, i1 } [[TMP3598]], 0
19547 // CHECK-NEXT:    store i64 [[TMP3599]], i64* [[ULV]], align 8
19548 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19549 // CHECK-NEXT:    [[TMP3600:%.*]] = load i64, i64* [[ULE]], align 8
19550 // CHECK-NEXT:    [[TMP3601:%.*]] = load i64, i64* [[ULD]], align 8
19551 // CHECK-NEXT:    [[TMP3602:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3600]], i64 [[TMP3601]] release monotonic, align 8
19552 // CHECK-NEXT:    [[TMP3603:%.*]] = extractvalue { i64, i1 } [[TMP3602]], 0
19553 // CHECK-NEXT:    store i64 [[TMP3603]], i64* [[ULV]], align 8
19554 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19555 // CHECK-NEXT:    [[TMP3604:%.*]] = load i64, i64* [[ULE]], align 8
19556 // CHECK-NEXT:    [[TMP3605:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3604]] release, align 8
19557 // CHECK-NEXT:    [[TMP3606:%.*]] = icmp ugt i64 [[TMP3605]], [[TMP3604]]
19558 // CHECK-NEXT:    [[TMP3607:%.*]] = select i1 [[TMP3606]], i64 [[TMP3604]], i64 [[TMP3605]]
19559 // CHECK-NEXT:    store i64 [[TMP3607]], i64* [[ULV]], align 8
19560 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19561 // CHECK-NEXT:    [[TMP3608:%.*]] = load i64, i64* [[ULE]], align 8
19562 // CHECK-NEXT:    [[TMP3609:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3608]] release, align 8
19563 // CHECK-NEXT:    [[TMP3610:%.*]] = icmp ult i64 [[TMP3609]], [[TMP3608]]
19564 // CHECK-NEXT:    [[TMP3611:%.*]] = select i1 [[TMP3610]], i64 [[TMP3608]], i64 [[TMP3609]]
19565 // CHECK-NEXT:    store i64 [[TMP3611]], i64* [[ULV]], align 8
19566 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19567 // CHECK-NEXT:    [[TMP3612:%.*]] = load i64, i64* [[ULE]], align 8
19568 // CHECK-NEXT:    [[TMP3613:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3612]] release, align 8
19569 // CHECK-NEXT:    [[TMP3614:%.*]] = icmp ult i64 [[TMP3613]], [[TMP3612]]
19570 // CHECK-NEXT:    [[TMP3615:%.*]] = select i1 [[TMP3614]], i64 [[TMP3612]], i64 [[TMP3613]]
19571 // CHECK-NEXT:    store i64 [[TMP3615]], i64* [[ULV]], align 8
19572 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19573 // CHECK-NEXT:    [[TMP3616:%.*]] = load i64, i64* [[ULE]], align 8
19574 // CHECK-NEXT:    [[TMP3617:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3616]] release, align 8
19575 // CHECK-NEXT:    [[TMP3618:%.*]] = icmp ugt i64 [[TMP3617]], [[TMP3616]]
19576 // CHECK-NEXT:    [[TMP3619:%.*]] = select i1 [[TMP3618]], i64 [[TMP3616]], i64 [[TMP3617]]
19577 // CHECK-NEXT:    store i64 [[TMP3619]], i64* [[ULV]], align 8
19578 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19579 // CHECK-NEXT:    [[TMP3620:%.*]] = load i64, i64* [[ULE]], align 8
19580 // CHECK-NEXT:    [[TMP3621:%.*]] = load i64, i64* [[ULD]], align 8
19581 // CHECK-NEXT:    [[TMP3622:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3620]], i64 [[TMP3621]] release monotonic, align 8
19582 // CHECK-NEXT:    [[TMP3623:%.*]] = extractvalue { i64, i1 } [[TMP3622]], 0
19583 // CHECK-NEXT:    [[TMP3624:%.*]] = extractvalue { i64, i1 } [[TMP3622]], 1
19584 // CHECK-NEXT:    [[TMP3625:%.*]] = select i1 [[TMP3624]], i64 [[TMP3620]], i64 [[TMP3623]]
19585 // CHECK-NEXT:    store i64 [[TMP3625]], i64* [[ULV]], align 8
19586 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19587 // CHECK-NEXT:    [[TMP3626:%.*]] = load i64, i64* [[ULE]], align 8
19588 // CHECK-NEXT:    [[TMP3627:%.*]] = load i64, i64* [[ULD]], align 8
19589 // CHECK-NEXT:    [[TMP3628:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3626]], i64 [[TMP3627]] release monotonic, align 8
19590 // CHECK-NEXT:    [[TMP3629:%.*]] = extractvalue { i64, i1 } [[TMP3628]], 0
19591 // CHECK-NEXT:    [[TMP3630:%.*]] = extractvalue { i64, i1 } [[TMP3628]], 1
19592 // CHECK-NEXT:    [[TMP3631:%.*]] = select i1 [[TMP3630]], i64 [[TMP3626]], i64 [[TMP3629]]
19593 // CHECK-NEXT:    store i64 [[TMP3631]], i64* [[ULV]], align 8
19594 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19595 // CHECK-NEXT:    [[TMP3632:%.*]] = load i64, i64* [[ULE]], align 8
19596 // CHECK-NEXT:    [[TMP3633:%.*]] = load i64, i64* [[ULD]], align 8
19597 // CHECK-NEXT:    [[TMP3634:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3632]], i64 [[TMP3633]] release monotonic, align 8
19598 // CHECK-NEXT:    [[TMP3635:%.*]] = extractvalue { i64, i1 } [[TMP3634]], 0
19599 // CHECK-NEXT:    [[TMP3636:%.*]] = extractvalue { i64, i1 } [[TMP3634]], 1
19600 // CHECK-NEXT:    br i1 [[TMP3636]], label [[ULX_ATOMIC_EXIT353:%.*]], label [[ULX_ATOMIC_CONT354:%.*]]
19601 // CHECK:       ulx.atomic.cont354:
19602 // CHECK-NEXT:    store i64 [[TMP3635]], i64* [[ULV]], align 8
19603 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT353]]
19604 // CHECK:       ulx.atomic.exit353:
19605 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19606 // CHECK-NEXT:    [[TMP3637:%.*]] = load i64, i64* [[ULE]], align 8
19607 // CHECK-NEXT:    [[TMP3638:%.*]] = load i64, i64* [[ULD]], align 8
19608 // CHECK-NEXT:    [[TMP3639:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3637]], i64 [[TMP3638]] release monotonic, align 8
19609 // CHECK-NEXT:    [[TMP3640:%.*]] = extractvalue { i64, i1 } [[TMP3639]], 0
19610 // CHECK-NEXT:    [[TMP3641:%.*]] = extractvalue { i64, i1 } [[TMP3639]], 1
19611 // CHECK-NEXT:    br i1 [[TMP3641]], label [[ULX_ATOMIC_EXIT355:%.*]], label [[ULX_ATOMIC_CONT356:%.*]]
19612 // CHECK:       ulx.atomic.cont356:
19613 // CHECK-NEXT:    store i64 [[TMP3640]], i64* [[ULV]], align 8
19614 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT355]]
19615 // CHECK:       ulx.atomic.exit355:
19616 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19617 // CHECK-NEXT:    [[TMP3642:%.*]] = load i64, i64* [[ULE]], align 8
19618 // CHECK-NEXT:    [[TMP3643:%.*]] = load i64, i64* [[ULD]], align 8
19619 // CHECK-NEXT:    [[TMP3644:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3642]], i64 [[TMP3643]] release monotonic, align 8
19620 // CHECK-NEXT:    [[TMP3645:%.*]] = extractvalue { i64, i1 } [[TMP3644]], 1
19621 // CHECK-NEXT:    [[TMP3646:%.*]] = zext i1 [[TMP3645]] to i64
19622 // CHECK-NEXT:    store i64 [[TMP3646]], i64* [[ULR]], align 8
19623 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19624 // CHECK-NEXT:    [[TMP3647:%.*]] = load i64, i64* [[ULE]], align 8
19625 // CHECK-NEXT:    [[TMP3648:%.*]] = load i64, i64* [[ULD]], align 8
19626 // CHECK-NEXT:    [[TMP3649:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3647]], i64 [[TMP3648]] release monotonic, align 8
19627 // CHECK-NEXT:    [[TMP3650:%.*]] = extractvalue { i64, i1 } [[TMP3649]], 1
19628 // CHECK-NEXT:    [[TMP3651:%.*]] = zext i1 [[TMP3650]] to i64
19629 // CHECK-NEXT:    store i64 [[TMP3651]], i64* [[ULR]], align 8
19630 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19631 // CHECK-NEXT:    [[TMP3652:%.*]] = load i64, i64* [[ULE]], align 8
19632 // CHECK-NEXT:    [[TMP3653:%.*]] = load i64, i64* [[ULD]], align 8
19633 // CHECK-NEXT:    [[TMP3654:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3652]], i64 [[TMP3653]] release monotonic, align 8
19634 // CHECK-NEXT:    [[TMP3655:%.*]] = extractvalue { i64, i1 } [[TMP3654]], 0
19635 // CHECK-NEXT:    [[TMP3656:%.*]] = extractvalue { i64, i1 } [[TMP3654]], 1
19636 // CHECK-NEXT:    br i1 [[TMP3656]], label [[ULX_ATOMIC_EXIT357:%.*]], label [[ULX_ATOMIC_CONT358:%.*]]
19637 // CHECK:       ulx.atomic.cont358:
19638 // CHECK-NEXT:    store i64 [[TMP3655]], i64* [[ULV]], align 8
19639 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT357]]
19640 // CHECK:       ulx.atomic.exit357:
19641 // CHECK-NEXT:    [[TMP3657:%.*]] = extractvalue { i64, i1 } [[TMP3654]], 1
19642 // CHECK-NEXT:    [[TMP3658:%.*]] = zext i1 [[TMP3657]] to i64
19643 // CHECK-NEXT:    store i64 [[TMP3658]], i64* [[ULR]], align 8
19644 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19645 // CHECK-NEXT:    [[TMP3659:%.*]] = load i64, i64* [[ULE]], align 8
19646 // CHECK-NEXT:    [[TMP3660:%.*]] = load i64, i64* [[ULD]], align 8
19647 // CHECK-NEXT:    [[TMP3661:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3659]], i64 [[TMP3660]] release monotonic, align 8
19648 // CHECK-NEXT:    [[TMP3662:%.*]] = extractvalue { i64, i1 } [[TMP3661]], 0
19649 // CHECK-NEXT:    [[TMP3663:%.*]] = extractvalue { i64, i1 } [[TMP3661]], 1
19650 // CHECK-NEXT:    br i1 [[TMP3663]], label [[ULX_ATOMIC_EXIT359:%.*]], label [[ULX_ATOMIC_CONT360:%.*]]
19651 // CHECK:       ulx.atomic.cont360:
19652 // CHECK-NEXT:    store i64 [[TMP3662]], i64* [[ULV]], align 8
19653 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT359]]
19654 // CHECK:       ulx.atomic.exit359:
19655 // CHECK-NEXT:    [[TMP3664:%.*]] = extractvalue { i64, i1 } [[TMP3661]], 1
19656 // CHECK-NEXT:    [[TMP3665:%.*]] = zext i1 [[TMP3664]] to i64
19657 // CHECK-NEXT:    store i64 [[TMP3665]], i64* [[ULR]], align 8
19658 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19659 // CHECK-NEXT:    [[TMP3666:%.*]] = load i64, i64* [[ULE]], align 8
19660 // CHECK-NEXT:    [[TMP3667:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3666]] seq_cst, align 8
19661 // CHECK-NEXT:    store i64 [[TMP3667]], i64* [[ULV]], align 8
19662 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19663 // CHECK-NEXT:    [[TMP3668:%.*]] = load i64, i64* [[ULE]], align 8
19664 // CHECK-NEXT:    [[TMP3669:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3668]] seq_cst, align 8
19665 // CHECK-NEXT:    store i64 [[TMP3669]], i64* [[ULV]], align 8
19666 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19667 // CHECK-NEXT:    [[TMP3670:%.*]] = load i64, i64* [[ULE]], align 8
19668 // CHECK-NEXT:    [[TMP3671:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3670]] seq_cst, align 8
19669 // CHECK-NEXT:    store i64 [[TMP3671]], i64* [[ULV]], align 8
19670 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19671 // CHECK-NEXT:    [[TMP3672:%.*]] = load i64, i64* [[ULE]], align 8
19672 // CHECK-NEXT:    [[TMP3673:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3672]] seq_cst, align 8
19673 // CHECK-NEXT:    store i64 [[TMP3673]], i64* [[ULV]], align 8
19674 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19675 // CHECK-NEXT:    [[TMP3674:%.*]] = load i64, i64* [[ULE]], align 8
19676 // CHECK-NEXT:    [[TMP3675:%.*]] = load i64, i64* [[ULD]], align 8
19677 // CHECK-NEXT:    [[TMP3676:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3674]], i64 [[TMP3675]] seq_cst seq_cst, align 8
19678 // CHECK-NEXT:    [[TMP3677:%.*]] = extractvalue { i64, i1 } [[TMP3676]], 0
19679 // CHECK-NEXT:    store i64 [[TMP3677]], i64* [[ULV]], align 8
19680 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19681 // CHECK-NEXT:    [[TMP3678:%.*]] = load i64, i64* [[ULE]], align 8
19682 // CHECK-NEXT:    [[TMP3679:%.*]] = load i64, i64* [[ULD]], align 8
19683 // CHECK-NEXT:    [[TMP3680:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3678]], i64 [[TMP3679]] seq_cst seq_cst, align 8
19684 // CHECK-NEXT:    [[TMP3681:%.*]] = extractvalue { i64, i1 } [[TMP3680]], 0
19685 // CHECK-NEXT:    store i64 [[TMP3681]], i64* [[ULV]], align 8
19686 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19687 // CHECK-NEXT:    [[TMP3682:%.*]] = load i64, i64* [[ULE]], align 8
19688 // CHECK-NEXT:    [[TMP3683:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3682]] seq_cst, align 8
19689 // CHECK-NEXT:    [[TMP3684:%.*]] = icmp ugt i64 [[TMP3683]], [[TMP3682]]
19690 // CHECK-NEXT:    [[TMP3685:%.*]] = select i1 [[TMP3684]], i64 [[TMP3682]], i64 [[TMP3683]]
19691 // CHECK-NEXT:    store i64 [[TMP3685]], i64* [[ULV]], align 8
19692 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19693 // CHECK-NEXT:    [[TMP3686:%.*]] = load i64, i64* [[ULE]], align 8
19694 // CHECK-NEXT:    [[TMP3687:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3686]] seq_cst, align 8
19695 // CHECK-NEXT:    [[TMP3688:%.*]] = icmp ult i64 [[TMP3687]], [[TMP3686]]
19696 // CHECK-NEXT:    [[TMP3689:%.*]] = select i1 [[TMP3688]], i64 [[TMP3686]], i64 [[TMP3687]]
19697 // CHECK-NEXT:    store i64 [[TMP3689]], i64* [[ULV]], align 8
19698 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19699 // CHECK-NEXT:    [[TMP3690:%.*]] = load i64, i64* [[ULE]], align 8
19700 // CHECK-NEXT:    [[TMP3691:%.*]] = atomicrmw umin i64* [[ULX]], i64 [[TMP3690]] seq_cst, align 8
19701 // CHECK-NEXT:    [[TMP3692:%.*]] = icmp ult i64 [[TMP3691]], [[TMP3690]]
19702 // CHECK-NEXT:    [[TMP3693:%.*]] = select i1 [[TMP3692]], i64 [[TMP3690]], i64 [[TMP3691]]
19703 // CHECK-NEXT:    store i64 [[TMP3693]], i64* [[ULV]], align 8
19704 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19705 // CHECK-NEXT:    [[TMP3694:%.*]] = load i64, i64* [[ULE]], align 8
19706 // CHECK-NEXT:    [[TMP3695:%.*]] = atomicrmw umax i64* [[ULX]], i64 [[TMP3694]] seq_cst, align 8
19707 // CHECK-NEXT:    [[TMP3696:%.*]] = icmp ugt i64 [[TMP3695]], [[TMP3694]]
19708 // CHECK-NEXT:    [[TMP3697:%.*]] = select i1 [[TMP3696]], i64 [[TMP3694]], i64 [[TMP3695]]
19709 // CHECK-NEXT:    store i64 [[TMP3697]], i64* [[ULV]], align 8
19710 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19711 // CHECK-NEXT:    [[TMP3698:%.*]] = load i64, i64* [[ULE]], align 8
19712 // CHECK-NEXT:    [[TMP3699:%.*]] = load i64, i64* [[ULD]], align 8
19713 // CHECK-NEXT:    [[TMP3700:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3698]], i64 [[TMP3699]] seq_cst seq_cst, align 8
19714 // CHECK-NEXT:    [[TMP3701:%.*]] = extractvalue { i64, i1 } [[TMP3700]], 0
19715 // CHECK-NEXT:    [[TMP3702:%.*]] = extractvalue { i64, i1 } [[TMP3700]], 1
19716 // CHECK-NEXT:    [[TMP3703:%.*]] = select i1 [[TMP3702]], i64 [[TMP3698]], i64 [[TMP3701]]
19717 // CHECK-NEXT:    store i64 [[TMP3703]], i64* [[ULV]], align 8
19718 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19719 // CHECK-NEXT:    [[TMP3704:%.*]] = load i64, i64* [[ULE]], align 8
19720 // CHECK-NEXT:    [[TMP3705:%.*]] = load i64, i64* [[ULD]], align 8
19721 // CHECK-NEXT:    [[TMP3706:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3704]], i64 [[TMP3705]] seq_cst seq_cst, align 8
19722 // CHECK-NEXT:    [[TMP3707:%.*]] = extractvalue { i64, i1 } [[TMP3706]], 0
19723 // CHECK-NEXT:    [[TMP3708:%.*]] = extractvalue { i64, i1 } [[TMP3706]], 1
19724 // CHECK-NEXT:    [[TMP3709:%.*]] = select i1 [[TMP3708]], i64 [[TMP3704]], i64 [[TMP3707]]
19725 // CHECK-NEXT:    store i64 [[TMP3709]], i64* [[ULV]], align 8
19726 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19727 // CHECK-NEXT:    [[TMP3710:%.*]] = load i64, i64* [[ULE]], align 8
19728 // CHECK-NEXT:    [[TMP3711:%.*]] = load i64, i64* [[ULD]], align 8
19729 // CHECK-NEXT:    [[TMP3712:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3710]], i64 [[TMP3711]] seq_cst seq_cst, align 8
19730 // CHECK-NEXT:    [[TMP3713:%.*]] = extractvalue { i64, i1 } [[TMP3712]], 0
19731 // CHECK-NEXT:    [[TMP3714:%.*]] = extractvalue { i64, i1 } [[TMP3712]], 1
19732 // CHECK-NEXT:    br i1 [[TMP3714]], label [[ULX_ATOMIC_EXIT361:%.*]], label [[ULX_ATOMIC_CONT362:%.*]]
19733 // CHECK:       ulx.atomic.cont362:
19734 // CHECK-NEXT:    store i64 [[TMP3713]], i64* [[ULV]], align 8
19735 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT361]]
19736 // CHECK:       ulx.atomic.exit361:
19737 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19738 // CHECK-NEXT:    [[TMP3715:%.*]] = load i64, i64* [[ULE]], align 8
19739 // CHECK-NEXT:    [[TMP3716:%.*]] = load i64, i64* [[ULD]], align 8
19740 // CHECK-NEXT:    [[TMP3717:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3715]], i64 [[TMP3716]] seq_cst seq_cst, align 8
19741 // CHECK-NEXT:    [[TMP3718:%.*]] = extractvalue { i64, i1 } [[TMP3717]], 0
19742 // CHECK-NEXT:    [[TMP3719:%.*]] = extractvalue { i64, i1 } [[TMP3717]], 1
19743 // CHECK-NEXT:    br i1 [[TMP3719]], label [[ULX_ATOMIC_EXIT363:%.*]], label [[ULX_ATOMIC_CONT364:%.*]]
19744 // CHECK:       ulx.atomic.cont364:
19745 // CHECK-NEXT:    store i64 [[TMP3718]], i64* [[ULV]], align 8
19746 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT363]]
19747 // CHECK:       ulx.atomic.exit363:
19748 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19749 // CHECK-NEXT:    [[TMP3720:%.*]] = load i64, i64* [[ULE]], align 8
19750 // CHECK-NEXT:    [[TMP3721:%.*]] = load i64, i64* [[ULD]], align 8
19751 // CHECK-NEXT:    [[TMP3722:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3720]], i64 [[TMP3721]] seq_cst seq_cst, align 8
19752 // CHECK-NEXT:    [[TMP3723:%.*]] = extractvalue { i64, i1 } [[TMP3722]], 1
19753 // CHECK-NEXT:    [[TMP3724:%.*]] = zext i1 [[TMP3723]] to i64
19754 // CHECK-NEXT:    store i64 [[TMP3724]], i64* [[ULR]], align 8
19755 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19756 // CHECK-NEXT:    [[TMP3725:%.*]] = load i64, i64* [[ULE]], align 8
19757 // CHECK-NEXT:    [[TMP3726:%.*]] = load i64, i64* [[ULD]], align 8
19758 // CHECK-NEXT:    [[TMP3727:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3725]], i64 [[TMP3726]] seq_cst seq_cst, align 8
19759 // CHECK-NEXT:    [[TMP3728:%.*]] = extractvalue { i64, i1 } [[TMP3727]], 1
19760 // CHECK-NEXT:    [[TMP3729:%.*]] = zext i1 [[TMP3728]] to i64
19761 // CHECK-NEXT:    store i64 [[TMP3729]], i64* [[ULR]], align 8
19762 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19763 // CHECK-NEXT:    [[TMP3730:%.*]] = load i64, i64* [[ULE]], align 8
19764 // CHECK-NEXT:    [[TMP3731:%.*]] = load i64, i64* [[ULD]], align 8
19765 // CHECK-NEXT:    [[TMP3732:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3730]], i64 [[TMP3731]] seq_cst seq_cst, align 8
19766 // CHECK-NEXT:    [[TMP3733:%.*]] = extractvalue { i64, i1 } [[TMP3732]], 0
19767 // CHECK-NEXT:    [[TMP3734:%.*]] = extractvalue { i64, i1 } [[TMP3732]], 1
19768 // CHECK-NEXT:    br i1 [[TMP3734]], label [[ULX_ATOMIC_EXIT365:%.*]], label [[ULX_ATOMIC_CONT366:%.*]]
19769 // CHECK:       ulx.atomic.cont366:
19770 // CHECK-NEXT:    store i64 [[TMP3733]], i64* [[ULV]], align 8
19771 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT365]]
19772 // CHECK:       ulx.atomic.exit365:
19773 // CHECK-NEXT:    [[TMP3735:%.*]] = extractvalue { i64, i1 } [[TMP3732]], 1
19774 // CHECK-NEXT:    [[TMP3736:%.*]] = zext i1 [[TMP3735]] to i64
19775 // CHECK-NEXT:    store i64 [[TMP3736]], i64* [[ULR]], align 8
19776 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19777 // CHECK-NEXT:    [[TMP3737:%.*]] = load i64, i64* [[ULE]], align 8
19778 // CHECK-NEXT:    [[TMP3738:%.*]] = load i64, i64* [[ULD]], align 8
19779 // CHECK-NEXT:    [[TMP3739:%.*]] = cmpxchg i64* [[ULX]], i64 [[TMP3737]], i64 [[TMP3738]] seq_cst seq_cst, align 8
19780 // CHECK-NEXT:    [[TMP3740:%.*]] = extractvalue { i64, i1 } [[TMP3739]], 0
19781 // CHECK-NEXT:    [[TMP3741:%.*]] = extractvalue { i64, i1 } [[TMP3739]], 1
19782 // CHECK-NEXT:    br i1 [[TMP3741]], label [[ULX_ATOMIC_EXIT367:%.*]], label [[ULX_ATOMIC_CONT368:%.*]]
19783 // CHECK:       ulx.atomic.cont368:
19784 // CHECK-NEXT:    store i64 [[TMP3740]], i64* [[ULV]], align 8
19785 // CHECK-NEXT:    br label [[ULX_ATOMIC_EXIT367]]
19786 // CHECK:       ulx.atomic.exit367:
19787 // CHECK-NEXT:    [[TMP3742:%.*]] = extractvalue { i64, i1 } [[TMP3739]], 1
19788 // CHECK-NEXT:    [[TMP3743:%.*]] = zext i1 [[TMP3742]] to i64
19789 // CHECK-NEXT:    store i64 [[TMP3743]], i64* [[ULR]], align 8
19790 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19791 // CHECK-NEXT:    [[TMP3744:%.*]] = load i64, i64* [[LLE]], align 8
19792 // CHECK-NEXT:    [[TMP3745:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3744]] monotonic, align 8
19793 // CHECK-NEXT:    store i64 [[TMP3745]], i64* [[LLV]], align 8
19794 // CHECK-NEXT:    [[TMP3746:%.*]] = load i64, i64* [[LLE]], align 8
19795 // CHECK-NEXT:    [[TMP3747:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3746]] monotonic, align 8
19796 // CHECK-NEXT:    store i64 [[TMP3747]], i64* [[LLV]], align 8
19797 // CHECK-NEXT:    [[TMP3748:%.*]] = load i64, i64* [[LLE]], align 8
19798 // CHECK-NEXT:    [[TMP3749:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3748]] monotonic, align 8
19799 // CHECK-NEXT:    store i64 [[TMP3749]], i64* [[LLV]], align 8
19800 // CHECK-NEXT:    [[TMP3750:%.*]] = load i64, i64* [[LLE]], align 8
19801 // CHECK-NEXT:    [[TMP3751:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3750]] monotonic, align 8
19802 // CHECK-NEXT:    store i64 [[TMP3751]], i64* [[LLV]], align 8
19803 // CHECK-NEXT:    [[TMP3752:%.*]] = load i64, i64* [[LLE]], align 8
19804 // CHECK-NEXT:    [[TMP3753:%.*]] = load i64, i64* [[LLD]], align 8
19805 // CHECK-NEXT:    [[TMP3754:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3752]], i64 [[TMP3753]] monotonic monotonic, align 8
19806 // CHECK-NEXT:    [[TMP3755:%.*]] = extractvalue { i64, i1 } [[TMP3754]], 0
19807 // CHECK-NEXT:    store i64 [[TMP3755]], i64* [[LLV]], align 8
19808 // CHECK-NEXT:    [[TMP3756:%.*]] = load i64, i64* [[LLE]], align 8
19809 // CHECK-NEXT:    [[TMP3757:%.*]] = load i64, i64* [[LLD]], align 8
19810 // CHECK-NEXT:    [[TMP3758:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3756]], i64 [[TMP3757]] monotonic monotonic, align 8
19811 // CHECK-NEXT:    [[TMP3759:%.*]] = extractvalue { i64, i1 } [[TMP3758]], 0
19812 // CHECK-NEXT:    store i64 [[TMP3759]], i64* [[LLV]], align 8
19813 // CHECK-NEXT:    [[TMP3760:%.*]] = load i64, i64* [[LLE]], align 8
19814 // CHECK-NEXT:    [[TMP3761:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3760]] monotonic, align 8
19815 // CHECK-NEXT:    [[TMP3762:%.*]] = icmp sgt i64 [[TMP3761]], [[TMP3760]]
19816 // CHECK-NEXT:    [[TMP3763:%.*]] = select i1 [[TMP3762]], i64 [[TMP3760]], i64 [[TMP3761]]
19817 // CHECK-NEXT:    store i64 [[TMP3763]], i64* [[LLV]], align 8
19818 // CHECK-NEXT:    [[TMP3764:%.*]] = load i64, i64* [[LLE]], align 8
19819 // CHECK-NEXT:    [[TMP3765:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3764]] monotonic, align 8
19820 // CHECK-NEXT:    [[TMP3766:%.*]] = icmp slt i64 [[TMP3765]], [[TMP3764]]
19821 // CHECK-NEXT:    [[TMP3767:%.*]] = select i1 [[TMP3766]], i64 [[TMP3764]], i64 [[TMP3765]]
19822 // CHECK-NEXT:    store i64 [[TMP3767]], i64* [[LLV]], align 8
19823 // CHECK-NEXT:    [[TMP3768:%.*]] = load i64, i64* [[LLE]], align 8
19824 // CHECK-NEXT:    [[TMP3769:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3768]] monotonic, align 8
19825 // CHECK-NEXT:    [[TMP3770:%.*]] = icmp slt i64 [[TMP3769]], [[TMP3768]]
19826 // CHECK-NEXT:    [[TMP3771:%.*]] = select i1 [[TMP3770]], i64 [[TMP3768]], i64 [[TMP3769]]
19827 // CHECK-NEXT:    store i64 [[TMP3771]], i64* [[LLV]], align 8
19828 // CHECK-NEXT:    [[TMP3772:%.*]] = load i64, i64* [[LLE]], align 8
19829 // CHECK-NEXT:    [[TMP3773:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3772]] monotonic, align 8
19830 // CHECK-NEXT:    [[TMP3774:%.*]] = icmp sgt i64 [[TMP3773]], [[TMP3772]]
19831 // CHECK-NEXT:    [[TMP3775:%.*]] = select i1 [[TMP3774]], i64 [[TMP3772]], i64 [[TMP3773]]
19832 // CHECK-NEXT:    store i64 [[TMP3775]], i64* [[LLV]], align 8
19833 // CHECK-NEXT:    [[TMP3776:%.*]] = load i64, i64* [[LLE]], align 8
19834 // CHECK-NEXT:    [[TMP3777:%.*]] = load i64, i64* [[LLD]], align 8
19835 // CHECK-NEXT:    [[TMP3778:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3776]], i64 [[TMP3777]] monotonic monotonic, align 8
19836 // CHECK-NEXT:    [[TMP3779:%.*]] = extractvalue { i64, i1 } [[TMP3778]], 0
19837 // CHECK-NEXT:    [[TMP3780:%.*]] = extractvalue { i64, i1 } [[TMP3778]], 1
19838 // CHECK-NEXT:    [[TMP3781:%.*]] = select i1 [[TMP3780]], i64 [[TMP3776]], i64 [[TMP3779]]
19839 // CHECK-NEXT:    store i64 [[TMP3781]], i64* [[LLV]], align 8
19840 // CHECK-NEXT:    [[TMP3782:%.*]] = load i64, i64* [[LLE]], align 8
19841 // CHECK-NEXT:    [[TMP3783:%.*]] = load i64, i64* [[LLD]], align 8
19842 // CHECK-NEXT:    [[TMP3784:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3782]], i64 [[TMP3783]] monotonic monotonic, align 8
19843 // CHECK-NEXT:    [[TMP3785:%.*]] = extractvalue { i64, i1 } [[TMP3784]], 0
19844 // CHECK-NEXT:    [[TMP3786:%.*]] = extractvalue { i64, i1 } [[TMP3784]], 1
19845 // CHECK-NEXT:    [[TMP3787:%.*]] = select i1 [[TMP3786]], i64 [[TMP3782]], i64 [[TMP3785]]
19846 // CHECK-NEXT:    store i64 [[TMP3787]], i64* [[LLV]], align 8
19847 // CHECK-NEXT:    [[TMP3788:%.*]] = load i64, i64* [[LLE]], align 8
19848 // CHECK-NEXT:    [[TMP3789:%.*]] = load i64, i64* [[LLD]], align 8
19849 // CHECK-NEXT:    [[TMP3790:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3788]], i64 [[TMP3789]] monotonic monotonic, align 8
19850 // CHECK-NEXT:    [[TMP3791:%.*]] = extractvalue { i64, i1 } [[TMP3790]], 0
19851 // CHECK-NEXT:    [[TMP3792:%.*]] = extractvalue { i64, i1 } [[TMP3790]], 1
19852 // CHECK-NEXT:    br i1 [[TMP3792]], label [[LLX_ATOMIC_EXIT:%.*]], label [[LLX_ATOMIC_CONT:%.*]]
19853 // CHECK:       llx.atomic.cont:
19854 // CHECK-NEXT:    store i64 [[TMP3791]], i64* [[LLV]], align 8
19855 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT]]
19856 // CHECK:       llx.atomic.exit:
19857 // CHECK-NEXT:    [[TMP3793:%.*]] = load i64, i64* [[LLE]], align 8
19858 // CHECK-NEXT:    [[TMP3794:%.*]] = load i64, i64* [[LLD]], align 8
19859 // CHECK-NEXT:    [[TMP3795:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3793]], i64 [[TMP3794]] monotonic monotonic, align 8
19860 // CHECK-NEXT:    [[TMP3796:%.*]] = extractvalue { i64, i1 } [[TMP3795]], 0
19861 // CHECK-NEXT:    [[TMP3797:%.*]] = extractvalue { i64, i1 } [[TMP3795]], 1
19862 // CHECK-NEXT:    br i1 [[TMP3797]], label [[LLX_ATOMIC_EXIT369:%.*]], label [[LLX_ATOMIC_CONT370:%.*]]
19863 // CHECK:       llx.atomic.cont370:
19864 // CHECK-NEXT:    store i64 [[TMP3796]], i64* [[LLV]], align 8
19865 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT369]]
19866 // CHECK:       llx.atomic.exit369:
19867 // CHECK-NEXT:    [[TMP3798:%.*]] = load i64, i64* [[LLE]], align 8
19868 // CHECK-NEXT:    [[TMP3799:%.*]] = load i64, i64* [[LLD]], align 8
19869 // CHECK-NEXT:    [[TMP3800:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3798]], i64 [[TMP3799]] monotonic monotonic, align 8
19870 // CHECK-NEXT:    [[TMP3801:%.*]] = extractvalue { i64, i1 } [[TMP3800]], 1
19871 // CHECK-NEXT:    [[TMP3802:%.*]] = sext i1 [[TMP3801]] to i64
19872 // CHECK-NEXT:    store i64 [[TMP3802]], i64* [[LLR]], align 8
19873 // CHECK-NEXT:    [[TMP3803:%.*]] = load i64, i64* [[LLE]], align 8
19874 // CHECK-NEXT:    [[TMP3804:%.*]] = load i64, i64* [[LLD]], align 8
19875 // CHECK-NEXT:    [[TMP3805:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3803]], i64 [[TMP3804]] monotonic monotonic, align 8
19876 // CHECK-NEXT:    [[TMP3806:%.*]] = extractvalue { i64, i1 } [[TMP3805]], 1
19877 // CHECK-NEXT:    [[TMP3807:%.*]] = sext i1 [[TMP3806]] to i64
19878 // CHECK-NEXT:    store i64 [[TMP3807]], i64* [[LLR]], align 8
19879 // CHECK-NEXT:    [[TMP3808:%.*]] = load i64, i64* [[LLE]], align 8
19880 // CHECK-NEXT:    [[TMP3809:%.*]] = load i64, i64* [[LLD]], align 8
19881 // CHECK-NEXT:    [[TMP3810:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3808]], i64 [[TMP3809]] monotonic monotonic, align 8
19882 // CHECK-NEXT:    [[TMP3811:%.*]] = extractvalue { i64, i1 } [[TMP3810]], 0
19883 // CHECK-NEXT:    [[TMP3812:%.*]] = extractvalue { i64, i1 } [[TMP3810]], 1
19884 // CHECK-NEXT:    br i1 [[TMP3812]], label [[LLX_ATOMIC_EXIT371:%.*]], label [[LLX_ATOMIC_CONT372:%.*]]
19885 // CHECK:       llx.atomic.cont372:
19886 // CHECK-NEXT:    store i64 [[TMP3811]], i64* [[LLV]], align 8
19887 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT371]]
19888 // CHECK:       llx.atomic.exit371:
19889 // CHECK-NEXT:    [[TMP3813:%.*]] = extractvalue { i64, i1 } [[TMP3810]], 1
19890 // CHECK-NEXT:    [[TMP3814:%.*]] = sext i1 [[TMP3813]] to i64
19891 // CHECK-NEXT:    store i64 [[TMP3814]], i64* [[LLR]], align 8
19892 // CHECK-NEXT:    [[TMP3815:%.*]] = load i64, i64* [[LLE]], align 8
19893 // CHECK-NEXT:    [[TMP3816:%.*]] = load i64, i64* [[LLD]], align 8
19894 // CHECK-NEXT:    [[TMP3817:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3815]], i64 [[TMP3816]] monotonic monotonic, align 8
19895 // CHECK-NEXT:    [[TMP3818:%.*]] = extractvalue { i64, i1 } [[TMP3817]], 0
19896 // CHECK-NEXT:    [[TMP3819:%.*]] = extractvalue { i64, i1 } [[TMP3817]], 1
19897 // CHECK-NEXT:    br i1 [[TMP3819]], label [[LLX_ATOMIC_EXIT373:%.*]], label [[LLX_ATOMIC_CONT374:%.*]]
19898 // CHECK:       llx.atomic.cont374:
19899 // CHECK-NEXT:    store i64 [[TMP3818]], i64* [[LLV]], align 8
19900 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT373]]
19901 // CHECK:       llx.atomic.exit373:
19902 // CHECK-NEXT:    [[TMP3820:%.*]] = extractvalue { i64, i1 } [[TMP3817]], 1
19903 // CHECK-NEXT:    [[TMP3821:%.*]] = sext i1 [[TMP3820]] to i64
19904 // CHECK-NEXT:    store i64 [[TMP3821]], i64* [[LLR]], align 8
19905 // CHECK-NEXT:    [[TMP3822:%.*]] = load i64, i64* [[LLE]], align 8
19906 // CHECK-NEXT:    [[TMP3823:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3822]] acq_rel, align 8
19907 // CHECK-NEXT:    store i64 [[TMP3823]], i64* [[LLV]], align 8
19908 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19909 // CHECK-NEXT:    [[TMP3824:%.*]] = load i64, i64* [[LLE]], align 8
19910 // CHECK-NEXT:    [[TMP3825:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3824]] acq_rel, align 8
19911 // CHECK-NEXT:    store i64 [[TMP3825]], i64* [[LLV]], align 8
19912 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19913 // CHECK-NEXT:    [[TMP3826:%.*]] = load i64, i64* [[LLE]], align 8
19914 // CHECK-NEXT:    [[TMP3827:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3826]] acq_rel, align 8
19915 // CHECK-NEXT:    store i64 [[TMP3827]], i64* [[LLV]], align 8
19916 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19917 // CHECK-NEXT:    [[TMP3828:%.*]] = load i64, i64* [[LLE]], align 8
19918 // CHECK-NEXT:    [[TMP3829:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3828]] acq_rel, align 8
19919 // CHECK-NEXT:    store i64 [[TMP3829]], i64* [[LLV]], align 8
19920 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19921 // CHECK-NEXT:    [[TMP3830:%.*]] = load i64, i64* [[LLE]], align 8
19922 // CHECK-NEXT:    [[TMP3831:%.*]] = load i64, i64* [[LLD]], align 8
19923 // CHECK-NEXT:    [[TMP3832:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3830]], i64 [[TMP3831]] acq_rel acquire, align 8
19924 // CHECK-NEXT:    [[TMP3833:%.*]] = extractvalue { i64, i1 } [[TMP3832]], 0
19925 // CHECK-NEXT:    store i64 [[TMP3833]], i64* [[LLV]], align 8
19926 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19927 // CHECK-NEXT:    [[TMP3834:%.*]] = load i64, i64* [[LLE]], align 8
19928 // CHECK-NEXT:    [[TMP3835:%.*]] = load i64, i64* [[LLD]], align 8
19929 // CHECK-NEXT:    [[TMP3836:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3834]], i64 [[TMP3835]] acq_rel acquire, align 8
19930 // CHECK-NEXT:    [[TMP3837:%.*]] = extractvalue { i64, i1 } [[TMP3836]], 0
19931 // CHECK-NEXT:    store i64 [[TMP3837]], i64* [[LLV]], align 8
19932 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19933 // CHECK-NEXT:    [[TMP3838:%.*]] = load i64, i64* [[LLE]], align 8
19934 // CHECK-NEXT:    [[TMP3839:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3838]] acq_rel, align 8
19935 // CHECK-NEXT:    [[TMP3840:%.*]] = icmp sgt i64 [[TMP3839]], [[TMP3838]]
19936 // CHECK-NEXT:    [[TMP3841:%.*]] = select i1 [[TMP3840]], i64 [[TMP3838]], i64 [[TMP3839]]
19937 // CHECK-NEXT:    store i64 [[TMP3841]], i64* [[LLV]], align 8
19938 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19939 // CHECK-NEXT:    [[TMP3842:%.*]] = load i64, i64* [[LLE]], align 8
19940 // CHECK-NEXT:    [[TMP3843:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3842]] acq_rel, align 8
19941 // CHECK-NEXT:    [[TMP3844:%.*]] = icmp slt i64 [[TMP3843]], [[TMP3842]]
19942 // CHECK-NEXT:    [[TMP3845:%.*]] = select i1 [[TMP3844]], i64 [[TMP3842]], i64 [[TMP3843]]
19943 // CHECK-NEXT:    store i64 [[TMP3845]], i64* [[LLV]], align 8
19944 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19945 // CHECK-NEXT:    [[TMP3846:%.*]] = load i64, i64* [[LLE]], align 8
19946 // CHECK-NEXT:    [[TMP3847:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3846]] acq_rel, align 8
19947 // CHECK-NEXT:    [[TMP3848:%.*]] = icmp slt i64 [[TMP3847]], [[TMP3846]]
19948 // CHECK-NEXT:    [[TMP3849:%.*]] = select i1 [[TMP3848]], i64 [[TMP3846]], i64 [[TMP3847]]
19949 // CHECK-NEXT:    store i64 [[TMP3849]], i64* [[LLV]], align 8
19950 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19951 // CHECK-NEXT:    [[TMP3850:%.*]] = load i64, i64* [[LLE]], align 8
19952 // CHECK-NEXT:    [[TMP3851:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3850]] acq_rel, align 8
19953 // CHECK-NEXT:    [[TMP3852:%.*]] = icmp sgt i64 [[TMP3851]], [[TMP3850]]
19954 // CHECK-NEXT:    [[TMP3853:%.*]] = select i1 [[TMP3852]], i64 [[TMP3850]], i64 [[TMP3851]]
19955 // CHECK-NEXT:    store i64 [[TMP3853]], i64* [[LLV]], align 8
19956 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19957 // CHECK-NEXT:    [[TMP3854:%.*]] = load i64, i64* [[LLE]], align 8
19958 // CHECK-NEXT:    [[TMP3855:%.*]] = load i64, i64* [[LLD]], align 8
19959 // CHECK-NEXT:    [[TMP3856:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3854]], i64 [[TMP3855]] acq_rel acquire, align 8
19960 // CHECK-NEXT:    [[TMP3857:%.*]] = extractvalue { i64, i1 } [[TMP3856]], 0
19961 // CHECK-NEXT:    [[TMP3858:%.*]] = extractvalue { i64, i1 } [[TMP3856]], 1
19962 // CHECK-NEXT:    [[TMP3859:%.*]] = select i1 [[TMP3858]], i64 [[TMP3854]], i64 [[TMP3857]]
19963 // CHECK-NEXT:    store i64 [[TMP3859]], i64* [[LLV]], align 8
19964 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19965 // CHECK-NEXT:    [[TMP3860:%.*]] = load i64, i64* [[LLE]], align 8
19966 // CHECK-NEXT:    [[TMP3861:%.*]] = load i64, i64* [[LLD]], align 8
19967 // CHECK-NEXT:    [[TMP3862:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3860]], i64 [[TMP3861]] acq_rel acquire, align 8
19968 // CHECK-NEXT:    [[TMP3863:%.*]] = extractvalue { i64, i1 } [[TMP3862]], 0
19969 // CHECK-NEXT:    [[TMP3864:%.*]] = extractvalue { i64, i1 } [[TMP3862]], 1
19970 // CHECK-NEXT:    [[TMP3865:%.*]] = select i1 [[TMP3864]], i64 [[TMP3860]], i64 [[TMP3863]]
19971 // CHECK-NEXT:    store i64 [[TMP3865]], i64* [[LLV]], align 8
19972 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19973 // CHECK-NEXT:    [[TMP3866:%.*]] = load i64, i64* [[LLE]], align 8
19974 // CHECK-NEXT:    [[TMP3867:%.*]] = load i64, i64* [[LLD]], align 8
19975 // CHECK-NEXT:    [[TMP3868:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3866]], i64 [[TMP3867]] acq_rel acquire, align 8
19976 // CHECK-NEXT:    [[TMP3869:%.*]] = extractvalue { i64, i1 } [[TMP3868]], 0
19977 // CHECK-NEXT:    [[TMP3870:%.*]] = extractvalue { i64, i1 } [[TMP3868]], 1
19978 // CHECK-NEXT:    br i1 [[TMP3870]], label [[LLX_ATOMIC_EXIT375:%.*]], label [[LLX_ATOMIC_CONT376:%.*]]
19979 // CHECK:       llx.atomic.cont376:
19980 // CHECK-NEXT:    store i64 [[TMP3869]], i64* [[LLV]], align 8
19981 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT375]]
19982 // CHECK:       llx.atomic.exit375:
19983 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19984 // CHECK-NEXT:    [[TMP3871:%.*]] = load i64, i64* [[LLE]], align 8
19985 // CHECK-NEXT:    [[TMP3872:%.*]] = load i64, i64* [[LLD]], align 8
19986 // CHECK-NEXT:    [[TMP3873:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3871]], i64 [[TMP3872]] acq_rel acquire, align 8
19987 // CHECK-NEXT:    [[TMP3874:%.*]] = extractvalue { i64, i1 } [[TMP3873]], 0
19988 // CHECK-NEXT:    [[TMP3875:%.*]] = extractvalue { i64, i1 } [[TMP3873]], 1
19989 // CHECK-NEXT:    br i1 [[TMP3875]], label [[LLX_ATOMIC_EXIT377:%.*]], label [[LLX_ATOMIC_CONT378:%.*]]
19990 // CHECK:       llx.atomic.cont378:
19991 // CHECK-NEXT:    store i64 [[TMP3874]], i64* [[LLV]], align 8
19992 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT377]]
19993 // CHECK:       llx.atomic.exit377:
19994 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
19995 // CHECK-NEXT:    [[TMP3876:%.*]] = load i64, i64* [[LLE]], align 8
19996 // CHECK-NEXT:    [[TMP3877:%.*]] = load i64, i64* [[LLD]], align 8
19997 // CHECK-NEXT:    [[TMP3878:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3876]], i64 [[TMP3877]] acq_rel acquire, align 8
19998 // CHECK-NEXT:    [[TMP3879:%.*]] = extractvalue { i64, i1 } [[TMP3878]], 1
19999 // CHECK-NEXT:    [[TMP3880:%.*]] = sext i1 [[TMP3879]] to i64
20000 // CHECK-NEXT:    store i64 [[TMP3880]], i64* [[LLR]], align 8
20001 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20002 // CHECK-NEXT:    [[TMP3881:%.*]] = load i64, i64* [[LLE]], align 8
20003 // CHECK-NEXT:    [[TMP3882:%.*]] = load i64, i64* [[LLD]], align 8
20004 // CHECK-NEXT:    [[TMP3883:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3881]], i64 [[TMP3882]] acq_rel acquire, align 8
20005 // CHECK-NEXT:    [[TMP3884:%.*]] = extractvalue { i64, i1 } [[TMP3883]], 1
20006 // CHECK-NEXT:    [[TMP3885:%.*]] = sext i1 [[TMP3884]] to i64
20007 // CHECK-NEXT:    store i64 [[TMP3885]], i64* [[LLR]], align 8
20008 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20009 // CHECK-NEXT:    [[TMP3886:%.*]] = load i64, i64* [[LLE]], align 8
20010 // CHECK-NEXT:    [[TMP3887:%.*]] = load i64, i64* [[LLD]], align 8
20011 // CHECK-NEXT:    [[TMP3888:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3886]], i64 [[TMP3887]] acq_rel acquire, align 8
20012 // CHECK-NEXT:    [[TMP3889:%.*]] = extractvalue { i64, i1 } [[TMP3888]], 0
20013 // CHECK-NEXT:    [[TMP3890:%.*]] = extractvalue { i64, i1 } [[TMP3888]], 1
20014 // CHECK-NEXT:    br i1 [[TMP3890]], label [[LLX_ATOMIC_EXIT379:%.*]], label [[LLX_ATOMIC_CONT380:%.*]]
20015 // CHECK:       llx.atomic.cont380:
20016 // CHECK-NEXT:    store i64 [[TMP3889]], i64* [[LLV]], align 8
20017 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT379]]
20018 // CHECK:       llx.atomic.exit379:
20019 // CHECK-NEXT:    [[TMP3891:%.*]] = extractvalue { i64, i1 } [[TMP3888]], 1
20020 // CHECK-NEXT:    [[TMP3892:%.*]] = sext i1 [[TMP3891]] to i64
20021 // CHECK-NEXT:    store i64 [[TMP3892]], i64* [[LLR]], align 8
20022 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20023 // CHECK-NEXT:    [[TMP3893:%.*]] = load i64, i64* [[LLE]], align 8
20024 // CHECK-NEXT:    [[TMP3894:%.*]] = load i64, i64* [[LLD]], align 8
20025 // CHECK-NEXT:    [[TMP3895:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3893]], i64 [[TMP3894]] acq_rel acquire, align 8
20026 // CHECK-NEXT:    [[TMP3896:%.*]] = extractvalue { i64, i1 } [[TMP3895]], 0
20027 // CHECK-NEXT:    [[TMP3897:%.*]] = extractvalue { i64, i1 } [[TMP3895]], 1
20028 // CHECK-NEXT:    br i1 [[TMP3897]], label [[LLX_ATOMIC_EXIT381:%.*]], label [[LLX_ATOMIC_CONT382:%.*]]
20029 // CHECK:       llx.atomic.cont382:
20030 // CHECK-NEXT:    store i64 [[TMP3896]], i64* [[LLV]], align 8
20031 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT381]]
20032 // CHECK:       llx.atomic.exit381:
20033 // CHECK-NEXT:    [[TMP3898:%.*]] = extractvalue { i64, i1 } [[TMP3895]], 1
20034 // CHECK-NEXT:    [[TMP3899:%.*]] = sext i1 [[TMP3898]] to i64
20035 // CHECK-NEXT:    store i64 [[TMP3899]], i64* [[LLR]], align 8
20036 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20037 // CHECK-NEXT:    [[TMP3900:%.*]] = load i64, i64* [[LLE]], align 8
20038 // CHECK-NEXT:    [[TMP3901:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3900]] acquire, align 8
20039 // CHECK-NEXT:    store i64 [[TMP3901]], i64* [[LLV]], align 8
20040 // CHECK-NEXT:    [[TMP3902:%.*]] = load i64, i64* [[LLE]], align 8
20041 // CHECK-NEXT:    [[TMP3903:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3902]] acquire, align 8
20042 // CHECK-NEXT:    store i64 [[TMP3903]], i64* [[LLV]], align 8
20043 // CHECK-NEXT:    [[TMP3904:%.*]] = load i64, i64* [[LLE]], align 8
20044 // CHECK-NEXT:    [[TMP3905:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3904]] acquire, align 8
20045 // CHECK-NEXT:    store i64 [[TMP3905]], i64* [[LLV]], align 8
20046 // CHECK-NEXT:    [[TMP3906:%.*]] = load i64, i64* [[LLE]], align 8
20047 // CHECK-NEXT:    [[TMP3907:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3906]] acquire, align 8
20048 // CHECK-NEXT:    store i64 [[TMP3907]], i64* [[LLV]], align 8
20049 // CHECK-NEXT:    [[TMP3908:%.*]] = load i64, i64* [[LLE]], align 8
20050 // CHECK-NEXT:    [[TMP3909:%.*]] = load i64, i64* [[LLD]], align 8
20051 // CHECK-NEXT:    [[TMP3910:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3908]], i64 [[TMP3909]] acquire acquire, align 8
20052 // CHECK-NEXT:    [[TMP3911:%.*]] = extractvalue { i64, i1 } [[TMP3910]], 0
20053 // CHECK-NEXT:    store i64 [[TMP3911]], i64* [[LLV]], align 8
20054 // CHECK-NEXT:    [[TMP3912:%.*]] = load i64, i64* [[LLE]], align 8
20055 // CHECK-NEXT:    [[TMP3913:%.*]] = load i64, i64* [[LLD]], align 8
20056 // CHECK-NEXT:    [[TMP3914:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3912]], i64 [[TMP3913]] acquire acquire, align 8
20057 // CHECK-NEXT:    [[TMP3915:%.*]] = extractvalue { i64, i1 } [[TMP3914]], 0
20058 // CHECK-NEXT:    store i64 [[TMP3915]], i64* [[LLV]], align 8
20059 // CHECK-NEXT:    [[TMP3916:%.*]] = load i64, i64* [[LLE]], align 8
20060 // CHECK-NEXT:    [[TMP3917:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3916]] acquire, align 8
20061 // CHECK-NEXT:    [[TMP3918:%.*]] = icmp sgt i64 [[TMP3917]], [[TMP3916]]
20062 // CHECK-NEXT:    [[TMP3919:%.*]] = select i1 [[TMP3918]], i64 [[TMP3916]], i64 [[TMP3917]]
20063 // CHECK-NEXT:    store i64 [[TMP3919]], i64* [[LLV]], align 8
20064 // CHECK-NEXT:    [[TMP3920:%.*]] = load i64, i64* [[LLE]], align 8
20065 // CHECK-NEXT:    [[TMP3921:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3920]] acquire, align 8
20066 // CHECK-NEXT:    [[TMP3922:%.*]] = icmp slt i64 [[TMP3921]], [[TMP3920]]
20067 // CHECK-NEXT:    [[TMP3923:%.*]] = select i1 [[TMP3922]], i64 [[TMP3920]], i64 [[TMP3921]]
20068 // CHECK-NEXT:    store i64 [[TMP3923]], i64* [[LLV]], align 8
20069 // CHECK-NEXT:    [[TMP3924:%.*]] = load i64, i64* [[LLE]], align 8
20070 // CHECK-NEXT:    [[TMP3925:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3924]] acquire, align 8
20071 // CHECK-NEXT:    [[TMP3926:%.*]] = icmp slt i64 [[TMP3925]], [[TMP3924]]
20072 // CHECK-NEXT:    [[TMP3927:%.*]] = select i1 [[TMP3926]], i64 [[TMP3924]], i64 [[TMP3925]]
20073 // CHECK-NEXT:    store i64 [[TMP3927]], i64* [[LLV]], align 8
20074 // CHECK-NEXT:    [[TMP3928:%.*]] = load i64, i64* [[LLE]], align 8
20075 // CHECK-NEXT:    [[TMP3929:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3928]] acquire, align 8
20076 // CHECK-NEXT:    [[TMP3930:%.*]] = icmp sgt i64 [[TMP3929]], [[TMP3928]]
20077 // CHECK-NEXT:    [[TMP3931:%.*]] = select i1 [[TMP3930]], i64 [[TMP3928]], i64 [[TMP3929]]
20078 // CHECK-NEXT:    store i64 [[TMP3931]], i64* [[LLV]], align 8
20079 // CHECK-NEXT:    [[TMP3932:%.*]] = load i64, i64* [[LLE]], align 8
20080 // CHECK-NEXT:    [[TMP3933:%.*]] = load i64, i64* [[LLD]], align 8
20081 // CHECK-NEXT:    [[TMP3934:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3932]], i64 [[TMP3933]] acquire acquire, align 8
20082 // CHECK-NEXT:    [[TMP3935:%.*]] = extractvalue { i64, i1 } [[TMP3934]], 0
20083 // CHECK-NEXT:    [[TMP3936:%.*]] = extractvalue { i64, i1 } [[TMP3934]], 1
20084 // CHECK-NEXT:    [[TMP3937:%.*]] = select i1 [[TMP3936]], i64 [[TMP3932]], i64 [[TMP3935]]
20085 // CHECK-NEXT:    store i64 [[TMP3937]], i64* [[LLV]], align 8
20086 // CHECK-NEXT:    [[TMP3938:%.*]] = load i64, i64* [[LLE]], align 8
20087 // CHECK-NEXT:    [[TMP3939:%.*]] = load i64, i64* [[LLD]], align 8
20088 // CHECK-NEXT:    [[TMP3940:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3938]], i64 [[TMP3939]] acquire acquire, align 8
20089 // CHECK-NEXT:    [[TMP3941:%.*]] = extractvalue { i64, i1 } [[TMP3940]], 0
20090 // CHECK-NEXT:    [[TMP3942:%.*]] = extractvalue { i64, i1 } [[TMP3940]], 1
20091 // CHECK-NEXT:    [[TMP3943:%.*]] = select i1 [[TMP3942]], i64 [[TMP3938]], i64 [[TMP3941]]
20092 // CHECK-NEXT:    store i64 [[TMP3943]], i64* [[LLV]], align 8
20093 // CHECK-NEXT:    [[TMP3944:%.*]] = load i64, i64* [[LLE]], align 8
20094 // CHECK-NEXT:    [[TMP3945:%.*]] = load i64, i64* [[LLD]], align 8
20095 // CHECK-NEXT:    [[TMP3946:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3944]], i64 [[TMP3945]] acquire acquire, align 8
20096 // CHECK-NEXT:    [[TMP3947:%.*]] = extractvalue { i64, i1 } [[TMP3946]], 0
20097 // CHECK-NEXT:    [[TMP3948:%.*]] = extractvalue { i64, i1 } [[TMP3946]], 1
20098 // CHECK-NEXT:    br i1 [[TMP3948]], label [[LLX_ATOMIC_EXIT383:%.*]], label [[LLX_ATOMIC_CONT384:%.*]]
20099 // CHECK:       llx.atomic.cont384:
20100 // CHECK-NEXT:    store i64 [[TMP3947]], i64* [[LLV]], align 8
20101 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT383]]
20102 // CHECK:       llx.atomic.exit383:
20103 // CHECK-NEXT:    [[TMP3949:%.*]] = load i64, i64* [[LLE]], align 8
20104 // CHECK-NEXT:    [[TMP3950:%.*]] = load i64, i64* [[LLD]], align 8
20105 // CHECK-NEXT:    [[TMP3951:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3949]], i64 [[TMP3950]] acquire acquire, align 8
20106 // CHECK-NEXT:    [[TMP3952:%.*]] = extractvalue { i64, i1 } [[TMP3951]], 0
20107 // CHECK-NEXT:    [[TMP3953:%.*]] = extractvalue { i64, i1 } [[TMP3951]], 1
20108 // CHECK-NEXT:    br i1 [[TMP3953]], label [[LLX_ATOMIC_EXIT385:%.*]], label [[LLX_ATOMIC_CONT386:%.*]]
20109 // CHECK:       llx.atomic.cont386:
20110 // CHECK-NEXT:    store i64 [[TMP3952]], i64* [[LLV]], align 8
20111 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT385]]
20112 // CHECK:       llx.atomic.exit385:
20113 // CHECK-NEXT:    [[TMP3954:%.*]] = load i64, i64* [[LLE]], align 8
20114 // CHECK-NEXT:    [[TMP3955:%.*]] = load i64, i64* [[LLD]], align 8
20115 // CHECK-NEXT:    [[TMP3956:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3954]], i64 [[TMP3955]] acquire acquire, align 8
20116 // CHECK-NEXT:    [[TMP3957:%.*]] = extractvalue { i64, i1 } [[TMP3956]], 1
20117 // CHECK-NEXT:    [[TMP3958:%.*]] = sext i1 [[TMP3957]] to i64
20118 // CHECK-NEXT:    store i64 [[TMP3958]], i64* [[LLR]], align 8
20119 // CHECK-NEXT:    [[TMP3959:%.*]] = load i64, i64* [[LLE]], align 8
20120 // CHECK-NEXT:    [[TMP3960:%.*]] = load i64, i64* [[LLD]], align 8
20121 // CHECK-NEXT:    [[TMP3961:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3959]], i64 [[TMP3960]] acquire acquire, align 8
20122 // CHECK-NEXT:    [[TMP3962:%.*]] = extractvalue { i64, i1 } [[TMP3961]], 1
20123 // CHECK-NEXT:    [[TMP3963:%.*]] = sext i1 [[TMP3962]] to i64
20124 // CHECK-NEXT:    store i64 [[TMP3963]], i64* [[LLR]], align 8
20125 // CHECK-NEXT:    [[TMP3964:%.*]] = load i64, i64* [[LLE]], align 8
20126 // CHECK-NEXT:    [[TMP3965:%.*]] = load i64, i64* [[LLD]], align 8
20127 // CHECK-NEXT:    [[TMP3966:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3964]], i64 [[TMP3965]] acquire acquire, align 8
20128 // CHECK-NEXT:    [[TMP3967:%.*]] = extractvalue { i64, i1 } [[TMP3966]], 0
20129 // CHECK-NEXT:    [[TMP3968:%.*]] = extractvalue { i64, i1 } [[TMP3966]], 1
20130 // CHECK-NEXT:    br i1 [[TMP3968]], label [[LLX_ATOMIC_EXIT387:%.*]], label [[LLX_ATOMIC_CONT388:%.*]]
20131 // CHECK:       llx.atomic.cont388:
20132 // CHECK-NEXT:    store i64 [[TMP3967]], i64* [[LLV]], align 8
20133 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT387]]
20134 // CHECK:       llx.atomic.exit387:
20135 // CHECK-NEXT:    [[TMP3969:%.*]] = extractvalue { i64, i1 } [[TMP3966]], 1
20136 // CHECK-NEXT:    [[TMP3970:%.*]] = sext i1 [[TMP3969]] to i64
20137 // CHECK-NEXT:    store i64 [[TMP3970]], i64* [[LLR]], align 8
20138 // CHECK-NEXT:    [[TMP3971:%.*]] = load i64, i64* [[LLE]], align 8
20139 // CHECK-NEXT:    [[TMP3972:%.*]] = load i64, i64* [[LLD]], align 8
20140 // CHECK-NEXT:    [[TMP3973:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3971]], i64 [[TMP3972]] acquire acquire, align 8
20141 // CHECK-NEXT:    [[TMP3974:%.*]] = extractvalue { i64, i1 } [[TMP3973]], 0
20142 // CHECK-NEXT:    [[TMP3975:%.*]] = extractvalue { i64, i1 } [[TMP3973]], 1
20143 // CHECK-NEXT:    br i1 [[TMP3975]], label [[LLX_ATOMIC_EXIT389:%.*]], label [[LLX_ATOMIC_CONT390:%.*]]
20144 // CHECK:       llx.atomic.cont390:
20145 // CHECK-NEXT:    store i64 [[TMP3974]], i64* [[LLV]], align 8
20146 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT389]]
20147 // CHECK:       llx.atomic.exit389:
20148 // CHECK-NEXT:    [[TMP3976:%.*]] = extractvalue { i64, i1 } [[TMP3973]], 1
20149 // CHECK-NEXT:    [[TMP3977:%.*]] = sext i1 [[TMP3976]] to i64
20150 // CHECK-NEXT:    store i64 [[TMP3977]], i64* [[LLR]], align 8
20151 // CHECK-NEXT:    [[TMP3978:%.*]] = load i64, i64* [[LLE]], align 8
20152 // CHECK-NEXT:    [[TMP3979:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3978]] monotonic, align 8
20153 // CHECK-NEXT:    store i64 [[TMP3979]], i64* [[LLV]], align 8
20154 // CHECK-NEXT:    [[TMP3980:%.*]] = load i64, i64* [[LLE]], align 8
20155 // CHECK-NEXT:    [[TMP3981:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3980]] monotonic, align 8
20156 // CHECK-NEXT:    store i64 [[TMP3981]], i64* [[LLV]], align 8
20157 // CHECK-NEXT:    [[TMP3982:%.*]] = load i64, i64* [[LLE]], align 8
20158 // CHECK-NEXT:    [[TMP3983:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3982]] monotonic, align 8
20159 // CHECK-NEXT:    store i64 [[TMP3983]], i64* [[LLV]], align 8
20160 // CHECK-NEXT:    [[TMP3984:%.*]] = load i64, i64* [[LLE]], align 8
20161 // CHECK-NEXT:    [[TMP3985:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3984]] monotonic, align 8
20162 // CHECK-NEXT:    store i64 [[TMP3985]], i64* [[LLV]], align 8
20163 // CHECK-NEXT:    [[TMP3986:%.*]] = load i64, i64* [[LLE]], align 8
20164 // CHECK-NEXT:    [[TMP3987:%.*]] = load i64, i64* [[LLD]], align 8
20165 // CHECK-NEXT:    [[TMP3988:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3986]], i64 [[TMP3987]] monotonic monotonic, align 8
20166 // CHECK-NEXT:    [[TMP3989:%.*]] = extractvalue { i64, i1 } [[TMP3988]], 0
20167 // CHECK-NEXT:    store i64 [[TMP3989]], i64* [[LLV]], align 8
20168 // CHECK-NEXT:    [[TMP3990:%.*]] = load i64, i64* [[LLE]], align 8
20169 // CHECK-NEXT:    [[TMP3991:%.*]] = load i64, i64* [[LLD]], align 8
20170 // CHECK-NEXT:    [[TMP3992:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP3990]], i64 [[TMP3991]] monotonic monotonic, align 8
20171 // CHECK-NEXT:    [[TMP3993:%.*]] = extractvalue { i64, i1 } [[TMP3992]], 0
20172 // CHECK-NEXT:    store i64 [[TMP3993]], i64* [[LLV]], align 8
20173 // CHECK-NEXT:    [[TMP3994:%.*]] = load i64, i64* [[LLE]], align 8
20174 // CHECK-NEXT:    [[TMP3995:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP3994]] monotonic, align 8
20175 // CHECK-NEXT:    [[TMP3996:%.*]] = icmp sgt i64 [[TMP3995]], [[TMP3994]]
20176 // CHECK-NEXT:    [[TMP3997:%.*]] = select i1 [[TMP3996]], i64 [[TMP3994]], i64 [[TMP3995]]
20177 // CHECK-NEXT:    store i64 [[TMP3997]], i64* [[LLV]], align 8
20178 // CHECK-NEXT:    [[TMP3998:%.*]] = load i64, i64* [[LLE]], align 8
20179 // CHECK-NEXT:    [[TMP3999:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP3998]] monotonic, align 8
20180 // CHECK-NEXT:    [[TMP4000:%.*]] = icmp slt i64 [[TMP3999]], [[TMP3998]]
20181 // CHECK-NEXT:    [[TMP4001:%.*]] = select i1 [[TMP4000]], i64 [[TMP3998]], i64 [[TMP3999]]
20182 // CHECK-NEXT:    store i64 [[TMP4001]], i64* [[LLV]], align 8
20183 // CHECK-NEXT:    [[TMP4002:%.*]] = load i64, i64* [[LLE]], align 8
20184 // CHECK-NEXT:    [[TMP4003:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4002]] monotonic, align 8
20185 // CHECK-NEXT:    [[TMP4004:%.*]] = icmp slt i64 [[TMP4003]], [[TMP4002]]
20186 // CHECK-NEXT:    [[TMP4005:%.*]] = select i1 [[TMP4004]], i64 [[TMP4002]], i64 [[TMP4003]]
20187 // CHECK-NEXT:    store i64 [[TMP4005]], i64* [[LLV]], align 8
20188 // CHECK-NEXT:    [[TMP4006:%.*]] = load i64, i64* [[LLE]], align 8
20189 // CHECK-NEXT:    [[TMP4007:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4006]] monotonic, align 8
20190 // CHECK-NEXT:    [[TMP4008:%.*]] = icmp sgt i64 [[TMP4007]], [[TMP4006]]
20191 // CHECK-NEXT:    [[TMP4009:%.*]] = select i1 [[TMP4008]], i64 [[TMP4006]], i64 [[TMP4007]]
20192 // CHECK-NEXT:    store i64 [[TMP4009]], i64* [[LLV]], align 8
20193 // CHECK-NEXT:    [[TMP4010:%.*]] = load i64, i64* [[LLE]], align 8
20194 // CHECK-NEXT:    [[TMP4011:%.*]] = load i64, i64* [[LLD]], align 8
20195 // CHECK-NEXT:    [[TMP4012:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4010]], i64 [[TMP4011]] monotonic monotonic, align 8
20196 // CHECK-NEXT:    [[TMP4013:%.*]] = extractvalue { i64, i1 } [[TMP4012]], 0
20197 // CHECK-NEXT:    [[TMP4014:%.*]] = extractvalue { i64, i1 } [[TMP4012]], 1
20198 // CHECK-NEXT:    [[TMP4015:%.*]] = select i1 [[TMP4014]], i64 [[TMP4010]], i64 [[TMP4013]]
20199 // CHECK-NEXT:    store i64 [[TMP4015]], i64* [[LLV]], align 8
20200 // CHECK-NEXT:    [[TMP4016:%.*]] = load i64, i64* [[LLE]], align 8
20201 // CHECK-NEXT:    [[TMP4017:%.*]] = load i64, i64* [[LLD]], align 8
20202 // CHECK-NEXT:    [[TMP4018:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4016]], i64 [[TMP4017]] monotonic monotonic, align 8
20203 // CHECK-NEXT:    [[TMP4019:%.*]] = extractvalue { i64, i1 } [[TMP4018]], 0
20204 // CHECK-NEXT:    [[TMP4020:%.*]] = extractvalue { i64, i1 } [[TMP4018]], 1
20205 // CHECK-NEXT:    [[TMP4021:%.*]] = select i1 [[TMP4020]], i64 [[TMP4016]], i64 [[TMP4019]]
20206 // CHECK-NEXT:    store i64 [[TMP4021]], i64* [[LLV]], align 8
20207 // CHECK-NEXT:    [[TMP4022:%.*]] = load i64, i64* [[LLE]], align 8
20208 // CHECK-NEXT:    [[TMP4023:%.*]] = load i64, i64* [[LLD]], align 8
20209 // CHECK-NEXT:    [[TMP4024:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4022]], i64 [[TMP4023]] monotonic monotonic, align 8
20210 // CHECK-NEXT:    [[TMP4025:%.*]] = extractvalue { i64, i1 } [[TMP4024]], 0
20211 // CHECK-NEXT:    [[TMP4026:%.*]] = extractvalue { i64, i1 } [[TMP4024]], 1
20212 // CHECK-NEXT:    br i1 [[TMP4026]], label [[LLX_ATOMIC_EXIT391:%.*]], label [[LLX_ATOMIC_CONT392:%.*]]
20213 // CHECK:       llx.atomic.cont392:
20214 // CHECK-NEXT:    store i64 [[TMP4025]], i64* [[LLV]], align 8
20215 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT391]]
20216 // CHECK:       llx.atomic.exit391:
20217 // CHECK-NEXT:    [[TMP4027:%.*]] = load i64, i64* [[LLE]], align 8
20218 // CHECK-NEXT:    [[TMP4028:%.*]] = load i64, i64* [[LLD]], align 8
20219 // CHECK-NEXT:    [[TMP4029:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4027]], i64 [[TMP4028]] monotonic monotonic, align 8
20220 // CHECK-NEXT:    [[TMP4030:%.*]] = extractvalue { i64, i1 } [[TMP4029]], 0
20221 // CHECK-NEXT:    [[TMP4031:%.*]] = extractvalue { i64, i1 } [[TMP4029]], 1
20222 // CHECK-NEXT:    br i1 [[TMP4031]], label [[LLX_ATOMIC_EXIT393:%.*]], label [[LLX_ATOMIC_CONT394:%.*]]
20223 // CHECK:       llx.atomic.cont394:
20224 // CHECK-NEXT:    store i64 [[TMP4030]], i64* [[LLV]], align 8
20225 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT393]]
20226 // CHECK:       llx.atomic.exit393:
20227 // CHECK-NEXT:    [[TMP4032:%.*]] = load i64, i64* [[LLE]], align 8
20228 // CHECK-NEXT:    [[TMP4033:%.*]] = load i64, i64* [[LLD]], align 8
20229 // CHECK-NEXT:    [[TMP4034:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4032]], i64 [[TMP4033]] monotonic monotonic, align 8
20230 // CHECK-NEXT:    [[TMP4035:%.*]] = extractvalue { i64, i1 } [[TMP4034]], 1
20231 // CHECK-NEXT:    [[TMP4036:%.*]] = sext i1 [[TMP4035]] to i64
20232 // CHECK-NEXT:    store i64 [[TMP4036]], i64* [[LLR]], align 8
20233 // CHECK-NEXT:    [[TMP4037:%.*]] = load i64, i64* [[LLE]], align 8
20234 // CHECK-NEXT:    [[TMP4038:%.*]] = load i64, i64* [[LLD]], align 8
20235 // CHECK-NEXT:    [[TMP4039:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4037]], i64 [[TMP4038]] monotonic monotonic, align 8
20236 // CHECK-NEXT:    [[TMP4040:%.*]] = extractvalue { i64, i1 } [[TMP4039]], 1
20237 // CHECK-NEXT:    [[TMP4041:%.*]] = sext i1 [[TMP4040]] to i64
20238 // CHECK-NEXT:    store i64 [[TMP4041]], i64* [[LLR]], align 8
20239 // CHECK-NEXT:    [[TMP4042:%.*]] = load i64, i64* [[LLE]], align 8
20240 // CHECK-NEXT:    [[TMP4043:%.*]] = load i64, i64* [[LLD]], align 8
20241 // CHECK-NEXT:    [[TMP4044:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4042]], i64 [[TMP4043]] monotonic monotonic, align 8
20242 // CHECK-NEXT:    [[TMP4045:%.*]] = extractvalue { i64, i1 } [[TMP4044]], 0
20243 // CHECK-NEXT:    [[TMP4046:%.*]] = extractvalue { i64, i1 } [[TMP4044]], 1
20244 // CHECK-NEXT:    br i1 [[TMP4046]], label [[LLX_ATOMIC_EXIT395:%.*]], label [[LLX_ATOMIC_CONT396:%.*]]
20245 // CHECK:       llx.atomic.cont396:
20246 // CHECK-NEXT:    store i64 [[TMP4045]], i64* [[LLV]], align 8
20247 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT395]]
20248 // CHECK:       llx.atomic.exit395:
20249 // CHECK-NEXT:    [[TMP4047:%.*]] = extractvalue { i64, i1 } [[TMP4044]], 1
20250 // CHECK-NEXT:    [[TMP4048:%.*]] = sext i1 [[TMP4047]] to i64
20251 // CHECK-NEXT:    store i64 [[TMP4048]], i64* [[LLR]], align 8
20252 // CHECK-NEXT:    [[TMP4049:%.*]] = load i64, i64* [[LLE]], align 8
20253 // CHECK-NEXT:    [[TMP4050:%.*]] = load i64, i64* [[LLD]], align 8
20254 // CHECK-NEXT:    [[TMP4051:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4049]], i64 [[TMP4050]] monotonic monotonic, align 8
20255 // CHECK-NEXT:    [[TMP4052:%.*]] = extractvalue { i64, i1 } [[TMP4051]], 0
20256 // CHECK-NEXT:    [[TMP4053:%.*]] = extractvalue { i64, i1 } [[TMP4051]], 1
20257 // CHECK-NEXT:    br i1 [[TMP4053]], label [[LLX_ATOMIC_EXIT397:%.*]], label [[LLX_ATOMIC_CONT398:%.*]]
20258 // CHECK:       llx.atomic.cont398:
20259 // CHECK-NEXT:    store i64 [[TMP4052]], i64* [[LLV]], align 8
20260 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT397]]
20261 // CHECK:       llx.atomic.exit397:
20262 // CHECK-NEXT:    [[TMP4054:%.*]] = extractvalue { i64, i1 } [[TMP4051]], 1
20263 // CHECK-NEXT:    [[TMP4055:%.*]] = sext i1 [[TMP4054]] to i64
20264 // CHECK-NEXT:    store i64 [[TMP4055]], i64* [[LLR]], align 8
20265 // CHECK-NEXT:    [[TMP4056:%.*]] = load i64, i64* [[LLE]], align 8
20266 // CHECK-NEXT:    [[TMP4057:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4056]] release, align 8
20267 // CHECK-NEXT:    store i64 [[TMP4057]], i64* [[LLV]], align 8
20268 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20269 // CHECK-NEXT:    [[TMP4058:%.*]] = load i64, i64* [[LLE]], align 8
20270 // CHECK-NEXT:    [[TMP4059:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4058]] release, align 8
20271 // CHECK-NEXT:    store i64 [[TMP4059]], i64* [[LLV]], align 8
20272 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20273 // CHECK-NEXT:    [[TMP4060:%.*]] = load i64, i64* [[LLE]], align 8
20274 // CHECK-NEXT:    [[TMP4061:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4060]] release, align 8
20275 // CHECK-NEXT:    store i64 [[TMP4061]], i64* [[LLV]], align 8
20276 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20277 // CHECK-NEXT:    [[TMP4062:%.*]] = load i64, i64* [[LLE]], align 8
20278 // CHECK-NEXT:    [[TMP4063:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4062]] release, align 8
20279 // CHECK-NEXT:    store i64 [[TMP4063]], i64* [[LLV]], align 8
20280 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20281 // CHECK-NEXT:    [[TMP4064:%.*]] = load i64, i64* [[LLE]], align 8
20282 // CHECK-NEXT:    [[TMP4065:%.*]] = load i64, i64* [[LLD]], align 8
20283 // CHECK-NEXT:    [[TMP4066:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4064]], i64 [[TMP4065]] release monotonic, align 8
20284 // CHECK-NEXT:    [[TMP4067:%.*]] = extractvalue { i64, i1 } [[TMP4066]], 0
20285 // CHECK-NEXT:    store i64 [[TMP4067]], i64* [[LLV]], align 8
20286 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20287 // CHECK-NEXT:    [[TMP4068:%.*]] = load i64, i64* [[LLE]], align 8
20288 // CHECK-NEXT:    [[TMP4069:%.*]] = load i64, i64* [[LLD]], align 8
20289 // CHECK-NEXT:    [[TMP4070:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4068]], i64 [[TMP4069]] release monotonic, align 8
20290 // CHECK-NEXT:    [[TMP4071:%.*]] = extractvalue { i64, i1 } [[TMP4070]], 0
20291 // CHECK-NEXT:    store i64 [[TMP4071]], i64* [[LLV]], align 8
20292 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20293 // CHECK-NEXT:    [[TMP4072:%.*]] = load i64, i64* [[LLE]], align 8
20294 // CHECK-NEXT:    [[TMP4073:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4072]] release, align 8
20295 // CHECK-NEXT:    [[TMP4074:%.*]] = icmp sgt i64 [[TMP4073]], [[TMP4072]]
20296 // CHECK-NEXT:    [[TMP4075:%.*]] = select i1 [[TMP4074]], i64 [[TMP4072]], i64 [[TMP4073]]
20297 // CHECK-NEXT:    store i64 [[TMP4075]], i64* [[LLV]], align 8
20298 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20299 // CHECK-NEXT:    [[TMP4076:%.*]] = load i64, i64* [[LLE]], align 8
20300 // CHECK-NEXT:    [[TMP4077:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4076]] release, align 8
20301 // CHECK-NEXT:    [[TMP4078:%.*]] = icmp slt i64 [[TMP4077]], [[TMP4076]]
20302 // CHECK-NEXT:    [[TMP4079:%.*]] = select i1 [[TMP4078]], i64 [[TMP4076]], i64 [[TMP4077]]
20303 // CHECK-NEXT:    store i64 [[TMP4079]], i64* [[LLV]], align 8
20304 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20305 // CHECK-NEXT:    [[TMP4080:%.*]] = load i64, i64* [[LLE]], align 8
20306 // CHECK-NEXT:    [[TMP4081:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4080]] release, align 8
20307 // CHECK-NEXT:    [[TMP4082:%.*]] = icmp slt i64 [[TMP4081]], [[TMP4080]]
20308 // CHECK-NEXT:    [[TMP4083:%.*]] = select i1 [[TMP4082]], i64 [[TMP4080]], i64 [[TMP4081]]
20309 // CHECK-NEXT:    store i64 [[TMP4083]], i64* [[LLV]], align 8
20310 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20311 // CHECK-NEXT:    [[TMP4084:%.*]] = load i64, i64* [[LLE]], align 8
20312 // CHECK-NEXT:    [[TMP4085:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4084]] release, align 8
20313 // CHECK-NEXT:    [[TMP4086:%.*]] = icmp sgt i64 [[TMP4085]], [[TMP4084]]
20314 // CHECK-NEXT:    [[TMP4087:%.*]] = select i1 [[TMP4086]], i64 [[TMP4084]], i64 [[TMP4085]]
20315 // CHECK-NEXT:    store i64 [[TMP4087]], i64* [[LLV]], align 8
20316 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20317 // CHECK-NEXT:    [[TMP4088:%.*]] = load i64, i64* [[LLE]], align 8
20318 // CHECK-NEXT:    [[TMP4089:%.*]] = load i64, i64* [[LLD]], align 8
20319 // CHECK-NEXT:    [[TMP4090:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4088]], i64 [[TMP4089]] release monotonic, align 8
20320 // CHECK-NEXT:    [[TMP4091:%.*]] = extractvalue { i64, i1 } [[TMP4090]], 0
20321 // CHECK-NEXT:    [[TMP4092:%.*]] = extractvalue { i64, i1 } [[TMP4090]], 1
20322 // CHECK-NEXT:    [[TMP4093:%.*]] = select i1 [[TMP4092]], i64 [[TMP4088]], i64 [[TMP4091]]
20323 // CHECK-NEXT:    store i64 [[TMP4093]], i64* [[LLV]], align 8
20324 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20325 // CHECK-NEXT:    [[TMP4094:%.*]] = load i64, i64* [[LLE]], align 8
20326 // CHECK-NEXT:    [[TMP4095:%.*]] = load i64, i64* [[LLD]], align 8
20327 // CHECK-NEXT:    [[TMP4096:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4094]], i64 [[TMP4095]] release monotonic, align 8
20328 // CHECK-NEXT:    [[TMP4097:%.*]] = extractvalue { i64, i1 } [[TMP4096]], 0
20329 // CHECK-NEXT:    [[TMP4098:%.*]] = extractvalue { i64, i1 } [[TMP4096]], 1
20330 // CHECK-NEXT:    [[TMP4099:%.*]] = select i1 [[TMP4098]], i64 [[TMP4094]], i64 [[TMP4097]]
20331 // CHECK-NEXT:    store i64 [[TMP4099]], i64* [[LLV]], align 8
20332 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20333 // CHECK-NEXT:    [[TMP4100:%.*]] = load i64, i64* [[LLE]], align 8
20334 // CHECK-NEXT:    [[TMP4101:%.*]] = load i64, i64* [[LLD]], align 8
20335 // CHECK-NEXT:    [[TMP4102:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4100]], i64 [[TMP4101]] release monotonic, align 8
20336 // CHECK-NEXT:    [[TMP4103:%.*]] = extractvalue { i64, i1 } [[TMP4102]], 0
20337 // CHECK-NEXT:    [[TMP4104:%.*]] = extractvalue { i64, i1 } [[TMP4102]], 1
20338 // CHECK-NEXT:    br i1 [[TMP4104]], label [[LLX_ATOMIC_EXIT399:%.*]], label [[LLX_ATOMIC_CONT400:%.*]]
20339 // CHECK:       llx.atomic.cont400:
20340 // CHECK-NEXT:    store i64 [[TMP4103]], i64* [[LLV]], align 8
20341 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT399]]
20342 // CHECK:       llx.atomic.exit399:
20343 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20344 // CHECK-NEXT:    [[TMP4105:%.*]] = load i64, i64* [[LLE]], align 8
20345 // CHECK-NEXT:    [[TMP4106:%.*]] = load i64, i64* [[LLD]], align 8
20346 // CHECK-NEXT:    [[TMP4107:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4105]], i64 [[TMP4106]] release monotonic, align 8
20347 // CHECK-NEXT:    [[TMP4108:%.*]] = extractvalue { i64, i1 } [[TMP4107]], 0
20348 // CHECK-NEXT:    [[TMP4109:%.*]] = extractvalue { i64, i1 } [[TMP4107]], 1
20349 // CHECK-NEXT:    br i1 [[TMP4109]], label [[LLX_ATOMIC_EXIT401:%.*]], label [[LLX_ATOMIC_CONT402:%.*]]
20350 // CHECK:       llx.atomic.cont402:
20351 // CHECK-NEXT:    store i64 [[TMP4108]], i64* [[LLV]], align 8
20352 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT401]]
20353 // CHECK:       llx.atomic.exit401:
20354 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20355 // CHECK-NEXT:    [[TMP4110:%.*]] = load i64, i64* [[LLE]], align 8
20356 // CHECK-NEXT:    [[TMP4111:%.*]] = load i64, i64* [[LLD]], align 8
20357 // CHECK-NEXT:    [[TMP4112:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4110]], i64 [[TMP4111]] release monotonic, align 8
20358 // CHECK-NEXT:    [[TMP4113:%.*]] = extractvalue { i64, i1 } [[TMP4112]], 1
20359 // CHECK-NEXT:    [[TMP4114:%.*]] = sext i1 [[TMP4113]] to i64
20360 // CHECK-NEXT:    store i64 [[TMP4114]], i64* [[LLR]], align 8
20361 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20362 // CHECK-NEXT:    [[TMP4115:%.*]] = load i64, i64* [[LLE]], align 8
20363 // CHECK-NEXT:    [[TMP4116:%.*]] = load i64, i64* [[LLD]], align 8
20364 // CHECK-NEXT:    [[TMP4117:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4115]], i64 [[TMP4116]] release monotonic, align 8
20365 // CHECK-NEXT:    [[TMP4118:%.*]] = extractvalue { i64, i1 } [[TMP4117]], 1
20366 // CHECK-NEXT:    [[TMP4119:%.*]] = sext i1 [[TMP4118]] to i64
20367 // CHECK-NEXT:    store i64 [[TMP4119]], i64* [[LLR]], align 8
20368 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20369 // CHECK-NEXT:    [[TMP4120:%.*]] = load i64, i64* [[LLE]], align 8
20370 // CHECK-NEXT:    [[TMP4121:%.*]] = load i64, i64* [[LLD]], align 8
20371 // CHECK-NEXT:    [[TMP4122:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4120]], i64 [[TMP4121]] release monotonic, align 8
20372 // CHECK-NEXT:    [[TMP4123:%.*]] = extractvalue { i64, i1 } [[TMP4122]], 0
20373 // CHECK-NEXT:    [[TMP4124:%.*]] = extractvalue { i64, i1 } [[TMP4122]], 1
20374 // CHECK-NEXT:    br i1 [[TMP4124]], label [[LLX_ATOMIC_EXIT403:%.*]], label [[LLX_ATOMIC_CONT404:%.*]]
20375 // CHECK:       llx.atomic.cont404:
20376 // CHECK-NEXT:    store i64 [[TMP4123]], i64* [[LLV]], align 8
20377 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT403]]
20378 // CHECK:       llx.atomic.exit403:
20379 // CHECK-NEXT:    [[TMP4125:%.*]] = extractvalue { i64, i1 } [[TMP4122]], 1
20380 // CHECK-NEXT:    [[TMP4126:%.*]] = sext i1 [[TMP4125]] to i64
20381 // CHECK-NEXT:    store i64 [[TMP4126]], i64* [[LLR]], align 8
20382 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20383 // CHECK-NEXT:    [[TMP4127:%.*]] = load i64, i64* [[LLE]], align 8
20384 // CHECK-NEXT:    [[TMP4128:%.*]] = load i64, i64* [[LLD]], align 8
20385 // CHECK-NEXT:    [[TMP4129:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4127]], i64 [[TMP4128]] release monotonic, align 8
20386 // CHECK-NEXT:    [[TMP4130:%.*]] = extractvalue { i64, i1 } [[TMP4129]], 0
20387 // CHECK-NEXT:    [[TMP4131:%.*]] = extractvalue { i64, i1 } [[TMP4129]], 1
20388 // CHECK-NEXT:    br i1 [[TMP4131]], label [[LLX_ATOMIC_EXIT405:%.*]], label [[LLX_ATOMIC_CONT406:%.*]]
20389 // CHECK:       llx.atomic.cont406:
20390 // CHECK-NEXT:    store i64 [[TMP4130]], i64* [[LLV]], align 8
20391 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT405]]
20392 // CHECK:       llx.atomic.exit405:
20393 // CHECK-NEXT:    [[TMP4132:%.*]] = extractvalue { i64, i1 } [[TMP4129]], 1
20394 // CHECK-NEXT:    [[TMP4133:%.*]] = sext i1 [[TMP4132]] to i64
20395 // CHECK-NEXT:    store i64 [[TMP4133]], i64* [[LLR]], align 8
20396 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20397 // CHECK-NEXT:    [[TMP4134:%.*]] = load i64, i64* [[LLE]], align 8
20398 // CHECK-NEXT:    [[TMP4135:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4134]] seq_cst, align 8
20399 // CHECK-NEXT:    store i64 [[TMP4135]], i64* [[LLV]], align 8
20400 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20401 // CHECK-NEXT:    [[TMP4136:%.*]] = load i64, i64* [[LLE]], align 8
20402 // CHECK-NEXT:    [[TMP4137:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4136]] seq_cst, align 8
20403 // CHECK-NEXT:    store i64 [[TMP4137]], i64* [[LLV]], align 8
20404 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20405 // CHECK-NEXT:    [[TMP4138:%.*]] = load i64, i64* [[LLE]], align 8
20406 // CHECK-NEXT:    [[TMP4139:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4138]] seq_cst, align 8
20407 // CHECK-NEXT:    store i64 [[TMP4139]], i64* [[LLV]], align 8
20408 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20409 // CHECK-NEXT:    [[TMP4140:%.*]] = load i64, i64* [[LLE]], align 8
20410 // CHECK-NEXT:    [[TMP4141:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4140]] seq_cst, align 8
20411 // CHECK-NEXT:    store i64 [[TMP4141]], i64* [[LLV]], align 8
20412 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20413 // CHECK-NEXT:    [[TMP4142:%.*]] = load i64, i64* [[LLE]], align 8
20414 // CHECK-NEXT:    [[TMP4143:%.*]] = load i64, i64* [[LLD]], align 8
20415 // CHECK-NEXT:    [[TMP4144:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4142]], i64 [[TMP4143]] seq_cst seq_cst, align 8
20416 // CHECK-NEXT:    [[TMP4145:%.*]] = extractvalue { i64, i1 } [[TMP4144]], 0
20417 // CHECK-NEXT:    store i64 [[TMP4145]], i64* [[LLV]], align 8
20418 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20419 // CHECK-NEXT:    [[TMP4146:%.*]] = load i64, i64* [[LLE]], align 8
20420 // CHECK-NEXT:    [[TMP4147:%.*]] = load i64, i64* [[LLD]], align 8
20421 // CHECK-NEXT:    [[TMP4148:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4146]], i64 [[TMP4147]] seq_cst seq_cst, align 8
20422 // CHECK-NEXT:    [[TMP4149:%.*]] = extractvalue { i64, i1 } [[TMP4148]], 0
20423 // CHECK-NEXT:    store i64 [[TMP4149]], i64* [[LLV]], align 8
20424 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20425 // CHECK-NEXT:    [[TMP4150:%.*]] = load i64, i64* [[LLE]], align 8
20426 // CHECK-NEXT:    [[TMP4151:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4150]] seq_cst, align 8
20427 // CHECK-NEXT:    [[TMP4152:%.*]] = icmp sgt i64 [[TMP4151]], [[TMP4150]]
20428 // CHECK-NEXT:    [[TMP4153:%.*]] = select i1 [[TMP4152]], i64 [[TMP4150]], i64 [[TMP4151]]
20429 // CHECK-NEXT:    store i64 [[TMP4153]], i64* [[LLV]], align 8
20430 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20431 // CHECK-NEXT:    [[TMP4154:%.*]] = load i64, i64* [[LLE]], align 8
20432 // CHECK-NEXT:    [[TMP4155:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4154]] seq_cst, align 8
20433 // CHECK-NEXT:    [[TMP4156:%.*]] = icmp slt i64 [[TMP4155]], [[TMP4154]]
20434 // CHECK-NEXT:    [[TMP4157:%.*]] = select i1 [[TMP4156]], i64 [[TMP4154]], i64 [[TMP4155]]
20435 // CHECK-NEXT:    store i64 [[TMP4157]], i64* [[LLV]], align 8
20436 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20437 // CHECK-NEXT:    [[TMP4158:%.*]] = load i64, i64* [[LLE]], align 8
20438 // CHECK-NEXT:    [[TMP4159:%.*]] = atomicrmw min i64* [[LLX]], i64 [[TMP4158]] seq_cst, align 8
20439 // CHECK-NEXT:    [[TMP4160:%.*]] = icmp slt i64 [[TMP4159]], [[TMP4158]]
20440 // CHECK-NEXT:    [[TMP4161:%.*]] = select i1 [[TMP4160]], i64 [[TMP4158]], i64 [[TMP4159]]
20441 // CHECK-NEXT:    store i64 [[TMP4161]], i64* [[LLV]], align 8
20442 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20443 // CHECK-NEXT:    [[TMP4162:%.*]] = load i64, i64* [[LLE]], align 8
20444 // CHECK-NEXT:    [[TMP4163:%.*]] = atomicrmw max i64* [[LLX]], i64 [[TMP4162]] seq_cst, align 8
20445 // CHECK-NEXT:    [[TMP4164:%.*]] = icmp sgt i64 [[TMP4163]], [[TMP4162]]
20446 // CHECK-NEXT:    [[TMP4165:%.*]] = select i1 [[TMP4164]], i64 [[TMP4162]], i64 [[TMP4163]]
20447 // CHECK-NEXT:    store i64 [[TMP4165]], i64* [[LLV]], align 8
20448 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20449 // CHECK-NEXT:    [[TMP4166:%.*]] = load i64, i64* [[LLE]], align 8
20450 // CHECK-NEXT:    [[TMP4167:%.*]] = load i64, i64* [[LLD]], align 8
20451 // CHECK-NEXT:    [[TMP4168:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4166]], i64 [[TMP4167]] seq_cst seq_cst, align 8
20452 // CHECK-NEXT:    [[TMP4169:%.*]] = extractvalue { i64, i1 } [[TMP4168]], 0
20453 // CHECK-NEXT:    [[TMP4170:%.*]] = extractvalue { i64, i1 } [[TMP4168]], 1
20454 // CHECK-NEXT:    [[TMP4171:%.*]] = select i1 [[TMP4170]], i64 [[TMP4166]], i64 [[TMP4169]]
20455 // CHECK-NEXT:    store i64 [[TMP4171]], i64* [[LLV]], align 8
20456 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20457 // CHECK-NEXT:    [[TMP4172:%.*]] = load i64, i64* [[LLE]], align 8
20458 // CHECK-NEXT:    [[TMP4173:%.*]] = load i64, i64* [[LLD]], align 8
20459 // CHECK-NEXT:    [[TMP4174:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4172]], i64 [[TMP4173]] seq_cst seq_cst, align 8
20460 // CHECK-NEXT:    [[TMP4175:%.*]] = extractvalue { i64, i1 } [[TMP4174]], 0
20461 // CHECK-NEXT:    [[TMP4176:%.*]] = extractvalue { i64, i1 } [[TMP4174]], 1
20462 // CHECK-NEXT:    [[TMP4177:%.*]] = select i1 [[TMP4176]], i64 [[TMP4172]], i64 [[TMP4175]]
20463 // CHECK-NEXT:    store i64 [[TMP4177]], i64* [[LLV]], align 8
20464 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20465 // CHECK-NEXT:    [[TMP4178:%.*]] = load i64, i64* [[LLE]], align 8
20466 // CHECK-NEXT:    [[TMP4179:%.*]] = load i64, i64* [[LLD]], align 8
20467 // CHECK-NEXT:    [[TMP4180:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4178]], i64 [[TMP4179]] seq_cst seq_cst, align 8
20468 // CHECK-NEXT:    [[TMP4181:%.*]] = extractvalue { i64, i1 } [[TMP4180]], 0
20469 // CHECK-NEXT:    [[TMP4182:%.*]] = extractvalue { i64, i1 } [[TMP4180]], 1
20470 // CHECK-NEXT:    br i1 [[TMP4182]], label [[LLX_ATOMIC_EXIT407:%.*]], label [[LLX_ATOMIC_CONT408:%.*]]
20471 // CHECK:       llx.atomic.cont408:
20472 // CHECK-NEXT:    store i64 [[TMP4181]], i64* [[LLV]], align 8
20473 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT407]]
20474 // CHECK:       llx.atomic.exit407:
20475 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20476 // CHECK-NEXT:    [[TMP4183:%.*]] = load i64, i64* [[LLE]], align 8
20477 // CHECK-NEXT:    [[TMP4184:%.*]] = load i64, i64* [[LLD]], align 8
20478 // CHECK-NEXT:    [[TMP4185:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4183]], i64 [[TMP4184]] seq_cst seq_cst, align 8
20479 // CHECK-NEXT:    [[TMP4186:%.*]] = extractvalue { i64, i1 } [[TMP4185]], 0
20480 // CHECK-NEXT:    [[TMP4187:%.*]] = extractvalue { i64, i1 } [[TMP4185]], 1
20481 // CHECK-NEXT:    br i1 [[TMP4187]], label [[LLX_ATOMIC_EXIT409:%.*]], label [[LLX_ATOMIC_CONT410:%.*]]
20482 // CHECK:       llx.atomic.cont410:
20483 // CHECK-NEXT:    store i64 [[TMP4186]], i64* [[LLV]], align 8
20484 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT409]]
20485 // CHECK:       llx.atomic.exit409:
20486 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20487 // CHECK-NEXT:    [[TMP4188:%.*]] = load i64, i64* [[LLE]], align 8
20488 // CHECK-NEXT:    [[TMP4189:%.*]] = load i64, i64* [[LLD]], align 8
20489 // CHECK-NEXT:    [[TMP4190:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4188]], i64 [[TMP4189]] seq_cst seq_cst, align 8
20490 // CHECK-NEXT:    [[TMP4191:%.*]] = extractvalue { i64, i1 } [[TMP4190]], 1
20491 // CHECK-NEXT:    [[TMP4192:%.*]] = sext i1 [[TMP4191]] to i64
20492 // CHECK-NEXT:    store i64 [[TMP4192]], i64* [[LLR]], align 8
20493 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20494 // CHECK-NEXT:    [[TMP4193:%.*]] = load i64, i64* [[LLE]], align 8
20495 // CHECK-NEXT:    [[TMP4194:%.*]] = load i64, i64* [[LLD]], align 8
20496 // CHECK-NEXT:    [[TMP4195:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4193]], i64 [[TMP4194]] seq_cst seq_cst, align 8
20497 // CHECK-NEXT:    [[TMP4196:%.*]] = extractvalue { i64, i1 } [[TMP4195]], 1
20498 // CHECK-NEXT:    [[TMP4197:%.*]] = sext i1 [[TMP4196]] to i64
20499 // CHECK-NEXT:    store i64 [[TMP4197]], i64* [[LLR]], align 8
20500 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20501 // CHECK-NEXT:    [[TMP4198:%.*]] = load i64, i64* [[LLE]], align 8
20502 // CHECK-NEXT:    [[TMP4199:%.*]] = load i64, i64* [[LLD]], align 8
20503 // CHECK-NEXT:    [[TMP4200:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4198]], i64 [[TMP4199]] seq_cst seq_cst, align 8
20504 // CHECK-NEXT:    [[TMP4201:%.*]] = extractvalue { i64, i1 } [[TMP4200]], 0
20505 // CHECK-NEXT:    [[TMP4202:%.*]] = extractvalue { i64, i1 } [[TMP4200]], 1
20506 // CHECK-NEXT:    br i1 [[TMP4202]], label [[LLX_ATOMIC_EXIT411:%.*]], label [[LLX_ATOMIC_CONT412:%.*]]
20507 // CHECK:       llx.atomic.cont412:
20508 // CHECK-NEXT:    store i64 [[TMP4201]], i64* [[LLV]], align 8
20509 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT411]]
20510 // CHECK:       llx.atomic.exit411:
20511 // CHECK-NEXT:    [[TMP4203:%.*]] = extractvalue { i64, i1 } [[TMP4200]], 1
20512 // CHECK-NEXT:    [[TMP4204:%.*]] = sext i1 [[TMP4203]] to i64
20513 // CHECK-NEXT:    store i64 [[TMP4204]], i64* [[LLR]], align 8
20514 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20515 // CHECK-NEXT:    [[TMP4205:%.*]] = load i64, i64* [[LLE]], align 8
20516 // CHECK-NEXT:    [[TMP4206:%.*]] = load i64, i64* [[LLD]], align 8
20517 // CHECK-NEXT:    [[TMP4207:%.*]] = cmpxchg i64* [[LLX]], i64 [[TMP4205]], i64 [[TMP4206]] seq_cst seq_cst, align 8
20518 // CHECK-NEXT:    [[TMP4208:%.*]] = extractvalue { i64, i1 } [[TMP4207]], 0
20519 // CHECK-NEXT:    [[TMP4209:%.*]] = extractvalue { i64, i1 } [[TMP4207]], 1
20520 // CHECK-NEXT:    br i1 [[TMP4209]], label [[LLX_ATOMIC_EXIT413:%.*]], label [[LLX_ATOMIC_CONT414:%.*]]
20521 // CHECK:       llx.atomic.cont414:
20522 // CHECK-NEXT:    store i64 [[TMP4208]], i64* [[LLV]], align 8
20523 // CHECK-NEXT:    br label [[LLX_ATOMIC_EXIT413]]
20524 // CHECK:       llx.atomic.exit413:
20525 // CHECK-NEXT:    [[TMP4210:%.*]] = extractvalue { i64, i1 } [[TMP4207]], 1
20526 // CHECK-NEXT:    [[TMP4211:%.*]] = sext i1 [[TMP4210]] to i64
20527 // CHECK-NEXT:    store i64 [[TMP4211]], i64* [[LLR]], align 8
20528 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20529 // CHECK-NEXT:    [[TMP4212:%.*]] = load i64, i64* [[ULLE]], align 8
20530 // CHECK-NEXT:    [[TMP4213:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4212]] monotonic, align 8
20531 // CHECK-NEXT:    store i64 [[TMP4213]], i64* [[ULLV]], align 8
20532 // CHECK-NEXT:    [[TMP4214:%.*]] = load i64, i64* [[ULLE]], align 8
20533 // CHECK-NEXT:    [[TMP4215:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4214]] monotonic, align 8
20534 // CHECK-NEXT:    store i64 [[TMP4215]], i64* [[ULLV]], align 8
20535 // CHECK-NEXT:    [[TMP4216:%.*]] = load i64, i64* [[ULLE]], align 8
20536 // CHECK-NEXT:    [[TMP4217:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4216]] monotonic, align 8
20537 // CHECK-NEXT:    store i64 [[TMP4217]], i64* [[ULLV]], align 8
20538 // CHECK-NEXT:    [[TMP4218:%.*]] = load i64, i64* [[ULLE]], align 8
20539 // CHECK-NEXT:    [[TMP4219:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4218]] monotonic, align 8
20540 // CHECK-NEXT:    store i64 [[TMP4219]], i64* [[ULLV]], align 8
20541 // CHECK-NEXT:    [[TMP4220:%.*]] = load i64, i64* [[ULLE]], align 8
20542 // CHECK-NEXT:    [[TMP4221:%.*]] = load i64, i64* [[ULLD]], align 8
20543 // CHECK-NEXT:    [[TMP4222:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4220]], i64 [[TMP4221]] monotonic monotonic, align 8
20544 // CHECK-NEXT:    [[TMP4223:%.*]] = extractvalue { i64, i1 } [[TMP4222]], 0
20545 // CHECK-NEXT:    store i64 [[TMP4223]], i64* [[ULLV]], align 8
20546 // CHECK-NEXT:    [[TMP4224:%.*]] = load i64, i64* [[ULLE]], align 8
20547 // CHECK-NEXT:    [[TMP4225:%.*]] = load i64, i64* [[ULLD]], align 8
20548 // CHECK-NEXT:    [[TMP4226:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4224]], i64 [[TMP4225]] monotonic monotonic, align 8
20549 // CHECK-NEXT:    [[TMP4227:%.*]] = extractvalue { i64, i1 } [[TMP4226]], 0
20550 // CHECK-NEXT:    store i64 [[TMP4227]], i64* [[ULLV]], align 8
20551 // CHECK-NEXT:    [[TMP4228:%.*]] = load i64, i64* [[ULLE]], align 8
20552 // CHECK-NEXT:    [[TMP4229:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4228]] monotonic, align 8
20553 // CHECK-NEXT:    [[TMP4230:%.*]] = icmp ugt i64 [[TMP4229]], [[TMP4228]]
20554 // CHECK-NEXT:    [[TMP4231:%.*]] = select i1 [[TMP4230]], i64 [[TMP4228]], i64 [[TMP4229]]
20555 // CHECK-NEXT:    store i64 [[TMP4231]], i64* [[ULLV]], align 8
20556 // CHECK-NEXT:    [[TMP4232:%.*]] = load i64, i64* [[ULLE]], align 8
20557 // CHECK-NEXT:    [[TMP4233:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4232]] monotonic, align 8
20558 // CHECK-NEXT:    [[TMP4234:%.*]] = icmp ult i64 [[TMP4233]], [[TMP4232]]
20559 // CHECK-NEXT:    [[TMP4235:%.*]] = select i1 [[TMP4234]], i64 [[TMP4232]], i64 [[TMP4233]]
20560 // CHECK-NEXT:    store i64 [[TMP4235]], i64* [[ULLV]], align 8
20561 // CHECK-NEXT:    [[TMP4236:%.*]] = load i64, i64* [[ULLE]], align 8
20562 // CHECK-NEXT:    [[TMP4237:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4236]] monotonic, align 8
20563 // CHECK-NEXT:    [[TMP4238:%.*]] = icmp ult i64 [[TMP4237]], [[TMP4236]]
20564 // CHECK-NEXT:    [[TMP4239:%.*]] = select i1 [[TMP4238]], i64 [[TMP4236]], i64 [[TMP4237]]
20565 // CHECK-NEXT:    store i64 [[TMP4239]], i64* [[ULLV]], align 8
20566 // CHECK-NEXT:    [[TMP4240:%.*]] = load i64, i64* [[ULLE]], align 8
20567 // CHECK-NEXT:    [[TMP4241:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4240]] monotonic, align 8
20568 // CHECK-NEXT:    [[TMP4242:%.*]] = icmp ugt i64 [[TMP4241]], [[TMP4240]]
20569 // CHECK-NEXT:    [[TMP4243:%.*]] = select i1 [[TMP4242]], i64 [[TMP4240]], i64 [[TMP4241]]
20570 // CHECK-NEXT:    store i64 [[TMP4243]], i64* [[ULLV]], align 8
20571 // CHECK-NEXT:    [[TMP4244:%.*]] = load i64, i64* [[ULLE]], align 8
20572 // CHECK-NEXT:    [[TMP4245:%.*]] = load i64, i64* [[ULLD]], align 8
20573 // CHECK-NEXT:    [[TMP4246:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4244]], i64 [[TMP4245]] monotonic monotonic, align 8
20574 // CHECK-NEXT:    [[TMP4247:%.*]] = extractvalue { i64, i1 } [[TMP4246]], 0
20575 // CHECK-NEXT:    [[TMP4248:%.*]] = extractvalue { i64, i1 } [[TMP4246]], 1
20576 // CHECK-NEXT:    [[TMP4249:%.*]] = select i1 [[TMP4248]], i64 [[TMP4244]], i64 [[TMP4247]]
20577 // CHECK-NEXT:    store i64 [[TMP4249]], i64* [[ULLV]], align 8
20578 // CHECK-NEXT:    [[TMP4250:%.*]] = load i64, i64* [[ULLE]], align 8
20579 // CHECK-NEXT:    [[TMP4251:%.*]] = load i64, i64* [[ULLD]], align 8
20580 // CHECK-NEXT:    [[TMP4252:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4250]], i64 [[TMP4251]] monotonic monotonic, align 8
20581 // CHECK-NEXT:    [[TMP4253:%.*]] = extractvalue { i64, i1 } [[TMP4252]], 0
20582 // CHECK-NEXT:    [[TMP4254:%.*]] = extractvalue { i64, i1 } [[TMP4252]], 1
20583 // CHECK-NEXT:    [[TMP4255:%.*]] = select i1 [[TMP4254]], i64 [[TMP4250]], i64 [[TMP4253]]
20584 // CHECK-NEXT:    store i64 [[TMP4255]], i64* [[ULLV]], align 8
20585 // CHECK-NEXT:    [[TMP4256:%.*]] = load i64, i64* [[ULLE]], align 8
20586 // CHECK-NEXT:    [[TMP4257:%.*]] = load i64, i64* [[ULLD]], align 8
20587 // CHECK-NEXT:    [[TMP4258:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4256]], i64 [[TMP4257]] monotonic monotonic, align 8
20588 // CHECK-NEXT:    [[TMP4259:%.*]] = extractvalue { i64, i1 } [[TMP4258]], 0
20589 // CHECK-NEXT:    [[TMP4260:%.*]] = extractvalue { i64, i1 } [[TMP4258]], 1
20590 // CHECK-NEXT:    br i1 [[TMP4260]], label [[ULLX_ATOMIC_EXIT:%.*]], label [[ULLX_ATOMIC_CONT:%.*]]
20591 // CHECK:       ullx.atomic.cont:
20592 // CHECK-NEXT:    store i64 [[TMP4259]], i64* [[ULLV]], align 8
20593 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT]]
20594 // CHECK:       ullx.atomic.exit:
20595 // CHECK-NEXT:    [[TMP4261:%.*]] = load i64, i64* [[ULLE]], align 8
20596 // CHECK-NEXT:    [[TMP4262:%.*]] = load i64, i64* [[ULLD]], align 8
20597 // CHECK-NEXT:    [[TMP4263:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4261]], i64 [[TMP4262]] monotonic monotonic, align 8
20598 // CHECK-NEXT:    [[TMP4264:%.*]] = extractvalue { i64, i1 } [[TMP4263]], 0
20599 // CHECK-NEXT:    [[TMP4265:%.*]] = extractvalue { i64, i1 } [[TMP4263]], 1
20600 // CHECK-NEXT:    br i1 [[TMP4265]], label [[ULLX_ATOMIC_EXIT415:%.*]], label [[ULLX_ATOMIC_CONT416:%.*]]
20601 // CHECK:       ullx.atomic.cont416:
20602 // CHECK-NEXT:    store i64 [[TMP4264]], i64* [[ULLV]], align 8
20603 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT415]]
20604 // CHECK:       ullx.atomic.exit415:
20605 // CHECK-NEXT:    [[TMP4266:%.*]] = load i64, i64* [[ULLE]], align 8
20606 // CHECK-NEXT:    [[TMP4267:%.*]] = load i64, i64* [[ULLD]], align 8
20607 // CHECK-NEXT:    [[TMP4268:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4266]], i64 [[TMP4267]] monotonic monotonic, align 8
20608 // CHECK-NEXT:    [[TMP4269:%.*]] = extractvalue { i64, i1 } [[TMP4268]], 1
20609 // CHECK-NEXT:    [[TMP4270:%.*]] = zext i1 [[TMP4269]] to i64
20610 // CHECK-NEXT:    store i64 [[TMP4270]], i64* [[ULLR]], align 8
20611 // CHECK-NEXT:    [[TMP4271:%.*]] = load i64, i64* [[ULLE]], align 8
20612 // CHECK-NEXT:    [[TMP4272:%.*]] = load i64, i64* [[ULLD]], align 8
20613 // CHECK-NEXT:    [[TMP4273:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4271]], i64 [[TMP4272]] monotonic monotonic, align 8
20614 // CHECK-NEXT:    [[TMP4274:%.*]] = extractvalue { i64, i1 } [[TMP4273]], 1
20615 // CHECK-NEXT:    [[TMP4275:%.*]] = zext i1 [[TMP4274]] to i64
20616 // CHECK-NEXT:    store i64 [[TMP4275]], i64* [[ULLR]], align 8
20617 // CHECK-NEXT:    [[TMP4276:%.*]] = load i64, i64* [[ULLE]], align 8
20618 // CHECK-NEXT:    [[TMP4277:%.*]] = load i64, i64* [[ULLD]], align 8
20619 // CHECK-NEXT:    [[TMP4278:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4276]], i64 [[TMP4277]] monotonic monotonic, align 8
20620 // CHECK-NEXT:    [[TMP4279:%.*]] = extractvalue { i64, i1 } [[TMP4278]], 0
20621 // CHECK-NEXT:    [[TMP4280:%.*]] = extractvalue { i64, i1 } [[TMP4278]], 1
20622 // CHECK-NEXT:    br i1 [[TMP4280]], label [[ULLX_ATOMIC_EXIT417:%.*]], label [[ULLX_ATOMIC_CONT418:%.*]]
20623 // CHECK:       ullx.atomic.cont418:
20624 // CHECK-NEXT:    store i64 [[TMP4279]], i64* [[ULLV]], align 8
20625 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT417]]
20626 // CHECK:       ullx.atomic.exit417:
20627 // CHECK-NEXT:    [[TMP4281:%.*]] = extractvalue { i64, i1 } [[TMP4278]], 1
20628 // CHECK-NEXT:    [[TMP4282:%.*]] = zext i1 [[TMP4281]] to i64
20629 // CHECK-NEXT:    store i64 [[TMP4282]], i64* [[ULLR]], align 8
20630 // CHECK-NEXT:    [[TMP4283:%.*]] = load i64, i64* [[ULLE]], align 8
20631 // CHECK-NEXT:    [[TMP4284:%.*]] = load i64, i64* [[ULLD]], align 8
20632 // CHECK-NEXT:    [[TMP4285:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4283]], i64 [[TMP4284]] monotonic monotonic, align 8
20633 // CHECK-NEXT:    [[TMP4286:%.*]] = extractvalue { i64, i1 } [[TMP4285]], 0
20634 // CHECK-NEXT:    [[TMP4287:%.*]] = extractvalue { i64, i1 } [[TMP4285]], 1
20635 // CHECK-NEXT:    br i1 [[TMP4287]], label [[ULLX_ATOMIC_EXIT419:%.*]], label [[ULLX_ATOMIC_CONT420:%.*]]
20636 // CHECK:       ullx.atomic.cont420:
20637 // CHECK-NEXT:    store i64 [[TMP4286]], i64* [[ULLV]], align 8
20638 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT419]]
20639 // CHECK:       ullx.atomic.exit419:
20640 // CHECK-NEXT:    [[TMP4288:%.*]] = extractvalue { i64, i1 } [[TMP4285]], 1
20641 // CHECK-NEXT:    [[TMP4289:%.*]] = zext i1 [[TMP4288]] to i64
20642 // CHECK-NEXT:    store i64 [[TMP4289]], i64* [[ULLR]], align 8
20643 // CHECK-NEXT:    [[TMP4290:%.*]] = load i64, i64* [[ULLE]], align 8
20644 // CHECK-NEXT:    [[TMP4291:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4290]] acq_rel, align 8
20645 // CHECK-NEXT:    store i64 [[TMP4291]], i64* [[ULLV]], align 8
20646 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20647 // CHECK-NEXT:    [[TMP4292:%.*]] = load i64, i64* [[ULLE]], align 8
20648 // CHECK-NEXT:    [[TMP4293:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4292]] acq_rel, align 8
20649 // CHECK-NEXT:    store i64 [[TMP4293]], i64* [[ULLV]], align 8
20650 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20651 // CHECK-NEXT:    [[TMP4294:%.*]] = load i64, i64* [[ULLE]], align 8
20652 // CHECK-NEXT:    [[TMP4295:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4294]] acq_rel, align 8
20653 // CHECK-NEXT:    store i64 [[TMP4295]], i64* [[ULLV]], align 8
20654 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20655 // CHECK-NEXT:    [[TMP4296:%.*]] = load i64, i64* [[ULLE]], align 8
20656 // CHECK-NEXT:    [[TMP4297:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4296]] acq_rel, align 8
20657 // CHECK-NEXT:    store i64 [[TMP4297]], i64* [[ULLV]], align 8
20658 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20659 // CHECK-NEXT:    [[TMP4298:%.*]] = load i64, i64* [[ULLE]], align 8
20660 // CHECK-NEXT:    [[TMP4299:%.*]] = load i64, i64* [[ULLD]], align 8
20661 // CHECK-NEXT:    [[TMP4300:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4298]], i64 [[TMP4299]] acq_rel acquire, align 8
20662 // CHECK-NEXT:    [[TMP4301:%.*]] = extractvalue { i64, i1 } [[TMP4300]], 0
20663 // CHECK-NEXT:    store i64 [[TMP4301]], i64* [[ULLV]], align 8
20664 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20665 // CHECK-NEXT:    [[TMP4302:%.*]] = load i64, i64* [[ULLE]], align 8
20666 // CHECK-NEXT:    [[TMP4303:%.*]] = load i64, i64* [[ULLD]], align 8
20667 // CHECK-NEXT:    [[TMP4304:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4302]], i64 [[TMP4303]] acq_rel acquire, align 8
20668 // CHECK-NEXT:    [[TMP4305:%.*]] = extractvalue { i64, i1 } [[TMP4304]], 0
20669 // CHECK-NEXT:    store i64 [[TMP4305]], i64* [[ULLV]], align 8
20670 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20671 // CHECK-NEXT:    [[TMP4306:%.*]] = load i64, i64* [[ULLE]], align 8
20672 // CHECK-NEXT:    [[TMP4307:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4306]] acq_rel, align 8
20673 // CHECK-NEXT:    [[TMP4308:%.*]] = icmp ugt i64 [[TMP4307]], [[TMP4306]]
20674 // CHECK-NEXT:    [[TMP4309:%.*]] = select i1 [[TMP4308]], i64 [[TMP4306]], i64 [[TMP4307]]
20675 // CHECK-NEXT:    store i64 [[TMP4309]], i64* [[ULLV]], align 8
20676 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20677 // CHECK-NEXT:    [[TMP4310:%.*]] = load i64, i64* [[ULLE]], align 8
20678 // CHECK-NEXT:    [[TMP4311:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4310]] acq_rel, align 8
20679 // CHECK-NEXT:    [[TMP4312:%.*]] = icmp ult i64 [[TMP4311]], [[TMP4310]]
20680 // CHECK-NEXT:    [[TMP4313:%.*]] = select i1 [[TMP4312]], i64 [[TMP4310]], i64 [[TMP4311]]
20681 // CHECK-NEXT:    store i64 [[TMP4313]], i64* [[ULLV]], align 8
20682 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20683 // CHECK-NEXT:    [[TMP4314:%.*]] = load i64, i64* [[ULLE]], align 8
20684 // CHECK-NEXT:    [[TMP4315:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4314]] acq_rel, align 8
20685 // CHECK-NEXT:    [[TMP4316:%.*]] = icmp ult i64 [[TMP4315]], [[TMP4314]]
20686 // CHECK-NEXT:    [[TMP4317:%.*]] = select i1 [[TMP4316]], i64 [[TMP4314]], i64 [[TMP4315]]
20687 // CHECK-NEXT:    store i64 [[TMP4317]], i64* [[ULLV]], align 8
20688 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20689 // CHECK-NEXT:    [[TMP4318:%.*]] = load i64, i64* [[ULLE]], align 8
20690 // CHECK-NEXT:    [[TMP4319:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4318]] acq_rel, align 8
20691 // CHECK-NEXT:    [[TMP4320:%.*]] = icmp ugt i64 [[TMP4319]], [[TMP4318]]
20692 // CHECK-NEXT:    [[TMP4321:%.*]] = select i1 [[TMP4320]], i64 [[TMP4318]], i64 [[TMP4319]]
20693 // CHECK-NEXT:    store i64 [[TMP4321]], i64* [[ULLV]], align 8
20694 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20695 // CHECK-NEXT:    [[TMP4322:%.*]] = load i64, i64* [[ULLE]], align 8
20696 // CHECK-NEXT:    [[TMP4323:%.*]] = load i64, i64* [[ULLD]], align 8
20697 // CHECK-NEXT:    [[TMP4324:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4322]], i64 [[TMP4323]] acq_rel acquire, align 8
20698 // CHECK-NEXT:    [[TMP4325:%.*]] = extractvalue { i64, i1 } [[TMP4324]], 0
20699 // CHECK-NEXT:    [[TMP4326:%.*]] = extractvalue { i64, i1 } [[TMP4324]], 1
20700 // CHECK-NEXT:    [[TMP4327:%.*]] = select i1 [[TMP4326]], i64 [[TMP4322]], i64 [[TMP4325]]
20701 // CHECK-NEXT:    store i64 [[TMP4327]], i64* [[ULLV]], align 8
20702 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20703 // CHECK-NEXT:    [[TMP4328:%.*]] = load i64, i64* [[ULLE]], align 8
20704 // CHECK-NEXT:    [[TMP4329:%.*]] = load i64, i64* [[ULLD]], align 8
20705 // CHECK-NEXT:    [[TMP4330:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4328]], i64 [[TMP4329]] acq_rel acquire, align 8
20706 // CHECK-NEXT:    [[TMP4331:%.*]] = extractvalue { i64, i1 } [[TMP4330]], 0
20707 // CHECK-NEXT:    [[TMP4332:%.*]] = extractvalue { i64, i1 } [[TMP4330]], 1
20708 // CHECK-NEXT:    [[TMP4333:%.*]] = select i1 [[TMP4332]], i64 [[TMP4328]], i64 [[TMP4331]]
20709 // CHECK-NEXT:    store i64 [[TMP4333]], i64* [[ULLV]], align 8
20710 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20711 // CHECK-NEXT:    [[TMP4334:%.*]] = load i64, i64* [[ULLE]], align 8
20712 // CHECK-NEXT:    [[TMP4335:%.*]] = load i64, i64* [[ULLD]], align 8
20713 // CHECK-NEXT:    [[TMP4336:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4334]], i64 [[TMP4335]] acq_rel acquire, align 8
20714 // CHECK-NEXT:    [[TMP4337:%.*]] = extractvalue { i64, i1 } [[TMP4336]], 0
20715 // CHECK-NEXT:    [[TMP4338:%.*]] = extractvalue { i64, i1 } [[TMP4336]], 1
20716 // CHECK-NEXT:    br i1 [[TMP4338]], label [[ULLX_ATOMIC_EXIT421:%.*]], label [[ULLX_ATOMIC_CONT422:%.*]]
20717 // CHECK:       ullx.atomic.cont422:
20718 // CHECK-NEXT:    store i64 [[TMP4337]], i64* [[ULLV]], align 8
20719 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT421]]
20720 // CHECK:       ullx.atomic.exit421:
20721 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20722 // CHECK-NEXT:    [[TMP4339:%.*]] = load i64, i64* [[ULLE]], align 8
20723 // CHECK-NEXT:    [[TMP4340:%.*]] = load i64, i64* [[ULLD]], align 8
20724 // CHECK-NEXT:    [[TMP4341:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4339]], i64 [[TMP4340]] acq_rel acquire, align 8
20725 // CHECK-NEXT:    [[TMP4342:%.*]] = extractvalue { i64, i1 } [[TMP4341]], 0
20726 // CHECK-NEXT:    [[TMP4343:%.*]] = extractvalue { i64, i1 } [[TMP4341]], 1
20727 // CHECK-NEXT:    br i1 [[TMP4343]], label [[ULLX_ATOMIC_EXIT423:%.*]], label [[ULLX_ATOMIC_CONT424:%.*]]
20728 // CHECK:       ullx.atomic.cont424:
20729 // CHECK-NEXT:    store i64 [[TMP4342]], i64* [[ULLV]], align 8
20730 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT423]]
20731 // CHECK:       ullx.atomic.exit423:
20732 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20733 // CHECK-NEXT:    [[TMP4344:%.*]] = load i64, i64* [[ULLE]], align 8
20734 // CHECK-NEXT:    [[TMP4345:%.*]] = load i64, i64* [[ULLD]], align 8
20735 // CHECK-NEXT:    [[TMP4346:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4344]], i64 [[TMP4345]] acq_rel acquire, align 8
20736 // CHECK-NEXT:    [[TMP4347:%.*]] = extractvalue { i64, i1 } [[TMP4346]], 1
20737 // CHECK-NEXT:    [[TMP4348:%.*]] = zext i1 [[TMP4347]] to i64
20738 // CHECK-NEXT:    store i64 [[TMP4348]], i64* [[ULLR]], align 8
20739 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20740 // CHECK-NEXT:    [[TMP4349:%.*]] = load i64, i64* [[ULLE]], align 8
20741 // CHECK-NEXT:    [[TMP4350:%.*]] = load i64, i64* [[ULLD]], align 8
20742 // CHECK-NEXT:    [[TMP4351:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4349]], i64 [[TMP4350]] acq_rel acquire, align 8
20743 // CHECK-NEXT:    [[TMP4352:%.*]] = extractvalue { i64, i1 } [[TMP4351]], 1
20744 // CHECK-NEXT:    [[TMP4353:%.*]] = zext i1 [[TMP4352]] to i64
20745 // CHECK-NEXT:    store i64 [[TMP4353]], i64* [[ULLR]], align 8
20746 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20747 // CHECK-NEXT:    [[TMP4354:%.*]] = load i64, i64* [[ULLE]], align 8
20748 // CHECK-NEXT:    [[TMP4355:%.*]] = load i64, i64* [[ULLD]], align 8
20749 // CHECK-NEXT:    [[TMP4356:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4354]], i64 [[TMP4355]] acq_rel acquire, align 8
20750 // CHECK-NEXT:    [[TMP4357:%.*]] = extractvalue { i64, i1 } [[TMP4356]], 0
20751 // CHECK-NEXT:    [[TMP4358:%.*]] = extractvalue { i64, i1 } [[TMP4356]], 1
20752 // CHECK-NEXT:    br i1 [[TMP4358]], label [[ULLX_ATOMIC_EXIT425:%.*]], label [[ULLX_ATOMIC_CONT426:%.*]]
20753 // CHECK:       ullx.atomic.cont426:
20754 // CHECK-NEXT:    store i64 [[TMP4357]], i64* [[ULLV]], align 8
20755 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT425]]
20756 // CHECK:       ullx.atomic.exit425:
20757 // CHECK-NEXT:    [[TMP4359:%.*]] = extractvalue { i64, i1 } [[TMP4356]], 1
20758 // CHECK-NEXT:    [[TMP4360:%.*]] = zext i1 [[TMP4359]] to i64
20759 // CHECK-NEXT:    store i64 [[TMP4360]], i64* [[ULLR]], align 8
20760 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20761 // CHECK-NEXT:    [[TMP4361:%.*]] = load i64, i64* [[ULLE]], align 8
20762 // CHECK-NEXT:    [[TMP4362:%.*]] = load i64, i64* [[ULLD]], align 8
20763 // CHECK-NEXT:    [[TMP4363:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4361]], i64 [[TMP4362]] acq_rel acquire, align 8
20764 // CHECK-NEXT:    [[TMP4364:%.*]] = extractvalue { i64, i1 } [[TMP4363]], 0
20765 // CHECK-NEXT:    [[TMP4365:%.*]] = extractvalue { i64, i1 } [[TMP4363]], 1
20766 // CHECK-NEXT:    br i1 [[TMP4365]], label [[ULLX_ATOMIC_EXIT427:%.*]], label [[ULLX_ATOMIC_CONT428:%.*]]
20767 // CHECK:       ullx.atomic.cont428:
20768 // CHECK-NEXT:    store i64 [[TMP4364]], i64* [[ULLV]], align 8
20769 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT427]]
20770 // CHECK:       ullx.atomic.exit427:
20771 // CHECK-NEXT:    [[TMP4366:%.*]] = extractvalue { i64, i1 } [[TMP4363]], 1
20772 // CHECK-NEXT:    [[TMP4367:%.*]] = zext i1 [[TMP4366]] to i64
20773 // CHECK-NEXT:    store i64 [[TMP4367]], i64* [[ULLR]], align 8
20774 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
20775 // CHECK-NEXT:    [[TMP4368:%.*]] = load i64, i64* [[ULLE]], align 8
20776 // CHECK-NEXT:    [[TMP4369:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4368]] acquire, align 8
20777 // CHECK-NEXT:    store i64 [[TMP4369]], i64* [[ULLV]], align 8
20778 // CHECK-NEXT:    [[TMP4370:%.*]] = load i64, i64* [[ULLE]], align 8
20779 // CHECK-NEXT:    [[TMP4371:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4370]] acquire, align 8
20780 // CHECK-NEXT:    store i64 [[TMP4371]], i64* [[ULLV]], align 8
20781 // CHECK-NEXT:    [[TMP4372:%.*]] = load i64, i64* [[ULLE]], align 8
20782 // CHECK-NEXT:    [[TMP4373:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4372]] acquire, align 8
20783 // CHECK-NEXT:    store i64 [[TMP4373]], i64* [[ULLV]], align 8
20784 // CHECK-NEXT:    [[TMP4374:%.*]] = load i64, i64* [[ULLE]], align 8
20785 // CHECK-NEXT:    [[TMP4375:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4374]] acquire, align 8
20786 // CHECK-NEXT:    store i64 [[TMP4375]], i64* [[ULLV]], align 8
20787 // CHECK-NEXT:    [[TMP4376:%.*]] = load i64, i64* [[ULLE]], align 8
20788 // CHECK-NEXT:    [[TMP4377:%.*]] = load i64, i64* [[ULLD]], align 8
20789 // CHECK-NEXT:    [[TMP4378:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4376]], i64 [[TMP4377]] acquire acquire, align 8
20790 // CHECK-NEXT:    [[TMP4379:%.*]] = extractvalue { i64, i1 } [[TMP4378]], 0
20791 // CHECK-NEXT:    store i64 [[TMP4379]], i64* [[ULLV]], align 8
20792 // CHECK-NEXT:    [[TMP4380:%.*]] = load i64, i64* [[ULLE]], align 8
20793 // CHECK-NEXT:    [[TMP4381:%.*]] = load i64, i64* [[ULLD]], align 8
20794 // CHECK-NEXT:    [[TMP4382:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4380]], i64 [[TMP4381]] acquire acquire, align 8
20795 // CHECK-NEXT:    [[TMP4383:%.*]] = extractvalue { i64, i1 } [[TMP4382]], 0
20796 // CHECK-NEXT:    store i64 [[TMP4383]], i64* [[ULLV]], align 8
20797 // CHECK-NEXT:    [[TMP4384:%.*]] = load i64, i64* [[ULLE]], align 8
20798 // CHECK-NEXT:    [[TMP4385:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4384]] acquire, align 8
20799 // CHECK-NEXT:    [[TMP4386:%.*]] = icmp ugt i64 [[TMP4385]], [[TMP4384]]
20800 // CHECK-NEXT:    [[TMP4387:%.*]] = select i1 [[TMP4386]], i64 [[TMP4384]], i64 [[TMP4385]]
20801 // CHECK-NEXT:    store i64 [[TMP4387]], i64* [[ULLV]], align 8
20802 // CHECK-NEXT:    [[TMP4388:%.*]] = load i64, i64* [[ULLE]], align 8
20803 // CHECK-NEXT:    [[TMP4389:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4388]] acquire, align 8
20804 // CHECK-NEXT:    [[TMP4390:%.*]] = icmp ult i64 [[TMP4389]], [[TMP4388]]
20805 // CHECK-NEXT:    [[TMP4391:%.*]] = select i1 [[TMP4390]], i64 [[TMP4388]], i64 [[TMP4389]]
20806 // CHECK-NEXT:    store i64 [[TMP4391]], i64* [[ULLV]], align 8
20807 // CHECK-NEXT:    [[TMP4392:%.*]] = load i64, i64* [[ULLE]], align 8
20808 // CHECK-NEXT:    [[TMP4393:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4392]] acquire, align 8
20809 // CHECK-NEXT:    [[TMP4394:%.*]] = icmp ult i64 [[TMP4393]], [[TMP4392]]
20810 // CHECK-NEXT:    [[TMP4395:%.*]] = select i1 [[TMP4394]], i64 [[TMP4392]], i64 [[TMP4393]]
20811 // CHECK-NEXT:    store i64 [[TMP4395]], i64* [[ULLV]], align 8
20812 // CHECK-NEXT:    [[TMP4396:%.*]] = load i64, i64* [[ULLE]], align 8
20813 // CHECK-NEXT:    [[TMP4397:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4396]] acquire, align 8
20814 // CHECK-NEXT:    [[TMP4398:%.*]] = icmp ugt i64 [[TMP4397]], [[TMP4396]]
20815 // CHECK-NEXT:    [[TMP4399:%.*]] = select i1 [[TMP4398]], i64 [[TMP4396]], i64 [[TMP4397]]
20816 // CHECK-NEXT:    store i64 [[TMP4399]], i64* [[ULLV]], align 8
20817 // CHECK-NEXT:    [[TMP4400:%.*]] = load i64, i64* [[ULLE]], align 8
20818 // CHECK-NEXT:    [[TMP4401:%.*]] = load i64, i64* [[ULLD]], align 8
20819 // CHECK-NEXT:    [[TMP4402:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4400]], i64 [[TMP4401]] acquire acquire, align 8
20820 // CHECK-NEXT:    [[TMP4403:%.*]] = extractvalue { i64, i1 } [[TMP4402]], 0
20821 // CHECK-NEXT:    [[TMP4404:%.*]] = extractvalue { i64, i1 } [[TMP4402]], 1
20822 // CHECK-NEXT:    [[TMP4405:%.*]] = select i1 [[TMP4404]], i64 [[TMP4400]], i64 [[TMP4403]]
20823 // CHECK-NEXT:    store i64 [[TMP4405]], i64* [[ULLV]], align 8
20824 // CHECK-NEXT:    [[TMP4406:%.*]] = load i64, i64* [[ULLE]], align 8
20825 // CHECK-NEXT:    [[TMP4407:%.*]] = load i64, i64* [[ULLD]], align 8
20826 // CHECK-NEXT:    [[TMP4408:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4406]], i64 [[TMP4407]] acquire acquire, align 8
20827 // CHECK-NEXT:    [[TMP4409:%.*]] = extractvalue { i64, i1 } [[TMP4408]], 0
20828 // CHECK-NEXT:    [[TMP4410:%.*]] = extractvalue { i64, i1 } [[TMP4408]], 1
20829 // CHECK-NEXT:    [[TMP4411:%.*]] = select i1 [[TMP4410]], i64 [[TMP4406]], i64 [[TMP4409]]
20830 // CHECK-NEXT:    store i64 [[TMP4411]], i64* [[ULLV]], align 8
20831 // CHECK-NEXT:    [[TMP4412:%.*]] = load i64, i64* [[ULLE]], align 8
20832 // CHECK-NEXT:    [[TMP4413:%.*]] = load i64, i64* [[ULLD]], align 8
20833 // CHECK-NEXT:    [[TMP4414:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4412]], i64 [[TMP4413]] acquire acquire, align 8
20834 // CHECK-NEXT:    [[TMP4415:%.*]] = extractvalue { i64, i1 } [[TMP4414]], 0
20835 // CHECK-NEXT:    [[TMP4416:%.*]] = extractvalue { i64, i1 } [[TMP4414]], 1
20836 // CHECK-NEXT:    br i1 [[TMP4416]], label [[ULLX_ATOMIC_EXIT429:%.*]], label [[ULLX_ATOMIC_CONT430:%.*]]
20837 // CHECK:       ullx.atomic.cont430:
20838 // CHECK-NEXT:    store i64 [[TMP4415]], i64* [[ULLV]], align 8
20839 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT429]]
20840 // CHECK:       ullx.atomic.exit429:
20841 // CHECK-NEXT:    [[TMP4417:%.*]] = load i64, i64* [[ULLE]], align 8
20842 // CHECK-NEXT:    [[TMP4418:%.*]] = load i64, i64* [[ULLD]], align 8
20843 // CHECK-NEXT:    [[TMP4419:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4417]], i64 [[TMP4418]] acquire acquire, align 8
20844 // CHECK-NEXT:    [[TMP4420:%.*]] = extractvalue { i64, i1 } [[TMP4419]], 0
20845 // CHECK-NEXT:    [[TMP4421:%.*]] = extractvalue { i64, i1 } [[TMP4419]], 1
20846 // CHECK-NEXT:    br i1 [[TMP4421]], label [[ULLX_ATOMIC_EXIT431:%.*]], label [[ULLX_ATOMIC_CONT432:%.*]]
20847 // CHECK:       ullx.atomic.cont432:
20848 // CHECK-NEXT:    store i64 [[TMP4420]], i64* [[ULLV]], align 8
20849 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT431]]
20850 // CHECK:       ullx.atomic.exit431:
20851 // CHECK-NEXT:    [[TMP4422:%.*]] = load i64, i64* [[ULLE]], align 8
20852 // CHECK-NEXT:    [[TMP4423:%.*]] = load i64, i64* [[ULLD]], align 8
20853 // CHECK-NEXT:    [[TMP4424:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4422]], i64 [[TMP4423]] acquire acquire, align 8
20854 // CHECK-NEXT:    [[TMP4425:%.*]] = extractvalue { i64, i1 } [[TMP4424]], 1
20855 // CHECK-NEXT:    [[TMP4426:%.*]] = zext i1 [[TMP4425]] to i64
20856 // CHECK-NEXT:    store i64 [[TMP4426]], i64* [[ULLR]], align 8
20857 // CHECK-NEXT:    [[TMP4427:%.*]] = load i64, i64* [[ULLE]], align 8
20858 // CHECK-NEXT:    [[TMP4428:%.*]] = load i64, i64* [[ULLD]], align 8
20859 // CHECK-NEXT:    [[TMP4429:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4427]], i64 [[TMP4428]] acquire acquire, align 8
20860 // CHECK-NEXT:    [[TMP4430:%.*]] = extractvalue { i64, i1 } [[TMP4429]], 1
20861 // CHECK-NEXT:    [[TMP4431:%.*]] = zext i1 [[TMP4430]] to i64
20862 // CHECK-NEXT:    store i64 [[TMP4431]], i64* [[ULLR]], align 8
20863 // CHECK-NEXT:    [[TMP4432:%.*]] = load i64, i64* [[ULLE]], align 8
20864 // CHECK-NEXT:    [[TMP4433:%.*]] = load i64, i64* [[ULLD]], align 8
20865 // CHECK-NEXT:    [[TMP4434:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4432]], i64 [[TMP4433]] acquire acquire, align 8
20866 // CHECK-NEXT:    [[TMP4435:%.*]] = extractvalue { i64, i1 } [[TMP4434]], 0
20867 // CHECK-NEXT:    [[TMP4436:%.*]] = extractvalue { i64, i1 } [[TMP4434]], 1
20868 // CHECK-NEXT:    br i1 [[TMP4436]], label [[ULLX_ATOMIC_EXIT433:%.*]], label [[ULLX_ATOMIC_CONT434:%.*]]
20869 // CHECK:       ullx.atomic.cont434:
20870 // CHECK-NEXT:    store i64 [[TMP4435]], i64* [[ULLV]], align 8
20871 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT433]]
20872 // CHECK:       ullx.atomic.exit433:
20873 // CHECK-NEXT:    [[TMP4437:%.*]] = extractvalue { i64, i1 } [[TMP4434]], 1
20874 // CHECK-NEXT:    [[TMP4438:%.*]] = zext i1 [[TMP4437]] to i64
20875 // CHECK-NEXT:    store i64 [[TMP4438]], i64* [[ULLR]], align 8
20876 // CHECK-NEXT:    [[TMP4439:%.*]] = load i64, i64* [[ULLE]], align 8
20877 // CHECK-NEXT:    [[TMP4440:%.*]] = load i64, i64* [[ULLD]], align 8
20878 // CHECK-NEXT:    [[TMP4441:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4439]], i64 [[TMP4440]] acquire acquire, align 8
20879 // CHECK-NEXT:    [[TMP4442:%.*]] = extractvalue { i64, i1 } [[TMP4441]], 0
20880 // CHECK-NEXT:    [[TMP4443:%.*]] = extractvalue { i64, i1 } [[TMP4441]], 1
20881 // CHECK-NEXT:    br i1 [[TMP4443]], label [[ULLX_ATOMIC_EXIT435:%.*]], label [[ULLX_ATOMIC_CONT436:%.*]]
20882 // CHECK:       ullx.atomic.cont436:
20883 // CHECK-NEXT:    store i64 [[TMP4442]], i64* [[ULLV]], align 8
20884 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT435]]
20885 // CHECK:       ullx.atomic.exit435:
20886 // CHECK-NEXT:    [[TMP4444:%.*]] = extractvalue { i64, i1 } [[TMP4441]], 1
20887 // CHECK-NEXT:    [[TMP4445:%.*]] = zext i1 [[TMP4444]] to i64
20888 // CHECK-NEXT:    store i64 [[TMP4445]], i64* [[ULLR]], align 8
20889 // CHECK-NEXT:    [[TMP4446:%.*]] = load i64, i64* [[ULLE]], align 8
20890 // CHECK-NEXT:    [[TMP4447:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4446]] monotonic, align 8
20891 // CHECK-NEXT:    store i64 [[TMP4447]], i64* [[ULLV]], align 8
20892 // CHECK-NEXT:    [[TMP4448:%.*]] = load i64, i64* [[ULLE]], align 8
20893 // CHECK-NEXT:    [[TMP4449:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4448]] monotonic, align 8
20894 // CHECK-NEXT:    store i64 [[TMP4449]], i64* [[ULLV]], align 8
20895 // CHECK-NEXT:    [[TMP4450:%.*]] = load i64, i64* [[ULLE]], align 8
20896 // CHECK-NEXT:    [[TMP4451:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4450]] monotonic, align 8
20897 // CHECK-NEXT:    store i64 [[TMP4451]], i64* [[ULLV]], align 8
20898 // CHECK-NEXT:    [[TMP4452:%.*]] = load i64, i64* [[ULLE]], align 8
20899 // CHECK-NEXT:    [[TMP4453:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4452]] monotonic, align 8
20900 // CHECK-NEXT:    store i64 [[TMP4453]], i64* [[ULLV]], align 8
20901 // CHECK-NEXT:    [[TMP4454:%.*]] = load i64, i64* [[ULLE]], align 8
20902 // CHECK-NEXT:    [[TMP4455:%.*]] = load i64, i64* [[ULLD]], align 8
20903 // CHECK-NEXT:    [[TMP4456:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4454]], i64 [[TMP4455]] monotonic monotonic, align 8
20904 // CHECK-NEXT:    [[TMP4457:%.*]] = extractvalue { i64, i1 } [[TMP4456]], 0
20905 // CHECK-NEXT:    store i64 [[TMP4457]], i64* [[ULLV]], align 8
20906 // CHECK-NEXT:    [[TMP4458:%.*]] = load i64, i64* [[ULLE]], align 8
20907 // CHECK-NEXT:    [[TMP4459:%.*]] = load i64, i64* [[ULLD]], align 8
20908 // CHECK-NEXT:    [[TMP4460:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4458]], i64 [[TMP4459]] monotonic monotonic, align 8
20909 // CHECK-NEXT:    [[TMP4461:%.*]] = extractvalue { i64, i1 } [[TMP4460]], 0
20910 // CHECK-NEXT:    store i64 [[TMP4461]], i64* [[ULLV]], align 8
20911 // CHECK-NEXT:    [[TMP4462:%.*]] = load i64, i64* [[ULLE]], align 8
20912 // CHECK-NEXT:    [[TMP4463:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4462]] monotonic, align 8
20913 // CHECK-NEXT:    [[TMP4464:%.*]] = icmp ugt i64 [[TMP4463]], [[TMP4462]]
20914 // CHECK-NEXT:    [[TMP4465:%.*]] = select i1 [[TMP4464]], i64 [[TMP4462]], i64 [[TMP4463]]
20915 // CHECK-NEXT:    store i64 [[TMP4465]], i64* [[ULLV]], align 8
20916 // CHECK-NEXT:    [[TMP4466:%.*]] = load i64, i64* [[ULLE]], align 8
20917 // CHECK-NEXT:    [[TMP4467:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4466]] monotonic, align 8
20918 // CHECK-NEXT:    [[TMP4468:%.*]] = icmp ult i64 [[TMP4467]], [[TMP4466]]
20919 // CHECK-NEXT:    [[TMP4469:%.*]] = select i1 [[TMP4468]], i64 [[TMP4466]], i64 [[TMP4467]]
20920 // CHECK-NEXT:    store i64 [[TMP4469]], i64* [[ULLV]], align 8
20921 // CHECK-NEXT:    [[TMP4470:%.*]] = load i64, i64* [[ULLE]], align 8
20922 // CHECK-NEXT:    [[TMP4471:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4470]] monotonic, align 8
20923 // CHECK-NEXT:    [[TMP4472:%.*]] = icmp ult i64 [[TMP4471]], [[TMP4470]]
20924 // CHECK-NEXT:    [[TMP4473:%.*]] = select i1 [[TMP4472]], i64 [[TMP4470]], i64 [[TMP4471]]
20925 // CHECK-NEXT:    store i64 [[TMP4473]], i64* [[ULLV]], align 8
20926 // CHECK-NEXT:    [[TMP4474:%.*]] = load i64, i64* [[ULLE]], align 8
20927 // CHECK-NEXT:    [[TMP4475:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4474]] monotonic, align 8
20928 // CHECK-NEXT:    [[TMP4476:%.*]] = icmp ugt i64 [[TMP4475]], [[TMP4474]]
20929 // CHECK-NEXT:    [[TMP4477:%.*]] = select i1 [[TMP4476]], i64 [[TMP4474]], i64 [[TMP4475]]
20930 // CHECK-NEXT:    store i64 [[TMP4477]], i64* [[ULLV]], align 8
20931 // CHECK-NEXT:    [[TMP4478:%.*]] = load i64, i64* [[ULLE]], align 8
20932 // CHECK-NEXT:    [[TMP4479:%.*]] = load i64, i64* [[ULLD]], align 8
20933 // CHECK-NEXT:    [[TMP4480:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4478]], i64 [[TMP4479]] monotonic monotonic, align 8
20934 // CHECK-NEXT:    [[TMP4481:%.*]] = extractvalue { i64, i1 } [[TMP4480]], 0
20935 // CHECK-NEXT:    [[TMP4482:%.*]] = extractvalue { i64, i1 } [[TMP4480]], 1
20936 // CHECK-NEXT:    [[TMP4483:%.*]] = select i1 [[TMP4482]], i64 [[TMP4478]], i64 [[TMP4481]]
20937 // CHECK-NEXT:    store i64 [[TMP4483]], i64* [[ULLV]], align 8
20938 // CHECK-NEXT:    [[TMP4484:%.*]] = load i64, i64* [[ULLE]], align 8
20939 // CHECK-NEXT:    [[TMP4485:%.*]] = load i64, i64* [[ULLD]], align 8
20940 // CHECK-NEXT:    [[TMP4486:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4484]], i64 [[TMP4485]] monotonic monotonic, align 8
20941 // CHECK-NEXT:    [[TMP4487:%.*]] = extractvalue { i64, i1 } [[TMP4486]], 0
20942 // CHECK-NEXT:    [[TMP4488:%.*]] = extractvalue { i64, i1 } [[TMP4486]], 1
20943 // CHECK-NEXT:    [[TMP4489:%.*]] = select i1 [[TMP4488]], i64 [[TMP4484]], i64 [[TMP4487]]
20944 // CHECK-NEXT:    store i64 [[TMP4489]], i64* [[ULLV]], align 8
20945 // CHECK-NEXT:    [[TMP4490:%.*]] = load i64, i64* [[ULLE]], align 8
20946 // CHECK-NEXT:    [[TMP4491:%.*]] = load i64, i64* [[ULLD]], align 8
20947 // CHECK-NEXT:    [[TMP4492:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4490]], i64 [[TMP4491]] monotonic monotonic, align 8
20948 // CHECK-NEXT:    [[TMP4493:%.*]] = extractvalue { i64, i1 } [[TMP4492]], 0
20949 // CHECK-NEXT:    [[TMP4494:%.*]] = extractvalue { i64, i1 } [[TMP4492]], 1
20950 // CHECK-NEXT:    br i1 [[TMP4494]], label [[ULLX_ATOMIC_EXIT437:%.*]], label [[ULLX_ATOMIC_CONT438:%.*]]
20951 // CHECK:       ullx.atomic.cont438:
20952 // CHECK-NEXT:    store i64 [[TMP4493]], i64* [[ULLV]], align 8
20953 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT437]]
20954 // CHECK:       ullx.atomic.exit437:
20955 // CHECK-NEXT:    [[TMP4495:%.*]] = load i64, i64* [[ULLE]], align 8
20956 // CHECK-NEXT:    [[TMP4496:%.*]] = load i64, i64* [[ULLD]], align 8
20957 // CHECK-NEXT:    [[TMP4497:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4495]], i64 [[TMP4496]] monotonic monotonic, align 8
20958 // CHECK-NEXT:    [[TMP4498:%.*]] = extractvalue { i64, i1 } [[TMP4497]], 0
20959 // CHECK-NEXT:    [[TMP4499:%.*]] = extractvalue { i64, i1 } [[TMP4497]], 1
20960 // CHECK-NEXT:    br i1 [[TMP4499]], label [[ULLX_ATOMIC_EXIT439:%.*]], label [[ULLX_ATOMIC_CONT440:%.*]]
20961 // CHECK:       ullx.atomic.cont440:
20962 // CHECK-NEXT:    store i64 [[TMP4498]], i64* [[ULLV]], align 8
20963 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT439]]
20964 // CHECK:       ullx.atomic.exit439:
20965 // CHECK-NEXT:    [[TMP4500:%.*]] = load i64, i64* [[ULLE]], align 8
20966 // CHECK-NEXT:    [[TMP4501:%.*]] = load i64, i64* [[ULLD]], align 8
20967 // CHECK-NEXT:    [[TMP4502:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4500]], i64 [[TMP4501]] monotonic monotonic, align 8
20968 // CHECK-NEXT:    [[TMP4503:%.*]] = extractvalue { i64, i1 } [[TMP4502]], 1
20969 // CHECK-NEXT:    [[TMP4504:%.*]] = zext i1 [[TMP4503]] to i64
20970 // CHECK-NEXT:    store i64 [[TMP4504]], i64* [[ULLR]], align 8
20971 // CHECK-NEXT:    [[TMP4505:%.*]] = load i64, i64* [[ULLE]], align 8
20972 // CHECK-NEXT:    [[TMP4506:%.*]] = load i64, i64* [[ULLD]], align 8
20973 // CHECK-NEXT:    [[TMP4507:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4505]], i64 [[TMP4506]] monotonic monotonic, align 8
20974 // CHECK-NEXT:    [[TMP4508:%.*]] = extractvalue { i64, i1 } [[TMP4507]], 1
20975 // CHECK-NEXT:    [[TMP4509:%.*]] = zext i1 [[TMP4508]] to i64
20976 // CHECK-NEXT:    store i64 [[TMP4509]], i64* [[ULLR]], align 8
20977 // CHECK-NEXT:    [[TMP4510:%.*]] = load i64, i64* [[ULLE]], align 8
20978 // CHECK-NEXT:    [[TMP4511:%.*]] = load i64, i64* [[ULLD]], align 8
20979 // CHECK-NEXT:    [[TMP4512:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4510]], i64 [[TMP4511]] monotonic monotonic, align 8
20980 // CHECK-NEXT:    [[TMP4513:%.*]] = extractvalue { i64, i1 } [[TMP4512]], 0
20981 // CHECK-NEXT:    [[TMP4514:%.*]] = extractvalue { i64, i1 } [[TMP4512]], 1
20982 // CHECK-NEXT:    br i1 [[TMP4514]], label [[ULLX_ATOMIC_EXIT441:%.*]], label [[ULLX_ATOMIC_CONT442:%.*]]
20983 // CHECK:       ullx.atomic.cont442:
20984 // CHECK-NEXT:    store i64 [[TMP4513]], i64* [[ULLV]], align 8
20985 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT441]]
20986 // CHECK:       ullx.atomic.exit441:
20987 // CHECK-NEXT:    [[TMP4515:%.*]] = extractvalue { i64, i1 } [[TMP4512]], 1
20988 // CHECK-NEXT:    [[TMP4516:%.*]] = zext i1 [[TMP4515]] to i64
20989 // CHECK-NEXT:    store i64 [[TMP4516]], i64* [[ULLR]], align 8
20990 // CHECK-NEXT:    [[TMP4517:%.*]] = load i64, i64* [[ULLE]], align 8
20991 // CHECK-NEXT:    [[TMP4518:%.*]] = load i64, i64* [[ULLD]], align 8
20992 // CHECK-NEXT:    [[TMP4519:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4517]], i64 [[TMP4518]] monotonic monotonic, align 8
20993 // CHECK-NEXT:    [[TMP4520:%.*]] = extractvalue { i64, i1 } [[TMP4519]], 0
20994 // CHECK-NEXT:    [[TMP4521:%.*]] = extractvalue { i64, i1 } [[TMP4519]], 1
20995 // CHECK-NEXT:    br i1 [[TMP4521]], label [[ULLX_ATOMIC_EXIT443:%.*]], label [[ULLX_ATOMIC_CONT444:%.*]]
20996 // CHECK:       ullx.atomic.cont444:
20997 // CHECK-NEXT:    store i64 [[TMP4520]], i64* [[ULLV]], align 8
20998 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT443]]
20999 // CHECK:       ullx.atomic.exit443:
21000 // CHECK-NEXT:    [[TMP4522:%.*]] = extractvalue { i64, i1 } [[TMP4519]], 1
21001 // CHECK-NEXT:    [[TMP4523:%.*]] = zext i1 [[TMP4522]] to i64
21002 // CHECK-NEXT:    store i64 [[TMP4523]], i64* [[ULLR]], align 8
21003 // CHECK-NEXT:    [[TMP4524:%.*]] = load i64, i64* [[ULLE]], align 8
21004 // CHECK-NEXT:    [[TMP4525:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4524]] release, align 8
21005 // CHECK-NEXT:    store i64 [[TMP4525]], i64* [[ULLV]], align 8
21006 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21007 // CHECK-NEXT:    [[TMP4526:%.*]] = load i64, i64* [[ULLE]], align 8
21008 // CHECK-NEXT:    [[TMP4527:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4526]] release, align 8
21009 // CHECK-NEXT:    store i64 [[TMP4527]], i64* [[ULLV]], align 8
21010 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21011 // CHECK-NEXT:    [[TMP4528:%.*]] = load i64, i64* [[ULLE]], align 8
21012 // CHECK-NEXT:    [[TMP4529:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4528]] release, align 8
21013 // CHECK-NEXT:    store i64 [[TMP4529]], i64* [[ULLV]], align 8
21014 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21015 // CHECK-NEXT:    [[TMP4530:%.*]] = load i64, i64* [[ULLE]], align 8
21016 // CHECK-NEXT:    [[TMP4531:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4530]] release, align 8
21017 // CHECK-NEXT:    store i64 [[TMP4531]], i64* [[ULLV]], align 8
21018 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21019 // CHECK-NEXT:    [[TMP4532:%.*]] = load i64, i64* [[ULLE]], align 8
21020 // CHECK-NEXT:    [[TMP4533:%.*]] = load i64, i64* [[ULLD]], align 8
21021 // CHECK-NEXT:    [[TMP4534:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4532]], i64 [[TMP4533]] release monotonic, align 8
21022 // CHECK-NEXT:    [[TMP4535:%.*]] = extractvalue { i64, i1 } [[TMP4534]], 0
21023 // CHECK-NEXT:    store i64 [[TMP4535]], i64* [[ULLV]], align 8
21024 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21025 // CHECK-NEXT:    [[TMP4536:%.*]] = load i64, i64* [[ULLE]], align 8
21026 // CHECK-NEXT:    [[TMP4537:%.*]] = load i64, i64* [[ULLD]], align 8
21027 // CHECK-NEXT:    [[TMP4538:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4536]], i64 [[TMP4537]] release monotonic, align 8
21028 // CHECK-NEXT:    [[TMP4539:%.*]] = extractvalue { i64, i1 } [[TMP4538]], 0
21029 // CHECK-NEXT:    store i64 [[TMP4539]], i64* [[ULLV]], align 8
21030 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21031 // CHECK-NEXT:    [[TMP4540:%.*]] = load i64, i64* [[ULLE]], align 8
21032 // CHECK-NEXT:    [[TMP4541:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4540]] release, align 8
21033 // CHECK-NEXT:    [[TMP4542:%.*]] = icmp ugt i64 [[TMP4541]], [[TMP4540]]
21034 // CHECK-NEXT:    [[TMP4543:%.*]] = select i1 [[TMP4542]], i64 [[TMP4540]], i64 [[TMP4541]]
21035 // CHECK-NEXT:    store i64 [[TMP4543]], i64* [[ULLV]], align 8
21036 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21037 // CHECK-NEXT:    [[TMP4544:%.*]] = load i64, i64* [[ULLE]], align 8
21038 // CHECK-NEXT:    [[TMP4545:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4544]] release, align 8
21039 // CHECK-NEXT:    [[TMP4546:%.*]] = icmp ult i64 [[TMP4545]], [[TMP4544]]
21040 // CHECK-NEXT:    [[TMP4547:%.*]] = select i1 [[TMP4546]], i64 [[TMP4544]], i64 [[TMP4545]]
21041 // CHECK-NEXT:    store i64 [[TMP4547]], i64* [[ULLV]], align 8
21042 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21043 // CHECK-NEXT:    [[TMP4548:%.*]] = load i64, i64* [[ULLE]], align 8
21044 // CHECK-NEXT:    [[TMP4549:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4548]] release, align 8
21045 // CHECK-NEXT:    [[TMP4550:%.*]] = icmp ult i64 [[TMP4549]], [[TMP4548]]
21046 // CHECK-NEXT:    [[TMP4551:%.*]] = select i1 [[TMP4550]], i64 [[TMP4548]], i64 [[TMP4549]]
21047 // CHECK-NEXT:    store i64 [[TMP4551]], i64* [[ULLV]], align 8
21048 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21049 // CHECK-NEXT:    [[TMP4552:%.*]] = load i64, i64* [[ULLE]], align 8
21050 // CHECK-NEXT:    [[TMP4553:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4552]] release, align 8
21051 // CHECK-NEXT:    [[TMP4554:%.*]] = icmp ugt i64 [[TMP4553]], [[TMP4552]]
21052 // CHECK-NEXT:    [[TMP4555:%.*]] = select i1 [[TMP4554]], i64 [[TMP4552]], i64 [[TMP4553]]
21053 // CHECK-NEXT:    store i64 [[TMP4555]], i64* [[ULLV]], align 8
21054 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21055 // CHECK-NEXT:    [[TMP4556:%.*]] = load i64, i64* [[ULLE]], align 8
21056 // CHECK-NEXT:    [[TMP4557:%.*]] = load i64, i64* [[ULLD]], align 8
21057 // CHECK-NEXT:    [[TMP4558:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4556]], i64 [[TMP4557]] release monotonic, align 8
21058 // CHECK-NEXT:    [[TMP4559:%.*]] = extractvalue { i64, i1 } [[TMP4558]], 0
21059 // CHECK-NEXT:    [[TMP4560:%.*]] = extractvalue { i64, i1 } [[TMP4558]], 1
21060 // CHECK-NEXT:    [[TMP4561:%.*]] = select i1 [[TMP4560]], i64 [[TMP4556]], i64 [[TMP4559]]
21061 // CHECK-NEXT:    store i64 [[TMP4561]], i64* [[ULLV]], align 8
21062 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21063 // CHECK-NEXT:    [[TMP4562:%.*]] = load i64, i64* [[ULLE]], align 8
21064 // CHECK-NEXT:    [[TMP4563:%.*]] = load i64, i64* [[ULLD]], align 8
21065 // CHECK-NEXT:    [[TMP4564:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4562]], i64 [[TMP4563]] release monotonic, align 8
21066 // CHECK-NEXT:    [[TMP4565:%.*]] = extractvalue { i64, i1 } [[TMP4564]], 0
21067 // CHECK-NEXT:    [[TMP4566:%.*]] = extractvalue { i64, i1 } [[TMP4564]], 1
21068 // CHECK-NEXT:    [[TMP4567:%.*]] = select i1 [[TMP4566]], i64 [[TMP4562]], i64 [[TMP4565]]
21069 // CHECK-NEXT:    store i64 [[TMP4567]], i64* [[ULLV]], align 8
21070 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21071 // CHECK-NEXT:    [[TMP4568:%.*]] = load i64, i64* [[ULLE]], align 8
21072 // CHECK-NEXT:    [[TMP4569:%.*]] = load i64, i64* [[ULLD]], align 8
21073 // CHECK-NEXT:    [[TMP4570:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4568]], i64 [[TMP4569]] release monotonic, align 8
21074 // CHECK-NEXT:    [[TMP4571:%.*]] = extractvalue { i64, i1 } [[TMP4570]], 0
21075 // CHECK-NEXT:    [[TMP4572:%.*]] = extractvalue { i64, i1 } [[TMP4570]], 1
21076 // CHECK-NEXT:    br i1 [[TMP4572]], label [[ULLX_ATOMIC_EXIT445:%.*]], label [[ULLX_ATOMIC_CONT446:%.*]]
21077 // CHECK:       ullx.atomic.cont446:
21078 // CHECK-NEXT:    store i64 [[TMP4571]], i64* [[ULLV]], align 8
21079 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT445]]
21080 // CHECK:       ullx.atomic.exit445:
21081 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21082 // CHECK-NEXT:    [[TMP4573:%.*]] = load i64, i64* [[ULLE]], align 8
21083 // CHECK-NEXT:    [[TMP4574:%.*]] = load i64, i64* [[ULLD]], align 8
21084 // CHECK-NEXT:    [[TMP4575:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4573]], i64 [[TMP4574]] release monotonic, align 8
21085 // CHECK-NEXT:    [[TMP4576:%.*]] = extractvalue { i64, i1 } [[TMP4575]], 0
21086 // CHECK-NEXT:    [[TMP4577:%.*]] = extractvalue { i64, i1 } [[TMP4575]], 1
21087 // CHECK-NEXT:    br i1 [[TMP4577]], label [[ULLX_ATOMIC_EXIT447:%.*]], label [[ULLX_ATOMIC_CONT448:%.*]]
21088 // CHECK:       ullx.atomic.cont448:
21089 // CHECK-NEXT:    store i64 [[TMP4576]], i64* [[ULLV]], align 8
21090 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT447]]
21091 // CHECK:       ullx.atomic.exit447:
21092 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21093 // CHECK-NEXT:    [[TMP4578:%.*]] = load i64, i64* [[ULLE]], align 8
21094 // CHECK-NEXT:    [[TMP4579:%.*]] = load i64, i64* [[ULLD]], align 8
21095 // CHECK-NEXT:    [[TMP4580:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4578]], i64 [[TMP4579]] release monotonic, align 8
21096 // CHECK-NEXT:    [[TMP4581:%.*]] = extractvalue { i64, i1 } [[TMP4580]], 1
21097 // CHECK-NEXT:    [[TMP4582:%.*]] = zext i1 [[TMP4581]] to i64
21098 // CHECK-NEXT:    store i64 [[TMP4582]], i64* [[ULLR]], align 8
21099 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21100 // CHECK-NEXT:    [[TMP4583:%.*]] = load i64, i64* [[ULLE]], align 8
21101 // CHECK-NEXT:    [[TMP4584:%.*]] = load i64, i64* [[ULLD]], align 8
21102 // CHECK-NEXT:    [[TMP4585:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4583]], i64 [[TMP4584]] release monotonic, align 8
21103 // CHECK-NEXT:    [[TMP4586:%.*]] = extractvalue { i64, i1 } [[TMP4585]], 1
21104 // CHECK-NEXT:    [[TMP4587:%.*]] = zext i1 [[TMP4586]] to i64
21105 // CHECK-NEXT:    store i64 [[TMP4587]], i64* [[ULLR]], align 8
21106 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21107 // CHECK-NEXT:    [[TMP4588:%.*]] = load i64, i64* [[ULLE]], align 8
21108 // CHECK-NEXT:    [[TMP4589:%.*]] = load i64, i64* [[ULLD]], align 8
21109 // CHECK-NEXT:    [[TMP4590:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4588]], i64 [[TMP4589]] release monotonic, align 8
21110 // CHECK-NEXT:    [[TMP4591:%.*]] = extractvalue { i64, i1 } [[TMP4590]], 0
21111 // CHECK-NEXT:    [[TMP4592:%.*]] = extractvalue { i64, i1 } [[TMP4590]], 1
21112 // CHECK-NEXT:    br i1 [[TMP4592]], label [[ULLX_ATOMIC_EXIT449:%.*]], label [[ULLX_ATOMIC_CONT450:%.*]]
21113 // CHECK:       ullx.atomic.cont450:
21114 // CHECK-NEXT:    store i64 [[TMP4591]], i64* [[ULLV]], align 8
21115 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT449]]
21116 // CHECK:       ullx.atomic.exit449:
21117 // CHECK-NEXT:    [[TMP4593:%.*]] = extractvalue { i64, i1 } [[TMP4590]], 1
21118 // CHECK-NEXT:    [[TMP4594:%.*]] = zext i1 [[TMP4593]] to i64
21119 // CHECK-NEXT:    store i64 [[TMP4594]], i64* [[ULLR]], align 8
21120 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21121 // CHECK-NEXT:    [[TMP4595:%.*]] = load i64, i64* [[ULLE]], align 8
21122 // CHECK-NEXT:    [[TMP4596:%.*]] = load i64, i64* [[ULLD]], align 8
21123 // CHECK-NEXT:    [[TMP4597:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4595]], i64 [[TMP4596]] release monotonic, align 8
21124 // CHECK-NEXT:    [[TMP4598:%.*]] = extractvalue { i64, i1 } [[TMP4597]], 0
21125 // CHECK-NEXT:    [[TMP4599:%.*]] = extractvalue { i64, i1 } [[TMP4597]], 1
21126 // CHECK-NEXT:    br i1 [[TMP4599]], label [[ULLX_ATOMIC_EXIT451:%.*]], label [[ULLX_ATOMIC_CONT452:%.*]]
21127 // CHECK:       ullx.atomic.cont452:
21128 // CHECK-NEXT:    store i64 [[TMP4598]], i64* [[ULLV]], align 8
21129 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT451]]
21130 // CHECK:       ullx.atomic.exit451:
21131 // CHECK-NEXT:    [[TMP4600:%.*]] = extractvalue { i64, i1 } [[TMP4597]], 1
21132 // CHECK-NEXT:    [[TMP4601:%.*]] = zext i1 [[TMP4600]] to i64
21133 // CHECK-NEXT:    store i64 [[TMP4601]], i64* [[ULLR]], align 8
21134 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21135 // CHECK-NEXT:    [[TMP4602:%.*]] = load i64, i64* [[ULLE]], align 8
21136 // CHECK-NEXT:    [[TMP4603:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4602]] seq_cst, align 8
21137 // CHECK-NEXT:    store i64 [[TMP4603]], i64* [[ULLV]], align 8
21138 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21139 // CHECK-NEXT:    [[TMP4604:%.*]] = load i64, i64* [[ULLE]], align 8
21140 // CHECK-NEXT:    [[TMP4605:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4604]] seq_cst, align 8
21141 // CHECK-NEXT:    store i64 [[TMP4605]], i64* [[ULLV]], align 8
21142 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21143 // CHECK-NEXT:    [[TMP4606:%.*]] = load i64, i64* [[ULLE]], align 8
21144 // CHECK-NEXT:    [[TMP4607:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4606]] seq_cst, align 8
21145 // CHECK-NEXT:    store i64 [[TMP4607]], i64* [[ULLV]], align 8
21146 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21147 // CHECK-NEXT:    [[TMP4608:%.*]] = load i64, i64* [[ULLE]], align 8
21148 // CHECK-NEXT:    [[TMP4609:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4608]] seq_cst, align 8
21149 // CHECK-NEXT:    store i64 [[TMP4609]], i64* [[ULLV]], align 8
21150 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21151 // CHECK-NEXT:    [[TMP4610:%.*]] = load i64, i64* [[ULLE]], align 8
21152 // CHECK-NEXT:    [[TMP4611:%.*]] = load i64, i64* [[ULLD]], align 8
21153 // CHECK-NEXT:    [[TMP4612:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4610]], i64 [[TMP4611]] seq_cst seq_cst, align 8
21154 // CHECK-NEXT:    [[TMP4613:%.*]] = extractvalue { i64, i1 } [[TMP4612]], 0
21155 // CHECK-NEXT:    store i64 [[TMP4613]], i64* [[ULLV]], align 8
21156 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21157 // CHECK-NEXT:    [[TMP4614:%.*]] = load i64, i64* [[ULLE]], align 8
21158 // CHECK-NEXT:    [[TMP4615:%.*]] = load i64, i64* [[ULLD]], align 8
21159 // CHECK-NEXT:    [[TMP4616:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4614]], i64 [[TMP4615]] seq_cst seq_cst, align 8
21160 // CHECK-NEXT:    [[TMP4617:%.*]] = extractvalue { i64, i1 } [[TMP4616]], 0
21161 // CHECK-NEXT:    store i64 [[TMP4617]], i64* [[ULLV]], align 8
21162 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21163 // CHECK-NEXT:    [[TMP4618:%.*]] = load i64, i64* [[ULLE]], align 8
21164 // CHECK-NEXT:    [[TMP4619:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4618]] seq_cst, align 8
21165 // CHECK-NEXT:    [[TMP4620:%.*]] = icmp ugt i64 [[TMP4619]], [[TMP4618]]
21166 // CHECK-NEXT:    [[TMP4621:%.*]] = select i1 [[TMP4620]], i64 [[TMP4618]], i64 [[TMP4619]]
21167 // CHECK-NEXT:    store i64 [[TMP4621]], i64* [[ULLV]], align 8
21168 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21169 // CHECK-NEXT:    [[TMP4622:%.*]] = load i64, i64* [[ULLE]], align 8
21170 // CHECK-NEXT:    [[TMP4623:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4622]] seq_cst, align 8
21171 // CHECK-NEXT:    [[TMP4624:%.*]] = icmp ult i64 [[TMP4623]], [[TMP4622]]
21172 // CHECK-NEXT:    [[TMP4625:%.*]] = select i1 [[TMP4624]], i64 [[TMP4622]], i64 [[TMP4623]]
21173 // CHECK-NEXT:    store i64 [[TMP4625]], i64* [[ULLV]], align 8
21174 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21175 // CHECK-NEXT:    [[TMP4626:%.*]] = load i64, i64* [[ULLE]], align 8
21176 // CHECK-NEXT:    [[TMP4627:%.*]] = atomicrmw umin i64* [[ULLX]], i64 [[TMP4626]] seq_cst, align 8
21177 // CHECK-NEXT:    [[TMP4628:%.*]] = icmp ult i64 [[TMP4627]], [[TMP4626]]
21178 // CHECK-NEXT:    [[TMP4629:%.*]] = select i1 [[TMP4628]], i64 [[TMP4626]], i64 [[TMP4627]]
21179 // CHECK-NEXT:    store i64 [[TMP4629]], i64* [[ULLV]], align 8
21180 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21181 // CHECK-NEXT:    [[TMP4630:%.*]] = load i64, i64* [[ULLE]], align 8
21182 // CHECK-NEXT:    [[TMP4631:%.*]] = atomicrmw umax i64* [[ULLX]], i64 [[TMP4630]] seq_cst, align 8
21183 // CHECK-NEXT:    [[TMP4632:%.*]] = icmp ugt i64 [[TMP4631]], [[TMP4630]]
21184 // CHECK-NEXT:    [[TMP4633:%.*]] = select i1 [[TMP4632]], i64 [[TMP4630]], i64 [[TMP4631]]
21185 // CHECK-NEXT:    store i64 [[TMP4633]], i64* [[ULLV]], align 8
21186 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21187 // CHECK-NEXT:    [[TMP4634:%.*]] = load i64, i64* [[ULLE]], align 8
21188 // CHECK-NEXT:    [[TMP4635:%.*]] = load i64, i64* [[ULLD]], align 8
21189 // CHECK-NEXT:    [[TMP4636:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4634]], i64 [[TMP4635]] seq_cst seq_cst, align 8
21190 // CHECK-NEXT:    [[TMP4637:%.*]] = extractvalue { i64, i1 } [[TMP4636]], 0
21191 // CHECK-NEXT:    [[TMP4638:%.*]] = extractvalue { i64, i1 } [[TMP4636]], 1
21192 // CHECK-NEXT:    [[TMP4639:%.*]] = select i1 [[TMP4638]], i64 [[TMP4634]], i64 [[TMP4637]]
21193 // CHECK-NEXT:    store i64 [[TMP4639]], i64* [[ULLV]], align 8
21194 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21195 // CHECK-NEXT:    [[TMP4640:%.*]] = load i64, i64* [[ULLE]], align 8
21196 // CHECK-NEXT:    [[TMP4641:%.*]] = load i64, i64* [[ULLD]], align 8
21197 // CHECK-NEXT:    [[TMP4642:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4640]], i64 [[TMP4641]] seq_cst seq_cst, align 8
21198 // CHECK-NEXT:    [[TMP4643:%.*]] = extractvalue { i64, i1 } [[TMP4642]], 0
21199 // CHECK-NEXT:    [[TMP4644:%.*]] = extractvalue { i64, i1 } [[TMP4642]], 1
21200 // CHECK-NEXT:    [[TMP4645:%.*]] = select i1 [[TMP4644]], i64 [[TMP4640]], i64 [[TMP4643]]
21201 // CHECK-NEXT:    store i64 [[TMP4645]], i64* [[ULLV]], align 8
21202 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21203 // CHECK-NEXT:    [[TMP4646:%.*]] = load i64, i64* [[ULLE]], align 8
21204 // CHECK-NEXT:    [[TMP4647:%.*]] = load i64, i64* [[ULLD]], align 8
21205 // CHECK-NEXT:    [[TMP4648:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4646]], i64 [[TMP4647]] seq_cst seq_cst, align 8
21206 // CHECK-NEXT:    [[TMP4649:%.*]] = extractvalue { i64, i1 } [[TMP4648]], 0
21207 // CHECK-NEXT:    [[TMP4650:%.*]] = extractvalue { i64, i1 } [[TMP4648]], 1
21208 // CHECK-NEXT:    br i1 [[TMP4650]], label [[ULLX_ATOMIC_EXIT453:%.*]], label [[ULLX_ATOMIC_CONT454:%.*]]
21209 // CHECK:       ullx.atomic.cont454:
21210 // CHECK-NEXT:    store i64 [[TMP4649]], i64* [[ULLV]], align 8
21211 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT453]]
21212 // CHECK:       ullx.atomic.exit453:
21213 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21214 // CHECK-NEXT:    [[TMP4651:%.*]] = load i64, i64* [[ULLE]], align 8
21215 // CHECK-NEXT:    [[TMP4652:%.*]] = load i64, i64* [[ULLD]], align 8
21216 // CHECK-NEXT:    [[TMP4653:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4651]], i64 [[TMP4652]] seq_cst seq_cst, align 8
21217 // CHECK-NEXT:    [[TMP4654:%.*]] = extractvalue { i64, i1 } [[TMP4653]], 0
21218 // CHECK-NEXT:    [[TMP4655:%.*]] = extractvalue { i64, i1 } [[TMP4653]], 1
21219 // CHECK-NEXT:    br i1 [[TMP4655]], label [[ULLX_ATOMIC_EXIT455:%.*]], label [[ULLX_ATOMIC_CONT456:%.*]]
21220 // CHECK:       ullx.atomic.cont456:
21221 // CHECK-NEXT:    store i64 [[TMP4654]], i64* [[ULLV]], align 8
21222 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT455]]
21223 // CHECK:       ullx.atomic.exit455:
21224 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21225 // CHECK-NEXT:    [[TMP4656:%.*]] = load i64, i64* [[ULLE]], align 8
21226 // CHECK-NEXT:    [[TMP4657:%.*]] = load i64, i64* [[ULLD]], align 8
21227 // CHECK-NEXT:    [[TMP4658:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4656]], i64 [[TMP4657]] seq_cst seq_cst, align 8
21228 // CHECK-NEXT:    [[TMP4659:%.*]] = extractvalue { i64, i1 } [[TMP4658]], 1
21229 // CHECK-NEXT:    [[TMP4660:%.*]] = zext i1 [[TMP4659]] to i64
21230 // CHECK-NEXT:    store i64 [[TMP4660]], i64* [[ULLR]], align 8
21231 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21232 // CHECK-NEXT:    [[TMP4661:%.*]] = load i64, i64* [[ULLE]], align 8
21233 // CHECK-NEXT:    [[TMP4662:%.*]] = load i64, i64* [[ULLD]], align 8
21234 // CHECK-NEXT:    [[TMP4663:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4661]], i64 [[TMP4662]] seq_cst seq_cst, align 8
21235 // CHECK-NEXT:    [[TMP4664:%.*]] = extractvalue { i64, i1 } [[TMP4663]], 1
21236 // CHECK-NEXT:    [[TMP4665:%.*]] = zext i1 [[TMP4664]] to i64
21237 // CHECK-NEXT:    store i64 [[TMP4665]], i64* [[ULLR]], align 8
21238 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21239 // CHECK-NEXT:    [[TMP4666:%.*]] = load i64, i64* [[ULLE]], align 8
21240 // CHECK-NEXT:    [[TMP4667:%.*]] = load i64, i64* [[ULLD]], align 8
21241 // CHECK-NEXT:    [[TMP4668:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4666]], i64 [[TMP4667]] seq_cst seq_cst, align 8
21242 // CHECK-NEXT:    [[TMP4669:%.*]] = extractvalue { i64, i1 } [[TMP4668]], 0
21243 // CHECK-NEXT:    [[TMP4670:%.*]] = extractvalue { i64, i1 } [[TMP4668]], 1
21244 // CHECK-NEXT:    br i1 [[TMP4670]], label [[ULLX_ATOMIC_EXIT457:%.*]], label [[ULLX_ATOMIC_CONT458:%.*]]
21245 // CHECK:       ullx.atomic.cont458:
21246 // CHECK-NEXT:    store i64 [[TMP4669]], i64* [[ULLV]], align 8
21247 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT457]]
21248 // CHECK:       ullx.atomic.exit457:
21249 // CHECK-NEXT:    [[TMP4671:%.*]] = extractvalue { i64, i1 } [[TMP4668]], 1
21250 // CHECK-NEXT:    [[TMP4672:%.*]] = zext i1 [[TMP4671]] to i64
21251 // CHECK-NEXT:    store i64 [[TMP4672]], i64* [[ULLR]], align 8
21252 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21253 // CHECK-NEXT:    [[TMP4673:%.*]] = load i64, i64* [[ULLE]], align 8
21254 // CHECK-NEXT:    [[TMP4674:%.*]] = load i64, i64* [[ULLD]], align 8
21255 // CHECK-NEXT:    [[TMP4675:%.*]] = cmpxchg i64* [[ULLX]], i64 [[TMP4673]], i64 [[TMP4674]] seq_cst seq_cst, align 8
21256 // CHECK-NEXT:    [[TMP4676:%.*]] = extractvalue { i64, i1 } [[TMP4675]], 0
21257 // CHECK-NEXT:    [[TMP4677:%.*]] = extractvalue { i64, i1 } [[TMP4675]], 1
21258 // CHECK-NEXT:    br i1 [[TMP4677]], label [[ULLX_ATOMIC_EXIT459:%.*]], label [[ULLX_ATOMIC_CONT460:%.*]]
21259 // CHECK:       ullx.atomic.cont460:
21260 // CHECK-NEXT:    store i64 [[TMP4676]], i64* [[ULLV]], align 8
21261 // CHECK-NEXT:    br label [[ULLX_ATOMIC_EXIT459]]
21262 // CHECK:       ullx.atomic.exit459:
21263 // CHECK-NEXT:    [[TMP4678:%.*]] = extractvalue { i64, i1 } [[TMP4675]], 1
21264 // CHECK-NEXT:    [[TMP4679:%.*]] = zext i1 [[TMP4678]] to i64
21265 // CHECK-NEXT:    store i64 [[TMP4679]], i64* [[ULLR]], align 8
21266 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21267 // CHECK-NEXT:    [[TMP4680:%.*]] = load float, float* [[FE]], align 4
21268 // CHECK-NEXT:    [[TMP4681:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4680]] monotonic, align 4
21269 // CHECK-NEXT:    store float [[TMP4681]], float* [[FV]], align 4
21270 // CHECK-NEXT:    [[TMP4682:%.*]] = load float, float* [[FE]], align 4
21271 // CHECK-NEXT:    [[TMP4683:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4682]] monotonic, align 4
21272 // CHECK-NEXT:    store float [[TMP4683]], float* [[FV]], align 4
21273 // CHECK-NEXT:    [[TMP4684:%.*]] = load float, float* [[FE]], align 4
21274 // CHECK-NEXT:    [[TMP4685:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4684]] monotonic, align 4
21275 // CHECK-NEXT:    store float [[TMP4685]], float* [[FV]], align 4
21276 // CHECK-NEXT:    [[TMP4686:%.*]] = load float, float* [[FE]], align 4
21277 // CHECK-NEXT:    [[TMP4687:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4686]] monotonic, align 4
21278 // CHECK-NEXT:    store float [[TMP4687]], float* [[FV]], align 4
21279 // CHECK-NEXT:    [[TMP4688:%.*]] = load float, float* [[FE]], align 4
21280 // CHECK-NEXT:    [[TMP4689:%.*]] = load float, float* [[FD]], align 4
21281 // CHECK-NEXT:    [[TMP4690:%.*]] = bitcast float* [[FX]] to i32*
21282 // CHECK-NEXT:    [[TMP4691:%.*]] = bitcast float [[TMP4688]] to i32
21283 // CHECK-NEXT:    [[TMP4692:%.*]] = bitcast float [[TMP4689]] to i32
21284 // CHECK-NEXT:    [[TMP4693:%.*]] = cmpxchg i32* [[TMP4690]], i32 [[TMP4691]], i32 [[TMP4692]] monotonic monotonic, align 4
21285 // CHECK-NEXT:    [[TMP4694:%.*]] = extractvalue { i32, i1 } [[TMP4693]], 0
21286 // CHECK-NEXT:    [[TMP4695:%.*]] = bitcast i32 [[TMP4694]] to float
21287 // CHECK-NEXT:    store float [[TMP4695]], float* [[FV]], align 4
21288 // CHECK-NEXT:    [[TMP4696:%.*]] = load float, float* [[FE]], align 4
21289 // CHECK-NEXT:    [[TMP4697:%.*]] = load float, float* [[FD]], align 4
21290 // CHECK-NEXT:    [[TMP4698:%.*]] = bitcast float* [[FX]] to i32*
21291 // CHECK-NEXT:    [[TMP4699:%.*]] = bitcast float [[TMP4696]] to i32
21292 // CHECK-NEXT:    [[TMP4700:%.*]] = bitcast float [[TMP4697]] to i32
21293 // CHECK-NEXT:    [[TMP4701:%.*]] = cmpxchg i32* [[TMP4698]], i32 [[TMP4699]], i32 [[TMP4700]] monotonic monotonic, align 4
21294 // CHECK-NEXT:    [[TMP4702:%.*]] = extractvalue { i32, i1 } [[TMP4701]], 0
21295 // CHECK-NEXT:    [[TMP4703:%.*]] = bitcast i32 [[TMP4702]] to float
21296 // CHECK-NEXT:    store float [[TMP4703]], float* [[FV]], align 4
21297 // CHECK-NEXT:    [[TMP4704:%.*]] = load float, float* [[FE]], align 4
21298 // CHECK-NEXT:    [[TMP4705:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4704]] monotonic, align 4
21299 // CHECK-NEXT:    [[TMP4706:%.*]] = fcmp ogt float [[TMP4705]], [[TMP4704]]
21300 // CHECK-NEXT:    [[TMP4707:%.*]] = select i1 [[TMP4706]], float [[TMP4704]], float [[TMP4705]]
21301 // CHECK-NEXT:    store float [[TMP4707]], float* [[FV]], align 4
21302 // CHECK-NEXT:    [[TMP4708:%.*]] = load float, float* [[FE]], align 4
21303 // CHECK-NEXT:    [[TMP4709:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4708]] monotonic, align 4
21304 // CHECK-NEXT:    [[TMP4710:%.*]] = fcmp olt float [[TMP4709]], [[TMP4708]]
21305 // CHECK-NEXT:    [[TMP4711:%.*]] = select i1 [[TMP4710]], float [[TMP4708]], float [[TMP4709]]
21306 // CHECK-NEXT:    store float [[TMP4711]], float* [[FV]], align 4
21307 // CHECK-NEXT:    [[TMP4712:%.*]] = load float, float* [[FE]], align 4
21308 // CHECK-NEXT:    [[TMP4713:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4712]] monotonic, align 4
21309 // CHECK-NEXT:    [[TMP4714:%.*]] = fcmp olt float [[TMP4713]], [[TMP4712]]
21310 // CHECK-NEXT:    [[TMP4715:%.*]] = select i1 [[TMP4714]], float [[TMP4712]], float [[TMP4713]]
21311 // CHECK-NEXT:    store float [[TMP4715]], float* [[FV]], align 4
21312 // CHECK-NEXT:    [[TMP4716:%.*]] = load float, float* [[FE]], align 4
21313 // CHECK-NEXT:    [[TMP4717:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4716]] monotonic, align 4
21314 // CHECK-NEXT:    [[TMP4718:%.*]] = fcmp ogt float [[TMP4717]], [[TMP4716]]
21315 // CHECK-NEXT:    [[TMP4719:%.*]] = select i1 [[TMP4718]], float [[TMP4716]], float [[TMP4717]]
21316 // CHECK-NEXT:    store float [[TMP4719]], float* [[FV]], align 4
21317 // CHECK-NEXT:    [[TMP4720:%.*]] = load float, float* [[FE]], align 4
21318 // CHECK-NEXT:    [[TMP4721:%.*]] = load float, float* [[FD]], align 4
21319 // CHECK-NEXT:    [[TMP4722:%.*]] = bitcast float* [[FX]] to i32*
21320 // CHECK-NEXT:    [[TMP4723:%.*]] = bitcast float [[TMP4720]] to i32
21321 // CHECK-NEXT:    [[TMP4724:%.*]] = bitcast float [[TMP4721]] to i32
21322 // CHECK-NEXT:    [[TMP4725:%.*]] = cmpxchg i32* [[TMP4722]], i32 [[TMP4723]], i32 [[TMP4724]] monotonic monotonic, align 4
21323 // CHECK-NEXT:    [[TMP4726:%.*]] = extractvalue { i32, i1 } [[TMP4725]], 0
21324 // CHECK-NEXT:    [[TMP4727:%.*]] = bitcast i32 [[TMP4726]] to float
21325 // CHECK-NEXT:    [[TMP4728:%.*]] = extractvalue { i32, i1 } [[TMP4725]], 1
21326 // CHECK-NEXT:    [[TMP4729:%.*]] = select i1 [[TMP4728]], float [[TMP4720]], float [[TMP4727]]
21327 // CHECK-NEXT:    store float [[TMP4729]], float* [[FV]], align 4
21328 // CHECK-NEXT:    [[TMP4730:%.*]] = load float, float* [[FE]], align 4
21329 // CHECK-NEXT:    [[TMP4731:%.*]] = load float, float* [[FD]], align 4
21330 // CHECK-NEXT:    [[TMP4732:%.*]] = bitcast float* [[FX]] to i32*
21331 // CHECK-NEXT:    [[TMP4733:%.*]] = bitcast float [[TMP4730]] to i32
21332 // CHECK-NEXT:    [[TMP4734:%.*]] = bitcast float [[TMP4731]] to i32
21333 // CHECK-NEXT:    [[TMP4735:%.*]] = cmpxchg i32* [[TMP4732]], i32 [[TMP4733]], i32 [[TMP4734]] monotonic monotonic, align 4
21334 // CHECK-NEXT:    [[TMP4736:%.*]] = extractvalue { i32, i1 } [[TMP4735]], 0
21335 // CHECK-NEXT:    [[TMP4737:%.*]] = bitcast i32 [[TMP4736]] to float
21336 // CHECK-NEXT:    [[TMP4738:%.*]] = extractvalue { i32, i1 } [[TMP4735]], 1
21337 // CHECK-NEXT:    [[TMP4739:%.*]] = select i1 [[TMP4738]], float [[TMP4730]], float [[TMP4737]]
21338 // CHECK-NEXT:    store float [[TMP4739]], float* [[FV]], align 4
21339 // CHECK-NEXT:    [[TMP4740:%.*]] = load float, float* [[FE]], align 4
21340 // CHECK-NEXT:    [[TMP4741:%.*]] = load float, float* [[FD]], align 4
21341 // CHECK-NEXT:    [[TMP4742:%.*]] = bitcast float* [[FX]] to i32*
21342 // CHECK-NEXT:    [[TMP4743:%.*]] = bitcast float [[TMP4740]] to i32
21343 // CHECK-NEXT:    [[TMP4744:%.*]] = bitcast float [[TMP4741]] to i32
21344 // CHECK-NEXT:    [[TMP4745:%.*]] = cmpxchg i32* [[TMP4742]], i32 [[TMP4743]], i32 [[TMP4744]] monotonic monotonic, align 4
21345 // CHECK-NEXT:    [[TMP4746:%.*]] = extractvalue { i32, i1 } [[TMP4745]], 0
21346 // CHECK-NEXT:    [[TMP4747:%.*]] = bitcast i32 [[TMP4746]] to float
21347 // CHECK-NEXT:    [[TMP4748:%.*]] = extractvalue { i32, i1 } [[TMP4745]], 1
21348 // CHECK-NEXT:    br i1 [[TMP4748]], label [[FX_ATOMIC_EXIT:%.*]], label [[FX_ATOMIC_CONT:%.*]]
21349 // CHECK:       fx.atomic.cont:
21350 // CHECK-NEXT:    store float [[TMP4747]], float* [[FV]], align 4
21351 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT]]
21352 // CHECK:       fx.atomic.exit:
21353 // CHECK-NEXT:    [[TMP4749:%.*]] = load float, float* [[FE]], align 4
21354 // CHECK-NEXT:    [[TMP4750:%.*]] = load float, float* [[FD]], align 4
21355 // CHECK-NEXT:    [[TMP4751:%.*]] = bitcast float* [[FX]] to i32*
21356 // CHECK-NEXT:    [[TMP4752:%.*]] = bitcast float [[TMP4749]] to i32
21357 // CHECK-NEXT:    [[TMP4753:%.*]] = bitcast float [[TMP4750]] to i32
21358 // CHECK-NEXT:    [[TMP4754:%.*]] = cmpxchg i32* [[TMP4751]], i32 [[TMP4752]], i32 [[TMP4753]] monotonic monotonic, align 4
21359 // CHECK-NEXT:    [[TMP4755:%.*]] = extractvalue { i32, i1 } [[TMP4754]], 0
21360 // CHECK-NEXT:    [[TMP4756:%.*]] = bitcast i32 [[TMP4755]] to float
21361 // CHECK-NEXT:    [[TMP4757:%.*]] = extractvalue { i32, i1 } [[TMP4754]], 1
21362 // CHECK-NEXT:    br i1 [[TMP4757]], label [[FX_ATOMIC_EXIT461:%.*]], label [[FX_ATOMIC_CONT462:%.*]]
21363 // CHECK:       fx.atomic.cont462:
21364 // CHECK-NEXT:    store float [[TMP4756]], float* [[FV]], align 4
21365 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT461]]
21366 // CHECK:       fx.atomic.exit461:
21367 // CHECK-NEXT:    [[TMP4758:%.*]] = load float, float* [[FE]], align 4
21368 // CHECK-NEXT:    [[TMP4759:%.*]] = load float, float* [[FD]], align 4
21369 // CHECK-NEXT:    [[TMP4760:%.*]] = bitcast float* [[FX]] to i32*
21370 // CHECK-NEXT:    [[TMP4761:%.*]] = bitcast float [[TMP4758]] to i32
21371 // CHECK-NEXT:    [[TMP4762:%.*]] = bitcast float [[TMP4759]] to i32
21372 // CHECK-NEXT:    [[TMP4763:%.*]] = cmpxchg i32* [[TMP4760]], i32 [[TMP4761]], i32 [[TMP4762]] monotonic monotonic, align 4
21373 // CHECK-NEXT:    [[TMP4764:%.*]] = extractvalue { i32, i1 } [[TMP4763]], 1
21374 // CHECK-NEXT:    [[TMP4765:%.*]] = sext i1 [[TMP4764]] to i32
21375 // CHECK-NEXT:    store i32 [[TMP4765]], i32* [[IR]], align 4
21376 // CHECK-NEXT:    [[TMP4766:%.*]] = load float, float* [[FE]], align 4
21377 // CHECK-NEXT:    [[TMP4767:%.*]] = load float, float* [[FD]], align 4
21378 // CHECK-NEXT:    [[TMP4768:%.*]] = bitcast float* [[FX]] to i32*
21379 // CHECK-NEXT:    [[TMP4769:%.*]] = bitcast float [[TMP4766]] to i32
21380 // CHECK-NEXT:    [[TMP4770:%.*]] = bitcast float [[TMP4767]] to i32
21381 // CHECK-NEXT:    [[TMP4771:%.*]] = cmpxchg i32* [[TMP4768]], i32 [[TMP4769]], i32 [[TMP4770]] monotonic monotonic, align 4
21382 // CHECK-NEXT:    [[TMP4772:%.*]] = extractvalue { i32, i1 } [[TMP4771]], 1
21383 // CHECK-NEXT:    [[TMP4773:%.*]] = sext i1 [[TMP4772]] to i32
21384 // CHECK-NEXT:    store i32 [[TMP4773]], i32* [[IR]], align 4
21385 // CHECK-NEXT:    [[TMP4774:%.*]] = load float, float* [[FE]], align 4
21386 // CHECK-NEXT:    [[TMP4775:%.*]] = load float, float* [[FD]], align 4
21387 // CHECK-NEXT:    [[TMP4776:%.*]] = bitcast float* [[FX]] to i32*
21388 // CHECK-NEXT:    [[TMP4777:%.*]] = bitcast float [[TMP4774]] to i32
21389 // CHECK-NEXT:    [[TMP4778:%.*]] = bitcast float [[TMP4775]] to i32
21390 // CHECK-NEXT:    [[TMP4779:%.*]] = cmpxchg i32* [[TMP4776]], i32 [[TMP4777]], i32 [[TMP4778]] monotonic monotonic, align 4
21391 // CHECK-NEXT:    [[TMP4780:%.*]] = extractvalue { i32, i1 } [[TMP4779]], 0
21392 // CHECK-NEXT:    [[TMP4781:%.*]] = bitcast i32 [[TMP4780]] to float
21393 // CHECK-NEXT:    [[TMP4782:%.*]] = extractvalue { i32, i1 } [[TMP4779]], 1
21394 // CHECK-NEXT:    br i1 [[TMP4782]], label [[FX_ATOMIC_EXIT463:%.*]], label [[FX_ATOMIC_CONT464:%.*]]
21395 // CHECK:       fx.atomic.cont464:
21396 // CHECK-NEXT:    store float [[TMP4781]], float* [[FV]], align 4
21397 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT463]]
21398 // CHECK:       fx.atomic.exit463:
21399 // CHECK-NEXT:    [[TMP4783:%.*]] = extractvalue { i32, i1 } [[TMP4779]], 1
21400 // CHECK-NEXT:    [[TMP4784:%.*]] = sext i1 [[TMP4783]] to i32
21401 // CHECK-NEXT:    store i32 [[TMP4784]], i32* [[IR]], align 4
21402 // CHECK-NEXT:    [[TMP4785:%.*]] = load float, float* [[FE]], align 4
21403 // CHECK-NEXT:    [[TMP4786:%.*]] = load float, float* [[FD]], align 4
21404 // CHECK-NEXT:    [[TMP4787:%.*]] = bitcast float* [[FX]] to i32*
21405 // CHECK-NEXT:    [[TMP4788:%.*]] = bitcast float [[TMP4785]] to i32
21406 // CHECK-NEXT:    [[TMP4789:%.*]] = bitcast float [[TMP4786]] to i32
21407 // CHECK-NEXT:    [[TMP4790:%.*]] = cmpxchg i32* [[TMP4787]], i32 [[TMP4788]], i32 [[TMP4789]] monotonic monotonic, align 4
21408 // CHECK-NEXT:    [[TMP4791:%.*]] = extractvalue { i32, i1 } [[TMP4790]], 0
21409 // CHECK-NEXT:    [[TMP4792:%.*]] = bitcast i32 [[TMP4791]] to float
21410 // CHECK-NEXT:    [[TMP4793:%.*]] = extractvalue { i32, i1 } [[TMP4790]], 1
21411 // CHECK-NEXT:    br i1 [[TMP4793]], label [[FX_ATOMIC_EXIT465:%.*]], label [[FX_ATOMIC_CONT466:%.*]]
21412 // CHECK:       fx.atomic.cont466:
21413 // CHECK-NEXT:    store float [[TMP4792]], float* [[FV]], align 4
21414 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT465]]
21415 // CHECK:       fx.atomic.exit465:
21416 // CHECK-NEXT:    [[TMP4794:%.*]] = extractvalue { i32, i1 } [[TMP4790]], 1
21417 // CHECK-NEXT:    [[TMP4795:%.*]] = sext i1 [[TMP4794]] to i32
21418 // CHECK-NEXT:    store i32 [[TMP4795]], i32* [[IR]], align 4
21419 // CHECK-NEXT:    [[TMP4796:%.*]] = load float, float* [[FE]], align 4
21420 // CHECK-NEXT:    [[TMP4797:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4796]] acq_rel, align 4
21421 // CHECK-NEXT:    store float [[TMP4797]], float* [[FV]], align 4
21422 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21423 // CHECK-NEXT:    [[TMP4798:%.*]] = load float, float* [[FE]], align 4
21424 // CHECK-NEXT:    [[TMP4799:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4798]] acq_rel, align 4
21425 // CHECK-NEXT:    store float [[TMP4799]], float* [[FV]], align 4
21426 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21427 // CHECK-NEXT:    [[TMP4800:%.*]] = load float, float* [[FE]], align 4
21428 // CHECK-NEXT:    [[TMP4801:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4800]] acq_rel, align 4
21429 // CHECK-NEXT:    store float [[TMP4801]], float* [[FV]], align 4
21430 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21431 // CHECK-NEXT:    [[TMP4802:%.*]] = load float, float* [[FE]], align 4
21432 // CHECK-NEXT:    [[TMP4803:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4802]] acq_rel, align 4
21433 // CHECK-NEXT:    store float [[TMP4803]], float* [[FV]], align 4
21434 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21435 // CHECK-NEXT:    [[TMP4804:%.*]] = load float, float* [[FE]], align 4
21436 // CHECK-NEXT:    [[TMP4805:%.*]] = load float, float* [[FD]], align 4
21437 // CHECK-NEXT:    [[TMP4806:%.*]] = bitcast float* [[FX]] to i32*
21438 // CHECK-NEXT:    [[TMP4807:%.*]] = bitcast float [[TMP4804]] to i32
21439 // CHECK-NEXT:    [[TMP4808:%.*]] = bitcast float [[TMP4805]] to i32
21440 // CHECK-NEXT:    [[TMP4809:%.*]] = cmpxchg i32* [[TMP4806]], i32 [[TMP4807]], i32 [[TMP4808]] acq_rel acquire, align 4
21441 // CHECK-NEXT:    [[TMP4810:%.*]] = extractvalue { i32, i1 } [[TMP4809]], 0
21442 // CHECK-NEXT:    [[TMP4811:%.*]] = bitcast i32 [[TMP4810]] to float
21443 // CHECK-NEXT:    store float [[TMP4811]], float* [[FV]], align 4
21444 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21445 // CHECK-NEXT:    [[TMP4812:%.*]] = load float, float* [[FE]], align 4
21446 // CHECK-NEXT:    [[TMP4813:%.*]] = load float, float* [[FD]], align 4
21447 // CHECK-NEXT:    [[TMP4814:%.*]] = bitcast float* [[FX]] to i32*
21448 // CHECK-NEXT:    [[TMP4815:%.*]] = bitcast float [[TMP4812]] to i32
21449 // CHECK-NEXT:    [[TMP4816:%.*]] = bitcast float [[TMP4813]] to i32
21450 // CHECK-NEXT:    [[TMP4817:%.*]] = cmpxchg i32* [[TMP4814]], i32 [[TMP4815]], i32 [[TMP4816]] acq_rel acquire, align 4
21451 // CHECK-NEXT:    [[TMP4818:%.*]] = extractvalue { i32, i1 } [[TMP4817]], 0
21452 // CHECK-NEXT:    [[TMP4819:%.*]] = bitcast i32 [[TMP4818]] to float
21453 // CHECK-NEXT:    store float [[TMP4819]], float* [[FV]], align 4
21454 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21455 // CHECK-NEXT:    [[TMP4820:%.*]] = load float, float* [[FE]], align 4
21456 // CHECK-NEXT:    [[TMP4821:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4820]] acq_rel, align 4
21457 // CHECK-NEXT:    [[TMP4822:%.*]] = fcmp ogt float [[TMP4821]], [[TMP4820]]
21458 // CHECK-NEXT:    [[TMP4823:%.*]] = select i1 [[TMP4822]], float [[TMP4820]], float [[TMP4821]]
21459 // CHECK-NEXT:    store float [[TMP4823]], float* [[FV]], align 4
21460 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21461 // CHECK-NEXT:    [[TMP4824:%.*]] = load float, float* [[FE]], align 4
21462 // CHECK-NEXT:    [[TMP4825:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4824]] acq_rel, align 4
21463 // CHECK-NEXT:    [[TMP4826:%.*]] = fcmp olt float [[TMP4825]], [[TMP4824]]
21464 // CHECK-NEXT:    [[TMP4827:%.*]] = select i1 [[TMP4826]], float [[TMP4824]], float [[TMP4825]]
21465 // CHECK-NEXT:    store float [[TMP4827]], float* [[FV]], align 4
21466 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21467 // CHECK-NEXT:    [[TMP4828:%.*]] = load float, float* [[FE]], align 4
21468 // CHECK-NEXT:    [[TMP4829:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4828]] acq_rel, align 4
21469 // CHECK-NEXT:    [[TMP4830:%.*]] = fcmp olt float [[TMP4829]], [[TMP4828]]
21470 // CHECK-NEXT:    [[TMP4831:%.*]] = select i1 [[TMP4830]], float [[TMP4828]], float [[TMP4829]]
21471 // CHECK-NEXT:    store float [[TMP4831]], float* [[FV]], align 4
21472 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21473 // CHECK-NEXT:    [[TMP4832:%.*]] = load float, float* [[FE]], align 4
21474 // CHECK-NEXT:    [[TMP4833:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4832]] acq_rel, align 4
21475 // CHECK-NEXT:    [[TMP4834:%.*]] = fcmp ogt float [[TMP4833]], [[TMP4832]]
21476 // CHECK-NEXT:    [[TMP4835:%.*]] = select i1 [[TMP4834]], float [[TMP4832]], float [[TMP4833]]
21477 // CHECK-NEXT:    store float [[TMP4835]], float* [[FV]], align 4
21478 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21479 // CHECK-NEXT:    [[TMP4836:%.*]] = load float, float* [[FE]], align 4
21480 // CHECK-NEXT:    [[TMP4837:%.*]] = load float, float* [[FD]], align 4
21481 // CHECK-NEXT:    [[TMP4838:%.*]] = bitcast float* [[FX]] to i32*
21482 // CHECK-NEXT:    [[TMP4839:%.*]] = bitcast float [[TMP4836]] to i32
21483 // CHECK-NEXT:    [[TMP4840:%.*]] = bitcast float [[TMP4837]] to i32
21484 // CHECK-NEXT:    [[TMP4841:%.*]] = cmpxchg i32* [[TMP4838]], i32 [[TMP4839]], i32 [[TMP4840]] acq_rel acquire, align 4
21485 // CHECK-NEXT:    [[TMP4842:%.*]] = extractvalue { i32, i1 } [[TMP4841]], 0
21486 // CHECK-NEXT:    [[TMP4843:%.*]] = bitcast i32 [[TMP4842]] to float
21487 // CHECK-NEXT:    [[TMP4844:%.*]] = extractvalue { i32, i1 } [[TMP4841]], 1
21488 // CHECK-NEXT:    [[TMP4845:%.*]] = select i1 [[TMP4844]], float [[TMP4836]], float [[TMP4843]]
21489 // CHECK-NEXT:    store float [[TMP4845]], float* [[FV]], align 4
21490 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21491 // CHECK-NEXT:    [[TMP4846:%.*]] = load float, float* [[FE]], align 4
21492 // CHECK-NEXT:    [[TMP4847:%.*]] = load float, float* [[FD]], align 4
21493 // CHECK-NEXT:    [[TMP4848:%.*]] = bitcast float* [[FX]] to i32*
21494 // CHECK-NEXT:    [[TMP4849:%.*]] = bitcast float [[TMP4846]] to i32
21495 // CHECK-NEXT:    [[TMP4850:%.*]] = bitcast float [[TMP4847]] to i32
21496 // CHECK-NEXT:    [[TMP4851:%.*]] = cmpxchg i32* [[TMP4848]], i32 [[TMP4849]], i32 [[TMP4850]] acq_rel acquire, align 4
21497 // CHECK-NEXT:    [[TMP4852:%.*]] = extractvalue { i32, i1 } [[TMP4851]], 0
21498 // CHECK-NEXT:    [[TMP4853:%.*]] = bitcast i32 [[TMP4852]] to float
21499 // CHECK-NEXT:    [[TMP4854:%.*]] = extractvalue { i32, i1 } [[TMP4851]], 1
21500 // CHECK-NEXT:    [[TMP4855:%.*]] = select i1 [[TMP4854]], float [[TMP4846]], float [[TMP4853]]
21501 // CHECK-NEXT:    store float [[TMP4855]], float* [[FV]], align 4
21502 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21503 // CHECK-NEXT:    [[TMP4856:%.*]] = load float, float* [[FE]], align 4
21504 // CHECK-NEXT:    [[TMP4857:%.*]] = load float, float* [[FD]], align 4
21505 // CHECK-NEXT:    [[TMP4858:%.*]] = bitcast float* [[FX]] to i32*
21506 // CHECK-NEXT:    [[TMP4859:%.*]] = bitcast float [[TMP4856]] to i32
21507 // CHECK-NEXT:    [[TMP4860:%.*]] = bitcast float [[TMP4857]] to i32
21508 // CHECK-NEXT:    [[TMP4861:%.*]] = cmpxchg i32* [[TMP4858]], i32 [[TMP4859]], i32 [[TMP4860]] acq_rel acquire, align 4
21509 // CHECK-NEXT:    [[TMP4862:%.*]] = extractvalue { i32, i1 } [[TMP4861]], 0
21510 // CHECK-NEXT:    [[TMP4863:%.*]] = bitcast i32 [[TMP4862]] to float
21511 // CHECK-NEXT:    [[TMP4864:%.*]] = extractvalue { i32, i1 } [[TMP4861]], 1
21512 // CHECK-NEXT:    br i1 [[TMP4864]], label [[FX_ATOMIC_EXIT467:%.*]], label [[FX_ATOMIC_CONT468:%.*]]
21513 // CHECK:       fx.atomic.cont468:
21514 // CHECK-NEXT:    store float [[TMP4863]], float* [[FV]], align 4
21515 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT467]]
21516 // CHECK:       fx.atomic.exit467:
21517 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21518 // CHECK-NEXT:    [[TMP4865:%.*]] = load float, float* [[FE]], align 4
21519 // CHECK-NEXT:    [[TMP4866:%.*]] = load float, float* [[FD]], align 4
21520 // CHECK-NEXT:    [[TMP4867:%.*]] = bitcast float* [[FX]] to i32*
21521 // CHECK-NEXT:    [[TMP4868:%.*]] = bitcast float [[TMP4865]] to i32
21522 // CHECK-NEXT:    [[TMP4869:%.*]] = bitcast float [[TMP4866]] to i32
21523 // CHECK-NEXT:    [[TMP4870:%.*]] = cmpxchg i32* [[TMP4867]], i32 [[TMP4868]], i32 [[TMP4869]] acq_rel acquire, align 4
21524 // CHECK-NEXT:    [[TMP4871:%.*]] = extractvalue { i32, i1 } [[TMP4870]], 0
21525 // CHECK-NEXT:    [[TMP4872:%.*]] = bitcast i32 [[TMP4871]] to float
21526 // CHECK-NEXT:    [[TMP4873:%.*]] = extractvalue { i32, i1 } [[TMP4870]], 1
21527 // CHECK-NEXT:    br i1 [[TMP4873]], label [[FX_ATOMIC_EXIT469:%.*]], label [[FX_ATOMIC_CONT470:%.*]]
21528 // CHECK:       fx.atomic.cont470:
21529 // CHECK-NEXT:    store float [[TMP4872]], float* [[FV]], align 4
21530 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT469]]
21531 // CHECK:       fx.atomic.exit469:
21532 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21533 // CHECK-NEXT:    [[TMP4874:%.*]] = load float, float* [[FE]], align 4
21534 // CHECK-NEXT:    [[TMP4875:%.*]] = load float, float* [[FD]], align 4
21535 // CHECK-NEXT:    [[TMP4876:%.*]] = bitcast float* [[FX]] to i32*
21536 // CHECK-NEXT:    [[TMP4877:%.*]] = bitcast float [[TMP4874]] to i32
21537 // CHECK-NEXT:    [[TMP4878:%.*]] = bitcast float [[TMP4875]] to i32
21538 // CHECK-NEXT:    [[TMP4879:%.*]] = cmpxchg i32* [[TMP4876]], i32 [[TMP4877]], i32 [[TMP4878]] acq_rel acquire, align 4
21539 // CHECK-NEXT:    [[TMP4880:%.*]] = extractvalue { i32, i1 } [[TMP4879]], 1
21540 // CHECK-NEXT:    [[TMP4881:%.*]] = sext i1 [[TMP4880]] to i32
21541 // CHECK-NEXT:    store i32 [[TMP4881]], i32* [[IR]], align 4
21542 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21543 // CHECK-NEXT:    [[TMP4882:%.*]] = load float, float* [[FE]], align 4
21544 // CHECK-NEXT:    [[TMP4883:%.*]] = load float, float* [[FD]], align 4
21545 // CHECK-NEXT:    [[TMP4884:%.*]] = bitcast float* [[FX]] to i32*
21546 // CHECK-NEXT:    [[TMP4885:%.*]] = bitcast float [[TMP4882]] to i32
21547 // CHECK-NEXT:    [[TMP4886:%.*]] = bitcast float [[TMP4883]] to i32
21548 // CHECK-NEXT:    [[TMP4887:%.*]] = cmpxchg i32* [[TMP4884]], i32 [[TMP4885]], i32 [[TMP4886]] acq_rel acquire, align 4
21549 // CHECK-NEXT:    [[TMP4888:%.*]] = extractvalue { i32, i1 } [[TMP4887]], 1
21550 // CHECK-NEXT:    [[TMP4889:%.*]] = sext i1 [[TMP4888]] to i32
21551 // CHECK-NEXT:    store i32 [[TMP4889]], i32* [[IR]], align 4
21552 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21553 // CHECK-NEXT:    [[TMP4890:%.*]] = load float, float* [[FE]], align 4
21554 // CHECK-NEXT:    [[TMP4891:%.*]] = load float, float* [[FD]], align 4
21555 // CHECK-NEXT:    [[TMP4892:%.*]] = bitcast float* [[FX]] to i32*
21556 // CHECK-NEXT:    [[TMP4893:%.*]] = bitcast float [[TMP4890]] to i32
21557 // CHECK-NEXT:    [[TMP4894:%.*]] = bitcast float [[TMP4891]] to i32
21558 // CHECK-NEXT:    [[TMP4895:%.*]] = cmpxchg i32* [[TMP4892]], i32 [[TMP4893]], i32 [[TMP4894]] acq_rel acquire, align 4
21559 // CHECK-NEXT:    [[TMP4896:%.*]] = extractvalue { i32, i1 } [[TMP4895]], 0
21560 // CHECK-NEXT:    [[TMP4897:%.*]] = bitcast i32 [[TMP4896]] to float
21561 // CHECK-NEXT:    [[TMP4898:%.*]] = extractvalue { i32, i1 } [[TMP4895]], 1
21562 // CHECK-NEXT:    br i1 [[TMP4898]], label [[FX_ATOMIC_EXIT471:%.*]], label [[FX_ATOMIC_CONT472:%.*]]
21563 // CHECK:       fx.atomic.cont472:
21564 // CHECK-NEXT:    store float [[TMP4897]], float* [[FV]], align 4
21565 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT471]]
21566 // CHECK:       fx.atomic.exit471:
21567 // CHECK-NEXT:    [[TMP4899:%.*]] = extractvalue { i32, i1 } [[TMP4895]], 1
21568 // CHECK-NEXT:    [[TMP4900:%.*]] = sext i1 [[TMP4899]] to i32
21569 // CHECK-NEXT:    store i32 [[TMP4900]], i32* [[IR]], align 4
21570 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21571 // CHECK-NEXT:    [[TMP4901:%.*]] = load float, float* [[FE]], align 4
21572 // CHECK-NEXT:    [[TMP4902:%.*]] = load float, float* [[FD]], align 4
21573 // CHECK-NEXT:    [[TMP4903:%.*]] = bitcast float* [[FX]] to i32*
21574 // CHECK-NEXT:    [[TMP4904:%.*]] = bitcast float [[TMP4901]] to i32
21575 // CHECK-NEXT:    [[TMP4905:%.*]] = bitcast float [[TMP4902]] to i32
21576 // CHECK-NEXT:    [[TMP4906:%.*]] = cmpxchg i32* [[TMP4903]], i32 [[TMP4904]], i32 [[TMP4905]] acq_rel acquire, align 4
21577 // CHECK-NEXT:    [[TMP4907:%.*]] = extractvalue { i32, i1 } [[TMP4906]], 0
21578 // CHECK-NEXT:    [[TMP4908:%.*]] = bitcast i32 [[TMP4907]] to float
21579 // CHECK-NEXT:    [[TMP4909:%.*]] = extractvalue { i32, i1 } [[TMP4906]], 1
21580 // CHECK-NEXT:    br i1 [[TMP4909]], label [[FX_ATOMIC_EXIT473:%.*]], label [[FX_ATOMIC_CONT474:%.*]]
21581 // CHECK:       fx.atomic.cont474:
21582 // CHECK-NEXT:    store float [[TMP4908]], float* [[FV]], align 4
21583 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT473]]
21584 // CHECK:       fx.atomic.exit473:
21585 // CHECK-NEXT:    [[TMP4910:%.*]] = extractvalue { i32, i1 } [[TMP4906]], 1
21586 // CHECK-NEXT:    [[TMP4911:%.*]] = sext i1 [[TMP4910]] to i32
21587 // CHECK-NEXT:    store i32 [[TMP4911]], i32* [[IR]], align 4
21588 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21589 // CHECK-NEXT:    [[TMP4912:%.*]] = load float, float* [[FE]], align 4
21590 // CHECK-NEXT:    [[TMP4913:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4912]] acquire, align 4
21591 // CHECK-NEXT:    store float [[TMP4913]], float* [[FV]], align 4
21592 // CHECK-NEXT:    [[TMP4914:%.*]] = load float, float* [[FE]], align 4
21593 // CHECK-NEXT:    [[TMP4915:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4914]] acquire, align 4
21594 // CHECK-NEXT:    store float [[TMP4915]], float* [[FV]], align 4
21595 // CHECK-NEXT:    [[TMP4916:%.*]] = load float, float* [[FE]], align 4
21596 // CHECK-NEXT:    [[TMP4917:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4916]] acquire, align 4
21597 // CHECK-NEXT:    store float [[TMP4917]], float* [[FV]], align 4
21598 // CHECK-NEXT:    [[TMP4918:%.*]] = load float, float* [[FE]], align 4
21599 // CHECK-NEXT:    [[TMP4919:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4918]] acquire, align 4
21600 // CHECK-NEXT:    store float [[TMP4919]], float* [[FV]], align 4
21601 // CHECK-NEXT:    [[TMP4920:%.*]] = load float, float* [[FE]], align 4
21602 // CHECK-NEXT:    [[TMP4921:%.*]] = load float, float* [[FD]], align 4
21603 // CHECK-NEXT:    [[TMP4922:%.*]] = bitcast float* [[FX]] to i32*
21604 // CHECK-NEXT:    [[TMP4923:%.*]] = bitcast float [[TMP4920]] to i32
21605 // CHECK-NEXT:    [[TMP4924:%.*]] = bitcast float [[TMP4921]] to i32
21606 // CHECK-NEXT:    [[TMP4925:%.*]] = cmpxchg i32* [[TMP4922]], i32 [[TMP4923]], i32 [[TMP4924]] acquire acquire, align 4
21607 // CHECK-NEXT:    [[TMP4926:%.*]] = extractvalue { i32, i1 } [[TMP4925]], 0
21608 // CHECK-NEXT:    [[TMP4927:%.*]] = bitcast i32 [[TMP4926]] to float
21609 // CHECK-NEXT:    store float [[TMP4927]], float* [[FV]], align 4
21610 // CHECK-NEXT:    [[TMP4928:%.*]] = load float, float* [[FE]], align 4
21611 // CHECK-NEXT:    [[TMP4929:%.*]] = load float, float* [[FD]], align 4
21612 // CHECK-NEXT:    [[TMP4930:%.*]] = bitcast float* [[FX]] to i32*
21613 // CHECK-NEXT:    [[TMP4931:%.*]] = bitcast float [[TMP4928]] to i32
21614 // CHECK-NEXT:    [[TMP4932:%.*]] = bitcast float [[TMP4929]] to i32
21615 // CHECK-NEXT:    [[TMP4933:%.*]] = cmpxchg i32* [[TMP4930]], i32 [[TMP4931]], i32 [[TMP4932]] acquire acquire, align 4
21616 // CHECK-NEXT:    [[TMP4934:%.*]] = extractvalue { i32, i1 } [[TMP4933]], 0
21617 // CHECK-NEXT:    [[TMP4935:%.*]] = bitcast i32 [[TMP4934]] to float
21618 // CHECK-NEXT:    store float [[TMP4935]], float* [[FV]], align 4
21619 // CHECK-NEXT:    [[TMP4936:%.*]] = load float, float* [[FE]], align 4
21620 // CHECK-NEXT:    [[TMP4937:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4936]] acquire, align 4
21621 // CHECK-NEXT:    [[TMP4938:%.*]] = fcmp ogt float [[TMP4937]], [[TMP4936]]
21622 // CHECK-NEXT:    [[TMP4939:%.*]] = select i1 [[TMP4938]], float [[TMP4936]], float [[TMP4937]]
21623 // CHECK-NEXT:    store float [[TMP4939]], float* [[FV]], align 4
21624 // CHECK-NEXT:    [[TMP4940:%.*]] = load float, float* [[FE]], align 4
21625 // CHECK-NEXT:    [[TMP4941:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4940]] acquire, align 4
21626 // CHECK-NEXT:    [[TMP4942:%.*]] = fcmp olt float [[TMP4941]], [[TMP4940]]
21627 // CHECK-NEXT:    [[TMP4943:%.*]] = select i1 [[TMP4942]], float [[TMP4940]], float [[TMP4941]]
21628 // CHECK-NEXT:    store float [[TMP4943]], float* [[FV]], align 4
21629 // CHECK-NEXT:    [[TMP4944:%.*]] = load float, float* [[FE]], align 4
21630 // CHECK-NEXT:    [[TMP4945:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP4944]] acquire, align 4
21631 // CHECK-NEXT:    [[TMP4946:%.*]] = fcmp olt float [[TMP4945]], [[TMP4944]]
21632 // CHECK-NEXT:    [[TMP4947:%.*]] = select i1 [[TMP4946]], float [[TMP4944]], float [[TMP4945]]
21633 // CHECK-NEXT:    store float [[TMP4947]], float* [[FV]], align 4
21634 // CHECK-NEXT:    [[TMP4948:%.*]] = load float, float* [[FE]], align 4
21635 // CHECK-NEXT:    [[TMP4949:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP4948]] acquire, align 4
21636 // CHECK-NEXT:    [[TMP4950:%.*]] = fcmp ogt float [[TMP4949]], [[TMP4948]]
21637 // CHECK-NEXT:    [[TMP4951:%.*]] = select i1 [[TMP4950]], float [[TMP4948]], float [[TMP4949]]
21638 // CHECK-NEXT:    store float [[TMP4951]], float* [[FV]], align 4
21639 // CHECK-NEXT:    [[TMP4952:%.*]] = load float, float* [[FE]], align 4
21640 // CHECK-NEXT:    [[TMP4953:%.*]] = load float, float* [[FD]], align 4
21641 // CHECK-NEXT:    [[TMP4954:%.*]] = bitcast float* [[FX]] to i32*
21642 // CHECK-NEXT:    [[TMP4955:%.*]] = bitcast float [[TMP4952]] to i32
21643 // CHECK-NEXT:    [[TMP4956:%.*]] = bitcast float [[TMP4953]] to i32
21644 // CHECK-NEXT:    [[TMP4957:%.*]] = cmpxchg i32* [[TMP4954]], i32 [[TMP4955]], i32 [[TMP4956]] acquire acquire, align 4
21645 // CHECK-NEXT:    [[TMP4958:%.*]] = extractvalue { i32, i1 } [[TMP4957]], 0
21646 // CHECK-NEXT:    [[TMP4959:%.*]] = bitcast i32 [[TMP4958]] to float
21647 // CHECK-NEXT:    [[TMP4960:%.*]] = extractvalue { i32, i1 } [[TMP4957]], 1
21648 // CHECK-NEXT:    [[TMP4961:%.*]] = select i1 [[TMP4960]], float [[TMP4952]], float [[TMP4959]]
21649 // CHECK-NEXT:    store float [[TMP4961]], float* [[FV]], align 4
21650 // CHECK-NEXT:    [[TMP4962:%.*]] = load float, float* [[FE]], align 4
21651 // CHECK-NEXT:    [[TMP4963:%.*]] = load float, float* [[FD]], align 4
21652 // CHECK-NEXT:    [[TMP4964:%.*]] = bitcast float* [[FX]] to i32*
21653 // CHECK-NEXT:    [[TMP4965:%.*]] = bitcast float [[TMP4962]] to i32
21654 // CHECK-NEXT:    [[TMP4966:%.*]] = bitcast float [[TMP4963]] to i32
21655 // CHECK-NEXT:    [[TMP4967:%.*]] = cmpxchg i32* [[TMP4964]], i32 [[TMP4965]], i32 [[TMP4966]] acquire acquire, align 4
21656 // CHECK-NEXT:    [[TMP4968:%.*]] = extractvalue { i32, i1 } [[TMP4967]], 0
21657 // CHECK-NEXT:    [[TMP4969:%.*]] = bitcast i32 [[TMP4968]] to float
21658 // CHECK-NEXT:    [[TMP4970:%.*]] = extractvalue { i32, i1 } [[TMP4967]], 1
21659 // CHECK-NEXT:    [[TMP4971:%.*]] = select i1 [[TMP4970]], float [[TMP4962]], float [[TMP4969]]
21660 // CHECK-NEXT:    store float [[TMP4971]], float* [[FV]], align 4
21661 // CHECK-NEXT:    [[TMP4972:%.*]] = load float, float* [[FE]], align 4
21662 // CHECK-NEXT:    [[TMP4973:%.*]] = load float, float* [[FD]], align 4
21663 // CHECK-NEXT:    [[TMP4974:%.*]] = bitcast float* [[FX]] to i32*
21664 // CHECK-NEXT:    [[TMP4975:%.*]] = bitcast float [[TMP4972]] to i32
21665 // CHECK-NEXT:    [[TMP4976:%.*]] = bitcast float [[TMP4973]] to i32
21666 // CHECK-NEXT:    [[TMP4977:%.*]] = cmpxchg i32* [[TMP4974]], i32 [[TMP4975]], i32 [[TMP4976]] acquire acquire, align 4
21667 // CHECK-NEXT:    [[TMP4978:%.*]] = extractvalue { i32, i1 } [[TMP4977]], 0
21668 // CHECK-NEXT:    [[TMP4979:%.*]] = bitcast i32 [[TMP4978]] to float
21669 // CHECK-NEXT:    [[TMP4980:%.*]] = extractvalue { i32, i1 } [[TMP4977]], 1
21670 // CHECK-NEXT:    br i1 [[TMP4980]], label [[FX_ATOMIC_EXIT475:%.*]], label [[FX_ATOMIC_CONT476:%.*]]
21671 // CHECK:       fx.atomic.cont476:
21672 // CHECK-NEXT:    store float [[TMP4979]], float* [[FV]], align 4
21673 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT475]]
21674 // CHECK:       fx.atomic.exit475:
21675 // CHECK-NEXT:    [[TMP4981:%.*]] = load float, float* [[FE]], align 4
21676 // CHECK-NEXT:    [[TMP4982:%.*]] = load float, float* [[FD]], align 4
21677 // CHECK-NEXT:    [[TMP4983:%.*]] = bitcast float* [[FX]] to i32*
21678 // CHECK-NEXT:    [[TMP4984:%.*]] = bitcast float [[TMP4981]] to i32
21679 // CHECK-NEXT:    [[TMP4985:%.*]] = bitcast float [[TMP4982]] to i32
21680 // CHECK-NEXT:    [[TMP4986:%.*]] = cmpxchg i32* [[TMP4983]], i32 [[TMP4984]], i32 [[TMP4985]] acquire acquire, align 4
21681 // CHECK-NEXT:    [[TMP4987:%.*]] = extractvalue { i32, i1 } [[TMP4986]], 0
21682 // CHECK-NEXT:    [[TMP4988:%.*]] = bitcast i32 [[TMP4987]] to float
21683 // CHECK-NEXT:    [[TMP4989:%.*]] = extractvalue { i32, i1 } [[TMP4986]], 1
21684 // CHECK-NEXT:    br i1 [[TMP4989]], label [[FX_ATOMIC_EXIT477:%.*]], label [[FX_ATOMIC_CONT478:%.*]]
21685 // CHECK:       fx.atomic.cont478:
21686 // CHECK-NEXT:    store float [[TMP4988]], float* [[FV]], align 4
21687 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT477]]
21688 // CHECK:       fx.atomic.exit477:
21689 // CHECK-NEXT:    [[TMP4990:%.*]] = load float, float* [[FE]], align 4
21690 // CHECK-NEXT:    [[TMP4991:%.*]] = load float, float* [[FD]], align 4
21691 // CHECK-NEXT:    [[TMP4992:%.*]] = bitcast float* [[FX]] to i32*
21692 // CHECK-NEXT:    [[TMP4993:%.*]] = bitcast float [[TMP4990]] to i32
21693 // CHECK-NEXT:    [[TMP4994:%.*]] = bitcast float [[TMP4991]] to i32
21694 // CHECK-NEXT:    [[TMP4995:%.*]] = cmpxchg i32* [[TMP4992]], i32 [[TMP4993]], i32 [[TMP4994]] acquire acquire, align 4
21695 // CHECK-NEXT:    [[TMP4996:%.*]] = extractvalue { i32, i1 } [[TMP4995]], 1
21696 // CHECK-NEXT:    [[TMP4997:%.*]] = sext i1 [[TMP4996]] to i32
21697 // CHECK-NEXT:    store i32 [[TMP4997]], i32* [[IR]], align 4
21698 // CHECK-NEXT:    [[TMP4998:%.*]] = load float, float* [[FE]], align 4
21699 // CHECK-NEXT:    [[TMP4999:%.*]] = load float, float* [[FD]], align 4
21700 // CHECK-NEXT:    [[TMP5000:%.*]] = bitcast float* [[FX]] to i32*
21701 // CHECK-NEXT:    [[TMP5001:%.*]] = bitcast float [[TMP4998]] to i32
21702 // CHECK-NEXT:    [[TMP5002:%.*]] = bitcast float [[TMP4999]] to i32
21703 // CHECK-NEXT:    [[TMP5003:%.*]] = cmpxchg i32* [[TMP5000]], i32 [[TMP5001]], i32 [[TMP5002]] acquire acquire, align 4
21704 // CHECK-NEXT:    [[TMP5004:%.*]] = extractvalue { i32, i1 } [[TMP5003]], 1
21705 // CHECK-NEXT:    [[TMP5005:%.*]] = sext i1 [[TMP5004]] to i32
21706 // CHECK-NEXT:    store i32 [[TMP5005]], i32* [[IR]], align 4
21707 // CHECK-NEXT:    [[TMP5006:%.*]] = load float, float* [[FE]], align 4
21708 // CHECK-NEXT:    [[TMP5007:%.*]] = load float, float* [[FD]], align 4
21709 // CHECK-NEXT:    [[TMP5008:%.*]] = bitcast float* [[FX]] to i32*
21710 // CHECK-NEXT:    [[TMP5009:%.*]] = bitcast float [[TMP5006]] to i32
21711 // CHECK-NEXT:    [[TMP5010:%.*]] = bitcast float [[TMP5007]] to i32
21712 // CHECK-NEXT:    [[TMP5011:%.*]] = cmpxchg i32* [[TMP5008]], i32 [[TMP5009]], i32 [[TMP5010]] acquire acquire, align 4
21713 // CHECK-NEXT:    [[TMP5012:%.*]] = extractvalue { i32, i1 } [[TMP5011]], 0
21714 // CHECK-NEXT:    [[TMP5013:%.*]] = bitcast i32 [[TMP5012]] to float
21715 // CHECK-NEXT:    [[TMP5014:%.*]] = extractvalue { i32, i1 } [[TMP5011]], 1
21716 // CHECK-NEXT:    br i1 [[TMP5014]], label [[FX_ATOMIC_EXIT479:%.*]], label [[FX_ATOMIC_CONT480:%.*]]
21717 // CHECK:       fx.atomic.cont480:
21718 // CHECK-NEXT:    store float [[TMP5013]], float* [[FV]], align 4
21719 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT479]]
21720 // CHECK:       fx.atomic.exit479:
21721 // CHECK-NEXT:    [[TMP5015:%.*]] = extractvalue { i32, i1 } [[TMP5011]], 1
21722 // CHECK-NEXT:    [[TMP5016:%.*]] = sext i1 [[TMP5015]] to i32
21723 // CHECK-NEXT:    store i32 [[TMP5016]], i32* [[IR]], align 4
21724 // CHECK-NEXT:    [[TMP5017:%.*]] = load float, float* [[FE]], align 4
21725 // CHECK-NEXT:    [[TMP5018:%.*]] = load float, float* [[FD]], align 4
21726 // CHECK-NEXT:    [[TMP5019:%.*]] = bitcast float* [[FX]] to i32*
21727 // CHECK-NEXT:    [[TMP5020:%.*]] = bitcast float [[TMP5017]] to i32
21728 // CHECK-NEXT:    [[TMP5021:%.*]] = bitcast float [[TMP5018]] to i32
21729 // CHECK-NEXT:    [[TMP5022:%.*]] = cmpxchg i32* [[TMP5019]], i32 [[TMP5020]], i32 [[TMP5021]] acquire acquire, align 4
21730 // CHECK-NEXT:    [[TMP5023:%.*]] = extractvalue { i32, i1 } [[TMP5022]], 0
21731 // CHECK-NEXT:    [[TMP5024:%.*]] = bitcast i32 [[TMP5023]] to float
21732 // CHECK-NEXT:    [[TMP5025:%.*]] = extractvalue { i32, i1 } [[TMP5022]], 1
21733 // CHECK-NEXT:    br i1 [[TMP5025]], label [[FX_ATOMIC_EXIT481:%.*]], label [[FX_ATOMIC_CONT482:%.*]]
21734 // CHECK:       fx.atomic.cont482:
21735 // CHECK-NEXT:    store float [[TMP5024]], float* [[FV]], align 4
21736 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT481]]
21737 // CHECK:       fx.atomic.exit481:
21738 // CHECK-NEXT:    [[TMP5026:%.*]] = extractvalue { i32, i1 } [[TMP5022]], 1
21739 // CHECK-NEXT:    [[TMP5027:%.*]] = sext i1 [[TMP5026]] to i32
21740 // CHECK-NEXT:    store i32 [[TMP5027]], i32* [[IR]], align 4
21741 // CHECK-NEXT:    [[TMP5028:%.*]] = load float, float* [[FE]], align 4
21742 // CHECK-NEXT:    [[TMP5029:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5028]] monotonic, align 4
21743 // CHECK-NEXT:    store float [[TMP5029]], float* [[FV]], align 4
21744 // CHECK-NEXT:    [[TMP5030:%.*]] = load float, float* [[FE]], align 4
21745 // CHECK-NEXT:    [[TMP5031:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5030]] monotonic, align 4
21746 // CHECK-NEXT:    store float [[TMP5031]], float* [[FV]], align 4
21747 // CHECK-NEXT:    [[TMP5032:%.*]] = load float, float* [[FE]], align 4
21748 // CHECK-NEXT:    [[TMP5033:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5032]] monotonic, align 4
21749 // CHECK-NEXT:    store float [[TMP5033]], float* [[FV]], align 4
21750 // CHECK-NEXT:    [[TMP5034:%.*]] = load float, float* [[FE]], align 4
21751 // CHECK-NEXT:    [[TMP5035:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5034]] monotonic, align 4
21752 // CHECK-NEXT:    store float [[TMP5035]], float* [[FV]], align 4
21753 // CHECK-NEXT:    [[TMP5036:%.*]] = load float, float* [[FE]], align 4
21754 // CHECK-NEXT:    [[TMP5037:%.*]] = load float, float* [[FD]], align 4
21755 // CHECK-NEXT:    [[TMP5038:%.*]] = bitcast float* [[FX]] to i32*
21756 // CHECK-NEXT:    [[TMP5039:%.*]] = bitcast float [[TMP5036]] to i32
21757 // CHECK-NEXT:    [[TMP5040:%.*]] = bitcast float [[TMP5037]] to i32
21758 // CHECK-NEXT:    [[TMP5041:%.*]] = cmpxchg i32* [[TMP5038]], i32 [[TMP5039]], i32 [[TMP5040]] monotonic monotonic, align 4
21759 // CHECK-NEXT:    [[TMP5042:%.*]] = extractvalue { i32, i1 } [[TMP5041]], 0
21760 // CHECK-NEXT:    [[TMP5043:%.*]] = bitcast i32 [[TMP5042]] to float
21761 // CHECK-NEXT:    store float [[TMP5043]], float* [[FV]], align 4
21762 // CHECK-NEXT:    [[TMP5044:%.*]] = load float, float* [[FE]], align 4
21763 // CHECK-NEXT:    [[TMP5045:%.*]] = load float, float* [[FD]], align 4
21764 // CHECK-NEXT:    [[TMP5046:%.*]] = bitcast float* [[FX]] to i32*
21765 // CHECK-NEXT:    [[TMP5047:%.*]] = bitcast float [[TMP5044]] to i32
21766 // CHECK-NEXT:    [[TMP5048:%.*]] = bitcast float [[TMP5045]] to i32
21767 // CHECK-NEXT:    [[TMP5049:%.*]] = cmpxchg i32* [[TMP5046]], i32 [[TMP5047]], i32 [[TMP5048]] monotonic monotonic, align 4
21768 // CHECK-NEXT:    [[TMP5050:%.*]] = extractvalue { i32, i1 } [[TMP5049]], 0
21769 // CHECK-NEXT:    [[TMP5051:%.*]] = bitcast i32 [[TMP5050]] to float
21770 // CHECK-NEXT:    store float [[TMP5051]], float* [[FV]], align 4
21771 // CHECK-NEXT:    [[TMP5052:%.*]] = load float, float* [[FE]], align 4
21772 // CHECK-NEXT:    [[TMP5053:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5052]] monotonic, align 4
21773 // CHECK-NEXT:    [[TMP5054:%.*]] = fcmp ogt float [[TMP5053]], [[TMP5052]]
21774 // CHECK-NEXT:    [[TMP5055:%.*]] = select i1 [[TMP5054]], float [[TMP5052]], float [[TMP5053]]
21775 // CHECK-NEXT:    store float [[TMP5055]], float* [[FV]], align 4
21776 // CHECK-NEXT:    [[TMP5056:%.*]] = load float, float* [[FE]], align 4
21777 // CHECK-NEXT:    [[TMP5057:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5056]] monotonic, align 4
21778 // CHECK-NEXT:    [[TMP5058:%.*]] = fcmp olt float [[TMP5057]], [[TMP5056]]
21779 // CHECK-NEXT:    [[TMP5059:%.*]] = select i1 [[TMP5058]], float [[TMP5056]], float [[TMP5057]]
21780 // CHECK-NEXT:    store float [[TMP5059]], float* [[FV]], align 4
21781 // CHECK-NEXT:    [[TMP5060:%.*]] = load float, float* [[FE]], align 4
21782 // CHECK-NEXT:    [[TMP5061:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5060]] monotonic, align 4
21783 // CHECK-NEXT:    [[TMP5062:%.*]] = fcmp olt float [[TMP5061]], [[TMP5060]]
21784 // CHECK-NEXT:    [[TMP5063:%.*]] = select i1 [[TMP5062]], float [[TMP5060]], float [[TMP5061]]
21785 // CHECK-NEXT:    store float [[TMP5063]], float* [[FV]], align 4
21786 // CHECK-NEXT:    [[TMP5064:%.*]] = load float, float* [[FE]], align 4
21787 // CHECK-NEXT:    [[TMP5065:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5064]] monotonic, align 4
21788 // CHECK-NEXT:    [[TMP5066:%.*]] = fcmp ogt float [[TMP5065]], [[TMP5064]]
21789 // CHECK-NEXT:    [[TMP5067:%.*]] = select i1 [[TMP5066]], float [[TMP5064]], float [[TMP5065]]
21790 // CHECK-NEXT:    store float [[TMP5067]], float* [[FV]], align 4
21791 // CHECK-NEXT:    [[TMP5068:%.*]] = load float, float* [[FE]], align 4
21792 // CHECK-NEXT:    [[TMP5069:%.*]] = load float, float* [[FD]], align 4
21793 // CHECK-NEXT:    [[TMP5070:%.*]] = bitcast float* [[FX]] to i32*
21794 // CHECK-NEXT:    [[TMP5071:%.*]] = bitcast float [[TMP5068]] to i32
21795 // CHECK-NEXT:    [[TMP5072:%.*]] = bitcast float [[TMP5069]] to i32
21796 // CHECK-NEXT:    [[TMP5073:%.*]] = cmpxchg i32* [[TMP5070]], i32 [[TMP5071]], i32 [[TMP5072]] monotonic monotonic, align 4
21797 // CHECK-NEXT:    [[TMP5074:%.*]] = extractvalue { i32, i1 } [[TMP5073]], 0
21798 // CHECK-NEXT:    [[TMP5075:%.*]] = bitcast i32 [[TMP5074]] to float
21799 // CHECK-NEXT:    [[TMP5076:%.*]] = extractvalue { i32, i1 } [[TMP5073]], 1
21800 // CHECK-NEXT:    [[TMP5077:%.*]] = select i1 [[TMP5076]], float [[TMP5068]], float [[TMP5075]]
21801 // CHECK-NEXT:    store float [[TMP5077]], float* [[FV]], align 4
21802 // CHECK-NEXT:    [[TMP5078:%.*]] = load float, float* [[FE]], align 4
21803 // CHECK-NEXT:    [[TMP5079:%.*]] = load float, float* [[FD]], align 4
21804 // CHECK-NEXT:    [[TMP5080:%.*]] = bitcast float* [[FX]] to i32*
21805 // CHECK-NEXT:    [[TMP5081:%.*]] = bitcast float [[TMP5078]] to i32
21806 // CHECK-NEXT:    [[TMP5082:%.*]] = bitcast float [[TMP5079]] to i32
21807 // CHECK-NEXT:    [[TMP5083:%.*]] = cmpxchg i32* [[TMP5080]], i32 [[TMP5081]], i32 [[TMP5082]] monotonic monotonic, align 4
21808 // CHECK-NEXT:    [[TMP5084:%.*]] = extractvalue { i32, i1 } [[TMP5083]], 0
21809 // CHECK-NEXT:    [[TMP5085:%.*]] = bitcast i32 [[TMP5084]] to float
21810 // CHECK-NEXT:    [[TMP5086:%.*]] = extractvalue { i32, i1 } [[TMP5083]], 1
21811 // CHECK-NEXT:    [[TMP5087:%.*]] = select i1 [[TMP5086]], float [[TMP5078]], float [[TMP5085]]
21812 // CHECK-NEXT:    store float [[TMP5087]], float* [[FV]], align 4
21813 // CHECK-NEXT:    [[TMP5088:%.*]] = load float, float* [[FE]], align 4
21814 // CHECK-NEXT:    [[TMP5089:%.*]] = load float, float* [[FD]], align 4
21815 // CHECK-NEXT:    [[TMP5090:%.*]] = bitcast float* [[FX]] to i32*
21816 // CHECK-NEXT:    [[TMP5091:%.*]] = bitcast float [[TMP5088]] to i32
21817 // CHECK-NEXT:    [[TMP5092:%.*]] = bitcast float [[TMP5089]] to i32
21818 // CHECK-NEXT:    [[TMP5093:%.*]] = cmpxchg i32* [[TMP5090]], i32 [[TMP5091]], i32 [[TMP5092]] monotonic monotonic, align 4
21819 // CHECK-NEXT:    [[TMP5094:%.*]] = extractvalue { i32, i1 } [[TMP5093]], 0
21820 // CHECK-NEXT:    [[TMP5095:%.*]] = bitcast i32 [[TMP5094]] to float
21821 // CHECK-NEXT:    [[TMP5096:%.*]] = extractvalue { i32, i1 } [[TMP5093]], 1
21822 // CHECK-NEXT:    br i1 [[TMP5096]], label [[FX_ATOMIC_EXIT483:%.*]], label [[FX_ATOMIC_CONT484:%.*]]
21823 // CHECK:       fx.atomic.cont484:
21824 // CHECK-NEXT:    store float [[TMP5095]], float* [[FV]], align 4
21825 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT483]]
21826 // CHECK:       fx.atomic.exit483:
21827 // CHECK-NEXT:    [[TMP5097:%.*]] = load float, float* [[FE]], align 4
21828 // CHECK-NEXT:    [[TMP5098:%.*]] = load float, float* [[FD]], align 4
21829 // CHECK-NEXT:    [[TMP5099:%.*]] = bitcast float* [[FX]] to i32*
21830 // CHECK-NEXT:    [[TMP5100:%.*]] = bitcast float [[TMP5097]] to i32
21831 // CHECK-NEXT:    [[TMP5101:%.*]] = bitcast float [[TMP5098]] to i32
21832 // CHECK-NEXT:    [[TMP5102:%.*]] = cmpxchg i32* [[TMP5099]], i32 [[TMP5100]], i32 [[TMP5101]] monotonic monotonic, align 4
21833 // CHECK-NEXT:    [[TMP5103:%.*]] = extractvalue { i32, i1 } [[TMP5102]], 0
21834 // CHECK-NEXT:    [[TMP5104:%.*]] = bitcast i32 [[TMP5103]] to float
21835 // CHECK-NEXT:    [[TMP5105:%.*]] = extractvalue { i32, i1 } [[TMP5102]], 1
21836 // CHECK-NEXT:    br i1 [[TMP5105]], label [[FX_ATOMIC_EXIT485:%.*]], label [[FX_ATOMIC_CONT486:%.*]]
21837 // CHECK:       fx.atomic.cont486:
21838 // CHECK-NEXT:    store float [[TMP5104]], float* [[FV]], align 4
21839 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT485]]
21840 // CHECK:       fx.atomic.exit485:
21841 // CHECK-NEXT:    [[TMP5106:%.*]] = load float, float* [[FE]], align 4
21842 // CHECK-NEXT:    [[TMP5107:%.*]] = load float, float* [[FD]], align 4
21843 // CHECK-NEXT:    [[TMP5108:%.*]] = bitcast float* [[FX]] to i32*
21844 // CHECK-NEXT:    [[TMP5109:%.*]] = bitcast float [[TMP5106]] to i32
21845 // CHECK-NEXT:    [[TMP5110:%.*]] = bitcast float [[TMP5107]] to i32
21846 // CHECK-NEXT:    [[TMP5111:%.*]] = cmpxchg i32* [[TMP5108]], i32 [[TMP5109]], i32 [[TMP5110]] monotonic monotonic, align 4
21847 // CHECK-NEXT:    [[TMP5112:%.*]] = extractvalue { i32, i1 } [[TMP5111]], 1
21848 // CHECK-NEXT:    [[TMP5113:%.*]] = sext i1 [[TMP5112]] to i32
21849 // CHECK-NEXT:    store i32 [[TMP5113]], i32* [[IR]], align 4
21850 // CHECK-NEXT:    [[TMP5114:%.*]] = load float, float* [[FE]], align 4
21851 // CHECK-NEXT:    [[TMP5115:%.*]] = load float, float* [[FD]], align 4
21852 // CHECK-NEXT:    [[TMP5116:%.*]] = bitcast float* [[FX]] to i32*
21853 // CHECK-NEXT:    [[TMP5117:%.*]] = bitcast float [[TMP5114]] to i32
21854 // CHECK-NEXT:    [[TMP5118:%.*]] = bitcast float [[TMP5115]] to i32
21855 // CHECK-NEXT:    [[TMP5119:%.*]] = cmpxchg i32* [[TMP5116]], i32 [[TMP5117]], i32 [[TMP5118]] monotonic monotonic, align 4
21856 // CHECK-NEXT:    [[TMP5120:%.*]] = extractvalue { i32, i1 } [[TMP5119]], 1
21857 // CHECK-NEXT:    [[TMP5121:%.*]] = sext i1 [[TMP5120]] to i32
21858 // CHECK-NEXT:    store i32 [[TMP5121]], i32* [[IR]], align 4
21859 // CHECK-NEXT:    [[TMP5122:%.*]] = load float, float* [[FE]], align 4
21860 // CHECK-NEXT:    [[TMP5123:%.*]] = load float, float* [[FD]], align 4
21861 // CHECK-NEXT:    [[TMP5124:%.*]] = bitcast float* [[FX]] to i32*
21862 // CHECK-NEXT:    [[TMP5125:%.*]] = bitcast float [[TMP5122]] to i32
21863 // CHECK-NEXT:    [[TMP5126:%.*]] = bitcast float [[TMP5123]] to i32
21864 // CHECK-NEXT:    [[TMP5127:%.*]] = cmpxchg i32* [[TMP5124]], i32 [[TMP5125]], i32 [[TMP5126]] monotonic monotonic, align 4
21865 // CHECK-NEXT:    [[TMP5128:%.*]] = extractvalue { i32, i1 } [[TMP5127]], 0
21866 // CHECK-NEXT:    [[TMP5129:%.*]] = bitcast i32 [[TMP5128]] to float
21867 // CHECK-NEXT:    [[TMP5130:%.*]] = extractvalue { i32, i1 } [[TMP5127]], 1
21868 // CHECK-NEXT:    br i1 [[TMP5130]], label [[FX_ATOMIC_EXIT487:%.*]], label [[FX_ATOMIC_CONT488:%.*]]
21869 // CHECK:       fx.atomic.cont488:
21870 // CHECK-NEXT:    store float [[TMP5129]], float* [[FV]], align 4
21871 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT487]]
21872 // CHECK:       fx.atomic.exit487:
21873 // CHECK-NEXT:    [[TMP5131:%.*]] = extractvalue { i32, i1 } [[TMP5127]], 1
21874 // CHECK-NEXT:    [[TMP5132:%.*]] = sext i1 [[TMP5131]] to i32
21875 // CHECK-NEXT:    store i32 [[TMP5132]], i32* [[IR]], align 4
21876 // CHECK-NEXT:    [[TMP5133:%.*]] = load float, float* [[FE]], align 4
21877 // CHECK-NEXT:    [[TMP5134:%.*]] = load float, float* [[FD]], align 4
21878 // CHECK-NEXT:    [[TMP5135:%.*]] = bitcast float* [[FX]] to i32*
21879 // CHECK-NEXT:    [[TMP5136:%.*]] = bitcast float [[TMP5133]] to i32
21880 // CHECK-NEXT:    [[TMP5137:%.*]] = bitcast float [[TMP5134]] to i32
21881 // CHECK-NEXT:    [[TMP5138:%.*]] = cmpxchg i32* [[TMP5135]], i32 [[TMP5136]], i32 [[TMP5137]] monotonic monotonic, align 4
21882 // CHECK-NEXT:    [[TMP5139:%.*]] = extractvalue { i32, i1 } [[TMP5138]], 0
21883 // CHECK-NEXT:    [[TMP5140:%.*]] = bitcast i32 [[TMP5139]] to float
21884 // CHECK-NEXT:    [[TMP5141:%.*]] = extractvalue { i32, i1 } [[TMP5138]], 1
21885 // CHECK-NEXT:    br i1 [[TMP5141]], label [[FX_ATOMIC_EXIT489:%.*]], label [[FX_ATOMIC_CONT490:%.*]]
21886 // CHECK:       fx.atomic.cont490:
21887 // CHECK-NEXT:    store float [[TMP5140]], float* [[FV]], align 4
21888 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT489]]
21889 // CHECK:       fx.atomic.exit489:
21890 // CHECK-NEXT:    [[TMP5142:%.*]] = extractvalue { i32, i1 } [[TMP5138]], 1
21891 // CHECK-NEXT:    [[TMP5143:%.*]] = sext i1 [[TMP5142]] to i32
21892 // CHECK-NEXT:    store i32 [[TMP5143]], i32* [[IR]], align 4
21893 // CHECK-NEXT:    [[TMP5144:%.*]] = load float, float* [[FE]], align 4
21894 // CHECK-NEXT:    [[TMP5145:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5144]] release, align 4
21895 // CHECK-NEXT:    store float [[TMP5145]], float* [[FV]], align 4
21896 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21897 // CHECK-NEXT:    [[TMP5146:%.*]] = load float, float* [[FE]], align 4
21898 // CHECK-NEXT:    [[TMP5147:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5146]] release, align 4
21899 // CHECK-NEXT:    store float [[TMP5147]], float* [[FV]], align 4
21900 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21901 // CHECK-NEXT:    [[TMP5148:%.*]] = load float, float* [[FE]], align 4
21902 // CHECK-NEXT:    [[TMP5149:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5148]] release, align 4
21903 // CHECK-NEXT:    store float [[TMP5149]], float* [[FV]], align 4
21904 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21905 // CHECK-NEXT:    [[TMP5150:%.*]] = load float, float* [[FE]], align 4
21906 // CHECK-NEXT:    [[TMP5151:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5150]] release, align 4
21907 // CHECK-NEXT:    store float [[TMP5151]], float* [[FV]], align 4
21908 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21909 // CHECK-NEXT:    [[TMP5152:%.*]] = load float, float* [[FE]], align 4
21910 // CHECK-NEXT:    [[TMP5153:%.*]] = load float, float* [[FD]], align 4
21911 // CHECK-NEXT:    [[TMP5154:%.*]] = bitcast float* [[FX]] to i32*
21912 // CHECK-NEXT:    [[TMP5155:%.*]] = bitcast float [[TMP5152]] to i32
21913 // CHECK-NEXT:    [[TMP5156:%.*]] = bitcast float [[TMP5153]] to i32
21914 // CHECK-NEXT:    [[TMP5157:%.*]] = cmpxchg i32* [[TMP5154]], i32 [[TMP5155]], i32 [[TMP5156]] release monotonic, align 4
21915 // CHECK-NEXT:    [[TMP5158:%.*]] = extractvalue { i32, i1 } [[TMP5157]], 0
21916 // CHECK-NEXT:    [[TMP5159:%.*]] = bitcast i32 [[TMP5158]] to float
21917 // CHECK-NEXT:    store float [[TMP5159]], float* [[FV]], align 4
21918 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21919 // CHECK-NEXT:    [[TMP5160:%.*]] = load float, float* [[FE]], align 4
21920 // CHECK-NEXT:    [[TMP5161:%.*]] = load float, float* [[FD]], align 4
21921 // CHECK-NEXT:    [[TMP5162:%.*]] = bitcast float* [[FX]] to i32*
21922 // CHECK-NEXT:    [[TMP5163:%.*]] = bitcast float [[TMP5160]] to i32
21923 // CHECK-NEXT:    [[TMP5164:%.*]] = bitcast float [[TMP5161]] to i32
21924 // CHECK-NEXT:    [[TMP5165:%.*]] = cmpxchg i32* [[TMP5162]], i32 [[TMP5163]], i32 [[TMP5164]] release monotonic, align 4
21925 // CHECK-NEXT:    [[TMP5166:%.*]] = extractvalue { i32, i1 } [[TMP5165]], 0
21926 // CHECK-NEXT:    [[TMP5167:%.*]] = bitcast i32 [[TMP5166]] to float
21927 // CHECK-NEXT:    store float [[TMP5167]], float* [[FV]], align 4
21928 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21929 // CHECK-NEXT:    [[TMP5168:%.*]] = load float, float* [[FE]], align 4
21930 // CHECK-NEXT:    [[TMP5169:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5168]] release, align 4
21931 // CHECK-NEXT:    [[TMP5170:%.*]] = fcmp ogt float [[TMP5169]], [[TMP5168]]
21932 // CHECK-NEXT:    [[TMP5171:%.*]] = select i1 [[TMP5170]], float [[TMP5168]], float [[TMP5169]]
21933 // CHECK-NEXT:    store float [[TMP5171]], float* [[FV]], align 4
21934 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21935 // CHECK-NEXT:    [[TMP5172:%.*]] = load float, float* [[FE]], align 4
21936 // CHECK-NEXT:    [[TMP5173:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5172]] release, align 4
21937 // CHECK-NEXT:    [[TMP5174:%.*]] = fcmp olt float [[TMP5173]], [[TMP5172]]
21938 // CHECK-NEXT:    [[TMP5175:%.*]] = select i1 [[TMP5174]], float [[TMP5172]], float [[TMP5173]]
21939 // CHECK-NEXT:    store float [[TMP5175]], float* [[FV]], align 4
21940 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21941 // CHECK-NEXT:    [[TMP5176:%.*]] = load float, float* [[FE]], align 4
21942 // CHECK-NEXT:    [[TMP5177:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5176]] release, align 4
21943 // CHECK-NEXT:    [[TMP5178:%.*]] = fcmp olt float [[TMP5177]], [[TMP5176]]
21944 // CHECK-NEXT:    [[TMP5179:%.*]] = select i1 [[TMP5178]], float [[TMP5176]], float [[TMP5177]]
21945 // CHECK-NEXT:    store float [[TMP5179]], float* [[FV]], align 4
21946 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21947 // CHECK-NEXT:    [[TMP5180:%.*]] = load float, float* [[FE]], align 4
21948 // CHECK-NEXT:    [[TMP5181:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5180]] release, align 4
21949 // CHECK-NEXT:    [[TMP5182:%.*]] = fcmp ogt float [[TMP5181]], [[TMP5180]]
21950 // CHECK-NEXT:    [[TMP5183:%.*]] = select i1 [[TMP5182]], float [[TMP5180]], float [[TMP5181]]
21951 // CHECK-NEXT:    store float [[TMP5183]], float* [[FV]], align 4
21952 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21953 // CHECK-NEXT:    [[TMP5184:%.*]] = load float, float* [[FE]], align 4
21954 // CHECK-NEXT:    [[TMP5185:%.*]] = load float, float* [[FD]], align 4
21955 // CHECK-NEXT:    [[TMP5186:%.*]] = bitcast float* [[FX]] to i32*
21956 // CHECK-NEXT:    [[TMP5187:%.*]] = bitcast float [[TMP5184]] to i32
21957 // CHECK-NEXT:    [[TMP5188:%.*]] = bitcast float [[TMP5185]] to i32
21958 // CHECK-NEXT:    [[TMP5189:%.*]] = cmpxchg i32* [[TMP5186]], i32 [[TMP5187]], i32 [[TMP5188]] release monotonic, align 4
21959 // CHECK-NEXT:    [[TMP5190:%.*]] = extractvalue { i32, i1 } [[TMP5189]], 0
21960 // CHECK-NEXT:    [[TMP5191:%.*]] = bitcast i32 [[TMP5190]] to float
21961 // CHECK-NEXT:    [[TMP5192:%.*]] = extractvalue { i32, i1 } [[TMP5189]], 1
21962 // CHECK-NEXT:    [[TMP5193:%.*]] = select i1 [[TMP5192]], float [[TMP5184]], float [[TMP5191]]
21963 // CHECK-NEXT:    store float [[TMP5193]], float* [[FV]], align 4
21964 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21965 // CHECK-NEXT:    [[TMP5194:%.*]] = load float, float* [[FE]], align 4
21966 // CHECK-NEXT:    [[TMP5195:%.*]] = load float, float* [[FD]], align 4
21967 // CHECK-NEXT:    [[TMP5196:%.*]] = bitcast float* [[FX]] to i32*
21968 // CHECK-NEXT:    [[TMP5197:%.*]] = bitcast float [[TMP5194]] to i32
21969 // CHECK-NEXT:    [[TMP5198:%.*]] = bitcast float [[TMP5195]] to i32
21970 // CHECK-NEXT:    [[TMP5199:%.*]] = cmpxchg i32* [[TMP5196]], i32 [[TMP5197]], i32 [[TMP5198]] release monotonic, align 4
21971 // CHECK-NEXT:    [[TMP5200:%.*]] = extractvalue { i32, i1 } [[TMP5199]], 0
21972 // CHECK-NEXT:    [[TMP5201:%.*]] = bitcast i32 [[TMP5200]] to float
21973 // CHECK-NEXT:    [[TMP5202:%.*]] = extractvalue { i32, i1 } [[TMP5199]], 1
21974 // CHECK-NEXT:    [[TMP5203:%.*]] = select i1 [[TMP5202]], float [[TMP5194]], float [[TMP5201]]
21975 // CHECK-NEXT:    store float [[TMP5203]], float* [[FV]], align 4
21976 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21977 // CHECK-NEXT:    [[TMP5204:%.*]] = load float, float* [[FE]], align 4
21978 // CHECK-NEXT:    [[TMP5205:%.*]] = load float, float* [[FD]], align 4
21979 // CHECK-NEXT:    [[TMP5206:%.*]] = bitcast float* [[FX]] to i32*
21980 // CHECK-NEXT:    [[TMP5207:%.*]] = bitcast float [[TMP5204]] to i32
21981 // CHECK-NEXT:    [[TMP5208:%.*]] = bitcast float [[TMP5205]] to i32
21982 // CHECK-NEXT:    [[TMP5209:%.*]] = cmpxchg i32* [[TMP5206]], i32 [[TMP5207]], i32 [[TMP5208]] release monotonic, align 4
21983 // CHECK-NEXT:    [[TMP5210:%.*]] = extractvalue { i32, i1 } [[TMP5209]], 0
21984 // CHECK-NEXT:    [[TMP5211:%.*]] = bitcast i32 [[TMP5210]] to float
21985 // CHECK-NEXT:    [[TMP5212:%.*]] = extractvalue { i32, i1 } [[TMP5209]], 1
21986 // CHECK-NEXT:    br i1 [[TMP5212]], label [[FX_ATOMIC_EXIT491:%.*]], label [[FX_ATOMIC_CONT492:%.*]]
21987 // CHECK:       fx.atomic.cont492:
21988 // CHECK-NEXT:    store float [[TMP5211]], float* [[FV]], align 4
21989 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT491]]
21990 // CHECK:       fx.atomic.exit491:
21991 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
21992 // CHECK-NEXT:    [[TMP5213:%.*]] = load float, float* [[FE]], align 4
21993 // CHECK-NEXT:    [[TMP5214:%.*]] = load float, float* [[FD]], align 4
21994 // CHECK-NEXT:    [[TMP5215:%.*]] = bitcast float* [[FX]] to i32*
21995 // CHECK-NEXT:    [[TMP5216:%.*]] = bitcast float [[TMP5213]] to i32
21996 // CHECK-NEXT:    [[TMP5217:%.*]] = bitcast float [[TMP5214]] to i32
21997 // CHECK-NEXT:    [[TMP5218:%.*]] = cmpxchg i32* [[TMP5215]], i32 [[TMP5216]], i32 [[TMP5217]] release monotonic, align 4
21998 // CHECK-NEXT:    [[TMP5219:%.*]] = extractvalue { i32, i1 } [[TMP5218]], 0
21999 // CHECK-NEXT:    [[TMP5220:%.*]] = bitcast i32 [[TMP5219]] to float
22000 // CHECK-NEXT:    [[TMP5221:%.*]] = extractvalue { i32, i1 } [[TMP5218]], 1
22001 // CHECK-NEXT:    br i1 [[TMP5221]], label [[FX_ATOMIC_EXIT493:%.*]], label [[FX_ATOMIC_CONT494:%.*]]
22002 // CHECK:       fx.atomic.cont494:
22003 // CHECK-NEXT:    store float [[TMP5220]], float* [[FV]], align 4
22004 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT493]]
22005 // CHECK:       fx.atomic.exit493:
22006 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22007 // CHECK-NEXT:    [[TMP5222:%.*]] = load float, float* [[FE]], align 4
22008 // CHECK-NEXT:    [[TMP5223:%.*]] = load float, float* [[FD]], align 4
22009 // CHECK-NEXT:    [[TMP5224:%.*]] = bitcast float* [[FX]] to i32*
22010 // CHECK-NEXT:    [[TMP5225:%.*]] = bitcast float [[TMP5222]] to i32
22011 // CHECK-NEXT:    [[TMP5226:%.*]] = bitcast float [[TMP5223]] to i32
22012 // CHECK-NEXT:    [[TMP5227:%.*]] = cmpxchg i32* [[TMP5224]], i32 [[TMP5225]], i32 [[TMP5226]] release monotonic, align 4
22013 // CHECK-NEXT:    [[TMP5228:%.*]] = extractvalue { i32, i1 } [[TMP5227]], 1
22014 // CHECK-NEXT:    [[TMP5229:%.*]] = sext i1 [[TMP5228]] to i32
22015 // CHECK-NEXT:    store i32 [[TMP5229]], i32* [[IR]], align 4
22016 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22017 // CHECK-NEXT:    [[TMP5230:%.*]] = load float, float* [[FE]], align 4
22018 // CHECK-NEXT:    [[TMP5231:%.*]] = load float, float* [[FD]], align 4
22019 // CHECK-NEXT:    [[TMP5232:%.*]] = bitcast float* [[FX]] to i32*
22020 // CHECK-NEXT:    [[TMP5233:%.*]] = bitcast float [[TMP5230]] to i32
22021 // CHECK-NEXT:    [[TMP5234:%.*]] = bitcast float [[TMP5231]] to i32
22022 // CHECK-NEXT:    [[TMP5235:%.*]] = cmpxchg i32* [[TMP5232]], i32 [[TMP5233]], i32 [[TMP5234]] release monotonic, align 4
22023 // CHECK-NEXT:    [[TMP5236:%.*]] = extractvalue { i32, i1 } [[TMP5235]], 1
22024 // CHECK-NEXT:    [[TMP5237:%.*]] = sext i1 [[TMP5236]] to i32
22025 // CHECK-NEXT:    store i32 [[TMP5237]], i32* [[IR]], align 4
22026 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22027 // CHECK-NEXT:    [[TMP5238:%.*]] = load float, float* [[FE]], align 4
22028 // CHECK-NEXT:    [[TMP5239:%.*]] = load float, float* [[FD]], align 4
22029 // CHECK-NEXT:    [[TMP5240:%.*]] = bitcast float* [[FX]] to i32*
22030 // CHECK-NEXT:    [[TMP5241:%.*]] = bitcast float [[TMP5238]] to i32
22031 // CHECK-NEXT:    [[TMP5242:%.*]] = bitcast float [[TMP5239]] to i32
22032 // CHECK-NEXT:    [[TMP5243:%.*]] = cmpxchg i32* [[TMP5240]], i32 [[TMP5241]], i32 [[TMP5242]] release monotonic, align 4
22033 // CHECK-NEXT:    [[TMP5244:%.*]] = extractvalue { i32, i1 } [[TMP5243]], 0
22034 // CHECK-NEXT:    [[TMP5245:%.*]] = bitcast i32 [[TMP5244]] to float
22035 // CHECK-NEXT:    [[TMP5246:%.*]] = extractvalue { i32, i1 } [[TMP5243]], 1
22036 // CHECK-NEXT:    br i1 [[TMP5246]], label [[FX_ATOMIC_EXIT495:%.*]], label [[FX_ATOMIC_CONT496:%.*]]
22037 // CHECK:       fx.atomic.cont496:
22038 // CHECK-NEXT:    store float [[TMP5245]], float* [[FV]], align 4
22039 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT495]]
22040 // CHECK:       fx.atomic.exit495:
22041 // CHECK-NEXT:    [[TMP5247:%.*]] = extractvalue { i32, i1 } [[TMP5243]], 1
22042 // CHECK-NEXT:    [[TMP5248:%.*]] = sext i1 [[TMP5247]] to i32
22043 // CHECK-NEXT:    store i32 [[TMP5248]], i32* [[IR]], align 4
22044 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22045 // CHECK-NEXT:    [[TMP5249:%.*]] = load float, float* [[FE]], align 4
22046 // CHECK-NEXT:    [[TMP5250:%.*]] = load float, float* [[FD]], align 4
22047 // CHECK-NEXT:    [[TMP5251:%.*]] = bitcast float* [[FX]] to i32*
22048 // CHECK-NEXT:    [[TMP5252:%.*]] = bitcast float [[TMP5249]] to i32
22049 // CHECK-NEXT:    [[TMP5253:%.*]] = bitcast float [[TMP5250]] to i32
22050 // CHECK-NEXT:    [[TMP5254:%.*]] = cmpxchg i32* [[TMP5251]], i32 [[TMP5252]], i32 [[TMP5253]] release monotonic, align 4
22051 // CHECK-NEXT:    [[TMP5255:%.*]] = extractvalue { i32, i1 } [[TMP5254]], 0
22052 // CHECK-NEXT:    [[TMP5256:%.*]] = bitcast i32 [[TMP5255]] to float
22053 // CHECK-NEXT:    [[TMP5257:%.*]] = extractvalue { i32, i1 } [[TMP5254]], 1
22054 // CHECK-NEXT:    br i1 [[TMP5257]], label [[FX_ATOMIC_EXIT497:%.*]], label [[FX_ATOMIC_CONT498:%.*]]
22055 // CHECK:       fx.atomic.cont498:
22056 // CHECK-NEXT:    store float [[TMP5256]], float* [[FV]], align 4
22057 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT497]]
22058 // CHECK:       fx.atomic.exit497:
22059 // CHECK-NEXT:    [[TMP5258:%.*]] = extractvalue { i32, i1 } [[TMP5254]], 1
22060 // CHECK-NEXT:    [[TMP5259:%.*]] = sext i1 [[TMP5258]] to i32
22061 // CHECK-NEXT:    store i32 [[TMP5259]], i32* [[IR]], align 4
22062 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22063 // CHECK-NEXT:    [[TMP5260:%.*]] = load float, float* [[FE]], align 4
22064 // CHECK-NEXT:    [[TMP5261:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5260]] seq_cst, align 4
22065 // CHECK-NEXT:    store float [[TMP5261]], float* [[FV]], align 4
22066 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22067 // CHECK-NEXT:    [[TMP5262:%.*]] = load float, float* [[FE]], align 4
22068 // CHECK-NEXT:    [[TMP5263:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5262]] seq_cst, align 4
22069 // CHECK-NEXT:    store float [[TMP5263]], float* [[FV]], align 4
22070 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22071 // CHECK-NEXT:    [[TMP5264:%.*]] = load float, float* [[FE]], align 4
22072 // CHECK-NEXT:    [[TMP5265:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5264]] seq_cst, align 4
22073 // CHECK-NEXT:    store float [[TMP5265]], float* [[FV]], align 4
22074 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22075 // CHECK-NEXT:    [[TMP5266:%.*]] = load float, float* [[FE]], align 4
22076 // CHECK-NEXT:    [[TMP5267:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5266]] seq_cst, align 4
22077 // CHECK-NEXT:    store float [[TMP5267]], float* [[FV]], align 4
22078 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22079 // CHECK-NEXT:    [[TMP5268:%.*]] = load float, float* [[FE]], align 4
22080 // CHECK-NEXT:    [[TMP5269:%.*]] = load float, float* [[FD]], align 4
22081 // CHECK-NEXT:    [[TMP5270:%.*]] = bitcast float* [[FX]] to i32*
22082 // CHECK-NEXT:    [[TMP5271:%.*]] = bitcast float [[TMP5268]] to i32
22083 // CHECK-NEXT:    [[TMP5272:%.*]] = bitcast float [[TMP5269]] to i32
22084 // CHECK-NEXT:    [[TMP5273:%.*]] = cmpxchg i32* [[TMP5270]], i32 [[TMP5271]], i32 [[TMP5272]] seq_cst seq_cst, align 4
22085 // CHECK-NEXT:    [[TMP5274:%.*]] = extractvalue { i32, i1 } [[TMP5273]], 0
22086 // CHECK-NEXT:    [[TMP5275:%.*]] = bitcast i32 [[TMP5274]] to float
22087 // CHECK-NEXT:    store float [[TMP5275]], float* [[FV]], align 4
22088 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22089 // CHECK-NEXT:    [[TMP5276:%.*]] = load float, float* [[FE]], align 4
22090 // CHECK-NEXT:    [[TMP5277:%.*]] = load float, float* [[FD]], align 4
22091 // CHECK-NEXT:    [[TMP5278:%.*]] = bitcast float* [[FX]] to i32*
22092 // CHECK-NEXT:    [[TMP5279:%.*]] = bitcast float [[TMP5276]] to i32
22093 // CHECK-NEXT:    [[TMP5280:%.*]] = bitcast float [[TMP5277]] to i32
22094 // CHECK-NEXT:    [[TMP5281:%.*]] = cmpxchg i32* [[TMP5278]], i32 [[TMP5279]], i32 [[TMP5280]] seq_cst seq_cst, align 4
22095 // CHECK-NEXT:    [[TMP5282:%.*]] = extractvalue { i32, i1 } [[TMP5281]], 0
22096 // CHECK-NEXT:    [[TMP5283:%.*]] = bitcast i32 [[TMP5282]] to float
22097 // CHECK-NEXT:    store float [[TMP5283]], float* [[FV]], align 4
22098 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22099 // CHECK-NEXT:    [[TMP5284:%.*]] = load float, float* [[FE]], align 4
22100 // CHECK-NEXT:    [[TMP5285:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5284]] seq_cst, align 4
22101 // CHECK-NEXT:    [[TMP5286:%.*]] = fcmp ogt float [[TMP5285]], [[TMP5284]]
22102 // CHECK-NEXT:    [[TMP5287:%.*]] = select i1 [[TMP5286]], float [[TMP5284]], float [[TMP5285]]
22103 // CHECK-NEXT:    store float [[TMP5287]], float* [[FV]], align 4
22104 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22105 // CHECK-NEXT:    [[TMP5288:%.*]] = load float, float* [[FE]], align 4
22106 // CHECK-NEXT:    [[TMP5289:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5288]] seq_cst, align 4
22107 // CHECK-NEXT:    [[TMP5290:%.*]] = fcmp olt float [[TMP5289]], [[TMP5288]]
22108 // CHECK-NEXT:    [[TMP5291:%.*]] = select i1 [[TMP5290]], float [[TMP5288]], float [[TMP5289]]
22109 // CHECK-NEXT:    store float [[TMP5291]], float* [[FV]], align 4
22110 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22111 // CHECK-NEXT:    [[TMP5292:%.*]] = load float, float* [[FE]], align 4
22112 // CHECK-NEXT:    [[TMP5293:%.*]] = atomicrmw fmin float* [[FX]], float [[TMP5292]] seq_cst, align 4
22113 // CHECK-NEXT:    [[TMP5294:%.*]] = fcmp olt float [[TMP5293]], [[TMP5292]]
22114 // CHECK-NEXT:    [[TMP5295:%.*]] = select i1 [[TMP5294]], float [[TMP5292]], float [[TMP5293]]
22115 // CHECK-NEXT:    store float [[TMP5295]], float* [[FV]], align 4
22116 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22117 // CHECK-NEXT:    [[TMP5296:%.*]] = load float, float* [[FE]], align 4
22118 // CHECK-NEXT:    [[TMP5297:%.*]] = atomicrmw fmax float* [[FX]], float [[TMP5296]] seq_cst, align 4
22119 // CHECK-NEXT:    [[TMP5298:%.*]] = fcmp ogt float [[TMP5297]], [[TMP5296]]
22120 // CHECK-NEXT:    [[TMP5299:%.*]] = select i1 [[TMP5298]], float [[TMP5296]], float [[TMP5297]]
22121 // CHECK-NEXT:    store float [[TMP5299]], float* [[FV]], align 4
22122 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22123 // CHECK-NEXT:    [[TMP5300:%.*]] = load float, float* [[FE]], align 4
22124 // CHECK-NEXT:    [[TMP5301:%.*]] = load float, float* [[FD]], align 4
22125 // CHECK-NEXT:    [[TMP5302:%.*]] = bitcast float* [[FX]] to i32*
22126 // CHECK-NEXT:    [[TMP5303:%.*]] = bitcast float [[TMP5300]] to i32
22127 // CHECK-NEXT:    [[TMP5304:%.*]] = bitcast float [[TMP5301]] to i32
22128 // CHECK-NEXT:    [[TMP5305:%.*]] = cmpxchg i32* [[TMP5302]], i32 [[TMP5303]], i32 [[TMP5304]] seq_cst seq_cst, align 4
22129 // CHECK-NEXT:    [[TMP5306:%.*]] = extractvalue { i32, i1 } [[TMP5305]], 0
22130 // CHECK-NEXT:    [[TMP5307:%.*]] = bitcast i32 [[TMP5306]] to float
22131 // CHECK-NEXT:    [[TMP5308:%.*]] = extractvalue { i32, i1 } [[TMP5305]], 1
22132 // CHECK-NEXT:    [[TMP5309:%.*]] = select i1 [[TMP5308]], float [[TMP5300]], float [[TMP5307]]
22133 // CHECK-NEXT:    store float [[TMP5309]], float* [[FV]], align 4
22134 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22135 // CHECK-NEXT:    [[TMP5310:%.*]] = load float, float* [[FE]], align 4
22136 // CHECK-NEXT:    [[TMP5311:%.*]] = load float, float* [[FD]], align 4
22137 // CHECK-NEXT:    [[TMP5312:%.*]] = bitcast float* [[FX]] to i32*
22138 // CHECK-NEXT:    [[TMP5313:%.*]] = bitcast float [[TMP5310]] to i32
22139 // CHECK-NEXT:    [[TMP5314:%.*]] = bitcast float [[TMP5311]] to i32
22140 // CHECK-NEXT:    [[TMP5315:%.*]] = cmpxchg i32* [[TMP5312]], i32 [[TMP5313]], i32 [[TMP5314]] seq_cst seq_cst, align 4
22141 // CHECK-NEXT:    [[TMP5316:%.*]] = extractvalue { i32, i1 } [[TMP5315]], 0
22142 // CHECK-NEXT:    [[TMP5317:%.*]] = bitcast i32 [[TMP5316]] to float
22143 // CHECK-NEXT:    [[TMP5318:%.*]] = extractvalue { i32, i1 } [[TMP5315]], 1
22144 // CHECK-NEXT:    [[TMP5319:%.*]] = select i1 [[TMP5318]], float [[TMP5310]], float [[TMP5317]]
22145 // CHECK-NEXT:    store float [[TMP5319]], float* [[FV]], align 4
22146 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22147 // CHECK-NEXT:    [[TMP5320:%.*]] = load float, float* [[FE]], align 4
22148 // CHECK-NEXT:    [[TMP5321:%.*]] = load float, float* [[FD]], align 4
22149 // CHECK-NEXT:    [[TMP5322:%.*]] = bitcast float* [[FX]] to i32*
22150 // CHECK-NEXT:    [[TMP5323:%.*]] = bitcast float [[TMP5320]] to i32
22151 // CHECK-NEXT:    [[TMP5324:%.*]] = bitcast float [[TMP5321]] to i32
22152 // CHECK-NEXT:    [[TMP5325:%.*]] = cmpxchg i32* [[TMP5322]], i32 [[TMP5323]], i32 [[TMP5324]] seq_cst seq_cst, align 4
22153 // CHECK-NEXT:    [[TMP5326:%.*]] = extractvalue { i32, i1 } [[TMP5325]], 0
22154 // CHECK-NEXT:    [[TMP5327:%.*]] = bitcast i32 [[TMP5326]] to float
22155 // CHECK-NEXT:    [[TMP5328:%.*]] = extractvalue { i32, i1 } [[TMP5325]], 1
22156 // CHECK-NEXT:    br i1 [[TMP5328]], label [[FX_ATOMIC_EXIT499:%.*]], label [[FX_ATOMIC_CONT500:%.*]]
22157 // CHECK:       fx.atomic.cont500:
22158 // CHECK-NEXT:    store float [[TMP5327]], float* [[FV]], align 4
22159 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT499]]
22160 // CHECK:       fx.atomic.exit499:
22161 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22162 // CHECK-NEXT:    [[TMP5329:%.*]] = load float, float* [[FE]], align 4
22163 // CHECK-NEXT:    [[TMP5330:%.*]] = load float, float* [[FD]], align 4
22164 // CHECK-NEXT:    [[TMP5331:%.*]] = bitcast float* [[FX]] to i32*
22165 // CHECK-NEXT:    [[TMP5332:%.*]] = bitcast float [[TMP5329]] to i32
22166 // CHECK-NEXT:    [[TMP5333:%.*]] = bitcast float [[TMP5330]] to i32
22167 // CHECK-NEXT:    [[TMP5334:%.*]] = cmpxchg i32* [[TMP5331]], i32 [[TMP5332]], i32 [[TMP5333]] seq_cst seq_cst, align 4
22168 // CHECK-NEXT:    [[TMP5335:%.*]] = extractvalue { i32, i1 } [[TMP5334]], 0
22169 // CHECK-NEXT:    [[TMP5336:%.*]] = bitcast i32 [[TMP5335]] to float
22170 // CHECK-NEXT:    [[TMP5337:%.*]] = extractvalue { i32, i1 } [[TMP5334]], 1
22171 // CHECK-NEXT:    br i1 [[TMP5337]], label [[FX_ATOMIC_EXIT501:%.*]], label [[FX_ATOMIC_CONT502:%.*]]
22172 // CHECK:       fx.atomic.cont502:
22173 // CHECK-NEXT:    store float [[TMP5336]], float* [[FV]], align 4
22174 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT501]]
22175 // CHECK:       fx.atomic.exit501:
22176 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22177 // CHECK-NEXT:    [[TMP5338:%.*]] = load float, float* [[FE]], align 4
22178 // CHECK-NEXT:    [[TMP5339:%.*]] = load float, float* [[FD]], align 4
22179 // CHECK-NEXT:    [[TMP5340:%.*]] = bitcast float* [[FX]] to i32*
22180 // CHECK-NEXT:    [[TMP5341:%.*]] = bitcast float [[TMP5338]] to i32
22181 // CHECK-NEXT:    [[TMP5342:%.*]] = bitcast float [[TMP5339]] to i32
22182 // CHECK-NEXT:    [[TMP5343:%.*]] = cmpxchg i32* [[TMP5340]], i32 [[TMP5341]], i32 [[TMP5342]] seq_cst seq_cst, align 4
22183 // CHECK-NEXT:    [[TMP5344:%.*]] = extractvalue { i32, i1 } [[TMP5343]], 1
22184 // CHECK-NEXT:    [[TMP5345:%.*]] = sext i1 [[TMP5344]] to i32
22185 // CHECK-NEXT:    store i32 [[TMP5345]], i32* [[IR]], align 4
22186 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22187 // CHECK-NEXT:    [[TMP5346:%.*]] = load float, float* [[FE]], align 4
22188 // CHECK-NEXT:    [[TMP5347:%.*]] = load float, float* [[FD]], align 4
22189 // CHECK-NEXT:    [[TMP5348:%.*]] = bitcast float* [[FX]] to i32*
22190 // CHECK-NEXT:    [[TMP5349:%.*]] = bitcast float [[TMP5346]] to i32
22191 // CHECK-NEXT:    [[TMP5350:%.*]] = bitcast float [[TMP5347]] to i32
22192 // CHECK-NEXT:    [[TMP5351:%.*]] = cmpxchg i32* [[TMP5348]], i32 [[TMP5349]], i32 [[TMP5350]] seq_cst seq_cst, align 4
22193 // CHECK-NEXT:    [[TMP5352:%.*]] = extractvalue { i32, i1 } [[TMP5351]], 1
22194 // CHECK-NEXT:    [[TMP5353:%.*]] = sext i1 [[TMP5352]] to i32
22195 // CHECK-NEXT:    store i32 [[TMP5353]], i32* [[IR]], align 4
22196 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22197 // CHECK-NEXT:    [[TMP5354:%.*]] = load float, float* [[FE]], align 4
22198 // CHECK-NEXT:    [[TMP5355:%.*]] = load float, float* [[FD]], align 4
22199 // CHECK-NEXT:    [[TMP5356:%.*]] = bitcast float* [[FX]] to i32*
22200 // CHECK-NEXT:    [[TMP5357:%.*]] = bitcast float [[TMP5354]] to i32
22201 // CHECK-NEXT:    [[TMP5358:%.*]] = bitcast float [[TMP5355]] to i32
22202 // CHECK-NEXT:    [[TMP5359:%.*]] = cmpxchg i32* [[TMP5356]], i32 [[TMP5357]], i32 [[TMP5358]] seq_cst seq_cst, align 4
22203 // CHECK-NEXT:    [[TMP5360:%.*]] = extractvalue { i32, i1 } [[TMP5359]], 0
22204 // CHECK-NEXT:    [[TMP5361:%.*]] = bitcast i32 [[TMP5360]] to float
22205 // CHECK-NEXT:    [[TMP5362:%.*]] = extractvalue { i32, i1 } [[TMP5359]], 1
22206 // CHECK-NEXT:    br i1 [[TMP5362]], label [[FX_ATOMIC_EXIT503:%.*]], label [[FX_ATOMIC_CONT504:%.*]]
22207 // CHECK:       fx.atomic.cont504:
22208 // CHECK-NEXT:    store float [[TMP5361]], float* [[FV]], align 4
22209 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT503]]
22210 // CHECK:       fx.atomic.exit503:
22211 // CHECK-NEXT:    [[TMP5363:%.*]] = extractvalue { i32, i1 } [[TMP5359]], 1
22212 // CHECK-NEXT:    [[TMP5364:%.*]] = sext i1 [[TMP5363]] to i32
22213 // CHECK-NEXT:    store i32 [[TMP5364]], i32* [[IR]], align 4
22214 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22215 // CHECK-NEXT:    [[TMP5365:%.*]] = load float, float* [[FE]], align 4
22216 // CHECK-NEXT:    [[TMP5366:%.*]] = load float, float* [[FD]], align 4
22217 // CHECK-NEXT:    [[TMP5367:%.*]] = bitcast float* [[FX]] to i32*
22218 // CHECK-NEXT:    [[TMP5368:%.*]] = bitcast float [[TMP5365]] to i32
22219 // CHECK-NEXT:    [[TMP5369:%.*]] = bitcast float [[TMP5366]] to i32
22220 // CHECK-NEXT:    [[TMP5370:%.*]] = cmpxchg i32* [[TMP5367]], i32 [[TMP5368]], i32 [[TMP5369]] seq_cst seq_cst, align 4
22221 // CHECK-NEXT:    [[TMP5371:%.*]] = extractvalue { i32, i1 } [[TMP5370]], 0
22222 // CHECK-NEXT:    [[TMP5372:%.*]] = bitcast i32 [[TMP5371]] to float
22223 // CHECK-NEXT:    [[TMP5373:%.*]] = extractvalue { i32, i1 } [[TMP5370]], 1
22224 // CHECK-NEXT:    br i1 [[TMP5373]], label [[FX_ATOMIC_EXIT505:%.*]], label [[FX_ATOMIC_CONT506:%.*]]
22225 // CHECK:       fx.atomic.cont506:
22226 // CHECK-NEXT:    store float [[TMP5372]], float* [[FV]], align 4
22227 // CHECK-NEXT:    br label [[FX_ATOMIC_EXIT505]]
22228 // CHECK:       fx.atomic.exit505:
22229 // CHECK-NEXT:    [[TMP5374:%.*]] = extractvalue { i32, i1 } [[TMP5370]], 1
22230 // CHECK-NEXT:    [[TMP5375:%.*]] = sext i1 [[TMP5374]] to i32
22231 // CHECK-NEXT:    store i32 [[TMP5375]], i32* [[IR]], align 4
22232 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22233 // CHECK-NEXT:    [[TMP5376:%.*]] = load double, double* [[DE]], align 8
22234 // CHECK-NEXT:    [[TMP5377:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5376]] monotonic, align 8
22235 // CHECK-NEXT:    store double [[TMP5377]], double* [[DV]], align 8
22236 // CHECK-NEXT:    [[TMP5378:%.*]] = load double, double* [[DE]], align 8
22237 // CHECK-NEXT:    [[TMP5379:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5378]] monotonic, align 8
22238 // CHECK-NEXT:    store double [[TMP5379]], double* [[DV]], align 8
22239 // CHECK-NEXT:    [[TMP5380:%.*]] = load double, double* [[DE]], align 8
22240 // CHECK-NEXT:    [[TMP5381:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5380]] monotonic, align 8
22241 // CHECK-NEXT:    store double [[TMP5381]], double* [[DV]], align 8
22242 // CHECK-NEXT:    [[TMP5382:%.*]] = load double, double* [[DE]], align 8
22243 // CHECK-NEXT:    [[TMP5383:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5382]] monotonic, align 8
22244 // CHECK-NEXT:    store double [[TMP5383]], double* [[DV]], align 8
22245 // CHECK-NEXT:    [[TMP5384:%.*]] = load double, double* [[DE]], align 8
22246 // CHECK-NEXT:    [[TMP5385:%.*]] = load double, double* [[DD]], align 8
22247 // CHECK-NEXT:    [[TMP5386:%.*]] = bitcast double* [[DX]] to i64*
22248 // CHECK-NEXT:    [[TMP5387:%.*]] = bitcast double [[TMP5384]] to i64
22249 // CHECK-NEXT:    [[TMP5388:%.*]] = bitcast double [[TMP5385]] to i64
22250 // CHECK-NEXT:    [[TMP5389:%.*]] = cmpxchg i64* [[TMP5386]], i64 [[TMP5387]], i64 [[TMP5388]] monotonic monotonic, align 8
22251 // CHECK-NEXT:    [[TMP5390:%.*]] = extractvalue { i64, i1 } [[TMP5389]], 0
22252 // CHECK-NEXT:    [[TMP5391:%.*]] = bitcast i64 [[TMP5390]] to double
22253 // CHECK-NEXT:    store double [[TMP5391]], double* [[DV]], align 8
22254 // CHECK-NEXT:    [[TMP5392:%.*]] = load double, double* [[DE]], align 8
22255 // CHECK-NEXT:    [[TMP5393:%.*]] = load double, double* [[DD]], align 8
22256 // CHECK-NEXT:    [[TMP5394:%.*]] = bitcast double* [[DX]] to i64*
22257 // CHECK-NEXT:    [[TMP5395:%.*]] = bitcast double [[TMP5392]] to i64
22258 // CHECK-NEXT:    [[TMP5396:%.*]] = bitcast double [[TMP5393]] to i64
22259 // CHECK-NEXT:    [[TMP5397:%.*]] = cmpxchg i64* [[TMP5394]], i64 [[TMP5395]], i64 [[TMP5396]] monotonic monotonic, align 8
22260 // CHECK-NEXT:    [[TMP5398:%.*]] = extractvalue { i64, i1 } [[TMP5397]], 0
22261 // CHECK-NEXT:    [[TMP5399:%.*]] = bitcast i64 [[TMP5398]] to double
22262 // CHECK-NEXT:    store double [[TMP5399]], double* [[DV]], align 8
22263 // CHECK-NEXT:    [[TMP5400:%.*]] = load double, double* [[DE]], align 8
22264 // CHECK-NEXT:    [[TMP5401:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5400]] monotonic, align 8
22265 // CHECK-NEXT:    [[TMP5402:%.*]] = fcmp ogt double [[TMP5401]], [[TMP5400]]
22266 // CHECK-NEXT:    [[TMP5403:%.*]] = select i1 [[TMP5402]], double [[TMP5400]], double [[TMP5401]]
22267 // CHECK-NEXT:    store double [[TMP5403]], double* [[DV]], align 8
22268 // CHECK-NEXT:    [[TMP5404:%.*]] = load double, double* [[DE]], align 8
22269 // CHECK-NEXT:    [[TMP5405:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5404]] monotonic, align 8
22270 // CHECK-NEXT:    [[TMP5406:%.*]] = fcmp olt double [[TMP5405]], [[TMP5404]]
22271 // CHECK-NEXT:    [[TMP5407:%.*]] = select i1 [[TMP5406]], double [[TMP5404]], double [[TMP5405]]
22272 // CHECK-NEXT:    store double [[TMP5407]], double* [[DV]], align 8
22273 // CHECK-NEXT:    [[TMP5408:%.*]] = load double, double* [[DE]], align 8
22274 // CHECK-NEXT:    [[TMP5409:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5408]] monotonic, align 8
22275 // CHECK-NEXT:    [[TMP5410:%.*]] = fcmp olt double [[TMP5409]], [[TMP5408]]
22276 // CHECK-NEXT:    [[TMP5411:%.*]] = select i1 [[TMP5410]], double [[TMP5408]], double [[TMP5409]]
22277 // CHECK-NEXT:    store double [[TMP5411]], double* [[DV]], align 8
22278 // CHECK-NEXT:    [[TMP5412:%.*]] = load double, double* [[DE]], align 8
22279 // CHECK-NEXT:    [[TMP5413:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5412]] monotonic, align 8
22280 // CHECK-NEXT:    [[TMP5414:%.*]] = fcmp ogt double [[TMP5413]], [[TMP5412]]
22281 // CHECK-NEXT:    [[TMP5415:%.*]] = select i1 [[TMP5414]], double [[TMP5412]], double [[TMP5413]]
22282 // CHECK-NEXT:    store double [[TMP5415]], double* [[DV]], align 8
22283 // CHECK-NEXT:    [[TMP5416:%.*]] = load double, double* [[DE]], align 8
22284 // CHECK-NEXT:    [[TMP5417:%.*]] = load double, double* [[DD]], align 8
22285 // CHECK-NEXT:    [[TMP5418:%.*]] = bitcast double* [[DX]] to i64*
22286 // CHECK-NEXT:    [[TMP5419:%.*]] = bitcast double [[TMP5416]] to i64
22287 // CHECK-NEXT:    [[TMP5420:%.*]] = bitcast double [[TMP5417]] to i64
22288 // CHECK-NEXT:    [[TMP5421:%.*]] = cmpxchg i64* [[TMP5418]], i64 [[TMP5419]], i64 [[TMP5420]] monotonic monotonic, align 8
22289 // CHECK-NEXT:    [[TMP5422:%.*]] = extractvalue { i64, i1 } [[TMP5421]], 0
22290 // CHECK-NEXT:    [[TMP5423:%.*]] = bitcast i64 [[TMP5422]] to double
22291 // CHECK-NEXT:    [[TMP5424:%.*]] = extractvalue { i64, i1 } [[TMP5421]], 1
22292 // CHECK-NEXT:    [[TMP5425:%.*]] = select i1 [[TMP5424]], double [[TMP5416]], double [[TMP5423]]
22293 // CHECK-NEXT:    store double [[TMP5425]], double* [[DV]], align 8
22294 // CHECK-NEXT:    [[TMP5426:%.*]] = load double, double* [[DE]], align 8
22295 // CHECK-NEXT:    [[TMP5427:%.*]] = load double, double* [[DD]], align 8
22296 // CHECK-NEXT:    [[TMP5428:%.*]] = bitcast double* [[DX]] to i64*
22297 // CHECK-NEXT:    [[TMP5429:%.*]] = bitcast double [[TMP5426]] to i64
22298 // CHECK-NEXT:    [[TMP5430:%.*]] = bitcast double [[TMP5427]] to i64
22299 // CHECK-NEXT:    [[TMP5431:%.*]] = cmpxchg i64* [[TMP5428]], i64 [[TMP5429]], i64 [[TMP5430]] monotonic monotonic, align 8
22300 // CHECK-NEXT:    [[TMP5432:%.*]] = extractvalue { i64, i1 } [[TMP5431]], 0
22301 // CHECK-NEXT:    [[TMP5433:%.*]] = bitcast i64 [[TMP5432]] to double
22302 // CHECK-NEXT:    [[TMP5434:%.*]] = extractvalue { i64, i1 } [[TMP5431]], 1
22303 // CHECK-NEXT:    [[TMP5435:%.*]] = select i1 [[TMP5434]], double [[TMP5426]], double [[TMP5433]]
22304 // CHECK-NEXT:    store double [[TMP5435]], double* [[DV]], align 8
22305 // CHECK-NEXT:    [[TMP5436:%.*]] = load double, double* [[DE]], align 8
22306 // CHECK-NEXT:    [[TMP5437:%.*]] = load double, double* [[DD]], align 8
22307 // CHECK-NEXT:    [[TMP5438:%.*]] = bitcast double* [[DX]] to i64*
22308 // CHECK-NEXT:    [[TMP5439:%.*]] = bitcast double [[TMP5436]] to i64
22309 // CHECK-NEXT:    [[TMP5440:%.*]] = bitcast double [[TMP5437]] to i64
22310 // CHECK-NEXT:    [[TMP5441:%.*]] = cmpxchg i64* [[TMP5438]], i64 [[TMP5439]], i64 [[TMP5440]] monotonic monotonic, align 8
22311 // CHECK-NEXT:    [[TMP5442:%.*]] = extractvalue { i64, i1 } [[TMP5441]], 0
22312 // CHECK-NEXT:    [[TMP5443:%.*]] = bitcast i64 [[TMP5442]] to double
22313 // CHECK-NEXT:    [[TMP5444:%.*]] = extractvalue { i64, i1 } [[TMP5441]], 1
22314 // CHECK-NEXT:    br i1 [[TMP5444]], label [[DX_ATOMIC_EXIT:%.*]], label [[DX_ATOMIC_CONT:%.*]]
22315 // CHECK:       dx.atomic.cont:
22316 // CHECK-NEXT:    store double [[TMP5443]], double* [[DV]], align 8
22317 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT]]
22318 // CHECK:       dx.atomic.exit:
22319 // CHECK-NEXT:    [[TMP5445:%.*]] = load double, double* [[DE]], align 8
22320 // CHECK-NEXT:    [[TMP5446:%.*]] = load double, double* [[DD]], align 8
22321 // CHECK-NEXT:    [[TMP5447:%.*]] = bitcast double* [[DX]] to i64*
22322 // CHECK-NEXT:    [[TMP5448:%.*]] = bitcast double [[TMP5445]] to i64
22323 // CHECK-NEXT:    [[TMP5449:%.*]] = bitcast double [[TMP5446]] to i64
22324 // CHECK-NEXT:    [[TMP5450:%.*]] = cmpxchg i64* [[TMP5447]], i64 [[TMP5448]], i64 [[TMP5449]] monotonic monotonic, align 8
22325 // CHECK-NEXT:    [[TMP5451:%.*]] = extractvalue { i64, i1 } [[TMP5450]], 0
22326 // CHECK-NEXT:    [[TMP5452:%.*]] = bitcast i64 [[TMP5451]] to double
22327 // CHECK-NEXT:    [[TMP5453:%.*]] = extractvalue { i64, i1 } [[TMP5450]], 1
22328 // CHECK-NEXT:    br i1 [[TMP5453]], label [[DX_ATOMIC_EXIT507:%.*]], label [[DX_ATOMIC_CONT508:%.*]]
22329 // CHECK:       dx.atomic.cont508:
22330 // CHECK-NEXT:    store double [[TMP5452]], double* [[DV]], align 8
22331 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT507]]
22332 // CHECK:       dx.atomic.exit507:
22333 // CHECK-NEXT:    [[TMP5454:%.*]] = load double, double* [[DE]], align 8
22334 // CHECK-NEXT:    [[TMP5455:%.*]] = load double, double* [[DD]], align 8
22335 // CHECK-NEXT:    [[TMP5456:%.*]] = bitcast double* [[DX]] to i64*
22336 // CHECK-NEXT:    [[TMP5457:%.*]] = bitcast double [[TMP5454]] to i64
22337 // CHECK-NEXT:    [[TMP5458:%.*]] = bitcast double [[TMP5455]] to i64
22338 // CHECK-NEXT:    [[TMP5459:%.*]] = cmpxchg i64* [[TMP5456]], i64 [[TMP5457]], i64 [[TMP5458]] monotonic monotonic, align 8
22339 // CHECK-NEXT:    [[TMP5460:%.*]] = extractvalue { i64, i1 } [[TMP5459]], 1
22340 // CHECK-NEXT:    [[TMP5461:%.*]] = sext i1 [[TMP5460]] to i32
22341 // CHECK-NEXT:    store i32 [[TMP5461]], i32* [[IR]], align 4
22342 // CHECK-NEXT:    [[TMP5462:%.*]] = load double, double* [[DE]], align 8
22343 // CHECK-NEXT:    [[TMP5463:%.*]] = load double, double* [[DD]], align 8
22344 // CHECK-NEXT:    [[TMP5464:%.*]] = bitcast double* [[DX]] to i64*
22345 // CHECK-NEXT:    [[TMP5465:%.*]] = bitcast double [[TMP5462]] to i64
22346 // CHECK-NEXT:    [[TMP5466:%.*]] = bitcast double [[TMP5463]] to i64
22347 // CHECK-NEXT:    [[TMP5467:%.*]] = cmpxchg i64* [[TMP5464]], i64 [[TMP5465]], i64 [[TMP5466]] monotonic monotonic, align 8
22348 // CHECK-NEXT:    [[TMP5468:%.*]] = extractvalue { i64, i1 } [[TMP5467]], 1
22349 // CHECK-NEXT:    [[TMP5469:%.*]] = sext i1 [[TMP5468]] to i32
22350 // CHECK-NEXT:    store i32 [[TMP5469]], i32* [[IR]], align 4
22351 // CHECK-NEXT:    [[TMP5470:%.*]] = load double, double* [[DE]], align 8
22352 // CHECK-NEXT:    [[TMP5471:%.*]] = load double, double* [[DD]], align 8
22353 // CHECK-NEXT:    [[TMP5472:%.*]] = bitcast double* [[DX]] to i64*
22354 // CHECK-NEXT:    [[TMP5473:%.*]] = bitcast double [[TMP5470]] to i64
22355 // CHECK-NEXT:    [[TMP5474:%.*]] = bitcast double [[TMP5471]] to i64
22356 // CHECK-NEXT:    [[TMP5475:%.*]] = cmpxchg i64* [[TMP5472]], i64 [[TMP5473]], i64 [[TMP5474]] monotonic monotonic, align 8
22357 // CHECK-NEXT:    [[TMP5476:%.*]] = extractvalue { i64, i1 } [[TMP5475]], 0
22358 // CHECK-NEXT:    [[TMP5477:%.*]] = bitcast i64 [[TMP5476]] to double
22359 // CHECK-NEXT:    [[TMP5478:%.*]] = extractvalue { i64, i1 } [[TMP5475]], 1
22360 // CHECK-NEXT:    br i1 [[TMP5478]], label [[DX_ATOMIC_EXIT509:%.*]], label [[DX_ATOMIC_CONT510:%.*]]
22361 // CHECK:       dx.atomic.cont510:
22362 // CHECK-NEXT:    store double [[TMP5477]], double* [[DV]], align 8
22363 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT509]]
22364 // CHECK:       dx.atomic.exit509:
22365 // CHECK-NEXT:    [[TMP5479:%.*]] = extractvalue { i64, i1 } [[TMP5475]], 1
22366 // CHECK-NEXT:    [[TMP5480:%.*]] = sext i1 [[TMP5479]] to i32
22367 // CHECK-NEXT:    store i32 [[TMP5480]], i32* [[IR]], align 4
22368 // CHECK-NEXT:    [[TMP5481:%.*]] = load double, double* [[DE]], align 8
22369 // CHECK-NEXT:    [[TMP5482:%.*]] = load double, double* [[DD]], align 8
22370 // CHECK-NEXT:    [[TMP5483:%.*]] = bitcast double* [[DX]] to i64*
22371 // CHECK-NEXT:    [[TMP5484:%.*]] = bitcast double [[TMP5481]] to i64
22372 // CHECK-NEXT:    [[TMP5485:%.*]] = bitcast double [[TMP5482]] to i64
22373 // CHECK-NEXT:    [[TMP5486:%.*]] = cmpxchg i64* [[TMP5483]], i64 [[TMP5484]], i64 [[TMP5485]] monotonic monotonic, align 8
22374 // CHECK-NEXT:    [[TMP5487:%.*]] = extractvalue { i64, i1 } [[TMP5486]], 0
22375 // CHECK-NEXT:    [[TMP5488:%.*]] = bitcast i64 [[TMP5487]] to double
22376 // CHECK-NEXT:    [[TMP5489:%.*]] = extractvalue { i64, i1 } [[TMP5486]], 1
22377 // CHECK-NEXT:    br i1 [[TMP5489]], label [[DX_ATOMIC_EXIT511:%.*]], label [[DX_ATOMIC_CONT512:%.*]]
22378 // CHECK:       dx.atomic.cont512:
22379 // CHECK-NEXT:    store double [[TMP5488]], double* [[DV]], align 8
22380 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT511]]
22381 // CHECK:       dx.atomic.exit511:
22382 // CHECK-NEXT:    [[TMP5490:%.*]] = extractvalue { i64, i1 } [[TMP5486]], 1
22383 // CHECK-NEXT:    [[TMP5491:%.*]] = sext i1 [[TMP5490]] to i32
22384 // CHECK-NEXT:    store i32 [[TMP5491]], i32* [[IR]], align 4
22385 // CHECK-NEXT:    [[TMP5492:%.*]] = load double, double* [[DE]], align 8
22386 // CHECK-NEXT:    [[TMP5493:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5492]] acq_rel, align 8
22387 // CHECK-NEXT:    store double [[TMP5493]], double* [[DV]], align 8
22388 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22389 // CHECK-NEXT:    [[TMP5494:%.*]] = load double, double* [[DE]], align 8
22390 // CHECK-NEXT:    [[TMP5495:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5494]] acq_rel, align 8
22391 // CHECK-NEXT:    store double [[TMP5495]], double* [[DV]], align 8
22392 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22393 // CHECK-NEXT:    [[TMP5496:%.*]] = load double, double* [[DE]], align 8
22394 // CHECK-NEXT:    [[TMP5497:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5496]] acq_rel, align 8
22395 // CHECK-NEXT:    store double [[TMP5497]], double* [[DV]], align 8
22396 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22397 // CHECK-NEXT:    [[TMP5498:%.*]] = load double, double* [[DE]], align 8
22398 // CHECK-NEXT:    [[TMP5499:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5498]] acq_rel, align 8
22399 // CHECK-NEXT:    store double [[TMP5499]], double* [[DV]], align 8
22400 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22401 // CHECK-NEXT:    [[TMP5500:%.*]] = load double, double* [[DE]], align 8
22402 // CHECK-NEXT:    [[TMP5501:%.*]] = load double, double* [[DD]], align 8
22403 // CHECK-NEXT:    [[TMP5502:%.*]] = bitcast double* [[DX]] to i64*
22404 // CHECK-NEXT:    [[TMP5503:%.*]] = bitcast double [[TMP5500]] to i64
22405 // CHECK-NEXT:    [[TMP5504:%.*]] = bitcast double [[TMP5501]] to i64
22406 // CHECK-NEXT:    [[TMP5505:%.*]] = cmpxchg i64* [[TMP5502]], i64 [[TMP5503]], i64 [[TMP5504]] acq_rel acquire, align 8
22407 // CHECK-NEXT:    [[TMP5506:%.*]] = extractvalue { i64, i1 } [[TMP5505]], 0
22408 // CHECK-NEXT:    [[TMP5507:%.*]] = bitcast i64 [[TMP5506]] to double
22409 // CHECK-NEXT:    store double [[TMP5507]], double* [[DV]], align 8
22410 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22411 // CHECK-NEXT:    [[TMP5508:%.*]] = load double, double* [[DE]], align 8
22412 // CHECK-NEXT:    [[TMP5509:%.*]] = load double, double* [[DD]], align 8
22413 // CHECK-NEXT:    [[TMP5510:%.*]] = bitcast double* [[DX]] to i64*
22414 // CHECK-NEXT:    [[TMP5511:%.*]] = bitcast double [[TMP5508]] to i64
22415 // CHECK-NEXT:    [[TMP5512:%.*]] = bitcast double [[TMP5509]] to i64
22416 // CHECK-NEXT:    [[TMP5513:%.*]] = cmpxchg i64* [[TMP5510]], i64 [[TMP5511]], i64 [[TMP5512]] acq_rel acquire, align 8
22417 // CHECK-NEXT:    [[TMP5514:%.*]] = extractvalue { i64, i1 } [[TMP5513]], 0
22418 // CHECK-NEXT:    [[TMP5515:%.*]] = bitcast i64 [[TMP5514]] to double
22419 // CHECK-NEXT:    store double [[TMP5515]], double* [[DV]], align 8
22420 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22421 // CHECK-NEXT:    [[TMP5516:%.*]] = load double, double* [[DE]], align 8
22422 // CHECK-NEXT:    [[TMP5517:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5516]] acq_rel, align 8
22423 // CHECK-NEXT:    [[TMP5518:%.*]] = fcmp ogt double [[TMP5517]], [[TMP5516]]
22424 // CHECK-NEXT:    [[TMP5519:%.*]] = select i1 [[TMP5518]], double [[TMP5516]], double [[TMP5517]]
22425 // CHECK-NEXT:    store double [[TMP5519]], double* [[DV]], align 8
22426 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22427 // CHECK-NEXT:    [[TMP5520:%.*]] = load double, double* [[DE]], align 8
22428 // CHECK-NEXT:    [[TMP5521:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5520]] acq_rel, align 8
22429 // CHECK-NEXT:    [[TMP5522:%.*]] = fcmp olt double [[TMP5521]], [[TMP5520]]
22430 // CHECK-NEXT:    [[TMP5523:%.*]] = select i1 [[TMP5522]], double [[TMP5520]], double [[TMP5521]]
22431 // CHECK-NEXT:    store double [[TMP5523]], double* [[DV]], align 8
22432 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22433 // CHECK-NEXT:    [[TMP5524:%.*]] = load double, double* [[DE]], align 8
22434 // CHECK-NEXT:    [[TMP5525:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5524]] acq_rel, align 8
22435 // CHECK-NEXT:    [[TMP5526:%.*]] = fcmp olt double [[TMP5525]], [[TMP5524]]
22436 // CHECK-NEXT:    [[TMP5527:%.*]] = select i1 [[TMP5526]], double [[TMP5524]], double [[TMP5525]]
22437 // CHECK-NEXT:    store double [[TMP5527]], double* [[DV]], align 8
22438 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22439 // CHECK-NEXT:    [[TMP5528:%.*]] = load double, double* [[DE]], align 8
22440 // CHECK-NEXT:    [[TMP5529:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5528]] acq_rel, align 8
22441 // CHECK-NEXT:    [[TMP5530:%.*]] = fcmp ogt double [[TMP5529]], [[TMP5528]]
22442 // CHECK-NEXT:    [[TMP5531:%.*]] = select i1 [[TMP5530]], double [[TMP5528]], double [[TMP5529]]
22443 // CHECK-NEXT:    store double [[TMP5531]], double* [[DV]], align 8
22444 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22445 // CHECK-NEXT:    [[TMP5532:%.*]] = load double, double* [[DE]], align 8
22446 // CHECK-NEXT:    [[TMP5533:%.*]] = load double, double* [[DD]], align 8
22447 // CHECK-NEXT:    [[TMP5534:%.*]] = bitcast double* [[DX]] to i64*
22448 // CHECK-NEXT:    [[TMP5535:%.*]] = bitcast double [[TMP5532]] to i64
22449 // CHECK-NEXT:    [[TMP5536:%.*]] = bitcast double [[TMP5533]] to i64
22450 // CHECK-NEXT:    [[TMP5537:%.*]] = cmpxchg i64* [[TMP5534]], i64 [[TMP5535]], i64 [[TMP5536]] acq_rel acquire, align 8
22451 // CHECK-NEXT:    [[TMP5538:%.*]] = extractvalue { i64, i1 } [[TMP5537]], 0
22452 // CHECK-NEXT:    [[TMP5539:%.*]] = bitcast i64 [[TMP5538]] to double
22453 // CHECK-NEXT:    [[TMP5540:%.*]] = extractvalue { i64, i1 } [[TMP5537]], 1
22454 // CHECK-NEXT:    [[TMP5541:%.*]] = select i1 [[TMP5540]], double [[TMP5532]], double [[TMP5539]]
22455 // CHECK-NEXT:    store double [[TMP5541]], double* [[DV]], align 8
22456 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22457 // CHECK-NEXT:    [[TMP5542:%.*]] = load double, double* [[DE]], align 8
22458 // CHECK-NEXT:    [[TMP5543:%.*]] = load double, double* [[DD]], align 8
22459 // CHECK-NEXT:    [[TMP5544:%.*]] = bitcast double* [[DX]] to i64*
22460 // CHECK-NEXT:    [[TMP5545:%.*]] = bitcast double [[TMP5542]] to i64
22461 // CHECK-NEXT:    [[TMP5546:%.*]] = bitcast double [[TMP5543]] to i64
22462 // CHECK-NEXT:    [[TMP5547:%.*]] = cmpxchg i64* [[TMP5544]], i64 [[TMP5545]], i64 [[TMP5546]] acq_rel acquire, align 8
22463 // CHECK-NEXT:    [[TMP5548:%.*]] = extractvalue { i64, i1 } [[TMP5547]], 0
22464 // CHECK-NEXT:    [[TMP5549:%.*]] = bitcast i64 [[TMP5548]] to double
22465 // CHECK-NEXT:    [[TMP5550:%.*]] = extractvalue { i64, i1 } [[TMP5547]], 1
22466 // CHECK-NEXT:    [[TMP5551:%.*]] = select i1 [[TMP5550]], double [[TMP5542]], double [[TMP5549]]
22467 // CHECK-NEXT:    store double [[TMP5551]], double* [[DV]], align 8
22468 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22469 // CHECK-NEXT:    [[TMP5552:%.*]] = load double, double* [[DE]], align 8
22470 // CHECK-NEXT:    [[TMP5553:%.*]] = load double, double* [[DD]], align 8
22471 // CHECK-NEXT:    [[TMP5554:%.*]] = bitcast double* [[DX]] to i64*
22472 // CHECK-NEXT:    [[TMP5555:%.*]] = bitcast double [[TMP5552]] to i64
22473 // CHECK-NEXT:    [[TMP5556:%.*]] = bitcast double [[TMP5553]] to i64
22474 // CHECK-NEXT:    [[TMP5557:%.*]] = cmpxchg i64* [[TMP5554]], i64 [[TMP5555]], i64 [[TMP5556]] acq_rel acquire, align 8
22475 // CHECK-NEXT:    [[TMP5558:%.*]] = extractvalue { i64, i1 } [[TMP5557]], 0
22476 // CHECK-NEXT:    [[TMP5559:%.*]] = bitcast i64 [[TMP5558]] to double
22477 // CHECK-NEXT:    [[TMP5560:%.*]] = extractvalue { i64, i1 } [[TMP5557]], 1
22478 // CHECK-NEXT:    br i1 [[TMP5560]], label [[DX_ATOMIC_EXIT513:%.*]], label [[DX_ATOMIC_CONT514:%.*]]
22479 // CHECK:       dx.atomic.cont514:
22480 // CHECK-NEXT:    store double [[TMP5559]], double* [[DV]], align 8
22481 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT513]]
22482 // CHECK:       dx.atomic.exit513:
22483 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22484 // CHECK-NEXT:    [[TMP5561:%.*]] = load double, double* [[DE]], align 8
22485 // CHECK-NEXT:    [[TMP5562:%.*]] = load double, double* [[DD]], align 8
22486 // CHECK-NEXT:    [[TMP5563:%.*]] = bitcast double* [[DX]] to i64*
22487 // CHECK-NEXT:    [[TMP5564:%.*]] = bitcast double [[TMP5561]] to i64
22488 // CHECK-NEXT:    [[TMP5565:%.*]] = bitcast double [[TMP5562]] to i64
22489 // CHECK-NEXT:    [[TMP5566:%.*]] = cmpxchg i64* [[TMP5563]], i64 [[TMP5564]], i64 [[TMP5565]] acq_rel acquire, align 8
22490 // CHECK-NEXT:    [[TMP5567:%.*]] = extractvalue { i64, i1 } [[TMP5566]], 0
22491 // CHECK-NEXT:    [[TMP5568:%.*]] = bitcast i64 [[TMP5567]] to double
22492 // CHECK-NEXT:    [[TMP5569:%.*]] = extractvalue { i64, i1 } [[TMP5566]], 1
22493 // CHECK-NEXT:    br i1 [[TMP5569]], label [[DX_ATOMIC_EXIT515:%.*]], label [[DX_ATOMIC_CONT516:%.*]]
22494 // CHECK:       dx.atomic.cont516:
22495 // CHECK-NEXT:    store double [[TMP5568]], double* [[DV]], align 8
22496 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT515]]
22497 // CHECK:       dx.atomic.exit515:
22498 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22499 // CHECK-NEXT:    [[TMP5570:%.*]] = load double, double* [[DE]], align 8
22500 // CHECK-NEXT:    [[TMP5571:%.*]] = load double, double* [[DD]], align 8
22501 // CHECK-NEXT:    [[TMP5572:%.*]] = bitcast double* [[DX]] to i64*
22502 // CHECK-NEXT:    [[TMP5573:%.*]] = bitcast double [[TMP5570]] to i64
22503 // CHECK-NEXT:    [[TMP5574:%.*]] = bitcast double [[TMP5571]] to i64
22504 // CHECK-NEXT:    [[TMP5575:%.*]] = cmpxchg i64* [[TMP5572]], i64 [[TMP5573]], i64 [[TMP5574]] acq_rel acquire, align 8
22505 // CHECK-NEXT:    [[TMP5576:%.*]] = extractvalue { i64, i1 } [[TMP5575]], 1
22506 // CHECK-NEXT:    [[TMP5577:%.*]] = sext i1 [[TMP5576]] to i32
22507 // CHECK-NEXT:    store i32 [[TMP5577]], i32* [[IR]], align 4
22508 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22509 // CHECK-NEXT:    [[TMP5578:%.*]] = load double, double* [[DE]], align 8
22510 // CHECK-NEXT:    [[TMP5579:%.*]] = load double, double* [[DD]], align 8
22511 // CHECK-NEXT:    [[TMP5580:%.*]] = bitcast double* [[DX]] to i64*
22512 // CHECK-NEXT:    [[TMP5581:%.*]] = bitcast double [[TMP5578]] to i64
22513 // CHECK-NEXT:    [[TMP5582:%.*]] = bitcast double [[TMP5579]] to i64
22514 // CHECK-NEXT:    [[TMP5583:%.*]] = cmpxchg i64* [[TMP5580]], i64 [[TMP5581]], i64 [[TMP5582]] acq_rel acquire, align 8
22515 // CHECK-NEXT:    [[TMP5584:%.*]] = extractvalue { i64, i1 } [[TMP5583]], 1
22516 // CHECK-NEXT:    [[TMP5585:%.*]] = sext i1 [[TMP5584]] to i32
22517 // CHECK-NEXT:    store i32 [[TMP5585]], i32* [[IR]], align 4
22518 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22519 // CHECK-NEXT:    [[TMP5586:%.*]] = load double, double* [[DE]], align 8
22520 // CHECK-NEXT:    [[TMP5587:%.*]] = load double, double* [[DD]], align 8
22521 // CHECK-NEXT:    [[TMP5588:%.*]] = bitcast double* [[DX]] to i64*
22522 // CHECK-NEXT:    [[TMP5589:%.*]] = bitcast double [[TMP5586]] to i64
22523 // CHECK-NEXT:    [[TMP5590:%.*]] = bitcast double [[TMP5587]] to i64
22524 // CHECK-NEXT:    [[TMP5591:%.*]] = cmpxchg i64* [[TMP5588]], i64 [[TMP5589]], i64 [[TMP5590]] acq_rel acquire, align 8
22525 // CHECK-NEXT:    [[TMP5592:%.*]] = extractvalue { i64, i1 } [[TMP5591]], 0
22526 // CHECK-NEXT:    [[TMP5593:%.*]] = bitcast i64 [[TMP5592]] to double
22527 // CHECK-NEXT:    [[TMP5594:%.*]] = extractvalue { i64, i1 } [[TMP5591]], 1
22528 // CHECK-NEXT:    br i1 [[TMP5594]], label [[DX_ATOMIC_EXIT517:%.*]], label [[DX_ATOMIC_CONT518:%.*]]
22529 // CHECK:       dx.atomic.cont518:
22530 // CHECK-NEXT:    store double [[TMP5593]], double* [[DV]], align 8
22531 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT517]]
22532 // CHECK:       dx.atomic.exit517:
22533 // CHECK-NEXT:    [[TMP5595:%.*]] = extractvalue { i64, i1 } [[TMP5591]], 1
22534 // CHECK-NEXT:    [[TMP5596:%.*]] = sext i1 [[TMP5595]] to i32
22535 // CHECK-NEXT:    store i32 [[TMP5596]], i32* [[IR]], align 4
22536 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22537 // CHECK-NEXT:    [[TMP5597:%.*]] = load double, double* [[DE]], align 8
22538 // CHECK-NEXT:    [[TMP5598:%.*]] = load double, double* [[DD]], align 8
22539 // CHECK-NEXT:    [[TMP5599:%.*]] = bitcast double* [[DX]] to i64*
22540 // CHECK-NEXT:    [[TMP5600:%.*]] = bitcast double [[TMP5597]] to i64
22541 // CHECK-NEXT:    [[TMP5601:%.*]] = bitcast double [[TMP5598]] to i64
22542 // CHECK-NEXT:    [[TMP5602:%.*]] = cmpxchg i64* [[TMP5599]], i64 [[TMP5600]], i64 [[TMP5601]] acq_rel acquire, align 8
22543 // CHECK-NEXT:    [[TMP5603:%.*]] = extractvalue { i64, i1 } [[TMP5602]], 0
22544 // CHECK-NEXT:    [[TMP5604:%.*]] = bitcast i64 [[TMP5603]] to double
22545 // CHECK-NEXT:    [[TMP5605:%.*]] = extractvalue { i64, i1 } [[TMP5602]], 1
22546 // CHECK-NEXT:    br i1 [[TMP5605]], label [[DX_ATOMIC_EXIT519:%.*]], label [[DX_ATOMIC_CONT520:%.*]]
22547 // CHECK:       dx.atomic.cont520:
22548 // CHECK-NEXT:    store double [[TMP5604]], double* [[DV]], align 8
22549 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT519]]
22550 // CHECK:       dx.atomic.exit519:
22551 // CHECK-NEXT:    [[TMP5606:%.*]] = extractvalue { i64, i1 } [[TMP5602]], 1
22552 // CHECK-NEXT:    [[TMP5607:%.*]] = sext i1 [[TMP5606]] to i32
22553 // CHECK-NEXT:    store i32 [[TMP5607]], i32* [[IR]], align 4
22554 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22555 // CHECK-NEXT:    [[TMP5608:%.*]] = load double, double* [[DE]], align 8
22556 // CHECK-NEXT:    [[TMP5609:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5608]] acquire, align 8
22557 // CHECK-NEXT:    store double [[TMP5609]], double* [[DV]], align 8
22558 // CHECK-NEXT:    [[TMP5610:%.*]] = load double, double* [[DE]], align 8
22559 // CHECK-NEXT:    [[TMP5611:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5610]] acquire, align 8
22560 // CHECK-NEXT:    store double [[TMP5611]], double* [[DV]], align 8
22561 // CHECK-NEXT:    [[TMP5612:%.*]] = load double, double* [[DE]], align 8
22562 // CHECK-NEXT:    [[TMP5613:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5612]] acquire, align 8
22563 // CHECK-NEXT:    store double [[TMP5613]], double* [[DV]], align 8
22564 // CHECK-NEXT:    [[TMP5614:%.*]] = load double, double* [[DE]], align 8
22565 // CHECK-NEXT:    [[TMP5615:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5614]] acquire, align 8
22566 // CHECK-NEXT:    store double [[TMP5615]], double* [[DV]], align 8
22567 // CHECK-NEXT:    [[TMP5616:%.*]] = load double, double* [[DE]], align 8
22568 // CHECK-NEXT:    [[TMP5617:%.*]] = load double, double* [[DD]], align 8
22569 // CHECK-NEXT:    [[TMP5618:%.*]] = bitcast double* [[DX]] to i64*
22570 // CHECK-NEXT:    [[TMP5619:%.*]] = bitcast double [[TMP5616]] to i64
22571 // CHECK-NEXT:    [[TMP5620:%.*]] = bitcast double [[TMP5617]] to i64
22572 // CHECK-NEXT:    [[TMP5621:%.*]] = cmpxchg i64* [[TMP5618]], i64 [[TMP5619]], i64 [[TMP5620]] acquire acquire, align 8
22573 // CHECK-NEXT:    [[TMP5622:%.*]] = extractvalue { i64, i1 } [[TMP5621]], 0
22574 // CHECK-NEXT:    [[TMP5623:%.*]] = bitcast i64 [[TMP5622]] to double
22575 // CHECK-NEXT:    store double [[TMP5623]], double* [[DV]], align 8
22576 // CHECK-NEXT:    [[TMP5624:%.*]] = load double, double* [[DE]], align 8
22577 // CHECK-NEXT:    [[TMP5625:%.*]] = load double, double* [[DD]], align 8
22578 // CHECK-NEXT:    [[TMP5626:%.*]] = bitcast double* [[DX]] to i64*
22579 // CHECK-NEXT:    [[TMP5627:%.*]] = bitcast double [[TMP5624]] to i64
22580 // CHECK-NEXT:    [[TMP5628:%.*]] = bitcast double [[TMP5625]] to i64
22581 // CHECK-NEXT:    [[TMP5629:%.*]] = cmpxchg i64* [[TMP5626]], i64 [[TMP5627]], i64 [[TMP5628]] acquire acquire, align 8
22582 // CHECK-NEXT:    [[TMP5630:%.*]] = extractvalue { i64, i1 } [[TMP5629]], 0
22583 // CHECK-NEXT:    [[TMP5631:%.*]] = bitcast i64 [[TMP5630]] to double
22584 // CHECK-NEXT:    store double [[TMP5631]], double* [[DV]], align 8
22585 // CHECK-NEXT:    [[TMP5632:%.*]] = load double, double* [[DE]], align 8
22586 // CHECK-NEXT:    [[TMP5633:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5632]] acquire, align 8
22587 // CHECK-NEXT:    [[TMP5634:%.*]] = fcmp ogt double [[TMP5633]], [[TMP5632]]
22588 // CHECK-NEXT:    [[TMP5635:%.*]] = select i1 [[TMP5634]], double [[TMP5632]], double [[TMP5633]]
22589 // CHECK-NEXT:    store double [[TMP5635]], double* [[DV]], align 8
22590 // CHECK-NEXT:    [[TMP5636:%.*]] = load double, double* [[DE]], align 8
22591 // CHECK-NEXT:    [[TMP5637:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5636]] acquire, align 8
22592 // CHECK-NEXT:    [[TMP5638:%.*]] = fcmp olt double [[TMP5637]], [[TMP5636]]
22593 // CHECK-NEXT:    [[TMP5639:%.*]] = select i1 [[TMP5638]], double [[TMP5636]], double [[TMP5637]]
22594 // CHECK-NEXT:    store double [[TMP5639]], double* [[DV]], align 8
22595 // CHECK-NEXT:    [[TMP5640:%.*]] = load double, double* [[DE]], align 8
22596 // CHECK-NEXT:    [[TMP5641:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5640]] acquire, align 8
22597 // CHECK-NEXT:    [[TMP5642:%.*]] = fcmp olt double [[TMP5641]], [[TMP5640]]
22598 // CHECK-NEXT:    [[TMP5643:%.*]] = select i1 [[TMP5642]], double [[TMP5640]], double [[TMP5641]]
22599 // CHECK-NEXT:    store double [[TMP5643]], double* [[DV]], align 8
22600 // CHECK-NEXT:    [[TMP5644:%.*]] = load double, double* [[DE]], align 8
22601 // CHECK-NEXT:    [[TMP5645:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5644]] acquire, align 8
22602 // CHECK-NEXT:    [[TMP5646:%.*]] = fcmp ogt double [[TMP5645]], [[TMP5644]]
22603 // CHECK-NEXT:    [[TMP5647:%.*]] = select i1 [[TMP5646]], double [[TMP5644]], double [[TMP5645]]
22604 // CHECK-NEXT:    store double [[TMP5647]], double* [[DV]], align 8
22605 // CHECK-NEXT:    [[TMP5648:%.*]] = load double, double* [[DE]], align 8
22606 // CHECK-NEXT:    [[TMP5649:%.*]] = load double, double* [[DD]], align 8
22607 // CHECK-NEXT:    [[TMP5650:%.*]] = bitcast double* [[DX]] to i64*
22608 // CHECK-NEXT:    [[TMP5651:%.*]] = bitcast double [[TMP5648]] to i64
22609 // CHECK-NEXT:    [[TMP5652:%.*]] = bitcast double [[TMP5649]] to i64
22610 // CHECK-NEXT:    [[TMP5653:%.*]] = cmpxchg i64* [[TMP5650]], i64 [[TMP5651]], i64 [[TMP5652]] acquire acquire, align 8
22611 // CHECK-NEXT:    [[TMP5654:%.*]] = extractvalue { i64, i1 } [[TMP5653]], 0
22612 // CHECK-NEXT:    [[TMP5655:%.*]] = bitcast i64 [[TMP5654]] to double
22613 // CHECK-NEXT:    [[TMP5656:%.*]] = extractvalue { i64, i1 } [[TMP5653]], 1
22614 // CHECK-NEXT:    [[TMP5657:%.*]] = select i1 [[TMP5656]], double [[TMP5648]], double [[TMP5655]]
22615 // CHECK-NEXT:    store double [[TMP5657]], double* [[DV]], align 8
22616 // CHECK-NEXT:    [[TMP5658:%.*]] = load double, double* [[DE]], align 8
22617 // CHECK-NEXT:    [[TMP5659:%.*]] = load double, double* [[DD]], align 8
22618 // CHECK-NEXT:    [[TMP5660:%.*]] = bitcast double* [[DX]] to i64*
22619 // CHECK-NEXT:    [[TMP5661:%.*]] = bitcast double [[TMP5658]] to i64
22620 // CHECK-NEXT:    [[TMP5662:%.*]] = bitcast double [[TMP5659]] to i64
22621 // CHECK-NEXT:    [[TMP5663:%.*]] = cmpxchg i64* [[TMP5660]], i64 [[TMP5661]], i64 [[TMP5662]] acquire acquire, align 8
22622 // CHECK-NEXT:    [[TMP5664:%.*]] = extractvalue { i64, i1 } [[TMP5663]], 0
22623 // CHECK-NEXT:    [[TMP5665:%.*]] = bitcast i64 [[TMP5664]] to double
22624 // CHECK-NEXT:    [[TMP5666:%.*]] = extractvalue { i64, i1 } [[TMP5663]], 1
22625 // CHECK-NEXT:    [[TMP5667:%.*]] = select i1 [[TMP5666]], double [[TMP5658]], double [[TMP5665]]
22626 // CHECK-NEXT:    store double [[TMP5667]], double* [[DV]], align 8
22627 // CHECK-NEXT:    [[TMP5668:%.*]] = load double, double* [[DE]], align 8
22628 // CHECK-NEXT:    [[TMP5669:%.*]] = load double, double* [[DD]], align 8
22629 // CHECK-NEXT:    [[TMP5670:%.*]] = bitcast double* [[DX]] to i64*
22630 // CHECK-NEXT:    [[TMP5671:%.*]] = bitcast double [[TMP5668]] to i64
22631 // CHECK-NEXT:    [[TMP5672:%.*]] = bitcast double [[TMP5669]] to i64
22632 // CHECK-NEXT:    [[TMP5673:%.*]] = cmpxchg i64* [[TMP5670]], i64 [[TMP5671]], i64 [[TMP5672]] acquire acquire, align 8
22633 // CHECK-NEXT:    [[TMP5674:%.*]] = extractvalue { i64, i1 } [[TMP5673]], 0
22634 // CHECK-NEXT:    [[TMP5675:%.*]] = bitcast i64 [[TMP5674]] to double
22635 // CHECK-NEXT:    [[TMP5676:%.*]] = extractvalue { i64, i1 } [[TMP5673]], 1
22636 // CHECK-NEXT:    br i1 [[TMP5676]], label [[DX_ATOMIC_EXIT521:%.*]], label [[DX_ATOMIC_CONT522:%.*]]
22637 // CHECK:       dx.atomic.cont522:
22638 // CHECK-NEXT:    store double [[TMP5675]], double* [[DV]], align 8
22639 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT521]]
22640 // CHECK:       dx.atomic.exit521:
22641 // CHECK-NEXT:    [[TMP5677:%.*]] = load double, double* [[DE]], align 8
22642 // CHECK-NEXT:    [[TMP5678:%.*]] = load double, double* [[DD]], align 8
22643 // CHECK-NEXT:    [[TMP5679:%.*]] = bitcast double* [[DX]] to i64*
22644 // CHECK-NEXT:    [[TMP5680:%.*]] = bitcast double [[TMP5677]] to i64
22645 // CHECK-NEXT:    [[TMP5681:%.*]] = bitcast double [[TMP5678]] to i64
22646 // CHECK-NEXT:    [[TMP5682:%.*]] = cmpxchg i64* [[TMP5679]], i64 [[TMP5680]], i64 [[TMP5681]] acquire acquire, align 8
22647 // CHECK-NEXT:    [[TMP5683:%.*]] = extractvalue { i64, i1 } [[TMP5682]], 0
22648 // CHECK-NEXT:    [[TMP5684:%.*]] = bitcast i64 [[TMP5683]] to double
22649 // CHECK-NEXT:    [[TMP5685:%.*]] = extractvalue { i64, i1 } [[TMP5682]], 1
22650 // CHECK-NEXT:    br i1 [[TMP5685]], label [[DX_ATOMIC_EXIT523:%.*]], label [[DX_ATOMIC_CONT524:%.*]]
22651 // CHECK:       dx.atomic.cont524:
22652 // CHECK-NEXT:    store double [[TMP5684]], double* [[DV]], align 8
22653 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT523]]
22654 // CHECK:       dx.atomic.exit523:
22655 // CHECK-NEXT:    [[TMP5686:%.*]] = load double, double* [[DE]], align 8
22656 // CHECK-NEXT:    [[TMP5687:%.*]] = load double, double* [[DD]], align 8
22657 // CHECK-NEXT:    [[TMP5688:%.*]] = bitcast double* [[DX]] to i64*
22658 // CHECK-NEXT:    [[TMP5689:%.*]] = bitcast double [[TMP5686]] to i64
22659 // CHECK-NEXT:    [[TMP5690:%.*]] = bitcast double [[TMP5687]] to i64
22660 // CHECK-NEXT:    [[TMP5691:%.*]] = cmpxchg i64* [[TMP5688]], i64 [[TMP5689]], i64 [[TMP5690]] acquire acquire, align 8
22661 // CHECK-NEXT:    [[TMP5692:%.*]] = extractvalue { i64, i1 } [[TMP5691]], 1
22662 // CHECK-NEXT:    [[TMP5693:%.*]] = sext i1 [[TMP5692]] to i32
22663 // CHECK-NEXT:    store i32 [[TMP5693]], i32* [[IR]], align 4
22664 // CHECK-NEXT:    [[TMP5694:%.*]] = load double, double* [[DE]], align 8
22665 // CHECK-NEXT:    [[TMP5695:%.*]] = load double, double* [[DD]], align 8
22666 // CHECK-NEXT:    [[TMP5696:%.*]] = bitcast double* [[DX]] to i64*
22667 // CHECK-NEXT:    [[TMP5697:%.*]] = bitcast double [[TMP5694]] to i64
22668 // CHECK-NEXT:    [[TMP5698:%.*]] = bitcast double [[TMP5695]] to i64
22669 // CHECK-NEXT:    [[TMP5699:%.*]] = cmpxchg i64* [[TMP5696]], i64 [[TMP5697]], i64 [[TMP5698]] acquire acquire, align 8
22670 // CHECK-NEXT:    [[TMP5700:%.*]] = extractvalue { i64, i1 } [[TMP5699]], 1
22671 // CHECK-NEXT:    [[TMP5701:%.*]] = sext i1 [[TMP5700]] to i32
22672 // CHECK-NEXT:    store i32 [[TMP5701]], i32* [[IR]], align 4
22673 // CHECK-NEXT:    [[TMP5702:%.*]] = load double, double* [[DE]], align 8
22674 // CHECK-NEXT:    [[TMP5703:%.*]] = load double, double* [[DD]], align 8
22675 // CHECK-NEXT:    [[TMP5704:%.*]] = bitcast double* [[DX]] to i64*
22676 // CHECK-NEXT:    [[TMP5705:%.*]] = bitcast double [[TMP5702]] to i64
22677 // CHECK-NEXT:    [[TMP5706:%.*]] = bitcast double [[TMP5703]] to i64
22678 // CHECK-NEXT:    [[TMP5707:%.*]] = cmpxchg i64* [[TMP5704]], i64 [[TMP5705]], i64 [[TMP5706]] acquire acquire, align 8
22679 // CHECK-NEXT:    [[TMP5708:%.*]] = extractvalue { i64, i1 } [[TMP5707]], 0
22680 // CHECK-NEXT:    [[TMP5709:%.*]] = bitcast i64 [[TMP5708]] to double
22681 // CHECK-NEXT:    [[TMP5710:%.*]] = extractvalue { i64, i1 } [[TMP5707]], 1
22682 // CHECK-NEXT:    br i1 [[TMP5710]], label [[DX_ATOMIC_EXIT525:%.*]], label [[DX_ATOMIC_CONT526:%.*]]
22683 // CHECK:       dx.atomic.cont526:
22684 // CHECK-NEXT:    store double [[TMP5709]], double* [[DV]], align 8
22685 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT525]]
22686 // CHECK:       dx.atomic.exit525:
22687 // CHECK-NEXT:    [[TMP5711:%.*]] = extractvalue { i64, i1 } [[TMP5707]], 1
22688 // CHECK-NEXT:    [[TMP5712:%.*]] = sext i1 [[TMP5711]] to i32
22689 // CHECK-NEXT:    store i32 [[TMP5712]], i32* [[IR]], align 4
22690 // CHECK-NEXT:    [[TMP5713:%.*]] = load double, double* [[DE]], align 8
22691 // CHECK-NEXT:    [[TMP5714:%.*]] = load double, double* [[DD]], align 8
22692 // CHECK-NEXT:    [[TMP5715:%.*]] = bitcast double* [[DX]] to i64*
22693 // CHECK-NEXT:    [[TMP5716:%.*]] = bitcast double [[TMP5713]] to i64
22694 // CHECK-NEXT:    [[TMP5717:%.*]] = bitcast double [[TMP5714]] to i64
22695 // CHECK-NEXT:    [[TMP5718:%.*]] = cmpxchg i64* [[TMP5715]], i64 [[TMP5716]], i64 [[TMP5717]] acquire acquire, align 8
22696 // CHECK-NEXT:    [[TMP5719:%.*]] = extractvalue { i64, i1 } [[TMP5718]], 0
22697 // CHECK-NEXT:    [[TMP5720:%.*]] = bitcast i64 [[TMP5719]] to double
22698 // CHECK-NEXT:    [[TMP5721:%.*]] = extractvalue { i64, i1 } [[TMP5718]], 1
22699 // CHECK-NEXT:    br i1 [[TMP5721]], label [[DX_ATOMIC_EXIT527:%.*]], label [[DX_ATOMIC_CONT528:%.*]]
22700 // CHECK:       dx.atomic.cont528:
22701 // CHECK-NEXT:    store double [[TMP5720]], double* [[DV]], align 8
22702 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT527]]
22703 // CHECK:       dx.atomic.exit527:
22704 // CHECK-NEXT:    [[TMP5722:%.*]] = extractvalue { i64, i1 } [[TMP5718]], 1
22705 // CHECK-NEXT:    [[TMP5723:%.*]] = sext i1 [[TMP5722]] to i32
22706 // CHECK-NEXT:    store i32 [[TMP5723]], i32* [[IR]], align 4
22707 // CHECK-NEXT:    [[TMP5724:%.*]] = load double, double* [[DE]], align 8
22708 // CHECK-NEXT:    [[TMP5725:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5724]] monotonic, align 8
22709 // CHECK-NEXT:    store double [[TMP5725]], double* [[DV]], align 8
22710 // CHECK-NEXT:    [[TMP5726:%.*]] = load double, double* [[DE]], align 8
22711 // CHECK-NEXT:    [[TMP5727:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5726]] monotonic, align 8
22712 // CHECK-NEXT:    store double [[TMP5727]], double* [[DV]], align 8
22713 // CHECK-NEXT:    [[TMP5728:%.*]] = load double, double* [[DE]], align 8
22714 // CHECK-NEXT:    [[TMP5729:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5728]] monotonic, align 8
22715 // CHECK-NEXT:    store double [[TMP5729]], double* [[DV]], align 8
22716 // CHECK-NEXT:    [[TMP5730:%.*]] = load double, double* [[DE]], align 8
22717 // CHECK-NEXT:    [[TMP5731:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5730]] monotonic, align 8
22718 // CHECK-NEXT:    store double [[TMP5731]], double* [[DV]], align 8
22719 // CHECK-NEXT:    [[TMP5732:%.*]] = load double, double* [[DE]], align 8
22720 // CHECK-NEXT:    [[TMP5733:%.*]] = load double, double* [[DD]], align 8
22721 // CHECK-NEXT:    [[TMP5734:%.*]] = bitcast double* [[DX]] to i64*
22722 // CHECK-NEXT:    [[TMP5735:%.*]] = bitcast double [[TMP5732]] to i64
22723 // CHECK-NEXT:    [[TMP5736:%.*]] = bitcast double [[TMP5733]] to i64
22724 // CHECK-NEXT:    [[TMP5737:%.*]] = cmpxchg i64* [[TMP5734]], i64 [[TMP5735]], i64 [[TMP5736]] monotonic monotonic, align 8
22725 // CHECK-NEXT:    [[TMP5738:%.*]] = extractvalue { i64, i1 } [[TMP5737]], 0
22726 // CHECK-NEXT:    [[TMP5739:%.*]] = bitcast i64 [[TMP5738]] to double
22727 // CHECK-NEXT:    store double [[TMP5739]], double* [[DV]], align 8
22728 // CHECK-NEXT:    [[TMP5740:%.*]] = load double, double* [[DE]], align 8
22729 // CHECK-NEXT:    [[TMP5741:%.*]] = load double, double* [[DD]], align 8
22730 // CHECK-NEXT:    [[TMP5742:%.*]] = bitcast double* [[DX]] to i64*
22731 // CHECK-NEXT:    [[TMP5743:%.*]] = bitcast double [[TMP5740]] to i64
22732 // CHECK-NEXT:    [[TMP5744:%.*]] = bitcast double [[TMP5741]] to i64
22733 // CHECK-NEXT:    [[TMP5745:%.*]] = cmpxchg i64* [[TMP5742]], i64 [[TMP5743]], i64 [[TMP5744]] monotonic monotonic, align 8
22734 // CHECK-NEXT:    [[TMP5746:%.*]] = extractvalue { i64, i1 } [[TMP5745]], 0
22735 // CHECK-NEXT:    [[TMP5747:%.*]] = bitcast i64 [[TMP5746]] to double
22736 // CHECK-NEXT:    store double [[TMP5747]], double* [[DV]], align 8
22737 // CHECK-NEXT:    [[TMP5748:%.*]] = load double, double* [[DE]], align 8
22738 // CHECK-NEXT:    [[TMP5749:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5748]] monotonic, align 8
22739 // CHECK-NEXT:    [[TMP5750:%.*]] = fcmp ogt double [[TMP5749]], [[TMP5748]]
22740 // CHECK-NEXT:    [[TMP5751:%.*]] = select i1 [[TMP5750]], double [[TMP5748]], double [[TMP5749]]
22741 // CHECK-NEXT:    store double [[TMP5751]], double* [[DV]], align 8
22742 // CHECK-NEXT:    [[TMP5752:%.*]] = load double, double* [[DE]], align 8
22743 // CHECK-NEXT:    [[TMP5753:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5752]] monotonic, align 8
22744 // CHECK-NEXT:    [[TMP5754:%.*]] = fcmp olt double [[TMP5753]], [[TMP5752]]
22745 // CHECK-NEXT:    [[TMP5755:%.*]] = select i1 [[TMP5754]], double [[TMP5752]], double [[TMP5753]]
22746 // CHECK-NEXT:    store double [[TMP5755]], double* [[DV]], align 8
22747 // CHECK-NEXT:    [[TMP5756:%.*]] = load double, double* [[DE]], align 8
22748 // CHECK-NEXT:    [[TMP5757:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5756]] monotonic, align 8
22749 // CHECK-NEXT:    [[TMP5758:%.*]] = fcmp olt double [[TMP5757]], [[TMP5756]]
22750 // CHECK-NEXT:    [[TMP5759:%.*]] = select i1 [[TMP5758]], double [[TMP5756]], double [[TMP5757]]
22751 // CHECK-NEXT:    store double [[TMP5759]], double* [[DV]], align 8
22752 // CHECK-NEXT:    [[TMP5760:%.*]] = load double, double* [[DE]], align 8
22753 // CHECK-NEXT:    [[TMP5761:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5760]] monotonic, align 8
22754 // CHECK-NEXT:    [[TMP5762:%.*]] = fcmp ogt double [[TMP5761]], [[TMP5760]]
22755 // CHECK-NEXT:    [[TMP5763:%.*]] = select i1 [[TMP5762]], double [[TMP5760]], double [[TMP5761]]
22756 // CHECK-NEXT:    store double [[TMP5763]], double* [[DV]], align 8
22757 // CHECK-NEXT:    [[TMP5764:%.*]] = load double, double* [[DE]], align 8
22758 // CHECK-NEXT:    [[TMP5765:%.*]] = load double, double* [[DD]], align 8
22759 // CHECK-NEXT:    [[TMP5766:%.*]] = bitcast double* [[DX]] to i64*
22760 // CHECK-NEXT:    [[TMP5767:%.*]] = bitcast double [[TMP5764]] to i64
22761 // CHECK-NEXT:    [[TMP5768:%.*]] = bitcast double [[TMP5765]] to i64
22762 // CHECK-NEXT:    [[TMP5769:%.*]] = cmpxchg i64* [[TMP5766]], i64 [[TMP5767]], i64 [[TMP5768]] monotonic monotonic, align 8
22763 // CHECK-NEXT:    [[TMP5770:%.*]] = extractvalue { i64, i1 } [[TMP5769]], 0
22764 // CHECK-NEXT:    [[TMP5771:%.*]] = bitcast i64 [[TMP5770]] to double
22765 // CHECK-NEXT:    [[TMP5772:%.*]] = extractvalue { i64, i1 } [[TMP5769]], 1
22766 // CHECK-NEXT:    [[TMP5773:%.*]] = select i1 [[TMP5772]], double [[TMP5764]], double [[TMP5771]]
22767 // CHECK-NEXT:    store double [[TMP5773]], double* [[DV]], align 8
22768 // CHECK-NEXT:    [[TMP5774:%.*]] = load double, double* [[DE]], align 8
22769 // CHECK-NEXT:    [[TMP5775:%.*]] = load double, double* [[DD]], align 8
22770 // CHECK-NEXT:    [[TMP5776:%.*]] = bitcast double* [[DX]] to i64*
22771 // CHECK-NEXT:    [[TMP5777:%.*]] = bitcast double [[TMP5774]] to i64
22772 // CHECK-NEXT:    [[TMP5778:%.*]] = bitcast double [[TMP5775]] to i64
22773 // CHECK-NEXT:    [[TMP5779:%.*]] = cmpxchg i64* [[TMP5776]], i64 [[TMP5777]], i64 [[TMP5778]] monotonic monotonic, align 8
22774 // CHECK-NEXT:    [[TMP5780:%.*]] = extractvalue { i64, i1 } [[TMP5779]], 0
22775 // CHECK-NEXT:    [[TMP5781:%.*]] = bitcast i64 [[TMP5780]] to double
22776 // CHECK-NEXT:    [[TMP5782:%.*]] = extractvalue { i64, i1 } [[TMP5779]], 1
22777 // CHECK-NEXT:    [[TMP5783:%.*]] = select i1 [[TMP5782]], double [[TMP5774]], double [[TMP5781]]
22778 // CHECK-NEXT:    store double [[TMP5783]], double* [[DV]], align 8
22779 // CHECK-NEXT:    [[TMP5784:%.*]] = load double, double* [[DE]], align 8
22780 // CHECK-NEXT:    [[TMP5785:%.*]] = load double, double* [[DD]], align 8
22781 // CHECK-NEXT:    [[TMP5786:%.*]] = bitcast double* [[DX]] to i64*
22782 // CHECK-NEXT:    [[TMP5787:%.*]] = bitcast double [[TMP5784]] to i64
22783 // CHECK-NEXT:    [[TMP5788:%.*]] = bitcast double [[TMP5785]] to i64
22784 // CHECK-NEXT:    [[TMP5789:%.*]] = cmpxchg i64* [[TMP5786]], i64 [[TMP5787]], i64 [[TMP5788]] monotonic monotonic, align 8
22785 // CHECK-NEXT:    [[TMP5790:%.*]] = extractvalue { i64, i1 } [[TMP5789]], 0
22786 // CHECK-NEXT:    [[TMP5791:%.*]] = bitcast i64 [[TMP5790]] to double
22787 // CHECK-NEXT:    [[TMP5792:%.*]] = extractvalue { i64, i1 } [[TMP5789]], 1
22788 // CHECK-NEXT:    br i1 [[TMP5792]], label [[DX_ATOMIC_EXIT529:%.*]], label [[DX_ATOMIC_CONT530:%.*]]
22789 // CHECK:       dx.atomic.cont530:
22790 // CHECK-NEXT:    store double [[TMP5791]], double* [[DV]], align 8
22791 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT529]]
22792 // CHECK:       dx.atomic.exit529:
22793 // CHECK-NEXT:    [[TMP5793:%.*]] = load double, double* [[DE]], align 8
22794 // CHECK-NEXT:    [[TMP5794:%.*]] = load double, double* [[DD]], align 8
22795 // CHECK-NEXT:    [[TMP5795:%.*]] = bitcast double* [[DX]] to i64*
22796 // CHECK-NEXT:    [[TMP5796:%.*]] = bitcast double [[TMP5793]] to i64
22797 // CHECK-NEXT:    [[TMP5797:%.*]] = bitcast double [[TMP5794]] to i64
22798 // CHECK-NEXT:    [[TMP5798:%.*]] = cmpxchg i64* [[TMP5795]], i64 [[TMP5796]], i64 [[TMP5797]] monotonic monotonic, align 8
22799 // CHECK-NEXT:    [[TMP5799:%.*]] = extractvalue { i64, i1 } [[TMP5798]], 0
22800 // CHECK-NEXT:    [[TMP5800:%.*]] = bitcast i64 [[TMP5799]] to double
22801 // CHECK-NEXT:    [[TMP5801:%.*]] = extractvalue { i64, i1 } [[TMP5798]], 1
22802 // CHECK-NEXT:    br i1 [[TMP5801]], label [[DX_ATOMIC_EXIT531:%.*]], label [[DX_ATOMIC_CONT532:%.*]]
22803 // CHECK:       dx.atomic.cont532:
22804 // CHECK-NEXT:    store double [[TMP5800]], double* [[DV]], align 8
22805 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT531]]
22806 // CHECK:       dx.atomic.exit531:
22807 // CHECK-NEXT:    [[TMP5802:%.*]] = load double, double* [[DE]], align 8
22808 // CHECK-NEXT:    [[TMP5803:%.*]] = load double, double* [[DD]], align 8
22809 // CHECK-NEXT:    [[TMP5804:%.*]] = bitcast double* [[DX]] to i64*
22810 // CHECK-NEXT:    [[TMP5805:%.*]] = bitcast double [[TMP5802]] to i64
22811 // CHECK-NEXT:    [[TMP5806:%.*]] = bitcast double [[TMP5803]] to i64
22812 // CHECK-NEXT:    [[TMP5807:%.*]] = cmpxchg i64* [[TMP5804]], i64 [[TMP5805]], i64 [[TMP5806]] monotonic monotonic, align 8
22813 // CHECK-NEXT:    [[TMP5808:%.*]] = extractvalue { i64, i1 } [[TMP5807]], 1
22814 // CHECK-NEXT:    [[TMP5809:%.*]] = sext i1 [[TMP5808]] to i32
22815 // CHECK-NEXT:    store i32 [[TMP5809]], i32* [[IR]], align 4
22816 // CHECK-NEXT:    [[TMP5810:%.*]] = load double, double* [[DE]], align 8
22817 // CHECK-NEXT:    [[TMP5811:%.*]] = load double, double* [[DD]], align 8
22818 // CHECK-NEXT:    [[TMP5812:%.*]] = bitcast double* [[DX]] to i64*
22819 // CHECK-NEXT:    [[TMP5813:%.*]] = bitcast double [[TMP5810]] to i64
22820 // CHECK-NEXT:    [[TMP5814:%.*]] = bitcast double [[TMP5811]] to i64
22821 // CHECK-NEXT:    [[TMP5815:%.*]] = cmpxchg i64* [[TMP5812]], i64 [[TMP5813]], i64 [[TMP5814]] monotonic monotonic, align 8
22822 // CHECK-NEXT:    [[TMP5816:%.*]] = extractvalue { i64, i1 } [[TMP5815]], 1
22823 // CHECK-NEXT:    [[TMP5817:%.*]] = sext i1 [[TMP5816]] to i32
22824 // CHECK-NEXT:    store i32 [[TMP5817]], i32* [[IR]], align 4
22825 // CHECK-NEXT:    [[TMP5818:%.*]] = load double, double* [[DE]], align 8
22826 // CHECK-NEXT:    [[TMP5819:%.*]] = load double, double* [[DD]], align 8
22827 // CHECK-NEXT:    [[TMP5820:%.*]] = bitcast double* [[DX]] to i64*
22828 // CHECK-NEXT:    [[TMP5821:%.*]] = bitcast double [[TMP5818]] to i64
22829 // CHECK-NEXT:    [[TMP5822:%.*]] = bitcast double [[TMP5819]] to i64
22830 // CHECK-NEXT:    [[TMP5823:%.*]] = cmpxchg i64* [[TMP5820]], i64 [[TMP5821]], i64 [[TMP5822]] monotonic monotonic, align 8
22831 // CHECK-NEXT:    [[TMP5824:%.*]] = extractvalue { i64, i1 } [[TMP5823]], 0
22832 // CHECK-NEXT:    [[TMP5825:%.*]] = bitcast i64 [[TMP5824]] to double
22833 // CHECK-NEXT:    [[TMP5826:%.*]] = extractvalue { i64, i1 } [[TMP5823]], 1
22834 // CHECK-NEXT:    br i1 [[TMP5826]], label [[DX_ATOMIC_EXIT533:%.*]], label [[DX_ATOMIC_CONT534:%.*]]
22835 // CHECK:       dx.atomic.cont534:
22836 // CHECK-NEXT:    store double [[TMP5825]], double* [[DV]], align 8
22837 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT533]]
22838 // CHECK:       dx.atomic.exit533:
22839 // CHECK-NEXT:    [[TMP5827:%.*]] = extractvalue { i64, i1 } [[TMP5823]], 1
22840 // CHECK-NEXT:    [[TMP5828:%.*]] = sext i1 [[TMP5827]] to i32
22841 // CHECK-NEXT:    store i32 [[TMP5828]], i32* [[IR]], align 4
22842 // CHECK-NEXT:    [[TMP5829:%.*]] = load double, double* [[DE]], align 8
22843 // CHECK-NEXT:    [[TMP5830:%.*]] = load double, double* [[DD]], align 8
22844 // CHECK-NEXT:    [[TMP5831:%.*]] = bitcast double* [[DX]] to i64*
22845 // CHECK-NEXT:    [[TMP5832:%.*]] = bitcast double [[TMP5829]] to i64
22846 // CHECK-NEXT:    [[TMP5833:%.*]] = bitcast double [[TMP5830]] to i64
22847 // CHECK-NEXT:    [[TMP5834:%.*]] = cmpxchg i64* [[TMP5831]], i64 [[TMP5832]], i64 [[TMP5833]] monotonic monotonic, align 8
22848 // CHECK-NEXT:    [[TMP5835:%.*]] = extractvalue { i64, i1 } [[TMP5834]], 0
22849 // CHECK-NEXT:    [[TMP5836:%.*]] = bitcast i64 [[TMP5835]] to double
22850 // CHECK-NEXT:    [[TMP5837:%.*]] = extractvalue { i64, i1 } [[TMP5834]], 1
22851 // CHECK-NEXT:    br i1 [[TMP5837]], label [[DX_ATOMIC_EXIT535:%.*]], label [[DX_ATOMIC_CONT536:%.*]]
22852 // CHECK:       dx.atomic.cont536:
22853 // CHECK-NEXT:    store double [[TMP5836]], double* [[DV]], align 8
22854 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT535]]
22855 // CHECK:       dx.atomic.exit535:
22856 // CHECK-NEXT:    [[TMP5838:%.*]] = extractvalue { i64, i1 } [[TMP5834]], 1
22857 // CHECK-NEXT:    [[TMP5839:%.*]] = sext i1 [[TMP5838]] to i32
22858 // CHECK-NEXT:    store i32 [[TMP5839]], i32* [[IR]], align 4
22859 // CHECK-NEXT:    [[TMP5840:%.*]] = load double, double* [[DE]], align 8
22860 // CHECK-NEXT:    [[TMP5841:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5840]] release, align 8
22861 // CHECK-NEXT:    store double [[TMP5841]], double* [[DV]], align 8
22862 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22863 // CHECK-NEXT:    [[TMP5842:%.*]] = load double, double* [[DE]], align 8
22864 // CHECK-NEXT:    [[TMP5843:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5842]] release, align 8
22865 // CHECK-NEXT:    store double [[TMP5843]], double* [[DV]], align 8
22866 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22867 // CHECK-NEXT:    [[TMP5844:%.*]] = load double, double* [[DE]], align 8
22868 // CHECK-NEXT:    [[TMP5845:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5844]] release, align 8
22869 // CHECK-NEXT:    store double [[TMP5845]], double* [[DV]], align 8
22870 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22871 // CHECK-NEXT:    [[TMP5846:%.*]] = load double, double* [[DE]], align 8
22872 // CHECK-NEXT:    [[TMP5847:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5846]] release, align 8
22873 // CHECK-NEXT:    store double [[TMP5847]], double* [[DV]], align 8
22874 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22875 // CHECK-NEXT:    [[TMP5848:%.*]] = load double, double* [[DE]], align 8
22876 // CHECK-NEXT:    [[TMP5849:%.*]] = load double, double* [[DD]], align 8
22877 // CHECK-NEXT:    [[TMP5850:%.*]] = bitcast double* [[DX]] to i64*
22878 // CHECK-NEXT:    [[TMP5851:%.*]] = bitcast double [[TMP5848]] to i64
22879 // CHECK-NEXT:    [[TMP5852:%.*]] = bitcast double [[TMP5849]] to i64
22880 // CHECK-NEXT:    [[TMP5853:%.*]] = cmpxchg i64* [[TMP5850]], i64 [[TMP5851]], i64 [[TMP5852]] release monotonic, align 8
22881 // CHECK-NEXT:    [[TMP5854:%.*]] = extractvalue { i64, i1 } [[TMP5853]], 0
22882 // CHECK-NEXT:    [[TMP5855:%.*]] = bitcast i64 [[TMP5854]] to double
22883 // CHECK-NEXT:    store double [[TMP5855]], double* [[DV]], align 8
22884 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22885 // CHECK-NEXT:    [[TMP5856:%.*]] = load double, double* [[DE]], align 8
22886 // CHECK-NEXT:    [[TMP5857:%.*]] = load double, double* [[DD]], align 8
22887 // CHECK-NEXT:    [[TMP5858:%.*]] = bitcast double* [[DX]] to i64*
22888 // CHECK-NEXT:    [[TMP5859:%.*]] = bitcast double [[TMP5856]] to i64
22889 // CHECK-NEXT:    [[TMP5860:%.*]] = bitcast double [[TMP5857]] to i64
22890 // CHECK-NEXT:    [[TMP5861:%.*]] = cmpxchg i64* [[TMP5858]], i64 [[TMP5859]], i64 [[TMP5860]] release monotonic, align 8
22891 // CHECK-NEXT:    [[TMP5862:%.*]] = extractvalue { i64, i1 } [[TMP5861]], 0
22892 // CHECK-NEXT:    [[TMP5863:%.*]] = bitcast i64 [[TMP5862]] to double
22893 // CHECK-NEXT:    store double [[TMP5863]], double* [[DV]], align 8
22894 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22895 // CHECK-NEXT:    [[TMP5864:%.*]] = load double, double* [[DE]], align 8
22896 // CHECK-NEXT:    [[TMP5865:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5864]] release, align 8
22897 // CHECK-NEXT:    [[TMP5866:%.*]] = fcmp ogt double [[TMP5865]], [[TMP5864]]
22898 // CHECK-NEXT:    [[TMP5867:%.*]] = select i1 [[TMP5866]], double [[TMP5864]], double [[TMP5865]]
22899 // CHECK-NEXT:    store double [[TMP5867]], double* [[DV]], align 8
22900 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22901 // CHECK-NEXT:    [[TMP5868:%.*]] = load double, double* [[DE]], align 8
22902 // CHECK-NEXT:    [[TMP5869:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5868]] release, align 8
22903 // CHECK-NEXT:    [[TMP5870:%.*]] = fcmp olt double [[TMP5869]], [[TMP5868]]
22904 // CHECK-NEXT:    [[TMP5871:%.*]] = select i1 [[TMP5870]], double [[TMP5868]], double [[TMP5869]]
22905 // CHECK-NEXT:    store double [[TMP5871]], double* [[DV]], align 8
22906 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22907 // CHECK-NEXT:    [[TMP5872:%.*]] = load double, double* [[DE]], align 8
22908 // CHECK-NEXT:    [[TMP5873:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5872]] release, align 8
22909 // CHECK-NEXT:    [[TMP5874:%.*]] = fcmp olt double [[TMP5873]], [[TMP5872]]
22910 // CHECK-NEXT:    [[TMP5875:%.*]] = select i1 [[TMP5874]], double [[TMP5872]], double [[TMP5873]]
22911 // CHECK-NEXT:    store double [[TMP5875]], double* [[DV]], align 8
22912 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22913 // CHECK-NEXT:    [[TMP5876:%.*]] = load double, double* [[DE]], align 8
22914 // CHECK-NEXT:    [[TMP5877:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5876]] release, align 8
22915 // CHECK-NEXT:    [[TMP5878:%.*]] = fcmp ogt double [[TMP5877]], [[TMP5876]]
22916 // CHECK-NEXT:    [[TMP5879:%.*]] = select i1 [[TMP5878]], double [[TMP5876]], double [[TMP5877]]
22917 // CHECK-NEXT:    store double [[TMP5879]], double* [[DV]], align 8
22918 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22919 // CHECK-NEXT:    [[TMP5880:%.*]] = load double, double* [[DE]], align 8
22920 // CHECK-NEXT:    [[TMP5881:%.*]] = load double, double* [[DD]], align 8
22921 // CHECK-NEXT:    [[TMP5882:%.*]] = bitcast double* [[DX]] to i64*
22922 // CHECK-NEXT:    [[TMP5883:%.*]] = bitcast double [[TMP5880]] to i64
22923 // CHECK-NEXT:    [[TMP5884:%.*]] = bitcast double [[TMP5881]] to i64
22924 // CHECK-NEXT:    [[TMP5885:%.*]] = cmpxchg i64* [[TMP5882]], i64 [[TMP5883]], i64 [[TMP5884]] release monotonic, align 8
22925 // CHECK-NEXT:    [[TMP5886:%.*]] = extractvalue { i64, i1 } [[TMP5885]], 0
22926 // CHECK-NEXT:    [[TMP5887:%.*]] = bitcast i64 [[TMP5886]] to double
22927 // CHECK-NEXT:    [[TMP5888:%.*]] = extractvalue { i64, i1 } [[TMP5885]], 1
22928 // CHECK-NEXT:    [[TMP5889:%.*]] = select i1 [[TMP5888]], double [[TMP5880]], double [[TMP5887]]
22929 // CHECK-NEXT:    store double [[TMP5889]], double* [[DV]], align 8
22930 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22931 // CHECK-NEXT:    [[TMP5890:%.*]] = load double, double* [[DE]], align 8
22932 // CHECK-NEXT:    [[TMP5891:%.*]] = load double, double* [[DD]], align 8
22933 // CHECK-NEXT:    [[TMP5892:%.*]] = bitcast double* [[DX]] to i64*
22934 // CHECK-NEXT:    [[TMP5893:%.*]] = bitcast double [[TMP5890]] to i64
22935 // CHECK-NEXT:    [[TMP5894:%.*]] = bitcast double [[TMP5891]] to i64
22936 // CHECK-NEXT:    [[TMP5895:%.*]] = cmpxchg i64* [[TMP5892]], i64 [[TMP5893]], i64 [[TMP5894]] release monotonic, align 8
22937 // CHECK-NEXT:    [[TMP5896:%.*]] = extractvalue { i64, i1 } [[TMP5895]], 0
22938 // CHECK-NEXT:    [[TMP5897:%.*]] = bitcast i64 [[TMP5896]] to double
22939 // CHECK-NEXT:    [[TMP5898:%.*]] = extractvalue { i64, i1 } [[TMP5895]], 1
22940 // CHECK-NEXT:    [[TMP5899:%.*]] = select i1 [[TMP5898]], double [[TMP5890]], double [[TMP5897]]
22941 // CHECK-NEXT:    store double [[TMP5899]], double* [[DV]], align 8
22942 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22943 // CHECK-NEXT:    [[TMP5900:%.*]] = load double, double* [[DE]], align 8
22944 // CHECK-NEXT:    [[TMP5901:%.*]] = load double, double* [[DD]], align 8
22945 // CHECK-NEXT:    [[TMP5902:%.*]] = bitcast double* [[DX]] to i64*
22946 // CHECK-NEXT:    [[TMP5903:%.*]] = bitcast double [[TMP5900]] to i64
22947 // CHECK-NEXT:    [[TMP5904:%.*]] = bitcast double [[TMP5901]] to i64
22948 // CHECK-NEXT:    [[TMP5905:%.*]] = cmpxchg i64* [[TMP5902]], i64 [[TMP5903]], i64 [[TMP5904]] release monotonic, align 8
22949 // CHECK-NEXT:    [[TMP5906:%.*]] = extractvalue { i64, i1 } [[TMP5905]], 0
22950 // CHECK-NEXT:    [[TMP5907:%.*]] = bitcast i64 [[TMP5906]] to double
22951 // CHECK-NEXT:    [[TMP5908:%.*]] = extractvalue { i64, i1 } [[TMP5905]], 1
22952 // CHECK-NEXT:    br i1 [[TMP5908]], label [[DX_ATOMIC_EXIT537:%.*]], label [[DX_ATOMIC_CONT538:%.*]]
22953 // CHECK:       dx.atomic.cont538:
22954 // CHECK-NEXT:    store double [[TMP5907]], double* [[DV]], align 8
22955 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT537]]
22956 // CHECK:       dx.atomic.exit537:
22957 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22958 // CHECK-NEXT:    [[TMP5909:%.*]] = load double, double* [[DE]], align 8
22959 // CHECK-NEXT:    [[TMP5910:%.*]] = load double, double* [[DD]], align 8
22960 // CHECK-NEXT:    [[TMP5911:%.*]] = bitcast double* [[DX]] to i64*
22961 // CHECK-NEXT:    [[TMP5912:%.*]] = bitcast double [[TMP5909]] to i64
22962 // CHECK-NEXT:    [[TMP5913:%.*]] = bitcast double [[TMP5910]] to i64
22963 // CHECK-NEXT:    [[TMP5914:%.*]] = cmpxchg i64* [[TMP5911]], i64 [[TMP5912]], i64 [[TMP5913]] release monotonic, align 8
22964 // CHECK-NEXT:    [[TMP5915:%.*]] = extractvalue { i64, i1 } [[TMP5914]], 0
22965 // CHECK-NEXT:    [[TMP5916:%.*]] = bitcast i64 [[TMP5915]] to double
22966 // CHECK-NEXT:    [[TMP5917:%.*]] = extractvalue { i64, i1 } [[TMP5914]], 1
22967 // CHECK-NEXT:    br i1 [[TMP5917]], label [[DX_ATOMIC_EXIT539:%.*]], label [[DX_ATOMIC_CONT540:%.*]]
22968 // CHECK:       dx.atomic.cont540:
22969 // CHECK-NEXT:    store double [[TMP5916]], double* [[DV]], align 8
22970 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT539]]
22971 // CHECK:       dx.atomic.exit539:
22972 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22973 // CHECK-NEXT:    [[TMP5918:%.*]] = load double, double* [[DE]], align 8
22974 // CHECK-NEXT:    [[TMP5919:%.*]] = load double, double* [[DD]], align 8
22975 // CHECK-NEXT:    [[TMP5920:%.*]] = bitcast double* [[DX]] to i64*
22976 // CHECK-NEXT:    [[TMP5921:%.*]] = bitcast double [[TMP5918]] to i64
22977 // CHECK-NEXT:    [[TMP5922:%.*]] = bitcast double [[TMP5919]] to i64
22978 // CHECK-NEXT:    [[TMP5923:%.*]] = cmpxchg i64* [[TMP5920]], i64 [[TMP5921]], i64 [[TMP5922]] release monotonic, align 8
22979 // CHECK-NEXT:    [[TMP5924:%.*]] = extractvalue { i64, i1 } [[TMP5923]], 1
22980 // CHECK-NEXT:    [[TMP5925:%.*]] = sext i1 [[TMP5924]] to i32
22981 // CHECK-NEXT:    store i32 [[TMP5925]], i32* [[IR]], align 4
22982 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22983 // CHECK-NEXT:    [[TMP5926:%.*]] = load double, double* [[DE]], align 8
22984 // CHECK-NEXT:    [[TMP5927:%.*]] = load double, double* [[DD]], align 8
22985 // CHECK-NEXT:    [[TMP5928:%.*]] = bitcast double* [[DX]] to i64*
22986 // CHECK-NEXT:    [[TMP5929:%.*]] = bitcast double [[TMP5926]] to i64
22987 // CHECK-NEXT:    [[TMP5930:%.*]] = bitcast double [[TMP5927]] to i64
22988 // CHECK-NEXT:    [[TMP5931:%.*]] = cmpxchg i64* [[TMP5928]], i64 [[TMP5929]], i64 [[TMP5930]] release monotonic, align 8
22989 // CHECK-NEXT:    [[TMP5932:%.*]] = extractvalue { i64, i1 } [[TMP5931]], 1
22990 // CHECK-NEXT:    [[TMP5933:%.*]] = sext i1 [[TMP5932]] to i32
22991 // CHECK-NEXT:    store i32 [[TMP5933]], i32* [[IR]], align 4
22992 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
22993 // CHECK-NEXT:    [[TMP5934:%.*]] = load double, double* [[DE]], align 8
22994 // CHECK-NEXT:    [[TMP5935:%.*]] = load double, double* [[DD]], align 8
22995 // CHECK-NEXT:    [[TMP5936:%.*]] = bitcast double* [[DX]] to i64*
22996 // CHECK-NEXT:    [[TMP5937:%.*]] = bitcast double [[TMP5934]] to i64
22997 // CHECK-NEXT:    [[TMP5938:%.*]] = bitcast double [[TMP5935]] to i64
22998 // CHECK-NEXT:    [[TMP5939:%.*]] = cmpxchg i64* [[TMP5936]], i64 [[TMP5937]], i64 [[TMP5938]] release monotonic, align 8
22999 // CHECK-NEXT:    [[TMP5940:%.*]] = extractvalue { i64, i1 } [[TMP5939]], 0
23000 // CHECK-NEXT:    [[TMP5941:%.*]] = bitcast i64 [[TMP5940]] to double
23001 // CHECK-NEXT:    [[TMP5942:%.*]] = extractvalue { i64, i1 } [[TMP5939]], 1
23002 // CHECK-NEXT:    br i1 [[TMP5942]], label [[DX_ATOMIC_EXIT541:%.*]], label [[DX_ATOMIC_CONT542:%.*]]
23003 // CHECK:       dx.atomic.cont542:
23004 // CHECK-NEXT:    store double [[TMP5941]], double* [[DV]], align 8
23005 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT541]]
23006 // CHECK:       dx.atomic.exit541:
23007 // CHECK-NEXT:    [[TMP5943:%.*]] = extractvalue { i64, i1 } [[TMP5939]], 1
23008 // CHECK-NEXT:    [[TMP5944:%.*]] = sext i1 [[TMP5943]] to i32
23009 // CHECK-NEXT:    store i32 [[TMP5944]], i32* [[IR]], align 4
23010 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23011 // CHECK-NEXT:    [[TMP5945:%.*]] = load double, double* [[DE]], align 8
23012 // CHECK-NEXT:    [[TMP5946:%.*]] = load double, double* [[DD]], align 8
23013 // CHECK-NEXT:    [[TMP5947:%.*]] = bitcast double* [[DX]] to i64*
23014 // CHECK-NEXT:    [[TMP5948:%.*]] = bitcast double [[TMP5945]] to i64
23015 // CHECK-NEXT:    [[TMP5949:%.*]] = bitcast double [[TMP5946]] to i64
23016 // CHECK-NEXT:    [[TMP5950:%.*]] = cmpxchg i64* [[TMP5947]], i64 [[TMP5948]], i64 [[TMP5949]] release monotonic, align 8
23017 // CHECK-NEXT:    [[TMP5951:%.*]] = extractvalue { i64, i1 } [[TMP5950]], 0
23018 // CHECK-NEXT:    [[TMP5952:%.*]] = bitcast i64 [[TMP5951]] to double
23019 // CHECK-NEXT:    [[TMP5953:%.*]] = extractvalue { i64, i1 } [[TMP5950]], 1
23020 // CHECK-NEXT:    br i1 [[TMP5953]], label [[DX_ATOMIC_EXIT543:%.*]], label [[DX_ATOMIC_CONT544:%.*]]
23021 // CHECK:       dx.atomic.cont544:
23022 // CHECK-NEXT:    store double [[TMP5952]], double* [[DV]], align 8
23023 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT543]]
23024 // CHECK:       dx.atomic.exit543:
23025 // CHECK-NEXT:    [[TMP5954:%.*]] = extractvalue { i64, i1 } [[TMP5950]], 1
23026 // CHECK-NEXT:    [[TMP5955:%.*]] = sext i1 [[TMP5954]] to i32
23027 // CHECK-NEXT:    store i32 [[TMP5955]], i32* [[IR]], align 4
23028 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23029 // CHECK-NEXT:    [[TMP5956:%.*]] = load double, double* [[DE]], align 8
23030 // CHECK-NEXT:    [[TMP5957:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5956]] seq_cst, align 8
23031 // CHECK-NEXT:    store double [[TMP5957]], double* [[DV]], align 8
23032 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23033 // CHECK-NEXT:    [[TMP5958:%.*]] = load double, double* [[DE]], align 8
23034 // CHECK-NEXT:    [[TMP5959:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5958]] seq_cst, align 8
23035 // CHECK-NEXT:    store double [[TMP5959]], double* [[DV]], align 8
23036 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23037 // CHECK-NEXT:    [[TMP5960:%.*]] = load double, double* [[DE]], align 8
23038 // CHECK-NEXT:    [[TMP5961:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5960]] seq_cst, align 8
23039 // CHECK-NEXT:    store double [[TMP5961]], double* [[DV]], align 8
23040 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23041 // CHECK-NEXT:    [[TMP5962:%.*]] = load double, double* [[DE]], align 8
23042 // CHECK-NEXT:    [[TMP5963:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5962]] seq_cst, align 8
23043 // CHECK-NEXT:    store double [[TMP5963]], double* [[DV]], align 8
23044 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23045 // CHECK-NEXT:    [[TMP5964:%.*]] = load double, double* [[DE]], align 8
23046 // CHECK-NEXT:    [[TMP5965:%.*]] = load double, double* [[DD]], align 8
23047 // CHECK-NEXT:    [[TMP5966:%.*]] = bitcast double* [[DX]] to i64*
23048 // CHECK-NEXT:    [[TMP5967:%.*]] = bitcast double [[TMP5964]] to i64
23049 // CHECK-NEXT:    [[TMP5968:%.*]] = bitcast double [[TMP5965]] to i64
23050 // CHECK-NEXT:    [[TMP5969:%.*]] = cmpxchg i64* [[TMP5966]], i64 [[TMP5967]], i64 [[TMP5968]] seq_cst seq_cst, align 8
23051 // CHECK-NEXT:    [[TMP5970:%.*]] = extractvalue { i64, i1 } [[TMP5969]], 0
23052 // CHECK-NEXT:    [[TMP5971:%.*]] = bitcast i64 [[TMP5970]] to double
23053 // CHECK-NEXT:    store double [[TMP5971]], double* [[DV]], align 8
23054 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23055 // CHECK-NEXT:    [[TMP5972:%.*]] = load double, double* [[DE]], align 8
23056 // CHECK-NEXT:    [[TMP5973:%.*]] = load double, double* [[DD]], align 8
23057 // CHECK-NEXT:    [[TMP5974:%.*]] = bitcast double* [[DX]] to i64*
23058 // CHECK-NEXT:    [[TMP5975:%.*]] = bitcast double [[TMP5972]] to i64
23059 // CHECK-NEXT:    [[TMP5976:%.*]] = bitcast double [[TMP5973]] to i64
23060 // CHECK-NEXT:    [[TMP5977:%.*]] = cmpxchg i64* [[TMP5974]], i64 [[TMP5975]], i64 [[TMP5976]] seq_cst seq_cst, align 8
23061 // CHECK-NEXT:    [[TMP5978:%.*]] = extractvalue { i64, i1 } [[TMP5977]], 0
23062 // CHECK-NEXT:    [[TMP5979:%.*]] = bitcast i64 [[TMP5978]] to double
23063 // CHECK-NEXT:    store double [[TMP5979]], double* [[DV]], align 8
23064 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23065 // CHECK-NEXT:    [[TMP5980:%.*]] = load double, double* [[DE]], align 8
23066 // CHECK-NEXT:    [[TMP5981:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5980]] seq_cst, align 8
23067 // CHECK-NEXT:    [[TMP5982:%.*]] = fcmp ogt double [[TMP5981]], [[TMP5980]]
23068 // CHECK-NEXT:    [[TMP5983:%.*]] = select i1 [[TMP5982]], double [[TMP5980]], double [[TMP5981]]
23069 // CHECK-NEXT:    store double [[TMP5983]], double* [[DV]], align 8
23070 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23071 // CHECK-NEXT:    [[TMP5984:%.*]] = load double, double* [[DE]], align 8
23072 // CHECK-NEXT:    [[TMP5985:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5984]] seq_cst, align 8
23073 // CHECK-NEXT:    [[TMP5986:%.*]] = fcmp olt double [[TMP5985]], [[TMP5984]]
23074 // CHECK-NEXT:    [[TMP5987:%.*]] = select i1 [[TMP5986]], double [[TMP5984]], double [[TMP5985]]
23075 // CHECK-NEXT:    store double [[TMP5987]], double* [[DV]], align 8
23076 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23077 // CHECK-NEXT:    [[TMP5988:%.*]] = load double, double* [[DE]], align 8
23078 // CHECK-NEXT:    [[TMP5989:%.*]] = atomicrmw fmin double* [[DX]], double [[TMP5988]] seq_cst, align 8
23079 // CHECK-NEXT:    [[TMP5990:%.*]] = fcmp olt double [[TMP5989]], [[TMP5988]]
23080 // CHECK-NEXT:    [[TMP5991:%.*]] = select i1 [[TMP5990]], double [[TMP5988]], double [[TMP5989]]
23081 // CHECK-NEXT:    store double [[TMP5991]], double* [[DV]], align 8
23082 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23083 // CHECK-NEXT:    [[TMP5992:%.*]] = load double, double* [[DE]], align 8
23084 // CHECK-NEXT:    [[TMP5993:%.*]] = atomicrmw fmax double* [[DX]], double [[TMP5992]] seq_cst, align 8
23085 // CHECK-NEXT:    [[TMP5994:%.*]] = fcmp ogt double [[TMP5993]], [[TMP5992]]
23086 // CHECK-NEXT:    [[TMP5995:%.*]] = select i1 [[TMP5994]], double [[TMP5992]], double [[TMP5993]]
23087 // CHECK-NEXT:    store double [[TMP5995]], double* [[DV]], align 8
23088 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23089 // CHECK-NEXT:    [[TMP5996:%.*]] = load double, double* [[DE]], align 8
23090 // CHECK-NEXT:    [[TMP5997:%.*]] = load double, double* [[DD]], align 8
23091 // CHECK-NEXT:    [[TMP5998:%.*]] = bitcast double* [[DX]] to i64*
23092 // CHECK-NEXT:    [[TMP5999:%.*]] = bitcast double [[TMP5996]] to i64
23093 // CHECK-NEXT:    [[TMP6000:%.*]] = bitcast double [[TMP5997]] to i64
23094 // CHECK-NEXT:    [[TMP6001:%.*]] = cmpxchg i64* [[TMP5998]], i64 [[TMP5999]], i64 [[TMP6000]] seq_cst seq_cst, align 8
23095 // CHECK-NEXT:    [[TMP6002:%.*]] = extractvalue { i64, i1 } [[TMP6001]], 0
23096 // CHECK-NEXT:    [[TMP6003:%.*]] = bitcast i64 [[TMP6002]] to double
23097 // CHECK-NEXT:    [[TMP6004:%.*]] = extractvalue { i64, i1 } [[TMP6001]], 1
23098 // CHECK-NEXT:    [[TMP6005:%.*]] = select i1 [[TMP6004]], double [[TMP5996]], double [[TMP6003]]
23099 // CHECK-NEXT:    store double [[TMP6005]], double* [[DV]], align 8
23100 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23101 // CHECK-NEXT:    [[TMP6006:%.*]] = load double, double* [[DE]], align 8
23102 // CHECK-NEXT:    [[TMP6007:%.*]] = load double, double* [[DD]], align 8
23103 // CHECK-NEXT:    [[TMP6008:%.*]] = bitcast double* [[DX]] to i64*
23104 // CHECK-NEXT:    [[TMP6009:%.*]] = bitcast double [[TMP6006]] to i64
23105 // CHECK-NEXT:    [[TMP6010:%.*]] = bitcast double [[TMP6007]] to i64
23106 // CHECK-NEXT:    [[TMP6011:%.*]] = cmpxchg i64* [[TMP6008]], i64 [[TMP6009]], i64 [[TMP6010]] seq_cst seq_cst, align 8
23107 // CHECK-NEXT:    [[TMP6012:%.*]] = extractvalue { i64, i1 } [[TMP6011]], 0
23108 // CHECK-NEXT:    [[TMP6013:%.*]] = bitcast i64 [[TMP6012]] to double
23109 // CHECK-NEXT:    [[TMP6014:%.*]] = extractvalue { i64, i1 } [[TMP6011]], 1
23110 // CHECK-NEXT:    [[TMP6015:%.*]] = select i1 [[TMP6014]], double [[TMP6006]], double [[TMP6013]]
23111 // CHECK-NEXT:    store double [[TMP6015]], double* [[DV]], align 8
23112 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23113 // CHECK-NEXT:    [[TMP6016:%.*]] = load double, double* [[DE]], align 8
23114 // CHECK-NEXT:    [[TMP6017:%.*]] = load double, double* [[DD]], align 8
23115 // CHECK-NEXT:    [[TMP6018:%.*]] = bitcast double* [[DX]] to i64*
23116 // CHECK-NEXT:    [[TMP6019:%.*]] = bitcast double [[TMP6016]] to i64
23117 // CHECK-NEXT:    [[TMP6020:%.*]] = bitcast double [[TMP6017]] to i64
23118 // CHECK-NEXT:    [[TMP6021:%.*]] = cmpxchg i64* [[TMP6018]], i64 [[TMP6019]], i64 [[TMP6020]] seq_cst seq_cst, align 8
23119 // CHECK-NEXT:    [[TMP6022:%.*]] = extractvalue { i64, i1 } [[TMP6021]], 0
23120 // CHECK-NEXT:    [[TMP6023:%.*]] = bitcast i64 [[TMP6022]] to double
23121 // CHECK-NEXT:    [[TMP6024:%.*]] = extractvalue { i64, i1 } [[TMP6021]], 1
23122 // CHECK-NEXT:    br i1 [[TMP6024]], label [[DX_ATOMIC_EXIT545:%.*]], label [[DX_ATOMIC_CONT546:%.*]]
23123 // CHECK:       dx.atomic.cont546:
23124 // CHECK-NEXT:    store double [[TMP6023]], double* [[DV]], align 8
23125 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT545]]
23126 // CHECK:       dx.atomic.exit545:
23127 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23128 // CHECK-NEXT:    [[TMP6025:%.*]] = load double, double* [[DE]], align 8
23129 // CHECK-NEXT:    [[TMP6026:%.*]] = load double, double* [[DD]], align 8
23130 // CHECK-NEXT:    [[TMP6027:%.*]] = bitcast double* [[DX]] to i64*
23131 // CHECK-NEXT:    [[TMP6028:%.*]] = bitcast double [[TMP6025]] to i64
23132 // CHECK-NEXT:    [[TMP6029:%.*]] = bitcast double [[TMP6026]] to i64
23133 // CHECK-NEXT:    [[TMP6030:%.*]] = cmpxchg i64* [[TMP6027]], i64 [[TMP6028]], i64 [[TMP6029]] seq_cst seq_cst, align 8
23134 // CHECK-NEXT:    [[TMP6031:%.*]] = extractvalue { i64, i1 } [[TMP6030]], 0
23135 // CHECK-NEXT:    [[TMP6032:%.*]] = bitcast i64 [[TMP6031]] to double
23136 // CHECK-NEXT:    [[TMP6033:%.*]] = extractvalue { i64, i1 } [[TMP6030]], 1
23137 // CHECK-NEXT:    br i1 [[TMP6033]], label [[DX_ATOMIC_EXIT547:%.*]], label [[DX_ATOMIC_CONT548:%.*]]
23138 // CHECK:       dx.atomic.cont548:
23139 // CHECK-NEXT:    store double [[TMP6032]], double* [[DV]], align 8
23140 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT547]]
23141 // CHECK:       dx.atomic.exit547:
23142 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23143 // CHECK-NEXT:    [[TMP6034:%.*]] = load double, double* [[DE]], align 8
23144 // CHECK-NEXT:    [[TMP6035:%.*]] = load double, double* [[DD]], align 8
23145 // CHECK-NEXT:    [[TMP6036:%.*]] = bitcast double* [[DX]] to i64*
23146 // CHECK-NEXT:    [[TMP6037:%.*]] = bitcast double [[TMP6034]] to i64
23147 // CHECK-NEXT:    [[TMP6038:%.*]] = bitcast double [[TMP6035]] to i64
23148 // CHECK-NEXT:    [[TMP6039:%.*]] = cmpxchg i64* [[TMP6036]], i64 [[TMP6037]], i64 [[TMP6038]] seq_cst seq_cst, align 8
23149 // CHECK-NEXT:    [[TMP6040:%.*]] = extractvalue { i64, i1 } [[TMP6039]], 1
23150 // CHECK-NEXT:    [[TMP6041:%.*]] = sext i1 [[TMP6040]] to i32
23151 // CHECK-NEXT:    store i32 [[TMP6041]], i32* [[IR]], align 4
23152 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23153 // CHECK-NEXT:    [[TMP6042:%.*]] = load double, double* [[DE]], align 8
23154 // CHECK-NEXT:    [[TMP6043:%.*]] = load double, double* [[DD]], align 8
23155 // CHECK-NEXT:    [[TMP6044:%.*]] = bitcast double* [[DX]] to i64*
23156 // CHECK-NEXT:    [[TMP6045:%.*]] = bitcast double [[TMP6042]] to i64
23157 // CHECK-NEXT:    [[TMP6046:%.*]] = bitcast double [[TMP6043]] to i64
23158 // CHECK-NEXT:    [[TMP6047:%.*]] = cmpxchg i64* [[TMP6044]], i64 [[TMP6045]], i64 [[TMP6046]] seq_cst seq_cst, align 8
23159 // CHECK-NEXT:    [[TMP6048:%.*]] = extractvalue { i64, i1 } [[TMP6047]], 1
23160 // CHECK-NEXT:    [[TMP6049:%.*]] = sext i1 [[TMP6048]] to i32
23161 // CHECK-NEXT:    store i32 [[TMP6049]], i32* [[IR]], align 4
23162 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23163 // CHECK-NEXT:    [[TMP6050:%.*]] = load double, double* [[DE]], align 8
23164 // CHECK-NEXT:    [[TMP6051:%.*]] = load double, double* [[DD]], align 8
23165 // CHECK-NEXT:    [[TMP6052:%.*]] = bitcast double* [[DX]] to i64*
23166 // CHECK-NEXT:    [[TMP6053:%.*]] = bitcast double [[TMP6050]] to i64
23167 // CHECK-NEXT:    [[TMP6054:%.*]] = bitcast double [[TMP6051]] to i64
23168 // CHECK-NEXT:    [[TMP6055:%.*]] = cmpxchg i64* [[TMP6052]], i64 [[TMP6053]], i64 [[TMP6054]] seq_cst seq_cst, align 8
23169 // CHECK-NEXT:    [[TMP6056:%.*]] = extractvalue { i64, i1 } [[TMP6055]], 0
23170 // CHECK-NEXT:    [[TMP6057:%.*]] = bitcast i64 [[TMP6056]] to double
23171 // CHECK-NEXT:    [[TMP6058:%.*]] = extractvalue { i64, i1 } [[TMP6055]], 1
23172 // CHECK-NEXT:    br i1 [[TMP6058]], label [[DX_ATOMIC_EXIT549:%.*]], label [[DX_ATOMIC_CONT550:%.*]]
23173 // CHECK:       dx.atomic.cont550:
23174 // CHECK-NEXT:    store double [[TMP6057]], double* [[DV]], align 8
23175 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT549]]
23176 // CHECK:       dx.atomic.exit549:
23177 // CHECK-NEXT:    [[TMP6059:%.*]] = extractvalue { i64, i1 } [[TMP6055]], 1
23178 // CHECK-NEXT:    [[TMP6060:%.*]] = sext i1 [[TMP6059]] to i32
23179 // CHECK-NEXT:    store i32 [[TMP6060]], i32* [[IR]], align 4
23180 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23181 // CHECK-NEXT:    [[TMP6061:%.*]] = load double, double* [[DE]], align 8
23182 // CHECK-NEXT:    [[TMP6062:%.*]] = load double, double* [[DD]], align 8
23183 // CHECK-NEXT:    [[TMP6063:%.*]] = bitcast double* [[DX]] to i64*
23184 // CHECK-NEXT:    [[TMP6064:%.*]] = bitcast double [[TMP6061]] to i64
23185 // CHECK-NEXT:    [[TMP6065:%.*]] = bitcast double [[TMP6062]] to i64
23186 // CHECK-NEXT:    [[TMP6066:%.*]] = cmpxchg i64* [[TMP6063]], i64 [[TMP6064]], i64 [[TMP6065]] seq_cst seq_cst, align 8
23187 // CHECK-NEXT:    [[TMP6067:%.*]] = extractvalue { i64, i1 } [[TMP6066]], 0
23188 // CHECK-NEXT:    [[TMP6068:%.*]] = bitcast i64 [[TMP6067]] to double
23189 // CHECK-NEXT:    [[TMP6069:%.*]] = extractvalue { i64, i1 } [[TMP6066]], 1
23190 // CHECK-NEXT:    br i1 [[TMP6069]], label [[DX_ATOMIC_EXIT551:%.*]], label [[DX_ATOMIC_CONT552:%.*]]
23191 // CHECK:       dx.atomic.cont552:
23192 // CHECK-NEXT:    store double [[TMP6068]], double* [[DV]], align 8
23193 // CHECK-NEXT:    br label [[DX_ATOMIC_EXIT551]]
23194 // CHECK:       dx.atomic.exit551:
23195 // CHECK-NEXT:    [[TMP6070:%.*]] = extractvalue { i64, i1 } [[TMP6066]], 1
23196 // CHECK-NEXT:    [[TMP6071:%.*]] = sext i1 [[TMP6070]] to i32
23197 // CHECK-NEXT:    store i32 [[TMP6071]], i32* [[IR]], align 4
23198 // CHECK-NEXT:    call void @__kmpc_flush(%struct.ident_t* @[[GLOB1]])
23199 // CHECK-NEXT:    ret void
23200