1 // REQUIRES: x86-registered-target
2 // RUN: %clang_cc1 %s -triple i386-apple-darwin10 -fasm-blocks -emit-llvm -o - | FileCheck %s
3 
4 void t1() {
5 // CHECK: @t1
6 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
7 // CHECK: ret void
8   __asm {}
9 }
10 
11 void t2() {
12 // CHECK: @t2
13 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"()
14 // CHECK: ret void
15   __asm nop
16   __asm nop
17   __asm nop
18 }
19 
20 void t3() {
21 // CHECK: @t3
22 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"()
23 // CHECK: ret void
24   __asm nop __asm nop __asm nop
25 }
26 
27 void t4(void) {
28 // CHECK: @t4
29 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"()
30 // CHECK: ret void
31   __asm mov ebx, eax
32   __asm mov ecx, ebx
33 }
34 
35 void t5(void) {
36 // CHECK: @t5
37 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"()
38 // CHECK: ret void
39   __asm mov ebx, eax __asm mov ecx, ebx
40 }
41 
42 void t6(void) {
43   __asm int 0x2c
44 // CHECK: t6
45 // CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"()
46 }
47 
48 void t7() {
49   __asm {
50     int 0x2cU ; } asm comments are fun! }{
51   }
52   __asm {
53     {
54       int 0x2c ; } asm comments are fun! }{
55     }
56   }
57   __asm {}
58   __asm {
59     ;
60     ; label
61     mov eax, ebx
62   }
63 // CHECK: t7
64 // CHECK: call void asm sideeffect inteldialect "int $$0x2cU", "~{dirflag},~{fpsr},~{flags}"()
65 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
66 // CHECK: call void asm sideeffect inteldialect "mov eax, ebx", "~{eax},~{dirflag},~{fpsr},~{flags}"()
67 }
68 
69 int t8() {
70   __asm int 4 ; } comments for single-line asm
71   __asm {}
72   __asm { int 5}
73   __asm int 6
74   __asm int 7
75   __asm {
76     int 8
77   }
78   return 10;
79 // CHECK: t8
80 // CHECK: call i32 asm sideeffect inteldialect "int $$4", "={eax},~{dirflag},~{fpsr},~{flags}"()
81 // CHECK: call i32 asm sideeffect inteldialect "", "={eax},~{dirflag},~{fpsr},~{flags}"()
82 // CHECK: call i32 asm sideeffect inteldialect "int $$5", "={eax},~{dirflag},~{fpsr},~{flags}"()
83 // CHECK: call i32 asm sideeffect inteldialect "int $$6\0A\09int $$7", "={eax},~{dirflag},~{fpsr},~{flags}"()
84 // CHECK: call i32 asm sideeffect inteldialect "int $$8", "={eax},~{dirflag},~{fpsr},~{flags}"()
85 // CHECK: ret i32 10
86 }
87 
88 void t9() {
89   __asm {
90     push ebx
91     { mov ebx, 0x07 }
92     __asm { pop ebx }
93   }
94 // CHECK: t9
95 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx\0A\09", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"()
96 }
97 
98 unsigned t10(void) {
99   unsigned i = 1, j;
100   __asm {
101     mov eax, i
102     mov j, eax
103   }
104   return j;
105 // CHECK: t10
106 // CHECK: [[r:%[a-zA-Z0-9]+]] = alloca i32, align 4
107 // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4
108 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4
109 // CHECK: store i32 1, i32* [[I]], align 4
110 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $2\0A\09mov dword ptr $0, eax", "=*m,={eax},*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}})
111 // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32, i32* [[J]], align 4
112 // CHECK: ret i32 [[RET]]
113 }
114 
115 void t11(void) {
116   __asm mov eax, 1
117 // CHECK: t11
118 // CHECK: call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"()
119 }
120 
121 unsigned t12(void) {
122   unsigned i = 1, j, l = 1, m;
123   __asm {
124     mov eax, i
125     mov j, eax
126     mov eax, l
127     mov m, eax
128   }
129   return j + m;
130 // CHECK: t12
131 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $3\0A\09mov dword ptr $0, eax\0A\09mov eax, dword ptr $4\0A\09mov dword ptr $1, eax", "=*m,=*m,={eax},*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}})
132 }
133 
134 void t13() {
135   char i = 1;
136   short j = 2;
137   __asm movzx eax, i
138   __asm movzx eax, j
139 // CHECK: t13
140 // CHECK: call void asm sideeffect inteldialect "movzx eax, byte ptr $0\0A\09movzx eax, word ptr $1", "*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i8* %{{.*}}i, i16* %{{.*}}j)
141 }
142 
143 void t14() {
144   unsigned i = 1, j = 2;
145   __asm {
146     .if 1
147     { mov eax, i }
148     .else
149     mov ebx, j
150     .endif
151   }
152 // CHECK: t14
153 // CHECK: call void asm sideeffect inteldialect ".if 1\0A\09mov eax, dword ptr $0\0A\09.else\0A\09mov ebx, j\0A\09.endif", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
154 }
155 
156 int gvar = 10;
157 void t15() {
158 // CHECK: t15
159   int lvar = 10;
160   __asm mov eax, lvar        ; eax = 10
161 // CHECK: mov eax, dword ptr $0
162   __asm mov eax, offset lvar ; eax = address of lvar
163 // CHECK: mov eax, $1
164   __asm mov eax, offset gvar ; eax = address of gvar
165 // CHECK: mov eax, $2
166 // CHECK: "*m,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* @{{.*}})
167 }
168 
169 void t16() {
170   int var = 10;
171   __asm mov [eax], offset var
172 // CHECK: t16
173 // CHECK: call void asm sideeffect inteldialect "mov [eax], $0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
174 }
175 
176 void t17() {
177 // CHECK: t17
178   __asm _emit 0x4A
179 // CHECK: .byte 0x4A
180   __asm _emit 0x43L
181 // CHECK: .byte 0x43L
182   __asm _emit 0x4B
183 // CHECK: .byte 0x4B
184   __asm _EMIT 0x4B
185 // CHECK: .byte 0x4B
186 // CHECK:  "~{dirflag},~{fpsr},~{flags}"()
187 }
188 
189 void t20() {
190 // CHECK: t20
191   char bar;
192   int foo;
193   char _bar[2];
194   int _foo[4];
195 
196   __asm mov eax, LENGTH foo
197 // CHECK: mov eax, $$1
198   __asm mov eax, LENGTH bar
199 // CHECK: mov eax, $$1
200   __asm mov eax, LENGTH _foo
201 // CHECK: mov eax, $$4
202   __asm mov eax, LENGTH _bar
203 // CHECK: mov eax, $$2
204   __asm mov eax, [eax + LENGTH foo * 4]
205 // CHECK: mov eax, [eax + $$1 * $$4]
206 
207   __asm mov eax, TYPE foo
208 // CHECK: mov eax, $$4
209   __asm mov eax, TYPE bar
210 // CHECK: mov eax, $$1
211   __asm mov eax, TYPE _foo
212 // CHECK: mov eax, $$4
213   __asm mov eax, TYPE _bar
214 // CHECK: mov eax, $$1
215   __asm mov eax, [eax + TYPE foo * 4]
216 // CHECK: mov eax, [eax + $$4 * $$4]
217 
218   __asm mov eax, SIZE foo
219 // CHECK: mov eax, $$4
220   __asm mov eax, SIZE bar
221 // CHECK: mov eax, $$1
222   __asm mov eax, SIZE _foo
223 // CHECK: mov eax, $$16
224   __asm mov eax, [eax + SIZE _foo * 4]
225 // CHECK: mov eax, [eax + $$16 * $$4]
226   __asm mov eax, SIZE _bar
227 // CHECK: mov eax, $$2
228 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
229 
230 }
231 
232 void t21() {
233   __asm {
234     __asm push ebx
235     __asm mov ebx, 07H
236     __asm pop ebx
237   }
238 // CHECK: t21
239 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$07H\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"()
240 }
241 
242 extern void t22_helper(int x);
243 void t22() {
244   int x = 0;
245   __asm {
246     __asm push ebx
247     __asm mov ebx, esp
248   }
249   t22_helper(x);
250   __asm {
251     __asm mov esp, ebx
252     __asm pop ebx
253   }
254 // CHECK: t22
255 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, esp", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"()
256 // CHECK: call void @t22_helper
257 // CHECK: call void asm sideeffect inteldialect "mov esp, ebx\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"()
258 }
259 
260 void t23() {
261   __asm {
262   the_label:
263   }
264 // CHECK: t23
265 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__the_label:", "~{dirflag},~{fpsr},~{flags}"()
266 }
267 
268 void t24_helper(void) {}
269 void t24() {
270   __asm call t24_helper
271 // CHECK: t24
272 // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @t24_helper)
273 }
274 
275 void t25() {
276 // CHECK: t25
277   __asm mov eax, 0ffffffffh
278 // CHECK: mov eax, $$0ffffffffh
279   __asm mov eax, 0fhU
280 // CHECK: mov eax, $$15
281   __asm mov eax, 0a2h
282 // CHECK: mov eax, $$0a2h
283   __asm mov eax, 10100010b
284 // CHECK: mov eax, $$10100010b
285   __asm mov eax, 10100010BU
286 // CHECK: mov eax, $$162
287 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
288 }
289 
290 void t26() {
291 // CHECK: t26
292   __asm pushad
293 // CHECK: pushad
294   __asm mov eax, 0
295 // CHECK: mov eax, $$0
296   __asm __emit 0fh
297 // CHECK: .byte 0fh
298   __asm __emit 0a2h
299 // CHECK: .byte 0a2h
300   __asm __EMIT 0a2h
301 // CHECK: .byte 0a2h
302   __asm popad
303 // CHECK: popad
304 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"()
305 }
306 
307 void t27() {
308   __asm mov eax, fs:[0h]
309 // CHECK: t27
310 // CHECK: call void asm sideeffect inteldialect "mov eax, fs:[$$0h]", "~{eax},~{dirflag},~{fpsr},~{flags}"()
311 }
312 
313 void t28() {
314 // CHECK: t28
315   __asm align 8
316 // CHECK: .align 3
317   __asm align 16;
318 // CHECK: .align 4
319   __asm align 128;
320 // CHECK: .align 7
321   __asm ALIGN 256;
322 // CHECK: .align 8
323 // CHECK: "~{dirflag},~{fpsr},~{flags}"()
324 }
325 
326 void t29() {
327 // CHECK: t29
328   int arr[2] = {0, 0};
329   int olen = 0, osize = 0, otype = 0;
330   __asm mov olen, LENGTH arr
331 // CHECK: mov dword ptr $0, $$2
332   __asm mov osize, SIZE arr
333 // CHECK: mov dword ptr $1, $$8
334   __asm mov otype, TYPE arr
335 // CHECK: mov dword ptr $2, $$4
336 // CHECK: "=*m,=*m,=*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}})
337 }
338 
339 int results[2] = {13, 37};
340 int *t30()
341 // CHECK: t30
342 {
343   int *res;
344   __asm lea edi, results
345 // CHECK: lea edi, dword ptr $2
346   __asm mov res, edi
347 // CHECK: mov dword ptr $0, edi
348   return res;
349 // CHECK: "=*m,={eax},*m,~{edi},~{dirflag},~{fpsr},~{flags}"(i32** %{{.*}}, [2 x i32]* @{{.*}})
350 }
351 
352 void t31() {
353 // CHECK: t31
354   __asm pushad
355 // CHECK: pushad
356   __asm popad
357 // CHECK: popad
358 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"()
359 }
360 
361 void t32() {
362 // CHECK: t32
363   int i;
364   __asm mov eax, i
365 // CHECK: mov eax, dword ptr $0
366   __asm mov eax, dword ptr i
367 // CHECK: mov eax, dword ptr $1
368   __asm mov ax, word ptr i
369 // CHECK: mov ax, word ptr $2
370   __asm mov al, byte ptr i
371 // CHECK: mov al, byte ptr $3
372 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}})
373 }
374 
375 void t33() {
376 // CHECK: t33
377   int i;
378   __asm mov eax, [i]
379 // CHECK: mov eax, dword ptr $0
380   __asm mov eax, dword ptr [i]
381 // CHECK: mov eax, dword ptr $1
382   __asm mov ax, word ptr [i]
383 // CHECK: mov ax, word ptr $2
384   __asm mov al, byte ptr [i]
385 // CHECK: mov al, byte ptr $3
386 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}})
387 }
388 
389 void t34() {
390 // CHECK: t34
391   __asm prefetchnta 64[eax]
392 // CHECK: prefetchnta $$64[eax]
393   __asm mov eax, dword ptr 4[eax]
394 // CHECK: mov eax, dword ptr $$4[eax]
395 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
396 }
397 
398 void t35() {
399 // CHECK: t35
400   __asm prefetchnta [eax + (200*64)]
401 // CHECK: prefetchnta [eax + ($$200*$$64)]
402   __asm mov eax, dword ptr [eax + (200*64)]
403 // CHECK: mov eax, dword ptr [eax + ($$200*$$64)]
404 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
405 }
406 
407 void t36() {
408 // CHECK: t36
409   int arr[4];
410   // Work around PR20368: These should be single line blocks
411   __asm { mov eax, 4[arr] }
412 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
413   __asm { mov eax, 4[arr + 4] }
414 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
415   __asm { mov eax, 8[arr + 4 + 32*2 - 4] }
416 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
417   __asm { mov eax, 12[4 + arr] }
418 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
419   __asm { mov eax, 4[4 + arr + 4] }
420 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
421   __asm { mov eax, 4[64 + arr + (2*32)] }
422 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
423   __asm { mov eax, 4[64 + arr - 2*32] }
424 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
425   __asm { mov eax, [arr + 4] }
426 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
427   __asm { mov eax, [arr + 4 + 32*2 - 4] }
428 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
429   __asm { mov eax, [4 + arr] }
430 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
431   __asm { mov eax, [4 + arr + 4] }
432 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
433   __asm { mov eax, [64 + arr + (2*32)] }
434 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
435   __asm { mov eax, [64 + arr - 2*32] }
436 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
437 }
438 
439 void t37() {
440 // CHECK: t37
441   __asm mov eax, 4 + 8
442 // CHECK: mov eax, $$12
443   __asm mov eax, 4 + 8 * 16
444 // CHECK: mov eax, $$132
445   __asm mov eax, -4 + 8 * 16
446 // CHECK: mov eax, $$124
447   __asm mov eax, (4 + 4) * 16
448 // CHECK: mov eax, $$128
449   __asm mov eax, 4 + 8 * -16
450 // CHECK: mov eax, $$4294967172
451   __asm mov eax, 4 + 16 / -8
452 // CHECK: mov eax, $$2
453   __asm mov eax, (16 + 16) / -8
454 // CHECK: mov eax, $$4294967292
455   __asm mov eax, ~15
456 // CHECK: mov eax, $$4294967280
457   __asm mov eax, 6 ^ 3
458 // CHECK: mov eax, $$5
459 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
460 }
461 
462 void t38() {
463 // CHECK: t38
464   int arr[4];
465   // Work around PR20368: These should be single line blocks
466   __asm { mov eax, 4+4[arr] }
467 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
468   __asm { mov eax, (4+4)[arr + 4] }
469 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
470   __asm { mov eax, 8*2[arr + 4 + 32*2 - 4] }
471 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$80$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
472   __asm { mov eax, 12+20[4 + arr] }
473 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$36$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
474   __asm { mov eax, 4*16+4[4 + arr + 4] }
475 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$76$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
476   __asm { mov eax, 4*4[64 + arr + (2*32)] }
477 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$144$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
478   __asm { mov eax, 4*(4-2)[64 + arr - 2*32] }
479 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
480   __asm { mov eax, 32*(4-2)[arr - 2*32] }
481 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$0$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}})
482 }
483 
484 void cpuid() {
485   __asm cpuid
486 // CHECK-LABEL: define void @cpuid
487 // CHECK: call void asm sideeffect inteldialect "cpuid", "~{eax},~{ebx},~{ecx},~{edx},~{dirflag},~{fpsr},~{flags}"()
488 }
489 
490 typedef struct {
491   int a;
492   int b;
493 } A;
494 
495 typedef struct {
496   int b1;
497   A   b2;
498 } B;
499 
500 typedef struct {
501   int c1;
502   A   c2;
503   int c3;
504   B   c4;
505 } C;
506 
507 void t39() {
508 // CHECK-LABEL: define void @t39
509   __asm mov eax, [eax].A.b
510 // CHECK: mov eax, [eax].4
511   __asm mov eax, [eax] A.b
512 // CHECK: mov eax, [eax] .4
513   __asm mov eax, fs:[0] A.b
514 // CHECK: mov eax, fs:[$$0] .4
515   __asm mov eax, [eax].B.b2.a
516 // CHECK: mov eax, [eax].4
517   __asm mov eax, [eax] B.b2.b
518 // CHECK: mov eax, [eax] .8
519   __asm mov eax, fs:[0] C.c2.b
520 // CHECK: mov eax, fs:[$$0] .8
521   __asm mov eax, [eax]C.c4.b2.b
522 // CHECK: mov eax, [eax].24
523 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"()
524 }
525 
526 void t40(float a) {
527 // CHECK-LABEL: define void @t40
528   int i;
529   __asm fld a
530 // CHECK: fld dword ptr $1
531   __asm fistp i
532 // CHECK: fistp dword ptr $0
533 // CHECK: "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, float* %{{.*}})
534 }
535 
536 void t41(unsigned short a) {
537 // CHECK-LABEL: define void @t41(i16 zeroext %a)
538   __asm mov cs, a;
539 // CHECK: mov cs, word ptr $0
540   __asm mov ds, a;
541 // CHECK: mov ds, word ptr $1
542   __asm mov es, a;
543 // CHECK: mov es, word ptr $2
544   __asm mov fs, a;
545 // CHECK: mov fs, word ptr $3
546   __asm mov gs, a;
547 // CHECK: mov gs, word ptr $4
548   __asm mov ss, a;
549 // CHECK: mov ss, word ptr $5
550 // CHECK: "*m,*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}})
551 }
552 
553 void t42() {
554 // CHECK-LABEL: define void @t42
555   int flags;
556   __asm mov flags, eax
557 // CHECK: mov dword ptr $0, eax
558 // CHECK: "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %flags)
559 }
560 
561 void t43() {
562 // CHECK-LABEL: define void @t43
563   C strct;
564 // Work around PR20368: These should be single line blocks
565  __asm { mov eax, 4[strct.c1] }
566 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
567   __asm { mov eax, 4[strct.c3 + 4] }
568 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
569   __asm { mov eax, 8[strct.c2.a + 4 + 32*2 - 4] }
570 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
571   __asm { mov eax, 12[4 + strct.c2.b] }
572 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
573   __asm { mov eax, 4[4 + strct.c4.b2.b + 4] }
574 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
575   __asm { mov eax, 4[64 + strct.c1 + (2*32)] }
576 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
577   __asm { mov eax, 4[64 + strct.c2.a - 2*32] }
578 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
579   __asm { mov eax, [strct.c4.b1 + 4] }
580 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
581   __asm { mov eax, [strct.c4.b2.a + 4 + 32*2 - 4] }
582 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
583   __asm { mov eax, [4 + strct.c1] }
584 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
585   __asm { mov eax, [4 + strct.c2.b + 4] }
586 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
587   __asm { mov eax, [64 + strct.c3 + (2*32)] }
588 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
589   __asm { mov eax, [64 + strct.c4.b2.b - 2*32] }
590 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
591 }
592 
593 void call_clobber() {
594   __asm call t41
595   // CHECK-LABEL: define void @call_clobber
596   // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void (i16)* @t41)
597 }
598 
599 void xgetbv() {
600   __asm xgetbv
601 }
602 // CHECK-LABEL: define void @xgetbv()
603 // CHECK: call void asm sideeffect inteldialect "xgetbv", "~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"()
604 
605 void label1() {
606   __asm {
607     label:
608     jmp label
609   }
610   // CHECK-LABEL: define void @label1()
611   // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09jmp {{.*}}__MSASMLABEL_.${:uid}__label", "~{dirflag},~{fpsr},~{flags}"() [[ATTR1:#[0-9]+]]
612 }
613 
614 void label2() {
615   __asm {
616     jmp label
617     label:
618   }
619   // CHECK-LABEL: define void @label2
620   // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__label\0A\09{{.*}}__MSASMLABEL_.${:uid}__label:", "~{dirflag},~{fpsr},~{flags}"()
621 }
622 
623 void label3() {
624   __asm {
625     label:
626     mov eax, label
627   }
628   // CHECK-LABEL: define void @label3
629   // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.${:uid}__label", "~{eax},~{dirflag},~{fpsr},~{flags}"()
630 }
631 
632 void label4() {
633   __asm {
634     label:
635     mov eax, [label]
636   }
637   // CHECK-LABEL: define void @label4
638   // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.${:uid}__label", "~{eax},~{dirflag},~{fpsr},~{flags}"()
639 }
640 
641 void label5() {
642   __asm {
643     jmp dollar_label$
644     dollar_label$:
645   }
646   // CHECK-LABEL: define void @label5
647   // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__dollar_label$$\0A\09{{.*}}__MSASMLABEL_.${:uid}__dollar_label$$:", "~{dirflag},~{fpsr},~{flags}"()
648 }
649 
650 void label6(){
651   __asm {
652       jmp short label
653     label:
654   }
655   // CHECK-LABEL: define void @label6
656   // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__label\0A\09{{.*}}__MSASMLABEL_.${:uid}__label:", "~{dirflag},~{fpsr},~{flags}"()
657 }
658 
659 // Don't include mxcsr in the clobber list.
660 void mxcsr() {
661   char buf[4096];
662   __asm fxrstor buf
663 }
664 // CHECK-LABEL: define void @mxcsr
665 // CHECK: call void asm sideeffect inteldialect "fxrstor byte ptr $0", "=*m,~{dirflag},~{fpsr},~{flags}"
666 
667 typedef union _LARGE_INTEGER {
668   struct {
669     unsigned int LowPart;
670     unsigned int  HighPart;
671   };
672   struct {
673     unsigned int LowPart;
674     unsigned int  HighPart;
675   } u;
676   unsigned long long QuadPart;
677 } LARGE_INTEGER, *PLARGE_INTEGER;
678 
679 int test_indirect_field(LARGE_INTEGER LargeInteger) {
680     __asm mov     eax, LargeInteger.LowPart
681 }
682 // CHECK-LABEL: define i32 @test_indirect_field(
683 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $1",
684 
685 // MS ASM containing labels must not be duplicated (PR23715).
686 // CHECK: attributes [[ATTR1]] = {
687 // CHECK-NOT: noduplicate
688 // CHECK-SAME: }{{$}}
689