1 // REQUIRES: x86-registered-target 2 // RUN: %clang_cc1 %s -triple i386-apple-darwin10 -fasm-blocks -emit-llvm -o - | FileCheck %s 3 4 void t1() { 5 // CHECK: @t1 6 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() 7 // CHECK: ret void 8 __asm {} 9 } 10 11 void t2() { 12 // CHECK: @t2 13 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() 14 // CHECK: ret void 15 __asm nop 16 __asm nop 17 __asm nop 18 } 19 20 void t3() { 21 // CHECK: @t3 22 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() 23 // CHECK: ret void 24 __asm nop __asm nop __asm nop 25 } 26 27 void t4(void) { 28 // CHECK: @t4 29 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() 30 // CHECK: ret void 31 __asm mov ebx, eax 32 __asm mov ecx, ebx 33 } 34 35 void t5(void) { 36 // CHECK: @t5 37 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() 38 // CHECK: ret void 39 __asm mov ebx, eax __asm mov ecx, ebx 40 } 41 42 void t6(void) { 43 __asm int 0x2c 44 // CHECK: t6 45 // CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() 46 } 47 48 void t7() { 49 __asm { 50 int 0x2cU ; } asm comments are fun! }{ 51 } 52 __asm { 53 { 54 int 0x2c ; } asm comments are fun! }{ 55 } 56 } 57 __asm {} 58 __asm { 59 ; 60 ; label 61 mov eax, ebx 62 } 63 // CHECK: t7 64 // CHECK: call void asm sideeffect inteldialect "int $$0x2cU", "~{dirflag},~{fpsr},~{flags}"() 65 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() 66 // CHECK: call void asm sideeffect inteldialect "mov eax, ebx", "~{eax},~{dirflag},~{fpsr},~{flags}"() 67 } 68 69 int t8() { 70 __asm int 4 ; } comments for single-line asm 71 __asm {} 72 __asm { int 5} 73 __asm int 6 74 __asm int 7 75 __asm { 76 int 8 77 } 78 return 10; 79 // CHECK: t8 80 // CHECK: call i32 asm sideeffect inteldialect "int $$4", "={eax},~{dirflag},~{fpsr},~{flags}"() 81 // CHECK: call i32 asm sideeffect inteldialect "", "={eax},~{dirflag},~{fpsr},~{flags}"() 82 // CHECK: call i32 asm sideeffect inteldialect "int $$5", "={eax},~{dirflag},~{fpsr},~{flags}"() 83 // CHECK: call i32 asm sideeffect inteldialect "int $$6\0A\09int $$7", "={eax},~{dirflag},~{fpsr},~{flags}"() 84 // CHECK: call i32 asm sideeffect inteldialect "int $$8", "={eax},~{dirflag},~{fpsr},~{flags}"() 85 // CHECK: ret i32 10 86 } 87 88 void t9() { 89 __asm { 90 push ebx 91 { mov ebx, 0x07 } 92 __asm { pop ebx } 93 } 94 // CHECK: t9 95 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx\0A\09", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 96 } 97 98 unsigned t10(void) { 99 unsigned i = 1, j; 100 __asm { 101 mov eax, i 102 mov j, eax 103 } 104 return j; 105 // CHECK: t10 106 // CHECK: [[r:%[a-zA-Z0-9]+]] = alloca i32, align 4 107 // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4 108 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4 109 // CHECK: store i32 1, i32* [[I]], align 4 110 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $2\0A\09mov dword ptr $0, eax", "=*m,={eax},*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}) 111 // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32, i32* [[J]], align 4 112 // CHECK: ret i32 [[RET]] 113 } 114 115 void t11(void) { 116 __asm mov eax, 1 117 // CHECK: t11 118 // CHECK: call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() 119 } 120 121 unsigned t12(void) { 122 unsigned i = 1, j, l = 1, m; 123 __asm { 124 mov eax, i 125 mov j, eax 126 mov eax, l 127 mov m, eax 128 } 129 return j + m; 130 // CHECK: t12 131 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $3\0A\09mov dword ptr $0, eax\0A\09mov eax, dword ptr $4\0A\09mov dword ptr $1, eax", "=*m,=*m,={eax},*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 132 } 133 134 void t13() { 135 char i = 1; 136 short j = 2; 137 __asm movzx eax, i 138 __asm movzx eax, j 139 // CHECK: t13 140 // CHECK: call void asm sideeffect inteldialect "movzx eax, byte ptr $0\0A\09movzx eax, word ptr $1", "*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i8* %{{.*}}i, i16* %{{.*}}j) 141 } 142 143 void t14() { 144 unsigned i = 1, j = 2; 145 __asm { 146 .if 1 147 { mov eax, i } 148 .else 149 mov ebx, j 150 .endif 151 } 152 // CHECK: t14 153 // CHECK: call void asm sideeffect inteldialect ".if 1\0A\09mov eax, dword ptr $0\0A\09.else\0A\09mov ebx, j\0A\09.endif", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 154 } 155 156 int gvar = 10; 157 void t15() { 158 // CHECK: t15 159 int lvar = 10; 160 __asm mov eax, lvar ; eax = 10 161 // CHECK: mov eax, dword ptr $0 162 __asm mov eax, offset lvar ; eax = address of lvar 163 // CHECK: mov eax, $1 164 __asm mov eax, offset gvar ; eax = address of gvar 165 // CHECK: mov eax, $2 166 // CHECK: "*m,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* @{{.*}}) 167 } 168 169 void t16() { 170 int var = 10; 171 __asm mov [eax], offset var 172 // CHECK: t16 173 // CHECK: call void asm sideeffect inteldialect "mov [eax], $0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 174 } 175 176 void t17() { 177 // CHECK: t17 178 __asm _emit 0x4A 179 // CHECK: .byte 0x4A 180 __asm _emit 0x43L 181 // CHECK: .byte 0x43L 182 __asm _emit 0x4B 183 // CHECK: .byte 0x4B 184 __asm _EMIT 0x4B 185 // CHECK: .byte 0x4B 186 // CHECK: "~{dirflag},~{fpsr},~{flags}"() 187 } 188 189 void t20() { 190 // CHECK: t20 191 char bar; 192 int foo; 193 char _bar[2]; 194 int _foo[4]; 195 196 __asm mov eax, LENGTH foo 197 // CHECK: mov eax, $$1 198 __asm mov eax, LENGTH bar 199 // CHECK: mov eax, $$1 200 __asm mov eax, LENGTH _foo 201 // CHECK: mov eax, $$4 202 __asm mov eax, LENGTH _bar 203 // CHECK: mov eax, $$2 204 205 __asm mov eax, TYPE foo 206 // CHECK: mov eax, $$4 207 __asm mov eax, TYPE bar 208 // CHECK: mov eax, $$1 209 __asm mov eax, TYPE _foo 210 // CHECK: mov eax, $$4 211 __asm mov eax, TYPE _bar 212 // CHECK: mov eax, $$1 213 214 __asm mov eax, SIZE foo 215 // CHECK: mov eax, $$4 216 __asm mov eax, SIZE bar 217 // CHECK: mov eax, $$1 218 __asm mov eax, SIZE _foo 219 // CHECK: mov eax, $$16 220 __asm mov eax, SIZE _bar 221 // CHECK: mov eax, $$2 222 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 223 } 224 225 void t21() { 226 __asm { 227 __asm push ebx 228 __asm mov ebx, 07H 229 __asm pop ebx 230 } 231 // CHECK: t21 232 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$07H\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 233 } 234 235 extern void t22_helper(int x); 236 void t22() { 237 int x = 0; 238 __asm { 239 __asm push ebx 240 __asm mov ebx, esp 241 } 242 t22_helper(x); 243 __asm { 244 __asm mov esp, ebx 245 __asm pop ebx 246 } 247 // CHECK: t22 248 // CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, esp", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 249 // CHECK: call void @t22_helper 250 // CHECK: call void asm sideeffect inteldialect "mov esp, ebx\0A\09pop ebx", "~{ebx},~{esp},~{dirflag},~{fpsr},~{flags}"() 251 } 252 253 void t23() { 254 __asm { 255 the_label: 256 } 257 // CHECK: t23 258 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__the_label:", "~{dirflag},~{fpsr},~{flags}"() 259 } 260 261 void t24_helper(void) {} 262 void t24() { 263 __asm call t24_helper 264 // CHECK: t24 265 // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @t24_helper) 266 } 267 268 void t25() { 269 // CHECK: t25 270 __asm mov eax, 0ffffffffh 271 // CHECK: mov eax, $$0ffffffffh 272 __asm mov eax, 0fhU 273 // CHECK: mov eax, $$15 274 __asm mov eax, 0a2h 275 // CHECK: mov eax, $$0a2h 276 __asm mov eax, 10100010b 277 // CHECK: mov eax, $$10100010b 278 __asm mov eax, 10100010BU 279 // CHECK: mov eax, $$162 280 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 281 } 282 283 void t26() { 284 // CHECK: t26 285 __asm pushad 286 // CHECK: pushad 287 __asm mov eax, 0 288 // CHECK: mov eax, $$0 289 __asm __emit 0fh 290 // CHECK: .byte 0fh 291 __asm __emit 0a2h 292 // CHECK: .byte 0a2h 293 __asm __EMIT 0a2h 294 // CHECK: .byte 0a2h 295 __asm popad 296 // CHECK: popad 297 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"() 298 } 299 300 void t27() { 301 __asm mov eax, fs:[0h] 302 // CHECK: t27 303 // CHECK: call void asm sideeffect inteldialect "mov eax, fs:[$$0h]", "~{eax},~{dirflag},~{fpsr},~{flags}"() 304 } 305 306 void t28() { 307 // CHECK: t28 308 __asm align 8 309 // CHECK: .align 3 310 __asm align 16; 311 // CHECK: .align 4 312 __asm align 128; 313 // CHECK: .align 7 314 __asm ALIGN 256; 315 // CHECK: .align 8 316 // CHECK: "~{dirflag},~{fpsr},~{flags}"() 317 } 318 319 void t29() { 320 // CHECK: t29 321 int arr[2] = {0, 0}; 322 int olen = 0, osize = 0, otype = 0; 323 __asm mov olen, LENGTH arr 324 // CHECK: mov dword ptr $0, $$2 325 __asm mov osize, SIZE arr 326 // CHECK: mov dword ptr $1, $$8 327 __asm mov otype, TYPE arr 328 // CHECK: mov dword ptr $2, $$4 329 // CHECK: "=*m,=*m,=*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 330 } 331 332 int results[2] = {13, 37}; 333 int *t30() 334 // CHECK: t30 335 { 336 int *res; 337 __asm lea edi, results 338 // CHECK: lea edi, dword ptr $2 339 __asm mov res, edi 340 // CHECK: mov dword ptr $0, edi 341 return res; 342 // CHECK: "=*m,={eax},*m,~{edi},~{dirflag},~{fpsr},~{flags}"(i32** %{{.*}}, [2 x i32]* @{{.*}}) 343 } 344 345 void t31() { 346 // CHECK: t31 347 __asm pushad 348 // CHECK: pushad 349 __asm popad 350 // CHECK: popad 351 // CHECK: "~{eax},~{ebp},~{ebx},~{ecx},~{edi},~{edx},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"() 352 } 353 354 void t32() { 355 // CHECK: t32 356 int i; 357 __asm mov eax, i 358 // CHECK: mov eax, dword ptr $0 359 __asm mov eax, dword ptr i 360 // CHECK: mov eax, dword ptr $1 361 __asm mov ax, word ptr i 362 // CHECK: mov ax, word ptr $2 363 __asm mov al, byte ptr i 364 // CHECK: mov al, byte ptr $3 365 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 366 } 367 368 void t33() { 369 // CHECK: t33 370 int i; 371 __asm mov eax, [i] 372 // CHECK: mov eax, dword ptr $0 373 __asm mov eax, dword ptr [i] 374 // CHECK: mov eax, dword ptr $1 375 __asm mov ax, word ptr [i] 376 // CHECK: mov ax, word ptr $2 377 __asm mov al, byte ptr [i] 378 // CHECK: mov al, byte ptr $3 379 // CHECK: "*m,*m,*m,*m,~{al},~{ax},~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}, i32* %{{.*}}) 380 } 381 382 void t34() { 383 // CHECK: t34 384 __asm prefetchnta 64[eax] 385 // CHECK: prefetchnta $$64[eax] 386 __asm mov eax, dword ptr 4[eax] 387 // CHECK: mov eax, dword ptr $$4[eax] 388 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 389 } 390 391 void t35() { 392 // CHECK: t35 393 __asm prefetchnta [eax + (200*64)] 394 // CHECK: prefetchnta [eax + ($$200*$$64)] 395 __asm mov eax, dword ptr [eax + (200*64)] 396 // CHECK: mov eax, dword ptr [eax + ($$200*$$64)] 397 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 398 } 399 400 void t36() { 401 // CHECK: t36 402 int arr[4]; 403 // Work around PR20368: These should be single line blocks 404 __asm { mov eax, 4[arr] } 405 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 406 __asm { mov eax, 4[arr + 4] } 407 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 408 __asm { mov eax, 8[arr + 4 + 32*2 - 4] } 409 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 410 __asm { mov eax, 12[4 + arr] } 411 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 412 __asm { mov eax, 4[4 + arr + 4] } 413 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 414 __asm { mov eax, 4[64 + arr + (2*32)] } 415 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 416 __asm { mov eax, 4[64 + arr - 2*32] } 417 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 418 __asm { mov eax, [arr + 4] } 419 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 420 __asm { mov eax, [arr + 4 + 32*2 - 4] } 421 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 422 __asm { mov eax, [4 + arr] } 423 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 424 __asm { mov eax, [4 + arr + 4] } 425 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 426 __asm { mov eax, [64 + arr + (2*32)] } 427 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 428 __asm { mov eax, [64 + arr - 2*32] } 429 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 430 } 431 432 void t37() { 433 // CHECK: t37 434 __asm mov eax, 4 + 8 435 // CHECK: mov eax, $$12 436 __asm mov eax, 4 + 8 * 16 437 // CHECK: mov eax, $$132 438 __asm mov eax, -4 + 8 * 16 439 // CHECK: mov eax, $$124 440 __asm mov eax, (4 + 4) * 16 441 // CHECK: mov eax, $$128 442 __asm mov eax, 4 + 8 * -16 443 // CHECK: mov eax, $$4294967172 444 __asm mov eax, 4 + 16 / -8 445 // CHECK: mov eax, $$2 446 __asm mov eax, (16 + 16) / -8 447 // CHECK: mov eax, $$4294967292 448 __asm mov eax, ~15 449 // CHECK: mov eax, $$4294967280 450 __asm mov eax, 6 ^ 3 451 // CHECK: mov eax, $$5 452 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 453 } 454 455 void t38() { 456 // CHECK: t38 457 int arr[4]; 458 // Work around PR20368: These should be single line blocks 459 __asm { mov eax, 4+4[arr] } 460 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 461 __asm { mov eax, (4+4)[arr + 4] } 462 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 463 __asm { mov eax, 8*2[arr + 4 + 32*2 - 4] } 464 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$80$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 465 __asm { mov eax, 12+20[4 + arr] } 466 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$36$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 467 __asm { mov eax, 4*16+4[4 + arr + 4] } 468 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$76$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 469 __asm { mov eax, 4*4[64 + arr + (2*32)] } 470 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$144$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 471 __asm { mov eax, 4*(4-2)[64 + arr - 2*32] } 472 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 473 __asm { mov eax, 32*(4-2)[arr - 2*32] } 474 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$0$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %{{.*}}) 475 } 476 477 void cpuid() { 478 __asm cpuid 479 // CHECK-LABEL: define void @cpuid 480 // CHECK: call void asm sideeffect inteldialect "cpuid", "~{eax},~{ebx},~{ecx},~{edx},~{dirflag},~{fpsr},~{flags}"() 481 } 482 483 typedef struct { 484 int a; 485 int b; 486 } A; 487 488 typedef struct { 489 int b1; 490 A b2; 491 } B; 492 493 typedef struct { 494 int c1; 495 A c2; 496 int c3; 497 B c4; 498 } C; 499 500 void t39() { 501 // CHECK-LABEL: define void @t39 502 __asm mov eax, [eax].A.b 503 // CHECK: mov eax, [eax].4 504 __asm mov eax, [eax] A.b 505 // CHECK: mov eax, [eax] .4 506 __asm mov eax, fs:[0] A.b 507 // CHECK: mov eax, fs:[$$0] .4 508 __asm mov eax, [eax].B.b2.a 509 // CHECK: mov eax, [eax].4 510 __asm mov eax, [eax] B.b2.b 511 // CHECK: mov eax, [eax] .8 512 __asm mov eax, fs:[0] C.c2.b 513 // CHECK: mov eax, fs:[$$0] .8 514 __asm mov eax, [eax]C.c4.b2.b 515 // CHECK: mov eax, [eax].24 516 // CHECK: "~{eax},~{dirflag},~{fpsr},~{flags}"() 517 } 518 519 void t40(float a) { 520 // CHECK-LABEL: define void @t40 521 int i; 522 __asm fld a 523 // CHECK: fld dword ptr $1 524 __asm fistp i 525 // CHECK: fistp dword ptr $0 526 // CHECK: "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, float* %{{.*}}) 527 } 528 529 void t41(unsigned short a) { 530 // CHECK-LABEL: define void @t41(i16 zeroext %a) 531 __asm mov cs, a; 532 // CHECK: mov cs, word ptr $0 533 __asm mov ds, a; 534 // CHECK: mov ds, word ptr $1 535 __asm mov es, a; 536 // CHECK: mov es, word ptr $2 537 __asm mov fs, a; 538 // CHECK: mov fs, word ptr $3 539 __asm mov gs, a; 540 // CHECK: mov gs, word ptr $4 541 __asm mov ss, a; 542 // CHECK: mov ss, word ptr $5 543 // CHECK: "*m,*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"(i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}, i16* {{.*}}) 544 } 545 546 void t42() { 547 // CHECK-LABEL: define void @t42 548 int flags; 549 __asm mov flags, eax 550 // CHECK: mov dword ptr $0, eax 551 // CHECK: "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %flags) 552 } 553 554 void t43() { 555 // CHECK-LABEL: define void @t43 556 C strct; 557 // Work around PR20368: These should be single line blocks 558 __asm { mov eax, 4[strct.c1] } 559 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 560 __asm { mov eax, 4[strct.c3 + 4] } 561 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 562 __asm { mov eax, 8[strct.c2.a + 4 + 32*2 - 4] } 563 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 564 __asm { mov eax, 12[4 + strct.c2.b] } 565 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 566 __asm { mov eax, 4[4 + strct.c4.b2.b + 4] } 567 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 568 __asm { mov eax, 4[64 + strct.c1 + (2*32)] } 569 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 570 __asm { mov eax, 4[64 + strct.c2.a - 2*32] } 571 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 572 __asm { mov eax, [strct.c4.b1 + 4] } 573 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 574 __asm { mov eax, [strct.c4.b2.a + 4 + 32*2 - 4] } 575 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 576 __asm { mov eax, [4 + strct.c1] } 577 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 578 __asm { mov eax, [4 + strct.c2.b + 4] } 579 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 580 __asm { mov eax, [64 + strct.c3 + (2*32)] } 581 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 582 __asm { mov eax, [64 + strct.c4.b2.b - 2*32] } 583 // CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}) 584 } 585 586 void call_clobber() { 587 __asm call t41 588 // CHECK-LABEL: define void @call_clobber 589 // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void (i16)* @t41) 590 } 591 592 void xgetbv() { 593 __asm xgetbv 594 } 595 // CHECK-LABEL: define void @xgetbv() 596 // CHECK: call void asm sideeffect inteldialect "xgetbv", "~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"() 597 598 void label1() { 599 __asm { 600 label: 601 jmp label 602 } 603 // CHECK-LABEL: define void @label1() 604 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09jmp {{.*}}__MSASMLABEL_.${:uid}__label", "~{dirflag},~{fpsr},~{flags}"() [[ATTR1:#[0-9]+]] 605 } 606 607 void label2() { 608 __asm { 609 jmp label 610 label: 611 } 612 // CHECK-LABEL: define void @label2 613 // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__label\0A\09{{.*}}__MSASMLABEL_.${:uid}__label:", "~{dirflag},~{fpsr},~{flags}"() 614 } 615 616 void label3() { 617 __asm { 618 label: 619 mov eax, label 620 } 621 // CHECK-LABEL: define void @label3 622 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.${:uid}__label", "~{eax},~{dirflag},~{fpsr},~{flags}"() 623 } 624 625 void label4() { 626 __asm { 627 label: 628 mov eax, [label] 629 } 630 // CHECK-LABEL: define void @label4 631 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__label:\0A\09mov eax, {{.*}}__MSASMLABEL_.${:uid}__label", "~{eax},~{dirflag},~{fpsr},~{flags}"() 632 } 633 634 void label5() { 635 __asm { 636 jmp dollar_label$ 637 dollar_label$: 638 } 639 // CHECK-LABEL: define void @label5 640 // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__dollar_label$$\0A\09{{.*}}__MSASMLABEL_.${:uid}__dollar_label$$:", "~{dirflag},~{fpsr},~{flags}"() 641 } 642 643 void label6(){ 644 __asm { 645 jmp short label 646 label: 647 } 648 // CHECK-LABEL: define void @label6 649 // CHECK: call void asm sideeffect inteldialect "jmp {{.*}}__MSASMLABEL_.${:uid}__label\0A\09{{.*}}__MSASMLABEL_.${:uid}__label:", "~{dirflag},~{fpsr},~{flags}"() 650 } 651 652 typedef union _LARGE_INTEGER { 653 struct { 654 unsigned int LowPart; 655 unsigned int HighPart; 656 }; 657 struct { 658 unsigned int LowPart; 659 unsigned int HighPart; 660 } u; 661 unsigned long long QuadPart; 662 } LARGE_INTEGER, *PLARGE_INTEGER; 663 664 int test_indirect_field(LARGE_INTEGER LargeInteger) { 665 __asm mov eax, LargeInteger.LowPart 666 } 667 // CHECK-LABEL: define i32 @test_indirect_field( 668 // CHECK: call i32 asm sideeffect inteldialect "mov eax, dword ptr $1", 669 670 // MS ASM containing labels must not be duplicated (PR23715). 671 // CHECK: attributes [[ATTR1]] = { 672 // CHECK-NOT: noduplicate 673 // CHECK-SAME: }{{$}} 674