1 // RUN: %clang_cc1 -triple mips-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 2 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 3 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 4 5 #include <stdarg.h> 6 7 typedef int v4i32 __attribute__ ((__vector_size__ (16))); 8 9 int test_v4i32(char *fmt, ...) { 10 va_list va; 11 12 va_start(va, fmt); 13 v4i32 v = va_arg(va, v4i32); 14 va_end(va); 15 16 return v[0]; 17 } 18 19 // ALL: define i32 @test_v4i32(i8*{{.*}} %fmt, ...) 20 // 21 // O32: %va = alloca i8*, align [[PTRALIGN:4]] 22 // N32: %va = alloca i8*, align [[PTRALIGN:4]] 23 // N64: %va = alloca i8*, align [[PTRALIGN:8]] 24 // 25 // ALL: [[VA1:%.+]] = bitcast i8** %va to i8* 26 // ALL: call void @llvm.va_start(i8* [[VA1]]) 27 // ALL: [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]] 28 // 29 // O32: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[PTRTYPE:i32]] 30 // N32: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[PTRTYPE:i32]] 31 // N64: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[PTRTYPE:i64]] 32 // 33 // Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of 34 // 8-bytes since the base of the stack is 8-byte aligned. 35 // O32: [[PTR1:%.+]] = add i32 [[PTR0]], 7 36 // O32: [[PTR2:%.+]] = and i32 [[PTR1]], -8 37 // 38 // N32: [[PTR1:%.+]] = add i32 [[PTR0]], 15 39 // N32: [[PTR2:%.+]] = and i32 [[PTR1]], -16 40 // 41 // N64: [[PTR1:%.+]] = add i64 [[PTR0]], 15 42 // N64: [[PTR2:%.+]] = and i64 [[PTR1]], -16 43 // 44 // ALL: [[PTR3:%.+]] = inttoptr [[PTRTYPE]] [[PTR2]] to <4 x i32>* 45 // ALL: [[PTR4:%.+]] = inttoptr [[PTRTYPE]] [[PTR2]] to i8* 46 // ALL: [[AP_NEXT:%.+]] = getelementptr i8* [[PTR4]], [[PTRTYPE]] 16 47 // ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] 48 // ALL: [[PTR5:%.+]] = load <4 x i32>* [[PTR3]], align 16 49 // ALL: call void @llvm.va_end(i8* [[VA1]]) 50 // ALL: [[VECEXT:%.+]] = extractelement <4 x i32> [[PTR5]], i32 0 51 // ALL: ret i32 [[VECEXT]] 52 // ALL: } 53