1 // RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LINUX 2 // RUN: %clang_cc1 -triple aarch64-windows -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-WIN 3 #include <stdint.h> 4 5 void f0(void *a, void *b) { 6 __clear_cache(a,b); 7 // CHECK: call {{.*}} @__clear_cache 8 } 9 10 void *tp (void) { 11 return __builtin_thread_pointer (); 12 // CHECK: call {{.*}} @llvm.thread.pointer() 13 } 14 15 // CHECK: call {{.*}} @llvm.bitreverse.i32(i32 %a) 16 unsigned rbit(unsigned a) { 17 return __builtin_arm_rbit(a); 18 } 19 20 // CHECK-WIN: [[A64:%[^ ]+]] = zext i32 %a to i64 21 // CHECK-WIN: call i64 @llvm.bitreverse.i64(i64 [[A64]]) 22 // CHECK-LINUX: call i64 @llvm.bitreverse.i64(i64 %a) 23 unsigned long rbitl(unsigned long a) { 24 return __builtin_arm_rbit64(a); 25 } 26 27 // CHECK: call {{.*}} @llvm.bitreverse.i64(i64 %a) 28 uint64_t rbit64(uint64_t a) { 29 return __builtin_arm_rbit64(a); 30 } 31 32 void hints() { 33 __builtin_arm_nop(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0) 34 __builtin_arm_yield(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1) 35 __builtin_arm_wfe(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2) 36 __builtin_arm_wfi(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3) 37 __builtin_arm_sev(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 4) 38 __builtin_arm_sevl(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 5) 39 } 40 41 void barriers() { 42 __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.aarch64.dmb(i32 1) 43 __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.aarch64.dsb(i32 2) 44 __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.aarch64.isb(i32 3) 45 } 46 47 void prefetch() { 48 __builtin_arm_prefetch(0, 1, 2, 0, 1); // pstl3keep 49 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1) 50 51 __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1keep 52 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) 53 54 __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1strm 55 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) 56 57 __builtin_arm_prefetch(0, 0, 0, 0, 0); // plil1keep 58 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0) 59 } 60 61 __typeof__(__builtin_arm_rsr("1:2:3:4:5")) rsr(void); 62 63 uint32_t rsr() { 64 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) 65 // CHECK-NEXT: trunc i64 [[V0]] to i32 66 return __builtin_arm_rsr("1:2:3:4:5"); 67 } 68 69 __typeof__(__builtin_arm_rsr64("1:2:3:4:5")) rsr64(void); 70 71 uint64_t rsr64(void) { 72 // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) 73 return __builtin_arm_rsr64("1:2:3:4:5"); 74 } 75 76 void *rsrp() { 77 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) 78 // CHECK-NEXT: inttoptr i64 [[V0]] to i8* 79 return __builtin_arm_rsrp("1:2:3:4:5"); 80 } 81 82 __typeof__(__builtin_arm_wsr("1:2:3:4:5", 0)) wsr(unsigned); 83 84 void wsr(unsigned v) { 85 // CHECK: [[V0:[%A-Za-z0-9.]+]] = zext i32 %v to i64 86 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]]) 87 __builtin_arm_wsr("1:2:3:4:5", v); 88 } 89 90 __typeof__(__builtin_arm_wsr64("1:2:3:4:5", 0)) wsr64(uint64_t); 91 92 void wsr64(uint64_t v) { 93 // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v) 94 __builtin_arm_wsr64("1:2:3:4:5", v); 95 } 96 97 void wsrp(void *v) { 98 // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i64 99 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]]) 100 __builtin_arm_wsrp("1:2:3:4:5", v); 101 } 102 103 // CHECK: ![[M0]] = !{!"1:2:3:4:5"} 104