1 // RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 | FileCheck %s
2 // REQUIRES: x86-registered-target
3 
4 // Also test serialization of atomic operations here, to avoid duplicating the
5 // test.
6 // RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9
7 // RUN: %clang_cc1 %s -include-pch %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -emit-llvm -o - | FileCheck %s
8 #ifndef ALREADY_INCLUDED
9 #define ALREADY_INCLUDED
10 
11 #include <stdatomic.h>
12 
13 // Basic IRGen tests for __c11_atomic_* and GNU __atomic_*
14 
15 int fi1(_Atomic(int) *i) {
16   // CHECK-LABEL: @fi1
17   // CHECK: load atomic i32, i32* {{.*}} seq_cst
18   return __c11_atomic_load(i, memory_order_seq_cst);
19 }
20 
21 int fi1a(int *i) {
22   // CHECK-LABEL: @fi1a
23   // CHECK: load atomic i32, i32* {{.*}} seq_cst
24   int v;
25   __atomic_load(i, &v, memory_order_seq_cst);
26   return v;
27 }
28 
29 int fi1b(int *i) {
30   // CHECK-LABEL: @fi1b
31   // CHECK: load atomic i32, i32* {{.*}} seq_cst
32   return __atomic_load_n(i, memory_order_seq_cst);
33 }
34 
35 int fi1c(atomic_int *i) {
36   // CHECK-LABEL: @fi1c
37   // CHECK: load atomic i32, i32* {{.*}} seq_cst
38   return atomic_load(i);
39 }
40 
41 void fi2(_Atomic(int) *i) {
42   // CHECK-LABEL: @fi2
43   // CHECK: store atomic i32 {{.*}} seq_cst
44   __c11_atomic_store(i, 1, memory_order_seq_cst);
45 }
46 
47 void fi2a(int *i) {
48   // CHECK-LABEL: @fi2a
49   // CHECK: store atomic i32 {{.*}} seq_cst
50   int v = 1;
51   __atomic_store(i, &v, memory_order_seq_cst);
52 }
53 
54 void fi2b(int *i) {
55   // CHECK-LABEL: @fi2b
56   // CHECK: store atomic i32 {{.*}} seq_cst
57   __atomic_store_n(i, 1, memory_order_seq_cst);
58 }
59 
60 void fi2c(atomic_int *i) {
61   // CHECK-LABEL: @fi2c
62   // CHECK: store atomic i32 {{.*}} seq_cst
63   atomic_store(i, 1);
64 }
65 
66 int fi3(_Atomic(int) *i) {
67   // CHECK-LABEL: @fi3
68   // CHECK: atomicrmw and
69   // CHECK-NOT: and
70   return __c11_atomic_fetch_and(i, 1, memory_order_seq_cst);
71 }
72 
73 int fi3a(int *i) {
74   // CHECK-LABEL: @fi3a
75   // CHECK: atomicrmw xor
76   // CHECK-NOT: xor
77   return __atomic_fetch_xor(i, 1, memory_order_seq_cst);
78 }
79 
80 int fi3b(int *i) {
81   // CHECK-LABEL: @fi3b
82   // CHECK: atomicrmw add
83   // CHECK: add
84   return __atomic_add_fetch(i, 1, memory_order_seq_cst);
85 }
86 
87 int fi3c(int *i) {
88   // CHECK-LABEL: @fi3c
89   // CHECK: atomicrmw nand
90   // CHECK-NOT: and
91   return __atomic_fetch_nand(i, 1, memory_order_seq_cst);
92 }
93 
94 int fi3d(int *i) {
95   // CHECK-LABEL: @fi3d
96   // CHECK: atomicrmw nand
97   // CHECK: and
98   // CHECK: xor
99   return __atomic_nand_fetch(i, 1, memory_order_seq_cst);
100 }
101 
102 int fi3e(atomic_int *i) {
103   // CHECK-LABEL: @fi3e
104   // CHECK: atomicrmw or
105   // CHECK-NOT: {{ or }}
106   return atomic_fetch_or(i, 1);
107 }
108 
109 int fi3f(int *i) {
110   // CHECK-LABEL: @fi3f
111   // CHECK-NOT: store volatile
112   // CHECK: atomicrmw or
113   // CHECK-NOT: {{ or }}
114   return __atomic_fetch_or(i, (short)1, memory_order_seq_cst);
115 }
116 
117 _Bool fi4(_Atomic(int) *i) {
118   // CHECK-LABEL: @fi4(
119   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
120   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
121   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
122   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
123   // CHECK: store i32 [[OLD]]
124   int cmp = 0;
125   return __c11_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_acquire, memory_order_acquire);
126 }
127 
128 _Bool fi4a(int *i) {
129   // CHECK-LABEL: @fi4a
130   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
131   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
132   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
133   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
134   // CHECK: store i32 [[OLD]]
135   int cmp = 0;
136   int desired = 1;
137   return __atomic_compare_exchange(i, &cmp, &desired, 0, memory_order_acquire, memory_order_acquire);
138 }
139 
140 _Bool fi4b(int *i) {
141   // CHECK-LABEL: @fi4b(
142   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg weak i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
143   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
144   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
145   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
146   // CHECK: store i32 [[OLD]]
147   int cmp = 0;
148   return __atomic_compare_exchange_n(i, &cmp, 1, 1, memory_order_acquire, memory_order_acquire);
149 }
150 
151 _Bool fi4c(atomic_int *i) {
152   // CHECK-LABEL: @fi4c
153   // CHECK: cmpxchg i32*
154   int cmp = 0;
155   return atomic_compare_exchange_strong(i, &cmp, 1);
156 }
157 
158 #define _AS1 __attribute__((address_space(1)))
159 _Bool fi4d(_Atomic(int) *i, int _AS1 *ptr2) {
160   // CHECK-LABEL: @fi4d(
161   // CHECK: [[EXPECTED:%[.0-9A-Z_a-z]+]] = load i32, i32 addrspace(1)* %{{[0-9]+}}
162   // CHECK: cmpxchg i32* %{{[0-9]+}}, i32 [[EXPECTED]], i32 %{{[0-9]+}} acquire acquire
163   return __c11_atomic_compare_exchange_strong(i, ptr2, 1, memory_order_acquire, memory_order_acquire);
164 }
165 
166 float ff1(_Atomic(float) *d) {
167   // CHECK-LABEL: @ff1
168   // CHECK: load atomic i32, i32* {{.*}} monotonic
169   return __c11_atomic_load(d, memory_order_relaxed);
170 }
171 
172 void ff2(_Atomic(float) *d) {
173   // CHECK-LABEL: @ff2
174   // CHECK: store atomic i32 {{.*}} release
175   __c11_atomic_store(d, 1, memory_order_release);
176 }
177 
178 float ff3(_Atomic(float) *d) {
179   return __c11_atomic_exchange(d, 2, memory_order_seq_cst);
180 }
181 
182 struct S {
183   double x;
184 };
185 
186 void implicit_store(_Atomic(struct S) *a, struct S s) {
187   // CHECK-LABEL: @implicit_store(
188   // CHECK: store atomic i64 %{{.*}}, i64* %{{.*}} seq_cst, align 8
189   *a = s;
190 }
191 
192 struct S implicit_load(_Atomic(struct S) *a) {
193   // CHECK-LABEL: @implicit_load(
194   // CHECK: load atomic i64, i64* %{{.*}} seq_cst, align 8
195   return *a;
196 }
197 
198 struct S fd1(struct S *a) {
199   // CHECK-LABEL: @fd1
200   // CHECK: [[RETVAL:%.*]] = alloca %struct.S, align 4
201   // CHECK: bitcast %struct.S* {{.*}} to i64*
202   // CHECK: [[CAST:%.*]]  = bitcast %struct.S* [[RETVAL]] to i64*
203   // CHECK: [[CALL:%.*]]   = call i64 @__atomic_load_8(
204   // CHECK: store i64 [[CALL]], i64* [[CAST]], align 4
205   struct S ret;
206   __atomic_load(a, &ret, memory_order_seq_cst);
207   return ret;
208 }
209 
210 void fd2(struct S *a, struct S *b) {
211   // CHECK-LABEL: @fd2
212   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
213   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
214   // CHECK-NEXT: store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
215   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
216   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
217   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
218   // CHECK-NEXT: [[COERCED_A_TMP:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i64*
219   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64*
220   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8*
221   // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, i64* [[COERCED_B]], align 4
222   // CHECK-NEXT: call void @__atomic_store_8(i8* [[COERCED_A]], i64 [[LOAD_B]],
223   // CHECK-NEXT: ret void
224   __atomic_store(a, b, memory_order_seq_cst);
225 }
226 
227 void fd3(struct S *a, struct S *b, struct S *c) {
228   // CHECK-LABEL: @fd3
229   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
230   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
231   // CHECK-NEXT: [[C_ADDR:%.*]] = alloca %struct.S*, align 4
232   // CHECK-NEXT: store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
233   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
234   // CHECK-NEXT: store %struct.S* %c, %struct.S** [[C_ADDR]], align 4
235   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
236   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
237   // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load %struct.S*, %struct.S** [[C_ADDR]], align 4
238   // CHECK-NEXT: [[COERCED_A_TMP:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i64*
239   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64*
240   // CHECK-NEXT: [[COERCED_C:%.*]] = bitcast %struct.S* [[LOAD_C_PTR]] to i64*
241   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8*
242   // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, i64* [[COERCED_B]], align 4
243   // CHECK-NEXT: [[CALL:%.*]] = call i64 @__atomic_exchange_8(i8* [[COERCED_A]], i64 [[LOAD_B]],
244   // CHECK-NEXT: store i64 [[CALL]], i64* [[COERCED_C]], align 4
245 
246   __atomic_exchange(a, b, c, memory_order_seq_cst);
247 }
248 
249 _Bool fd4(struct S *a, struct S *b, struct S *c) {
250   // CHECK-LABEL: @fd4
251   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
252   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
253   // CHECK-NEXT: [[C_ADDR:%.*]] = alloca %struct.S*, align 4
254   // CHECK:      store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
255   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
256   // CHECK-NEXT: store %struct.S* %c, %struct.S** [[C_ADDR]], align 4
257   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
258   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
259   // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load %struct.S*, %struct.S** [[C_ADDR]], align 4
260   // CHECK-NEXT: [[COERCED_A_TMP:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i64*
261   // CHECK-NEXT: [[COERCED_B_TMP:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64*
262   // CHECK-NEXT: [[COERCED_C:%.*]] = bitcast %struct.S* [[LOAD_C_PTR]] to i64*
263   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast i64* [[COERCED_A_TMP]] to i8*
264   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast i64* [[COERCED_B_TMP]] to i8*
265   // CHECK-NEXT: [[LOAD_C:%.*]] = load i64, i64* [[COERCED_C]], align 4
266   // CHECK-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange_8(i8* [[COERCED_A]], i8* [[COERCED_B]], i64 [[LOAD_C]]
267   // CHECK-NEXT: ret i1 [[CALL]]
268   return __atomic_compare_exchange(a, b, c, 1, 5, 5);
269 }
270 
271 int* fp1(_Atomic(int*) *p) {
272   // CHECK-LABEL: @fp1
273   // CHECK: load atomic i32, i32* {{.*}} seq_cst
274   return __c11_atomic_load(p, memory_order_seq_cst);
275 }
276 
277 int* fp2(_Atomic(int*) *p) {
278   // CHECK-LABEL: @fp2
279   // CHECK: store i32 4
280   // CHECK: atomicrmw add {{.*}} monotonic
281   return __c11_atomic_fetch_add(p, 1, memory_order_relaxed);
282 }
283 
284 int *fp2a(int **p) {
285   // CHECK-LABEL: @fp2a
286   // CHECK: store i32 4
287   // CHECK: atomicrmw sub {{.*}} monotonic
288   // Note, the GNU builtins do not multiply by sizeof(T)!
289   return __atomic_fetch_sub(p, 4, memory_order_relaxed);
290 }
291 
292 _Complex float fc(_Atomic(_Complex float) *c) {
293   // CHECK-LABEL: @fc
294   // CHECK: atomicrmw xchg i64*
295   return __c11_atomic_exchange(c, 2, memory_order_seq_cst);
296 }
297 
298 typedef struct X { int x; } X;
299 X fs(_Atomic(X) *c) {
300   // CHECK-LABEL: @fs
301   // CHECK: atomicrmw xchg i32*
302   return __c11_atomic_exchange(c, (X){2}, memory_order_seq_cst);
303 }
304 
305 X fsa(X *c, X *d) {
306   // CHECK-LABEL: @fsa
307   // CHECK: atomicrmw xchg i32*
308   X ret;
309   __atomic_exchange(c, d, &ret, memory_order_seq_cst);
310   return ret;
311 }
312 
313 _Bool fsb(_Bool *c) {
314   // CHECK-LABEL: @fsb
315   // CHECK: atomicrmw xchg i8*
316   return __atomic_exchange_n(c, 1, memory_order_seq_cst);
317 }
318 
319 char flag1;
320 volatile char flag2;
321 void test_and_set() {
322   // CHECK: atomicrmw xchg i8* @flag1, i8 1 seq_cst
323   __atomic_test_and_set(&flag1, memory_order_seq_cst);
324   // CHECK: atomicrmw volatile xchg i8* @flag2, i8 1 acquire
325   __atomic_test_and_set(&flag2, memory_order_acquire);
326   // CHECK: store atomic volatile i8 0, i8* @flag2 release
327   __atomic_clear(&flag2, memory_order_release);
328   // CHECK: store atomic i8 0, i8* @flag1 seq_cst
329   __atomic_clear(&flag1, memory_order_seq_cst);
330 }
331 
332 struct Sixteen {
333   char c[16];
334 } sixteen;
335 struct Seventeen {
336   char c[17];
337 } seventeen;
338 
339 struct Incomplete;
340 
341 int lock_free(struct Incomplete *incomplete) {
342   // CHECK-LABEL: @lock_free
343 
344   // CHECK: call i32 @__atomic_is_lock_free(i32 3, i8* null)
345   __c11_atomic_is_lock_free(3);
346 
347   // CHECK: call i32 @__atomic_is_lock_free(i32 16, i8* {{.*}}@sixteen{{.*}})
348   __atomic_is_lock_free(16, &sixteen);
349 
350   // CHECK: call i32 @__atomic_is_lock_free(i32 17, i8* {{.*}}@seventeen{{.*}})
351   __atomic_is_lock_free(17, &seventeen);
352 
353   // CHECK: call i32 @__atomic_is_lock_free(i32 4, {{.*}})
354   __atomic_is_lock_free(4, incomplete);
355 
356   char cs[20];
357   // CHECK: call i32 @__atomic_is_lock_free(i32 4, {{.*}})
358   __atomic_is_lock_free(4, cs+1);
359 
360   // CHECK-NOT: call
361   __atomic_always_lock_free(3, 0);
362   __atomic_always_lock_free(16, 0);
363   __atomic_always_lock_free(17, 0);
364   __atomic_always_lock_free(16, &sixteen);
365   __atomic_always_lock_free(17, &seventeen);
366 
367   int n;
368   __atomic_is_lock_free(4, &n);
369 
370   // CHECK: ret i32 1
371   return __c11_atomic_is_lock_free(sizeof(_Atomic(int)));
372 }
373 
374 // Tests for atomic operations on big values.  These should call the functions
375 // defined here:
376 // http://gcc.gnu.org/wiki/Atomic/GCCMM/LIbrary#The_Library_interface
377 
378 struct foo {
379   int big[128];
380 };
381 struct bar {
382   char c[3];
383 };
384 
385 struct bar smallThing, thing1, thing2;
386 struct foo bigThing;
387 _Atomic(struct foo) bigAtomic;
388 
389 void structAtomicStore() {
390   // CHECK-LABEL: @structAtomicStore
391   struct foo f = {0};
392   struct bar b = {0};
393   __atomic_store(&smallThing, &b, 5);
394   // CHECK: call void @__atomic_store(i32 3, i8* {{.*}} @smallThing
395 
396   __atomic_store(&bigThing, &f, 5);
397   // CHECK: call void @__atomic_store(i32 512, i8* {{.*}} @bigThing
398 }
399 void structAtomicLoad() {
400   // CHECK-LABEL: @structAtomicLoad
401   struct bar b;
402   __atomic_load(&smallThing, &b, 5);
403   // CHECK: call void @__atomic_load(i32 3, i8* {{.*}} @smallThing
404 
405   struct foo f = {0};
406   __atomic_load(&bigThing, &f, 5);
407   // CHECK: call void @__atomic_load(i32 512, i8* {{.*}} @bigThing
408 }
409 struct foo structAtomicExchange() {
410   // CHECK-LABEL: @structAtomicExchange
411   struct foo f = {0};
412   struct foo old;
413   __atomic_exchange(&f, &bigThing, &old, 5);
414   // CHECK: call void @__atomic_exchange(i32 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*),
415 
416   return __c11_atomic_exchange(&bigAtomic, f, 5);
417   // CHECK: call void @__atomic_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*),
418 }
419 int structAtomicCmpExchange() {
420   // CHECK-LABEL: @structAtomicCmpExchange
421   // CHECK: %[[x_mem:.*]] = alloca i8
422   _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5);
423   // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2
424   // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8
425   // CHECK: store i8 %[[zext1]], i8* %[[x_mem]], align 1
426   // CHECK: %[[x:.*]] = load i8, i8* %[[x_mem]]
427   // CHECK: %[[x_bool:.*]] = trunc i8 %[[x]] to i1
428   // CHECK: %[[conv1:.*]] = zext i1 %[[x_bool]] to i32
429 
430   struct foo f = {0};
431   struct foo g = {0};
432   g.big[12] = 12;
433   return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5);
434   // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*),
435   // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32
436   // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]]
437   // CHECK: ret i32 %[[and]]
438 }
439 
440 // Check that no atomic operations are used in any initialisation of _Atomic
441 // types.
442 _Atomic(int) atomic_init_i = 42;
443 
444 // CHECK-LABEL: @atomic_init_foo
445 void atomic_init_foo()
446 {
447   // CHECK-NOT: }
448   // CHECK-NOT: atomic
449   // CHECK: store
450   _Atomic(int) j = 12;
451 
452   // CHECK-NOT: }
453   // CHECK-NOT: atomic
454   // CHECK: store
455   __c11_atomic_init(&j, 42);
456 
457   // CHECK-NOT: atomic
458   // CHECK: }
459 }
460 
461 // CHECK-LABEL: @failureOrder
462 void failureOrder(_Atomic(int) *ptr, int *ptr2) {
463   __c11_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed);
464   // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acquire monotonic
465 
466   __c11_atomic_compare_exchange_weak(ptr, ptr2, 43, memory_order_seq_cst, memory_order_acquire);
467   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst acquire
468 
469   // Unknown ordering: conservatively pick strongest valid option (for now!).
470   __atomic_compare_exchange(ptr2, ptr2, ptr2, 0, memory_order_acq_rel, *ptr2);
471   // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acq_rel acquire
472 
473   // Undefined behaviour: don't really care what that last ordering is so leave
474   // it out:
475   __atomic_compare_exchange_n(ptr2, ptr2, 43, 1, memory_order_seq_cst, 42);
476   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst
477 }
478 
479 // CHECK-LABEL: @generalFailureOrder
480 void generalFailureOrder(_Atomic(int) *ptr, int *ptr2, int success, int fail) {
481   __c11_atomic_compare_exchange_strong(ptr, ptr2, 42, success, fail);
482   // CHECK: switch i32 {{.*}}, label %[[MONOTONIC:[0-9a-zA-Z._]+]] [
483   // CHECK-NEXT: i32 1, label %[[ACQUIRE:[0-9a-zA-Z._]+]]
484   // CHECK-NEXT: i32 2, label %[[ACQUIRE]]
485   // CHECK-NEXT: i32 3, label %[[RELEASE:[0-9a-zA-Z._]+]]
486   // CHECK-NEXT: i32 4, label %[[ACQREL:[0-9a-zA-Z._]+]]
487   // CHECK-NEXT: i32 5, label %[[SEQCST:[0-9a-zA-Z._]+]]
488 
489   // CHECK: [[MONOTONIC]]
490   // CHECK: switch {{.*}}, label %[[MONOTONIC_MONOTONIC:[0-9a-zA-Z._]+]] [
491   // CHECK-NEXT: ]
492 
493   // CHECK: [[ACQUIRE]]
494   // CHECK: switch {{.*}}, label %[[ACQUIRE_MONOTONIC:[0-9a-zA-Z._]+]] [
495   // CHECK-NEXT: i32 1, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
496   // CHECK-NEXT: i32 2, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
497   // CHECK-NEXT: ]
498 
499   // CHECK: [[RELEASE]]
500   // CHECK: switch {{.*}}, label %[[RELEASE_MONOTONIC:[0-9a-zA-Z._]+]] [
501   // CHECK-NEXT: ]
502 
503   // CHECK: [[ACQREL]]
504   // CHECK: switch {{.*}}, label %[[ACQREL_MONOTONIC:[0-9a-zA-Z._]+]] [
505   // CHECK-NEXT: i32 1, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
506   // CHECK-NEXT: i32 2, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
507   // CHECK-NEXT: ]
508 
509   // CHECK: [[SEQCST]]
510   // CHECK: switch {{.*}}, label %[[SEQCST_MONOTONIC:[0-9a-zA-Z._]+]] [
511   // CHECK-NEXT: i32 1, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]
512   // CHECK-NEXT: i32 2, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]
513   // CHECK-NEXT: i32 5, label %[[SEQCST_SEQCST:[0-9a-zA-Z._]+]]
514   // CHECK-NEXT: ]
515 
516   // CHECK: [[MONOTONIC_MONOTONIC]]
517   // CHECK: cmpxchg {{.*}} monotonic monotonic
518   // CHECK: br
519 
520   // CHECK: [[ACQUIRE_MONOTONIC]]
521   // CHECK: cmpxchg {{.*}} acquire monotonic
522   // CHECK: br
523 
524   // CHECK: [[ACQUIRE_ACQUIRE]]
525   // CHECK: cmpxchg {{.*}} acquire acquire
526   // CHECK: br
527 
528   // CHECK: [[ACQREL_MONOTONIC]]
529   // CHECK: cmpxchg {{.*}} acq_rel monotonic
530   // CHECK: br
531 
532   // CHECK: [[ACQREL_ACQUIRE]]
533   // CHECK: cmpxchg {{.*}} acq_rel acquire
534   // CHECK: br
535 
536   // CHECK: [[SEQCST_MONOTONIC]]
537   // CHECK: cmpxchg {{.*}} seq_cst monotonic
538   // CHECK: br
539 
540   // CHECK: [[SEQCST_ACQUIRE]]
541   // CHECK: cmpxchg {{.*}} seq_cst acquire
542   // CHECK: br
543 
544   // CHECK: [[SEQCST_SEQCST]]
545   // CHECK: cmpxchg {{.*}} seq_cst seq_cst
546   // CHECK: br
547 }
548 
549 void generalWeakness(int *ptr, int *ptr2, _Bool weak) {
550   __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_seq_cst, memory_order_seq_cst);
551   // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [
552   // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]
553 
554   // CHECK: [[STRONG]]
555   // CHECK-NOT: br
556   // CHECK: cmpxchg {{.*}} seq_cst seq_cst
557   // CHECK: br
558 
559   // CHECK: [[WEAK]]
560   // CHECK-NOT: br
561   // CHECK: cmpxchg weak {{.*}} seq_cst seq_cst
562   // CHECK: br
563 }
564 
565 // Having checked the flow in the previous two cases, we'll trust clang to
566 // combine them sanely.
567 void EMIT_ALL_THE_THINGS(int *ptr, int *ptr2, int new, _Bool weak, int success, int fail) {
568   __atomic_compare_exchange(ptr, ptr2, &new, weak, success, fail);
569 
570   // CHECK: = cmpxchg {{.*}} monotonic monotonic
571   // CHECK: = cmpxchg weak {{.*}} monotonic monotonic
572   // CHECK: = cmpxchg {{.*}} acquire monotonic
573   // CHECK: = cmpxchg {{.*}} acquire acquire
574   // CHECK: = cmpxchg weak {{.*}} acquire monotonic
575   // CHECK: = cmpxchg weak {{.*}} acquire acquire
576   // CHECK: = cmpxchg {{.*}} release monotonic
577   // CHECK: = cmpxchg weak {{.*}} release monotonic
578   // CHECK: = cmpxchg {{.*}} acq_rel monotonic
579   // CHECK: = cmpxchg {{.*}} acq_rel acquire
580   // CHECK: = cmpxchg weak {{.*}} acq_rel monotonic
581   // CHECK: = cmpxchg weak {{.*}} acq_rel acquire
582   // CHECK: = cmpxchg {{.*}} seq_cst monotonic
583   // CHECK: = cmpxchg {{.*}} seq_cst acquire
584   // CHECK: = cmpxchg {{.*}} seq_cst seq_cst
585   // CHECK: = cmpxchg weak {{.*}} seq_cst monotonic
586   // CHECK: = cmpxchg weak {{.*}} seq_cst acquire
587   // CHECK: = cmpxchg weak {{.*}} seq_cst seq_cst
588 }
589 
590 int PR21643() {
591   return __atomic_or_fetch((int __attribute__((address_space(257))) *)0x308, 1,
592                            __ATOMIC_RELAXED);
593   // CHECK: %[[atomictmp:.*]] = alloca i32, align 4
594   // CHECK: %[[atomicdst:.*]] = alloca i32, align 4
595   // CHECK: store i32 1, i32* %[[atomictmp]]
596   // CHECK: %[[one:.*]] = load i32, i32* %[[atomictmp]], align 4
597   // CHECK: %[[old:.*]] = atomicrmw or i32 addrspace(257)* inttoptr (i32 776 to i32 addrspace(257)*), i32 %[[one]] monotonic
598   // CHECK: %[[new:.*]] = or i32 %[[old]], %[[one]]
599   // CHECK: store i32 %[[new]], i32* %[[atomicdst]], align 4
600   // CHECK: %[[ret:.*]] = load i32, i32* %[[atomicdst]], align 4
601   // CHECK: ret i32 %[[ret]]
602 }
603 
604 int PR17306_1(volatile _Atomic(int) *i) {
605   // CHECK-LABEL: @PR17306_1
606   // CHECK:      %[[i_addr:.*]] = alloca i32
607   // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
608   // CHECK-NEXT: store i32* %i, i32** %[[i_addr]]
609   // CHECK-NEXT: %[[addr:.*]] = load i32*, i32** %[[i_addr]]
610   // CHECK-NEXT: %[[res:.*]] = load atomic volatile i32, i32* %[[addr]] seq_cst
611   // CHECK-NEXT: store i32 %[[res]], i32* %[[atomicdst]]
612   // CHECK-NEXT: %[[retval:.*]] = load i32, i32* %[[atomicdst]]
613   // CHECK-NEXT: ret i32 %[[retval]]
614   return __c11_atomic_load(i, memory_order_seq_cst);
615 }
616 
617 int PR17306_2(volatile int *i, int value) {
618   // CHECK-LABEL: @PR17306_2
619   // CHECK:      %[[i_addr:.*]] = alloca i32*
620   // CHECK-NEXT: %[[value_addr:.*]] = alloca i32
621   // CHECK-NEXT: %[[atomictmp:.*]] = alloca i32
622   // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
623   // CHECK-NEXT: store i32* %i, i32** %[[i_addr]]
624   // CHECK-NEXT: store i32 %value, i32* %[[value_addr]]
625   // CHECK-NEXT: %[[i_lval:.*]] = load i32*, i32** %[[i_addr]]
626   // CHECK-NEXT: %[[value:.*]] = load i32, i32* %[[value_addr]]
627   // CHECK-NEXT: store i32 %[[value]], i32* %[[atomictmp]]
628   // CHECK-NEXT: %[[value_lval:.*]] = load i32, i32* %[[atomictmp]]
629   // CHECK-NEXT: %[[old_val:.*]] = atomicrmw volatile add i32* %[[i_lval]], i32 %[[value_lval]] seq_cst
630   // CHECK-NEXT: %[[new_val:.*]] = add i32 %[[old_val]], %[[value_lval]]
631   // CHECK-NEXT: store i32 %[[new_val]], i32* %[[atomicdst]]
632   // CHECK-NEXT: %[[retval:.*]] = load i32, i32* %[[atomicdst]]
633   // CHECK-NEXT: ret i32 %[[retval]]
634   return __atomic_add_fetch(i, value, memory_order_seq_cst);
635 }
636 
637 #endif
638