1 // RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -triple=i686-apple-darwin9 | FileCheck %s
2 // REQUIRES: x86-registered-target
3 
4 // Also test serialization of atomic operations here, to avoid duplicating the
5 // test.
6 // RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -triple=i686-apple-darwin9
7 // RUN: %clang_cc1 %s -include-pch %t -ffreestanding -triple=i686-apple-darwin9 -emit-llvm -o - | FileCheck %s
8 #ifndef ALREADY_INCLUDED
9 #define ALREADY_INCLUDED
10 
11 #include <stdatomic.h>
12 
13 // Basic IRGen tests for __c11_atomic_* and GNU __atomic_*
14 
15 int fi1(_Atomic(int) *i) {
16   // CHECK-LABEL: @fi1
17   // CHECK: load atomic i32, i32* {{.*}} seq_cst
18   return __c11_atomic_load(i, memory_order_seq_cst);
19 }
20 
21 int fi1a(int *i) {
22   // CHECK-LABEL: @fi1a
23   // CHECK: load atomic i32, i32* {{.*}} seq_cst
24   int v;
25   __atomic_load(i, &v, memory_order_seq_cst);
26   return v;
27 }
28 
29 int fi1b(int *i) {
30   // CHECK-LABEL: @fi1b
31   // CHECK: load atomic i32, i32* {{.*}} seq_cst
32   return __atomic_load_n(i, memory_order_seq_cst);
33 }
34 
35 int fi1c(atomic_int *i) {
36   // CHECK-LABEL: @fi1c
37   // CHECK: load atomic i32, i32* {{.*}} seq_cst
38   return atomic_load(i);
39 }
40 
41 void fi2(_Atomic(int) *i) {
42   // CHECK-LABEL: @fi2
43   // CHECK: store atomic i32 {{.*}} seq_cst
44   __c11_atomic_store(i, 1, memory_order_seq_cst);
45 }
46 
47 void fi2a(int *i) {
48   // CHECK-LABEL: @fi2a
49   // CHECK: store atomic i32 {{.*}} seq_cst
50   int v = 1;
51   __atomic_store(i, &v, memory_order_seq_cst);
52 }
53 
54 void fi2b(int *i) {
55   // CHECK-LABEL: @fi2b
56   // CHECK: store atomic i32 {{.*}} seq_cst
57   __atomic_store_n(i, 1, memory_order_seq_cst);
58 }
59 
60 void fi2c(atomic_int *i) {
61   // CHECK-LABEL: @fi2c
62   // CHECK: store atomic i32 {{.*}} seq_cst
63   atomic_store(i, 1);
64 }
65 
66 int fi3(_Atomic(int) *i) {
67   // CHECK-LABEL: @fi3
68   // CHECK: atomicrmw and
69   // CHECK-NOT: and
70   return __c11_atomic_fetch_and(i, 1, memory_order_seq_cst);
71 }
72 
73 int fi3a(int *i) {
74   // CHECK-LABEL: @fi3a
75   // CHECK: atomicrmw xor
76   // CHECK-NOT: xor
77   return __atomic_fetch_xor(i, 1, memory_order_seq_cst);
78 }
79 
80 int fi3b(int *i) {
81   // CHECK-LABEL: @fi3b
82   // CHECK: atomicrmw add
83   // CHECK: add
84   return __atomic_add_fetch(i, 1, memory_order_seq_cst);
85 }
86 
87 int fi3c(int *i) {
88   // CHECK-LABEL: @fi3c
89   // CHECK: atomicrmw nand
90   // CHECK-NOT: and
91   return __atomic_fetch_nand(i, 1, memory_order_seq_cst);
92 }
93 
94 int fi3d(int *i) {
95   // CHECK-LABEL: @fi3d
96   // CHECK: atomicrmw nand
97   // CHECK: and
98   // CHECK: xor
99   return __atomic_nand_fetch(i, 1, memory_order_seq_cst);
100 }
101 
102 int fi3e(atomic_int *i) {
103   // CHECK-LABEL: @fi3e
104   // CHECK: atomicrmw or
105   // CHECK-NOT: {{ or }}
106   return atomic_fetch_or(i, 1);
107 }
108 
109 int fi3f(int *i) {
110   // CHECK-LABEL: @fi3f
111   // CHECK-NOT: store volatile
112   // CHECK: atomicrmw or
113   // CHECK-NOT: {{ or }}
114   return __atomic_fetch_or(i, (short)1, memory_order_seq_cst);
115 }
116 
117 _Bool fi4(_Atomic(int) *i) {
118   // CHECK-LABEL: @fi4(
119   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
120   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
121   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
122   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
123   // CHECK: store i32 [[OLD]]
124   int cmp = 0;
125   return __c11_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_acquire, memory_order_acquire);
126 }
127 
128 _Bool fi4a(int *i) {
129   // CHECK-LABEL: @fi4a
130   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
131   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
132   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
133   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
134   // CHECK: store i32 [[OLD]]
135   int cmp = 0;
136   int desired = 1;
137   return __atomic_compare_exchange(i, &cmp, &desired, 0, memory_order_acquire, memory_order_acquire);
138 }
139 
140 _Bool fi4b(int *i) {
141   // CHECK-LABEL: @fi4b(
142   // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg weak i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]]
143   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
144   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
145   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
146   // CHECK: store i32 [[OLD]]
147   int cmp = 0;
148   return __atomic_compare_exchange_n(i, &cmp, 1, 1, memory_order_acquire, memory_order_acquire);
149 }
150 
151 _Bool fi4c(atomic_int *i) {
152   // CHECK-LABEL: @fi4c
153   // CHECK: cmpxchg i32*
154   int cmp = 0;
155   return atomic_compare_exchange_strong(i, &cmp, 1);
156 }
157 
158 float ff1(_Atomic(float) *d) {
159   // CHECK-LABEL: @ff1
160   // CHECK: load atomic i32, i32* {{.*}} monotonic
161   return __c11_atomic_load(d, memory_order_relaxed);
162 }
163 
164 void ff2(_Atomic(float) *d) {
165   // CHECK-LABEL: @ff2
166   // CHECK: store atomic i32 {{.*}} release
167   __c11_atomic_store(d, 1, memory_order_release);
168 }
169 
170 float ff3(_Atomic(float) *d) {
171   return __c11_atomic_exchange(d, 2, memory_order_seq_cst);
172 }
173 
174 struct S {
175   double x;
176 };
177 
178 struct S fd1(struct S *a) {
179   // CHECK-LABEL: @fd1
180   // CHECK: [[RETVAL:%.*]] = alloca %struct.S, align 4
181   // CHECK: [[RET:%.*]]    = alloca %struct.S, align 4
182   // CHECK: [[CALL:%.*]]   = call i64 @__atomic_load_8(
183   // CHECK: [[CAST:%.*]]   = bitcast %struct.S* [[RET]] to i64*
184   // CHECK: store i64 [[CALL]], i64* [[CAST]], align 4
185   struct S ret;
186   __atomic_load(a, &ret, memory_order_seq_cst);
187   return ret;
188 }
189 
190 void fd2(struct S *a, struct S *b) {
191   // CHECK-LABEL: @fd2
192   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
193   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
194   // CHECK-NEXT: store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
195   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
196   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
197   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
198   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i8*
199   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64*
200   // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, i64* [[COERCED_B]], align 4
201   // CHECK-NEXT: call void @__atomic_store_8(i8* [[COERCED_A]], i64 [[LOAD_B]],
202   // CHECK-NEXT: ret void
203   __atomic_store(a, b, memory_order_seq_cst);
204 }
205 
206 void fd3(struct S *a, struct S *b, struct S *c) {
207   // CHECK-LABEL: @fd3
208   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
209   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
210   // CHECK-NEXT: [[C_ADDR:%.*]] = alloca %struct.S*, align 4
211   // CHECK-NEXT: store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
212   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
213   // CHECK-NEXT: store %struct.S* %c, %struct.S** [[C_ADDR]], align 4
214   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
215   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
216   // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load %struct.S*, %struct.S** [[C_ADDR]], align 4
217   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i8*
218   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i64*
219   // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, i64* [[COERCED_B]], align 4
220   // CHECK-NEXT: [[CALL:%.*]] = call i64 @__atomic_exchange_8(i8* [[COERCED_A]], i64 [[LOAD_B]],
221   // CHECK-NEXT: [[COERCED_C:%.*]] = bitcast %struct.S* [[LOAD_C_PTR]] to i64*
222   // CHECK-NEXT: store i64 [[CALL]], i64* [[COERCED_C]], align 4
223 
224   __atomic_exchange(a, b, c, memory_order_seq_cst);
225 }
226 
227 _Bool fd4(struct S *a, struct S *b, struct S *c) {
228   // CHECK-LABEL: @fd4
229   // CHECK:      [[A_ADDR:%.*]] = alloca %struct.S*, align 4
230   // CHECK-NEXT: [[B_ADDR:%.*]] = alloca %struct.S*, align 4
231   // CHECK-NEXT: [[C_ADDR:%.*]] = alloca %struct.S*, align 4
232   // CHECK:      store %struct.S* %a, %struct.S** [[A_ADDR]], align 4
233   // CHECK-NEXT: store %struct.S* %b, %struct.S** [[B_ADDR]], align 4
234   // CHECK-NEXT: store %struct.S* %c, %struct.S** [[C_ADDR]], align 4
235   // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load %struct.S*, %struct.S** [[A_ADDR]], align 4
236   // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load %struct.S*, %struct.S** [[B_ADDR]], align 4
237   // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load %struct.S*, %struct.S** [[C_ADDR]], align 4
238   // CHECK-NEXT: [[COERCED_A:%.*]] = bitcast %struct.S* [[LOAD_A_PTR]] to i8*
239   // CHECK-NEXT: [[COERCED_B:%.*]] = bitcast %struct.S* [[LOAD_B_PTR]] to i8*
240   // CHECK-NEXT: [[COERCED_C:%.*]] = bitcast %struct.S* [[LOAD_C_PTR]] to i64*
241   // CHECK-NEXT: [[LOAD_C:%.*]] = load i64, i64* [[COERCED_C]], align 4
242   // CHECK-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange_8(i8* [[COERCED_A]], i8* [[COERCED_B]], i64 [[LOAD_C]]
243   // CHECK-NEXT: ret i1 [[CALL]]
244   return __atomic_compare_exchange(a, b, c, 1, 5, 5);
245 }
246 
247 int* fp1(_Atomic(int*) *p) {
248   // CHECK-LABEL: @fp1
249   // CHECK: load atomic i32, i32* {{.*}} seq_cst
250   return __c11_atomic_load(p, memory_order_seq_cst);
251 }
252 
253 int* fp2(_Atomic(int*) *p) {
254   // CHECK-LABEL: @fp2
255   // CHECK: store i32 4
256   // CHECK: atomicrmw add {{.*}} monotonic
257   return __c11_atomic_fetch_add(p, 1, memory_order_relaxed);
258 }
259 
260 int *fp2a(int **p) {
261   // CHECK-LABEL: @fp2a
262   // CHECK: store i32 4
263   // CHECK: atomicrmw sub {{.*}} monotonic
264   // Note, the GNU builtins do not multiply by sizeof(T)!
265   return __atomic_fetch_sub(p, 4, memory_order_relaxed);
266 }
267 
268 _Complex float fc(_Atomic(_Complex float) *c) {
269   // CHECK-LABEL: @fc
270   // CHECK: atomicrmw xchg i64*
271   return __c11_atomic_exchange(c, 2, memory_order_seq_cst);
272 }
273 
274 typedef struct X { int x; } X;
275 X fs(_Atomic(X) *c) {
276   // CHECK-LABEL: @fs
277   // CHECK: atomicrmw xchg i32*
278   return __c11_atomic_exchange(c, (X){2}, memory_order_seq_cst);
279 }
280 
281 X fsa(X *c, X *d) {
282   // CHECK-LABEL: @fsa
283   // CHECK: atomicrmw xchg i32*
284   X ret;
285   __atomic_exchange(c, d, &ret, memory_order_seq_cst);
286   return ret;
287 }
288 
289 _Bool fsb(_Bool *c) {
290   // CHECK-LABEL: @fsb
291   // CHECK: atomicrmw xchg i8*
292   return __atomic_exchange_n(c, 1, memory_order_seq_cst);
293 }
294 
295 char flag1;
296 volatile char flag2;
297 void test_and_set() {
298   // CHECK: atomicrmw xchg i8* @flag1, i8 1 seq_cst
299   __atomic_test_and_set(&flag1, memory_order_seq_cst);
300   // CHECK: atomicrmw volatile xchg i8* @flag2, i8 1 acquire
301   __atomic_test_and_set(&flag2, memory_order_acquire);
302   // CHECK: store atomic volatile i8 0, i8* @flag2 release
303   __atomic_clear(&flag2, memory_order_release);
304   // CHECK: store atomic i8 0, i8* @flag1 seq_cst
305   __atomic_clear(&flag1, memory_order_seq_cst);
306 }
307 
308 struct Sixteen {
309   char c[16];
310 } sixteen;
311 struct Seventeen {
312   char c[17];
313 } seventeen;
314 
315 int lock_free(struct Incomplete *incomplete) {
316   // CHECK-LABEL: @lock_free
317 
318   // CHECK: call i32 @__atomic_is_lock_free(i32 3, i8* null)
319   __c11_atomic_is_lock_free(3);
320 
321   // CHECK: call i32 @__atomic_is_lock_free(i32 16, i8* {{.*}}@sixteen{{.*}})
322   __atomic_is_lock_free(16, &sixteen);
323 
324   // CHECK: call i32 @__atomic_is_lock_free(i32 17, i8* {{.*}}@seventeen{{.*}})
325   __atomic_is_lock_free(17, &seventeen);
326 
327   // CHECK: call i32 @__atomic_is_lock_free(i32 4, {{.*}})
328   __atomic_is_lock_free(4, incomplete);
329 
330   char cs[20];
331   // CHECK: call i32 @__atomic_is_lock_free(i32 4, {{.*}})
332   __atomic_is_lock_free(4, cs+1);
333 
334   // CHECK-NOT: call
335   __atomic_always_lock_free(3, 0);
336   __atomic_always_lock_free(16, 0);
337   __atomic_always_lock_free(17, 0);
338   __atomic_always_lock_free(16, &sixteen);
339   __atomic_always_lock_free(17, &seventeen);
340 
341   int n;
342   __atomic_is_lock_free(4, &n);
343 
344   // CHECK: ret i32 1
345   return __c11_atomic_is_lock_free(sizeof(_Atomic(int)));
346 }
347 
348 // Tests for atomic operations on big values.  These should call the functions
349 // defined here:
350 // http://gcc.gnu.org/wiki/Atomic/GCCMM/LIbrary#The_Library_interface
351 
352 struct foo {
353   int big[128];
354 };
355 struct bar {
356   char c[3];
357 };
358 
359 struct bar smallThing, thing1, thing2;
360 struct foo bigThing;
361 _Atomic(struct foo) bigAtomic;
362 
363 void structAtomicStore() {
364   // CHECK-LABEL: @structAtomicStore
365   struct foo f = {0};
366   struct bar b = {0};
367   __atomic_store(&smallThing, &b, 5);
368   // CHECK: call void @__atomic_store(i32 3, i8* {{.*}} @smallThing
369 
370   __atomic_store(&bigThing, &f, 5);
371   // CHECK: call void @__atomic_store(i32 512, i8* {{.*}} @bigThing
372 }
373 void structAtomicLoad() {
374   // CHECK-LABEL: @structAtomicLoad
375   struct bar b;
376   __atomic_load(&smallThing, &b, 5);
377   // CHECK: call void @__atomic_load(i32 3, i8* {{.*}} @smallThing
378 
379   struct foo f = {0};
380   __atomic_load(&bigThing, &f, 5);
381   // CHECK: call void @__atomic_load(i32 512, i8* {{.*}} @bigThing
382 }
383 struct foo structAtomicExchange() {
384   // CHECK-LABEL: @structAtomicExchange
385   struct foo f = {0};
386   struct foo old;
387   __atomic_exchange(&f, &bigThing, &old, 5);
388   // CHECK: call void @__atomic_exchange(i32 512, {{.*}}, i8* bitcast ({{.*}} @bigThing to i8*),
389 
390   return __c11_atomic_exchange(&bigAtomic, f, 5);
391   // CHECK: call void @__atomic_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*),
392 }
393 int structAtomicCmpExchange() {
394   // CHECK-LABEL: @structAtomicCmpExchange
395   // CHECK: %[[x_mem:.*]] = alloca i8
396   _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5);
397   // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2
398   // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8
399   // CHECK: store i8 %[[zext1]], i8* %[[x_mem]], align 1
400   // CHECK: %[[x:.*]] = load i8, i8* %[[x_mem]]
401   // CHECK: %[[x_bool:.*]] = trunc i8 %[[x]] to i1
402   // CHECK: %[[conv1:.*]] = zext i1 %[[x_bool]] to i32
403 
404   struct foo f = {0};
405   struct foo g = {0};
406   g.big[12] = 12;
407   return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5);
408   // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 512, i8* bitcast ({{.*}} @bigAtomic to i8*),
409   // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32
410   // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]]
411   // CHECK: ret i32 %[[and]]
412 }
413 
414 // Check that no atomic operations are used in any initialisation of _Atomic
415 // types.
416 _Atomic(int) atomic_init_i = 42;
417 
418 // CHECK-LABEL: @atomic_init_foo
419 void atomic_init_foo()
420 {
421   // CHECK-NOT: }
422   // CHECK-NOT: atomic
423   // CHECK: store
424   _Atomic(int) j = 12;
425 
426   // CHECK-NOT: }
427   // CHECK-NOT: atomic
428   // CHECK: store
429   __c11_atomic_init(&j, 42);
430 
431   // CHECK-NOT: atomic
432   // CHECK: }
433 }
434 
435 // CHECK-LABEL: @failureOrder
436 void failureOrder(_Atomic(int) *ptr, int *ptr2) {
437   __c11_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed);
438   // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acquire monotonic
439 
440   __c11_atomic_compare_exchange_weak(ptr, ptr2, 43, memory_order_seq_cst, memory_order_acquire);
441   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst acquire
442 
443   // Unknown ordering: conservatively pick strongest valid option (for now!).
444   __atomic_compare_exchange(ptr2, ptr2, ptr2, 0, memory_order_acq_rel, *ptr2);
445   // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acq_rel acquire
446 
447   // Undefined behaviour: don't really care what that last ordering is so leave
448   // it out:
449   __atomic_compare_exchange_n(ptr2, ptr2, 43, 1, memory_order_seq_cst, 42);
450   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst
451 }
452 
453 // CHECK-LABEL: @generalFailureOrder
454 void generalFailureOrder(_Atomic(int) *ptr, int *ptr2, int success, int fail) {
455   __c11_atomic_compare_exchange_strong(ptr, ptr2, 42, success, fail);
456   // CHECK: switch i32 {{.*}}, label %[[MONOTONIC:[0-9a-zA-Z._]+]] [
457   // CHECK-NEXT: i32 1, label %[[ACQUIRE:[0-9a-zA-Z._]+]]
458   // CHECK-NEXT: i32 2, label %[[ACQUIRE]]
459   // CHECK-NEXT: i32 3, label %[[RELEASE:[0-9a-zA-Z._]+]]
460   // CHECK-NEXT: i32 4, label %[[ACQREL:[0-9a-zA-Z._]+]]
461   // CHECK-NEXT: i32 5, label %[[SEQCST:[0-9a-zA-Z._]+]]
462 
463   // CHECK: [[MONOTONIC]]
464   // CHECK: switch {{.*}}, label %[[MONOTONIC_MONOTONIC:[0-9a-zA-Z._]+]] [
465   // CHECK-NEXT: ]
466 
467   // CHECK: [[ACQUIRE]]
468   // CHECK: switch {{.*}}, label %[[ACQUIRE_MONOTONIC:[0-9a-zA-Z._]+]] [
469   // CHECK-NEXT: i32 1, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
470   // CHECK-NEXT: i32 2, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
471   // CHECK-NEXT: ]
472 
473   // CHECK: [[RELEASE]]
474   // CHECK: switch {{.*}}, label %[[RELEASE_MONOTONIC:[0-9a-zA-Z._]+]] [
475   // CHECK-NEXT: ]
476 
477   // CHECK: [[ACQREL]]
478   // CHECK: switch {{.*}}, label %[[ACQREL_MONOTONIC:[0-9a-zA-Z._]+]] [
479   // CHECK-NEXT: i32 1, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
480   // CHECK-NEXT: i32 2, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
481   // CHECK-NEXT: ]
482 
483   // CHECK: [[SEQCST]]
484   // CHECK: switch {{.*}}, label %[[SEQCST_MONOTONIC:[0-9a-zA-Z._]+]] [
485   // CHECK-NEXT: i32 1, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]
486   // CHECK-NEXT: i32 2, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]
487   // CHECK-NEXT: i32 5, label %[[SEQCST_SEQCST:[0-9a-zA-Z._]+]]
488   // CHECK-NEXT: ]
489 
490   // CHECK: [[MONOTONIC_MONOTONIC]]
491   // CHECK: cmpxchg {{.*}} monotonic monotonic
492   // CHECK: br
493 
494   // CHECK: [[ACQUIRE_MONOTONIC]]
495   // CHECK: cmpxchg {{.*}} acquire monotonic
496   // CHECK: br
497 
498   // CHECK: [[ACQUIRE_ACQUIRE]]
499   // CHECK: cmpxchg {{.*}} acquire acquire
500   // CHECK: br
501 
502   // CHECK: [[ACQREL_MONOTONIC]]
503   // CHECK: cmpxchg {{.*}} acq_rel monotonic
504   // CHECK: br
505 
506   // CHECK: [[ACQREL_ACQUIRE]]
507   // CHECK: cmpxchg {{.*}} acq_rel acquire
508   // CHECK: br
509 
510   // CHECK: [[SEQCST_MONOTONIC]]
511   // CHECK: cmpxchg {{.*}} seq_cst monotonic
512   // CHECK: br
513 
514   // CHECK: [[SEQCST_ACQUIRE]]
515   // CHECK: cmpxchg {{.*}} seq_cst acquire
516   // CHECK: br
517 
518   // CHECK: [[SEQCST_SEQCST]]
519   // CHECK: cmpxchg {{.*}} seq_cst seq_cst
520   // CHECK: br
521 }
522 
523 void generalWeakness(int *ptr, int *ptr2, _Bool weak) {
524   __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_seq_cst, memory_order_seq_cst);
525   // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [
526   // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]
527 
528   // CHECK: [[STRONG]]
529   // CHECK-NOT: br
530   // CHECK: cmpxchg {{.*}} seq_cst seq_cst
531   // CHECK: br
532 
533   // CHECK: [[WEAK]]
534   // CHECK-NOT: br
535   // CHECK: cmpxchg weak {{.*}} seq_cst seq_cst
536   // CHECK: br
537 }
538 
539 // Having checked the flow in the previous two cases, we'll trust clang to
540 // combine them sanely.
541 void EMIT_ALL_THE_THINGS(int *ptr, int *ptr2, int new, _Bool weak, int success, int fail) {
542   __atomic_compare_exchange(ptr, ptr2, &new, weak, success, fail);
543 
544   // CHECK: = cmpxchg {{.*}} monotonic monotonic
545   // CHECK: = cmpxchg weak {{.*}} monotonic monotonic
546   // CHECK: = cmpxchg {{.*}} acquire monotonic
547   // CHECK: = cmpxchg {{.*}} acquire acquire
548   // CHECK: = cmpxchg weak {{.*}} acquire monotonic
549   // CHECK: = cmpxchg weak {{.*}} acquire acquire
550   // CHECK: = cmpxchg {{.*}} release monotonic
551   // CHECK: = cmpxchg weak {{.*}} release monotonic
552   // CHECK: = cmpxchg {{.*}} acq_rel monotonic
553   // CHECK: = cmpxchg {{.*}} acq_rel acquire
554   // CHECK: = cmpxchg weak {{.*}} acq_rel monotonic
555   // CHECK: = cmpxchg weak {{.*}} acq_rel acquire
556   // CHECK: = cmpxchg {{.*}} seq_cst monotonic
557   // CHECK: = cmpxchg {{.*}} seq_cst acquire
558   // CHECK: = cmpxchg {{.*}} seq_cst seq_cst
559   // CHECK: = cmpxchg weak {{.*}} seq_cst monotonic
560   // CHECK: = cmpxchg weak {{.*}} seq_cst acquire
561   // CHECK: = cmpxchg weak {{.*}} seq_cst seq_cst
562 }
563 
564 int PR21643() {
565   return __atomic_or_fetch((int __attribute__((address_space(257))) *)0x308, 1,
566                            __ATOMIC_RELAXED);
567   // CHECK: %[[atomictmp:.*]] = alloca i32, align 4
568   // CHECK: %[[atomicdst:.*]] = alloca i32, align 4
569   // CHECK: store i32 1, i32* %[[atomictmp]]
570   // CHECK: %[[one:.*]] = load i32, i32* %[[atomictmp]], align 4
571   // CHECK: %[[old:.*]] = atomicrmw or i32 addrspace(257)* inttoptr (i32 776 to i32 addrspace(257)*), i32 %[[one]] monotonic
572   // CHECK: %[[new:.*]] = or i32 %[[old]], %[[one]]
573   // CHECK: store i32 %[[new]], i32* %[[atomicdst]], align 4
574   // CHECK: %[[ret:.*]] = load i32, i32* %[[atomicdst]], align 4
575   // CHECK: ret i32 %[[ret]]
576 }
577 
578 int PR17306_1(volatile _Atomic(int) *i) {
579   // CHECK-LABEL: @PR17306_1
580   // CHECK:      %[[i_addr:.*]] = alloca i32
581   // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
582   // CHECK-NEXT: store i32* %i, i32** %[[i_addr]]
583   // CHECK-NEXT: %[[addr:.*]] = load i32*, i32** %[[i_addr]]
584   // CHECK-NEXT: %[[res:.*]] = load atomic volatile i32, i32* %[[addr]] seq_cst
585   // CHECK-NEXT: store i32 %[[res]], i32* %[[atomicdst]]
586   // CHECK-NEXT: %[[retval:.*]] = load i32, i32* %[[atomicdst]]
587   // CHECK-NEXT: ret i32 %[[retval]]
588   return __c11_atomic_load(i, memory_order_seq_cst);
589 }
590 
591 int PR17306_2(volatile int *i, int value) {
592   // CHECK-LABEL: @PR17306_2
593   // CHECK:      %[[i_addr:.*]] = alloca i32*
594   // CHECK-NEXT: %[[value_addr:.*]] = alloca i32
595   // CHECK-NEXT: %[[atomictmp:.*]] = alloca i32
596   // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
597   // CHECK-NEXT: store i32* %i, i32** %[[i_addr]]
598   // CHECK-NEXT: store i32 %value, i32* %[[value_addr]]
599   // CHECK-NEXT: %[[i_lval:.*]] = load i32*, i32** %[[i_addr]]
600   // CHECK-NEXT: %[[value:.*]] = load i32, i32* %[[value_addr]]
601   // CHECK-NEXT: store i32 %[[value]], i32* %[[atomictmp]]
602   // CHECK-NEXT: %[[value_lval:.*]] = load i32, i32* %[[atomictmp]]
603   // CHECK-NEXT: %[[old_val:.*]] = atomicrmw volatile add i32* %[[i_lval]], i32 %[[value_lval]] seq_cst
604   // CHECK-NEXT: %[[new_val:.*]] = add i32 %[[old_val]], %[[value_lval]]
605   // CHECK-NEXT: store i32 %[[new_val]], i32* %[[atomicdst]]
606   // CHECK-NEXT: %[[retval:.*]] = load i32, i32* %[[atomicdst]]
607   // CHECK-NEXT: ret i32 %[[retval]]
608   return __atomic_add_fetch(i, value, memory_order_seq_cst);
609 }
610 
611 #endif
612