1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
3 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
4 // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
5 // RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
6 // RUN: %clang_cc1 -triple powerpc64-unknown-aix \
7 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
8 // RUN: %clang_cc1 -triple powerpc-unknown-aix \
9 // RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
10 
11 extern vector float a;
12 extern vector float b;
13 extern vector float c;
14 extern vector double d;
15 extern vector double e;
16 extern vector double f;
17 
18 // CHECK-LABEL: @test_flags_recipdivf(
19 // CHECK:    [[TMP0:%.*]] = load <4 x float>, <4 x float>* @a, align 16
20 // CHECK-NEXT:    [[TMP1:%.*]] = load <4 x float>, <4 x float>* @b, align 16
21 // CHECK-NEXT:    [[TMP2:%.*]] = load <4 x float>, <4 x float>* @a, align 16
22 // CHECK-NEXT:    [[TMP3:%.*]] = load <4 x float>, <4 x float>* @b, align 16
23 // CHECK-NEXT:    [[RECIPDIV:%.*]] = fdiv fast <4 x float> [[TMP2]], [[TMP3]]
24 // CHECK-NEXT:    [[TMP4:%.*]] = load <4 x float>, <4 x float>* @c, align 16
25 // CHECK-NEXT:    [[ADD:%.*]] = fadd <4 x float> [[RECIPDIV]], [[TMP4]]
26 // CHECK-NEXT:    ret <4 x float> [[ADD]]
27 //
28 vector float test_flags_recipdivf() {
29   return __builtin_ppc_recipdivf(a, b) + c;
30 }
31 
32 // CHECK-LABEL: @test_flags_recipdivd(
33 // CHECK:    [[TMP0:%.*]] = load <2 x double>, <2 x double>* @d, align 16
34 // CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, <2 x double>* @e, align 16
35 // CHECK-NEXT:    [[TMP2:%.*]] = load <2 x double>, <2 x double>* @d, align 16
36 // CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, <2 x double>* @e, align 16
37 // CHECK-NEXT:    [[RECIPDIV:%.*]] = fdiv fast <2 x double> [[TMP2]], [[TMP3]]
38 // CHECK-NEXT:    [[TMP4:%.*]] = load <2 x double>, <2 x double>* @f, align 16
39 // CHECK-NEXT:    [[ADD:%.*]] = fadd <2 x double> [[RECIPDIV]], [[TMP4]]
40 // CHECK-NEXT:    ret <2 x double> [[ADD]]
41 //
42 vector double test_flags_recipdivd() {
43   return __builtin_ppc_recipdivd(d, e) + f;
44 }
45 
46 // CHECK-LABEL: @test_flags_rsqrtf(
47 // CHECK:    [[TMP0:%.*]] = load <4 x float>, <4 x float>* @a, align 16
48 // CHECK-NEXT:    [[TMP1:%.*]] = load <4 x float>, <4 x float>* @a, align 16
49 // CHECK-NEXT:    [[TMP2:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP1]])
50 // CHECK-NEXT:    [[RSQRT:%.*]] = fdiv fast <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, [[TMP2]]
51 // CHECK-NEXT:    [[TMP3:%.*]] = load <4 x float>, <4 x float>* @b, align 16
52 // CHECK-NEXT:    [[ADD:%.*]] = fadd <4 x float> [[RSQRT]], [[TMP3]]
53 // CHECK-NEXT:    ret <4 x float> [[ADD]]
54 //
55 vector float test_flags_rsqrtf() {
56   return __builtin_ppc_rsqrtf(a) + b;
57 }
58 
59 // CHECK-LABEL: @test_flags_rsqrtd(
60 // CHECK:    [[TMP0:%.*]] = load <2 x double>, <2 x double>* @d, align 16
61 // CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, <2 x double>* @d, align 16
62 // CHECK-NEXT:    [[TMP2:%.*]] = call fast <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP1]])
63 // CHECK-NEXT:    [[RSQRT:%.*]] = fdiv fast <2 x double> <double 1.000000e+00, double 1.000000e+00>, [[TMP2]]
64 // CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, <2 x double>* @e, align 16
65 // CHECK-NEXT:    [[ADD:%.*]] = fadd <2 x double> [[RSQRT]], [[TMP3]]
66 // CHECK-NEXT:    ret <2 x double> [[ADD]]
67 //
68 vector double test_flags_rsqrtd() {
69   return __builtin_ppc_rsqrtd(d) + e;
70 }
71