1 //===--- SystemZ.cpp - Implement SystemZ target feature support -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements SystemZ TargetInfo objects.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "SystemZ.h"
15 #include "clang/Basic/Builtins.h"
16 #include "clang/Basic/LangOptions.h"
17 #include "clang/Basic/MacroBuilder.h"
18 #include "clang/Basic/TargetBuiltins.h"
19 #include "llvm/ADT/StringSwitch.h"
20 
21 using namespace clang;
22 using namespace clang::targets;
23 
24 const Builtin::Info SystemZTargetInfo::BuiltinInfo[] = {
25 #define BUILTIN(ID, TYPE, ATTRS)                                               \
26   {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
27 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
28   {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
29 #include "clang/Basic/BuiltinsSystemZ.def"
30 };
31 
32 const char *const SystemZTargetInfo::GCCRegNames[] = {
33     "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
34     "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
35     "f0",  "f2",  "f4",  "f6",  "f1",  "f3",  "f5",  "f7",
36     "f8",  "f10", "f12", "f14", "f9",  "f11", "f13", "f15",
37     /*ap*/"", "cc", /*fp*/"", /*rp*/"", "a0",  "a1",
38     "v16", "v18", "v20", "v22", "v17", "v19", "v21", "v23",
39     "v24", "v26", "v28", "v30", "v25", "v27", "v29", "v31"
40 };
41 
42 const TargetInfo::AddlRegName GCCAddlRegNames[] = {
43     {{"v0"}, 16}, {{"v2"},  17}, {{"v4"},  18}, {{"v6"},  19},
44     {{"v1"}, 20}, {{"v3"},  21}, {{"v5"},  22}, {{"v7"},  23},
45     {{"v8"}, 24}, {{"v10"}, 25}, {{"v12"}, 26}, {{"v14"}, 27},
46     {{"v9"}, 28}, {{"v11"}, 29}, {{"v13"}, 30}, {{"v15"}, 31}
47 };
48 
49 ArrayRef<const char *> SystemZTargetInfo::getGCCRegNames() const {
50   return llvm::makeArrayRef(GCCRegNames);
51 }
52 
53 ArrayRef<TargetInfo::AddlRegName> SystemZTargetInfo::getGCCAddlRegNames() const {
54   return llvm::makeArrayRef(GCCAddlRegNames);
55 }
56 
57 bool SystemZTargetInfo::validateAsmConstraint(
58     const char *&Name, TargetInfo::ConstraintInfo &Info) const {
59   switch (*Name) {
60   default:
61     return false;
62 
63   case 'a': // Address register
64   case 'd': // Data register (equivalent to 'r')
65   case 'f': // Floating-point register
66   case 'v': // Vector register
67     Info.setAllowsRegister();
68     return true;
69 
70   case 'I': // Unsigned 8-bit constant
71   case 'J': // Unsigned 12-bit constant
72   case 'K': // Signed 16-bit constant
73   case 'L': // Signed 20-bit displacement (on all targets we support)
74   case 'M': // 0x7fffffff
75     return true;
76 
77   case 'Q': // Memory with base and unsigned 12-bit displacement
78   case 'R': // Likewise, plus an index
79   case 'S': // Memory with base and signed 20-bit displacement
80   case 'T': // Likewise, plus an index
81     Info.setAllowsMemory();
82     return true;
83   }
84 }
85 
86 struct ISANameRevision {
87   llvm::StringLiteral Name;
88   int ISARevisionID;
89 };
90 static constexpr ISANameRevision ISARevisions[] = {
91   {{"arch8"}, 8}, {{"z10"}, 8},
92   {{"arch9"}, 9}, {{"z196"}, 9},
93   {{"arch10"}, 10}, {{"zEC12"}, 10},
94   {{"arch11"}, 11}, {{"z13"}, 11},
95   {{"arch12"}, 12}, {{"z14"}, 12}
96 };
97 
98 int SystemZTargetInfo::getISARevision(StringRef Name) const {
99   const auto Rev =
100       llvm::find_if(ISARevisions, [Name](const ISANameRevision &CR) {
101         return CR.Name == Name;
102       });
103   if (Rev == std::end(ISARevisions))
104     return -1;
105   return Rev->ISARevisionID;
106 }
107 
108 void SystemZTargetInfo::fillValidCPUList(
109     SmallVectorImpl<StringRef> &Values) const {
110   for (const ISANameRevision &Rev : ISARevisions)
111     Values.push_back(Rev.Name);
112 }
113 
114 bool SystemZTargetInfo::hasFeature(StringRef Feature) const {
115   return llvm::StringSwitch<bool>(Feature)
116       .Case("systemz", true)
117       .Case("arch8", ISARevision >= 8)
118       .Case("arch9", ISARevision >= 9)
119       .Case("arch10", ISARevision >= 10)
120       .Case("arch11", ISARevision >= 11)
121       .Case("arch12", ISARevision >= 12)
122       .Case("htm", HasTransactionalExecution)
123       .Case("vx", HasVector)
124       .Default(false);
125 }
126 
127 void SystemZTargetInfo::getTargetDefines(const LangOptions &Opts,
128                                          MacroBuilder &Builder) const {
129   Builder.defineMacro("__s390__");
130   Builder.defineMacro("__s390x__");
131   Builder.defineMacro("__zarch__");
132   Builder.defineMacro("__LONG_DOUBLE_128__");
133 
134   Builder.defineMacro("__ARCH__", Twine(ISARevision));
135 
136   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
137   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
138   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
139   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
140 
141   if (HasTransactionalExecution)
142     Builder.defineMacro("__HTM__");
143   if (HasVector)
144     Builder.defineMacro("__VX__");
145   if (Opts.ZVector)
146     Builder.defineMacro("__VEC__", "10302");
147 }
148 
149 ArrayRef<Builtin::Info> SystemZTargetInfo::getTargetBuiltins() const {
150   return llvm::makeArrayRef(BuiltinInfo, clang::SystemZ::LastTSBuiltin -
151                                              Builtin::FirstTSBuiltin);
152 }
153