1 //===--- NVPTX.cpp - Implement NVPTX target feature support ---------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements NVPTX TargetInfo objects. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "NVPTX.h" 15 #include "Targets.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/MacroBuilder.h" 18 #include "clang/Basic/TargetBuiltins.h" 19 #include "llvm/ADT/StringSwitch.h" 20 21 using namespace clang; 22 using namespace clang::targets; 23 24 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = { 25 #define BUILTIN(ID, TYPE, ATTRS) \ 26 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, 27 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \ 28 {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr}, 29 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ 30 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE}, 31 #include "clang/Basic/BuiltinsNVPTX.def" 32 }; 33 34 const char *const NVPTXTargetInfo::GCCRegNames[] = {"r0"}; 35 36 NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple, 37 const TargetOptions &Opts, 38 unsigned TargetPointerWidth) 39 : TargetInfo(Triple) { 40 assert((TargetPointerWidth == 32 || TargetPointerWidth == 64) && 41 "NVPTX only supports 32- and 64-bit modes."); 42 43 PTXVersion = 32; 44 for (const StringRef Feature : Opts.FeaturesAsWritten) { 45 if (!Feature.startswith("+ptx")) 46 continue; 47 PTXVersion = llvm::StringSwitch<unsigned>(Feature) 48 .Case("+ptx61", 61) 49 .Case("+ptx60", 60) 50 .Case("+ptx50", 50) 51 .Case("+ptx43", 43) 52 .Case("+ptx42", 42) 53 .Case("+ptx41", 41) 54 .Case("+ptx40", 40) 55 .Case("+ptx32", 32) 56 .Default(32); 57 } 58 59 TLSSupported = false; 60 VLASupported = false; 61 AddrSpaceMap = &NVPTXAddrSpaceMap; 62 UseAddrSpaceMapMangling = true; 63 64 // Define available target features 65 // These must be defined in sorted order! 66 NoAsmVariants = true; 67 GPU = CudaArch::SM_20; 68 69 if (TargetPointerWidth == 32) 70 resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"); 71 else 72 resetDataLayout("e-i64:64-i128:128-v16:16-v32:32-n16:32:64"); 73 74 // If possible, get a TargetInfo for our host triple, so we can match its 75 // types. 76 llvm::Triple HostTriple(Opts.HostTriple); 77 if (!HostTriple.isNVPTX()) 78 HostTarget.reset(AllocateTarget(llvm::Triple(Opts.HostTriple), Opts)); 79 80 // If no host target, make some guesses about the data layout and return. 81 if (!HostTarget) { 82 LongWidth = LongAlign = TargetPointerWidth; 83 PointerWidth = PointerAlign = TargetPointerWidth; 84 switch (TargetPointerWidth) { 85 case 32: 86 SizeType = TargetInfo::UnsignedInt; 87 PtrDiffType = TargetInfo::SignedInt; 88 IntPtrType = TargetInfo::SignedInt; 89 break; 90 case 64: 91 SizeType = TargetInfo::UnsignedLong; 92 PtrDiffType = TargetInfo::SignedLong; 93 IntPtrType = TargetInfo::SignedLong; 94 break; 95 default: 96 llvm_unreachable("TargetPointerWidth must be 32 or 64"); 97 } 98 return; 99 } 100 101 // Copy properties from host target. 102 PointerWidth = HostTarget->getPointerWidth(/* AddrSpace = */ 0); 103 PointerAlign = HostTarget->getPointerAlign(/* AddrSpace = */ 0); 104 BoolWidth = HostTarget->getBoolWidth(); 105 BoolAlign = HostTarget->getBoolAlign(); 106 IntWidth = HostTarget->getIntWidth(); 107 IntAlign = HostTarget->getIntAlign(); 108 HalfWidth = HostTarget->getHalfWidth(); 109 HalfAlign = HostTarget->getHalfAlign(); 110 FloatWidth = HostTarget->getFloatWidth(); 111 FloatAlign = HostTarget->getFloatAlign(); 112 DoubleWidth = HostTarget->getDoubleWidth(); 113 DoubleAlign = HostTarget->getDoubleAlign(); 114 LongWidth = HostTarget->getLongWidth(); 115 LongAlign = HostTarget->getLongAlign(); 116 LongLongWidth = HostTarget->getLongLongWidth(); 117 LongLongAlign = HostTarget->getLongLongAlign(); 118 MinGlobalAlign = HostTarget->getMinGlobalAlign(); 119 NewAlign = HostTarget->getNewAlign(); 120 DefaultAlignForAttributeAligned = 121 HostTarget->getDefaultAlignForAttributeAligned(); 122 SizeType = HostTarget->getSizeType(); 123 IntMaxType = HostTarget->getIntMaxType(); 124 PtrDiffType = HostTarget->getPtrDiffType(/* AddrSpace = */ 0); 125 IntPtrType = HostTarget->getIntPtrType(); 126 WCharType = HostTarget->getWCharType(); 127 WIntType = HostTarget->getWIntType(); 128 Char16Type = HostTarget->getChar16Type(); 129 Char32Type = HostTarget->getChar32Type(); 130 Int64Type = HostTarget->getInt64Type(); 131 SigAtomicType = HostTarget->getSigAtomicType(); 132 ProcessIDType = HostTarget->getProcessIDType(); 133 134 UseBitFieldTypeAlignment = HostTarget->useBitFieldTypeAlignment(); 135 UseZeroLengthBitfieldAlignment = HostTarget->useZeroLengthBitfieldAlignment(); 136 UseExplicitBitFieldAlignment = HostTarget->useExplicitBitFieldAlignment(); 137 ZeroLengthBitfieldBoundary = HostTarget->getZeroLengthBitfieldBoundary(); 138 139 // This is a bit of a lie, but it controls __GCC_ATOMIC_XXX_LOCK_FREE, and 140 // we need those macros to be identical on host and device, because (among 141 // other things) they affect which standard library classes are defined, and 142 // we need all classes to be defined on both the host and device. 143 MaxAtomicInlineWidth = HostTarget->getMaxAtomicInlineWidth(); 144 145 // Properties intentionally not copied from host: 146 // - LargeArrayMinWidth, LargeArrayAlign: Not visible across the 147 // host/device boundary. 148 // - SuitableAlign: Not visible across the host/device boundary, and may 149 // correctly be different on host/device, e.g. if host has wider vector 150 // types than device. 151 // - LongDoubleWidth, LongDoubleAlign: nvptx's long double type is the same 152 // as its double type, but that's not necessarily true on the host. 153 // TODO: nvcc emits a warning when using long double on device; we should 154 // do the same. 155 } 156 157 ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const { 158 return llvm::makeArrayRef(GCCRegNames); 159 } 160 161 bool NVPTXTargetInfo::hasFeature(StringRef Feature) const { 162 return llvm::StringSwitch<bool>(Feature) 163 .Cases("ptx", "nvptx", true) 164 .Default(false); 165 } 166 167 void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts, 168 MacroBuilder &Builder) const { 169 Builder.defineMacro("__PTX__"); 170 Builder.defineMacro("__NVPTX__"); 171 if (Opts.CUDAIsDevice) { 172 // Set __CUDA_ARCH__ for the GPU specified. 173 std::string CUDAArchCode = [this] { 174 switch (GPU) { 175 case CudaArch::GFX600: 176 case CudaArch::GFX601: 177 case CudaArch::GFX700: 178 case CudaArch::GFX701: 179 case CudaArch::GFX702: 180 case CudaArch::GFX703: 181 case CudaArch::GFX704: 182 case CudaArch::GFX801: 183 case CudaArch::GFX802: 184 case CudaArch::GFX803: 185 case CudaArch::GFX810: 186 case CudaArch::GFX900: 187 case CudaArch::GFX902: 188 case CudaArch::LAST: 189 break; 190 case CudaArch::UNKNOWN: 191 assert(false && "No GPU arch when compiling CUDA device code."); 192 return ""; 193 case CudaArch::SM_20: 194 return "200"; 195 case CudaArch::SM_21: 196 return "210"; 197 case CudaArch::SM_30: 198 return "300"; 199 case CudaArch::SM_32: 200 return "320"; 201 case CudaArch::SM_35: 202 return "350"; 203 case CudaArch::SM_37: 204 return "370"; 205 case CudaArch::SM_50: 206 return "500"; 207 case CudaArch::SM_52: 208 return "520"; 209 case CudaArch::SM_53: 210 return "530"; 211 case CudaArch::SM_60: 212 return "600"; 213 case CudaArch::SM_61: 214 return "610"; 215 case CudaArch::SM_62: 216 return "620"; 217 case CudaArch::SM_70: 218 return "700"; 219 case CudaArch::SM_72: 220 return "720"; 221 } 222 llvm_unreachable("unhandled CudaArch"); 223 }(); 224 Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode); 225 } 226 } 227 228 ArrayRef<Builtin::Info> NVPTXTargetInfo::getTargetBuiltins() const { 229 return llvm::makeArrayRef(BuiltinInfo, clang::NVPTX::LastTSBuiltin - 230 Builtin::FirstTSBuiltin); 231 } 232