1 //===--- Mips.h - Declare Mips target feature support -----------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares Mips TargetInfo objects.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
15 #define LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
16 
17 #include "clang/Basic/TargetInfo.h"
18 #include "clang/Basic/TargetOptions.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 
22 namespace clang {
23 namespace targets {
24 
25 class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
26   void setDataLayout() {
27     StringRef Layout;
28 
29     if (ABI == "o32")
30       Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
31     else if (ABI == "n32")
32       Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
33     else if (ABI == "n64")
34       Layout = "m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
35     else
36       llvm_unreachable("Invalid ABI");
37 
38     if (BigEndian)
39       resetDataLayout(("E-" + Layout).str());
40     else
41       resetDataLayout(("e-" + Layout).str());
42   }
43 
44   static const Builtin::Info BuiltinInfo[];
45   std::string CPU;
46   bool IsMips16;
47   bool IsMicromips;
48   bool IsNan2008;
49   bool IsAbs2008;
50   bool IsSingleFloat;
51   bool IsNoABICalls;
52   bool CanUseBSDABICalls;
53   enum MipsFloatABI { HardFloat, SoftFloat } FloatABI;
54   enum DspRevEnum { NoDSP, DSP1, DSP2 } DspRev;
55   bool HasMSA;
56   bool DisableMadd4;
57   bool UseIndirectJumpHazard;
58 
59 protected:
60   bool HasFP64;
61   std::string ABI;
62 
63 public:
64   MipsTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
65       : TargetInfo(Triple), IsMips16(false), IsMicromips(false),
66         IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
67         IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
68         DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
69         UseIndirectJumpHazard(false), HasFP64(false) {
70     TheCXXABI.set(TargetCXXABI::GenericMIPS);
71 
72     setABI((getTriple().getArch() == llvm::Triple::mips ||
73             getTriple().getArch() == llvm::Triple::mipsel)
74                ? "o32"
75                : "n64");
76 
77     CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
78 
79     CanUseBSDABICalls = Triple.getOS() == llvm::Triple::FreeBSD ||
80                         Triple.getOS() == llvm::Triple::OpenBSD;
81   }
82 
83   bool isIEEE754_2008Default() const {
84     return CPU == "mips32r6" || CPU == "mips64r6";
85   }
86 
87   bool isFP64Default() const {
88     return CPU == "mips32r6" || ABI == "n32" || ABI == "n64" || ABI == "64";
89   }
90 
91   bool isNan2008() const override { return IsNan2008; }
92 
93   bool processorSupportsGPR64() const;
94 
95   StringRef getABI() const override { return ABI; }
96 
97   bool setABI(const std::string &Name) override {
98     if (Name == "o32") {
99       setO32ABITypes();
100       ABI = Name;
101       return true;
102     }
103 
104     if (Name == "n32") {
105       setN32ABITypes();
106       ABI = Name;
107       return true;
108     }
109     if (Name == "n64") {
110       setN64ABITypes();
111       ABI = Name;
112       return true;
113     }
114     return false;
115   }
116 
117   void setO32ABITypes() {
118     Int64Type = SignedLongLong;
119     IntMaxType = Int64Type;
120     LongDoubleFormat = &llvm::APFloat::IEEEdouble();
121     LongDoubleWidth = LongDoubleAlign = 64;
122     LongWidth = LongAlign = 32;
123     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
124     PointerWidth = PointerAlign = 32;
125     PtrDiffType = SignedInt;
126     SizeType = UnsignedInt;
127     SuitableAlign = 64;
128   }
129 
130   void setN32N64ABITypes() {
131     LongDoubleWidth = LongDoubleAlign = 128;
132     LongDoubleFormat = &llvm::APFloat::IEEEquad();
133     if (getTriple().getOS() == llvm::Triple::FreeBSD) {
134       LongDoubleWidth = LongDoubleAlign = 64;
135       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
136     }
137     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
138     SuitableAlign = 128;
139   }
140 
141   void setN64ABITypes() {
142     setN32N64ABITypes();
143     if (getTriple().getOS() == llvm::Triple::OpenBSD) {
144       Int64Type = SignedLongLong;
145     } else {
146       Int64Type = SignedLong;
147     }
148     IntMaxType = Int64Type;
149     LongWidth = LongAlign = 64;
150     PointerWidth = PointerAlign = 64;
151     PtrDiffType = SignedLong;
152     SizeType = UnsignedLong;
153   }
154 
155   void setN32ABITypes() {
156     setN32N64ABITypes();
157     Int64Type = SignedLongLong;
158     IntMaxType = Int64Type;
159     LongWidth = LongAlign = 32;
160     PointerWidth = PointerAlign = 32;
161     PtrDiffType = SignedInt;
162     SizeType = UnsignedInt;
163   }
164 
165   bool isValidCPUName(StringRef Name) const override;
166   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
167 
168   bool setCPU(const std::string &Name) override {
169     CPU = Name;
170     return isValidCPUName(Name);
171   }
172 
173   const std::string &getCPU() const { return CPU; }
174   bool
175   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
176                  StringRef CPU,
177                  const std::vector<std::string> &FeaturesVec) const override {
178     if (CPU.empty())
179       CPU = getCPU();
180     if (CPU == "octeon")
181       Features["mips64r2"] = Features["cnmips"] = true;
182     else
183       Features[CPU] = true;
184     return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
185   }
186 
187   void getTargetDefines(const LangOptions &Opts,
188                         MacroBuilder &Builder) const override;
189 
190   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
191 
192   bool hasFeature(StringRef Feature) const override;
193 
194   BuiltinVaListKind getBuiltinVaListKind() const override {
195     return TargetInfo::VoidPtrBuiltinVaList;
196   }
197 
198   ArrayRef<const char *> getGCCRegNames() const override {
199     static const char *const GCCRegNames[] = {
200         // CPU register names
201         // Must match second column of GCCRegAliases
202         "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10",
203         "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20",
204         "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30",
205         "$31",
206         // Floating point register names
207         "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", "$f9",
208         "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", "$f16", "$f17", "$f18",
209         "$f19", "$f20", "$f21", "$f22", "$f23", "$f24", "$f25", "$f26", "$f27",
210         "$f28", "$f29", "$f30", "$f31",
211         // Hi/lo and condition register names
212         "hi", "lo", "", "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5",
213         "$fcc6", "$fcc7", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi",
214         "$ac3lo",
215         // MSA register names
216         "$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7", "$w8", "$w9",
217         "$w10", "$w11", "$w12", "$w13", "$w14", "$w15", "$w16", "$w17", "$w18",
218         "$w19", "$w20", "$w21", "$w22", "$w23", "$w24", "$w25", "$w26", "$w27",
219         "$w28", "$w29", "$w30", "$w31",
220         // MSA control register names
221         "$msair", "$msacsr", "$msaaccess", "$msasave", "$msamodify",
222         "$msarequest", "$msamap", "$msaunmap"
223     };
224     return llvm::makeArrayRef(GCCRegNames);
225   }
226 
227   bool validateAsmConstraint(const char *&Name,
228                              TargetInfo::ConstraintInfo &Info) const override {
229     switch (*Name) {
230     default:
231       return false;
232     case 'r': // CPU registers.
233     case 'd': // Equivalent to "r" unless generating MIPS16 code.
234     case 'y': // Equivalent to "r", backward compatibility only.
235     case 'f': // floating-point registers.
236     case 'c': // $25 for indirect jumps
237     case 'l': // lo register
238     case 'x': // hilo register pair
239       Info.setAllowsRegister();
240       return true;
241     case 'I': // Signed 16-bit constant
242     case 'J': // Integer 0
243     case 'K': // Unsigned 16-bit constant
244     case 'L': // Signed 32-bit constant, lower 16-bit zeros (for lui)
245     case 'M': // Constants not loadable via lui, addiu, or ori
246     case 'N': // Constant -1 to -65535
247     case 'O': // A signed 15-bit constant
248     case 'P': // A constant between 1 go 65535
249       return true;
250     case 'R': // An address that can be used in a non-macro load or store
251       Info.setAllowsMemory();
252       return true;
253     case 'Z':
254       if (Name[1] == 'C') { // An address usable by ll, and sc.
255         Info.setAllowsMemory();
256         Name++; // Skip over 'Z'.
257         return true;
258       }
259       return false;
260     }
261   }
262 
263   std::string convertConstraint(const char *&Constraint) const override {
264     std::string R;
265     switch (*Constraint) {
266     case 'Z': // Two-character constraint; add "^" hint for later parsing.
267       if (Constraint[1] == 'C') {
268         R = std::string("^") + std::string(Constraint, 2);
269         Constraint++;
270         return R;
271       }
272       break;
273     }
274     return TargetInfo::convertConstraint(Constraint);
275   }
276 
277   const char *getClobbers() const override {
278     // In GCC, $1 is not widely used in generated code (it's used only in a few
279     // specific situations), so there is no real need for users to add it to
280     // the clobbers list if they want to use it in their inline assembly code.
281     //
282     // In LLVM, $1 is treated as a normal GPR and is always allocatable during
283     // code generation, so using it in inline assembly without adding it to the
284     // clobbers list can cause conflicts between the inline assembly code and
285     // the surrounding generated code.
286     //
287     // Another problem is that LLVM is allowed to choose $1 for inline assembly
288     // operands, which will conflict with the ".set at" assembler option (which
289     // we use only for inline assembly, in order to maintain compatibility with
290     // GCC) and will also conflict with the user's usage of $1.
291     //
292     // The easiest way to avoid these conflicts and keep $1 as an allocatable
293     // register for generated code is to automatically clobber $1 for all inline
294     // assembly code.
295     //
296     // FIXME: We should automatically clobber $1 only for inline assembly code
297     // which actually uses it. This would allow LLVM to use $1 for inline
298     // assembly operands if the user's assembly code doesn't use it.
299     return "~{$1}";
300   }
301 
302   bool handleTargetFeatures(std::vector<std::string> &Features,
303                             DiagnosticsEngine &Diags) override {
304     IsMips16 = false;
305     IsMicromips = false;
306     IsNan2008 = isIEEE754_2008Default();
307     IsAbs2008 = isIEEE754_2008Default();
308     IsSingleFloat = false;
309     FloatABI = HardFloat;
310     DspRev = NoDSP;
311     HasFP64 = isFP64Default();
312 
313     for (const auto &Feature : Features) {
314       if (Feature == "+single-float")
315         IsSingleFloat = true;
316       else if (Feature == "+soft-float")
317         FloatABI = SoftFloat;
318       else if (Feature == "+mips16")
319         IsMips16 = true;
320       else if (Feature == "+micromips")
321         IsMicromips = true;
322       else if (Feature == "+dsp")
323         DspRev = std::max(DspRev, DSP1);
324       else if (Feature == "+dspr2")
325         DspRev = std::max(DspRev, DSP2);
326       else if (Feature == "+msa")
327         HasMSA = true;
328       else if (Feature == "+nomadd4")
329         DisableMadd4 = true;
330       else if (Feature == "+fp64")
331         HasFP64 = true;
332       else if (Feature == "-fp64")
333         HasFP64 = false;
334       else if (Feature == "+nan2008")
335         IsNan2008 = true;
336       else if (Feature == "-nan2008")
337         IsNan2008 = false;
338       else if (Feature == "+abs2008")
339         IsAbs2008 = true;
340       else if (Feature == "-abs2008")
341         IsAbs2008 = false;
342       else if (Feature == "+noabicalls")
343         IsNoABICalls = true;
344       else if (Feature == "+use-indirect-jump-hazard")
345         UseIndirectJumpHazard = true;
346     }
347 
348     setDataLayout();
349 
350     return true;
351   }
352 
353   int getEHDataRegisterNumber(unsigned RegNo) const override {
354     if (RegNo == 0)
355       return 4;
356     if (RegNo == 1)
357       return 5;
358     return -1;
359   }
360 
361   bool isCLZForZeroUndef() const override { return false; }
362 
363   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
364     static const TargetInfo::GCCRegAlias O32RegAliases[] = {
365         {{"at"}, "$1"},  {{"v0"}, "$2"},         {{"v1"}, "$3"},
366         {{"a0"}, "$4"},  {{"a1"}, "$5"},         {{"a2"}, "$6"},
367         {{"a3"}, "$7"},  {{"t0"}, "$8"},         {{"t1"}, "$9"},
368         {{"t2"}, "$10"}, {{"t3"}, "$11"},        {{"t4"}, "$12"},
369         {{"t5"}, "$13"}, {{"t6"}, "$14"},        {{"t7"}, "$15"},
370         {{"s0"}, "$16"}, {{"s1"}, "$17"},        {{"s2"}, "$18"},
371         {{"s3"}, "$19"}, {{"s4"}, "$20"},        {{"s5"}, "$21"},
372         {{"s6"}, "$22"}, {{"s7"}, "$23"},        {{"t8"}, "$24"},
373         {{"t9"}, "$25"}, {{"k0"}, "$26"},        {{"k1"}, "$27"},
374         {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
375         {{"ra"}, "$31"}
376     };
377     static const TargetInfo::GCCRegAlias NewABIRegAliases[] = {
378         {{"at"}, "$1"},  {{"v0"}, "$2"},         {{"v1"}, "$3"},
379         {{"a0"}, "$4"},  {{"a1"}, "$5"},         {{"a2"}, "$6"},
380         {{"a3"}, "$7"},  {{"a4"}, "$8"},         {{"a5"}, "$9"},
381         {{"a6"}, "$10"}, {{"a7"}, "$11"},        {{"t0"}, "$12"},
382         {{"t1"}, "$13"}, {{"t2"}, "$14"},        {{"t3"}, "$15"},
383         {{"s0"}, "$16"}, {{"s1"}, "$17"},        {{"s2"}, "$18"},
384         {{"s3"}, "$19"}, {{"s4"}, "$20"},        {{"s5"}, "$21"},
385         {{"s6"}, "$22"}, {{"s7"}, "$23"},        {{"t8"}, "$24"},
386         {{"t9"}, "$25"}, {{"k0"}, "$26"},        {{"k1"}, "$27"},
387         {{"gp"}, "$28"}, {{"sp", "$sp"}, "$29"}, {{"fp", "$fp"}, "$30"},
388         {{"ra"}, "$31"}
389     };
390     if (ABI == "o32")
391       return llvm::makeArrayRef(O32RegAliases);
392     return llvm::makeArrayRef(NewABIRegAliases);
393   }
394 
395   bool hasInt128Type() const override { return ABI == "n32" || ABI == "n64"; }
396 
397   bool validateTarget(DiagnosticsEngine &Diags) const override;
398 };
399 } // namespace targets
400 } // namespace clang
401 
402 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_MIPS_H
403