1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares ARM TargetInfo objects. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 15 #define LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 16 17 #include "OSTargets.h" 18 #include "clang/Basic/TargetInfo.h" 19 #include "clang/Basic/TargetOptions.h" 20 #include "llvm/ADT/Triple.h" 21 #include "llvm/Support/Compiler.h" 22 #include "llvm/Support/TargetParser.h" 23 24 namespace clang { 25 namespace targets { 26 27 class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo { 28 // Possible FPU choices. 29 enum FPUMode { 30 VFP2FPU = (1 << 0), 31 VFP3FPU = (1 << 1), 32 VFP4FPU = (1 << 2), 33 NeonFPU = (1 << 3), 34 FPARMV8 = (1 << 4) 35 }; 36 37 // Possible HWDiv features. 38 enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) }; 39 40 static bool FPUModeIsVFP(FPUMode Mode) { 41 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8); 42 } 43 44 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 45 static const char *const GCCRegNames[]; 46 47 std::string ABI, CPU; 48 49 StringRef CPUProfile; 50 StringRef CPUAttr; 51 52 enum { FP_Default, FP_VFP, FP_Neon } FPMath; 53 54 llvm::ARM::ISAKind ArchISA; 55 llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T; 56 llvm::ARM::ProfileKind ArchProfile; 57 unsigned ArchVersion; 58 59 unsigned FPU : 5; 60 61 unsigned IsAAPCS : 1; 62 unsigned HWDiv : 2; 63 64 // Initialized via features. 65 unsigned SoftFloat : 1; 66 unsigned SoftFloatABI : 1; 67 68 unsigned CRC : 1; 69 unsigned Crypto : 1; 70 unsigned DSP : 1; 71 unsigned Unaligned : 1; 72 73 enum { 74 LDREX_B = (1 << 0), /// byte (8-bit) 75 LDREX_H = (1 << 1), /// half (16-bit) 76 LDREX_W = (1 << 2), /// word (32-bit) 77 LDREX_D = (1 << 3), /// double (64-bit) 78 }; 79 80 uint32_t LDREX; 81 82 // ACLE 6.5.1 Hardware floating point 83 enum { 84 HW_FP_HP = (1 << 1), /// half (16-bit) 85 HW_FP_SP = (1 << 2), /// single (32-bit) 86 HW_FP_DP = (1 << 3), /// double (64-bit) 87 }; 88 uint32_t HW_FP; 89 90 static const Builtin::Info BuiltinInfo[]; 91 92 void setABIAAPCS(); 93 void setABIAPCS(bool IsAAPCS16); 94 95 void setArchInfo(); 96 void setArchInfo(llvm::ARM::ArchKind Kind); 97 98 void setAtomic(); 99 100 bool isThumb() const; 101 bool supportsThumb() const; 102 bool supportsThumb2() const; 103 104 StringRef getCPUAttr() const; 105 StringRef getCPUProfile() const; 106 107 public: 108 ARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 109 110 StringRef getABI() const override; 111 bool setABI(const std::string &Name) override; 112 113 // FIXME: This should be based on Arch attributes, not CPU names. 114 bool 115 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, 116 StringRef CPU, 117 const std::vector<std::string> &FeaturesVec) const override; 118 119 bool handleTargetFeatures(std::vector<std::string> &Features, 120 DiagnosticsEngine &Diags) override; 121 122 bool hasFeature(StringRef Feature) const override; 123 124 bool isValidCPUName(StringRef Name) const override; 125 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; 126 127 bool setCPU(const std::string &Name) override; 128 129 bool setFPMath(StringRef Name) override; 130 131 bool useFP16ConversionIntrinsics() const override { 132 return false; 133 } 134 135 void getTargetDefinesARMV81A(const LangOptions &Opts, 136 MacroBuilder &Builder) const; 137 138 void getTargetDefinesARMV82A(const LangOptions &Opts, 139 MacroBuilder &Builder) const; 140 void getTargetDefines(const LangOptions &Opts, 141 MacroBuilder &Builder) const override; 142 143 ArrayRef<Builtin::Info> getTargetBuiltins() const override; 144 145 bool isCLZForZeroUndef() const override; 146 BuiltinVaListKind getBuiltinVaListKind() const override; 147 148 ArrayRef<const char *> getGCCRegNames() const override; 149 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; 150 bool validateAsmConstraint(const char *&Name, 151 TargetInfo::ConstraintInfo &Info) const override; 152 std::string convertConstraint(const char *&Constraint) const override; 153 bool 154 validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size, 155 std::string &SuggestedModifier) const override; 156 const char *getClobbers() const override; 157 158 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 159 160 int getEHDataRegisterNumber(unsigned RegNo) const override; 161 162 bool hasSjLjLowering() const override; 163 }; 164 165 class LLVM_LIBRARY_VISIBILITY ARMleTargetInfo : public ARMTargetInfo { 166 public: 167 ARMleTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 168 void getTargetDefines(const LangOptions &Opts, 169 MacroBuilder &Builder) const override; 170 }; 171 172 class LLVM_LIBRARY_VISIBILITY ARMbeTargetInfo : public ARMTargetInfo { 173 public: 174 ARMbeTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 175 void getTargetDefines(const LangOptions &Opts, 176 MacroBuilder &Builder) const override; 177 }; 178 179 class LLVM_LIBRARY_VISIBILITY WindowsARMTargetInfo 180 : public WindowsTargetInfo<ARMleTargetInfo> { 181 const llvm::Triple Triple; 182 183 public: 184 WindowsARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 185 186 void getVisualStudioDefines(const LangOptions &Opts, 187 MacroBuilder &Builder) const; 188 189 BuiltinVaListKind getBuiltinVaListKind() const override; 190 191 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 192 }; 193 194 // Windows ARM + Itanium C++ ABI Target 195 class LLVM_LIBRARY_VISIBILITY ItaniumWindowsARMleTargetInfo 196 : public WindowsARMTargetInfo { 197 public: 198 ItaniumWindowsARMleTargetInfo(const llvm::Triple &Triple, 199 const TargetOptions &Opts); 200 201 void getTargetDefines(const LangOptions &Opts, 202 MacroBuilder &Builder) const override; 203 }; 204 205 // Windows ARM, MS (C++) ABI 206 class LLVM_LIBRARY_VISIBILITY MicrosoftARMleTargetInfo 207 : public WindowsARMTargetInfo { 208 public: 209 MicrosoftARMleTargetInfo(const llvm::Triple &Triple, 210 const TargetOptions &Opts); 211 212 void getTargetDefines(const LangOptions &Opts, 213 MacroBuilder &Builder) const override; 214 }; 215 216 // ARM MinGW target 217 class LLVM_LIBRARY_VISIBILITY MinGWARMTargetInfo : public WindowsARMTargetInfo { 218 public: 219 MinGWARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 220 221 void getTargetDefines(const LangOptions &Opts, 222 MacroBuilder &Builder) const override; 223 }; 224 225 // ARM Cygwin target 226 class LLVM_LIBRARY_VISIBILITY CygwinARMTargetInfo : public ARMleTargetInfo { 227 public: 228 CygwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 229 230 void getTargetDefines(const LangOptions &Opts, 231 MacroBuilder &Builder) const override; 232 }; 233 234 class LLVM_LIBRARY_VISIBILITY DarwinARMTargetInfo 235 : public DarwinTargetInfo<ARMleTargetInfo> { 236 protected: 237 void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 238 MacroBuilder &Builder) const override; 239 240 public: 241 DarwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 242 }; 243 244 // 32-bit RenderScript is armv7 with width and align of 'long' set to 8-bytes 245 class LLVM_LIBRARY_VISIBILITY RenderScript32TargetInfo 246 : public ARMleTargetInfo { 247 public: 248 RenderScript32TargetInfo(const llvm::Triple &Triple, 249 const TargetOptions &Opts); 250 251 void getTargetDefines(const LangOptions &Opts, 252 MacroBuilder &Builder) const override; 253 }; 254 255 } // namespace targets 256 } // namespace clang 257 258 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 259