1 //===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares AMDGPU TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
15 
16 #include "clang/Basic/TargetInfo.h"
17 #include "clang/Basic/TargetOptions.h"
18 #include "llvm/ADT/StringSet.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 #include "llvm/Support/TargetParser.h"
22 
23 namespace clang {
24 namespace targets {
25 
26 class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
27 
28   static const Builtin::Info BuiltinInfo[];
29   static const char *const GCCRegNames[];
30 
31   enum AddrSpace {
32     Generic = 0,
33     Global = 1,
34     Local = 3,
35     Constant = 4,
36     Private = 5
37   };
38   static const LangASMap AMDGPUDefIsGenMap;
39   static const LangASMap AMDGPUDefIsPrivMap;
40 
41   llvm::AMDGPU::GPUKind GPUKind;
42   unsigned GPUFeatures;
43 
44   bool hasFP64() const {
45     return getTriple().getArch() == llvm::Triple::amdgcn ||
46            !!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
47   }
48 
49   /// Has fast fma f32
50   bool hasFastFMAF() const {
51     return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
52   }
53 
54   /// Has fast fma f64
55   bool hasFastFMA() const {
56     return getTriple().getArch() == llvm::Triple::amdgcn;
57   }
58 
59   bool hasFMAF() const {
60     return getTriple().getArch() == llvm::Triple::amdgcn ||
61            !!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
62   }
63 
64   bool hasFullRateDenormalsF32() const {
65     return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
66   }
67 
68   bool hasLDEXPF() const {
69     return getTriple().getArch() == llvm::Triple::amdgcn ||
70            !!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
71   }
72 
73   static bool isAMDGCN(const llvm::Triple &TT) {
74     return TT.getArch() == llvm::Triple::amdgcn;
75   }
76 
77   static bool isR600(const llvm::Triple &TT) {
78     return TT.getArch() == llvm::Triple::r600;
79   }
80 
81 public:
82   AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
83 
84   void setAddressSpaceMap(bool DefaultIsPrivate);
85 
86   void adjust(LangOptions &Opts) override;
87 
88   uint64_t getPointerWidthV(unsigned AddrSpace) const override {
89     if (isR600(getTriple()))
90       return 32;
91 
92     if (AddrSpace == Private || AddrSpace == Local)
93       return 32;
94 
95     return 64;
96   }
97 
98   uint64_t getPointerAlignV(unsigned AddrSpace) const override {
99     return getPointerWidthV(AddrSpace);
100   }
101 
102   uint64_t getMaxPointerWidth() const override {
103     return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
104   }
105 
106   const char *getClobbers() const override { return ""; }
107 
108   ArrayRef<const char *> getGCCRegNames() const override;
109 
110   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
111     return None;
112   }
113 
114   /// Accepted register names: (n, m is unsigned integer, n < m)
115   /// v
116   /// s
117   /// a
118   /// {vn}, {v[n]}
119   /// {sn}, {s[n]}
120   /// {an}, {a[n]}
121   /// {S} , where S is a special register name
122   ////{v[n:m]}
123   /// {s[n:m]}
124   /// {a[n:m]}
125   bool validateAsmConstraint(const char *&Name,
126                              TargetInfo::ConstraintInfo &Info) const override {
127     static const ::llvm::StringSet<> SpecialRegs({
128         "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
129         "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
130         "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
131     });
132 
133     StringRef S(Name);
134     if (S == "A") {
135       Info.setRequiresImmediate();
136       return true;
137     }
138 
139     bool HasLeftParen = false;
140     if (S.front() == '{') {
141       HasLeftParen = true;
142       S = S.drop_front();
143     }
144     if (S.empty())
145       return false;
146     if (S.front() != 'v' && S.front() != 's' && S.front() != 'a') {
147       if (!HasLeftParen)
148         return false;
149       auto E = S.find('}');
150       if (!SpecialRegs.count(S.substr(0, E)))
151         return false;
152       S = S.drop_front(E + 1);
153       if (!S.empty())
154         return false;
155       // Found {S} where S is a special register.
156       Info.setAllowsRegister();
157       Name = S.data() - 1;
158       return true;
159     }
160     S = S.drop_front();
161     if (!HasLeftParen) {
162       if (!S.empty())
163         return false;
164       // Found s, v or a.
165       Info.setAllowsRegister();
166       Name = S.data() - 1;
167       return true;
168     }
169     bool HasLeftBracket = false;
170     if (!S.empty() && S.front() == '[') {
171       HasLeftBracket = true;
172       S = S.drop_front();
173     }
174     unsigned long long N;
175     if (S.empty() || consumeUnsignedInteger(S, 10, N))
176       return false;
177     if (!S.empty() && S.front() == ':') {
178       if (!HasLeftBracket)
179         return false;
180       S = S.drop_front();
181       unsigned long long M;
182       if (consumeUnsignedInteger(S, 10, M) || N >= M)
183         return false;
184     }
185     if (HasLeftBracket) {
186       if (S.empty() || S.front() != ']')
187         return false;
188       S = S.drop_front();
189     }
190     if (S.empty() || S.front() != '}')
191       return false;
192     S = S.drop_front();
193     if (!S.empty())
194       return false;
195     // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
196     // or {a[n:m]}.
197     Info.setAllowsRegister();
198     Name = S.data() - 1;
199     return true;
200   }
201 
202   // \p Constraint will be left pointing at the last character of
203   // the constraint.  In practice, it won't be changed unless the
204   // constraint is longer than one character.
205   std::string convertConstraint(const char *&Constraint) const override {
206     const char *Begin = Constraint;
207     TargetInfo::ConstraintInfo Info("", "");
208     if (validateAsmConstraint(Constraint, Info))
209       return std::string(Begin).substr(0, Constraint - Begin + 1);
210 
211     Constraint = Begin;
212     return std::string(1, *Constraint);
213   }
214 
215   bool
216   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
217                  StringRef CPU,
218                  const std::vector<std::string> &FeatureVec) const override;
219 
220   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
221 
222   bool useFP16ConversionIntrinsics() const override { return false; }
223 
224   void getTargetDefines(const LangOptions &Opts,
225                         MacroBuilder &Builder) const override;
226 
227   BuiltinVaListKind getBuiltinVaListKind() const override {
228     return TargetInfo::CharPtrBuiltinVaList;
229   }
230 
231   bool isValidCPUName(StringRef Name) const override {
232     if (getTriple().getArch() == llvm::Triple::amdgcn)
233       return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
234     return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
235   }
236 
237   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
238 
239   bool setCPU(const std::string &Name) override {
240     if (getTriple().getArch() == llvm::Triple::amdgcn) {
241       GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
242       GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
243     } else {
244       GPUKind = llvm::AMDGPU::parseArchR600(Name);
245       GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
246     }
247 
248     return GPUKind != llvm::AMDGPU::GK_NONE;
249   }
250 
251   void setSupportedOpenCLOpts() override {
252     auto &Opts = getSupportedOpenCLOpts();
253     Opts.support("cl_clang_storage_class_specifiers");
254     Opts.support("cl_khr_icd");
255 
256     bool IsAMDGCN = isAMDGCN(getTriple());
257 
258     if (hasFP64())
259       Opts.support("cl_khr_fp64");
260 
261     if (IsAMDGCN || GPUKind >= llvm::AMDGPU::GK_CEDAR) {
262       Opts.support("cl_khr_byte_addressable_store");
263       Opts.support("cl_khr_global_int32_base_atomics");
264       Opts.support("cl_khr_global_int32_extended_atomics");
265       Opts.support("cl_khr_local_int32_base_atomics");
266       Opts.support("cl_khr_local_int32_extended_atomics");
267     }
268 
269     if (IsAMDGCN) {
270       Opts.support("cl_khr_fp16");
271       Opts.support("cl_khr_int64_base_atomics");
272       Opts.support("cl_khr_int64_extended_atomics");
273       Opts.support("cl_khr_mipmap_image");
274       Opts.support("cl_khr_mipmap_image_writes");
275       Opts.support("cl_khr_subgroups");
276       Opts.support("cl_khr_3d_image_writes");
277       Opts.support("cl_amd_media_ops");
278       Opts.support("cl_amd_media_ops2");
279     }
280   }
281 
282   LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override {
283     switch (TK) {
284     case OCLTK_Image:
285       return LangAS::opencl_constant;
286 
287     case OCLTK_ClkEvent:
288     case OCLTK_Queue:
289     case OCLTK_ReserveID:
290       return LangAS::opencl_global;
291 
292     default:
293       return TargetInfo::getOpenCLTypeAddrSpace(TK);
294     }
295   }
296 
297   LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
298     switch (AS) {
299     case 0:
300       return LangAS::opencl_generic;
301     case 1:
302       return LangAS::opencl_global;
303     case 3:
304       return LangAS::opencl_local;
305     case 4:
306       return LangAS::opencl_constant;
307     case 5:
308       return LangAS::opencl_private;
309     default:
310       return getLangASFromTargetAS(AS);
311     }
312   }
313 
314   LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
315     return LangAS::Default;
316   }
317 
318   llvm::Optional<LangAS> getConstantAddressSpace() const override {
319     return getLangASFromTargetAS(Constant);
320   }
321 
322   /// \returns Target specific vtbl ptr address space.
323   unsigned getVtblPtrAddressSpace() const override {
324     return static_cast<unsigned>(Constant);
325   }
326 
327   /// \returns If a target requires an address within a target specific address
328   /// space \p AddressSpace to be converted in order to be used, then return the
329   /// corresponding target specific DWARF address space.
330   ///
331   /// \returns Otherwise return None and no conversion will be emitted in the
332   /// DWARF.
333   Optional<unsigned>
334   getDWARFAddressSpace(unsigned AddressSpace) const override {
335     const unsigned DWARF_Private = 1;
336     const unsigned DWARF_Local = 2;
337     if (AddressSpace == Private) {
338       return DWARF_Private;
339     } else if (AddressSpace == Local) {
340       return DWARF_Local;
341     } else {
342       return None;
343     }
344   }
345 
346   CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
347     switch (CC) {
348     default:
349       return CCCR_Warning;
350     case CC_C:
351     case CC_OpenCLKernel:
352       return CCCR_OK;
353     }
354   }
355 
356   // In amdgcn target the null pointer in global, constant, and generic
357   // address space has value 0 but in private and local address space has
358   // value ~0.
359   uint64_t getNullPointerValue(LangAS AS) const override {
360     // FIXME: Also should handle region.
361     return (AS == LangAS::opencl_local || AS == LangAS::opencl_private)
362       ? ~0 : 0;
363   }
364 
365   void setAuxTarget(const TargetInfo *Aux) override;
366 
367   bool hasExtIntType() const override { return true; }
368 };
369 
370 } // namespace targets
371 } // namespace clang
372 
373 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
374