1 //===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares AMDGPU TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
15 
16 #include "clang/Basic/TargetInfo.h"
17 #include "clang/Basic/TargetOptions.h"
18 #include "llvm/ADT/StringSet.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 #include "llvm/Support/TargetParser.h"
22 
23 namespace clang {
24 namespace targets {
25 
26 class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
27 
28   static const Builtin::Info BuiltinInfo[];
29   static const char *const GCCRegNames[];
30 
31   enum AddrSpace {
32     Generic = 0,
33     Global = 1,
34     Local = 3,
35     Constant = 4,
36     Private = 5
37   };
38   static const LangASMap AMDGPUDefIsGenMap;
39   static const LangASMap AMDGPUDefIsPrivMap;
40 
41   llvm::AMDGPU::GPUKind GPUKind;
42   unsigned GPUFeatures;
43 
44   bool hasFP64() const {
45     return getTriple().getArch() == llvm::Triple::amdgcn ||
46            !!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
47   }
48 
49   /// Has fast fma f32
50   bool hasFastFMAF() const {
51     return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
52   }
53 
54   /// Has fast fma f64
55   bool hasFastFMA() const {
56     return getTriple().getArch() == llvm::Triple::amdgcn;
57   }
58 
59   bool hasFMAF() const {
60     return getTriple().getArch() == llvm::Triple::amdgcn ||
61            !!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
62   }
63 
64   bool hasFullRateDenormalsF32() const {
65     return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
66   }
67 
68   bool hasLDEXPF() const {
69     return getTriple().getArch() == llvm::Triple::amdgcn ||
70            !!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
71   }
72 
73   static bool isAMDGCN(const llvm::Triple &TT) {
74     return TT.getArch() == llvm::Triple::amdgcn;
75   }
76 
77   static bool isR600(const llvm::Triple &TT) {
78     return TT.getArch() == llvm::Triple::r600;
79   }
80 
81 public:
82   AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
83 
84   void setAddressSpaceMap(bool DefaultIsPrivate);
85 
86   void adjust(LangOptions &Opts) override;
87 
88   uint64_t getPointerWidthV(unsigned AddrSpace) const override {
89     if (isR600(getTriple()))
90       return 32;
91 
92     if (AddrSpace == Private || AddrSpace == Local)
93       return 32;
94 
95     return 64;
96   }
97 
98   uint64_t getPointerAlignV(unsigned AddrSpace) const override {
99     return getPointerWidthV(AddrSpace);
100   }
101 
102   uint64_t getMaxPointerWidth() const override {
103     return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
104   }
105 
106   const char *getClobbers() const override { return ""; }
107 
108   ArrayRef<const char *> getGCCRegNames() const override;
109 
110   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
111     return None;
112   }
113 
114   /// Accepted register names: (n, m is unsigned integer, n < m)
115   /// v
116   /// s
117   /// a
118   /// {vn}, {v[n]}
119   /// {sn}, {s[n]}
120   /// {an}, {a[n]}
121   /// {S} , where S is a special register name
122   ////{v[n:m]}
123   /// {s[n:m]}
124   /// {a[n:m]}
125   bool validateAsmConstraint(const char *&Name,
126                              TargetInfo::ConstraintInfo &Info) const override {
127     static const ::llvm::StringSet<> SpecialRegs({
128         "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
129         "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
130         "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
131     });
132 
133     StringRef S(Name);
134     bool HasLeftParen = false;
135     if (S.front() == '{') {
136       HasLeftParen = true;
137       S = S.drop_front();
138     }
139     if (S.empty())
140       return false;
141     if (S.front() != 'v' && S.front() != 's' && S.front() != 'a') {
142       if (!HasLeftParen)
143         return false;
144       auto E = S.find('}');
145       if (!SpecialRegs.count(S.substr(0, E)))
146         return false;
147       S = S.drop_front(E + 1);
148       if (!S.empty())
149         return false;
150       // Found {S} where S is a special register.
151       Info.setAllowsRegister();
152       Name = S.data() - 1;
153       return true;
154     }
155     S = S.drop_front();
156     if (!HasLeftParen) {
157       if (!S.empty())
158         return false;
159       // Found s, v or a.
160       Info.setAllowsRegister();
161       Name = S.data() - 1;
162       return true;
163     }
164     bool HasLeftBracket = false;
165     if (!S.empty() && S.front() == '[') {
166       HasLeftBracket = true;
167       S = S.drop_front();
168     }
169     unsigned long long N;
170     if (S.empty() || consumeUnsignedInteger(S, 10, N))
171       return false;
172     if (!S.empty() && S.front() == ':') {
173       if (!HasLeftBracket)
174         return false;
175       S = S.drop_front();
176       unsigned long long M;
177       if (consumeUnsignedInteger(S, 10, M) || N >= M)
178         return false;
179     }
180     if (HasLeftBracket) {
181       if (S.empty() || S.front() != ']')
182         return false;
183       S = S.drop_front();
184     }
185     if (S.empty() || S.front() != '}')
186       return false;
187     S = S.drop_front();
188     if (!S.empty())
189       return false;
190     // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
191     // or {a[n:m]}.
192     Info.setAllowsRegister();
193     Name = S.data() - 1;
194     return true;
195   }
196 
197   // \p Constraint will be left pointing at the last character of
198   // the constraint.  In practice, it won't be changed unless the
199   // constraint is longer than one character.
200   std::string convertConstraint(const char *&Constraint) const override {
201     const char *Begin = Constraint;
202     TargetInfo::ConstraintInfo Info("", "");
203     if (validateAsmConstraint(Constraint, Info))
204       return std::string(Begin).substr(0, Constraint - Begin + 1);
205 
206     Constraint = Begin;
207     return std::string(1, *Constraint);
208   }
209 
210   bool
211   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
212                  StringRef CPU,
213                  const std::vector<std::string> &FeatureVec) const override;
214 
215   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
216 
217   void getTargetDefines(const LangOptions &Opts,
218                         MacroBuilder &Builder) const override;
219 
220   BuiltinVaListKind getBuiltinVaListKind() const override {
221     return TargetInfo::CharPtrBuiltinVaList;
222   }
223 
224   bool isValidCPUName(StringRef Name) const override {
225     if (getTriple().getArch() == llvm::Triple::amdgcn)
226       return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
227     return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
228   }
229 
230   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
231 
232   bool setCPU(const std::string &Name) override {
233     if (getTriple().getArch() == llvm::Triple::amdgcn) {
234       GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
235       GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
236     } else {
237       GPUKind = llvm::AMDGPU::parseArchR600(Name);
238       GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
239     }
240 
241     return GPUKind != llvm::AMDGPU::GK_NONE;
242   }
243 
244   void setSupportedOpenCLOpts() override {
245     auto &Opts = getSupportedOpenCLOpts();
246     Opts.support("cl_clang_storage_class_specifiers");
247     Opts.support("cl_khr_icd");
248 
249     bool IsAMDGCN = isAMDGCN(getTriple());
250 
251     if (hasFP64())
252       Opts.support("cl_khr_fp64");
253 
254     if (IsAMDGCN || GPUKind >= llvm::AMDGPU::GK_CEDAR) {
255       Opts.support("cl_khr_byte_addressable_store");
256       Opts.support("cl_khr_global_int32_base_atomics");
257       Opts.support("cl_khr_global_int32_extended_atomics");
258       Opts.support("cl_khr_local_int32_base_atomics");
259       Opts.support("cl_khr_local_int32_extended_atomics");
260     }
261 
262     if (IsAMDGCN) {
263       Opts.support("cl_khr_fp16");
264       Opts.support("cl_khr_int64_base_atomics");
265       Opts.support("cl_khr_int64_extended_atomics");
266       Opts.support("cl_khr_mipmap_image");
267       Opts.support("cl_khr_mipmap_image_writes");
268       Opts.support("cl_khr_subgroups");
269       Opts.support("cl_khr_3d_image_writes");
270       Opts.support("cl_amd_media_ops");
271       Opts.support("cl_amd_media_ops2");
272     }
273   }
274 
275   LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override {
276     switch (TK) {
277     case OCLTK_Image:
278       return LangAS::opencl_constant;
279 
280     case OCLTK_ClkEvent:
281     case OCLTK_Queue:
282     case OCLTK_ReserveID:
283       return LangAS::opencl_global;
284 
285     default:
286       return TargetInfo::getOpenCLTypeAddrSpace(TK);
287     }
288   }
289 
290   LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
291     switch (AS) {
292     case 0:
293       return LangAS::opencl_generic;
294     case 1:
295       return LangAS::opencl_global;
296     case 3:
297       return LangAS::opencl_local;
298     case 4:
299       return LangAS::opencl_constant;
300     case 5:
301       return LangAS::opencl_private;
302     default:
303       return getLangASFromTargetAS(AS);
304     }
305   }
306 
307   LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
308     return LangAS::Default;
309   }
310 
311   llvm::Optional<LangAS> getConstantAddressSpace() const override {
312     return getLangASFromTargetAS(Constant);
313   }
314 
315   /// \returns Target specific vtbl ptr address space.
316   unsigned getVtblPtrAddressSpace() const override {
317     return static_cast<unsigned>(Constant);
318   }
319 
320   /// \returns If a target requires an address within a target specific address
321   /// space \p AddressSpace to be converted in order to be used, then return the
322   /// corresponding target specific DWARF address space.
323   ///
324   /// \returns Otherwise return None and no conversion will be emitted in the
325   /// DWARF.
326   Optional<unsigned>
327   getDWARFAddressSpace(unsigned AddressSpace) const override {
328     const unsigned DWARF_Private = 1;
329     const unsigned DWARF_Local = 2;
330     if (AddressSpace == Private) {
331       return DWARF_Private;
332     } else if (AddressSpace == Local) {
333       return DWARF_Local;
334     } else {
335       return None;
336     }
337   }
338 
339   CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
340     switch (CC) {
341     default:
342       return CCCR_Warning;
343     case CC_C:
344     case CC_OpenCLKernel:
345       return CCCR_OK;
346     }
347   }
348 
349   // In amdgcn target the null pointer in global, constant, and generic
350   // address space has value 0 but in private and local address space has
351   // value ~0.
352   uint64_t getNullPointerValue(LangAS AS) const override {
353     return AS == LangAS::opencl_local ? ~0 : 0;
354   }
355 
356   void setAuxTarget(const TargetInfo *Aux) override;
357 };
358 
359 } // namespace targets
360 } // namespace clang
361 
362 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
363