1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63 } 64 65 //===----------------------------------------------------------------------===// 66 // Defines specific to certain operating systems. 67 //===----------------------------------------------------------------------===// 68 69 namespace { 70 template<typename TgtInfo> 71 class OSTargetInfo : public TgtInfo { 72 protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75 public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83 }; 84 } // end anonymous namespace 85 86 87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 if (Triple.isMacOSX()) { 123 Triple.getMacOSXVersion(Maj, Min, Rev); 124 PlatformName = "macosx"; 125 } else { 126 Triple.getOSVersion(Maj, Min, Rev); 127 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 128 } 129 130 // If -target arch-pc-win32-macho option specified, we're 131 // generating code for Win32 ABI. No need to emit 132 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 133 if (PlatformName == "win32") { 134 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 135 return; 136 } 137 138 // Set the appropriate OS version define. 139 if (Triple.getOS() == llvm::Triple::IOS) { 140 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 141 char Str[6]; 142 Str[0] = '0' + Maj; 143 Str[1] = '0' + (Min / 10); 144 Str[2] = '0' + (Min % 10); 145 Str[3] = '0' + (Rev / 10); 146 Str[4] = '0' + (Rev % 10); 147 Str[5] = '\0'; 148 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 149 } else { 150 // Note that the Driver allows versions which aren't representable in the 151 // define (because we only get a single digit for the minor and micro 152 // revision numbers). So, we limit them to the maximum representable 153 // version. 154 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 155 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 156 char Str[5]; 157 Str[0] = '0' + (Maj / 10); 158 Str[1] = '0' + (Maj % 10); 159 Str[2] = '0' + std::min(Min, 9U); 160 Str[3] = '0' + std::min(Rev, 9U); 161 Str[4] = '\0'; 162 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 163 } 164 165 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 166 } 167 168 namespace { 169 template<typename Target> 170 class DarwinTargetInfo : public OSTargetInfo<Target> { 171 protected: 172 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 173 MacroBuilder &Builder) const { 174 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 175 this->PlatformMinVersion); 176 } 177 178 public: 179 DarwinTargetInfo(const std::string& triple) : 180 OSTargetInfo<Target>(triple) { 181 llvm::Triple T = llvm::Triple(triple); 182 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 183 this->MCountName = "\01mcount"; 184 } 185 186 virtual std::string isValidSectionSpecifier(StringRef SR) const { 187 // Let MCSectionMachO validate this. 188 StringRef Segment, Section; 189 unsigned TAA, StubSize; 190 bool HasTAA; 191 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 192 TAA, HasTAA, StubSize); 193 } 194 195 virtual const char *getStaticInitSectionSpecifier() const { 196 // FIXME: We should return 0 when building kexts. 197 return "__TEXT,__StaticInit,regular,pure_instructions"; 198 } 199 200 /// Darwin does not support protected visibility. Darwin's "default" 201 /// is very similar to ELF's "protected"; Darwin requires a "weak" 202 /// attribute on declarations that can be dynamically replaced. 203 virtual bool hasProtectedVisibility() const { 204 return false; 205 } 206 }; 207 208 209 // DragonFlyBSD Target 210 template<typename Target> 211 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 212 protected: 213 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 214 MacroBuilder &Builder) const { 215 // DragonFly defines; list based off of gcc output 216 Builder.defineMacro("__DragonFly__"); 217 Builder.defineMacro("__DragonFly_cc_version", "100001"); 218 Builder.defineMacro("__ELF__"); 219 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 220 Builder.defineMacro("__tune_i386__"); 221 DefineStd(Builder, "unix", Opts); 222 } 223 public: 224 DragonFlyBSDTargetInfo(const std::string &triple) 225 : OSTargetInfo<Target>(triple) { 226 this->UserLabelPrefix = ""; 227 228 llvm::Triple Triple(triple); 229 switch (Triple.getArch()) { 230 default: 231 case llvm::Triple::x86: 232 case llvm::Triple::x86_64: 233 this->MCountName = ".mcount"; 234 break; 235 } 236 } 237 }; 238 239 // FreeBSD Target 240 template<typename Target> 241 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 242 protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // FreeBSD defines; list based off of gcc output 246 247 unsigned Release = Triple.getOSMajorVersion(); 248 if (Release == 0U) 249 Release = 8; 250 251 Builder.defineMacro("__FreeBSD__", Twine(Release)); 252 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 253 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 254 DefineStd(Builder, "unix", Opts); 255 Builder.defineMacro("__ELF__"); 256 } 257 public: 258 FreeBSDTargetInfo(const std::string &triple) 259 : OSTargetInfo<Target>(triple) { 260 this->UserLabelPrefix = ""; 261 262 llvm::Triple Triple(triple); 263 switch (Triple.getArch()) { 264 default: 265 case llvm::Triple::x86: 266 case llvm::Triple::x86_64: 267 this->MCountName = ".mcount"; 268 break; 269 case llvm::Triple::mips: 270 case llvm::Triple::mipsel: 271 case llvm::Triple::ppc: 272 case llvm::Triple::ppc64: 273 this->MCountName = "_mcount"; 274 break; 275 case llvm::Triple::arm: 276 this->MCountName = "__mcount"; 277 break; 278 } 279 280 } 281 }; 282 283 // Minix Target 284 template<typename Target> 285 class MinixTargetInfo : public OSTargetInfo<Target> { 286 protected: 287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 288 MacroBuilder &Builder) const { 289 // Minix defines 290 291 Builder.defineMacro("__minix", "3"); 292 Builder.defineMacro("_EM_WSIZE", "4"); 293 Builder.defineMacro("_EM_PSIZE", "4"); 294 Builder.defineMacro("_EM_SSIZE", "2"); 295 Builder.defineMacro("_EM_LSIZE", "4"); 296 Builder.defineMacro("_EM_FSIZE", "4"); 297 Builder.defineMacro("_EM_DSIZE", "8"); 298 Builder.defineMacro("__ELF__"); 299 DefineStd(Builder, "unix", Opts); 300 } 301 public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306 }; 307 308 // Linux target 309 template<typename Target> 310 class LinuxTargetInfo : public OSTargetInfo<Target> { 311 protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Opts.POSIXThreads) 320 Builder.defineMacro("_REENTRANT"); 321 if (Opts.CPlusPlus) 322 Builder.defineMacro("_GNU_SOURCE"); 323 } 324 public: 325 LinuxTargetInfo(const std::string& triple) 326 : OSTargetInfo<Target>(triple) { 327 this->UserLabelPrefix = ""; 328 this->WIntType = TargetInfo::UnsignedInt; 329 } 330 331 virtual const char *getStaticInitSectionSpecifier() const { 332 return ".text.startup"; 333 } 334 }; 335 336 // NetBSD Target 337 template<typename Target> 338 class NetBSDTargetInfo : public OSTargetInfo<Target> { 339 protected: 340 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 341 MacroBuilder &Builder) const { 342 // NetBSD defines; list based off of gcc output 343 Builder.defineMacro("__NetBSD__"); 344 Builder.defineMacro("__unix__"); 345 Builder.defineMacro("__ELF__"); 346 if (Opts.POSIXThreads) 347 Builder.defineMacro("_POSIX_THREADS"); 348 } 349 public: 350 NetBSDTargetInfo(const std::string &triple) 351 : OSTargetInfo<Target>(triple) { 352 this->UserLabelPrefix = ""; 353 } 354 }; 355 356 // OpenBSD Target 357 template<typename Target> 358 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 359 protected: 360 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 361 MacroBuilder &Builder) const { 362 // OpenBSD defines; list based off of gcc output 363 364 Builder.defineMacro("__OpenBSD__"); 365 DefineStd(Builder, "unix", Opts); 366 Builder.defineMacro("__ELF__"); 367 if (Opts.POSIXThreads) 368 Builder.defineMacro("_POSIX_THREADS"); 369 } 370 public: 371 OpenBSDTargetInfo(const std::string &triple) 372 : OSTargetInfo<Target>(triple) { 373 this->UserLabelPrefix = ""; 374 375 llvm::Triple Triple(triple); 376 switch (Triple.getArch()) { 377 default: 378 case llvm::Triple::x86: 379 case llvm::Triple::x86_64: 380 case llvm::Triple::arm: 381 case llvm::Triple::sparc: 382 this->MCountName = "__mcount"; 383 break; 384 case llvm::Triple::mips64: 385 case llvm::Triple::mips64el: 386 case llvm::Triple::ppc: 387 case llvm::Triple::sparcv9: 388 this->MCountName = "_mcount"; 389 break; 390 } 391 } 392 }; 393 394 // PSP Target 395 template<typename Target> 396 class PSPTargetInfo : public OSTargetInfo<Target> { 397 protected: 398 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 399 MacroBuilder &Builder) const { 400 // PSP defines; list based on the output of the pspdev gcc toolchain. 401 Builder.defineMacro("PSP"); 402 Builder.defineMacro("_PSP"); 403 Builder.defineMacro("__psp__"); 404 Builder.defineMacro("__ELF__"); 405 } 406 public: 407 PSPTargetInfo(const std::string& triple) 408 : OSTargetInfo<Target>(triple) { 409 this->UserLabelPrefix = ""; 410 } 411 }; 412 413 // PS3 PPU Target 414 template<typename Target> 415 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 416 protected: 417 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 418 MacroBuilder &Builder) const { 419 // PS3 PPU defines. 420 Builder.defineMacro("__PPC__"); 421 Builder.defineMacro("__PPU__"); 422 Builder.defineMacro("__CELLOS_LV2__"); 423 Builder.defineMacro("__ELF__"); 424 Builder.defineMacro("__LP32__"); 425 Builder.defineMacro("_ARCH_PPC64"); 426 Builder.defineMacro("__powerpc64__"); 427 } 428 public: 429 PS3PPUTargetInfo(const std::string& triple) 430 : OSTargetInfo<Target>(triple) { 431 this->UserLabelPrefix = ""; 432 this->LongWidth = this->LongAlign = 32; 433 this->PointerWidth = this->PointerAlign = 32; 434 this->IntMaxType = TargetInfo::SignedLongLong; 435 this->UIntMaxType = TargetInfo::UnsignedLongLong; 436 this->Int64Type = TargetInfo::SignedLongLong; 437 this->SizeType = TargetInfo::UnsignedInt; 438 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 439 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 440 } 441 }; 442 443 // FIXME: Need a real SPU target. 444 // PS3 SPU Target 445 template<typename Target> 446 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 447 protected: 448 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 449 MacroBuilder &Builder) const { 450 // PS3 PPU defines. 451 Builder.defineMacro("__SPU__"); 452 Builder.defineMacro("__ELF__"); 453 } 454 public: 455 PS3SPUTargetInfo(const std::string& triple) 456 : OSTargetInfo<Target>(triple) { 457 this->UserLabelPrefix = ""; 458 } 459 }; 460 461 // AuroraUX target 462 template<typename Target> 463 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 464 protected: 465 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 466 MacroBuilder &Builder) const { 467 DefineStd(Builder, "sun", Opts); 468 DefineStd(Builder, "unix", Opts); 469 Builder.defineMacro("__ELF__"); 470 Builder.defineMacro("__svr4__"); 471 Builder.defineMacro("__SVR4"); 472 } 473 public: 474 AuroraUXTargetInfo(const std::string& triple) 475 : OSTargetInfo<Target>(triple) { 476 this->UserLabelPrefix = ""; 477 this->WCharType = this->SignedLong; 478 // FIXME: WIntType should be SignedLong 479 } 480 }; 481 482 // Solaris target 483 template<typename Target> 484 class SolarisTargetInfo : public OSTargetInfo<Target> { 485 protected: 486 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 487 MacroBuilder &Builder) const { 488 DefineStd(Builder, "sun", Opts); 489 DefineStd(Builder, "unix", Opts); 490 Builder.defineMacro("__ELF__"); 491 Builder.defineMacro("__svr4__"); 492 Builder.defineMacro("__SVR4"); 493 Builder.defineMacro("_XOPEN_SOURCE", "500"); 494 Builder.defineMacro("_LARGEFILE_SOURCE"); 495 Builder.defineMacro("_LARGEFILE64_SOURCE"); 496 Builder.defineMacro("__EXTENSIONS__"); 497 } 498 public: 499 SolarisTargetInfo(const std::string& triple) 500 : OSTargetInfo<Target>(triple) { 501 this->UserLabelPrefix = ""; 502 this->WCharType = this->SignedLong; 503 // FIXME: WIntType should be SignedLong 504 } 505 }; 506 507 // Windows target 508 template<typename Target> 509 class WindowsTargetInfo : public OSTargetInfo<Target> { 510 protected: 511 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 512 MacroBuilder &Builder) const { 513 Builder.defineMacro("_WIN32"); 514 } 515 void getVisualStudioDefines(const LangOptions &Opts, 516 MacroBuilder &Builder) const { 517 if (Opts.CPlusPlus) { 518 if (Opts.RTTI) 519 Builder.defineMacro("_CPPRTTI"); 520 521 if (Opts.Exceptions) 522 Builder.defineMacro("_CPPUNWIND"); 523 } 524 525 if (!Opts.CharIsSigned) 526 Builder.defineMacro("_CHAR_UNSIGNED"); 527 528 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 529 // but it works for now. 530 if (Opts.POSIXThreads) 531 Builder.defineMacro("_MT"); 532 533 if (Opts.MSCVersion != 0) 534 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 535 536 if (Opts.MicrosoftExt) { 537 Builder.defineMacro("_MSC_EXTENSIONS"); 538 539 if (Opts.CPlusPlus0x) { 540 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 541 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 542 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 543 } 544 } 545 546 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 547 } 548 549 public: 550 WindowsTargetInfo(const std::string &triple) 551 : OSTargetInfo<Target>(triple) {} 552 }; 553 554 } // end anonymous namespace. 555 556 //===----------------------------------------------------------------------===// 557 // Specific target implementations. 558 //===----------------------------------------------------------------------===// 559 560 namespace { 561 // PPC abstract base class 562 class PPCTargetInfo : public TargetInfo { 563 static const Builtin::Info BuiltinInfo[]; 564 static const char * const GCCRegNames[]; 565 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 566 public: 567 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) { 568 LongDoubleWidth = LongDoubleAlign = 128; 569 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble; 570 } 571 572 virtual void getTargetBuiltins(const Builtin::Info *&Records, 573 unsigned &NumRecords) const { 574 Records = BuiltinInfo; 575 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 576 } 577 578 virtual bool isCLZForZeroUndef() const { return false; } 579 580 virtual void getTargetDefines(const LangOptions &Opts, 581 MacroBuilder &Builder) const; 582 583 virtual bool hasFeature(StringRef Feature) const; 584 585 virtual void getGCCRegNames(const char * const *&Names, 586 unsigned &NumNames) const; 587 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 588 unsigned &NumAliases) const; 589 virtual bool validateAsmConstraint(const char *&Name, 590 TargetInfo::ConstraintInfo &Info) const { 591 switch (*Name) { 592 default: return false; 593 case 'O': // Zero 594 break; 595 case 'b': // Base register 596 case 'f': // Floating point register 597 Info.setAllowsRegister(); 598 break; 599 // FIXME: The following are added to allow parsing. 600 // I just took a guess at what the actions should be. 601 // Also, is more specific checking needed? I.e. specific registers? 602 case 'd': // Floating point register (containing 64-bit value) 603 case 'v': // Altivec vector register 604 Info.setAllowsRegister(); 605 break; 606 case 'w': 607 switch (Name[1]) { 608 case 'd':// VSX vector register to hold vector double data 609 case 'f':// VSX vector register to hold vector float data 610 case 's':// VSX vector register to hold scalar float data 611 case 'a':// Any VSX register 612 break; 613 default: 614 return false; 615 } 616 Info.setAllowsRegister(); 617 Name++; // Skip over 'w'. 618 break; 619 case 'h': // `MQ', `CTR', or `LINK' register 620 case 'q': // `MQ' register 621 case 'c': // `CTR' register 622 case 'l': // `LINK' register 623 case 'x': // `CR' register (condition register) number 0 624 case 'y': // `CR' register (condition register) 625 case 'z': // `XER[CA]' carry bit (part of the XER register) 626 Info.setAllowsRegister(); 627 break; 628 case 'I': // Signed 16-bit constant 629 case 'J': // Unsigned 16-bit constant shifted left 16 bits 630 // (use `L' instead for SImode constants) 631 case 'K': // Unsigned 16-bit constant 632 case 'L': // Signed 16-bit constant shifted left 16 bits 633 case 'M': // Constant larger than 31 634 case 'N': // Exact power of 2 635 case 'P': // Constant whose negation is a signed 16-bit constant 636 case 'G': // Floating point constant that can be loaded into a 637 // register with one instruction per word 638 case 'H': // Integer/Floating point constant that can be loaded 639 // into a register using three instructions 640 break; 641 case 'm': // Memory operand. Note that on PowerPC targets, m can 642 // include addresses that update the base register. It 643 // is therefore only safe to use `m' in an asm statement 644 // if that asm statement accesses the operand exactly once. 645 // The asm statement must also use `%U<opno>' as a 646 // placeholder for the "update" flag in the corresponding 647 // load or store instruction. For example: 648 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 649 // is correct but: 650 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 651 // is not. Use es rather than m if you don't want the base 652 // register to be updated. 653 case 'e': 654 if (Name[1] != 's') 655 return false; 656 // es: A "stable" memory operand; that is, one which does not 657 // include any automodification of the base register. Unlike 658 // `m', this constraint can be used in asm statements that 659 // might access the operand several times, or that might not 660 // access it at all. 661 Info.setAllowsMemory(); 662 Name++; // Skip over 'e'. 663 break; 664 case 'Q': // Memory operand that is an offset from a register (it is 665 // usually better to use `m' or `es' in asm statements) 666 case 'Z': // Memory operand that is an indexed or indirect from a 667 // register (it is usually better to use `m' or `es' in 668 // asm statements) 669 Info.setAllowsMemory(); 670 Info.setAllowsRegister(); 671 break; 672 case 'R': // AIX TOC entry 673 case 'a': // Address operand that is an indexed or indirect from a 674 // register (`p' is preferable for asm statements) 675 case 'S': // Constant suitable as a 64-bit mask operand 676 case 'T': // Constant suitable as a 32-bit mask operand 677 case 'U': // System V Release 4 small data area reference 678 case 't': // AND masks that can be performed by two rldic{l, r} 679 // instructions 680 case 'W': // Vector constant that does not require memory 681 case 'j': // Vector constant that is all zeros. 682 break; 683 // End FIXME. 684 } 685 return true; 686 } 687 virtual const char *getClobbers() const { 688 return ""; 689 } 690 }; 691 692 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 693 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 694 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 695 ALL_LANGUAGES }, 696 #include "clang/Basic/BuiltinsPPC.def" 697 }; 698 699 700 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 701 /// #defines that are not tied to a specific subtarget. 702 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 703 MacroBuilder &Builder) const { 704 // Target identification. 705 Builder.defineMacro("__ppc__"); 706 Builder.defineMacro("_ARCH_PPC"); 707 Builder.defineMacro("__powerpc__"); 708 Builder.defineMacro("__POWERPC__"); 709 if (PointerWidth == 64) { 710 Builder.defineMacro("_ARCH_PPC64"); 711 Builder.defineMacro("_LP64"); 712 Builder.defineMacro("__LP64__"); 713 Builder.defineMacro("__powerpc64__"); 714 Builder.defineMacro("__ppc64__"); 715 } else { 716 Builder.defineMacro("__ppc__"); 717 } 718 719 // Target properties. 720 if (getTriple().getOS() != llvm::Triple::NetBSD) 721 Builder.defineMacro("_BIG_ENDIAN"); 722 Builder.defineMacro("__BIG_ENDIAN__"); 723 724 // Subtarget options. 725 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 726 Builder.defineMacro("__REGISTER_PREFIX__", ""); 727 728 // FIXME: Should be controlled by command line option. 729 Builder.defineMacro("__LONG_DOUBLE_128__"); 730 731 if (Opts.AltiVec) { 732 Builder.defineMacro("__VEC__", "10206"); 733 Builder.defineMacro("__ALTIVEC__"); 734 } 735 } 736 737 bool PPCTargetInfo::hasFeature(StringRef Feature) const { 738 return Feature == "powerpc"; 739 } 740 741 742 const char * const PPCTargetInfo::GCCRegNames[] = { 743 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 744 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 745 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 746 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 747 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 748 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 749 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 750 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 751 "mq", "lr", "ctr", "ap", 752 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 753 "xer", 754 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 755 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 756 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 757 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 758 "vrsave", "vscr", 759 "spe_acc", "spefscr", 760 "sfp" 761 }; 762 763 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 764 unsigned &NumNames) const { 765 Names = GCCRegNames; 766 NumNames = llvm::array_lengthof(GCCRegNames); 767 } 768 769 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 770 // While some of these aliases do map to different registers 771 // they still share the same register name. 772 { { "0" }, "r0" }, 773 { { "1"}, "r1" }, 774 { { "2" }, "r2" }, 775 { { "3" }, "r3" }, 776 { { "4" }, "r4" }, 777 { { "5" }, "r5" }, 778 { { "6" }, "r6" }, 779 { { "7" }, "r7" }, 780 { { "8" }, "r8" }, 781 { { "9" }, "r9" }, 782 { { "10" }, "r10" }, 783 { { "11" }, "r11" }, 784 { { "12" }, "r12" }, 785 { { "13" }, "r13" }, 786 { { "14" }, "r14" }, 787 { { "15" }, "r15" }, 788 { { "16" }, "r16" }, 789 { { "17" }, "r17" }, 790 { { "18" }, "r18" }, 791 { { "19" }, "r19" }, 792 { { "20" }, "r20" }, 793 { { "21" }, "r21" }, 794 { { "22" }, "r22" }, 795 { { "23" }, "r23" }, 796 { { "24" }, "r24" }, 797 { { "25" }, "r25" }, 798 { { "26" }, "r26" }, 799 { { "27" }, "r27" }, 800 { { "28" }, "r28" }, 801 { { "29" }, "r29" }, 802 { { "30" }, "r30" }, 803 { { "31" }, "r31" }, 804 { { "fr0" }, "f0" }, 805 { { "fr1" }, "f1" }, 806 { { "fr2" }, "f2" }, 807 { { "fr3" }, "f3" }, 808 { { "fr4" }, "f4" }, 809 { { "fr5" }, "f5" }, 810 { { "fr6" }, "f6" }, 811 { { "fr7" }, "f7" }, 812 { { "fr8" }, "f8" }, 813 { { "fr9" }, "f9" }, 814 { { "fr10" }, "f10" }, 815 { { "fr11" }, "f11" }, 816 { { "fr12" }, "f12" }, 817 { { "fr13" }, "f13" }, 818 { { "fr14" }, "f14" }, 819 { { "fr15" }, "f15" }, 820 { { "fr16" }, "f16" }, 821 { { "fr17" }, "f17" }, 822 { { "fr18" }, "f18" }, 823 { { "fr19" }, "f19" }, 824 { { "fr20" }, "f20" }, 825 { { "fr21" }, "f21" }, 826 { { "fr22" }, "f22" }, 827 { { "fr23" }, "f23" }, 828 { { "fr24" }, "f24" }, 829 { { "fr25" }, "f25" }, 830 { { "fr26" }, "f26" }, 831 { { "fr27" }, "f27" }, 832 { { "fr28" }, "f28" }, 833 { { "fr29" }, "f29" }, 834 { { "fr30" }, "f30" }, 835 { { "fr31" }, "f31" }, 836 { { "cc" }, "cr0" }, 837 }; 838 839 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 840 unsigned &NumAliases) const { 841 Aliases = GCCRegAliases; 842 NumAliases = llvm::array_lengthof(GCCRegAliases); 843 } 844 } // end anonymous namespace. 845 846 namespace { 847 class PPC32TargetInfo : public PPCTargetInfo { 848 public: 849 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 850 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 851 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 852 853 switch (getTriple().getOS()) { 854 case llvm::Triple::Linux: 855 case llvm::Triple::FreeBSD: 856 case llvm::Triple::NetBSD: 857 SizeType = UnsignedInt; 858 break; 859 default: 860 break; 861 } 862 } 863 864 virtual const char *getVAListDeclaration() const { 865 // This is the ELF definition, and is overridden by the Darwin sub-target 866 return "typedef struct __va_list_tag {" 867 " unsigned char gpr;" 868 " unsigned char fpr;" 869 " unsigned short reserved;" 870 " void* overflow_arg_area;" 871 " void* reg_save_area;" 872 "} __builtin_va_list[1];"; 873 } 874 }; 875 } // end anonymous namespace. 876 877 namespace { 878 class PPC64TargetInfo : public PPCTargetInfo { 879 public: 880 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 881 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 882 IntMaxType = SignedLong; 883 UIntMaxType = UnsignedLong; 884 Int64Type = SignedLong; 885 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 886 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 887 } 888 virtual const char *getVAListDeclaration() const { 889 return "typedef char* __builtin_va_list;"; 890 } 891 }; 892 } // end anonymous namespace. 893 894 895 namespace { 896 class DarwinPPC32TargetInfo : 897 public DarwinTargetInfo<PPC32TargetInfo> { 898 public: 899 DarwinPPC32TargetInfo(const std::string& triple) 900 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 901 HasAlignMac68kSupport = true; 902 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 903 LongLongAlign = 32; 904 SuitableAlign = 128; 905 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 906 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 907 } 908 virtual const char *getVAListDeclaration() const { 909 return "typedef char* __builtin_va_list;"; 910 } 911 }; 912 913 class DarwinPPC64TargetInfo : 914 public DarwinTargetInfo<PPC64TargetInfo> { 915 public: 916 DarwinPPC64TargetInfo(const std::string& triple) 917 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 918 HasAlignMac68kSupport = true; 919 SuitableAlign = 128; 920 } 921 }; 922 } // end anonymous namespace. 923 924 namespace { 925 static const unsigned PTXAddrSpaceMap[] = { 926 0, // opencl_global 927 4, // opencl_local 928 1 // opencl_constant 929 }; 930 class PTXTargetInfo : public TargetInfo { 931 static const char * const GCCRegNames[]; 932 static const Builtin::Info BuiltinInfo[]; 933 std::vector<llvm::StringRef> AvailableFeatures; 934 public: 935 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 936 BigEndian = false; 937 TLSSupported = false; 938 LongWidth = LongAlign = 64; 939 AddrSpaceMap = &PTXAddrSpaceMap; 940 // Define available target features 941 // These must be defined in sorted order! 942 AvailableFeatures.push_back("compute10"); 943 AvailableFeatures.push_back("compute11"); 944 AvailableFeatures.push_back("compute12"); 945 AvailableFeatures.push_back("compute13"); 946 AvailableFeatures.push_back("compute20"); 947 AvailableFeatures.push_back("double"); 948 AvailableFeatures.push_back("no-fma"); 949 AvailableFeatures.push_back("ptx20"); 950 AvailableFeatures.push_back("ptx21"); 951 AvailableFeatures.push_back("ptx22"); 952 AvailableFeatures.push_back("ptx23"); 953 AvailableFeatures.push_back("sm10"); 954 AvailableFeatures.push_back("sm11"); 955 AvailableFeatures.push_back("sm12"); 956 AvailableFeatures.push_back("sm13"); 957 AvailableFeatures.push_back("sm20"); 958 AvailableFeatures.push_back("sm21"); 959 AvailableFeatures.push_back("sm22"); 960 AvailableFeatures.push_back("sm23"); 961 } 962 virtual void getTargetDefines(const LangOptions &Opts, 963 MacroBuilder &Builder) const { 964 Builder.defineMacro("__PTX__"); 965 } 966 virtual void getTargetBuiltins(const Builtin::Info *&Records, 967 unsigned &NumRecords) const { 968 Records = BuiltinInfo; 969 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 970 } 971 virtual bool hasFeature(StringRef Feature) const { 972 return Feature == "ptx"; 973 } 974 975 virtual void getGCCRegNames(const char * const *&Names, 976 unsigned &NumNames) const; 977 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 978 unsigned &NumAliases) const { 979 // No aliases. 980 Aliases = 0; 981 NumAliases = 0; 982 } 983 virtual bool validateAsmConstraint(const char *&Name, 984 TargetInfo::ConstraintInfo &info) const { 985 // FIXME: implement 986 return true; 987 } 988 virtual const char *getClobbers() const { 989 // FIXME: Is this really right? 990 return ""; 991 } 992 virtual const char *getVAListDeclaration() const { 993 // FIXME: implement 994 return "typedef char* __builtin_va_list;"; 995 } 996 997 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 998 const std::string &Name, 999 bool Enabled) const; 1000 }; 1001 1002 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 1003 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1004 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1005 ALL_LANGUAGES }, 1006 #include "clang/Basic/BuiltinsPTX.def" 1007 }; 1008 1009 const char * const PTXTargetInfo::GCCRegNames[] = { 1010 "r0" 1011 }; 1012 1013 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 1014 unsigned &NumNames) const { 1015 Names = GCCRegNames; 1016 NumNames = llvm::array_lengthof(GCCRegNames); 1017 } 1018 1019 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1020 const std::string &Name, 1021 bool Enabled) const { 1022 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1023 Name)) { 1024 Features[Name] = Enabled; 1025 return true; 1026 } else { 1027 return false; 1028 } 1029 } 1030 1031 class PTX32TargetInfo : public PTXTargetInfo { 1032 public: 1033 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1034 PointerWidth = PointerAlign = 32; 1035 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1036 DescriptionString 1037 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1038 } 1039 }; 1040 1041 class PTX64TargetInfo : public PTXTargetInfo { 1042 public: 1043 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1044 PointerWidth = PointerAlign = 64; 1045 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1046 DescriptionString 1047 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1048 } 1049 }; 1050 } 1051 1052 namespace { 1053 // MBlaze abstract base class 1054 class MBlazeTargetInfo : public TargetInfo { 1055 static const char * const GCCRegNames[]; 1056 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1057 1058 public: 1059 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1060 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1061 } 1062 1063 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1064 unsigned &NumRecords) const { 1065 // FIXME: Implement. 1066 Records = 0; 1067 NumRecords = 0; 1068 } 1069 1070 virtual void getTargetDefines(const LangOptions &Opts, 1071 MacroBuilder &Builder) const; 1072 1073 virtual bool hasFeature(StringRef Feature) const { 1074 return Feature == "mblaze"; 1075 } 1076 1077 virtual const char *getVAListDeclaration() const { 1078 return "typedef char* __builtin_va_list;"; 1079 } 1080 virtual const char *getTargetPrefix() const { 1081 return "mblaze"; 1082 } 1083 virtual void getGCCRegNames(const char * const *&Names, 1084 unsigned &NumNames) const; 1085 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1086 unsigned &NumAliases) const; 1087 virtual bool validateAsmConstraint(const char *&Name, 1088 TargetInfo::ConstraintInfo &Info) const { 1089 switch (*Name) { 1090 default: return false; 1091 case 'O': // Zero 1092 return true; 1093 case 'b': // Base register 1094 case 'f': // Floating point register 1095 Info.setAllowsRegister(); 1096 return true; 1097 } 1098 } 1099 virtual const char *getClobbers() const { 1100 return ""; 1101 } 1102 }; 1103 1104 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1105 /// #defines that are not tied to a specific subtarget. 1106 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1107 MacroBuilder &Builder) const { 1108 // Target identification. 1109 Builder.defineMacro("__microblaze__"); 1110 Builder.defineMacro("_ARCH_MICROBLAZE"); 1111 Builder.defineMacro("__MICROBLAZE__"); 1112 1113 // Target properties. 1114 Builder.defineMacro("_BIG_ENDIAN"); 1115 Builder.defineMacro("__BIG_ENDIAN__"); 1116 1117 // Subtarget options. 1118 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1119 } 1120 1121 1122 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1123 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1125 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1126 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1127 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1128 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1129 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1130 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1131 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1132 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1133 }; 1134 1135 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1136 unsigned &NumNames) const { 1137 Names = GCCRegNames; 1138 NumNames = llvm::array_lengthof(GCCRegNames); 1139 } 1140 1141 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1142 { {"f0"}, "r0" }, 1143 { {"f1"}, "r1" }, 1144 { {"f2"}, "r2" }, 1145 { {"f3"}, "r3" }, 1146 { {"f4"}, "r4" }, 1147 { {"f5"}, "r5" }, 1148 { {"f6"}, "r6" }, 1149 { {"f7"}, "r7" }, 1150 { {"f8"}, "r8" }, 1151 { {"f9"}, "r9" }, 1152 { {"f10"}, "r10" }, 1153 { {"f11"}, "r11" }, 1154 { {"f12"}, "r12" }, 1155 { {"f13"}, "r13" }, 1156 { {"f14"}, "r14" }, 1157 { {"f15"}, "r15" }, 1158 { {"f16"}, "r16" }, 1159 { {"f17"}, "r17" }, 1160 { {"f18"}, "r18" }, 1161 { {"f19"}, "r19" }, 1162 { {"f20"}, "r20" }, 1163 { {"f21"}, "r21" }, 1164 { {"f22"}, "r22" }, 1165 { {"f23"}, "r23" }, 1166 { {"f24"}, "r24" }, 1167 { {"f25"}, "r25" }, 1168 { {"f26"}, "r26" }, 1169 { {"f27"}, "r27" }, 1170 { {"f28"}, "r28" }, 1171 { {"f29"}, "r29" }, 1172 { {"f30"}, "r30" }, 1173 { {"f31"}, "r31" }, 1174 }; 1175 1176 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1177 unsigned &NumAliases) const { 1178 Aliases = GCCRegAliases; 1179 NumAliases = llvm::array_lengthof(GCCRegAliases); 1180 } 1181 } // end anonymous namespace. 1182 1183 namespace { 1184 // Namespace for x86 abstract base class 1185 const Builtin::Info BuiltinInfo[] = { 1186 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1187 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1188 ALL_LANGUAGES }, 1189 #include "clang/Basic/BuiltinsX86.def" 1190 }; 1191 1192 static const char* const GCCRegNames[] = { 1193 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1194 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1195 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1196 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1197 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1198 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1199 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1200 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1201 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1202 }; 1203 1204 const TargetInfo::AddlRegName AddlRegNames[] = { 1205 { { "al", "ah", "eax", "rax" }, 0 }, 1206 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1207 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1208 { { "dl", "dh", "edx", "rdx" }, 1 }, 1209 { { "esi", "rsi" }, 4 }, 1210 { { "edi", "rdi" }, 5 }, 1211 { { "esp", "rsp" }, 7 }, 1212 { { "ebp", "rbp" }, 6 }, 1213 }; 1214 1215 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1216 // most of the implementation can be shared. 1217 class X86TargetInfo : public TargetInfo { 1218 enum X86SSEEnum { 1219 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1220 } SSELevel; 1221 enum MMX3DNowEnum { 1222 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1223 } MMX3DNowLevel; 1224 1225 bool HasAES; 1226 bool HasLZCNT; 1227 bool HasBMI; 1228 bool HasBMI2; 1229 bool HasPOPCNT; 1230 bool HasFMA4; 1231 1232 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1233 /// 1234 /// Each enumeration represents a particular CPU supported by Clang. These 1235 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1236 enum CPUKind { 1237 CK_Generic, 1238 1239 /// \name i386 1240 /// i386-generation processors. 1241 //@{ 1242 CK_i386, 1243 //@} 1244 1245 /// \name i486 1246 /// i486-generation processors. 1247 //@{ 1248 CK_i486, 1249 CK_WinChipC6, 1250 CK_WinChip2, 1251 CK_C3, 1252 //@} 1253 1254 /// \name i586 1255 /// i586-generation processors, P5 microarchitecture based. 1256 //@{ 1257 CK_i586, 1258 CK_Pentium, 1259 CK_PentiumMMX, 1260 //@} 1261 1262 /// \name i686 1263 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1264 //@{ 1265 CK_i686, 1266 CK_PentiumPro, 1267 CK_Pentium2, 1268 CK_Pentium3, 1269 CK_Pentium3M, 1270 CK_PentiumM, 1271 CK_C3_2, 1272 1273 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1274 /// Clang however has some logic to suport this. 1275 // FIXME: Warn, deprecate, and potentially remove this. 1276 CK_Yonah, 1277 //@} 1278 1279 /// \name Netburst 1280 /// Netburst microarchitecture based processors. 1281 //@{ 1282 CK_Pentium4, 1283 CK_Pentium4M, 1284 CK_Prescott, 1285 CK_Nocona, 1286 //@} 1287 1288 /// \name Core 1289 /// Core microarchitecture based processors. 1290 //@{ 1291 CK_Core2, 1292 1293 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1294 /// codename which GCC no longer accepts as an option to -march, but Clang 1295 /// has some logic for recognizing it. 1296 // FIXME: Warn, deprecate, and potentially remove this. 1297 CK_Penryn, 1298 //@} 1299 1300 /// \name Atom 1301 /// Atom processors 1302 //@{ 1303 CK_Atom, 1304 //@} 1305 1306 /// \name Nehalem 1307 /// Nehalem microarchitecture based processors. 1308 //@{ 1309 CK_Corei7, 1310 CK_Corei7AVX, 1311 CK_CoreAVXi, 1312 CK_CoreAVX2, 1313 //@} 1314 1315 /// \name K6 1316 /// K6 architecture processors. 1317 //@{ 1318 CK_K6, 1319 CK_K6_2, 1320 CK_K6_3, 1321 //@} 1322 1323 /// \name K7 1324 /// K7 architecture processors. 1325 //@{ 1326 CK_Athlon, 1327 CK_AthlonThunderbird, 1328 CK_Athlon4, 1329 CK_AthlonXP, 1330 CK_AthlonMP, 1331 //@} 1332 1333 /// \name K8 1334 /// K8 architecture processors. 1335 //@{ 1336 CK_Athlon64, 1337 CK_Athlon64SSE3, 1338 CK_AthlonFX, 1339 CK_K8, 1340 CK_K8SSE3, 1341 CK_Opteron, 1342 CK_OpteronSSE3, 1343 CK_AMDFAM10, 1344 //@} 1345 1346 /// \name Bobcat 1347 /// Bobcat architecture processors. 1348 //@{ 1349 CK_BTVER1, 1350 //@} 1351 1352 /// \name Bulldozer 1353 /// Bulldozer architecture processors. 1354 //@{ 1355 CK_BDVER1, 1356 CK_BDVER2, 1357 //@} 1358 1359 /// This specification is deprecated and will be removed in the future. 1360 /// Users should prefer \see CK_K8. 1361 // FIXME: Warn on this when the CPU is set to it. 1362 CK_x86_64, 1363 //@} 1364 1365 /// \name Geode 1366 /// Geode processors. 1367 //@{ 1368 CK_Geode 1369 //@} 1370 } CPU; 1371 1372 public: 1373 X86TargetInfo(const std::string& triple) 1374 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1375 HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false), 1376 HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) { 1377 BigEndian = false; 1378 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1379 } 1380 virtual unsigned getFloatEvalMethod() const { 1381 // X87 evaluates with 80 bits "long double" precision. 1382 return SSELevel == NoSSE ? 2 : 0; 1383 } 1384 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1385 unsigned &NumRecords) const { 1386 Records = BuiltinInfo; 1387 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1388 } 1389 virtual void getGCCRegNames(const char * const *&Names, 1390 unsigned &NumNames) const { 1391 Names = GCCRegNames; 1392 NumNames = llvm::array_lengthof(GCCRegNames); 1393 } 1394 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1395 unsigned &NumAliases) const { 1396 Aliases = 0; 1397 NumAliases = 0; 1398 } 1399 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1400 unsigned &NumNames) const { 1401 Names = AddlRegNames; 1402 NumNames = llvm::array_lengthof(AddlRegNames); 1403 } 1404 virtual bool validateAsmConstraint(const char *&Name, 1405 TargetInfo::ConstraintInfo &info) const; 1406 virtual std::string convertConstraint(const char *&Constraint) const; 1407 virtual const char *getClobbers() const { 1408 return "~{dirflag},~{fpsr},~{flags}"; 1409 } 1410 virtual void getTargetDefines(const LangOptions &Opts, 1411 MacroBuilder &Builder) const; 1412 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1413 const std::string &Name, 1414 bool Enabled) const; 1415 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1416 virtual bool hasFeature(StringRef Feature) const; 1417 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1418 virtual const char* getABI() const { 1419 if (PointerWidth == 64 && SSELevel >= AVX) 1420 return "avx"; 1421 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1422 return "no-mmx"; 1423 return ""; 1424 } 1425 virtual bool setCPU(const std::string &Name) { 1426 CPU = llvm::StringSwitch<CPUKind>(Name) 1427 .Case("i386", CK_i386) 1428 .Case("i486", CK_i486) 1429 .Case("winchip-c6", CK_WinChipC6) 1430 .Case("winchip2", CK_WinChip2) 1431 .Case("c3", CK_C3) 1432 .Case("i586", CK_i586) 1433 .Case("pentium", CK_Pentium) 1434 .Case("pentium-mmx", CK_PentiumMMX) 1435 .Case("i686", CK_i686) 1436 .Case("pentiumpro", CK_PentiumPro) 1437 .Case("pentium2", CK_Pentium2) 1438 .Case("pentium3", CK_Pentium3) 1439 .Case("pentium3m", CK_Pentium3M) 1440 .Case("pentium-m", CK_PentiumM) 1441 .Case("c3-2", CK_C3_2) 1442 .Case("yonah", CK_Yonah) 1443 .Case("pentium4", CK_Pentium4) 1444 .Case("pentium4m", CK_Pentium4M) 1445 .Case("prescott", CK_Prescott) 1446 .Case("nocona", CK_Nocona) 1447 .Case("core2", CK_Core2) 1448 .Case("penryn", CK_Penryn) 1449 .Case("atom", CK_Atom) 1450 .Case("corei7", CK_Corei7) 1451 .Case("corei7-avx", CK_Corei7AVX) 1452 .Case("core-avx-i", CK_CoreAVXi) 1453 .Case("core-avx2", CK_CoreAVX2) 1454 .Case("k6", CK_K6) 1455 .Case("k6-2", CK_K6_2) 1456 .Case("k6-3", CK_K6_3) 1457 .Case("athlon", CK_Athlon) 1458 .Case("athlon-tbird", CK_AthlonThunderbird) 1459 .Case("athlon-4", CK_Athlon4) 1460 .Case("athlon-xp", CK_AthlonXP) 1461 .Case("athlon-mp", CK_AthlonMP) 1462 .Case("athlon64", CK_Athlon64) 1463 .Case("athlon64-sse3", CK_Athlon64SSE3) 1464 .Case("athlon-fx", CK_AthlonFX) 1465 .Case("k8", CK_K8) 1466 .Case("k8-sse3", CK_K8SSE3) 1467 .Case("opteron", CK_Opteron) 1468 .Case("opteron-sse3", CK_OpteronSSE3) 1469 .Case("amdfam10", CK_AMDFAM10) 1470 .Case("btver1", CK_BTVER1) 1471 .Case("bdver1", CK_BDVER1) 1472 .Case("bdver2", CK_BDVER2) 1473 .Case("x86-64", CK_x86_64) 1474 .Case("geode", CK_Geode) 1475 .Default(CK_Generic); 1476 1477 // Perform any per-CPU checks necessary to determine if this CPU is 1478 // acceptable. 1479 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1480 // invalid without explaining *why*. 1481 switch (CPU) { 1482 case CK_Generic: 1483 // No processor selected! 1484 return false; 1485 1486 case CK_i386: 1487 case CK_i486: 1488 case CK_WinChipC6: 1489 case CK_WinChip2: 1490 case CK_C3: 1491 case CK_i586: 1492 case CK_Pentium: 1493 case CK_PentiumMMX: 1494 case CK_i686: 1495 case CK_PentiumPro: 1496 case CK_Pentium2: 1497 case CK_Pentium3: 1498 case CK_Pentium3M: 1499 case CK_PentiumM: 1500 case CK_Yonah: 1501 case CK_C3_2: 1502 case CK_Pentium4: 1503 case CK_Pentium4M: 1504 case CK_Prescott: 1505 case CK_K6: 1506 case CK_K6_2: 1507 case CK_K6_3: 1508 case CK_Athlon: 1509 case CK_AthlonThunderbird: 1510 case CK_Athlon4: 1511 case CK_AthlonXP: 1512 case CK_AthlonMP: 1513 case CK_Geode: 1514 // Only accept certain architectures when compiling in 32-bit mode. 1515 if (PointerWidth != 32) 1516 return false; 1517 1518 // Fallthrough 1519 case CK_Nocona: 1520 case CK_Core2: 1521 case CK_Penryn: 1522 case CK_Atom: 1523 case CK_Corei7: 1524 case CK_Corei7AVX: 1525 case CK_CoreAVXi: 1526 case CK_CoreAVX2: 1527 case CK_Athlon64: 1528 case CK_Athlon64SSE3: 1529 case CK_AthlonFX: 1530 case CK_K8: 1531 case CK_K8SSE3: 1532 case CK_Opteron: 1533 case CK_OpteronSSE3: 1534 case CK_AMDFAM10: 1535 case CK_BTVER1: 1536 case CK_BDVER1: 1537 case CK_BDVER2: 1538 case CK_x86_64: 1539 return true; 1540 } 1541 llvm_unreachable("Unhandled CPU kind"); 1542 } 1543 }; 1544 1545 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1546 // FIXME: This should not be here. 1547 Features["3dnow"] = false; 1548 Features["3dnowa"] = false; 1549 Features["mmx"] = false; 1550 Features["sse"] = false; 1551 Features["sse2"] = false; 1552 Features["sse3"] = false; 1553 Features["ssse3"] = false; 1554 Features["sse41"] = false; 1555 Features["sse42"] = false; 1556 Features["sse4a"] = false; 1557 Features["aes"] = false; 1558 Features["avx"] = false; 1559 Features["avx2"] = false; 1560 Features["lzcnt"] = false; 1561 Features["bmi"] = false; 1562 Features["bmi2"] = false; 1563 Features["popcnt"] = false; 1564 Features["fma4"] = false; 1565 1566 // FIXME: This *really* should not be here. 1567 1568 // X86_64 always has SSE2. 1569 if (PointerWidth == 64) 1570 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1571 1572 switch (CPU) { 1573 case CK_Generic: 1574 case CK_i386: 1575 case CK_i486: 1576 case CK_i586: 1577 case CK_Pentium: 1578 case CK_i686: 1579 case CK_PentiumPro: 1580 break; 1581 case CK_PentiumMMX: 1582 case CK_Pentium2: 1583 setFeatureEnabled(Features, "mmx", true); 1584 break; 1585 case CK_Pentium3: 1586 case CK_Pentium3M: 1587 setFeatureEnabled(Features, "mmx", true); 1588 setFeatureEnabled(Features, "sse", true); 1589 break; 1590 case CK_PentiumM: 1591 case CK_Pentium4: 1592 case CK_Pentium4M: 1593 case CK_x86_64: 1594 setFeatureEnabled(Features, "mmx", true); 1595 setFeatureEnabled(Features, "sse2", true); 1596 break; 1597 case CK_Yonah: 1598 case CK_Prescott: 1599 case CK_Nocona: 1600 setFeatureEnabled(Features, "mmx", true); 1601 setFeatureEnabled(Features, "sse3", true); 1602 break; 1603 case CK_Core2: 1604 setFeatureEnabled(Features, "mmx", true); 1605 setFeatureEnabled(Features, "ssse3", true); 1606 break; 1607 case CK_Penryn: 1608 setFeatureEnabled(Features, "mmx", true); 1609 setFeatureEnabled(Features, "sse4.1", true); 1610 break; 1611 case CK_Atom: 1612 setFeatureEnabled(Features, "mmx", true); 1613 setFeatureEnabled(Features, "ssse3", true); 1614 break; 1615 case CK_Corei7: 1616 setFeatureEnabled(Features, "mmx", true); 1617 setFeatureEnabled(Features, "sse4", true); 1618 setFeatureEnabled(Features, "aes", true); 1619 break; 1620 case CK_Corei7AVX: 1621 case CK_CoreAVXi: 1622 setFeatureEnabled(Features, "mmx", true); 1623 setFeatureEnabled(Features, "sse4", true); 1624 setFeatureEnabled(Features, "aes", true); 1625 //setFeatureEnabled(Features, "avx", true); 1626 break; 1627 case CK_CoreAVX2: 1628 setFeatureEnabled(Features, "mmx", true); 1629 setFeatureEnabled(Features, "sse4", true); 1630 setFeatureEnabled(Features, "aes", true); 1631 setFeatureEnabled(Features, "lzcnt", true); 1632 setFeatureEnabled(Features, "bmi", true); 1633 setFeatureEnabled(Features, "bmi2", true); 1634 //setFeatureEnabled(Features, "avx2", true); 1635 break; 1636 case CK_K6: 1637 case CK_WinChipC6: 1638 setFeatureEnabled(Features, "mmx", true); 1639 break; 1640 case CK_K6_2: 1641 case CK_K6_3: 1642 case CK_WinChip2: 1643 case CK_C3: 1644 setFeatureEnabled(Features, "3dnow", true); 1645 break; 1646 case CK_Athlon: 1647 case CK_AthlonThunderbird: 1648 case CK_Geode: 1649 setFeatureEnabled(Features, "3dnowa", true); 1650 break; 1651 case CK_Athlon4: 1652 case CK_AthlonXP: 1653 case CK_AthlonMP: 1654 setFeatureEnabled(Features, "sse", true); 1655 setFeatureEnabled(Features, "3dnowa", true); 1656 break; 1657 case CK_K8: 1658 case CK_Opteron: 1659 case CK_Athlon64: 1660 case CK_AthlonFX: 1661 setFeatureEnabled(Features, "sse2", true); 1662 setFeatureEnabled(Features, "3dnowa", true); 1663 break; 1664 case CK_K8SSE3: 1665 case CK_OpteronSSE3: 1666 case CK_Athlon64SSE3: 1667 setFeatureEnabled(Features, "sse3", true); 1668 setFeatureEnabled(Features, "3dnowa", true); 1669 break; 1670 case CK_AMDFAM10: 1671 setFeatureEnabled(Features, "sse3", true); 1672 setFeatureEnabled(Features, "sse4a", true); 1673 setFeatureEnabled(Features, "3dnowa", true); 1674 break; 1675 case CK_BTVER1: 1676 setFeatureEnabled(Features, "ssse3", true); 1677 setFeatureEnabled(Features, "sse4a", true); 1678 case CK_BDVER1: 1679 case CK_BDVER2: 1680 setFeatureEnabled(Features, "sse4", true); 1681 setFeatureEnabled(Features, "sse4a", true); 1682 setFeatureEnabled(Features, "aes", true); 1683 break; 1684 case CK_C3_2: 1685 setFeatureEnabled(Features, "mmx", true); 1686 setFeatureEnabled(Features, "sse", true); 1687 break; 1688 } 1689 } 1690 1691 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1692 const std::string &Name, 1693 bool Enabled) const { 1694 // FIXME: This *really* should not be here. We need some way of translating 1695 // options into llvm subtarget features. 1696 if (!Features.count(Name) && 1697 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1698 return false; 1699 1700 // FIXME: this should probably use a switch with fall through. 1701 1702 if (Enabled) { 1703 if (Name == "mmx") 1704 Features["mmx"] = true; 1705 else if (Name == "sse") 1706 Features["mmx"] = Features["sse"] = true; 1707 else if (Name == "sse2") 1708 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1709 else if (Name == "sse3") 1710 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1711 true; 1712 else if (Name == "ssse3") 1713 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1714 Features["ssse3"] = true; 1715 else if (Name == "sse4" || Name == "sse4.2") 1716 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1717 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1718 Features["popcnt"] = true; 1719 else if (Name == "sse4.1") 1720 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1721 Features["ssse3"] = Features["sse41"] = true; 1722 else if (Name == "3dnow") 1723 Features["mmx"] = Features["3dnow"] = true; 1724 else if (Name == "3dnowa") 1725 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1726 else if (Name == "aes") 1727 Features["aes"] = true; 1728 else if (Name == "avx") 1729 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1730 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1731 Features["popcnt"] = Features["avx"] = true; 1732 else if (Name == "avx2") 1733 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1734 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1735 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1736 else if (Name == "fma4") 1737 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1738 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1739 Features["popcnt"] = Features["avx"] = Features["fma4"] = true; 1740 else if (Name == "sse4a") 1741 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1742 Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true; 1743 else if (Name == "lzcnt") 1744 Features["lzcnt"] = true; 1745 else if (Name == "bmi") 1746 Features["bmi"] = true; 1747 else if (Name == "bmi2") 1748 Features["bmi2"] = true; 1749 else if (Name == "popcnt") 1750 Features["popcnt"] = true; 1751 } else { 1752 if (Name == "mmx") 1753 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1754 else if (Name == "sse") 1755 Features["sse"] = Features["sse2"] = Features["sse3"] = 1756 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1757 Features["sse4a"] = false; 1758 else if (Name == "sse2") 1759 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1760 Features["sse41"] = Features["sse42"] = Features["sse4a"] = false; 1761 else if (Name == "sse3") 1762 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1763 Features["sse42"] = Features["sse4a"] = false; 1764 else if (Name == "ssse3") 1765 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1766 else if (Name == "sse4" || Name == "sse4.1") 1767 Features["sse41"] = Features["sse42"] = false; 1768 else if (Name == "sse4.2") 1769 Features["sse42"] = false; 1770 else if (Name == "3dnow") 1771 Features["3dnow"] = Features["3dnowa"] = false; 1772 else if (Name == "3dnowa") 1773 Features["3dnowa"] = false; 1774 else if (Name == "aes") 1775 Features["aes"] = false; 1776 else if (Name == "avx") 1777 Features["avx"] = Features["avx2"] = Features["fma4"] = false; 1778 else if (Name == "avx2") 1779 Features["avx2"] = false; 1780 else if (Name == "sse4a") 1781 Features["sse4a"] = false; 1782 else if (Name == "lzcnt") 1783 Features["lzcnt"] = false; 1784 else if (Name == "bmi") 1785 Features["bmi"] = false; 1786 else if (Name == "bmi2") 1787 Features["bmi2"] = false; 1788 else if (Name == "popcnt") 1789 Features["popcnt"] = false; 1790 else if (Name == "fma4") 1791 Features["fma4"] = false; 1792 } 1793 1794 return true; 1795 } 1796 1797 /// HandleTargetOptions - Perform initialization based on the user 1798 /// configured set of features. 1799 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1800 // Remember the maximum enabled sselevel. 1801 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1802 // Ignore disabled features. 1803 if (Features[i][0] == '-') 1804 continue; 1805 1806 if (Features[i].substr(1) == "aes") { 1807 HasAES = true; 1808 continue; 1809 } 1810 1811 if (Features[i].substr(1) == "lzcnt") { 1812 HasLZCNT = true; 1813 continue; 1814 } 1815 1816 if (Features[i].substr(1) == "bmi") { 1817 HasBMI = true; 1818 continue; 1819 } 1820 1821 if (Features[i].substr(1) == "bmi2") { 1822 HasBMI2 = true; 1823 continue; 1824 } 1825 1826 if (Features[i].substr(1) == "popcnt") { 1827 HasPOPCNT = true; 1828 continue; 1829 } 1830 1831 if (Features[i].substr(1) == "fma4") { 1832 HasFMA4 = true; 1833 continue; 1834 } 1835 1836 assert(Features[i][0] == '+' && "Invalid target feature!"); 1837 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1838 .Case("avx2", AVX2) 1839 .Case("avx", AVX) 1840 .Case("sse42", SSE42) 1841 .Case("sse41", SSE41) 1842 .Case("ssse3", SSSE3) 1843 .Case("sse3", SSE3) 1844 .Case("sse2", SSE2) 1845 .Case("sse", SSE1) 1846 .Default(NoSSE); 1847 SSELevel = std::max(SSELevel, Level); 1848 1849 MMX3DNowEnum ThreeDNowLevel = 1850 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1851 .Case("3dnowa", AMD3DNowAthlon) 1852 .Case("3dnow", AMD3DNow) 1853 .Case("mmx", MMX) 1854 .Default(NoMMX3DNow); 1855 1856 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1857 } 1858 1859 // Don't tell the backend if we're turning off mmx; it will end up disabling 1860 // SSE, which we don't want. 1861 std::vector<std::string>::iterator it; 1862 it = std::find(Features.begin(), Features.end(), "-mmx"); 1863 if (it != Features.end()) 1864 Features.erase(it); 1865 } 1866 1867 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1868 /// definitions for this particular subtarget. 1869 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1870 MacroBuilder &Builder) const { 1871 // Target identification. 1872 if (PointerWidth == 64) { 1873 Builder.defineMacro("_LP64"); 1874 Builder.defineMacro("__LP64__"); 1875 Builder.defineMacro("__amd64__"); 1876 Builder.defineMacro("__amd64"); 1877 Builder.defineMacro("__x86_64"); 1878 Builder.defineMacro("__x86_64__"); 1879 } else { 1880 DefineStd(Builder, "i386", Opts); 1881 } 1882 1883 // Subtarget options. 1884 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1885 // truly should be based on -mtune options. 1886 switch (CPU) { 1887 case CK_Generic: 1888 break; 1889 case CK_i386: 1890 // The rest are coming from the i386 define above. 1891 Builder.defineMacro("__tune_i386__"); 1892 break; 1893 case CK_i486: 1894 case CK_WinChipC6: 1895 case CK_WinChip2: 1896 case CK_C3: 1897 defineCPUMacros(Builder, "i486"); 1898 break; 1899 case CK_PentiumMMX: 1900 Builder.defineMacro("__pentium_mmx__"); 1901 Builder.defineMacro("__tune_pentium_mmx__"); 1902 // Fallthrough 1903 case CK_i586: 1904 case CK_Pentium: 1905 defineCPUMacros(Builder, "i586"); 1906 defineCPUMacros(Builder, "pentium"); 1907 break; 1908 case CK_Pentium3: 1909 case CK_Pentium3M: 1910 case CK_PentiumM: 1911 Builder.defineMacro("__tune_pentium3__"); 1912 // Fallthrough 1913 case CK_Pentium2: 1914 case CK_C3_2: 1915 Builder.defineMacro("__tune_pentium2__"); 1916 // Fallthrough 1917 case CK_PentiumPro: 1918 Builder.defineMacro("__tune_i686__"); 1919 Builder.defineMacro("__tune_pentiumpro__"); 1920 // Fallthrough 1921 case CK_i686: 1922 Builder.defineMacro("__i686"); 1923 Builder.defineMacro("__i686__"); 1924 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1925 Builder.defineMacro("__pentiumpro"); 1926 Builder.defineMacro("__pentiumpro__"); 1927 break; 1928 case CK_Pentium4: 1929 case CK_Pentium4M: 1930 defineCPUMacros(Builder, "pentium4"); 1931 break; 1932 case CK_Yonah: 1933 case CK_Prescott: 1934 case CK_Nocona: 1935 defineCPUMacros(Builder, "nocona"); 1936 break; 1937 case CK_Core2: 1938 case CK_Penryn: 1939 defineCPUMacros(Builder, "core2"); 1940 break; 1941 case CK_Atom: 1942 defineCPUMacros(Builder, "atom"); 1943 break; 1944 case CK_Corei7: 1945 case CK_Corei7AVX: 1946 case CK_CoreAVXi: 1947 case CK_CoreAVX2: 1948 defineCPUMacros(Builder, "corei7"); 1949 break; 1950 case CK_K6_2: 1951 Builder.defineMacro("__k6_2__"); 1952 Builder.defineMacro("__tune_k6_2__"); 1953 // Fallthrough 1954 case CK_K6_3: 1955 if (CPU != CK_K6_2) { // In case of fallthrough 1956 // FIXME: GCC may be enabling these in cases where some other k6 1957 // architecture is specified but -m3dnow is explicitly provided. The 1958 // exact semantics need to be determined and emulated here. 1959 Builder.defineMacro("__k6_3__"); 1960 Builder.defineMacro("__tune_k6_3__"); 1961 } 1962 // Fallthrough 1963 case CK_K6: 1964 defineCPUMacros(Builder, "k6"); 1965 break; 1966 case CK_Athlon: 1967 case CK_AthlonThunderbird: 1968 case CK_Athlon4: 1969 case CK_AthlonXP: 1970 case CK_AthlonMP: 1971 defineCPUMacros(Builder, "athlon"); 1972 if (SSELevel != NoSSE) { 1973 Builder.defineMacro("__athlon_sse__"); 1974 Builder.defineMacro("__tune_athlon_sse__"); 1975 } 1976 break; 1977 case CK_K8: 1978 case CK_K8SSE3: 1979 case CK_x86_64: 1980 case CK_Opteron: 1981 case CK_OpteronSSE3: 1982 case CK_Athlon64: 1983 case CK_Athlon64SSE3: 1984 case CK_AthlonFX: 1985 defineCPUMacros(Builder, "k8"); 1986 break; 1987 case CK_AMDFAM10: 1988 defineCPUMacros(Builder, "amdfam10"); 1989 break; 1990 case CK_BTVER1: 1991 defineCPUMacros(Builder, "btver1"); 1992 break; 1993 case CK_BDVER1: 1994 defineCPUMacros(Builder, "bdver1"); 1995 break; 1996 case CK_BDVER2: 1997 defineCPUMacros(Builder, "bdver2"); 1998 break; 1999 case CK_Geode: 2000 defineCPUMacros(Builder, "geode"); 2001 break; 2002 } 2003 2004 // Target properties. 2005 Builder.defineMacro("__LITTLE_ENDIAN__"); 2006 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2007 2008 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 2009 // functions in glibc header files that use FP Stack inline asm which the 2010 // backend can't deal with (PR879). 2011 Builder.defineMacro("__NO_MATH_INLINES"); 2012 2013 if (HasAES) 2014 Builder.defineMacro("__AES__"); 2015 2016 if (HasLZCNT) 2017 Builder.defineMacro("__LZCNT__"); 2018 2019 if (HasBMI) 2020 Builder.defineMacro("__BMI__"); 2021 2022 if (HasBMI2) 2023 Builder.defineMacro("__BMI2__"); 2024 2025 if (HasPOPCNT) 2026 Builder.defineMacro("__POPCNT__"); 2027 2028 if (HasFMA4) 2029 Builder.defineMacro("__FMA4__"); 2030 2031 // Each case falls through to the previous one here. 2032 switch (SSELevel) { 2033 case AVX2: 2034 Builder.defineMacro("__AVX2__"); 2035 case AVX: 2036 Builder.defineMacro("__AVX__"); 2037 case SSE42: 2038 Builder.defineMacro("__SSE4_2__"); 2039 case SSE41: 2040 Builder.defineMacro("__SSE4_1__"); 2041 case SSSE3: 2042 Builder.defineMacro("__SSSE3__"); 2043 case SSE3: 2044 Builder.defineMacro("__SSE3__"); 2045 case SSE2: 2046 Builder.defineMacro("__SSE2__"); 2047 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2048 case SSE1: 2049 Builder.defineMacro("__SSE__"); 2050 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2051 case NoSSE: 2052 break; 2053 } 2054 2055 if (Opts.MicrosoftExt && PointerWidth == 32) { 2056 switch (SSELevel) { 2057 case AVX2: 2058 case AVX: 2059 case SSE42: 2060 case SSE41: 2061 case SSSE3: 2062 case SSE3: 2063 case SSE2: 2064 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2065 break; 2066 case SSE1: 2067 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2068 break; 2069 default: 2070 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2071 } 2072 } 2073 2074 // Each case falls through to the previous one here. 2075 switch (MMX3DNowLevel) { 2076 case AMD3DNowAthlon: 2077 Builder.defineMacro("__3dNOW_A__"); 2078 case AMD3DNow: 2079 Builder.defineMacro("__3dNOW__"); 2080 case MMX: 2081 Builder.defineMacro("__MMX__"); 2082 case NoMMX3DNow: 2083 break; 2084 } 2085 } 2086 2087 bool X86TargetInfo::hasFeature(StringRef Feature) const { 2088 return llvm::StringSwitch<bool>(Feature) 2089 .Case("aes", HasAES) 2090 .Case("avx", SSELevel >= AVX) 2091 .Case("avx2", SSELevel >= AVX2) 2092 .Case("bmi", HasBMI) 2093 .Case("bmi2", HasBMI2) 2094 .Case("fma4", HasFMA4) 2095 .Case("lzcnt", HasLZCNT) 2096 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) 2097 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon) 2098 .Case("mmx", MMX3DNowLevel >= MMX) 2099 .Case("popcnt", HasPOPCNT) 2100 .Case("sse", SSELevel >= SSE1) 2101 .Case("sse2", SSELevel >= SSE2) 2102 .Case("sse3", SSELevel >= SSE3) 2103 .Case("ssse3", SSELevel >= SSSE3) 2104 .Case("sse41", SSELevel >= SSE41) 2105 .Case("sse42", SSELevel >= SSE42) 2106 .Case("x86", true) 2107 .Case("x86_32", PointerWidth == 32) 2108 .Case("x86_64", PointerWidth == 64) 2109 .Default(false); 2110 } 2111 2112 bool 2113 X86TargetInfo::validateAsmConstraint(const char *&Name, 2114 TargetInfo::ConstraintInfo &Info) const { 2115 switch (*Name) { 2116 default: return false; 2117 case 'Y': // first letter of a pair: 2118 switch (*(Name+1)) { 2119 default: return false; 2120 case '0': // First SSE register. 2121 case 't': // Any SSE register, when SSE2 is enabled. 2122 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2123 case 'm': // any MMX register, when inter-unit moves enabled. 2124 break; // falls through to setAllowsRegister. 2125 } 2126 case 'a': // eax. 2127 case 'b': // ebx. 2128 case 'c': // ecx. 2129 case 'd': // edx. 2130 case 'S': // esi. 2131 case 'D': // edi. 2132 case 'A': // edx:eax. 2133 case 'f': // any x87 floating point stack register. 2134 case 't': // top of floating point stack. 2135 case 'u': // second from top of floating point stack. 2136 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2137 case 'y': // Any MMX register. 2138 case 'x': // Any SSE register. 2139 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2140 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2141 case 'l': // "Index" registers: any general register that can be used as an 2142 // index in a base+index memory access. 2143 Info.setAllowsRegister(); 2144 return true; 2145 case 'C': // SSE floating point constant. 2146 case 'G': // x87 floating point constant. 2147 case 'e': // 32-bit signed integer constant for use with zero-extending 2148 // x86_64 instructions. 2149 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2150 // x86_64 instructions. 2151 return true; 2152 } 2153 } 2154 2155 2156 std::string 2157 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2158 switch (*Constraint) { 2159 case 'a': return std::string("{ax}"); 2160 case 'b': return std::string("{bx}"); 2161 case 'c': return std::string("{cx}"); 2162 case 'd': return std::string("{dx}"); 2163 case 'S': return std::string("{si}"); 2164 case 'D': return std::string("{di}"); 2165 case 'p': // address 2166 return std::string("im"); 2167 case 't': // top of floating point stack. 2168 return std::string("{st}"); 2169 case 'u': // second from top of floating point stack. 2170 return std::string("{st(1)}"); // second from top of floating point stack. 2171 default: 2172 return std::string(1, *Constraint); 2173 } 2174 } 2175 } // end anonymous namespace 2176 2177 namespace { 2178 // X86-32 generic target 2179 class X86_32TargetInfo : public X86TargetInfo { 2180 public: 2181 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2182 DoubleAlign = LongLongAlign = 32; 2183 LongDoubleWidth = 96; 2184 LongDoubleAlign = 32; 2185 SuitableAlign = 128; 2186 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2187 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2188 "a0:0:64-f80:32:32-n8:16:32-S128"; 2189 SizeType = UnsignedInt; 2190 PtrDiffType = SignedInt; 2191 IntPtrType = SignedInt; 2192 RegParmMax = 3; 2193 2194 // Use fpret for all types. 2195 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2196 (1 << TargetInfo::Double) | 2197 (1 << TargetInfo::LongDouble)); 2198 2199 // x86-32 has atomics up to 8 bytes 2200 // FIXME: Check that we actually have cmpxchg8b before setting 2201 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2202 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2203 } 2204 virtual const char *getVAListDeclaration() const { 2205 return "typedef char* __builtin_va_list;"; 2206 } 2207 2208 int getEHDataRegisterNumber(unsigned RegNo) const { 2209 if (RegNo == 0) return 0; 2210 if (RegNo == 1) return 2; 2211 return -1; 2212 } 2213 }; 2214 } // end anonymous namespace 2215 2216 namespace { 2217 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2218 public: 2219 NetBSDI386TargetInfo(const std::string &triple) : 2220 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2221 } 2222 2223 virtual unsigned getFloatEvalMethod() const { 2224 // NetBSD defaults to "double" rounding 2225 return 1; 2226 } 2227 }; 2228 } // end anonymous namespace 2229 2230 namespace { 2231 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2232 public: 2233 OpenBSDI386TargetInfo(const std::string& triple) : 2234 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2235 SizeType = UnsignedLong; 2236 IntPtrType = SignedLong; 2237 PtrDiffType = SignedLong; 2238 } 2239 }; 2240 } // end anonymous namespace 2241 2242 namespace { 2243 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2244 public: 2245 DarwinI386TargetInfo(const std::string& triple) : 2246 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2247 LongDoubleWidth = 128; 2248 LongDoubleAlign = 128; 2249 SuitableAlign = 128; 2250 SizeType = UnsignedLong; 2251 IntPtrType = SignedLong; 2252 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2253 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2254 "a0:0:64-f80:128:128-n8:16:32-S128"; 2255 HasAlignMac68kSupport = true; 2256 } 2257 2258 }; 2259 } // end anonymous namespace 2260 2261 namespace { 2262 // x86-32 Windows target 2263 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2264 public: 2265 WindowsX86_32TargetInfo(const std::string& triple) 2266 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2267 TLSSupported = false; 2268 WCharType = UnsignedShort; 2269 DoubleAlign = LongLongAlign = 64; 2270 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2271 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2272 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2273 } 2274 virtual void getTargetDefines(const LangOptions &Opts, 2275 MacroBuilder &Builder) const { 2276 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2277 } 2278 }; 2279 } // end anonymous namespace 2280 2281 namespace { 2282 2283 // x86-32 Windows Visual Studio target 2284 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2285 public: 2286 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2287 : WindowsX86_32TargetInfo(triple) { 2288 LongDoubleWidth = LongDoubleAlign = 64; 2289 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2290 } 2291 virtual void getTargetDefines(const LangOptions &Opts, 2292 MacroBuilder &Builder) const { 2293 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2294 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2295 // The value of the following reflects processor type. 2296 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2297 // We lost the original triple, so we use the default. 2298 Builder.defineMacro("_M_IX86", "600"); 2299 } 2300 }; 2301 } // end anonymous namespace 2302 2303 namespace { 2304 // x86-32 MinGW target 2305 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2306 public: 2307 MinGWX86_32TargetInfo(const std::string& triple) 2308 : WindowsX86_32TargetInfo(triple) { 2309 } 2310 virtual void getTargetDefines(const LangOptions &Opts, 2311 MacroBuilder &Builder) const { 2312 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2313 DefineStd(Builder, "WIN32", Opts); 2314 DefineStd(Builder, "WINNT", Opts); 2315 Builder.defineMacro("_X86_"); 2316 Builder.defineMacro("__MSVCRT__"); 2317 Builder.defineMacro("__MINGW32__"); 2318 2319 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2320 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2321 if (Opts.MicrosoftExt) 2322 // Provide "as-is" __declspec. 2323 Builder.defineMacro("__declspec", "__declspec"); 2324 else 2325 // Provide alias of __attribute__ like mingw32-gcc. 2326 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2327 } 2328 }; 2329 } // end anonymous namespace 2330 2331 namespace { 2332 // x86-32 Cygwin target 2333 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2334 public: 2335 CygwinX86_32TargetInfo(const std::string& triple) 2336 : X86_32TargetInfo(triple) { 2337 TLSSupported = false; 2338 WCharType = UnsignedShort; 2339 DoubleAlign = LongLongAlign = 64; 2340 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2341 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2342 "a0:0:64-f80:32:32-n8:16:32-S32"; 2343 } 2344 virtual void getTargetDefines(const LangOptions &Opts, 2345 MacroBuilder &Builder) const { 2346 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2347 Builder.defineMacro("__CYGWIN__"); 2348 Builder.defineMacro("__CYGWIN32__"); 2349 DefineStd(Builder, "unix", Opts); 2350 if (Opts.CPlusPlus) 2351 Builder.defineMacro("_GNU_SOURCE"); 2352 } 2353 }; 2354 } // end anonymous namespace 2355 2356 namespace { 2357 // x86-32 Haiku target 2358 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2359 public: 2360 HaikuX86_32TargetInfo(const std::string& triple) 2361 : X86_32TargetInfo(triple) { 2362 SizeType = UnsignedLong; 2363 IntPtrType = SignedLong; 2364 PtrDiffType = SignedLong; 2365 this->UserLabelPrefix = ""; 2366 } 2367 virtual void getTargetDefines(const LangOptions &Opts, 2368 MacroBuilder &Builder) const { 2369 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2370 Builder.defineMacro("__INTEL__"); 2371 Builder.defineMacro("__HAIKU__"); 2372 } 2373 }; 2374 } // end anonymous namespace 2375 2376 // RTEMS Target 2377 template<typename Target> 2378 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2379 protected: 2380 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2381 MacroBuilder &Builder) const { 2382 // RTEMS defines; list based off of gcc output 2383 2384 Builder.defineMacro("__rtems__"); 2385 Builder.defineMacro("__ELF__"); 2386 } 2387 public: 2388 RTEMSTargetInfo(const std::string &triple) 2389 : OSTargetInfo<Target>(triple) { 2390 this->UserLabelPrefix = ""; 2391 2392 llvm::Triple Triple(triple); 2393 switch (Triple.getArch()) { 2394 default: 2395 case llvm::Triple::x86: 2396 // this->MCountName = ".mcount"; 2397 break; 2398 case llvm::Triple::mips: 2399 case llvm::Triple::mipsel: 2400 case llvm::Triple::ppc: 2401 case llvm::Triple::ppc64: 2402 // this->MCountName = "_mcount"; 2403 break; 2404 case llvm::Triple::arm: 2405 // this->MCountName = "__mcount"; 2406 break; 2407 } 2408 2409 } 2410 }; 2411 2412 namespace { 2413 // x86-32 RTEMS target 2414 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2415 public: 2416 RTEMSX86_32TargetInfo(const std::string& triple) 2417 : X86_32TargetInfo(triple) { 2418 SizeType = UnsignedLong; 2419 IntPtrType = SignedLong; 2420 PtrDiffType = SignedLong; 2421 this->UserLabelPrefix = ""; 2422 } 2423 virtual void getTargetDefines(const LangOptions &Opts, 2424 MacroBuilder &Builder) const { 2425 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2426 Builder.defineMacro("__INTEL__"); 2427 Builder.defineMacro("__rtems__"); 2428 } 2429 }; 2430 } // end anonymous namespace 2431 2432 namespace { 2433 // x86-64 generic target 2434 class X86_64TargetInfo : public X86TargetInfo { 2435 public: 2436 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2437 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2438 LongDoubleWidth = 128; 2439 LongDoubleAlign = 128; 2440 LargeArrayMinWidth = 128; 2441 LargeArrayAlign = 128; 2442 SuitableAlign = 128; 2443 IntMaxType = SignedLong; 2444 UIntMaxType = UnsignedLong; 2445 Int64Type = SignedLong; 2446 RegParmMax = 6; 2447 2448 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2449 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2450 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2451 2452 // Use fpret only for long double. 2453 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2454 2455 // Use fp2ret for _Complex long double. 2456 ComplexLongDoubleUsesFP2Ret = true; 2457 2458 // x86-64 has atomics up to 16 bytes. 2459 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2460 // on CPUs with cmpxchg16b 2461 MaxAtomicPromoteWidth = 128; 2462 MaxAtomicInlineWidth = 64; 2463 } 2464 virtual const char *getVAListDeclaration() const { 2465 return "typedef struct __va_list_tag {" 2466 " unsigned gp_offset;" 2467 " unsigned fp_offset;" 2468 " void* overflow_arg_area;" 2469 " void* reg_save_area;" 2470 "} __va_list_tag;" 2471 "typedef __va_list_tag __builtin_va_list[1];"; 2472 } 2473 2474 int getEHDataRegisterNumber(unsigned RegNo) const { 2475 if (RegNo == 0) return 0; 2476 if (RegNo == 1) return 1; 2477 return -1; 2478 } 2479 }; 2480 } // end anonymous namespace 2481 2482 namespace { 2483 // x86-64 Windows target 2484 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2485 public: 2486 WindowsX86_64TargetInfo(const std::string& triple) 2487 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2488 TLSSupported = false; 2489 WCharType = UnsignedShort; 2490 LongWidth = LongAlign = 32; 2491 DoubleAlign = LongLongAlign = 64; 2492 IntMaxType = SignedLongLong; 2493 UIntMaxType = UnsignedLongLong; 2494 Int64Type = SignedLongLong; 2495 SizeType = UnsignedLongLong; 2496 PtrDiffType = SignedLongLong; 2497 IntPtrType = SignedLongLong; 2498 this->UserLabelPrefix = ""; 2499 } 2500 virtual void getTargetDefines(const LangOptions &Opts, 2501 MacroBuilder &Builder) const { 2502 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2503 Builder.defineMacro("_WIN64"); 2504 } 2505 virtual const char *getVAListDeclaration() const { 2506 return "typedef char* __builtin_va_list;"; 2507 } 2508 }; 2509 } // end anonymous namespace 2510 2511 namespace { 2512 // x86-64 Windows Visual Studio target 2513 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2514 public: 2515 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2516 : WindowsX86_64TargetInfo(triple) { 2517 LongDoubleWidth = LongDoubleAlign = 64; 2518 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2519 } 2520 virtual void getTargetDefines(const LangOptions &Opts, 2521 MacroBuilder &Builder) const { 2522 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2523 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2524 Builder.defineMacro("_M_X64"); 2525 Builder.defineMacro("_M_AMD64"); 2526 } 2527 }; 2528 } // end anonymous namespace 2529 2530 namespace { 2531 // x86-64 MinGW target 2532 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2533 public: 2534 MinGWX86_64TargetInfo(const std::string& triple) 2535 : WindowsX86_64TargetInfo(triple) { 2536 } 2537 virtual void getTargetDefines(const LangOptions &Opts, 2538 MacroBuilder &Builder) const { 2539 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2540 DefineStd(Builder, "WIN64", Opts); 2541 Builder.defineMacro("__MSVCRT__"); 2542 Builder.defineMacro("__MINGW32__"); 2543 Builder.defineMacro("__MINGW64__"); 2544 2545 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2546 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2547 if (Opts.MicrosoftExt) 2548 // Provide "as-is" __declspec. 2549 Builder.defineMacro("__declspec", "__declspec"); 2550 else 2551 // Provide alias of __attribute__ like mingw32-gcc. 2552 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2553 } 2554 }; 2555 } // end anonymous namespace 2556 2557 namespace { 2558 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2559 public: 2560 DarwinX86_64TargetInfo(const std::string& triple) 2561 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2562 Int64Type = SignedLongLong; 2563 } 2564 }; 2565 } // end anonymous namespace 2566 2567 namespace { 2568 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2569 public: 2570 OpenBSDX86_64TargetInfo(const std::string& triple) 2571 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2572 IntMaxType = SignedLongLong; 2573 UIntMaxType = UnsignedLongLong; 2574 Int64Type = SignedLongLong; 2575 } 2576 }; 2577 } // end anonymous namespace 2578 2579 namespace { 2580 class ARMTargetInfo : public TargetInfo { 2581 // Possible FPU choices. 2582 enum FPUMode { 2583 NoFPU, 2584 VFP2FPU, 2585 VFP3FPU, 2586 NeonFPU 2587 }; 2588 2589 static bool FPUModeIsVFP(FPUMode Mode) { 2590 return Mode >= VFP2FPU && Mode <= NeonFPU; 2591 } 2592 2593 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2594 static const char * const GCCRegNames[]; 2595 2596 std::string ABI, CPU; 2597 2598 unsigned FPU : 3; 2599 2600 unsigned IsThumb : 1; 2601 2602 // Initialized via features. 2603 unsigned SoftFloat : 1; 2604 unsigned SoftFloatABI : 1; 2605 2606 static const Builtin::Info BuiltinInfo[]; 2607 2608 public: 2609 ARMTargetInfo(const std::string &TripleStr) 2610 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2611 { 2612 BigEndian = false; 2613 SizeType = UnsignedInt; 2614 PtrDiffType = SignedInt; 2615 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2616 WCharType = UnsignedInt; 2617 2618 // {} in inline assembly are neon specifiers, not assembly variant 2619 // specifiers. 2620 NoAsmVariants = true; 2621 2622 // FIXME: Should we just treat this as a feature? 2623 IsThumb = getTriple().getArchName().startswith("thumb"); 2624 if (IsThumb) { 2625 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2626 // so set preferred for small types to 32. 2627 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2628 "i64:64:64-f32:32:32-f64:64:64-" 2629 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2630 } else { 2631 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2632 "i64:64:64-f32:32:32-f64:64:64-" 2633 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2634 } 2635 2636 // ARM targets default to using the ARM C++ ABI. 2637 CXXABI = CXXABI_ARM; 2638 2639 // ARM has atomics up to 8 bytes 2640 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2641 MaxAtomicPromoteWidth = 64; 2642 } 2643 virtual const char *getABI() const { return ABI.c_str(); } 2644 virtual bool setABI(const std::string &Name) { 2645 ABI = Name; 2646 2647 // The defaults (above) are for AAPCS, check if we need to change them. 2648 // 2649 // FIXME: We need support for -meabi... we could just mangle it into the 2650 // name. 2651 if (Name == "apcs-gnu") { 2652 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2653 SizeType = UnsignedLong; 2654 2655 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2656 WCharType = SignedInt; 2657 2658 // Do not respect the alignment of bit-field types when laying out 2659 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2660 UseBitFieldTypeAlignment = false; 2661 2662 /// Do force alignment of members that follow zero length bitfields. If 2663 /// the alignment of the zero-length bitfield is greater than the member 2664 /// that follows it, `bar', `bar' will be aligned as the type of the 2665 /// zero length bitfield. 2666 UseZeroLengthBitfieldAlignment = true; 2667 2668 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2669 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2670 /// gcc. 2671 ZeroLengthBitfieldBoundary = 32; 2672 2673 if (IsThumb) { 2674 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2675 // so set preferred for small types to 32. 2676 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2677 "i64:32:64-f32:32:32-f64:32:64-" 2678 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2679 } else { 2680 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2681 "i64:32:64-f32:32:32-f64:32:64-" 2682 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2683 } 2684 2685 // FIXME: Override "preferred align" for double and long long. 2686 } else if (Name == "aapcs") { 2687 // FIXME: Enumerated types are variable width in straight AAPCS. 2688 } else if (Name == "aapcs-linux") { 2689 ; 2690 } else 2691 return false; 2692 2693 return true; 2694 } 2695 2696 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2697 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2698 Features["vfp2"] = true; 2699 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2700 Features["neon"] = true; 2701 } 2702 2703 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2704 const std::string &Name, 2705 bool Enabled) const { 2706 if (Name == "soft-float" || Name == "soft-float-abi" || 2707 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16") { 2708 Features[Name] = Enabled; 2709 } else 2710 return false; 2711 2712 return true; 2713 } 2714 2715 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2716 FPU = NoFPU; 2717 SoftFloat = SoftFloatABI = false; 2718 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2719 if (Features[i] == "+soft-float") 2720 SoftFloat = true; 2721 else if (Features[i] == "+soft-float-abi") 2722 SoftFloatABI = true; 2723 else if (Features[i] == "+vfp2") 2724 FPU = VFP2FPU; 2725 else if (Features[i] == "+vfp3") 2726 FPU = VFP3FPU; 2727 else if (Features[i] == "+neon") 2728 FPU = NeonFPU; 2729 } 2730 2731 // Remove front-end specific options which the backend handles differently. 2732 std::vector<std::string>::iterator it; 2733 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2734 if (it != Features.end()) 2735 Features.erase(it); 2736 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2737 if (it != Features.end()) 2738 Features.erase(it); 2739 } 2740 2741 virtual bool hasFeature(StringRef Feature) const { 2742 return llvm::StringSwitch<bool>(Feature) 2743 .Case("arm", true) 2744 .Case("softfloat", SoftFloat) 2745 .Case("thumb", IsThumb) 2746 .Case("neon", FPU == NeonFPU && !SoftFloat && 2747 StringRef(getCPUDefineSuffix(CPU)).startswith("7")) 2748 .Default(false); 2749 } 2750 static const char *getCPUDefineSuffix(StringRef Name) { 2751 return llvm::StringSwitch<const char*>(Name) 2752 .Cases("arm8", "arm810", "4") 2753 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2754 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2755 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2756 .Case("ep9312", "4T") 2757 .Cases("arm10tdmi", "arm1020t", "5T") 2758 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2759 .Case("arm926ej-s", "5TEJ") 2760 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2761 .Cases("xscale", "iwmmxt", "5TE") 2762 .Case("arm1136j-s", "6J") 2763 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2764 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2765 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2766 .Cases("cortex-a8", "cortex-a9", "7A") 2767 .Case("cortex-m3", "7M") 2768 .Case("cortex-m0", "6M") 2769 .Default(0); 2770 } 2771 virtual bool setCPU(const std::string &Name) { 2772 if (!getCPUDefineSuffix(Name)) 2773 return false; 2774 2775 CPU = Name; 2776 return true; 2777 } 2778 virtual void getTargetDefines(const LangOptions &Opts, 2779 MacroBuilder &Builder) const { 2780 // Target identification. 2781 Builder.defineMacro("__arm"); 2782 Builder.defineMacro("__arm__"); 2783 2784 // Target properties. 2785 Builder.defineMacro("__ARMEL__"); 2786 Builder.defineMacro("__LITTLE_ENDIAN__"); 2787 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2788 2789 StringRef CPUArch = getCPUDefineSuffix(CPU); 2790 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2791 2792 // Subtarget options. 2793 2794 // FIXME: It's more complicated than this and we don't really support 2795 // interworking. 2796 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2797 Builder.defineMacro("__THUMB_INTERWORK__"); 2798 2799 if (ABI == "aapcs" || ABI == "aapcs-linux") 2800 Builder.defineMacro("__ARM_EABI__"); 2801 2802 if (SoftFloat) 2803 Builder.defineMacro("__SOFTFP__"); 2804 2805 if (CPU == "xscale") 2806 Builder.defineMacro("__XSCALE__"); 2807 2808 bool IsARMv7 = CPUArch.startswith("7"); 2809 if (IsThumb) { 2810 Builder.defineMacro("__THUMBEL__"); 2811 Builder.defineMacro("__thumb__"); 2812 if (CPUArch == "6T2" || IsARMv7) 2813 Builder.defineMacro("__thumb2__"); 2814 } 2815 2816 // Note, this is always on in gcc, even though it doesn't make sense. 2817 Builder.defineMacro("__APCS_32__"); 2818 2819 if (FPUModeIsVFP((FPUMode) FPU)) 2820 Builder.defineMacro("__VFP_FP__"); 2821 2822 // This only gets set when Neon instructions are actually available, unlike 2823 // the VFP define, hence the soft float and arch check. This is subtly 2824 // different from gcc, we follow the intent which was that it should be set 2825 // when Neon instructions are actually available. 2826 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2827 Builder.defineMacro("__ARM_NEON__"); 2828 } 2829 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2830 unsigned &NumRecords) const { 2831 Records = BuiltinInfo; 2832 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2833 } 2834 virtual bool isCLZForZeroUndef() const { return false; } 2835 virtual const char *getVAListDeclaration() const { 2836 return "typedef void* __builtin_va_list;"; 2837 } 2838 virtual void getGCCRegNames(const char * const *&Names, 2839 unsigned &NumNames) const; 2840 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2841 unsigned &NumAliases) const; 2842 virtual bool validateAsmConstraint(const char *&Name, 2843 TargetInfo::ConstraintInfo &Info) const { 2844 // FIXME: Check if this is complete 2845 switch (*Name) { 2846 default: 2847 case 'l': // r0-r7 2848 case 'h': // r8-r15 2849 case 'w': // VFP Floating point register single precision 2850 case 'P': // VFP Floating point register double precision 2851 Info.setAllowsRegister(); 2852 return true; 2853 case 'Q': // A memory address that is a single base register. 2854 Info.setAllowsMemory(); 2855 return true; 2856 case 'U': // a memory reference... 2857 switch (Name[1]) { 2858 case 'q': // ...ARMV4 ldrsb 2859 case 'v': // ...VFP load/store (reg+constant offset) 2860 case 'y': // ...iWMMXt load/store 2861 case 't': // address valid for load/store opaque types wider 2862 // than 128-bits 2863 case 'n': // valid address for Neon doubleword vector load/store 2864 case 'm': // valid address for Neon element and structure load/store 2865 case 's': // valid address for non-offset loads/stores of quad-word 2866 // values in four ARM registers 2867 Info.setAllowsMemory(); 2868 Name++; 2869 return true; 2870 } 2871 } 2872 return false; 2873 } 2874 virtual std::string convertConstraint(const char *&Constraint) const { 2875 std::string R; 2876 switch (*Constraint) { 2877 case 'U': // Two-character constraint; add "^" hint for later parsing. 2878 R = std::string("^") + std::string(Constraint, 2); 2879 Constraint++; 2880 break; 2881 case 'p': // 'p' should be translated to 'r' by default. 2882 R = std::string("r"); 2883 break; 2884 default: 2885 return std::string(1, *Constraint); 2886 } 2887 return R; 2888 } 2889 virtual const char *getClobbers() const { 2890 // FIXME: Is this really right? 2891 return ""; 2892 } 2893 }; 2894 2895 const char * const ARMTargetInfo::GCCRegNames[] = { 2896 // Integer registers 2897 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2898 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2899 2900 // Float registers 2901 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2902 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2903 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2904 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2905 2906 // Double registers 2907 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2908 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2909 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2910 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2911 2912 // Quad registers 2913 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2914 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2915 }; 2916 2917 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2918 unsigned &NumNames) const { 2919 Names = GCCRegNames; 2920 NumNames = llvm::array_lengthof(GCCRegNames); 2921 } 2922 2923 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2924 { { "a1" }, "r0" }, 2925 { { "a2" }, "r1" }, 2926 { { "a3" }, "r2" }, 2927 { { "a4" }, "r3" }, 2928 { { "v1" }, "r4" }, 2929 { { "v2" }, "r5" }, 2930 { { "v3" }, "r6" }, 2931 { { "v4" }, "r7" }, 2932 { { "v5" }, "r8" }, 2933 { { "v6", "rfp" }, "r9" }, 2934 { { "sl" }, "r10" }, 2935 { { "fp" }, "r11" }, 2936 { { "ip" }, "r12" }, 2937 { { "r13" }, "sp" }, 2938 { { "r14" }, "lr" }, 2939 { { "r15" }, "pc" }, 2940 // The S, D and Q registers overlap, but aren't really aliases; we 2941 // don't want to substitute one of these for a different-sized one. 2942 }; 2943 2944 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2945 unsigned &NumAliases) const { 2946 Aliases = GCCRegAliases; 2947 NumAliases = llvm::array_lengthof(GCCRegAliases); 2948 } 2949 2950 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2951 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2952 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2953 ALL_LANGUAGES }, 2954 #include "clang/Basic/BuiltinsARM.def" 2955 }; 2956 } // end anonymous namespace. 2957 2958 namespace { 2959 class DarwinARMTargetInfo : 2960 public DarwinTargetInfo<ARMTargetInfo> { 2961 protected: 2962 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2963 MacroBuilder &Builder) const { 2964 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2965 } 2966 2967 public: 2968 DarwinARMTargetInfo(const std::string& triple) 2969 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2970 HasAlignMac68kSupport = true; 2971 // iOS always has 64-bit atomic instructions. 2972 // FIXME: This should be based off of the target features in ARMTargetInfo. 2973 MaxAtomicInlineWidth = 64; 2974 } 2975 }; 2976 } // end anonymous namespace. 2977 2978 2979 namespace { 2980 // Hexagon abstract base class 2981 class HexagonTargetInfo : public TargetInfo { 2982 static const Builtin::Info BuiltinInfo[]; 2983 static const char * const GCCRegNames[]; 2984 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2985 std::string CPU; 2986 public: 2987 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 2988 BigEndian = false; 2989 DescriptionString = ("e-p:32:32:32-" 2990 "i64:64:64-i32:32:32-" 2991 "i16:16:16-i1:32:32-a:0:0"); 2992 2993 // {} in inline assembly are packet specifiers, not assembly variant 2994 // specifiers. 2995 NoAsmVariants = true; 2996 } 2997 2998 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2999 unsigned &NumRecords) const { 3000 Records = BuiltinInfo; 3001 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 3002 } 3003 3004 virtual bool validateAsmConstraint(const char *&Name, 3005 TargetInfo::ConstraintInfo &Info) const { 3006 return true; 3007 } 3008 3009 virtual void getTargetDefines(const LangOptions &Opts, 3010 MacroBuilder &Builder) const; 3011 3012 virtual bool hasFeature(StringRef Feature) const { 3013 return Feature == "hexagon"; 3014 } 3015 3016 virtual const char *getVAListDeclaration() const { 3017 return "typedef char* __builtin_va_list;"; 3018 } 3019 virtual void getGCCRegNames(const char * const *&Names, 3020 unsigned &NumNames) const; 3021 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3022 unsigned &NumAliases) const; 3023 virtual const char *getClobbers() const { 3024 return ""; 3025 } 3026 3027 static const char *getHexagonCPUSuffix(StringRef Name) { 3028 return llvm::StringSwitch<const char*>(Name) 3029 .Case("hexagonv2", "2") 3030 .Case("hexagonv3", "3") 3031 .Case("hexagonv4", "4") 3032 .Default(0); 3033 } 3034 3035 virtual bool setCPU(const std::string &Name) { 3036 if (!getHexagonCPUSuffix(Name)) 3037 return false; 3038 3039 CPU = Name; 3040 return true; 3041 } 3042 }; 3043 3044 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 3045 MacroBuilder &Builder) const { 3046 Builder.defineMacro("qdsp6"); 3047 Builder.defineMacro("__qdsp6", "1"); 3048 Builder.defineMacro("__qdsp6__", "1"); 3049 3050 Builder.defineMacro("hexagon"); 3051 Builder.defineMacro("__hexagon", "1"); 3052 Builder.defineMacro("__hexagon__", "1"); 3053 3054 if(CPU == "hexagonv1") { 3055 Builder.defineMacro("__HEXAGON_V1__"); 3056 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3057 if(Opts.HexagonQdsp6Compat) { 3058 Builder.defineMacro("__QDSP6_V1__"); 3059 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3060 } 3061 } 3062 else if(CPU == "hexagonv2") { 3063 Builder.defineMacro("__HEXAGON_V2__"); 3064 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3065 if(Opts.HexagonQdsp6Compat) { 3066 Builder.defineMacro("__QDSP6_V2__"); 3067 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3068 } 3069 } 3070 else if(CPU == "hexagonv3") { 3071 Builder.defineMacro("__HEXAGON_V3__"); 3072 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3073 if(Opts.HexagonQdsp6Compat) { 3074 Builder.defineMacro("__QDSP6_V3__"); 3075 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3076 } 3077 } 3078 else if(CPU == "hexagonv4") { 3079 Builder.defineMacro("__HEXAGON_V4__"); 3080 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3081 if(Opts.HexagonQdsp6Compat) { 3082 Builder.defineMacro("__QDSP6_V4__"); 3083 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3084 } 3085 } 3086 } 3087 3088 const char * const HexagonTargetInfo::GCCRegNames[] = { 3089 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3090 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3091 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3092 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3093 "p0", "p1", "p2", "p3", 3094 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3095 }; 3096 3097 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3098 unsigned &NumNames) const { 3099 Names = GCCRegNames; 3100 NumNames = llvm::array_lengthof(GCCRegNames); 3101 } 3102 3103 3104 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3105 { { "sp" }, "r29" }, 3106 { { "fp" }, "r30" }, 3107 { { "lr" }, "r31" }, 3108 }; 3109 3110 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3111 unsigned &NumAliases) const { 3112 Aliases = GCCRegAliases; 3113 NumAliases = llvm::array_lengthof(GCCRegAliases); 3114 } 3115 3116 3117 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3118 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3119 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3120 ALL_LANGUAGES }, 3121 #include "clang/Basic/BuiltinsHexagon.def" 3122 }; 3123 } 3124 3125 3126 namespace { 3127 class SparcV8TargetInfo : public TargetInfo { 3128 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3129 static const char * const GCCRegNames[]; 3130 bool SoftFloat; 3131 public: 3132 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3133 // FIXME: Support Sparc quad-precision long double? 3134 BigEndian = false; 3135 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3136 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3137 } 3138 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3139 const std::string &Name, 3140 bool Enabled) const { 3141 if (Name == "soft-float") 3142 Features[Name] = Enabled; 3143 else 3144 return false; 3145 3146 return true; 3147 } 3148 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3149 SoftFloat = false; 3150 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3151 if (Features[i] == "+soft-float") 3152 SoftFloat = true; 3153 } 3154 virtual void getTargetDefines(const LangOptions &Opts, 3155 MacroBuilder &Builder) const { 3156 DefineStd(Builder, "sparc", Opts); 3157 Builder.defineMacro("__sparcv8"); 3158 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3159 3160 if (SoftFloat) 3161 Builder.defineMacro("SOFT_FLOAT", "1"); 3162 } 3163 3164 virtual bool hasFeature(StringRef Feature) const { 3165 return llvm::StringSwitch<bool>(Feature) 3166 .Case("softfloat", SoftFloat) 3167 .Case("sparc", true) 3168 .Default(false); 3169 } 3170 3171 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3172 unsigned &NumRecords) const { 3173 // FIXME: Implement! 3174 } 3175 virtual const char *getVAListDeclaration() const { 3176 return "typedef void* __builtin_va_list;"; 3177 } 3178 virtual void getGCCRegNames(const char * const *&Names, 3179 unsigned &NumNames) const; 3180 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3181 unsigned &NumAliases) const; 3182 virtual bool validateAsmConstraint(const char *&Name, 3183 TargetInfo::ConstraintInfo &info) const { 3184 // FIXME: Implement! 3185 return false; 3186 } 3187 virtual const char *getClobbers() const { 3188 // FIXME: Implement! 3189 return ""; 3190 } 3191 }; 3192 3193 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3194 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3196 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3197 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3198 }; 3199 3200 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3201 unsigned &NumNames) const { 3202 Names = GCCRegNames; 3203 NumNames = llvm::array_lengthof(GCCRegNames); 3204 } 3205 3206 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3207 { { "g0" }, "r0" }, 3208 { { "g1" }, "r1" }, 3209 { { "g2" }, "r2" }, 3210 { { "g3" }, "r3" }, 3211 { { "g4" }, "r4" }, 3212 { { "g5" }, "r5" }, 3213 { { "g6" }, "r6" }, 3214 { { "g7" }, "r7" }, 3215 { { "o0" }, "r8" }, 3216 { { "o1" }, "r9" }, 3217 { { "o2" }, "r10" }, 3218 { { "o3" }, "r11" }, 3219 { { "o4" }, "r12" }, 3220 { { "o5" }, "r13" }, 3221 { { "o6", "sp" }, "r14" }, 3222 { { "o7" }, "r15" }, 3223 { { "l0" }, "r16" }, 3224 { { "l1" }, "r17" }, 3225 { { "l2" }, "r18" }, 3226 { { "l3" }, "r19" }, 3227 { { "l4" }, "r20" }, 3228 { { "l5" }, "r21" }, 3229 { { "l6" }, "r22" }, 3230 { { "l7" }, "r23" }, 3231 { { "i0" }, "r24" }, 3232 { { "i1" }, "r25" }, 3233 { { "i2" }, "r26" }, 3234 { { "i3" }, "r27" }, 3235 { { "i4" }, "r28" }, 3236 { { "i5" }, "r29" }, 3237 { { "i6", "fp" }, "r30" }, 3238 { { "i7" }, "r31" }, 3239 }; 3240 3241 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3242 unsigned &NumAliases) const { 3243 Aliases = GCCRegAliases; 3244 NumAliases = llvm::array_lengthof(GCCRegAliases); 3245 } 3246 } // end anonymous namespace. 3247 3248 namespace { 3249 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3250 public: 3251 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3252 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3253 SizeType = UnsignedInt; 3254 PtrDiffType = SignedInt; 3255 } 3256 }; 3257 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3258 public: 3259 SolarisSparcV8TargetInfo(const std::string& triple) : 3260 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3261 SizeType = UnsignedInt; 3262 PtrDiffType = SignedInt; 3263 } 3264 }; 3265 } // end anonymous namespace. 3266 3267 namespace { 3268 class MSP430TargetInfo : public TargetInfo { 3269 static const char * const GCCRegNames[]; 3270 public: 3271 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3272 BigEndian = false; 3273 TLSSupported = false; 3274 IntWidth = 16; IntAlign = 16; 3275 LongWidth = 32; LongLongWidth = 64; 3276 LongAlign = LongLongAlign = 16; 3277 PointerWidth = 16; PointerAlign = 16; 3278 SuitableAlign = 16; 3279 SizeType = UnsignedInt; 3280 IntMaxType = SignedLong; 3281 UIntMaxType = UnsignedLong; 3282 IntPtrType = SignedShort; 3283 PtrDiffType = SignedInt; 3284 SigAtomicType = SignedLong; 3285 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3286 } 3287 virtual void getTargetDefines(const LangOptions &Opts, 3288 MacroBuilder &Builder) const { 3289 Builder.defineMacro("MSP430"); 3290 Builder.defineMacro("__MSP430__"); 3291 // FIXME: defines for different 'flavours' of MCU 3292 } 3293 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3294 unsigned &NumRecords) const { 3295 // FIXME: Implement. 3296 Records = 0; 3297 NumRecords = 0; 3298 } 3299 virtual bool hasFeature(StringRef Feature) const { 3300 return Feature == "msp430"; 3301 } 3302 virtual void getGCCRegNames(const char * const *&Names, 3303 unsigned &NumNames) const; 3304 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3305 unsigned &NumAliases) const { 3306 // No aliases. 3307 Aliases = 0; 3308 NumAliases = 0; 3309 } 3310 virtual bool validateAsmConstraint(const char *&Name, 3311 TargetInfo::ConstraintInfo &info) const { 3312 // No target constraints for now. 3313 return false; 3314 } 3315 virtual const char *getClobbers() const { 3316 // FIXME: Is this really right? 3317 return ""; 3318 } 3319 virtual const char *getVAListDeclaration() const { 3320 // FIXME: implement 3321 return "typedef char* __builtin_va_list;"; 3322 } 3323 }; 3324 3325 const char * const MSP430TargetInfo::GCCRegNames[] = { 3326 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3327 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3328 }; 3329 3330 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3331 unsigned &NumNames) const { 3332 Names = GCCRegNames; 3333 NumNames = llvm::array_lengthof(GCCRegNames); 3334 } 3335 } 3336 3337 namespace { 3338 3339 // LLVM and Clang cannot be used directly to output native binaries for 3340 // target, but is used to compile C code to llvm bitcode with correct 3341 // type and alignment information. 3342 // 3343 // TCE uses the llvm bitcode as input and uses it for generating customized 3344 // target processor and program binary. TCE co-design environment is 3345 // publicly available in http://tce.cs.tut.fi 3346 3347 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3348 3, // opencl_global 3349 4, // opencl_local 3350 5 // opencl_constant 3351 }; 3352 3353 class TCETargetInfo : public TargetInfo{ 3354 public: 3355 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3356 TLSSupported = false; 3357 IntWidth = 32; 3358 LongWidth = LongLongWidth = 32; 3359 PointerWidth = 32; 3360 IntAlign = 32; 3361 LongAlign = LongLongAlign = 32; 3362 PointerAlign = 32; 3363 SuitableAlign = 32; 3364 SizeType = UnsignedInt; 3365 IntMaxType = SignedLong; 3366 UIntMaxType = UnsignedLong; 3367 IntPtrType = SignedInt; 3368 PtrDiffType = SignedInt; 3369 FloatWidth = 32; 3370 FloatAlign = 32; 3371 DoubleWidth = 32; 3372 DoubleAlign = 32; 3373 LongDoubleWidth = 32; 3374 LongDoubleAlign = 32; 3375 FloatFormat = &llvm::APFloat::IEEEsingle; 3376 DoubleFormat = &llvm::APFloat::IEEEsingle; 3377 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3378 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3379 "i16:16:32-i32:32:32-i64:32:32-" 3380 "f32:32:32-f64:32:32-v64:32:32-" 3381 "v128:32:32-a0:0:32-n32"; 3382 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3383 } 3384 3385 virtual void getTargetDefines(const LangOptions &Opts, 3386 MacroBuilder &Builder) const { 3387 DefineStd(Builder, "tce", Opts); 3388 Builder.defineMacro("__TCE__"); 3389 Builder.defineMacro("__TCE_V1__"); 3390 } 3391 virtual bool hasFeature(StringRef Feature) const { 3392 return Feature == "tce"; 3393 } 3394 3395 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3396 unsigned &NumRecords) const {} 3397 virtual const char *getClobbers() const { 3398 return ""; 3399 } 3400 virtual const char *getVAListDeclaration() const { 3401 return "typedef void* __builtin_va_list;"; 3402 } 3403 virtual void getGCCRegNames(const char * const *&Names, 3404 unsigned &NumNames) const {} 3405 virtual bool validateAsmConstraint(const char *&Name, 3406 TargetInfo::ConstraintInfo &info) const { 3407 return true; 3408 } 3409 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3410 unsigned &NumAliases) const {} 3411 }; 3412 } 3413 3414 namespace { 3415 class MipsTargetInfoBase : public TargetInfo { 3416 std::string CPU; 3417 protected: 3418 std::string ABI; 3419 public: 3420 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3421 : TargetInfo(triple), ABI(ABIStr) {} 3422 virtual const char *getABI() const { return ABI.c_str(); } 3423 virtual bool setABI(const std::string &Name) = 0; 3424 virtual bool setCPU(const std::string &Name) { 3425 CPU = Name; 3426 return true; 3427 } 3428 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3429 Features[ABI] = true; 3430 Features[CPU] = true; 3431 } 3432 virtual void getArchDefines(const LangOptions &Opts, 3433 MacroBuilder &Builder) const = 0; 3434 virtual void getTargetDefines(const LangOptions &Opts, 3435 MacroBuilder &Builder) const = 0; 3436 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3437 unsigned &NumRecords) const { 3438 // FIXME: Implement! 3439 } 3440 virtual bool hasFeature(StringRef Feature) const { 3441 return Feature == "mips"; 3442 } 3443 virtual const char *getVAListDeclaration() const { 3444 return "typedef void* __builtin_va_list;"; 3445 } 3446 virtual void getGCCRegNames(const char * const *&Names, 3447 unsigned &NumNames) const { 3448 static const char * const GCCRegNames[] = { 3449 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3450 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3451 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3452 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3453 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3454 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3455 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3456 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3457 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3458 "$fcc5","$fcc6","$fcc7" 3459 }; 3460 Names = GCCRegNames; 3461 NumNames = llvm::array_lengthof(GCCRegNames); 3462 } 3463 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3464 unsigned &NumAliases) const = 0; 3465 virtual bool validateAsmConstraint(const char *&Name, 3466 TargetInfo::ConstraintInfo &Info) const { 3467 switch (*Name) { 3468 default: 3469 return false; 3470 3471 case 'r': // CPU registers. 3472 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3473 case 'y': // Equivalent to "r", backwards compatibility only. 3474 case 'f': // floating-point registers. 3475 Info.setAllowsRegister(); 3476 return true; 3477 } 3478 } 3479 3480 virtual const char *getClobbers() const { 3481 // FIXME: Implement! 3482 return ""; 3483 } 3484 }; 3485 3486 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3487 public: 3488 Mips32TargetInfoBase(const std::string& triple) : 3489 MipsTargetInfoBase(triple, "o32") { 3490 SizeType = UnsignedInt; 3491 PtrDiffType = SignedInt; 3492 } 3493 virtual bool setABI(const std::string &Name) { 3494 if ((Name == "o32") || (Name == "eabi")) { 3495 ABI = Name; 3496 return true; 3497 } else 3498 return false; 3499 } 3500 virtual void getArchDefines(const LangOptions &Opts, 3501 MacroBuilder &Builder) const { 3502 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3503 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3504 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3505 3506 if (ABI == "o32") { 3507 Builder.defineMacro("__mips_o32"); 3508 Builder.defineMacro("_ABIO32", "1"); 3509 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3510 } 3511 else if (ABI == "eabi") 3512 Builder.defineMacro("__mips_eabi"); 3513 else 3514 llvm_unreachable("Invalid ABI for Mips32."); 3515 } 3516 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3517 unsigned &NumAliases) const { 3518 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3519 { { "at" }, "$1" }, 3520 { { "v0" }, "$2" }, 3521 { { "v1" }, "$3" }, 3522 { { "a0" }, "$4" }, 3523 { { "a1" }, "$5" }, 3524 { { "a2" }, "$6" }, 3525 { { "a3" }, "$7" }, 3526 { { "t0" }, "$8" }, 3527 { { "t1" }, "$9" }, 3528 { { "t2" }, "$10" }, 3529 { { "t3" }, "$11" }, 3530 { { "t4" }, "$12" }, 3531 { { "t5" }, "$13" }, 3532 { { "t6" }, "$14" }, 3533 { { "t7" }, "$15" }, 3534 { { "s0" }, "$16" }, 3535 { { "s1" }, "$17" }, 3536 { { "s2" }, "$18" }, 3537 { { "s3" }, "$19" }, 3538 { { "s4" }, "$20" }, 3539 { { "s5" }, "$21" }, 3540 { { "s6" }, "$22" }, 3541 { { "s7" }, "$23" }, 3542 { { "t8" }, "$24" }, 3543 { { "t9" }, "$25" }, 3544 { { "k0" }, "$26" }, 3545 { { "k1" }, "$27" }, 3546 { { "gp" }, "$28" }, 3547 { { "sp" }, "$29" }, 3548 { { "fp" }, "$30" }, 3549 { { "ra" }, "$31" } 3550 }; 3551 Aliases = GCCRegAliases; 3552 NumAliases = llvm::array_lengthof(GCCRegAliases); 3553 } 3554 }; 3555 3556 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3557 public: 3558 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3559 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3560 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3561 } 3562 virtual void getTargetDefines(const LangOptions &Opts, 3563 MacroBuilder &Builder) const { 3564 DefineStd(Builder, "mips", Opts); 3565 Builder.defineMacro("_mips"); 3566 DefineStd(Builder, "MIPSEB", Opts); 3567 Builder.defineMacro("_MIPSEB"); 3568 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3569 getArchDefines(Opts, Builder); 3570 } 3571 }; 3572 3573 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3574 public: 3575 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3576 BigEndian = false; 3577 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3578 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3579 } 3580 virtual void getTargetDefines(const LangOptions &Opts, 3581 MacroBuilder &Builder) const { 3582 DefineStd(Builder, "mips", Opts); 3583 Builder.defineMacro("_mips"); 3584 DefineStd(Builder, "MIPSEL", Opts); 3585 Builder.defineMacro("_MIPSEL"); 3586 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3587 getArchDefines(Opts, Builder); 3588 } 3589 }; 3590 3591 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3592 virtual void SetDescriptionString(const std::string &Name) = 0; 3593 public: 3594 Mips64TargetInfoBase(const std::string& triple) : 3595 MipsTargetInfoBase(triple, "n64") { 3596 LongWidth = LongAlign = 64; 3597 PointerWidth = PointerAlign = 64; 3598 LongDoubleWidth = LongDoubleAlign = 128; 3599 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3600 SuitableAlign = 128; 3601 } 3602 virtual bool setABI(const std::string &Name) { 3603 SetDescriptionString(Name); 3604 3605 if (Name != "n32" && Name != "n64") 3606 return false; 3607 3608 ABI = Name; 3609 3610 if (Name == "n32") { 3611 LongWidth = LongAlign = 32; 3612 PointerWidth = PointerAlign = 32; 3613 } 3614 3615 return true; 3616 } 3617 virtual void getArchDefines(const LangOptions &Opts, 3618 MacroBuilder &Builder) const { 3619 if (ABI == "n32") { 3620 Builder.defineMacro("__mips_n32"); 3621 Builder.defineMacro("_ABIN32", "2"); 3622 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3623 } 3624 else if (ABI == "n64") { 3625 Builder.defineMacro("__mips_n64"); 3626 Builder.defineMacro("_ABI64", "3"); 3627 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3628 } 3629 else 3630 llvm_unreachable("Invalid ABI for Mips64."); 3631 } 3632 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3633 unsigned &NumAliases) const { 3634 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3635 { { "at" }, "$1" }, 3636 { { "v0" }, "$2" }, 3637 { { "v1" }, "$3" }, 3638 { { "a0" }, "$4" }, 3639 { { "a1" }, "$5" }, 3640 { { "a2" }, "$6" }, 3641 { { "a3" }, "$7" }, 3642 { { "a4" }, "$8" }, 3643 { { "a5" }, "$9" }, 3644 { { "a6" }, "$10" }, 3645 { { "a7" }, "$11" }, 3646 { { "t0" }, "$12" }, 3647 { { "t1" }, "$13" }, 3648 { { "t2" }, "$14" }, 3649 { { "t3" }, "$15" }, 3650 { { "s0" }, "$16" }, 3651 { { "s1" }, "$17" }, 3652 { { "s2" }, "$18" }, 3653 { { "s3" }, "$19" }, 3654 { { "s4" }, "$20" }, 3655 { { "s5" }, "$21" }, 3656 { { "s6" }, "$22" }, 3657 { { "s7" }, "$23" }, 3658 { { "t8" }, "$24" }, 3659 { { "t9" }, "$25" }, 3660 { { "k0" }, "$26" }, 3661 { { "k1" }, "$27" }, 3662 { { "gp" }, "$28" }, 3663 { { "sp" }, "$29" }, 3664 { { "fp" }, "$30" }, 3665 { { "ra" }, "$31" } 3666 }; 3667 Aliases = GCCRegAliases; 3668 NumAliases = llvm::array_lengthof(GCCRegAliases); 3669 } 3670 }; 3671 3672 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3673 virtual void SetDescriptionString(const std::string &Name) { 3674 // Change DescriptionString only if ABI is n32. 3675 if (Name == "n32") 3676 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3677 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3678 "v64:64:64-n32"; 3679 } 3680 public: 3681 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3682 // Default ABI is n64. 3683 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3684 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3685 "v64:64:64-n32"; 3686 } 3687 virtual void getTargetDefines(const LangOptions &Opts, 3688 MacroBuilder &Builder) const { 3689 DefineStd(Builder, "mips", Opts); 3690 Builder.defineMacro("_mips"); 3691 DefineStd(Builder, "MIPSEB", Opts); 3692 Builder.defineMacro("_MIPSEB"); 3693 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3694 getArchDefines(Opts, Builder); 3695 } 3696 }; 3697 3698 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3699 virtual void SetDescriptionString(const std::string &Name) { 3700 // Change DescriptionString only if ABI is n32. 3701 if (Name == "n32") 3702 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3703 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3704 "-v64:64:64-n32"; 3705 } 3706 public: 3707 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3708 // Default ABI is n64. 3709 BigEndian = false; 3710 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3711 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3712 "v64:64:64-n32"; 3713 } 3714 virtual void getTargetDefines(const LangOptions &Opts, 3715 MacroBuilder &Builder) const { 3716 DefineStd(Builder, "mips", Opts); 3717 Builder.defineMacro("_mips"); 3718 DefineStd(Builder, "MIPSEL", Opts); 3719 Builder.defineMacro("_MIPSEL"); 3720 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3721 getArchDefines(Opts, Builder); 3722 } 3723 }; 3724 } // end anonymous namespace. 3725 3726 namespace { 3727 class PNaClTargetInfo : public TargetInfo { 3728 public: 3729 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3730 BigEndian = false; 3731 this->UserLabelPrefix = ""; 3732 this->LongAlign = 32; 3733 this->LongWidth = 32; 3734 this->PointerAlign = 32; 3735 this->PointerWidth = 32; 3736 this->IntMaxType = TargetInfo::SignedLongLong; 3737 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3738 this->Int64Type = TargetInfo::SignedLongLong; 3739 this->DoubleAlign = 64; 3740 this->LongDoubleWidth = 64; 3741 this->LongDoubleAlign = 64; 3742 this->SizeType = TargetInfo::UnsignedInt; 3743 this->PtrDiffType = TargetInfo::SignedInt; 3744 this->IntPtrType = TargetInfo::SignedInt; 3745 this->RegParmMax = 2; 3746 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3747 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3748 } 3749 3750 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3751 } 3752 virtual void getArchDefines(const LangOptions &Opts, 3753 MacroBuilder &Builder) const { 3754 Builder.defineMacro("__le32__"); 3755 Builder.defineMacro("__pnacl__"); 3756 } 3757 virtual void getTargetDefines(const LangOptions &Opts, 3758 MacroBuilder &Builder) const { 3759 DefineStd(Builder, "unix", Opts); 3760 Builder.defineMacro("__ELF__"); 3761 if (Opts.POSIXThreads) 3762 Builder.defineMacro("_REENTRANT"); 3763 if (Opts.CPlusPlus) 3764 Builder.defineMacro("_GNU_SOURCE"); 3765 3766 Builder.defineMacro("__native_client__"); 3767 getArchDefines(Opts, Builder); 3768 } 3769 virtual bool hasFeature(StringRef Feature) const { 3770 return Feature == "pnacl"; 3771 } 3772 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3773 unsigned &NumRecords) const { 3774 } 3775 virtual const char *getVAListDeclaration() const { 3776 return "typedef int __builtin_va_list[4];"; 3777 } 3778 virtual void getGCCRegNames(const char * const *&Names, 3779 unsigned &NumNames) const; 3780 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3781 unsigned &NumAliases) const; 3782 virtual bool validateAsmConstraint(const char *&Name, 3783 TargetInfo::ConstraintInfo &Info) const { 3784 return false; 3785 } 3786 3787 virtual const char *getClobbers() const { 3788 return ""; 3789 } 3790 }; 3791 3792 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3793 unsigned &NumNames) const { 3794 Names = NULL; 3795 NumNames = 0; 3796 } 3797 3798 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3799 unsigned &NumAliases) const { 3800 Aliases = NULL; 3801 NumAliases = 0; 3802 } 3803 } // end anonymous namespace. 3804 3805 3806 //===----------------------------------------------------------------------===// 3807 // Driver code 3808 //===----------------------------------------------------------------------===// 3809 3810 static TargetInfo *AllocateTarget(const std::string &T) { 3811 llvm::Triple Triple(T); 3812 llvm::Triple::OSType os = Triple.getOS(); 3813 3814 switch (Triple.getArch()) { 3815 default: 3816 return NULL; 3817 3818 case llvm::Triple::hexagon: 3819 return new HexagonTargetInfo(T); 3820 3821 case llvm::Triple::arm: 3822 case llvm::Triple::thumb: 3823 if (Triple.isOSDarwin()) 3824 return new DarwinARMTargetInfo(T); 3825 3826 switch (os) { 3827 case llvm::Triple::Linux: 3828 return new LinuxTargetInfo<ARMTargetInfo>(T); 3829 case llvm::Triple::FreeBSD: 3830 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3831 case llvm::Triple::NetBSD: 3832 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3833 case llvm::Triple::RTEMS: 3834 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3835 default: 3836 return new ARMTargetInfo(T); 3837 } 3838 3839 case llvm::Triple::msp430: 3840 return new MSP430TargetInfo(T); 3841 3842 case llvm::Triple::mips: 3843 switch (os) { 3844 case llvm::Triple::Linux: 3845 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3846 case llvm::Triple::RTEMS: 3847 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3848 case llvm::Triple::FreeBSD: 3849 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3850 case llvm::Triple::NetBSD: 3851 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3852 default: 3853 return new Mips32EBTargetInfo(T); 3854 } 3855 3856 case llvm::Triple::mipsel: 3857 switch (os) { 3858 case llvm::Triple::Linux: 3859 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3860 case llvm::Triple::RTEMS: 3861 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3862 case llvm::Triple::FreeBSD: 3863 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3864 case llvm::Triple::NetBSD: 3865 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3866 default: 3867 return new Mips32ELTargetInfo(T); 3868 } 3869 3870 case llvm::Triple::mips64: 3871 switch (os) { 3872 case llvm::Triple::Linux: 3873 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3874 case llvm::Triple::RTEMS: 3875 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3876 case llvm::Triple::FreeBSD: 3877 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3878 case llvm::Triple::NetBSD: 3879 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3880 default: 3881 return new Mips64EBTargetInfo(T); 3882 } 3883 3884 case llvm::Triple::mips64el: 3885 switch (os) { 3886 case llvm::Triple::Linux: 3887 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3888 case llvm::Triple::RTEMS: 3889 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3890 case llvm::Triple::FreeBSD: 3891 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3892 case llvm::Triple::NetBSD: 3893 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3894 default: 3895 return new Mips64ELTargetInfo(T); 3896 } 3897 3898 case llvm::Triple::le32: 3899 switch (os) { 3900 case llvm::Triple::NativeClient: 3901 return new PNaClTargetInfo(T); 3902 default: 3903 return NULL; 3904 } 3905 3906 case llvm::Triple::ppc: 3907 if (Triple.isOSDarwin()) 3908 return new DarwinPPC32TargetInfo(T); 3909 switch (os) { 3910 case llvm::Triple::Linux: 3911 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3912 case llvm::Triple::FreeBSD: 3913 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3914 case llvm::Triple::NetBSD: 3915 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3916 case llvm::Triple::RTEMS: 3917 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3918 default: 3919 return new PPC32TargetInfo(T); 3920 } 3921 3922 case llvm::Triple::ppc64: 3923 if (Triple.isOSDarwin()) 3924 return new DarwinPPC64TargetInfo(T); 3925 switch (os) { 3926 case llvm::Triple::Linux: 3927 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3928 case llvm::Triple::Lv2: 3929 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3930 case llvm::Triple::FreeBSD: 3931 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3932 case llvm::Triple::NetBSD: 3933 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3934 default: 3935 return new PPC64TargetInfo(T); 3936 } 3937 3938 case llvm::Triple::ptx32: 3939 return new PTX32TargetInfo(T); 3940 case llvm::Triple::ptx64: 3941 return new PTX64TargetInfo(T); 3942 3943 case llvm::Triple::mblaze: 3944 return new MBlazeTargetInfo(T); 3945 3946 case llvm::Triple::sparc: 3947 switch (os) { 3948 case llvm::Triple::Linux: 3949 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3950 case llvm::Triple::AuroraUX: 3951 return new AuroraUXSparcV8TargetInfo(T); 3952 case llvm::Triple::Solaris: 3953 return new SolarisSparcV8TargetInfo(T); 3954 case llvm::Triple::NetBSD: 3955 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3956 case llvm::Triple::RTEMS: 3957 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3958 default: 3959 return new SparcV8TargetInfo(T); 3960 } 3961 3962 // FIXME: Need a real SPU target. 3963 case llvm::Triple::cellspu: 3964 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3965 3966 case llvm::Triple::tce: 3967 return new TCETargetInfo(T); 3968 3969 case llvm::Triple::x86: 3970 if (Triple.isOSDarwin()) 3971 return new DarwinI386TargetInfo(T); 3972 3973 switch (os) { 3974 case llvm::Triple::AuroraUX: 3975 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3976 case llvm::Triple::Linux: 3977 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3978 case llvm::Triple::DragonFly: 3979 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3980 case llvm::Triple::NetBSD: 3981 return new NetBSDI386TargetInfo(T); 3982 case llvm::Triple::OpenBSD: 3983 return new OpenBSDI386TargetInfo(T); 3984 case llvm::Triple::FreeBSD: 3985 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3986 case llvm::Triple::Minix: 3987 return new MinixTargetInfo<X86_32TargetInfo>(T); 3988 case llvm::Triple::Solaris: 3989 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3990 case llvm::Triple::Cygwin: 3991 return new CygwinX86_32TargetInfo(T); 3992 case llvm::Triple::MinGW32: 3993 return new MinGWX86_32TargetInfo(T); 3994 case llvm::Triple::Win32: 3995 return new VisualStudioWindowsX86_32TargetInfo(T); 3996 case llvm::Triple::Haiku: 3997 return new HaikuX86_32TargetInfo(T); 3998 case llvm::Triple::RTEMS: 3999 return new RTEMSX86_32TargetInfo(T); 4000 default: 4001 return new X86_32TargetInfo(T); 4002 } 4003 4004 case llvm::Triple::x86_64: 4005 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 4006 return new DarwinX86_64TargetInfo(T); 4007 4008 switch (os) { 4009 case llvm::Triple::AuroraUX: 4010 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 4011 case llvm::Triple::Linux: 4012 return new LinuxTargetInfo<X86_64TargetInfo>(T); 4013 case llvm::Triple::DragonFly: 4014 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 4015 case llvm::Triple::NetBSD: 4016 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 4017 case llvm::Triple::OpenBSD: 4018 return new OpenBSDX86_64TargetInfo(T); 4019 case llvm::Triple::FreeBSD: 4020 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 4021 case llvm::Triple::Solaris: 4022 return new SolarisTargetInfo<X86_64TargetInfo>(T); 4023 case llvm::Triple::MinGW32: 4024 return new MinGWX86_64TargetInfo(T); 4025 case llvm::Triple::Win32: // This is what Triple.h supports now. 4026 return new VisualStudioWindowsX86_64TargetInfo(T); 4027 default: 4028 return new X86_64TargetInfo(T); 4029 } 4030 } 4031 } 4032 4033 /// CreateTargetInfo - Return the target info object for the specified target 4034 /// triple. 4035 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 4036 TargetOptions &Opts) { 4037 llvm::Triple Triple(Opts.Triple); 4038 4039 // Construct the target 4040 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 4041 if (!Target) { 4042 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 4043 return 0; 4044 } 4045 4046 // Set the target CPU if specified. 4047 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 4048 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 4049 return 0; 4050 } 4051 4052 // Set the target ABI if specified. 4053 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 4054 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 4055 return 0; 4056 } 4057 4058 // Set the target C++ ABI. 4059 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 4060 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 4061 return 0; 4062 } 4063 4064 // Compute the default target features, we need the target to handle this 4065 // because features may have dependencies on one another. 4066 llvm::StringMap<bool> Features; 4067 Target->getDefaultFeatures(Features); 4068 4069 // Apply the user specified deltas. 4070 // First the enables. 4071 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4072 ie = Opts.Features.end(); it != ie; ++it) { 4073 const char *Name = it->c_str(); 4074 4075 if (Name[0] != '+') 4076 continue; 4077 4078 // Apply the feature via the target. 4079 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4080 Diags.Report(diag::err_target_invalid_feature) << Name; 4081 return 0; 4082 } 4083 } 4084 4085 // Then the disables. 4086 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4087 ie = Opts.Features.end(); it != ie; ++it) { 4088 const char *Name = it->c_str(); 4089 4090 if (Name[0] == '+') 4091 continue; 4092 4093 // Apply the feature via the target. 4094 if (Name[0] != '-' || 4095 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4096 Diags.Report(diag::err_target_invalid_feature) << Name; 4097 return 0; 4098 } 4099 } 4100 4101 // Add the features to the compile options. 4102 // 4103 // FIXME: If we are completely confident that we have the right set, we only 4104 // need to pass the minuses. 4105 Opts.Features.clear(); 4106 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4107 ie = Features.end(); it != ie; ++it) 4108 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 4109 it->first().str()); 4110 Target->HandleTargetFeatures(Opts.Features); 4111 4112 return Target.take(); 4113 } 4114