1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 } 103 104 if (Opts.Static) 105 Builder.defineMacro("__STATIC__"); 106 else 107 Builder.defineMacro("__DYNAMIC__"); 108 109 if (Opts.POSIXThreads) 110 Builder.defineMacro("_REENTRANT"); 111 112 // Get the platform type and version number from the triple. 113 unsigned Maj, Min, Rev; 114 115 // If no version was given, default to to 10.4.0, for simplifying tests. 116 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 117 PlatformName = "macosx"; 118 Min = Rev = 0; 119 Maj = 8; 120 } else { 121 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 122 // "-osxNNN", and "-iosNNN"). 123 124 if (Triple.getOS() == llvm::Triple::Darwin) { 125 // For historical reasons that make little sense, the version passed here 126 // is the "darwin" version, which drops the 10 and offsets by 4. 127 Triple.getOSVersion(Maj, Min, Rev); 128 129 if (Triple.getEnvironmentName() == "iphoneos") { 130 PlatformName = "ios"; 131 } else { 132 PlatformName = "macosx"; 133 Rev = Min; 134 Min = Maj - 4; 135 Maj = 10; 136 } 137 } else { 138 Triple.getOSVersion(Maj, Min, Rev); 139 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 140 } 141 } 142 143 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 144 // generating code for Win32 ABI. No need to emit 145 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 146 if (PlatformName == "win32") { 147 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 148 return; 149 } 150 151 // Set the appropriate OS version define. 152 if (PlatformName == "ios") { 153 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 154 char Str[6]; 155 Str[0] = '0' + Maj; 156 Str[1] = '0' + (Min / 10); 157 Str[2] = '0' + (Min % 10); 158 Str[3] = '0' + (Rev / 10); 159 Str[4] = '0' + (Rev % 10); 160 Str[5] = '\0'; 161 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 162 } else { 163 // Note that the Driver allows versions which aren't representable in the 164 // define (because we only get a single digit for the minor and micro 165 // revision numbers). So, we limit them to the maximum representable 166 // version. 167 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 168 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 169 char Str[5]; 170 Str[0] = '0' + (Maj / 10); 171 Str[1] = '0' + (Maj % 10); 172 Str[2] = '0' + std::min(Min, 9U); 173 Str[3] = '0' + std::min(Rev, 9U); 174 Str[4] = '\0'; 175 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 176 } 177 178 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 179 } 180 181 namespace { 182 template<typename Target> 183 class DarwinTargetInfo : public OSTargetInfo<Target> { 184 protected: 185 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 186 MacroBuilder &Builder) const { 187 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 188 this->PlatformMinVersion); 189 } 190 191 public: 192 DarwinTargetInfo(const std::string& triple) : 193 OSTargetInfo<Target>(triple) { 194 llvm::Triple T = llvm::Triple(triple); 195 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 196 this->MCountName = "\01mcount"; 197 } 198 199 virtual std::string isValidSectionSpecifier(StringRef SR) const { 200 // Let MCSectionMachO validate this. 201 StringRef Segment, Section; 202 unsigned TAA, StubSize; 203 bool HasTAA; 204 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 205 TAA, HasTAA, StubSize); 206 } 207 208 virtual const char *getStaticInitSectionSpecifier() const { 209 // FIXME: We should return 0 when building kexts. 210 return "__TEXT,__StaticInit,regular,pure_instructions"; 211 } 212 213 }; 214 215 216 // DragonFlyBSD Target 217 template<typename Target> 218 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 219 protected: 220 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 221 MacroBuilder &Builder) const { 222 // DragonFly defines; list based off of gcc output 223 Builder.defineMacro("__DragonFly__"); 224 Builder.defineMacro("__DragonFly_cc_version", "100001"); 225 Builder.defineMacro("__ELF__"); 226 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 227 Builder.defineMacro("__tune_i386__"); 228 DefineStd(Builder, "unix", Opts); 229 } 230 public: 231 DragonFlyBSDTargetInfo(const std::string &triple) 232 : OSTargetInfo<Target>(triple) {} 233 }; 234 235 // FreeBSD Target 236 template<typename Target> 237 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 238 protected: 239 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 240 MacroBuilder &Builder) const { 241 // FreeBSD defines; list based off of gcc output 242 243 unsigned Release = Triple.getOSMajorVersion(); 244 if (Release == 0U) 245 Release = 8; 246 247 Builder.defineMacro("__FreeBSD__", Twine(Release)); 248 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 249 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 250 DefineStd(Builder, "unix", Opts); 251 Builder.defineMacro("__ELF__"); 252 } 253 public: 254 FreeBSDTargetInfo(const std::string &triple) 255 : OSTargetInfo<Target>(triple) { 256 this->UserLabelPrefix = ""; 257 258 llvm::Triple Triple(triple); 259 switch (Triple.getArch()) { 260 default: 261 case llvm::Triple::x86: 262 case llvm::Triple::x86_64: 263 this->MCountName = ".mcount"; 264 break; 265 case llvm::Triple::mips: 266 case llvm::Triple::mipsel: 267 case llvm::Triple::ppc: 268 case llvm::Triple::ppc64: 269 this->MCountName = "_mcount"; 270 break; 271 case llvm::Triple::arm: 272 this->MCountName = "__mcount"; 273 break; 274 } 275 276 } 277 }; 278 279 // Minix Target 280 template<typename Target> 281 class MinixTargetInfo : public OSTargetInfo<Target> { 282 protected: 283 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 284 MacroBuilder &Builder) const { 285 // Minix defines 286 287 Builder.defineMacro("__minix", "3"); 288 Builder.defineMacro("_EM_WSIZE", "4"); 289 Builder.defineMacro("_EM_PSIZE", "4"); 290 Builder.defineMacro("_EM_SSIZE", "2"); 291 Builder.defineMacro("_EM_LSIZE", "4"); 292 Builder.defineMacro("_EM_FSIZE", "4"); 293 Builder.defineMacro("_EM_DSIZE", "8"); 294 Builder.defineMacro("__ELF__"); 295 DefineStd(Builder, "unix", Opts); 296 } 297 public: 298 MinixTargetInfo(const std::string &triple) 299 : OSTargetInfo<Target>(triple) { 300 this->UserLabelPrefix = ""; 301 } 302 }; 303 304 // Linux target 305 template<typename Target> 306 class LinuxTargetInfo : public OSTargetInfo<Target> { 307 protected: 308 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 309 MacroBuilder &Builder) const { 310 // Linux defines; list based off of gcc output 311 DefineStd(Builder, "unix", Opts); 312 DefineStd(Builder, "linux", Opts); 313 Builder.defineMacro("__gnu_linux__"); 314 Builder.defineMacro("__ELF__"); 315 if (Opts.POSIXThreads) 316 Builder.defineMacro("_REENTRANT"); 317 if (Opts.CPlusPlus) 318 Builder.defineMacro("_GNU_SOURCE"); 319 } 320 public: 321 LinuxTargetInfo(const std::string& triple) 322 : OSTargetInfo<Target>(triple) { 323 this->UserLabelPrefix = ""; 324 this->WIntType = TargetInfo::UnsignedInt; 325 } 326 327 virtual const char *getStaticInitSectionSpecifier() const { 328 return ".text.startup"; 329 } 330 }; 331 332 // NetBSD Target 333 template<typename Target> 334 class NetBSDTargetInfo : public OSTargetInfo<Target> { 335 protected: 336 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 337 MacroBuilder &Builder) const { 338 // NetBSD defines; list based off of gcc output 339 Builder.defineMacro("__NetBSD__"); 340 Builder.defineMacro("__unix__"); 341 Builder.defineMacro("__ELF__"); 342 if (Opts.POSIXThreads) 343 Builder.defineMacro("_POSIX_THREADS"); 344 } 345 public: 346 NetBSDTargetInfo(const std::string &triple) 347 : OSTargetInfo<Target>(triple) { 348 this->UserLabelPrefix = ""; 349 } 350 }; 351 352 // OpenBSD Target 353 template<typename Target> 354 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 355 protected: 356 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 357 MacroBuilder &Builder) const { 358 // OpenBSD defines; list based off of gcc output 359 360 Builder.defineMacro("__OpenBSD__"); 361 DefineStd(Builder, "unix", Opts); 362 Builder.defineMacro("__ELF__"); 363 if (Opts.POSIXThreads) 364 Builder.defineMacro("_POSIX_THREADS"); 365 } 366 public: 367 OpenBSDTargetInfo(const std::string &triple) 368 : OSTargetInfo<Target>(triple) { 369 this->UserLabelPrefix = ""; 370 371 llvm::Triple Triple(triple); 372 switch (Triple.getArch()) { 373 default: 374 case llvm::Triple::x86: 375 case llvm::Triple::x86_64: 376 case llvm::Triple::arm: 377 case llvm::Triple::sparc: 378 this->MCountName = "__mcount"; 379 break; 380 case llvm::Triple::mips64: 381 case llvm::Triple::mips64el: 382 case llvm::Triple::ppc: 383 case llvm::Triple::sparcv9: 384 this->MCountName = "_mcount"; 385 break; 386 } 387 } 388 }; 389 390 // PSP Target 391 template<typename Target> 392 class PSPTargetInfo : public OSTargetInfo<Target> { 393 protected: 394 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 395 MacroBuilder &Builder) const { 396 // PSP defines; list based on the output of the pspdev gcc toolchain. 397 Builder.defineMacro("PSP"); 398 Builder.defineMacro("_PSP"); 399 Builder.defineMacro("__psp__"); 400 Builder.defineMacro("__ELF__"); 401 } 402 public: 403 PSPTargetInfo(const std::string& triple) 404 : OSTargetInfo<Target>(triple) { 405 this->UserLabelPrefix = ""; 406 } 407 }; 408 409 // PS3 PPU Target 410 template<typename Target> 411 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 412 protected: 413 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 414 MacroBuilder &Builder) const { 415 // PS3 PPU defines. 416 Builder.defineMacro("__PPC__"); 417 Builder.defineMacro("__PPU__"); 418 Builder.defineMacro("__CELLOS_LV2__"); 419 Builder.defineMacro("__ELF__"); 420 Builder.defineMacro("__LP32__"); 421 Builder.defineMacro("_ARCH_PPC64"); 422 Builder.defineMacro("__powerpc64__"); 423 } 424 public: 425 PS3PPUTargetInfo(const std::string& triple) 426 : OSTargetInfo<Target>(triple) { 427 this->UserLabelPrefix = ""; 428 this->LongWidth = this->LongAlign = 32; 429 this->PointerWidth = this->PointerAlign = 32; 430 this->IntMaxType = TargetInfo::SignedLongLong; 431 this->UIntMaxType = TargetInfo::UnsignedLongLong; 432 this->Int64Type = TargetInfo::SignedLongLong; 433 this->SizeType = TargetInfo::UnsignedInt; 434 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 435 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 436 } 437 }; 438 439 // FIXME: Need a real SPU target. 440 // PS3 SPU Target 441 template<typename Target> 442 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 443 protected: 444 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 445 MacroBuilder &Builder) const { 446 // PS3 PPU defines. 447 Builder.defineMacro("__SPU__"); 448 Builder.defineMacro("__ELF__"); 449 } 450 public: 451 PS3SPUTargetInfo(const std::string& triple) 452 : OSTargetInfo<Target>(triple) { 453 this->UserLabelPrefix = ""; 454 } 455 }; 456 457 // AuroraUX target 458 template<typename Target> 459 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 460 protected: 461 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 462 MacroBuilder &Builder) const { 463 DefineStd(Builder, "sun", Opts); 464 DefineStd(Builder, "unix", Opts); 465 Builder.defineMacro("__ELF__"); 466 Builder.defineMacro("__svr4__"); 467 Builder.defineMacro("__SVR4"); 468 } 469 public: 470 AuroraUXTargetInfo(const std::string& triple) 471 : OSTargetInfo<Target>(triple) { 472 this->UserLabelPrefix = ""; 473 this->WCharType = this->SignedLong; 474 // FIXME: WIntType should be SignedLong 475 } 476 }; 477 478 // Solaris target 479 template<typename Target> 480 class SolarisTargetInfo : public OSTargetInfo<Target> { 481 protected: 482 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 483 MacroBuilder &Builder) const { 484 DefineStd(Builder, "sun", Opts); 485 DefineStd(Builder, "unix", Opts); 486 Builder.defineMacro("__ELF__"); 487 Builder.defineMacro("__svr4__"); 488 Builder.defineMacro("__SVR4"); 489 } 490 public: 491 SolarisTargetInfo(const std::string& triple) 492 : OSTargetInfo<Target>(triple) { 493 this->UserLabelPrefix = ""; 494 this->WCharType = this->SignedLong; 495 // FIXME: WIntType should be SignedLong 496 } 497 }; 498 499 // Windows target 500 template<typename Target> 501 class WindowsTargetInfo : public OSTargetInfo<Target> { 502 protected: 503 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 504 MacroBuilder &Builder) const { 505 Builder.defineMacro("_WIN32"); 506 } 507 void getVisualStudioDefines(const LangOptions &Opts, 508 MacroBuilder &Builder) const { 509 if (Opts.CPlusPlus) { 510 if (Opts.RTTI) 511 Builder.defineMacro("_CPPRTTI"); 512 513 if (Opts.Exceptions) 514 Builder.defineMacro("_CPPUNWIND"); 515 } 516 517 if (!Opts.CharIsSigned) 518 Builder.defineMacro("_CHAR_UNSIGNED"); 519 520 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 521 // but it works for now. 522 if (Opts.POSIXThreads) 523 Builder.defineMacro("_MT"); 524 525 if (Opts.MSCVersion != 0) 526 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 527 528 if (Opts.MicrosoftExt) { 529 Builder.defineMacro("_MSC_EXTENSIONS"); 530 531 if (Opts.CPlusPlus0x) { 532 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 533 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 534 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 535 } 536 } 537 538 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 539 } 540 541 public: 542 WindowsTargetInfo(const std::string &triple) 543 : OSTargetInfo<Target>(triple) {} 544 }; 545 546 } // end anonymous namespace. 547 548 //===----------------------------------------------------------------------===// 549 // Specific target implementations. 550 //===----------------------------------------------------------------------===// 551 552 namespace { 553 // PPC abstract base class 554 class PPCTargetInfo : public TargetInfo { 555 static const Builtin::Info BuiltinInfo[]; 556 static const char * const GCCRegNames[]; 557 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 558 public: 559 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 560 561 virtual void getTargetBuiltins(const Builtin::Info *&Records, 562 unsigned &NumRecords) const { 563 Records = BuiltinInfo; 564 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 565 } 566 567 virtual void getTargetDefines(const LangOptions &Opts, 568 MacroBuilder &Builder) const; 569 570 virtual void getGCCRegNames(const char * const *&Names, 571 unsigned &NumNames) const; 572 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 573 unsigned &NumAliases) const; 574 virtual bool validateAsmConstraint(const char *&Name, 575 TargetInfo::ConstraintInfo &Info) const { 576 switch (*Name) { 577 default: return false; 578 case 'O': // Zero 579 break; 580 case 'b': // Base register 581 case 'f': // Floating point register 582 Info.setAllowsRegister(); 583 break; 584 // FIXME: The following are added to allow parsing. 585 // I just took a guess at what the actions should be. 586 // Also, is more specific checking needed? I.e. specific registers? 587 case 'd': // Floating point register (containing 64-bit value) 588 case 'v': // Altivec vector register 589 Info.setAllowsRegister(); 590 break; 591 case 'w': 592 switch (Name[1]) { 593 case 'd':// VSX vector register to hold vector double data 594 case 'f':// VSX vector register to hold vector float data 595 case 's':// VSX vector register to hold scalar float data 596 case 'a':// Any VSX register 597 break; 598 default: 599 return false; 600 } 601 Info.setAllowsRegister(); 602 Name++; // Skip over 'w'. 603 break; 604 case 'h': // `MQ', `CTR', or `LINK' register 605 case 'q': // `MQ' register 606 case 'c': // `CTR' register 607 case 'l': // `LINK' register 608 case 'x': // `CR' register (condition register) number 0 609 case 'y': // `CR' register (condition register) 610 case 'z': // `XER[CA]' carry bit (part of the XER register) 611 Info.setAllowsRegister(); 612 break; 613 case 'I': // Signed 16-bit constant 614 case 'J': // Unsigned 16-bit constant shifted left 16 bits 615 // (use `L' instead for SImode constants) 616 case 'K': // Unsigned 16-bit constant 617 case 'L': // Signed 16-bit constant shifted left 16 bits 618 case 'M': // Constant larger than 31 619 case 'N': // Exact power of 2 620 case 'P': // Constant whose negation is a signed 16-bit constant 621 case 'G': // Floating point constant that can be loaded into a 622 // register with one instruction per word 623 case 'H': // Integer/Floating point constant that can be loaded 624 // into a register using three instructions 625 break; 626 case 'm': // Memory operand. Note that on PowerPC targets, m can 627 // include addresses that update the base register. It 628 // is therefore only safe to use `m' in an asm statement 629 // if that asm statement accesses the operand exactly once. 630 // The asm statement must also use `%U<opno>' as a 631 // placeholder for the "update" flag in the corresponding 632 // load or store instruction. For example: 633 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 634 // is correct but: 635 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 636 // is not. Use es rather than m if you don't want the base 637 // register to be updated. 638 case 'e': 639 if (Name[1] != 's') 640 return false; 641 // es: A "stable" memory operand; that is, one which does not 642 // include any automodification of the base register. Unlike 643 // `m', this constraint can be used in asm statements that 644 // might access the operand several times, or that might not 645 // access it at all. 646 Info.setAllowsMemory(); 647 Name++; // Skip over 'e'. 648 break; 649 case 'Q': // Memory operand that is an offset from a register (it is 650 // usually better to use `m' or `es' in asm statements) 651 case 'Z': // Memory operand that is an indexed or indirect from a 652 // register (it is usually better to use `m' or `es' in 653 // asm statements) 654 Info.setAllowsMemory(); 655 Info.setAllowsRegister(); 656 break; 657 case 'R': // AIX TOC entry 658 case 'a': // Address operand that is an indexed or indirect from a 659 // register (`p' is preferable for asm statements) 660 case 'S': // Constant suitable as a 64-bit mask operand 661 case 'T': // Constant suitable as a 32-bit mask operand 662 case 'U': // System V Release 4 small data area reference 663 case 't': // AND masks that can be performed by two rldic{l, r} 664 // instructions 665 case 'W': // Vector constant that does not require memory 666 case 'j': // Vector constant that is all zeros. 667 break; 668 // End FIXME. 669 } 670 return true; 671 } 672 virtual const char *getClobbers() const { 673 return ""; 674 } 675 }; 676 677 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 678 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 679 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 680 ALL_LANGUAGES }, 681 #include "clang/Basic/BuiltinsPPC.def" 682 }; 683 684 685 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 686 /// #defines that are not tied to a specific subtarget. 687 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 688 MacroBuilder &Builder) const { 689 // Target identification. 690 Builder.defineMacro("__ppc__"); 691 Builder.defineMacro("_ARCH_PPC"); 692 Builder.defineMacro("__powerpc__"); 693 Builder.defineMacro("__POWERPC__"); 694 if (PointerWidth == 64) { 695 Builder.defineMacro("_ARCH_PPC64"); 696 Builder.defineMacro("_LP64"); 697 Builder.defineMacro("__LP64__"); 698 Builder.defineMacro("__powerpc64__"); 699 Builder.defineMacro("__ppc64__"); 700 } else { 701 Builder.defineMacro("__ppc__"); 702 } 703 704 // Target properties. 705 if (getTriple().getOS() != llvm::Triple::NetBSD) 706 Builder.defineMacro("_BIG_ENDIAN"); 707 Builder.defineMacro("__BIG_ENDIAN__"); 708 709 // Subtarget options. 710 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 711 Builder.defineMacro("__REGISTER_PREFIX__", ""); 712 713 // FIXME: Should be controlled by command line option. 714 Builder.defineMacro("__LONG_DOUBLE_128__"); 715 716 if (Opts.AltiVec) { 717 Builder.defineMacro("__VEC__", "10206"); 718 Builder.defineMacro("__ALTIVEC__"); 719 } 720 } 721 722 723 const char * const PPCTargetInfo::GCCRegNames[] = { 724 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 725 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 726 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 727 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 728 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 729 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 730 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 731 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 732 "mq", "lr", "ctr", "ap", 733 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 734 "xer", 735 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 736 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 737 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 738 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 739 "vrsave", "vscr", 740 "spe_acc", "spefscr", 741 "sfp" 742 }; 743 744 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 745 unsigned &NumNames) const { 746 Names = GCCRegNames; 747 NumNames = llvm::array_lengthof(GCCRegNames); 748 } 749 750 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 751 // While some of these aliases do map to different registers 752 // they still share the same register name. 753 { { "0" }, "r0" }, 754 { { "1"}, "r1" }, 755 { { "2" }, "r2" }, 756 { { "3" }, "r3" }, 757 { { "4" }, "r4" }, 758 { { "5" }, "r5" }, 759 { { "6" }, "r6" }, 760 { { "7" }, "r7" }, 761 { { "8" }, "r8" }, 762 { { "9" }, "r9" }, 763 { { "10" }, "r10" }, 764 { { "11" }, "r11" }, 765 { { "12" }, "r12" }, 766 { { "13" }, "r13" }, 767 { { "14" }, "r14" }, 768 { { "15" }, "r15" }, 769 { { "16" }, "r16" }, 770 { { "17" }, "r17" }, 771 { { "18" }, "r18" }, 772 { { "19" }, "r19" }, 773 { { "20" }, "r20" }, 774 { { "21" }, "r21" }, 775 { { "22" }, "r22" }, 776 { { "23" }, "r23" }, 777 { { "24" }, "r24" }, 778 { { "25" }, "r25" }, 779 { { "26" }, "r26" }, 780 { { "27" }, "r27" }, 781 { { "28" }, "r28" }, 782 { { "29" }, "r29" }, 783 { { "30" }, "r30" }, 784 { { "31" }, "r31" }, 785 { { "fr0" }, "f0" }, 786 { { "fr1" }, "f1" }, 787 { { "fr2" }, "f2" }, 788 { { "fr3" }, "f3" }, 789 { { "fr4" }, "f4" }, 790 { { "fr5" }, "f5" }, 791 { { "fr6" }, "f6" }, 792 { { "fr7" }, "f7" }, 793 { { "fr8" }, "f8" }, 794 { { "fr9" }, "f9" }, 795 { { "fr10" }, "f10" }, 796 { { "fr11" }, "f11" }, 797 { { "fr12" }, "f12" }, 798 { { "fr13" }, "f13" }, 799 { { "fr14" }, "f14" }, 800 { { "fr15" }, "f15" }, 801 { { "fr16" }, "f16" }, 802 { { "fr17" }, "f17" }, 803 { { "fr18" }, "f18" }, 804 { { "fr19" }, "f19" }, 805 { { "fr20" }, "f20" }, 806 { { "fr21" }, "f21" }, 807 { { "fr22" }, "f22" }, 808 { { "fr23" }, "f23" }, 809 { { "fr24" }, "f24" }, 810 { { "fr25" }, "f25" }, 811 { { "fr26" }, "f26" }, 812 { { "fr27" }, "f27" }, 813 { { "fr28" }, "f28" }, 814 { { "fr29" }, "f29" }, 815 { { "fr30" }, "f30" }, 816 { { "fr31" }, "f31" }, 817 { { "cc" }, "cr0" }, 818 }; 819 820 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 821 unsigned &NumAliases) const { 822 Aliases = GCCRegAliases; 823 NumAliases = llvm::array_lengthof(GCCRegAliases); 824 } 825 } // end anonymous namespace. 826 827 namespace { 828 class PPC32TargetInfo : public PPCTargetInfo { 829 public: 830 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 831 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 832 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 833 834 switch (getTriple().getOS()) { 835 case llvm::Triple::FreeBSD: 836 case llvm::Triple::NetBSD: 837 SizeType = UnsignedInt; 838 break; 839 default: 840 break; 841 } 842 } 843 844 virtual const char *getVAListDeclaration() const { 845 // This is the ELF definition, and is overridden by the Darwin sub-target 846 return "typedef struct __va_list_tag {" 847 " unsigned char gpr;" 848 " unsigned char fpr;" 849 " unsigned short reserved;" 850 " void* overflow_arg_area;" 851 " void* reg_save_area;" 852 "} __builtin_va_list[1];"; 853 } 854 }; 855 } // end anonymous namespace. 856 857 namespace { 858 class PPC64TargetInfo : public PPCTargetInfo { 859 public: 860 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 861 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 862 IntMaxType = SignedLong; 863 UIntMaxType = UnsignedLong; 864 Int64Type = SignedLong; 865 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 866 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 867 } 868 virtual const char *getVAListDeclaration() const { 869 return "typedef char* __builtin_va_list;"; 870 } 871 }; 872 } // end anonymous namespace. 873 874 875 namespace { 876 class DarwinPPC32TargetInfo : 877 public DarwinTargetInfo<PPC32TargetInfo> { 878 public: 879 DarwinPPC32TargetInfo(const std::string& triple) 880 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 881 HasAlignMac68kSupport = true; 882 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 883 SuitableAlign = 128; 884 } 885 virtual const char *getVAListDeclaration() const { 886 return "typedef char* __builtin_va_list;"; 887 } 888 }; 889 890 class DarwinPPC64TargetInfo : 891 public DarwinTargetInfo<PPC64TargetInfo> { 892 public: 893 DarwinPPC64TargetInfo(const std::string& triple) 894 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 895 HasAlignMac68kSupport = true; 896 SuitableAlign = 128; 897 } 898 }; 899 } // end anonymous namespace. 900 901 namespace { 902 static const unsigned PTXAddrSpaceMap[] = { 903 0, // opencl_global 904 4, // opencl_local 905 1 // opencl_constant 906 }; 907 class PTXTargetInfo : public TargetInfo { 908 static const char * const GCCRegNames[]; 909 static const Builtin::Info BuiltinInfo[]; 910 std::vector<llvm::StringRef> AvailableFeatures; 911 public: 912 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 913 BigEndian = false; 914 TLSSupported = false; 915 LongWidth = LongAlign = 64; 916 AddrSpaceMap = &PTXAddrSpaceMap; 917 // Define available target features 918 // These must be defined in sorted order! 919 AvailableFeatures.push_back("compute10"); 920 AvailableFeatures.push_back("compute11"); 921 AvailableFeatures.push_back("compute12"); 922 AvailableFeatures.push_back("compute13"); 923 AvailableFeatures.push_back("compute20"); 924 AvailableFeatures.push_back("double"); 925 AvailableFeatures.push_back("no-fma"); 926 AvailableFeatures.push_back("ptx20"); 927 AvailableFeatures.push_back("ptx21"); 928 AvailableFeatures.push_back("ptx22"); 929 AvailableFeatures.push_back("ptx23"); 930 AvailableFeatures.push_back("sm10"); 931 AvailableFeatures.push_back("sm11"); 932 AvailableFeatures.push_back("sm12"); 933 AvailableFeatures.push_back("sm13"); 934 AvailableFeatures.push_back("sm20"); 935 AvailableFeatures.push_back("sm21"); 936 AvailableFeatures.push_back("sm22"); 937 AvailableFeatures.push_back("sm23"); 938 } 939 virtual void getTargetDefines(const LangOptions &Opts, 940 MacroBuilder &Builder) const { 941 Builder.defineMacro("__PTX__"); 942 } 943 virtual void getTargetBuiltins(const Builtin::Info *&Records, 944 unsigned &NumRecords) const { 945 Records = BuiltinInfo; 946 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 947 } 948 949 virtual void getGCCRegNames(const char * const *&Names, 950 unsigned &NumNames) const; 951 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 952 unsigned &NumAliases) const { 953 // No aliases. 954 Aliases = 0; 955 NumAliases = 0; 956 } 957 virtual bool validateAsmConstraint(const char *&Name, 958 TargetInfo::ConstraintInfo &info) const { 959 // FIXME: implement 960 return true; 961 } 962 virtual const char *getClobbers() const { 963 // FIXME: Is this really right? 964 return ""; 965 } 966 virtual const char *getVAListDeclaration() const { 967 // FIXME: implement 968 return "typedef char* __builtin_va_list;"; 969 } 970 971 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 972 const std::string &Name, 973 bool Enabled) const; 974 }; 975 976 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 977 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 978 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 979 ALL_LANGUAGES }, 980 #include "clang/Basic/BuiltinsPTX.def" 981 }; 982 983 const char * const PTXTargetInfo::GCCRegNames[] = { 984 "r0" 985 }; 986 987 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 988 unsigned &NumNames) const { 989 Names = GCCRegNames; 990 NumNames = llvm::array_lengthof(GCCRegNames); 991 } 992 993 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 994 const std::string &Name, 995 bool Enabled) const { 996 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 997 Name)) { 998 Features[Name] = Enabled; 999 return true; 1000 } else { 1001 return false; 1002 } 1003 } 1004 1005 class PTX32TargetInfo : public PTXTargetInfo { 1006 public: 1007 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1008 PointerWidth = PointerAlign = 32; 1009 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1010 DescriptionString 1011 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1012 } 1013 }; 1014 1015 class PTX64TargetInfo : public PTXTargetInfo { 1016 public: 1017 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1018 PointerWidth = PointerAlign = 64; 1019 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1020 DescriptionString 1021 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1022 } 1023 }; 1024 } 1025 1026 namespace { 1027 // MBlaze abstract base class 1028 class MBlazeTargetInfo : public TargetInfo { 1029 static const char * const GCCRegNames[]; 1030 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1031 1032 public: 1033 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1034 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1035 } 1036 1037 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1038 unsigned &NumRecords) const { 1039 // FIXME: Implement. 1040 Records = 0; 1041 NumRecords = 0; 1042 } 1043 1044 virtual void getTargetDefines(const LangOptions &Opts, 1045 MacroBuilder &Builder) const; 1046 1047 virtual const char *getVAListDeclaration() const { 1048 return "typedef char* __builtin_va_list;"; 1049 } 1050 virtual const char *getTargetPrefix() const { 1051 return "mblaze"; 1052 } 1053 virtual void getGCCRegNames(const char * const *&Names, 1054 unsigned &NumNames) const; 1055 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1056 unsigned &NumAliases) const; 1057 virtual bool validateAsmConstraint(const char *&Name, 1058 TargetInfo::ConstraintInfo &Info) const { 1059 switch (*Name) { 1060 default: return false; 1061 case 'O': // Zero 1062 return true; 1063 case 'b': // Base register 1064 case 'f': // Floating point register 1065 Info.setAllowsRegister(); 1066 return true; 1067 } 1068 } 1069 virtual const char *getClobbers() const { 1070 return ""; 1071 } 1072 }; 1073 1074 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1075 /// #defines that are not tied to a specific subtarget. 1076 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1077 MacroBuilder &Builder) const { 1078 // Target identification. 1079 Builder.defineMacro("__microblaze__"); 1080 Builder.defineMacro("_ARCH_MICROBLAZE"); 1081 Builder.defineMacro("__MICROBLAZE__"); 1082 1083 // Target properties. 1084 Builder.defineMacro("_BIG_ENDIAN"); 1085 Builder.defineMacro("__BIG_ENDIAN__"); 1086 1087 // Subtarget options. 1088 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1089 } 1090 1091 1092 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1093 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1094 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1095 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1096 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1097 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1098 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1099 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1100 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1101 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1102 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1103 }; 1104 1105 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1106 unsigned &NumNames) const { 1107 Names = GCCRegNames; 1108 NumNames = llvm::array_lengthof(GCCRegNames); 1109 } 1110 1111 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1112 { {"f0"}, "r0" }, 1113 { {"f1"}, "r1" }, 1114 { {"f2"}, "r2" }, 1115 { {"f3"}, "r3" }, 1116 { {"f4"}, "r4" }, 1117 { {"f5"}, "r5" }, 1118 { {"f6"}, "r6" }, 1119 { {"f7"}, "r7" }, 1120 { {"f8"}, "r8" }, 1121 { {"f9"}, "r9" }, 1122 { {"f10"}, "r10" }, 1123 { {"f11"}, "r11" }, 1124 { {"f12"}, "r12" }, 1125 { {"f13"}, "r13" }, 1126 { {"f14"}, "r14" }, 1127 { {"f15"}, "r15" }, 1128 { {"f16"}, "r16" }, 1129 { {"f17"}, "r17" }, 1130 { {"f18"}, "r18" }, 1131 { {"f19"}, "r19" }, 1132 { {"f20"}, "r20" }, 1133 { {"f21"}, "r21" }, 1134 { {"f22"}, "r22" }, 1135 { {"f23"}, "r23" }, 1136 { {"f24"}, "r24" }, 1137 { {"f25"}, "r25" }, 1138 { {"f26"}, "r26" }, 1139 { {"f27"}, "r27" }, 1140 { {"f28"}, "r28" }, 1141 { {"f29"}, "r29" }, 1142 { {"f30"}, "r30" }, 1143 { {"f31"}, "r31" }, 1144 }; 1145 1146 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1147 unsigned &NumAliases) const { 1148 Aliases = GCCRegAliases; 1149 NumAliases = llvm::array_lengthof(GCCRegAliases); 1150 } 1151 } // end anonymous namespace. 1152 1153 namespace { 1154 // Namespace for x86 abstract base class 1155 const Builtin::Info BuiltinInfo[] = { 1156 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1157 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1158 ALL_LANGUAGES }, 1159 #include "clang/Basic/BuiltinsX86.def" 1160 }; 1161 1162 static const char* const GCCRegNames[] = { 1163 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1164 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1165 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1166 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1167 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1168 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1169 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1170 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1171 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1172 }; 1173 1174 const TargetInfo::AddlRegName AddlRegNames[] = { 1175 { { "al", "ah", "eax", "rax" }, 0 }, 1176 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1177 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1178 { { "dl", "dh", "edx", "rdx" }, 1 }, 1179 { { "esi", "rsi" }, 4 }, 1180 { { "edi", "rdi" }, 5 }, 1181 { { "esp", "rsp" }, 7 }, 1182 { { "ebp", "rbp" }, 6 }, 1183 }; 1184 1185 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1186 // most of the implementation can be shared. 1187 class X86TargetInfo : public TargetInfo { 1188 enum X86SSEEnum { 1189 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1190 } SSELevel; 1191 enum MMX3DNowEnum { 1192 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1193 } MMX3DNowLevel; 1194 1195 bool HasAES; 1196 bool HasAVX; 1197 bool HasAVX2; 1198 1199 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1200 /// 1201 /// Each enumeration represents a particular CPU supported by Clang. These 1202 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1203 enum CPUKind { 1204 CK_Generic, 1205 1206 /// \name i386 1207 /// i386-generation processors. 1208 //@{ 1209 CK_i386, 1210 //@} 1211 1212 /// \name i486 1213 /// i486-generation processors. 1214 //@{ 1215 CK_i486, 1216 CK_WinChipC6, 1217 CK_WinChip2, 1218 CK_C3, 1219 //@} 1220 1221 /// \name i586 1222 /// i586-generation processors, P5 microarchitecture based. 1223 //@{ 1224 CK_i586, 1225 CK_Pentium, 1226 CK_PentiumMMX, 1227 //@} 1228 1229 /// \name i686 1230 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1231 //@{ 1232 CK_i686, 1233 CK_PentiumPro, 1234 CK_Pentium2, 1235 CK_Pentium3, 1236 CK_Pentium3M, 1237 CK_PentiumM, 1238 CK_C3_2, 1239 1240 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1241 /// Clang however has some logic to suport this. 1242 // FIXME: Warn, deprecate, and potentially remove this. 1243 CK_Yonah, 1244 //@} 1245 1246 /// \name Netburst 1247 /// Netburst microarchitecture based processors. 1248 //@{ 1249 CK_Pentium4, 1250 CK_Pentium4M, 1251 CK_Prescott, 1252 CK_Nocona, 1253 //@} 1254 1255 /// \name Core 1256 /// Core microarchitecture based processors. 1257 //@{ 1258 CK_Core2, 1259 1260 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1261 /// codename which GCC no longer accepts as an option to -march, but Clang 1262 /// has some logic for recognizing it. 1263 // FIXME: Warn, deprecate, and potentially remove this. 1264 CK_Penryn, 1265 //@} 1266 1267 /// \name Atom 1268 /// Atom processors 1269 //@{ 1270 CK_Atom, 1271 //@} 1272 1273 /// \name Nehalem 1274 /// Nehalem microarchitecture based processors. 1275 //@{ 1276 CK_Corei7, 1277 CK_Corei7AVX, 1278 CK_CoreAVXi, 1279 CK_CoreAVX2, 1280 //@} 1281 1282 /// \name K6 1283 /// K6 architecture processors. 1284 //@{ 1285 CK_K6, 1286 CK_K6_2, 1287 CK_K6_3, 1288 //@} 1289 1290 /// \name K7 1291 /// K7 architecture processors. 1292 //@{ 1293 CK_Athlon, 1294 CK_AthlonThunderbird, 1295 CK_Athlon4, 1296 CK_AthlonXP, 1297 CK_AthlonMP, 1298 //@} 1299 1300 /// \name K8 1301 /// K8 architecture processors. 1302 //@{ 1303 CK_Athlon64, 1304 CK_Athlon64SSE3, 1305 CK_AthlonFX, 1306 CK_K8, 1307 CK_K8SSE3, 1308 CK_Opteron, 1309 CK_OpteronSSE3, 1310 CK_AMDFAM10, 1311 1312 /// \name K10 1313 /// K10 architecture processors. 1314 //@{ 1315 CK_BDVER1, 1316 CK_BDVER2, 1317 1318 /// This specification is deprecated and will be removed in the future. 1319 /// Users should prefer \see CK_K8. 1320 // FIXME: Warn on this when the CPU is set to it. 1321 CK_x86_64, 1322 //@} 1323 1324 /// \name Geode 1325 /// Geode processors. 1326 //@{ 1327 CK_Geode 1328 //@} 1329 } CPU; 1330 1331 public: 1332 X86TargetInfo(const std::string& triple) 1333 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1334 HasAES(false), HasAVX(false), HasAVX2(false), CPU(CK_Generic) { 1335 BigEndian = false; 1336 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1337 } 1338 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1339 unsigned &NumRecords) const { 1340 Records = BuiltinInfo; 1341 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1342 } 1343 virtual void getGCCRegNames(const char * const *&Names, 1344 unsigned &NumNames) const { 1345 Names = GCCRegNames; 1346 NumNames = llvm::array_lengthof(GCCRegNames); 1347 } 1348 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1349 unsigned &NumAliases) const { 1350 Aliases = 0; 1351 NumAliases = 0; 1352 } 1353 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1354 unsigned &NumNames) const { 1355 Names = AddlRegNames; 1356 NumNames = llvm::array_lengthof(AddlRegNames); 1357 } 1358 virtual bool validateAsmConstraint(const char *&Name, 1359 TargetInfo::ConstraintInfo &info) const; 1360 virtual std::string convertConstraint(const char *&Constraint) const; 1361 virtual const char *getClobbers() const { 1362 return "~{dirflag},~{fpsr},~{flags}"; 1363 } 1364 virtual void getTargetDefines(const LangOptions &Opts, 1365 MacroBuilder &Builder) const; 1366 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1367 const std::string &Name, 1368 bool Enabled) const; 1369 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1370 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1371 virtual const char* getABI() const { 1372 if (PointerWidth == 64 && HasAVX) 1373 return "avx"; 1374 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1375 return "no-mmx"; 1376 return ""; 1377 } 1378 virtual bool setCPU(const std::string &Name) { 1379 CPU = llvm::StringSwitch<CPUKind>(Name) 1380 .Case("i386", CK_i386) 1381 .Case("i486", CK_i486) 1382 .Case("winchip-c6", CK_WinChipC6) 1383 .Case("winchip2", CK_WinChip2) 1384 .Case("c3", CK_C3) 1385 .Case("i586", CK_i586) 1386 .Case("pentium", CK_Pentium) 1387 .Case("pentium-mmx", CK_PentiumMMX) 1388 .Case("i686", CK_i686) 1389 .Case("pentiumpro", CK_PentiumPro) 1390 .Case("pentium2", CK_Pentium2) 1391 .Case("pentium3", CK_Pentium3) 1392 .Case("pentium3m", CK_Pentium3M) 1393 .Case("pentium-m", CK_PentiumM) 1394 .Case("c3-2", CK_C3_2) 1395 .Case("yonah", CK_Yonah) 1396 .Case("pentium4", CK_Pentium4) 1397 .Case("pentium4m", CK_Pentium4M) 1398 .Case("prescott", CK_Prescott) 1399 .Case("nocona", CK_Nocona) 1400 .Case("core2", CK_Core2) 1401 .Case("penryn", CK_Penryn) 1402 .Case("atom", CK_Atom) 1403 .Case("corei7", CK_Corei7) 1404 .Case("corei7-avx", CK_Corei7AVX) 1405 .Case("core-avx-i", CK_CoreAVXi) 1406 .Case("core-avx2", CK_CoreAVX2) 1407 .Case("k6", CK_K6) 1408 .Case("k6-2", CK_K6_2) 1409 .Case("k6-3", CK_K6_3) 1410 .Case("athlon", CK_Athlon) 1411 .Case("athlon-tbird", CK_AthlonThunderbird) 1412 .Case("athlon-4", CK_Athlon4) 1413 .Case("athlon-xp", CK_AthlonXP) 1414 .Case("athlon-mp", CK_AthlonMP) 1415 .Case("athlon64", CK_Athlon64) 1416 .Case("athlon64-sse3", CK_Athlon64SSE3) 1417 .Case("athlon-fx", CK_AthlonFX) 1418 .Case("k8", CK_K8) 1419 .Case("k8-sse3", CK_K8SSE3) 1420 .Case("opteron", CK_Opteron) 1421 .Case("opteron-sse3", CK_OpteronSSE3) 1422 .Case("amdfam10", CK_AMDFAM10) 1423 .Case("bdver1", CK_BDVER1) 1424 .Case("bdver2", CK_BDVER2) 1425 .Case("x86-64", CK_x86_64) 1426 .Case("geode", CK_Geode) 1427 .Default(CK_Generic); 1428 1429 // Perform any per-CPU checks necessary to determine if this CPU is 1430 // acceptable. 1431 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1432 // invalid without explaining *why*. 1433 switch (CPU) { 1434 case CK_Generic: 1435 // No processor selected! 1436 return false; 1437 1438 case CK_i386: 1439 case CK_i486: 1440 case CK_WinChipC6: 1441 case CK_WinChip2: 1442 case CK_C3: 1443 case CK_i586: 1444 case CK_Pentium: 1445 case CK_PentiumMMX: 1446 case CK_i686: 1447 case CK_PentiumPro: 1448 case CK_Pentium2: 1449 case CK_Pentium3: 1450 case CK_Pentium3M: 1451 case CK_PentiumM: 1452 case CK_Yonah: 1453 case CK_C3_2: 1454 case CK_Pentium4: 1455 case CK_Pentium4M: 1456 case CK_Prescott: 1457 case CK_K6: 1458 case CK_K6_2: 1459 case CK_K6_3: 1460 case CK_Athlon: 1461 case CK_AthlonThunderbird: 1462 case CK_Athlon4: 1463 case CK_AthlonXP: 1464 case CK_AthlonMP: 1465 case CK_Geode: 1466 // Only accept certain architectures when compiling in 32-bit mode. 1467 if (PointerWidth != 32) 1468 return false; 1469 1470 // Fallthrough 1471 case CK_Nocona: 1472 case CK_Core2: 1473 case CK_Penryn: 1474 case CK_Atom: 1475 case CK_Corei7: 1476 case CK_Corei7AVX: 1477 case CK_CoreAVXi: 1478 case CK_CoreAVX2: 1479 case CK_Athlon64: 1480 case CK_Athlon64SSE3: 1481 case CK_AthlonFX: 1482 case CK_K8: 1483 case CK_K8SSE3: 1484 case CK_Opteron: 1485 case CK_OpteronSSE3: 1486 case CK_AMDFAM10: 1487 case CK_BDVER1: 1488 case CK_BDVER2: 1489 case CK_x86_64: 1490 return true; 1491 } 1492 llvm_unreachable("Unhandled CPU kind"); 1493 } 1494 }; 1495 1496 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1497 // FIXME: This should not be here. 1498 Features["3dnow"] = false; 1499 Features["3dnowa"] = false; 1500 Features["mmx"] = false; 1501 Features["sse"] = false; 1502 Features["sse2"] = false; 1503 Features["sse3"] = false; 1504 Features["ssse3"] = false; 1505 Features["sse41"] = false; 1506 Features["sse42"] = false; 1507 Features["sse4a"] = false; 1508 Features["aes"] = false; 1509 Features["avx"] = false; 1510 Features["avx2"] = false; 1511 1512 // FIXME: This *really* should not be here. 1513 1514 // X86_64 always has SSE2. 1515 if (PointerWidth == 64) 1516 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1517 1518 switch (CPU) { 1519 case CK_Generic: 1520 case CK_i386: 1521 case CK_i486: 1522 case CK_i586: 1523 case CK_Pentium: 1524 case CK_i686: 1525 case CK_PentiumPro: 1526 break; 1527 case CK_PentiumMMX: 1528 case CK_Pentium2: 1529 setFeatureEnabled(Features, "mmx", true); 1530 break; 1531 case CK_Pentium3: 1532 case CK_Pentium3M: 1533 setFeatureEnabled(Features, "mmx", true); 1534 setFeatureEnabled(Features, "sse", true); 1535 break; 1536 case CK_PentiumM: 1537 case CK_Pentium4: 1538 case CK_Pentium4M: 1539 case CK_x86_64: 1540 setFeatureEnabled(Features, "mmx", true); 1541 setFeatureEnabled(Features, "sse2", true); 1542 break; 1543 case CK_Yonah: 1544 case CK_Prescott: 1545 case CK_Nocona: 1546 setFeatureEnabled(Features, "mmx", true); 1547 setFeatureEnabled(Features, "sse3", true); 1548 break; 1549 case CK_Core2: 1550 setFeatureEnabled(Features, "mmx", true); 1551 setFeatureEnabled(Features, "ssse3", true); 1552 break; 1553 case CK_Penryn: 1554 setFeatureEnabled(Features, "mmx", true); 1555 setFeatureEnabled(Features, "sse4", true); 1556 Features["sse42"] = false; 1557 break; 1558 case CK_Atom: 1559 setFeatureEnabled(Features, "mmx", true); 1560 setFeatureEnabled(Features, "ssse3", true); 1561 break; 1562 case CK_Corei7: 1563 setFeatureEnabled(Features, "mmx", true); 1564 setFeatureEnabled(Features, "sse4", true); 1565 setFeatureEnabled(Features, "aes", true); 1566 break; 1567 case CK_Corei7AVX: 1568 case CK_CoreAVXi: 1569 setFeatureEnabled(Features, "mmx", true); 1570 setFeatureEnabled(Features, "sse4", true); 1571 setFeatureEnabled(Features, "aes", true); 1572 //setFeatureEnabled(Features, "avx", true); 1573 break; 1574 case CK_CoreAVX2: 1575 setFeatureEnabled(Features, "mmx", true); 1576 setFeatureEnabled(Features, "sse4", true); 1577 setFeatureEnabled(Features, "aes", true); 1578 //setFeatureEnabled(Features, "avx2", true); 1579 break; 1580 case CK_K6: 1581 case CK_WinChipC6: 1582 setFeatureEnabled(Features, "mmx", true); 1583 break; 1584 case CK_K6_2: 1585 case CK_K6_3: 1586 case CK_WinChip2: 1587 case CK_C3: 1588 setFeatureEnabled(Features, "3dnow", true); 1589 break; 1590 case CK_Athlon: 1591 case CK_AthlonThunderbird: 1592 case CK_Geode: 1593 setFeatureEnabled(Features, "3dnowa", true); 1594 break; 1595 case CK_Athlon4: 1596 case CK_AthlonXP: 1597 case CK_AthlonMP: 1598 setFeatureEnabled(Features, "sse", true); 1599 setFeatureEnabled(Features, "3dnowa", true); 1600 break; 1601 case CK_K8: 1602 case CK_Opteron: 1603 case CK_Athlon64: 1604 case CK_AthlonFX: 1605 setFeatureEnabled(Features, "sse2", true); 1606 setFeatureEnabled(Features, "3dnowa", true); 1607 break; 1608 case CK_K8SSE3: 1609 case CK_OpteronSSE3: 1610 case CK_Athlon64SSE3: 1611 setFeatureEnabled(Features, "sse3", true); 1612 setFeatureEnabled(Features, "3dnowa", true); 1613 break; 1614 case CK_AMDFAM10: 1615 setFeatureEnabled(Features, "sse3", true); 1616 setFeatureEnabled(Features, "sse4a", true); 1617 setFeatureEnabled(Features, "3dnowa", true); 1618 break; 1619 case CK_BDVER1: 1620 case CK_BDVER2: 1621 setFeatureEnabled(Features, "sse4", true); 1622 setFeatureEnabled(Features, "sse4a", true); 1623 setFeatureEnabled(Features, "aes", true); 1624 break; 1625 case CK_C3_2: 1626 setFeatureEnabled(Features, "mmx", true); 1627 setFeatureEnabled(Features, "sse", true); 1628 break; 1629 } 1630 } 1631 1632 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1633 const std::string &Name, 1634 bool Enabled) const { 1635 // FIXME: This *really* should not be here. We need some way of translating 1636 // options into llvm subtarget features. 1637 if (!Features.count(Name) && 1638 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1639 return false; 1640 1641 // FIXME: this should probably use a switch with fall through. 1642 1643 if (Enabled) { 1644 if (Name == "mmx") 1645 Features["mmx"] = true; 1646 else if (Name == "sse") 1647 Features["mmx"] = Features["sse"] = true; 1648 else if (Name == "sse2") 1649 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1650 else if (Name == "sse3") 1651 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1652 true; 1653 else if (Name == "ssse3") 1654 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1655 Features["ssse3"] = true; 1656 else if (Name == "sse4" || Name == "sse4.2") 1657 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1658 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1659 else if (Name == "sse4.1") 1660 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1661 Features["ssse3"] = Features["sse41"] = true; 1662 else if (Name == "3dnow") 1663 Features["mmx"] = Features["3dnow"] = true; 1664 else if (Name == "3dnowa") 1665 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1666 else if (Name == "aes") 1667 Features["aes"] = true; 1668 else if (Name == "avx") 1669 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1670 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1671 Features["avx"] = true; 1672 else if (Name == "avx2") 1673 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1674 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1675 Features["avx"] = Features["avx2"] = true; 1676 else if (Name == "sse4a") 1677 Features["mmx"] = Features["sse4a"] = true; 1678 } else { 1679 if (Name == "mmx") 1680 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1681 else if (Name == "sse") 1682 Features["sse"] = Features["sse2"] = Features["sse3"] = 1683 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1684 else if (Name == "sse2") 1685 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1686 Features["sse41"] = Features["sse42"] = false; 1687 else if (Name == "sse3") 1688 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1689 Features["sse42"] = false; 1690 else if (Name == "ssse3") 1691 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1692 else if (Name == "sse4" || Name == "sse4.1") 1693 Features["sse41"] = Features["sse42"] = false; 1694 else if (Name == "sse4.2") 1695 Features["sse42"] = false; 1696 else if (Name == "3dnow") 1697 Features["3dnow"] = Features["3dnowa"] = false; 1698 else if (Name == "3dnowa") 1699 Features["3dnowa"] = false; 1700 else if (Name == "aes") 1701 Features["aes"] = false; 1702 else if (Name == "avx") 1703 Features["avx"] = Features["avx2"] = false; 1704 else if (Name == "avx2") 1705 Features["avx2"] = false; 1706 else if (Name == "sse4a") 1707 Features["sse4a"] = false; 1708 } 1709 1710 return true; 1711 } 1712 1713 /// HandleTargetOptions - Perform initialization based on the user 1714 /// configured set of features. 1715 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1716 // Remember the maximum enabled sselevel. 1717 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1718 // Ignore disabled features. 1719 if (Features[i][0] == '-') 1720 continue; 1721 1722 if (Features[i].substr(1) == "aes") { 1723 HasAES = true; 1724 continue; 1725 } 1726 1727 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1728 // For now let it be enabled together with other SSE levels. 1729 if (Features[i].substr(1) == "avx2") { 1730 HasAVX = true; 1731 HasAVX2 = true; 1732 continue; 1733 } 1734 if (Features[i].substr(1) == "avx") { 1735 HasAVX = true; 1736 continue; 1737 } 1738 1739 assert(Features[i][0] == '+' && "Invalid target feature!"); 1740 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1741 .Case("sse42", SSE42) 1742 .Case("sse41", SSE41) 1743 .Case("ssse3", SSSE3) 1744 .Case("sse3", SSE3) 1745 .Case("sse2", SSE2) 1746 .Case("sse", SSE1) 1747 .Default(NoSSE); 1748 SSELevel = std::max(SSELevel, Level); 1749 1750 MMX3DNowEnum ThreeDNowLevel = 1751 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1752 .Case("3dnowa", AMD3DNowAthlon) 1753 .Case("3dnow", AMD3DNow) 1754 .Case("mmx", MMX) 1755 .Default(NoMMX3DNow); 1756 1757 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1758 } 1759 1760 // Don't tell the backend if we're turning off mmx; it will end up disabling 1761 // SSE, which we don't want. 1762 std::vector<std::string>::iterator it; 1763 it = std::find(Features.begin(), Features.end(), "-mmx"); 1764 if (it != Features.end()) 1765 Features.erase(it); 1766 } 1767 1768 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1769 /// definitions for this particular subtarget. 1770 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1771 MacroBuilder &Builder) const { 1772 // Target identification. 1773 if (PointerWidth == 64) { 1774 Builder.defineMacro("_LP64"); 1775 Builder.defineMacro("__LP64__"); 1776 Builder.defineMacro("__amd64__"); 1777 Builder.defineMacro("__amd64"); 1778 Builder.defineMacro("__x86_64"); 1779 Builder.defineMacro("__x86_64__"); 1780 } else { 1781 DefineStd(Builder, "i386", Opts); 1782 } 1783 1784 // Subtarget options. 1785 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1786 // truly should be based on -mtune options. 1787 switch (CPU) { 1788 case CK_Generic: 1789 break; 1790 case CK_i386: 1791 // The rest are coming from the i386 define above. 1792 Builder.defineMacro("__tune_i386__"); 1793 break; 1794 case CK_i486: 1795 case CK_WinChipC6: 1796 case CK_WinChip2: 1797 case CK_C3: 1798 Builder.defineMacro("__i486"); 1799 Builder.defineMacro("__i486__"); 1800 Builder.defineMacro("__tune_i486__"); 1801 break; 1802 case CK_PentiumMMX: 1803 Builder.defineMacro("__pentium_mmx__"); 1804 Builder.defineMacro("__tune_pentium_mmx__"); 1805 // Fallthrough 1806 case CK_i586: 1807 case CK_Pentium: 1808 Builder.defineMacro("__i586"); 1809 Builder.defineMacro("__i586__"); 1810 Builder.defineMacro("__tune_i586__"); 1811 Builder.defineMacro("__pentium"); 1812 Builder.defineMacro("__pentium__"); 1813 Builder.defineMacro("__tune_pentium__"); 1814 break; 1815 case CK_Pentium3: 1816 case CK_Pentium3M: 1817 case CK_PentiumM: 1818 Builder.defineMacro("__tune_pentium3__"); 1819 // Fallthrough 1820 case CK_Pentium2: 1821 case CK_C3_2: 1822 Builder.defineMacro("__tune_pentium2__"); 1823 // Fallthrough 1824 case CK_PentiumPro: 1825 Builder.defineMacro("__tune_i686__"); 1826 Builder.defineMacro("__tune_pentiumpro__"); 1827 // Fallthrough 1828 case CK_i686: 1829 Builder.defineMacro("__i686"); 1830 Builder.defineMacro("__i686__"); 1831 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1832 Builder.defineMacro("__pentiumpro"); 1833 Builder.defineMacro("__pentiumpro__"); 1834 break; 1835 case CK_Pentium4: 1836 case CK_Pentium4M: 1837 Builder.defineMacro("__pentium4"); 1838 Builder.defineMacro("__pentium4__"); 1839 Builder.defineMacro("__tune_pentium4__"); 1840 break; 1841 case CK_Yonah: 1842 case CK_Prescott: 1843 case CK_Nocona: 1844 Builder.defineMacro("__nocona"); 1845 Builder.defineMacro("__nocona__"); 1846 Builder.defineMacro("__tune_nocona__"); 1847 break; 1848 case CK_Core2: 1849 case CK_Penryn: 1850 Builder.defineMacro("__core2"); 1851 Builder.defineMacro("__core2__"); 1852 Builder.defineMacro("__tune_core2__"); 1853 break; 1854 case CK_Atom: 1855 Builder.defineMacro("__atom"); 1856 Builder.defineMacro("__atom__"); 1857 Builder.defineMacro("__tune_atom__"); 1858 break; 1859 case CK_Corei7: 1860 case CK_Corei7AVX: 1861 case CK_CoreAVXi: 1862 case CK_CoreAVX2: 1863 Builder.defineMacro("__corei7"); 1864 Builder.defineMacro("__corei7__"); 1865 Builder.defineMacro("__tune_corei7__"); 1866 break; 1867 case CK_K6_2: 1868 Builder.defineMacro("__k6_2__"); 1869 Builder.defineMacro("__tune_k6_2__"); 1870 // Fallthrough 1871 case CK_K6_3: 1872 if (CPU != CK_K6_2) { // In case of fallthrough 1873 // FIXME: GCC may be enabling these in cases where some other k6 1874 // architecture is specified but -m3dnow is explicitly provided. The 1875 // exact semantics need to be determined and emulated here. 1876 Builder.defineMacro("__k6_3__"); 1877 Builder.defineMacro("__tune_k6_3__"); 1878 } 1879 // Fallthrough 1880 case CK_K6: 1881 Builder.defineMacro("__k6"); 1882 Builder.defineMacro("__k6__"); 1883 Builder.defineMacro("__tune_k6__"); 1884 break; 1885 case CK_Athlon: 1886 case CK_AthlonThunderbird: 1887 case CK_Athlon4: 1888 case CK_AthlonXP: 1889 case CK_AthlonMP: 1890 Builder.defineMacro("__athlon"); 1891 Builder.defineMacro("__athlon__"); 1892 Builder.defineMacro("__tune_athlon__"); 1893 if (SSELevel != NoSSE) { 1894 Builder.defineMacro("__athlon_sse__"); 1895 Builder.defineMacro("__tune_athlon_sse__"); 1896 } 1897 break; 1898 case CK_K8: 1899 case CK_K8SSE3: 1900 case CK_x86_64: 1901 case CK_Opteron: 1902 case CK_OpteronSSE3: 1903 case CK_Athlon64: 1904 case CK_Athlon64SSE3: 1905 case CK_AthlonFX: 1906 Builder.defineMacro("__k8"); 1907 Builder.defineMacro("__k8__"); 1908 Builder.defineMacro("__tune_k8__"); 1909 break; 1910 case CK_AMDFAM10: 1911 Builder.defineMacro("__amdfam10"); 1912 Builder.defineMacro("__amdfam10__"); 1913 Builder.defineMacro("__tune_amdfam10__"); 1914 break; 1915 case CK_BDVER1: 1916 Builder.defineMacro("__bdver1"); 1917 Builder.defineMacro("__bdver1__"); 1918 Builder.defineMacro("__tune__bdver1__"); 1919 break; 1920 case CK_BDVER2: 1921 Builder.defineMacro("__bdver2"); 1922 Builder.defineMacro("__bdver2__"); 1923 Builder.defineMacro("__tune__bdver2__"); 1924 break; 1925 case CK_Geode: 1926 Builder.defineMacro("__geode"); 1927 Builder.defineMacro("__geode__"); 1928 Builder.defineMacro("__tune_geode__"); 1929 break; 1930 } 1931 1932 // Target properties. 1933 Builder.defineMacro("__LITTLE_ENDIAN__"); 1934 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1935 1936 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1937 // functions in glibc header files that use FP Stack inline asm which the 1938 // backend can't deal with (PR879). 1939 Builder.defineMacro("__NO_MATH_INLINES"); 1940 1941 if (HasAES) 1942 Builder.defineMacro("__AES__"); 1943 1944 if (HasAVX) 1945 Builder.defineMacro("__AVX__"); 1946 if (HasAVX2) 1947 Builder.defineMacro("__AVX2__"); 1948 1949 // Each case falls through to the previous one here. 1950 switch (SSELevel) { 1951 case SSE42: 1952 Builder.defineMacro("__SSE4_2__"); 1953 case SSE41: 1954 Builder.defineMacro("__SSE4_1__"); 1955 case SSSE3: 1956 Builder.defineMacro("__SSSE3__"); 1957 case SSE3: 1958 Builder.defineMacro("__SSE3__"); 1959 case SSE2: 1960 Builder.defineMacro("__SSE2__"); 1961 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1962 case SSE1: 1963 Builder.defineMacro("__SSE__"); 1964 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1965 case NoSSE: 1966 break; 1967 } 1968 1969 if (Opts.MicrosoftExt && PointerWidth == 32) { 1970 switch (SSELevel) { 1971 case SSE42: 1972 case SSE41: 1973 case SSSE3: 1974 case SSE3: 1975 case SSE2: 1976 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1977 break; 1978 case SSE1: 1979 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1980 break; 1981 default: 1982 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1983 } 1984 } 1985 1986 // Each case falls through to the previous one here. 1987 switch (MMX3DNowLevel) { 1988 case AMD3DNowAthlon: 1989 Builder.defineMacro("__3dNOW_A__"); 1990 case AMD3DNow: 1991 Builder.defineMacro("__3dNOW__"); 1992 case MMX: 1993 Builder.defineMacro("__MMX__"); 1994 case NoMMX3DNow: 1995 break; 1996 } 1997 } 1998 1999 2000 bool 2001 X86TargetInfo::validateAsmConstraint(const char *&Name, 2002 TargetInfo::ConstraintInfo &Info) const { 2003 switch (*Name) { 2004 default: return false; 2005 case 'Y': // first letter of a pair: 2006 switch (*(Name+1)) { 2007 default: return false; 2008 case '0': // First SSE register. 2009 case 't': // Any SSE register, when SSE2 is enabled. 2010 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2011 case 'm': // any MMX register, when inter-unit moves enabled. 2012 break; // falls through to setAllowsRegister. 2013 } 2014 case 'a': // eax. 2015 case 'b': // ebx. 2016 case 'c': // ecx. 2017 case 'd': // edx. 2018 case 'S': // esi. 2019 case 'D': // edi. 2020 case 'A': // edx:eax. 2021 case 'f': // any x87 floating point stack register. 2022 case 't': // top of floating point stack. 2023 case 'u': // second from top of floating point stack. 2024 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2025 case 'y': // Any MMX register. 2026 case 'x': // Any SSE register. 2027 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2028 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2029 case 'l': // "Index" registers: any general register that can be used as an 2030 // index in a base+index memory access. 2031 Info.setAllowsRegister(); 2032 return true; 2033 case 'C': // SSE floating point constant. 2034 case 'G': // x87 floating point constant. 2035 case 'e': // 32-bit signed integer constant for use with zero-extending 2036 // x86_64 instructions. 2037 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2038 // x86_64 instructions. 2039 return true; 2040 } 2041 return false; 2042 } 2043 2044 2045 std::string 2046 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2047 switch (*Constraint) { 2048 case 'a': return std::string("{ax}"); 2049 case 'b': return std::string("{bx}"); 2050 case 'c': return std::string("{cx}"); 2051 case 'd': return std::string("{dx}"); 2052 case 'S': return std::string("{si}"); 2053 case 'D': return std::string("{di}"); 2054 case 'p': // address 2055 return std::string("im"); 2056 case 't': // top of floating point stack. 2057 return std::string("{st}"); 2058 case 'u': // second from top of floating point stack. 2059 return std::string("{st(1)}"); // second from top of floating point stack. 2060 default: 2061 return std::string(1, *Constraint); 2062 } 2063 } 2064 } // end anonymous namespace 2065 2066 namespace { 2067 // X86-32 generic target 2068 class X86_32TargetInfo : public X86TargetInfo { 2069 public: 2070 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2071 DoubleAlign = LongLongAlign = 32; 2072 LongDoubleWidth = 96; 2073 LongDoubleAlign = 32; 2074 SuitableAlign = 128; 2075 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2076 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2077 "a0:0:64-f80:32:32-n8:16:32-S128"; 2078 SizeType = UnsignedInt; 2079 PtrDiffType = SignedInt; 2080 IntPtrType = SignedInt; 2081 RegParmMax = 3; 2082 2083 // Use fpret for all types. 2084 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2085 (1 << TargetInfo::Double) | 2086 (1 << TargetInfo::LongDouble)); 2087 2088 // x86-32 has atomics up to 8 bytes 2089 // FIXME: Check that we actually have cmpxchg8b before setting 2090 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2091 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2092 } 2093 virtual const char *getVAListDeclaration() const { 2094 return "typedef char* __builtin_va_list;"; 2095 } 2096 2097 int getEHDataRegisterNumber(unsigned RegNo) const { 2098 if (RegNo == 0) return 0; 2099 if (RegNo == 1) return 2; 2100 return -1; 2101 } 2102 }; 2103 } // end anonymous namespace 2104 2105 namespace { 2106 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2107 public: 2108 OpenBSDI386TargetInfo(const std::string& triple) : 2109 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2110 SizeType = UnsignedLong; 2111 IntPtrType = SignedLong; 2112 PtrDiffType = SignedLong; 2113 } 2114 }; 2115 } // end anonymous namespace 2116 2117 namespace { 2118 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2119 public: 2120 DarwinI386TargetInfo(const std::string& triple) : 2121 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2122 LongDoubleWidth = 128; 2123 LongDoubleAlign = 128; 2124 SuitableAlign = 128; 2125 SizeType = UnsignedLong; 2126 IntPtrType = SignedLong; 2127 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2128 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2129 "a0:0:64-f80:128:128-n8:16:32-S128"; 2130 HasAlignMac68kSupport = true; 2131 } 2132 2133 }; 2134 } // end anonymous namespace 2135 2136 namespace { 2137 // x86-32 Windows target 2138 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2139 public: 2140 WindowsX86_32TargetInfo(const std::string& triple) 2141 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2142 TLSSupported = false; 2143 WCharType = UnsignedShort; 2144 DoubleAlign = LongLongAlign = 64; 2145 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2146 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2147 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2148 } 2149 virtual void getTargetDefines(const LangOptions &Opts, 2150 MacroBuilder &Builder) const { 2151 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2152 } 2153 }; 2154 } // end anonymous namespace 2155 2156 namespace { 2157 2158 // x86-32 Windows Visual Studio target 2159 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2160 public: 2161 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2162 : WindowsX86_32TargetInfo(triple) { 2163 LongDoubleWidth = LongDoubleAlign = 64; 2164 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2165 } 2166 virtual void getTargetDefines(const LangOptions &Opts, 2167 MacroBuilder &Builder) const { 2168 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2169 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2170 // The value of the following reflects processor type. 2171 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2172 // We lost the original triple, so we use the default. 2173 Builder.defineMacro("_M_IX86", "600"); 2174 } 2175 }; 2176 } // end anonymous namespace 2177 2178 namespace { 2179 // x86-32 MinGW target 2180 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2181 public: 2182 MinGWX86_32TargetInfo(const std::string& triple) 2183 : WindowsX86_32TargetInfo(triple) { 2184 } 2185 virtual void getTargetDefines(const LangOptions &Opts, 2186 MacroBuilder &Builder) const { 2187 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2188 DefineStd(Builder, "WIN32", Opts); 2189 DefineStd(Builder, "WINNT", Opts); 2190 Builder.defineMacro("_X86_"); 2191 Builder.defineMacro("__MSVCRT__"); 2192 Builder.defineMacro("__MINGW32__"); 2193 2194 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2195 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2196 if (Opts.MicrosoftExt) 2197 // Provide "as-is" __declspec. 2198 Builder.defineMacro("__declspec", "__declspec"); 2199 else 2200 // Provide alias of __attribute__ like mingw32-gcc. 2201 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2202 } 2203 }; 2204 } // end anonymous namespace 2205 2206 namespace { 2207 // x86-32 Cygwin target 2208 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2209 public: 2210 CygwinX86_32TargetInfo(const std::string& triple) 2211 : X86_32TargetInfo(triple) { 2212 TLSSupported = false; 2213 WCharType = UnsignedShort; 2214 DoubleAlign = LongLongAlign = 64; 2215 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2216 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2217 "a0:0:64-f80:32:32-n8:16:32-S32"; 2218 } 2219 virtual void getTargetDefines(const LangOptions &Opts, 2220 MacroBuilder &Builder) const { 2221 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2222 Builder.defineMacro("__CYGWIN__"); 2223 Builder.defineMacro("__CYGWIN32__"); 2224 DefineStd(Builder, "unix", Opts); 2225 if (Opts.CPlusPlus) 2226 Builder.defineMacro("_GNU_SOURCE"); 2227 } 2228 }; 2229 } // end anonymous namespace 2230 2231 namespace { 2232 // x86-32 Haiku target 2233 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2234 public: 2235 HaikuX86_32TargetInfo(const std::string& triple) 2236 : X86_32TargetInfo(triple) { 2237 SizeType = UnsignedLong; 2238 IntPtrType = SignedLong; 2239 PtrDiffType = SignedLong; 2240 this->UserLabelPrefix = ""; 2241 } 2242 virtual void getTargetDefines(const LangOptions &Opts, 2243 MacroBuilder &Builder) const { 2244 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2245 Builder.defineMacro("__INTEL__"); 2246 Builder.defineMacro("__HAIKU__"); 2247 } 2248 }; 2249 } // end anonymous namespace 2250 2251 // RTEMS Target 2252 template<typename Target> 2253 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2254 protected: 2255 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2256 MacroBuilder &Builder) const { 2257 // RTEMS defines; list based off of gcc output 2258 2259 Builder.defineMacro("__rtems__"); 2260 Builder.defineMacro("__ELF__"); 2261 } 2262 public: 2263 RTEMSTargetInfo(const std::string &triple) 2264 : OSTargetInfo<Target>(triple) { 2265 this->UserLabelPrefix = ""; 2266 2267 llvm::Triple Triple(triple); 2268 switch (Triple.getArch()) { 2269 default: 2270 case llvm::Triple::x86: 2271 // this->MCountName = ".mcount"; 2272 break; 2273 case llvm::Triple::mips: 2274 case llvm::Triple::mipsel: 2275 case llvm::Triple::ppc: 2276 case llvm::Triple::ppc64: 2277 // this->MCountName = "_mcount"; 2278 break; 2279 case llvm::Triple::arm: 2280 // this->MCountName = "__mcount"; 2281 break; 2282 } 2283 2284 } 2285 }; 2286 2287 namespace { 2288 // x86-32 RTEMS target 2289 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2290 public: 2291 RTEMSX86_32TargetInfo(const std::string& triple) 2292 : X86_32TargetInfo(triple) { 2293 SizeType = UnsignedLong; 2294 IntPtrType = SignedLong; 2295 PtrDiffType = SignedLong; 2296 this->UserLabelPrefix = ""; 2297 } 2298 virtual void getTargetDefines(const LangOptions &Opts, 2299 MacroBuilder &Builder) const { 2300 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2301 Builder.defineMacro("__INTEL__"); 2302 Builder.defineMacro("__rtems__"); 2303 } 2304 }; 2305 } // end anonymous namespace 2306 2307 namespace { 2308 // x86-64 generic target 2309 class X86_64TargetInfo : public X86TargetInfo { 2310 public: 2311 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2312 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2313 LongDoubleWidth = 128; 2314 LongDoubleAlign = 128; 2315 LargeArrayMinWidth = 128; 2316 LargeArrayAlign = 128; 2317 SuitableAlign = 128; 2318 IntMaxType = SignedLong; 2319 UIntMaxType = UnsignedLong; 2320 Int64Type = SignedLong; 2321 RegParmMax = 6; 2322 2323 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2324 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2325 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2326 2327 // Use fpret only for long double. 2328 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2329 2330 // Use fp2ret for _Complex long double. 2331 ComplexLongDoubleUsesFP2Ret = true; 2332 2333 // x86-64 has atomics up to 16 bytes. 2334 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2335 // on CPUs with cmpxchg16b 2336 MaxAtomicPromoteWidth = 128; 2337 MaxAtomicInlineWidth = 64; 2338 } 2339 virtual const char *getVAListDeclaration() const { 2340 return "typedef struct __va_list_tag {" 2341 " unsigned gp_offset;" 2342 " unsigned fp_offset;" 2343 " void* overflow_arg_area;" 2344 " void* reg_save_area;" 2345 "} __va_list_tag;" 2346 "typedef __va_list_tag __builtin_va_list[1];"; 2347 } 2348 2349 int getEHDataRegisterNumber(unsigned RegNo) const { 2350 if (RegNo == 0) return 0; 2351 if (RegNo == 1) return 1; 2352 return -1; 2353 } 2354 }; 2355 } // end anonymous namespace 2356 2357 namespace { 2358 // x86-64 Windows target 2359 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2360 public: 2361 WindowsX86_64TargetInfo(const std::string& triple) 2362 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2363 TLSSupported = false; 2364 WCharType = UnsignedShort; 2365 LongWidth = LongAlign = 32; 2366 DoubleAlign = LongLongAlign = 64; 2367 IntMaxType = SignedLongLong; 2368 UIntMaxType = UnsignedLongLong; 2369 Int64Type = SignedLongLong; 2370 SizeType = UnsignedLongLong; 2371 PtrDiffType = SignedLongLong; 2372 IntPtrType = SignedLongLong; 2373 this->UserLabelPrefix = ""; 2374 } 2375 virtual void getTargetDefines(const LangOptions &Opts, 2376 MacroBuilder &Builder) const { 2377 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2378 Builder.defineMacro("_WIN64"); 2379 } 2380 virtual const char *getVAListDeclaration() const { 2381 return "typedef char* __builtin_va_list;"; 2382 } 2383 }; 2384 } // end anonymous namespace 2385 2386 namespace { 2387 // x86-64 Windows Visual Studio target 2388 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2389 public: 2390 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2391 : WindowsX86_64TargetInfo(triple) { 2392 LongDoubleWidth = LongDoubleAlign = 64; 2393 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2394 } 2395 virtual void getTargetDefines(const LangOptions &Opts, 2396 MacroBuilder &Builder) const { 2397 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2398 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2399 Builder.defineMacro("_M_X64"); 2400 Builder.defineMacro("_M_AMD64"); 2401 } 2402 }; 2403 } // end anonymous namespace 2404 2405 namespace { 2406 // x86-64 MinGW target 2407 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2408 public: 2409 MinGWX86_64TargetInfo(const std::string& triple) 2410 : WindowsX86_64TargetInfo(triple) { 2411 } 2412 virtual void getTargetDefines(const LangOptions &Opts, 2413 MacroBuilder &Builder) const { 2414 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2415 DefineStd(Builder, "WIN64", Opts); 2416 Builder.defineMacro("__MSVCRT__"); 2417 Builder.defineMacro("__MINGW32__"); 2418 Builder.defineMacro("__MINGW64__"); 2419 2420 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2421 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2422 if (Opts.MicrosoftExt) 2423 // Provide "as-is" __declspec. 2424 Builder.defineMacro("__declspec", "__declspec"); 2425 else 2426 // Provide alias of __attribute__ like mingw32-gcc. 2427 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2428 } 2429 }; 2430 } // end anonymous namespace 2431 2432 namespace { 2433 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2434 public: 2435 DarwinX86_64TargetInfo(const std::string& triple) 2436 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2437 Int64Type = SignedLongLong; 2438 } 2439 }; 2440 } // end anonymous namespace 2441 2442 namespace { 2443 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2444 public: 2445 OpenBSDX86_64TargetInfo(const std::string& triple) 2446 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2447 IntMaxType = SignedLongLong; 2448 UIntMaxType = UnsignedLongLong; 2449 Int64Type = SignedLongLong; 2450 } 2451 }; 2452 } // end anonymous namespace 2453 2454 namespace { 2455 class ARMTargetInfo : public TargetInfo { 2456 // Possible FPU choices. 2457 enum FPUMode { 2458 NoFPU, 2459 VFP2FPU, 2460 VFP3FPU, 2461 NeonFPU 2462 }; 2463 2464 static bool FPUModeIsVFP(FPUMode Mode) { 2465 return Mode >= VFP2FPU && Mode <= NeonFPU; 2466 } 2467 2468 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2469 static const char * const GCCRegNames[]; 2470 2471 std::string ABI, CPU; 2472 2473 unsigned FPU : 3; 2474 2475 unsigned IsThumb : 1; 2476 2477 // Initialized via features. 2478 unsigned SoftFloat : 1; 2479 unsigned SoftFloatABI : 1; 2480 2481 static const Builtin::Info BuiltinInfo[]; 2482 2483 public: 2484 ARMTargetInfo(const std::string &TripleStr) 2485 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2486 { 2487 BigEndian = false; 2488 SizeType = UnsignedInt; 2489 PtrDiffType = SignedInt; 2490 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2491 WCharType = UnsignedInt; 2492 2493 // {} in inline assembly are neon specifiers, not assembly variant 2494 // specifiers. 2495 NoAsmVariants = true; 2496 2497 // FIXME: Should we just treat this as a feature? 2498 IsThumb = getTriple().getArchName().startswith("thumb"); 2499 if (IsThumb) { 2500 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2501 // so set preferred for small types to 32. 2502 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2503 "i64:64:64-f32:32:32-f64:64:64-" 2504 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2505 } else { 2506 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2507 "i64:64:64-f32:32:32-f64:64:64-" 2508 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2509 } 2510 2511 // ARM targets default to using the ARM C++ ABI. 2512 CXXABI = CXXABI_ARM; 2513 2514 // ARM has atomics up to 8 bytes 2515 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2516 MaxAtomicPromoteWidth = 64; 2517 } 2518 virtual const char *getABI() const { return ABI.c_str(); } 2519 virtual bool setABI(const std::string &Name) { 2520 ABI = Name; 2521 2522 // The defaults (above) are for AAPCS, check if we need to change them. 2523 // 2524 // FIXME: We need support for -meabi... we could just mangle it into the 2525 // name. 2526 if (Name == "apcs-gnu") { 2527 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2528 SizeType = UnsignedLong; 2529 2530 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2531 WCharType = SignedInt; 2532 2533 // Do not respect the alignment of bit-field types when laying out 2534 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2535 UseBitFieldTypeAlignment = false; 2536 2537 /// Do force alignment of members that follow zero length bitfields. If 2538 /// the alignment of the zero-length bitfield is greater than the member 2539 /// that follows it, `bar', `bar' will be aligned as the type of the 2540 /// zero length bitfield. 2541 UseZeroLengthBitfieldAlignment = true; 2542 2543 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2544 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2545 /// gcc. 2546 ZeroLengthBitfieldBoundary = 32; 2547 2548 if (IsThumb) { 2549 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2550 // so set preferred for small types to 32. 2551 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2552 "i64:32:64-f32:32:32-f64:32:64-" 2553 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2554 } else { 2555 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2556 "i64:32:64-f32:32:32-f64:32:64-" 2557 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2558 } 2559 2560 // FIXME: Override "preferred align" for double and long long. 2561 } else if (Name == "aapcs") { 2562 // FIXME: Enumerated types are variable width in straight AAPCS. 2563 } else if (Name == "aapcs-linux") { 2564 ; 2565 } else 2566 return false; 2567 2568 return true; 2569 } 2570 2571 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2572 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2573 Features["vfp2"] = true; 2574 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2575 Features["neon"] = true; 2576 } 2577 2578 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2579 const std::string &Name, 2580 bool Enabled) const { 2581 if (Name == "soft-float" || Name == "soft-float-abi" || 2582 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2583 Features[Name] = Enabled; 2584 } else 2585 return false; 2586 2587 return true; 2588 } 2589 2590 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2591 FPU = NoFPU; 2592 SoftFloat = SoftFloatABI = false; 2593 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2594 if (Features[i] == "+soft-float") 2595 SoftFloat = true; 2596 else if (Features[i] == "+soft-float-abi") 2597 SoftFloatABI = true; 2598 else if (Features[i] == "+vfp2") 2599 FPU = VFP2FPU; 2600 else if (Features[i] == "+vfp3") 2601 FPU = VFP3FPU; 2602 else if (Features[i] == "+neon") 2603 FPU = NeonFPU; 2604 } 2605 2606 // Remove front-end specific options which the backend handles differently. 2607 std::vector<std::string>::iterator it; 2608 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2609 if (it != Features.end()) 2610 Features.erase(it); 2611 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2612 if (it != Features.end()) 2613 Features.erase(it); 2614 } 2615 2616 static const char *getCPUDefineSuffix(StringRef Name) { 2617 return llvm::StringSwitch<const char*>(Name) 2618 .Cases("arm8", "arm810", "4") 2619 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2620 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2621 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2622 .Case("ep9312", "4T") 2623 .Cases("arm10tdmi", "arm1020t", "5T") 2624 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2625 .Case("arm926ej-s", "5TEJ") 2626 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2627 .Cases("xscale", "iwmmxt", "5TE") 2628 .Case("arm1136j-s", "6J") 2629 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2630 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2631 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2632 .Cases("cortex-a8", "cortex-a9", "7A") 2633 .Case("cortex-m3", "7M") 2634 .Case("cortex-m0", "6M") 2635 .Default(0); 2636 } 2637 virtual bool setCPU(const std::string &Name) { 2638 if (!getCPUDefineSuffix(Name)) 2639 return false; 2640 2641 CPU = Name; 2642 return true; 2643 } 2644 virtual void getTargetDefines(const LangOptions &Opts, 2645 MacroBuilder &Builder) const { 2646 // Target identification. 2647 Builder.defineMacro("__arm"); 2648 Builder.defineMacro("__arm__"); 2649 2650 // Target properties. 2651 Builder.defineMacro("__ARMEL__"); 2652 Builder.defineMacro("__LITTLE_ENDIAN__"); 2653 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2654 2655 StringRef CPUArch = getCPUDefineSuffix(CPU); 2656 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2657 2658 // Subtarget options. 2659 2660 // FIXME: It's more complicated than this and we don't really support 2661 // interworking. 2662 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2663 Builder.defineMacro("__THUMB_INTERWORK__"); 2664 2665 if (ABI == "aapcs" || ABI == "aapcs-linux") 2666 Builder.defineMacro("__ARM_EABI__"); 2667 2668 if (SoftFloat) 2669 Builder.defineMacro("__SOFTFP__"); 2670 2671 if (CPU == "xscale") 2672 Builder.defineMacro("__XSCALE__"); 2673 2674 bool IsARMv7 = CPUArch.startswith("7"); 2675 if (IsThumb) { 2676 Builder.defineMacro("__THUMBEL__"); 2677 Builder.defineMacro("__thumb__"); 2678 if (CPUArch == "6T2" || IsARMv7) 2679 Builder.defineMacro("__thumb2__"); 2680 } 2681 2682 // Note, this is always on in gcc, even though it doesn't make sense. 2683 Builder.defineMacro("__APCS_32__"); 2684 2685 if (FPUModeIsVFP((FPUMode) FPU)) 2686 Builder.defineMacro("__VFP_FP__"); 2687 2688 // This only gets set when Neon instructions are actually available, unlike 2689 // the VFP define, hence the soft float and arch check. This is subtly 2690 // different from gcc, we follow the intent which was that it should be set 2691 // when Neon instructions are actually available. 2692 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2693 Builder.defineMacro("__ARM_NEON__"); 2694 } 2695 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2696 unsigned &NumRecords) const { 2697 Records = BuiltinInfo; 2698 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2699 } 2700 virtual const char *getVAListDeclaration() const { 2701 return "typedef void* __builtin_va_list;"; 2702 } 2703 virtual void getGCCRegNames(const char * const *&Names, 2704 unsigned &NumNames) const; 2705 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2706 unsigned &NumAliases) const; 2707 virtual bool validateAsmConstraint(const char *&Name, 2708 TargetInfo::ConstraintInfo &Info) const { 2709 // FIXME: Check if this is complete 2710 switch (*Name) { 2711 default: 2712 case 'l': // r0-r7 2713 case 'h': // r8-r15 2714 case 'w': // VFP Floating point register single precision 2715 case 'P': // VFP Floating point register double precision 2716 Info.setAllowsRegister(); 2717 return true; 2718 case 'Q': // A memory address that is a single base register. 2719 Info.setAllowsMemory(); 2720 return true; 2721 case 'U': // a memory reference... 2722 switch (Name[1]) { 2723 case 'q': // ...ARMV4 ldrsb 2724 case 'v': // ...VFP load/store (reg+constant offset) 2725 case 'y': // ...iWMMXt load/store 2726 case 't': // address valid for load/store opaque types wider 2727 // than 128-bits 2728 case 'n': // valid address for Neon doubleword vector load/store 2729 case 'm': // valid address for Neon element and structure load/store 2730 case 's': // valid address for non-offset loads/stores of quad-word 2731 // values in four ARM registers 2732 Info.setAllowsMemory(); 2733 Name++; 2734 return true; 2735 } 2736 } 2737 return false; 2738 } 2739 virtual std::string convertConstraint(const char *&Constraint) const { 2740 std::string R; 2741 switch (*Constraint) { 2742 case 'U': // Two-character constraint; add "^" hint for later parsing. 2743 R = std::string("^") + std::string(Constraint, 2); 2744 Constraint++; 2745 break; 2746 case 'p': // 'p' should be translated to 'r' by default. 2747 R = std::string("r"); 2748 break; 2749 default: 2750 return std::string(1, *Constraint); 2751 } 2752 return R; 2753 } 2754 virtual const char *getClobbers() const { 2755 // FIXME: Is this really right? 2756 return ""; 2757 } 2758 }; 2759 2760 const char * const ARMTargetInfo::GCCRegNames[] = { 2761 // Integer registers 2762 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2763 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2764 2765 // Float registers 2766 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2767 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2768 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2769 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2770 2771 // Double registers 2772 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2773 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2774 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2775 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2776 2777 // Quad registers 2778 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2779 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2780 }; 2781 2782 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2783 unsigned &NumNames) const { 2784 Names = GCCRegNames; 2785 NumNames = llvm::array_lengthof(GCCRegNames); 2786 } 2787 2788 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2789 { { "a1" }, "r0" }, 2790 { { "a2" }, "r1" }, 2791 { { "a3" }, "r2" }, 2792 { { "a4" }, "r3" }, 2793 { { "v1" }, "r4" }, 2794 { { "v2" }, "r5" }, 2795 { { "v3" }, "r6" }, 2796 { { "v4" }, "r7" }, 2797 { { "v5" }, "r8" }, 2798 { { "v6", "rfp" }, "r9" }, 2799 { { "sl" }, "r10" }, 2800 { { "fp" }, "r11" }, 2801 { { "ip" }, "r12" }, 2802 { { "r13" }, "sp" }, 2803 { { "r14" }, "lr" }, 2804 { { "r15" }, "pc" }, 2805 // The S, D and Q registers overlap, but aren't really aliases; we 2806 // don't want to substitute one of these for a different-sized one. 2807 }; 2808 2809 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2810 unsigned &NumAliases) const { 2811 Aliases = GCCRegAliases; 2812 NumAliases = llvm::array_lengthof(GCCRegAliases); 2813 } 2814 2815 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2816 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2817 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2818 ALL_LANGUAGES }, 2819 #include "clang/Basic/BuiltinsARM.def" 2820 }; 2821 } // end anonymous namespace. 2822 2823 namespace { 2824 class DarwinARMTargetInfo : 2825 public DarwinTargetInfo<ARMTargetInfo> { 2826 protected: 2827 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2828 MacroBuilder &Builder) const { 2829 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2830 } 2831 2832 public: 2833 DarwinARMTargetInfo(const std::string& triple) 2834 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2835 HasAlignMac68kSupport = true; 2836 // iOS always has 64-bit atomic instructions. 2837 // FIXME: This should be based off of the target features in ARMTargetInfo. 2838 MaxAtomicInlineWidth = 64; 2839 } 2840 }; 2841 } // end anonymous namespace. 2842 2843 2844 namespace { 2845 // Hexagon abstract base class 2846 class HexagonTargetInfo : public TargetInfo { 2847 static const Builtin::Info BuiltinInfo[]; 2848 static const char * const GCCRegNames[]; 2849 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2850 std::string CPU; 2851 public: 2852 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 2853 BigEndian = false; 2854 DescriptionString = ("e-p:32:32:32-" 2855 "i64:64:64-i32:32:32-" 2856 "i16:16:16-i1:32:32-a:0:0"); 2857 2858 // {} in inline assembly are packet specifiers, not assembly variant 2859 // specifiers. 2860 NoAsmVariants = true; 2861 } 2862 2863 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2864 unsigned &NumRecords) const { 2865 Records = BuiltinInfo; 2866 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 2867 } 2868 2869 virtual bool validateAsmConstraint(const char *&Name, 2870 TargetInfo::ConstraintInfo &Info) const { 2871 return true; 2872 } 2873 2874 virtual void getTargetDefines(const LangOptions &Opts, 2875 MacroBuilder &Builder) const; 2876 2877 virtual const char *getVAListDeclaration() const { 2878 return "typedef char* __builtin_va_list;"; 2879 } 2880 virtual void getGCCRegNames(const char * const *&Names, 2881 unsigned &NumNames) const; 2882 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2883 unsigned &NumAliases) const; 2884 virtual const char *getClobbers() const { 2885 return ""; 2886 } 2887 virtual bool setCPU(const std::string &Name) { 2888 CPU = Name; 2889 return true; 2890 } 2891 }; 2892 2893 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 2894 MacroBuilder &Builder) const { 2895 Builder.defineMacro("qdsp6"); 2896 Builder.defineMacro("__qdsp6", "1"); 2897 Builder.defineMacro("__qdsp6__", "1"); 2898 2899 Builder.defineMacro("hexagon"); 2900 Builder.defineMacro("__hexagon", "1"); 2901 Builder.defineMacro("__hexagon__", "1"); 2902 2903 if(CPU == "hexagonv1") { 2904 Builder.defineMacro("__HEXAGON_V1__"); 2905 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 2906 if(Opts.HexagonQdsp6Compat) { 2907 Builder.defineMacro("__QDSP6_V1__"); 2908 Builder.defineMacro("__QDSP6_ARCH__", "1"); 2909 } 2910 } 2911 else if(CPU == "hexagonv2") { 2912 Builder.defineMacro("__HEXAGON_V2__"); 2913 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 2914 if(Opts.HexagonQdsp6Compat) { 2915 Builder.defineMacro("__QDSP6_V2__"); 2916 Builder.defineMacro("__QDSP6_ARCH__", "2"); 2917 } 2918 } 2919 else if(CPU == "hexagonv3") { 2920 Builder.defineMacro("__HEXAGON_V3__"); 2921 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 2922 if(Opts.HexagonQdsp6Compat) { 2923 Builder.defineMacro("__QDSP6_V3__"); 2924 Builder.defineMacro("__QDSP6_ARCH__", "3"); 2925 } 2926 } 2927 else if(CPU == "hexagonv4") { 2928 Builder.defineMacro("__HEXAGON_V4__"); 2929 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 2930 if(Opts.HexagonQdsp6Compat) { 2931 Builder.defineMacro("__QDSP6_V4__"); 2932 Builder.defineMacro("__QDSP6_ARCH__", "4"); 2933 } 2934 } 2935 } 2936 2937 const char * const HexagonTargetInfo::GCCRegNames[] = { 2938 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2939 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2940 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2941 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 2942 "p0", "p1", "p2", "p3", 2943 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 2944 }; 2945 2946 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 2947 unsigned &NumNames) const { 2948 Names = GCCRegNames; 2949 NumNames = llvm::array_lengthof(GCCRegNames); 2950 } 2951 2952 2953 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 2954 { { "sp" }, "r29" }, 2955 { { "fp" }, "r30" }, 2956 { { "lr" }, "r31" }, 2957 }; 2958 2959 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2960 unsigned &NumAliases) const { 2961 Aliases = GCCRegAliases; 2962 NumAliases = llvm::array_lengthof(GCCRegAliases); 2963 } 2964 2965 2966 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 2967 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2968 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2969 ALL_LANGUAGES }, 2970 #include "clang/Basic/BuiltinsHexagon.def" 2971 }; 2972 } 2973 2974 2975 namespace { 2976 class SparcV8TargetInfo : public TargetInfo { 2977 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2978 static const char * const GCCRegNames[]; 2979 bool SoftFloat; 2980 public: 2981 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2982 // FIXME: Support Sparc quad-precision long double? 2983 BigEndian = false; 2984 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2985 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2986 } 2987 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2988 const std::string &Name, 2989 bool Enabled) const { 2990 if (Name == "soft-float") 2991 Features[Name] = Enabled; 2992 else 2993 return false; 2994 2995 return true; 2996 } 2997 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2998 SoftFloat = false; 2999 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3000 if (Features[i] == "+soft-float") 3001 SoftFloat = true; 3002 } 3003 virtual void getTargetDefines(const LangOptions &Opts, 3004 MacroBuilder &Builder) const { 3005 DefineStd(Builder, "sparc", Opts); 3006 Builder.defineMacro("__sparcv8"); 3007 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3008 3009 if (SoftFloat) 3010 Builder.defineMacro("SOFT_FLOAT", "1"); 3011 } 3012 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3013 unsigned &NumRecords) const { 3014 // FIXME: Implement! 3015 } 3016 virtual const char *getVAListDeclaration() const { 3017 return "typedef void* __builtin_va_list;"; 3018 } 3019 virtual void getGCCRegNames(const char * const *&Names, 3020 unsigned &NumNames) const; 3021 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3022 unsigned &NumAliases) const; 3023 virtual bool validateAsmConstraint(const char *&Name, 3024 TargetInfo::ConstraintInfo &info) const { 3025 // FIXME: Implement! 3026 return false; 3027 } 3028 virtual const char *getClobbers() const { 3029 // FIXME: Implement! 3030 return ""; 3031 } 3032 }; 3033 3034 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3035 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3036 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3037 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3038 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3039 }; 3040 3041 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3042 unsigned &NumNames) const { 3043 Names = GCCRegNames; 3044 NumNames = llvm::array_lengthof(GCCRegNames); 3045 } 3046 3047 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3048 { { "g0" }, "r0" }, 3049 { { "g1" }, "r1" }, 3050 { { "g2" }, "r2" }, 3051 { { "g3" }, "r3" }, 3052 { { "g4" }, "r4" }, 3053 { { "g5" }, "r5" }, 3054 { { "g6" }, "r6" }, 3055 { { "g7" }, "r7" }, 3056 { { "o0" }, "r8" }, 3057 { { "o1" }, "r9" }, 3058 { { "o2" }, "r10" }, 3059 { { "o3" }, "r11" }, 3060 { { "o4" }, "r12" }, 3061 { { "o5" }, "r13" }, 3062 { { "o6", "sp" }, "r14" }, 3063 { { "o7" }, "r15" }, 3064 { { "l0" }, "r16" }, 3065 { { "l1" }, "r17" }, 3066 { { "l2" }, "r18" }, 3067 { { "l3" }, "r19" }, 3068 { { "l4" }, "r20" }, 3069 { { "l5" }, "r21" }, 3070 { { "l6" }, "r22" }, 3071 { { "l7" }, "r23" }, 3072 { { "i0" }, "r24" }, 3073 { { "i1" }, "r25" }, 3074 { { "i2" }, "r26" }, 3075 { { "i3" }, "r27" }, 3076 { { "i4" }, "r28" }, 3077 { { "i5" }, "r29" }, 3078 { { "i6", "fp" }, "r30" }, 3079 { { "i7" }, "r31" }, 3080 }; 3081 3082 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3083 unsigned &NumAliases) const { 3084 Aliases = GCCRegAliases; 3085 NumAliases = llvm::array_lengthof(GCCRegAliases); 3086 } 3087 } // end anonymous namespace. 3088 3089 namespace { 3090 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3091 public: 3092 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3093 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3094 SizeType = UnsignedInt; 3095 PtrDiffType = SignedInt; 3096 } 3097 }; 3098 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3099 public: 3100 SolarisSparcV8TargetInfo(const std::string& triple) : 3101 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3102 SizeType = UnsignedInt; 3103 PtrDiffType = SignedInt; 3104 } 3105 }; 3106 } // end anonymous namespace. 3107 3108 namespace { 3109 class MSP430TargetInfo : public TargetInfo { 3110 static const char * const GCCRegNames[]; 3111 public: 3112 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3113 BigEndian = false; 3114 TLSSupported = false; 3115 IntWidth = 16; IntAlign = 16; 3116 LongWidth = 32; LongLongWidth = 64; 3117 LongAlign = LongLongAlign = 16; 3118 PointerWidth = 16; PointerAlign = 16; 3119 SuitableAlign = 16; 3120 SizeType = UnsignedInt; 3121 IntMaxType = SignedLong; 3122 UIntMaxType = UnsignedLong; 3123 IntPtrType = SignedShort; 3124 PtrDiffType = SignedInt; 3125 SigAtomicType = SignedLong; 3126 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3127 } 3128 virtual void getTargetDefines(const LangOptions &Opts, 3129 MacroBuilder &Builder) const { 3130 Builder.defineMacro("MSP430"); 3131 Builder.defineMacro("__MSP430__"); 3132 // FIXME: defines for different 'flavours' of MCU 3133 } 3134 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3135 unsigned &NumRecords) const { 3136 // FIXME: Implement. 3137 Records = 0; 3138 NumRecords = 0; 3139 } 3140 virtual void getGCCRegNames(const char * const *&Names, 3141 unsigned &NumNames) const; 3142 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3143 unsigned &NumAliases) const { 3144 // No aliases. 3145 Aliases = 0; 3146 NumAliases = 0; 3147 } 3148 virtual bool validateAsmConstraint(const char *&Name, 3149 TargetInfo::ConstraintInfo &info) const { 3150 // No target constraints for now. 3151 return false; 3152 } 3153 virtual const char *getClobbers() const { 3154 // FIXME: Is this really right? 3155 return ""; 3156 } 3157 virtual const char *getVAListDeclaration() const { 3158 // FIXME: implement 3159 return "typedef char* __builtin_va_list;"; 3160 } 3161 }; 3162 3163 const char * const MSP430TargetInfo::GCCRegNames[] = { 3164 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3166 }; 3167 3168 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3169 unsigned &NumNames) const { 3170 Names = GCCRegNames; 3171 NumNames = llvm::array_lengthof(GCCRegNames); 3172 } 3173 } 3174 3175 namespace { 3176 3177 // LLVM and Clang cannot be used directly to output native binaries for 3178 // target, but is used to compile C code to llvm bitcode with correct 3179 // type and alignment information. 3180 // 3181 // TCE uses the llvm bitcode as input and uses it for generating customized 3182 // target processor and program binary. TCE co-design environment is 3183 // publicly available in http://tce.cs.tut.fi 3184 3185 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3186 3, // opencl_global 3187 4, // opencl_local 3188 5 // opencl_constant 3189 }; 3190 3191 class TCETargetInfo : public TargetInfo{ 3192 public: 3193 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3194 TLSSupported = false; 3195 IntWidth = 32; 3196 LongWidth = LongLongWidth = 32; 3197 PointerWidth = 32; 3198 IntAlign = 32; 3199 LongAlign = LongLongAlign = 32; 3200 PointerAlign = 32; 3201 SuitableAlign = 32; 3202 SizeType = UnsignedInt; 3203 IntMaxType = SignedLong; 3204 UIntMaxType = UnsignedLong; 3205 IntPtrType = SignedInt; 3206 PtrDiffType = SignedInt; 3207 FloatWidth = 32; 3208 FloatAlign = 32; 3209 DoubleWidth = 32; 3210 DoubleAlign = 32; 3211 LongDoubleWidth = 32; 3212 LongDoubleAlign = 32; 3213 FloatFormat = &llvm::APFloat::IEEEsingle; 3214 DoubleFormat = &llvm::APFloat::IEEEsingle; 3215 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3216 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3217 "i16:16:32-i32:32:32-i64:32:32-" 3218 "f32:32:32-f64:32:32-v64:32:32-" 3219 "v128:32:32-a0:0:32-n32"; 3220 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3221 } 3222 3223 virtual void getTargetDefines(const LangOptions &Opts, 3224 MacroBuilder &Builder) const { 3225 DefineStd(Builder, "tce", Opts); 3226 Builder.defineMacro("__TCE__"); 3227 Builder.defineMacro("__TCE_V1__"); 3228 } 3229 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3230 unsigned &NumRecords) const {} 3231 virtual const char *getClobbers() const { 3232 return ""; 3233 } 3234 virtual const char *getVAListDeclaration() const { 3235 return "typedef void* __builtin_va_list;"; 3236 } 3237 virtual void getGCCRegNames(const char * const *&Names, 3238 unsigned &NumNames) const {} 3239 virtual bool validateAsmConstraint(const char *&Name, 3240 TargetInfo::ConstraintInfo &info) const { 3241 return true; 3242 } 3243 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3244 unsigned &NumAliases) const {} 3245 }; 3246 } 3247 3248 namespace { 3249 class MipsTargetInfoBase : public TargetInfo { 3250 std::string CPU; 3251 protected: 3252 std::string ABI; 3253 public: 3254 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3255 : TargetInfo(triple), ABI(ABIStr) {} 3256 virtual const char *getABI() const { return ABI.c_str(); } 3257 virtual bool setABI(const std::string &Name) = 0; 3258 virtual bool setCPU(const std::string &Name) { 3259 CPU = Name; 3260 return true; 3261 } 3262 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3263 Features[ABI] = true; 3264 Features[CPU] = true; 3265 } 3266 virtual void getArchDefines(const LangOptions &Opts, 3267 MacroBuilder &Builder) const = 0; 3268 virtual void getTargetDefines(const LangOptions &Opts, 3269 MacroBuilder &Builder) const = 0; 3270 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3271 unsigned &NumRecords) const { 3272 // FIXME: Implement! 3273 } 3274 virtual const char *getVAListDeclaration() const { 3275 return "typedef void* __builtin_va_list;"; 3276 } 3277 virtual void getGCCRegNames(const char * const *&Names, 3278 unsigned &NumNames) const { 3279 static const char * const GCCRegNames[] = { 3280 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3281 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3282 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3283 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3284 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3285 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3286 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3287 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3288 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3289 "$fcc5","$fcc6","$fcc7" 3290 }; 3291 Names = GCCRegNames; 3292 NumNames = llvm::array_lengthof(GCCRegNames); 3293 } 3294 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3295 unsigned &NumAliases) const = 0; 3296 virtual bool validateAsmConstraint(const char *&Name, 3297 TargetInfo::ConstraintInfo &Info) const { 3298 switch (*Name) { 3299 default: 3300 return false; 3301 3302 case 'r': // CPU registers. 3303 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3304 case 'y': // Equivalent to "r", backwards compatibility only. 3305 case 'f': // floating-point registers. 3306 Info.setAllowsRegister(); 3307 return true; 3308 } 3309 return false; 3310 } 3311 3312 virtual const char *getClobbers() const { 3313 // FIXME: Implement! 3314 return ""; 3315 } 3316 }; 3317 3318 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3319 public: 3320 Mips32TargetInfoBase(const std::string& triple) : 3321 MipsTargetInfoBase(triple, "o32") { 3322 SizeType = UnsignedInt; 3323 PtrDiffType = SignedInt; 3324 } 3325 virtual bool setABI(const std::string &Name) { 3326 if ((Name == "o32") || (Name == "eabi")) { 3327 ABI = Name; 3328 return true; 3329 } else 3330 return false; 3331 } 3332 virtual void getArchDefines(const LangOptions &Opts, 3333 MacroBuilder &Builder) const { 3334 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3335 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3336 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3337 3338 if (ABI == "o32") { 3339 Builder.defineMacro("__mips_o32"); 3340 Builder.defineMacro("_ABIO32", "1"); 3341 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3342 } 3343 else if (ABI == "eabi") 3344 Builder.defineMacro("__mips_eabi"); 3345 else 3346 llvm_unreachable("Invalid ABI for Mips32."); 3347 } 3348 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3349 unsigned &NumAliases) const { 3350 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3351 { { "at" }, "$1" }, 3352 { { "v0" }, "$2" }, 3353 { { "v1" }, "$3" }, 3354 { { "a0" }, "$4" }, 3355 { { "a1" }, "$5" }, 3356 { { "a2" }, "$6" }, 3357 { { "a3" }, "$7" }, 3358 { { "t0" }, "$8" }, 3359 { { "t1" }, "$9" }, 3360 { { "t2" }, "$10" }, 3361 { { "t3" }, "$11" }, 3362 { { "t4" }, "$12" }, 3363 { { "t5" }, "$13" }, 3364 { { "t6" }, "$14" }, 3365 { { "t7" }, "$15" }, 3366 { { "s0" }, "$16" }, 3367 { { "s1" }, "$17" }, 3368 { { "s2" }, "$18" }, 3369 { { "s3" }, "$19" }, 3370 { { "s4" }, "$20" }, 3371 { { "s5" }, "$21" }, 3372 { { "s6" }, "$22" }, 3373 { { "s7" }, "$23" }, 3374 { { "t8" }, "$24" }, 3375 { { "t9" }, "$25" }, 3376 { { "k0" }, "$26" }, 3377 { { "k1" }, "$27" }, 3378 { { "gp" }, "$28" }, 3379 { { "sp" }, "$29" }, 3380 { { "fp" }, "$30" }, 3381 { { "ra" }, "$31" } 3382 }; 3383 Aliases = GCCRegAliases; 3384 NumAliases = llvm::array_lengthof(GCCRegAliases); 3385 } 3386 }; 3387 3388 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3389 public: 3390 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3391 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3392 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3393 } 3394 virtual void getTargetDefines(const LangOptions &Opts, 3395 MacroBuilder &Builder) const { 3396 DefineStd(Builder, "mips", Opts); 3397 Builder.defineMacro("_mips"); 3398 DefineStd(Builder, "MIPSEB", Opts); 3399 Builder.defineMacro("_MIPSEB"); 3400 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3401 getArchDefines(Opts, Builder); 3402 } 3403 }; 3404 3405 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3406 public: 3407 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3408 BigEndian = false; 3409 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3410 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3411 } 3412 virtual void getTargetDefines(const LangOptions &Opts, 3413 MacroBuilder &Builder) const { 3414 DefineStd(Builder, "mips", Opts); 3415 Builder.defineMacro("_mips"); 3416 DefineStd(Builder, "MIPSEL", Opts); 3417 Builder.defineMacro("_MIPSEL"); 3418 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3419 getArchDefines(Opts, Builder); 3420 } 3421 }; 3422 3423 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3424 virtual void SetDescriptionString(const std::string &Name) = 0; 3425 public: 3426 Mips64TargetInfoBase(const std::string& triple) : 3427 MipsTargetInfoBase(triple, "n64") { 3428 LongWidth = LongAlign = 64; 3429 PointerWidth = PointerAlign = 64; 3430 LongDoubleWidth = LongDoubleAlign = 128; 3431 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3432 SuitableAlign = 128; 3433 } 3434 virtual bool setABI(const std::string &Name) { 3435 SetDescriptionString(Name); 3436 3437 if (Name != "n32" && Name != "n64") 3438 return false; 3439 3440 ABI = Name; 3441 3442 if (Name == "n32") { 3443 LongWidth = LongAlign = 32; 3444 PointerWidth = PointerAlign = 32; 3445 } 3446 3447 return true; 3448 } 3449 virtual void getArchDefines(const LangOptions &Opts, 3450 MacroBuilder &Builder) const { 3451 if (ABI == "n32") { 3452 Builder.defineMacro("__mips_n32"); 3453 Builder.defineMacro("_ABIN32", "2"); 3454 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3455 } 3456 else if (ABI == "n64") { 3457 Builder.defineMacro("__mips_n64"); 3458 Builder.defineMacro("_ABI64", "3"); 3459 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3460 } 3461 else 3462 llvm_unreachable("Invalid ABI for Mips64."); 3463 } 3464 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3465 unsigned &NumAliases) const { 3466 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3467 { { "at" }, "$1" }, 3468 { { "v0" }, "$2" }, 3469 { { "v1" }, "$3" }, 3470 { { "a0" }, "$4" }, 3471 { { "a1" }, "$5" }, 3472 { { "a2" }, "$6" }, 3473 { { "a3" }, "$7" }, 3474 { { "a4" }, "$8" }, 3475 { { "a5" }, "$9" }, 3476 { { "a6" }, "$10" }, 3477 { { "a7" }, "$11" }, 3478 { { "t0" }, "$12" }, 3479 { { "t1" }, "$13" }, 3480 { { "t2" }, "$14" }, 3481 { { "t3" }, "$15" }, 3482 { { "s0" }, "$16" }, 3483 { { "s1" }, "$17" }, 3484 { { "s2" }, "$18" }, 3485 { { "s3" }, "$19" }, 3486 { { "s4" }, "$20" }, 3487 { { "s5" }, "$21" }, 3488 { { "s6" }, "$22" }, 3489 { { "s7" }, "$23" }, 3490 { { "t8" }, "$24" }, 3491 { { "t9" }, "$25" }, 3492 { { "k0" }, "$26" }, 3493 { { "k1" }, "$27" }, 3494 { { "gp" }, "$28" }, 3495 { { "sp" }, "$29" }, 3496 { { "fp" }, "$30" }, 3497 { { "ra" }, "$31" } 3498 }; 3499 Aliases = GCCRegAliases; 3500 NumAliases = llvm::array_lengthof(GCCRegAliases); 3501 } 3502 }; 3503 3504 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3505 virtual void SetDescriptionString(const std::string &Name) { 3506 // Change DescriptionString only if ABI is n32. 3507 if (Name == "n32") 3508 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3509 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3510 "v64:64:64-n32"; 3511 } 3512 public: 3513 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3514 // Default ABI is n64. 3515 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3516 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3517 "v64:64:64-n32"; 3518 } 3519 virtual void getTargetDefines(const LangOptions &Opts, 3520 MacroBuilder &Builder) const { 3521 DefineStd(Builder, "mips", Opts); 3522 Builder.defineMacro("_mips"); 3523 DefineStd(Builder, "MIPSEB", Opts); 3524 Builder.defineMacro("_MIPSEB"); 3525 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3526 getArchDefines(Opts, Builder); 3527 } 3528 }; 3529 3530 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3531 virtual void SetDescriptionString(const std::string &Name) { 3532 // Change DescriptionString only if ABI is n32. 3533 if (Name == "n32") 3534 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3535 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3536 "-v64:64:64-n32"; 3537 } 3538 public: 3539 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3540 // Default ABI is n64. 3541 BigEndian = false; 3542 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3543 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3544 "v64:64:64-n32"; 3545 } 3546 virtual void getTargetDefines(const LangOptions &Opts, 3547 MacroBuilder &Builder) const { 3548 DefineStd(Builder, "mips", Opts); 3549 Builder.defineMacro("_mips"); 3550 DefineStd(Builder, "MIPSEL", Opts); 3551 Builder.defineMacro("_MIPSEL"); 3552 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3553 getArchDefines(Opts, Builder); 3554 } 3555 }; 3556 } // end anonymous namespace. 3557 3558 namespace { 3559 class PNaClTargetInfo : public TargetInfo { 3560 public: 3561 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3562 BigEndian = false; 3563 this->UserLabelPrefix = ""; 3564 this->LongAlign = 32; 3565 this->LongWidth = 32; 3566 this->PointerAlign = 32; 3567 this->PointerWidth = 32; 3568 this->IntMaxType = TargetInfo::SignedLongLong; 3569 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3570 this->Int64Type = TargetInfo::SignedLongLong; 3571 this->DoubleAlign = 64; 3572 this->LongDoubleWidth = 64; 3573 this->LongDoubleAlign = 64; 3574 this->SizeType = TargetInfo::UnsignedInt; 3575 this->PtrDiffType = TargetInfo::SignedInt; 3576 this->IntPtrType = TargetInfo::SignedInt; 3577 this->RegParmMax = 2; 3578 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3579 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3580 } 3581 3582 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3583 } 3584 virtual void getArchDefines(const LangOptions &Opts, 3585 MacroBuilder &Builder) const { 3586 Builder.defineMacro("__le32__"); 3587 Builder.defineMacro("__pnacl__"); 3588 } 3589 virtual void getTargetDefines(const LangOptions &Opts, 3590 MacroBuilder &Builder) const { 3591 DefineStd(Builder, "unix", Opts); 3592 Builder.defineMacro("__ELF__"); 3593 if (Opts.POSIXThreads) 3594 Builder.defineMacro("_REENTRANT"); 3595 if (Opts.CPlusPlus) 3596 Builder.defineMacro("_GNU_SOURCE"); 3597 3598 Builder.defineMacro("__native_client__"); 3599 getArchDefines(Opts, Builder); 3600 } 3601 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3602 unsigned &NumRecords) const { 3603 } 3604 virtual const char *getVAListDeclaration() const { 3605 return "typedef int __builtin_va_list[4];"; 3606 } 3607 virtual void getGCCRegNames(const char * const *&Names, 3608 unsigned &NumNames) const; 3609 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3610 unsigned &NumAliases) const; 3611 virtual bool validateAsmConstraint(const char *&Name, 3612 TargetInfo::ConstraintInfo &Info) const { 3613 return false; 3614 } 3615 3616 virtual const char *getClobbers() const { 3617 return ""; 3618 } 3619 }; 3620 3621 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3622 unsigned &NumNames) const { 3623 Names = NULL; 3624 NumNames = 0; 3625 } 3626 3627 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3628 unsigned &NumAliases) const { 3629 Aliases = NULL; 3630 NumAliases = 0; 3631 } 3632 } // end anonymous namespace. 3633 3634 3635 //===----------------------------------------------------------------------===// 3636 // Driver code 3637 //===----------------------------------------------------------------------===// 3638 3639 static TargetInfo *AllocateTarget(const std::string &T) { 3640 llvm::Triple Triple(T); 3641 llvm::Triple::OSType os = Triple.getOS(); 3642 3643 switch (Triple.getArch()) { 3644 default: 3645 return NULL; 3646 3647 case llvm::Triple::hexagon: 3648 return new HexagonTargetInfo(T); 3649 3650 case llvm::Triple::arm: 3651 case llvm::Triple::thumb: 3652 if (Triple.isOSDarwin()) 3653 return new DarwinARMTargetInfo(T); 3654 3655 switch (os) { 3656 case llvm::Triple::Linux: 3657 return new LinuxTargetInfo<ARMTargetInfo>(T); 3658 case llvm::Triple::FreeBSD: 3659 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3660 case llvm::Triple::NetBSD: 3661 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3662 case llvm::Triple::RTEMS: 3663 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3664 default: 3665 return new ARMTargetInfo(T); 3666 } 3667 3668 case llvm::Triple::msp430: 3669 return new MSP430TargetInfo(T); 3670 3671 case llvm::Triple::mips: 3672 switch (os) { 3673 case llvm::Triple::Linux: 3674 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3675 case llvm::Triple::RTEMS: 3676 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3677 case llvm::Triple::FreeBSD: 3678 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3679 case llvm::Triple::NetBSD: 3680 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3681 default: 3682 return new Mips32EBTargetInfo(T); 3683 } 3684 3685 case llvm::Triple::mipsel: 3686 switch (os) { 3687 case llvm::Triple::Linux: 3688 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3689 case llvm::Triple::RTEMS: 3690 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3691 case llvm::Triple::FreeBSD: 3692 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3693 case llvm::Triple::NetBSD: 3694 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3695 default: 3696 return new Mips32ELTargetInfo(T); 3697 } 3698 3699 case llvm::Triple::mips64: 3700 switch (os) { 3701 case llvm::Triple::Linux: 3702 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3703 case llvm::Triple::RTEMS: 3704 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3705 case llvm::Triple::FreeBSD: 3706 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3707 case llvm::Triple::NetBSD: 3708 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3709 default: 3710 return new Mips64EBTargetInfo(T); 3711 } 3712 3713 case llvm::Triple::mips64el: 3714 switch (os) { 3715 case llvm::Triple::Linux: 3716 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3717 case llvm::Triple::RTEMS: 3718 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3719 case llvm::Triple::FreeBSD: 3720 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3721 case llvm::Triple::NetBSD: 3722 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3723 default: 3724 return new Mips64ELTargetInfo(T); 3725 } 3726 3727 case llvm::Triple::le32: 3728 switch (os) { 3729 case llvm::Triple::NativeClient: 3730 return new PNaClTargetInfo(T); 3731 default: 3732 return NULL; 3733 } 3734 3735 case llvm::Triple::ppc: 3736 if (Triple.isOSDarwin()) 3737 return new DarwinPPC32TargetInfo(T); 3738 switch (os) { 3739 case llvm::Triple::Linux: 3740 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3741 case llvm::Triple::FreeBSD: 3742 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3743 case llvm::Triple::NetBSD: 3744 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3745 case llvm::Triple::RTEMS: 3746 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3747 default: 3748 return new PPC32TargetInfo(T); 3749 } 3750 3751 case llvm::Triple::ppc64: 3752 if (Triple.isOSDarwin()) 3753 return new DarwinPPC64TargetInfo(T); 3754 switch (os) { 3755 case llvm::Triple::Linux: 3756 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3757 case llvm::Triple::Lv2: 3758 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3759 case llvm::Triple::FreeBSD: 3760 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3761 case llvm::Triple::NetBSD: 3762 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3763 default: 3764 return new PPC64TargetInfo(T); 3765 } 3766 3767 case llvm::Triple::ptx32: 3768 return new PTX32TargetInfo(T); 3769 case llvm::Triple::ptx64: 3770 return new PTX64TargetInfo(T); 3771 3772 case llvm::Triple::mblaze: 3773 return new MBlazeTargetInfo(T); 3774 3775 case llvm::Triple::sparc: 3776 switch (os) { 3777 case llvm::Triple::Linux: 3778 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3779 case llvm::Triple::AuroraUX: 3780 return new AuroraUXSparcV8TargetInfo(T); 3781 case llvm::Triple::Solaris: 3782 return new SolarisSparcV8TargetInfo(T); 3783 case llvm::Triple::NetBSD: 3784 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3785 case llvm::Triple::RTEMS: 3786 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3787 default: 3788 return new SparcV8TargetInfo(T); 3789 } 3790 3791 // FIXME: Need a real SPU target. 3792 case llvm::Triple::cellspu: 3793 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3794 3795 case llvm::Triple::tce: 3796 return new TCETargetInfo(T); 3797 3798 case llvm::Triple::x86: 3799 if (Triple.isOSDarwin()) 3800 return new DarwinI386TargetInfo(T); 3801 3802 switch (os) { 3803 case llvm::Triple::AuroraUX: 3804 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3805 case llvm::Triple::Linux: 3806 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3807 case llvm::Triple::DragonFly: 3808 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3809 case llvm::Triple::NetBSD: 3810 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3811 case llvm::Triple::OpenBSD: 3812 return new OpenBSDI386TargetInfo(T); 3813 case llvm::Triple::FreeBSD: 3814 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3815 case llvm::Triple::Minix: 3816 return new MinixTargetInfo<X86_32TargetInfo>(T); 3817 case llvm::Triple::Solaris: 3818 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3819 case llvm::Triple::Cygwin: 3820 return new CygwinX86_32TargetInfo(T); 3821 case llvm::Triple::MinGW32: 3822 return new MinGWX86_32TargetInfo(T); 3823 case llvm::Triple::Win32: 3824 return new VisualStudioWindowsX86_32TargetInfo(T); 3825 case llvm::Triple::Haiku: 3826 return new HaikuX86_32TargetInfo(T); 3827 case llvm::Triple::RTEMS: 3828 return new RTEMSX86_32TargetInfo(T); 3829 default: 3830 return new X86_32TargetInfo(T); 3831 } 3832 3833 case llvm::Triple::x86_64: 3834 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3835 return new DarwinX86_64TargetInfo(T); 3836 3837 switch (os) { 3838 case llvm::Triple::AuroraUX: 3839 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3840 case llvm::Triple::Linux: 3841 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3842 case llvm::Triple::DragonFly: 3843 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3844 case llvm::Triple::NetBSD: 3845 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3846 case llvm::Triple::OpenBSD: 3847 return new OpenBSDX86_64TargetInfo(T); 3848 case llvm::Triple::FreeBSD: 3849 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3850 case llvm::Triple::Solaris: 3851 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3852 case llvm::Triple::MinGW32: 3853 return new MinGWX86_64TargetInfo(T); 3854 case llvm::Triple::Win32: // This is what Triple.h supports now. 3855 return new VisualStudioWindowsX86_64TargetInfo(T); 3856 default: 3857 return new X86_64TargetInfo(T); 3858 } 3859 } 3860 } 3861 3862 /// CreateTargetInfo - Return the target info object for the specified target 3863 /// triple. 3864 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3865 TargetOptions &Opts) { 3866 llvm::Triple Triple(Opts.Triple); 3867 3868 // Construct the target 3869 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3870 if (!Target) { 3871 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3872 return 0; 3873 } 3874 3875 // Set the target CPU if specified. 3876 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3877 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3878 return 0; 3879 } 3880 3881 // Set the target ABI if specified. 3882 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3883 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3884 return 0; 3885 } 3886 3887 // Set the target C++ ABI. 3888 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3889 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3890 return 0; 3891 } 3892 3893 // Compute the default target features, we need the target to handle this 3894 // because features may have dependencies on one another. 3895 llvm::StringMap<bool> Features; 3896 Target->getDefaultFeatures(Features); 3897 3898 // Apply the user specified deltas. 3899 // First the enables. 3900 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3901 ie = Opts.Features.end(); it != ie; ++it) { 3902 const char *Name = it->c_str(); 3903 3904 if (Name[0] != '+') 3905 continue; 3906 3907 // Apply the feature via the target. 3908 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 3909 Diags.Report(diag::err_target_invalid_feature) << Name; 3910 return 0; 3911 } 3912 } 3913 3914 // Then the disables. 3915 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3916 ie = Opts.Features.end(); it != ie; ++it) { 3917 const char *Name = it->c_str(); 3918 3919 if (Name[0] == '+') 3920 continue; 3921 3922 // Apply the feature via the target. 3923 if (Name[0] != '-' || 3924 !Target->setFeatureEnabled(Features, Name + 1, false)) { 3925 Diags.Report(diag::err_target_invalid_feature) << Name; 3926 return 0; 3927 } 3928 } 3929 3930 // Add the features to the compile options. 3931 // 3932 // FIXME: If we are completely confident that we have the right set, we only 3933 // need to pass the minuses. 3934 Opts.Features.clear(); 3935 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3936 ie = Features.end(); it != ie; ++it) 3937 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3938 it->first().str()); 3939 Target->HandleTargetFeatures(Opts.Features); 3940 3941 return Target.take(); 3942 } 3943