1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 // FIXME: Move version number handling to llvm::Triple. 251 StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 252 253 Builder.defineMacro("__FreeBSD__", Release); 254 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 255 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 256 DefineStd(Builder, "unix", Opts); 257 Builder.defineMacro("__ELF__"); 258 } 259 public: 260 FreeBSDTargetInfo(const std::string &triple) 261 : OSTargetInfo<Target>(triple) { 262 this->UserLabelPrefix = ""; 263 264 llvm::Triple Triple(triple); 265 switch (Triple.getArch()) { 266 default: 267 case llvm::Triple::x86: 268 case llvm::Triple::x86_64: 269 this->MCountName = ".mcount"; 270 break; 271 case llvm::Triple::mips: 272 case llvm::Triple::mipsel: 273 case llvm::Triple::ppc: 274 case llvm::Triple::ppc64: 275 this->MCountName = "_mcount"; 276 break; 277 case llvm::Triple::arm: 278 this->MCountName = "__mcount"; 279 break; 280 } 281 282 } 283 }; 284 285 // Minix Target 286 template<typename Target> 287 class MinixTargetInfo : public OSTargetInfo<Target> { 288 protected: 289 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 290 MacroBuilder &Builder) const { 291 // Minix defines 292 293 Builder.defineMacro("__minix", "3"); 294 Builder.defineMacro("_EM_WSIZE", "4"); 295 Builder.defineMacro("_EM_PSIZE", "4"); 296 Builder.defineMacro("_EM_SSIZE", "2"); 297 Builder.defineMacro("_EM_LSIZE", "4"); 298 Builder.defineMacro("_EM_FSIZE", "4"); 299 Builder.defineMacro("_EM_DSIZE", "8"); 300 DefineStd(Builder, "unix", Opts); 301 } 302 public: 303 MinixTargetInfo(const std::string &triple) 304 : OSTargetInfo<Target>(triple) { 305 this->UserLabelPrefix = ""; 306 } 307 }; 308 309 // Linux target 310 template<typename Target> 311 class LinuxTargetInfo : public OSTargetInfo<Target> { 312 protected: 313 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 314 MacroBuilder &Builder) const { 315 // Linux defines; list based off of gcc output 316 DefineStd(Builder, "unix", Opts); 317 DefineStd(Builder, "linux", Opts); 318 Builder.defineMacro("__gnu_linux__"); 319 Builder.defineMacro("__ELF__"); 320 if (Opts.POSIXThreads) 321 Builder.defineMacro("_REENTRANT"); 322 if (Opts.CPlusPlus) 323 Builder.defineMacro("_GNU_SOURCE"); 324 } 325 public: 326 LinuxTargetInfo(const std::string& triple) 327 : OSTargetInfo<Target>(triple) { 328 this->UserLabelPrefix = ""; 329 this->WIntType = TargetInfo::UnsignedInt; 330 } 331 332 virtual const char *getStaticInitSectionSpecifier() const { 333 return ".text.startup"; 334 } 335 }; 336 337 // NetBSD Target 338 template<typename Target> 339 class NetBSDTargetInfo : public OSTargetInfo<Target> { 340 protected: 341 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 342 MacroBuilder &Builder) const { 343 // NetBSD defines; list based off of gcc output 344 Builder.defineMacro("__NetBSD__"); 345 Builder.defineMacro("__unix__"); 346 Builder.defineMacro("__ELF__"); 347 if (Opts.POSIXThreads) 348 Builder.defineMacro("_POSIX_THREADS"); 349 } 350 public: 351 NetBSDTargetInfo(const std::string &triple) 352 : OSTargetInfo<Target>(triple) { 353 this->UserLabelPrefix = ""; 354 } 355 }; 356 357 // OpenBSD Target 358 template<typename Target> 359 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 360 protected: 361 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 362 MacroBuilder &Builder) const { 363 // OpenBSD defines; list based off of gcc output 364 365 Builder.defineMacro("__OpenBSD__"); 366 DefineStd(Builder, "unix", Opts); 367 Builder.defineMacro("__ELF__"); 368 if (Opts.POSIXThreads) 369 Builder.defineMacro("_POSIX_THREADS"); 370 } 371 public: 372 OpenBSDTargetInfo(const std::string &triple) 373 : OSTargetInfo<Target>(triple) {} 374 }; 375 376 // PSP Target 377 template<typename Target> 378 class PSPTargetInfo : public OSTargetInfo<Target> { 379 protected: 380 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 381 MacroBuilder &Builder) const { 382 // PSP defines; list based on the output of the pspdev gcc toolchain. 383 Builder.defineMacro("PSP"); 384 Builder.defineMacro("_PSP"); 385 Builder.defineMacro("__psp__"); 386 Builder.defineMacro("__ELF__"); 387 } 388 public: 389 PSPTargetInfo(const std::string& triple) 390 : OSTargetInfo<Target>(triple) { 391 this->UserLabelPrefix = ""; 392 } 393 }; 394 395 // PS3 PPU Target 396 template<typename Target> 397 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 398 protected: 399 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 400 MacroBuilder &Builder) const { 401 // PS3 PPU defines. 402 Builder.defineMacro("__PPC__"); 403 Builder.defineMacro("__PPU__"); 404 Builder.defineMacro("__CELLOS_LV2__"); 405 Builder.defineMacro("__ELF__"); 406 Builder.defineMacro("__LP32__"); 407 Builder.defineMacro("_ARCH_PPC64"); 408 Builder.defineMacro("__powerpc64__"); 409 } 410 public: 411 PS3PPUTargetInfo(const std::string& triple) 412 : OSTargetInfo<Target>(triple) { 413 this->UserLabelPrefix = ""; 414 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 415 this->IntMaxType = TargetInfo::SignedLongLong; 416 this->UIntMaxType = TargetInfo::UnsignedLongLong; 417 this->Int64Type = TargetInfo::SignedLongLong; 418 this->SizeType = TargetInfo::UnsignedInt; 419 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 420 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 421 } 422 }; 423 424 // FIXME: Need a real SPU target. 425 // PS3 SPU Target 426 template<typename Target> 427 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 428 protected: 429 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 430 MacroBuilder &Builder) const { 431 // PS3 PPU defines. 432 Builder.defineMacro("__SPU__"); 433 Builder.defineMacro("__ELF__"); 434 } 435 public: 436 PS3SPUTargetInfo(const std::string& triple) 437 : OSTargetInfo<Target>(triple) { 438 this->UserLabelPrefix = ""; 439 } 440 }; 441 442 // AuroraUX target 443 template<typename Target> 444 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 445 protected: 446 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 447 MacroBuilder &Builder) const { 448 DefineStd(Builder, "sun", Opts); 449 DefineStd(Builder, "unix", Opts); 450 Builder.defineMacro("__ELF__"); 451 Builder.defineMacro("__svr4__"); 452 Builder.defineMacro("__SVR4"); 453 } 454 public: 455 AuroraUXTargetInfo(const std::string& triple) 456 : OSTargetInfo<Target>(triple) { 457 this->UserLabelPrefix = ""; 458 this->WCharType = this->SignedLong; 459 // FIXME: WIntType should be SignedLong 460 } 461 }; 462 463 // Solaris target 464 template<typename Target> 465 class SolarisTargetInfo : public OSTargetInfo<Target> { 466 protected: 467 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 468 MacroBuilder &Builder) const { 469 DefineStd(Builder, "sun", Opts); 470 DefineStd(Builder, "unix", Opts); 471 Builder.defineMacro("__ELF__"); 472 Builder.defineMacro("__svr4__"); 473 Builder.defineMacro("__SVR4"); 474 } 475 public: 476 SolarisTargetInfo(const std::string& triple) 477 : OSTargetInfo<Target>(triple) { 478 this->UserLabelPrefix = ""; 479 this->WCharType = this->SignedLong; 480 // FIXME: WIntType should be SignedLong 481 } 482 }; 483 484 // Windows target 485 template<typename Target> 486 class WindowsTargetInfo : public OSTargetInfo<Target> { 487 protected: 488 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 489 MacroBuilder &Builder) const { 490 Builder.defineMacro("_WIN32"); 491 } 492 void getVisualStudioDefines(const LangOptions &Opts, 493 MacroBuilder &Builder) const { 494 if (Opts.CPlusPlus) { 495 if (Opts.RTTI) 496 Builder.defineMacro("_CPPRTTI"); 497 498 if (Opts.Exceptions) 499 Builder.defineMacro("_CPPUNWIND"); 500 } 501 502 if (!Opts.CharIsSigned) 503 Builder.defineMacro("_CHAR_UNSIGNED"); 504 505 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 506 // but it works for now. 507 if (Opts.POSIXThreads) 508 Builder.defineMacro("_MT"); 509 510 if (Opts.MSCVersion != 0) 511 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 512 513 if (Opts.MicrosoftExt) { 514 Builder.defineMacro("_MSC_EXTENSIONS"); 515 516 if (Opts.CPlusPlus0x) { 517 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 518 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 519 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 520 } 521 } 522 523 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 524 } 525 526 public: 527 WindowsTargetInfo(const std::string &triple) 528 : OSTargetInfo<Target>(triple) {} 529 }; 530 531 } // end anonymous namespace. 532 533 //===----------------------------------------------------------------------===// 534 // Specific target implementations. 535 //===----------------------------------------------------------------------===// 536 537 namespace { 538 // PPC abstract base class 539 class PPCTargetInfo : public TargetInfo { 540 static const Builtin::Info BuiltinInfo[]; 541 static const char * const GCCRegNames[]; 542 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 543 public: 544 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 545 546 virtual void getTargetBuiltins(const Builtin::Info *&Records, 547 unsigned &NumRecords) const { 548 Records = BuiltinInfo; 549 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 550 } 551 552 virtual void getTargetDefines(const LangOptions &Opts, 553 MacroBuilder &Builder) const; 554 555 virtual void getGCCRegNames(const char * const *&Names, 556 unsigned &NumNames) const; 557 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 558 unsigned &NumAliases) const; 559 virtual bool validateAsmConstraint(const char *&Name, 560 TargetInfo::ConstraintInfo &Info) const { 561 switch (*Name) { 562 default: return false; 563 case 'O': // Zero 564 break; 565 case 'b': // Base register 566 case 'f': // Floating point register 567 Info.setAllowsRegister(); 568 break; 569 // FIXME: The following are added to allow parsing. 570 // I just took a guess at what the actions should be. 571 // Also, is more specific checking needed? I.e. specific registers? 572 case 'd': // Floating point register (containing 64-bit value) 573 case 'v': // Altivec vector register 574 Info.setAllowsRegister(); 575 break; 576 case 'w': 577 switch (Name[1]) { 578 case 'd':// VSX vector register to hold vector double data 579 case 'f':// VSX vector register to hold vector float data 580 case 's':// VSX vector register to hold scalar float data 581 case 'a':// Any VSX register 582 break; 583 default: 584 return false; 585 } 586 Info.setAllowsRegister(); 587 Name++; // Skip over 'w'. 588 break; 589 case 'h': // `MQ', `CTR', or `LINK' register 590 case 'q': // `MQ' register 591 case 'c': // `CTR' register 592 case 'l': // `LINK' register 593 case 'x': // `CR' register (condition register) number 0 594 case 'y': // `CR' register (condition register) 595 case 'z': // `XER[CA]' carry bit (part of the XER register) 596 Info.setAllowsRegister(); 597 break; 598 case 'I': // Signed 16-bit constant 599 case 'J': // Unsigned 16-bit constant shifted left 16 bits 600 // (use `L' instead for SImode constants) 601 case 'K': // Unsigned 16-bit constant 602 case 'L': // Signed 16-bit constant shifted left 16 bits 603 case 'M': // Constant larger than 31 604 case 'N': // Exact power of 2 605 case 'P': // Constant whose negation is a signed 16-bit constant 606 case 'G': // Floating point constant that can be loaded into a 607 // register with one instruction per word 608 case 'H': // Integer/Floating point constant that can be loaded 609 // into a register using three instructions 610 break; 611 case 'm': // Memory operand. Note that on PowerPC targets, m can 612 // include addresses that update the base register. It 613 // is therefore only safe to use `m' in an asm statement 614 // if that asm statement accesses the operand exactly once. 615 // The asm statement must also use `%U<opno>' as a 616 // placeholder for the "update" flag in the corresponding 617 // load or store instruction. For example: 618 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 619 // is correct but: 620 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 621 // is not. Use es rather than m if you don't want the base 622 // register to be updated. 623 case 'e': 624 if (Name[1] != 's') 625 return false; 626 // es: A "stable" memory operand; that is, one which does not 627 // include any automodification of the base register. Unlike 628 // `m', this constraint can be used in asm statements that 629 // might access the operand several times, or that might not 630 // access it at all. 631 Info.setAllowsMemory(); 632 Name++; // Skip over 'e'. 633 break; 634 case 'Q': // Memory operand that is an offset from a register (it is 635 // usually better to use `m' or `es' in asm statements) 636 case 'Z': // Memory operand that is an indexed or indirect from a 637 // register (it is usually better to use `m' or `es' in 638 // asm statements) 639 Info.setAllowsMemory(); 640 Info.setAllowsRegister(); 641 break; 642 case 'R': // AIX TOC entry 643 case 'a': // Address operand that is an indexed or indirect from a 644 // register (`p' is preferable for asm statements) 645 case 'S': // Constant suitable as a 64-bit mask operand 646 case 'T': // Constant suitable as a 32-bit mask operand 647 case 'U': // System V Release 4 small data area reference 648 case 't': // AND masks that can be performed by two rldic{l, r} 649 // instructions 650 case 'W': // Vector constant that does not require memory 651 case 'j': // Vector constant that is all zeros. 652 break; 653 // End FIXME. 654 } 655 return true; 656 } 657 virtual const char *getClobbers() const { 658 return ""; 659 } 660 }; 661 662 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 663 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 664 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 665 ALL_LANGUAGES }, 666 #include "clang/Basic/BuiltinsPPC.def" 667 }; 668 669 670 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 671 /// #defines that are not tied to a specific subtarget. 672 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 673 MacroBuilder &Builder) const { 674 // Target identification. 675 Builder.defineMacro("__ppc__"); 676 Builder.defineMacro("_ARCH_PPC"); 677 Builder.defineMacro("__powerpc__"); 678 Builder.defineMacro("__POWERPC__"); 679 if (PointerWidth == 64) { 680 Builder.defineMacro("_ARCH_PPC64"); 681 Builder.defineMacro("_LP64"); 682 Builder.defineMacro("__LP64__"); 683 Builder.defineMacro("__powerpc64__"); 684 Builder.defineMacro("__ppc64__"); 685 } else { 686 Builder.defineMacro("__ppc__"); 687 } 688 689 // Target properties. 690 if (getTriple().getOS() != llvm::Triple::NetBSD) 691 Builder.defineMacro("_BIG_ENDIAN"); 692 Builder.defineMacro("__BIG_ENDIAN__"); 693 694 // Subtarget options. 695 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 696 Builder.defineMacro("__REGISTER_PREFIX__", ""); 697 698 // FIXME: Should be controlled by command line option. 699 Builder.defineMacro("__LONG_DOUBLE_128__"); 700 701 if (Opts.AltiVec) { 702 Builder.defineMacro("__VEC__", "10206"); 703 Builder.defineMacro("__ALTIVEC__"); 704 } 705 } 706 707 708 const char * const PPCTargetInfo::GCCRegNames[] = { 709 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 710 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 711 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 712 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 713 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 714 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 715 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 716 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 717 "mq", "lr", "ctr", "ap", 718 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 719 "xer", 720 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 721 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 722 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 723 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 724 "vrsave", "vscr", 725 "spe_acc", "spefscr", 726 "sfp" 727 }; 728 729 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 730 unsigned &NumNames) const { 731 Names = GCCRegNames; 732 NumNames = llvm::array_lengthof(GCCRegNames); 733 } 734 735 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 736 // While some of these aliases do map to different registers 737 // they still share the same register name. 738 { { "0" }, "r0" }, 739 { { "1"}, "r1" }, 740 { { "2" }, "r2" }, 741 { { "3" }, "r3" }, 742 { { "4" }, "r4" }, 743 { { "5" }, "r5" }, 744 { { "6" }, "r6" }, 745 { { "7" }, "r7" }, 746 { { "8" }, "r8" }, 747 { { "9" }, "r9" }, 748 { { "10" }, "r10" }, 749 { { "11" }, "r11" }, 750 { { "12" }, "r12" }, 751 { { "13" }, "r13" }, 752 { { "14" }, "r14" }, 753 { { "15" }, "r15" }, 754 { { "16" }, "r16" }, 755 { { "17" }, "r17" }, 756 { { "18" }, "r18" }, 757 { { "19" }, "r19" }, 758 { { "20" }, "r20" }, 759 { { "21" }, "r21" }, 760 { { "22" }, "r22" }, 761 { { "23" }, "r23" }, 762 { { "24" }, "r24" }, 763 { { "25" }, "r25" }, 764 { { "26" }, "r26" }, 765 { { "27" }, "r27" }, 766 { { "28" }, "r28" }, 767 { { "29" }, "r29" }, 768 { { "30" }, "r30" }, 769 { { "31" }, "r31" }, 770 { { "fr0" }, "f0" }, 771 { { "fr1" }, "f1" }, 772 { { "fr2" }, "f2" }, 773 { { "fr3" }, "f3" }, 774 { { "fr4" }, "f4" }, 775 { { "fr5" }, "f5" }, 776 { { "fr6" }, "f6" }, 777 { { "fr7" }, "f7" }, 778 { { "fr8" }, "f8" }, 779 { { "fr9" }, "f9" }, 780 { { "fr10" }, "f10" }, 781 { { "fr11" }, "f11" }, 782 { { "fr12" }, "f12" }, 783 { { "fr13" }, "f13" }, 784 { { "fr14" }, "f14" }, 785 { { "fr15" }, "f15" }, 786 { { "fr16" }, "f16" }, 787 { { "fr17" }, "f17" }, 788 { { "fr18" }, "f18" }, 789 { { "fr19" }, "f19" }, 790 { { "fr20" }, "f20" }, 791 { { "fr21" }, "f21" }, 792 { { "fr22" }, "f22" }, 793 { { "fr23" }, "f23" }, 794 { { "fr24" }, "f24" }, 795 { { "fr25" }, "f25" }, 796 { { "fr26" }, "f26" }, 797 { { "fr27" }, "f27" }, 798 { { "fr28" }, "f28" }, 799 { { "fr29" }, "f29" }, 800 { { "fr30" }, "f30" }, 801 { { "fr31" }, "f31" }, 802 { { "cc" }, "cr0" }, 803 }; 804 805 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 806 unsigned &NumAliases) const { 807 Aliases = GCCRegAliases; 808 NumAliases = llvm::array_lengthof(GCCRegAliases); 809 } 810 } // end anonymous namespace. 811 812 namespace { 813 class PPC32TargetInfo : public PPCTargetInfo { 814 public: 815 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 816 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 817 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 818 819 switch (getTriple().getOS()) { 820 case llvm::Triple::FreeBSD: 821 case llvm::Triple::NetBSD: 822 SizeType = UnsignedInt; 823 break; 824 default: 825 break; 826 } 827 } 828 829 virtual const char *getVAListDeclaration() const { 830 // This is the ELF definition, and is overridden by the Darwin sub-target 831 return "typedef struct __va_list_tag {" 832 " unsigned char gpr;" 833 " unsigned char fpr;" 834 " unsigned short reserved;" 835 " void* overflow_arg_area;" 836 " void* reg_save_area;" 837 "} __builtin_va_list[1];"; 838 } 839 }; 840 } // end anonymous namespace. 841 842 namespace { 843 class PPC64TargetInfo : public PPCTargetInfo { 844 public: 845 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 846 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 847 IntMaxType = SignedLong; 848 UIntMaxType = UnsignedLong; 849 Int64Type = SignedLong; 850 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 851 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 852 } 853 virtual const char *getVAListDeclaration() const { 854 return "typedef char* __builtin_va_list;"; 855 } 856 }; 857 } // end anonymous namespace. 858 859 860 namespace { 861 class DarwinPPC32TargetInfo : 862 public DarwinTargetInfo<PPC32TargetInfo> { 863 public: 864 DarwinPPC32TargetInfo(const std::string& triple) 865 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 866 HasAlignMac68kSupport = true; 867 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 868 } 869 virtual const char *getVAListDeclaration() const { 870 return "typedef char* __builtin_va_list;"; 871 } 872 }; 873 874 class DarwinPPC64TargetInfo : 875 public DarwinTargetInfo<PPC64TargetInfo> { 876 public: 877 DarwinPPC64TargetInfo(const std::string& triple) 878 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 879 HasAlignMac68kSupport = true; 880 } 881 }; 882 } // end anonymous namespace. 883 884 namespace { 885 static const unsigned PTXAddrSpaceMap[] = { 886 0, // opencl_global 887 4, // opencl_local 888 1 // opencl_constant 889 }; 890 class PTXTargetInfo : public TargetInfo { 891 static const char * const GCCRegNames[]; 892 static const Builtin::Info BuiltinInfo[]; 893 std::vector<llvm::StringRef> AvailableFeatures; 894 public: 895 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 896 TLSSupported = false; 897 LongWidth = LongAlign = 64; 898 AddrSpaceMap = &PTXAddrSpaceMap; 899 // Define available target features 900 // These must be defined in sorted order! 901 AvailableFeatures.push_back("compute10"); 902 AvailableFeatures.push_back("compute11"); 903 AvailableFeatures.push_back("compute12"); 904 AvailableFeatures.push_back("compute13"); 905 AvailableFeatures.push_back("compute20"); 906 AvailableFeatures.push_back("double"); 907 AvailableFeatures.push_back("no-fma"); 908 AvailableFeatures.push_back("ptx20"); 909 AvailableFeatures.push_back("ptx21"); 910 AvailableFeatures.push_back("ptx22"); 911 AvailableFeatures.push_back("ptx23"); 912 AvailableFeatures.push_back("sm10"); 913 AvailableFeatures.push_back("sm11"); 914 AvailableFeatures.push_back("sm12"); 915 AvailableFeatures.push_back("sm13"); 916 AvailableFeatures.push_back("sm20"); 917 AvailableFeatures.push_back("sm21"); 918 AvailableFeatures.push_back("sm22"); 919 AvailableFeatures.push_back("sm23"); 920 } 921 virtual void getTargetDefines(const LangOptions &Opts, 922 MacroBuilder &Builder) const { 923 Builder.defineMacro("__PTX__"); 924 } 925 virtual void getTargetBuiltins(const Builtin::Info *&Records, 926 unsigned &NumRecords) const { 927 Records = BuiltinInfo; 928 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 929 } 930 931 virtual void getGCCRegNames(const char * const *&Names, 932 unsigned &NumNames) const; 933 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 934 unsigned &NumAliases) const { 935 // No aliases. 936 Aliases = 0; 937 NumAliases = 0; 938 } 939 virtual bool validateAsmConstraint(const char *&Name, 940 TargetInfo::ConstraintInfo &info) const { 941 // FIXME: implement 942 return true; 943 } 944 virtual const char *getClobbers() const { 945 // FIXME: Is this really right? 946 return ""; 947 } 948 virtual const char *getVAListDeclaration() const { 949 // FIXME: implement 950 return "typedef char* __builtin_va_list;"; 951 } 952 953 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 954 const std::string &Name, 955 bool Enabled) const; 956 }; 957 958 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 959 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 960 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 961 ALL_LANGUAGES }, 962 #include "clang/Basic/BuiltinsPTX.def" 963 }; 964 965 const char * const PTXTargetInfo::GCCRegNames[] = { 966 "r0" 967 }; 968 969 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 970 unsigned &NumNames) const { 971 Names = GCCRegNames; 972 NumNames = llvm::array_lengthof(GCCRegNames); 973 } 974 975 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 976 const std::string &Name, 977 bool Enabled) const { 978 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 979 Name)) { 980 Features[Name] = Enabled; 981 return true; 982 } else { 983 return false; 984 } 985 } 986 987 class PTX32TargetInfo : public PTXTargetInfo { 988 public: 989 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 990 PointerWidth = PointerAlign = 32; 991 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 992 DescriptionString 993 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 994 } 995 }; 996 997 class PTX64TargetInfo : public PTXTargetInfo { 998 public: 999 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1000 PointerWidth = PointerAlign = 64; 1001 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1002 DescriptionString 1003 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1004 } 1005 }; 1006 } 1007 1008 namespace { 1009 // MBlaze abstract base class 1010 class MBlazeTargetInfo : public TargetInfo { 1011 static const char * const GCCRegNames[]; 1012 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1013 1014 public: 1015 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1016 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1017 } 1018 1019 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1020 unsigned &NumRecords) const { 1021 // FIXME: Implement. 1022 Records = 0; 1023 NumRecords = 0; 1024 } 1025 1026 virtual void getTargetDefines(const LangOptions &Opts, 1027 MacroBuilder &Builder) const; 1028 1029 virtual const char *getVAListDeclaration() const { 1030 return "typedef char* __builtin_va_list;"; 1031 } 1032 virtual const char *getTargetPrefix() const { 1033 return "mblaze"; 1034 } 1035 virtual void getGCCRegNames(const char * const *&Names, 1036 unsigned &NumNames) const; 1037 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1038 unsigned &NumAliases) const; 1039 virtual bool validateAsmConstraint(const char *&Name, 1040 TargetInfo::ConstraintInfo &Info) const { 1041 switch (*Name) { 1042 default: return false; 1043 case 'O': // Zero 1044 return true; 1045 case 'b': // Base register 1046 case 'f': // Floating point register 1047 Info.setAllowsRegister(); 1048 return true; 1049 } 1050 } 1051 virtual const char *getClobbers() const { 1052 return ""; 1053 } 1054 }; 1055 1056 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1057 /// #defines that are not tied to a specific subtarget. 1058 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1059 MacroBuilder &Builder) const { 1060 // Target identification. 1061 Builder.defineMacro("__microblaze__"); 1062 Builder.defineMacro("_ARCH_MICROBLAZE"); 1063 Builder.defineMacro("__MICROBLAZE__"); 1064 1065 // Target properties. 1066 Builder.defineMacro("_BIG_ENDIAN"); 1067 Builder.defineMacro("__BIG_ENDIAN__"); 1068 1069 // Subtarget options. 1070 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1071 } 1072 1073 1074 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1075 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1076 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1077 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1078 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1079 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1080 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1081 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1082 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1083 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1084 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1085 }; 1086 1087 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1088 unsigned &NumNames) const { 1089 Names = GCCRegNames; 1090 NumNames = llvm::array_lengthof(GCCRegNames); 1091 } 1092 1093 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1094 { {"f0"}, "r0" }, 1095 { {"f1"}, "r1" }, 1096 { {"f2"}, "r2" }, 1097 { {"f3"}, "r3" }, 1098 { {"f4"}, "r4" }, 1099 { {"f5"}, "r5" }, 1100 { {"f6"}, "r6" }, 1101 { {"f7"}, "r7" }, 1102 { {"f8"}, "r8" }, 1103 { {"f9"}, "r9" }, 1104 { {"f10"}, "r10" }, 1105 { {"f11"}, "r11" }, 1106 { {"f12"}, "r12" }, 1107 { {"f13"}, "r13" }, 1108 { {"f14"}, "r14" }, 1109 { {"f15"}, "r15" }, 1110 { {"f16"}, "r16" }, 1111 { {"f17"}, "r17" }, 1112 { {"f18"}, "r18" }, 1113 { {"f19"}, "r19" }, 1114 { {"f20"}, "r20" }, 1115 { {"f21"}, "r21" }, 1116 { {"f22"}, "r22" }, 1117 { {"f23"}, "r23" }, 1118 { {"f24"}, "r24" }, 1119 { {"f25"}, "r25" }, 1120 { {"f26"}, "r26" }, 1121 { {"f27"}, "r27" }, 1122 { {"f28"}, "r28" }, 1123 { {"f29"}, "r29" }, 1124 { {"f30"}, "r30" }, 1125 { {"f31"}, "r31" }, 1126 }; 1127 1128 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1129 unsigned &NumAliases) const { 1130 Aliases = GCCRegAliases; 1131 NumAliases = llvm::array_lengthof(GCCRegAliases); 1132 } 1133 } // end anonymous namespace. 1134 1135 namespace { 1136 // Namespace for x86 abstract base class 1137 const Builtin::Info BuiltinInfo[] = { 1138 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1139 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1140 ALL_LANGUAGES }, 1141 #include "clang/Basic/BuiltinsX86.def" 1142 }; 1143 1144 static const char* const GCCRegNames[] = { 1145 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1146 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1147 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1148 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1149 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1151 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1152 }; 1153 1154 const TargetInfo::AddlRegName AddlRegNames[] = { 1155 { { "al", "ah", "eax", "rax" }, 0 }, 1156 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1157 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1158 { { "dl", "dh", "edx", "rdx" }, 1 }, 1159 { { "esi", "rsi" }, 4 }, 1160 { { "edi", "rdi" }, 5 }, 1161 { { "esp", "rsp" }, 7 }, 1162 { { "ebp", "rbp" }, 6 }, 1163 }; 1164 1165 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1166 // most of the implementation can be shared. 1167 class X86TargetInfo : public TargetInfo { 1168 enum X86SSEEnum { 1169 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1170 } SSELevel; 1171 enum MMX3DNowEnum { 1172 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1173 } MMX3DNowLevel; 1174 1175 bool HasAES; 1176 bool HasAVX; 1177 1178 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1179 /// 1180 /// Each enumeration represents a particular CPU supported by Clang. These 1181 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1182 enum CPUKind { 1183 CK_Generic, 1184 1185 /// \name i386 1186 /// i386-generation processors. 1187 //@{ 1188 CK_i386, 1189 //@} 1190 1191 /// \name i486 1192 /// i486-generation processors. 1193 //@{ 1194 CK_i486, 1195 CK_WinChipC6, 1196 CK_WinChip2, 1197 CK_C3, 1198 //@} 1199 1200 /// \name i586 1201 /// i586-generation processors, P5 microarchitecture based. 1202 //@{ 1203 CK_i586, 1204 CK_Pentium, 1205 CK_PentiumMMX, 1206 //@} 1207 1208 /// \name i686 1209 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1210 //@{ 1211 CK_i686, 1212 CK_PentiumPro, 1213 CK_Pentium2, 1214 CK_Pentium3, 1215 CK_Pentium3M, 1216 CK_PentiumM, 1217 CK_C3_2, 1218 1219 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1220 /// Clang however has some logic to suport this. 1221 // FIXME: Warn, deprecate, and potentially remove this. 1222 CK_Yonah, 1223 //@} 1224 1225 /// \name Netburst 1226 /// Netburst microarchitecture based processors. 1227 //@{ 1228 CK_Pentium4, 1229 CK_Pentium4M, 1230 CK_Prescott, 1231 CK_Nocona, 1232 //@} 1233 1234 /// \name Core 1235 /// Core microarchitecture based processors. 1236 //@{ 1237 CK_Core2, 1238 1239 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1240 /// codename which GCC no longer accepts as an option to -march, but Clang 1241 /// has some logic for recognizing it. 1242 // FIXME: Warn, deprecate, and potentially remove this. 1243 CK_Penryn, 1244 //@} 1245 1246 /// \name Atom 1247 /// Atom processors 1248 //@{ 1249 CK_Atom, 1250 //@} 1251 1252 /// \name Nehalem 1253 /// Nehalem microarchitecture based processors. 1254 //@{ 1255 CK_Corei7, 1256 CK_Corei7AVX, 1257 CK_CoreAVXi, 1258 //@} 1259 1260 /// \name K6 1261 /// K6 architecture processors. 1262 //@{ 1263 CK_K6, 1264 CK_K6_2, 1265 CK_K6_3, 1266 //@} 1267 1268 /// \name K7 1269 /// K7 architecture processors. 1270 //@{ 1271 CK_Athlon, 1272 CK_AthlonThunderbird, 1273 CK_Athlon4, 1274 CK_AthlonXP, 1275 CK_AthlonMP, 1276 //@} 1277 1278 /// \name K8 1279 /// K8 architecture processors. 1280 //@{ 1281 CK_Athlon64, 1282 CK_Athlon64SSE3, 1283 CK_AthlonFX, 1284 CK_K8, 1285 CK_K8SSE3, 1286 CK_Opteron, 1287 CK_OpteronSSE3, 1288 1289 /// This specification is deprecated and will be removed in the future. 1290 /// Users should prefer \see CK_K8. 1291 // FIXME: Warn on this when the CPU is set to it. 1292 CK_x86_64, 1293 //@} 1294 1295 /// \name Geode 1296 /// Geode processors. 1297 //@{ 1298 CK_Geode 1299 //@} 1300 } CPU; 1301 1302 public: 1303 X86TargetInfo(const std::string& triple) 1304 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1305 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1306 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1307 } 1308 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1309 unsigned &NumRecords) const { 1310 Records = BuiltinInfo; 1311 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1312 } 1313 virtual void getGCCRegNames(const char * const *&Names, 1314 unsigned &NumNames) const { 1315 Names = GCCRegNames; 1316 NumNames = llvm::array_lengthof(GCCRegNames); 1317 } 1318 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1319 unsigned &NumAliases) const { 1320 Aliases = 0; 1321 NumAliases = 0; 1322 } 1323 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1324 unsigned &NumNames) const { 1325 Names = AddlRegNames; 1326 NumNames = llvm::array_lengthof(AddlRegNames); 1327 } 1328 virtual bool validateAsmConstraint(const char *&Name, 1329 TargetInfo::ConstraintInfo &info) const; 1330 virtual std::string convertConstraint(const char *&Constraint) const; 1331 virtual const char *getClobbers() const { 1332 return "~{dirflag},~{fpsr},~{flags}"; 1333 } 1334 virtual void getTargetDefines(const LangOptions &Opts, 1335 MacroBuilder &Builder) const; 1336 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1337 const std::string &Name, 1338 bool Enabled) const; 1339 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1340 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1341 virtual const char* getABI() const { 1342 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1343 } 1344 virtual bool setCPU(const std::string &Name) { 1345 CPU = llvm::StringSwitch<CPUKind>(Name) 1346 .Case("i386", CK_i386) 1347 .Case("i486", CK_i486) 1348 .Case("winchip-c6", CK_WinChipC6) 1349 .Case("winchip2", CK_WinChip2) 1350 .Case("c3", CK_C3) 1351 .Case("i586", CK_i586) 1352 .Case("pentium", CK_Pentium) 1353 .Case("pentium-mmx", CK_PentiumMMX) 1354 .Case("i686", CK_i686) 1355 .Case("pentiumpro", CK_PentiumPro) 1356 .Case("pentium2", CK_Pentium2) 1357 .Case("pentium3", CK_Pentium3) 1358 .Case("pentium3m", CK_Pentium3M) 1359 .Case("pentium-m", CK_PentiumM) 1360 .Case("c3-2", CK_C3_2) 1361 .Case("yonah", CK_Yonah) 1362 .Case("pentium4", CK_Pentium4) 1363 .Case("pentium4m", CK_Pentium4M) 1364 .Case("prescott", CK_Prescott) 1365 .Case("nocona", CK_Nocona) 1366 .Case("core2", CK_Core2) 1367 .Case("penryn", CK_Penryn) 1368 .Case("atom", CK_Atom) 1369 .Case("corei7", CK_Corei7) 1370 .Case("corei7-avx", CK_Corei7AVX) 1371 .Case("core-avx-i", CK_CoreAVXi) 1372 .Case("k6", CK_K6) 1373 .Case("k6-2", CK_K6_2) 1374 .Case("k6-3", CK_K6_3) 1375 .Case("athlon", CK_Athlon) 1376 .Case("athlon-tbird", CK_AthlonThunderbird) 1377 .Case("athlon-4", CK_Athlon4) 1378 .Case("athlon-xp", CK_AthlonXP) 1379 .Case("athlon-mp", CK_AthlonMP) 1380 .Case("athlon64", CK_Athlon64) 1381 .Case("athlon64-sse3", CK_Athlon64SSE3) 1382 .Case("athlon-fx", CK_AthlonFX) 1383 .Case("k8", CK_K8) 1384 .Case("k8-sse3", CK_K8SSE3) 1385 .Case("opteron", CK_Opteron) 1386 .Case("opteron-sse3", CK_OpteronSSE3) 1387 .Case("x86-64", CK_x86_64) 1388 .Case("geode", CK_Geode) 1389 .Default(CK_Generic); 1390 1391 // Perform any per-CPU checks necessary to determine if this CPU is 1392 // acceptable. 1393 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1394 // invalid without explaining *why*. 1395 switch (CPU) { 1396 case CK_Generic: 1397 // No processor selected! 1398 return false; 1399 1400 case CK_i386: 1401 case CK_i486: 1402 case CK_WinChipC6: 1403 case CK_WinChip2: 1404 case CK_C3: 1405 case CK_i586: 1406 case CK_Pentium: 1407 case CK_PentiumMMX: 1408 case CK_i686: 1409 case CK_PentiumPro: 1410 case CK_Pentium2: 1411 case CK_Pentium3: 1412 case CK_Pentium3M: 1413 case CK_PentiumM: 1414 case CK_Yonah: 1415 case CK_C3_2: 1416 case CK_Pentium4: 1417 case CK_Pentium4M: 1418 case CK_Prescott: 1419 case CK_K6: 1420 case CK_K6_2: 1421 case CK_K6_3: 1422 case CK_Athlon: 1423 case CK_AthlonThunderbird: 1424 case CK_Athlon4: 1425 case CK_AthlonXP: 1426 case CK_AthlonMP: 1427 case CK_Geode: 1428 // Only accept certain architectures when compiling in 32-bit mode. 1429 if (PointerWidth != 32) 1430 return false; 1431 1432 // Fallthrough 1433 case CK_Nocona: 1434 case CK_Core2: 1435 case CK_Penryn: 1436 case CK_Atom: 1437 case CK_Corei7: 1438 case CK_Corei7AVX: 1439 case CK_CoreAVXi: 1440 case CK_Athlon64: 1441 case CK_Athlon64SSE3: 1442 case CK_AthlonFX: 1443 case CK_K8: 1444 case CK_K8SSE3: 1445 case CK_Opteron: 1446 case CK_OpteronSSE3: 1447 case CK_x86_64: 1448 return true; 1449 } 1450 llvm_unreachable("Unhandled CPU kind"); 1451 } 1452 }; 1453 1454 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1455 // FIXME: This should not be here. 1456 Features["3dnow"] = false; 1457 Features["3dnowa"] = false; 1458 Features["mmx"] = false; 1459 Features["sse"] = false; 1460 Features["sse2"] = false; 1461 Features["sse3"] = false; 1462 Features["ssse3"] = false; 1463 Features["sse41"] = false; 1464 Features["sse42"] = false; 1465 Features["aes"] = false; 1466 Features["avx"] = false; 1467 1468 // LLVM does not currently recognize this. 1469 // Features["sse4a"] = false; 1470 1471 // FIXME: This *really* should not be here. 1472 1473 // X86_64 always has SSE2. 1474 if (PointerWidth == 64) 1475 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1476 1477 switch (CPU) { 1478 case CK_Generic: 1479 case CK_i386: 1480 case CK_i486: 1481 case CK_i586: 1482 case CK_Pentium: 1483 case CK_i686: 1484 case CK_PentiumPro: 1485 break; 1486 case CK_PentiumMMX: 1487 case CK_Pentium2: 1488 setFeatureEnabled(Features, "mmx", true); 1489 break; 1490 case CK_Pentium3: 1491 case CK_Pentium3M: 1492 setFeatureEnabled(Features, "mmx", true); 1493 setFeatureEnabled(Features, "sse", true); 1494 break; 1495 case CK_PentiumM: 1496 case CK_Pentium4: 1497 case CK_Pentium4M: 1498 case CK_x86_64: 1499 setFeatureEnabled(Features, "mmx", true); 1500 setFeatureEnabled(Features, "sse2", true); 1501 break; 1502 case CK_Yonah: 1503 case CK_Prescott: 1504 case CK_Nocona: 1505 setFeatureEnabled(Features, "mmx", true); 1506 setFeatureEnabled(Features, "sse3", true); 1507 break; 1508 case CK_Core2: 1509 setFeatureEnabled(Features, "mmx", true); 1510 setFeatureEnabled(Features, "ssse3", true); 1511 break; 1512 case CK_Penryn: 1513 setFeatureEnabled(Features, "mmx", true); 1514 setFeatureEnabled(Features, "sse4", true); 1515 Features["sse42"] = false; 1516 break; 1517 case CK_Atom: 1518 setFeatureEnabled(Features, "mmx", true); 1519 setFeatureEnabled(Features, "ssse3", true); 1520 break; 1521 case CK_Corei7: 1522 setFeatureEnabled(Features, "mmx", true); 1523 setFeatureEnabled(Features, "sse4", true); 1524 setFeatureEnabled(Features, "aes", true); 1525 break; 1526 case CK_Corei7AVX: 1527 case CK_CoreAVXi: 1528 setFeatureEnabled(Features, "mmx", true); 1529 setFeatureEnabled(Features, "sse4", true); 1530 setFeatureEnabled(Features, "aes", true); 1531 //setFeatureEnabled(Features, "avx", true); 1532 break; 1533 case CK_K6: 1534 case CK_WinChipC6: 1535 setFeatureEnabled(Features, "mmx", true); 1536 break; 1537 case CK_K6_2: 1538 case CK_K6_3: 1539 case CK_WinChip2: 1540 case CK_C3: 1541 setFeatureEnabled(Features, "3dnow", true); 1542 break; 1543 case CK_Athlon: 1544 case CK_AthlonThunderbird: 1545 case CK_Geode: 1546 setFeatureEnabled(Features, "3dnowa", true); 1547 break; 1548 case CK_Athlon4: 1549 case CK_AthlonXP: 1550 case CK_AthlonMP: 1551 setFeatureEnabled(Features, "sse", true); 1552 setFeatureEnabled(Features, "3dnowa", true); 1553 break; 1554 case CK_K8: 1555 case CK_Opteron: 1556 case CK_Athlon64: 1557 case CK_AthlonFX: 1558 setFeatureEnabled(Features, "sse2", true); 1559 setFeatureEnabled(Features, "3dnowa", true); 1560 break; 1561 case CK_K8SSE3: 1562 case CK_OpteronSSE3: 1563 case CK_Athlon64SSE3: 1564 setFeatureEnabled(Features, "sse3", true); 1565 setFeatureEnabled(Features, "3dnowa", true); 1566 break; 1567 case CK_C3_2: 1568 setFeatureEnabled(Features, "mmx", true); 1569 setFeatureEnabled(Features, "sse", true); 1570 break; 1571 } 1572 } 1573 1574 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1575 const std::string &Name, 1576 bool Enabled) const { 1577 // FIXME: This *really* should not be here. We need some way of translating 1578 // options into llvm subtarget features. 1579 if (!Features.count(Name) && 1580 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1581 return false; 1582 1583 if (Enabled) { 1584 if (Name == "mmx") 1585 Features["mmx"] = true; 1586 else if (Name == "sse") 1587 Features["sse"] = true; 1588 else if (Name == "sse2") 1589 Features["sse"] = Features["sse2"] = true; 1590 else if (Name == "sse3") 1591 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1592 else if (Name == "ssse3") 1593 Features["sse"] = Features["sse2"] = Features["sse3"] = 1594 Features["ssse3"] = true; 1595 else if (Name == "sse4" || Name == "sse4.2") 1596 Features["sse"] = Features["sse2"] = Features["sse3"] = 1597 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1598 else if (Name == "sse4.1") 1599 Features["sse"] = Features["sse2"] = Features["sse3"] = 1600 Features["ssse3"] = Features["sse41"] = true; 1601 else if (Name == "3dnow") 1602 Features["mmx"] = Features["3dnow"] = true; 1603 else if (Name == "3dnowa") 1604 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1605 else if (Name == "aes") 1606 Features["aes"] = true; 1607 else if (Name == "avx") 1608 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1609 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1610 } else { 1611 if (Name == "mmx") 1612 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1613 else if (Name == "sse") 1614 Features["sse"] = Features["sse2"] = Features["sse3"] = 1615 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1616 else if (Name == "sse2") 1617 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1618 Features["sse41"] = Features["sse42"] = false; 1619 else if (Name == "sse3") 1620 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1621 Features["sse42"] = false; 1622 else if (Name == "ssse3") 1623 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1624 else if (Name == "sse4" || Name == "sse4.1") 1625 Features["sse41"] = Features["sse42"] = false; 1626 else if (Name == "sse4.2") 1627 Features["sse42"] = false; 1628 else if (Name == "3dnow") 1629 Features["3dnow"] = Features["3dnowa"] = false; 1630 else if (Name == "3dnowa") 1631 Features["3dnowa"] = false; 1632 else if (Name == "aes") 1633 Features["aes"] = false; 1634 else if (Name == "avx") 1635 Features["avx"] = false; 1636 } 1637 1638 return true; 1639 } 1640 1641 /// HandleTargetOptions - Perform initialization based on the user 1642 /// configured set of features. 1643 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1644 // Remember the maximum enabled sselevel. 1645 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1646 // Ignore disabled features. 1647 if (Features[i][0] == '-') 1648 continue; 1649 1650 if (Features[i].substr(1) == "aes") { 1651 HasAES = true; 1652 continue; 1653 } 1654 1655 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1656 // For now let it be enabled together with other SSE levels. 1657 if (Features[i].substr(1) == "avx") { 1658 HasAVX = true; 1659 continue; 1660 } 1661 1662 assert(Features[i][0] == '+' && "Invalid target feature!"); 1663 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1664 .Case("sse42", SSE42) 1665 .Case("sse41", SSE41) 1666 .Case("ssse3", SSSE3) 1667 .Case("sse3", SSE3) 1668 .Case("sse2", SSE2) 1669 .Case("sse", SSE1) 1670 .Default(NoSSE); 1671 SSELevel = std::max(SSELevel, Level); 1672 1673 MMX3DNowEnum ThreeDNowLevel = 1674 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1675 .Case("3dnowa", AMD3DNowAthlon) 1676 .Case("3dnow", AMD3DNow) 1677 .Case("mmx", MMX) 1678 .Default(NoMMX3DNow); 1679 1680 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1681 } 1682 1683 // Don't tell the backend if we're turning off mmx; it will end up disabling 1684 // SSE, which we don't want. 1685 std::vector<std::string>::iterator it; 1686 it = std::find(Features.begin(), Features.end(), "-mmx"); 1687 if (it != Features.end()) 1688 Features.erase(it); 1689 } 1690 1691 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1692 /// definitions for this particular subtarget. 1693 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1694 MacroBuilder &Builder) const { 1695 // Target identification. 1696 if (PointerWidth == 64) { 1697 Builder.defineMacro("_LP64"); 1698 Builder.defineMacro("__LP64__"); 1699 Builder.defineMacro("__amd64__"); 1700 Builder.defineMacro("__amd64"); 1701 Builder.defineMacro("__x86_64"); 1702 Builder.defineMacro("__x86_64__"); 1703 } else { 1704 DefineStd(Builder, "i386", Opts); 1705 } 1706 1707 // Subtarget options. 1708 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1709 // truly should be based on -mtune options. 1710 switch (CPU) { 1711 case CK_Generic: 1712 break; 1713 case CK_i386: 1714 // The rest are coming from the i386 define above. 1715 Builder.defineMacro("__tune_i386__"); 1716 break; 1717 case CK_i486: 1718 case CK_WinChipC6: 1719 case CK_WinChip2: 1720 case CK_C3: 1721 Builder.defineMacro("__i486"); 1722 Builder.defineMacro("__i486__"); 1723 Builder.defineMacro("__tune_i486__"); 1724 break; 1725 case CK_PentiumMMX: 1726 Builder.defineMacro("__pentium_mmx__"); 1727 Builder.defineMacro("__tune_pentium_mmx__"); 1728 // Fallthrough 1729 case CK_i586: 1730 case CK_Pentium: 1731 Builder.defineMacro("__i586"); 1732 Builder.defineMacro("__i586__"); 1733 Builder.defineMacro("__tune_i586__"); 1734 Builder.defineMacro("__pentium"); 1735 Builder.defineMacro("__pentium__"); 1736 Builder.defineMacro("__tune_pentium__"); 1737 break; 1738 case CK_Pentium3: 1739 case CK_Pentium3M: 1740 case CK_PentiumM: 1741 Builder.defineMacro("__tune_pentium3__"); 1742 // Fallthrough 1743 case CK_Pentium2: 1744 case CK_C3_2: 1745 Builder.defineMacro("__tune_pentium2__"); 1746 // Fallthrough 1747 case CK_PentiumPro: 1748 Builder.defineMacro("__tune_i686__"); 1749 Builder.defineMacro("__tune_pentiumpro__"); 1750 // Fallthrough 1751 case CK_i686: 1752 Builder.defineMacro("__i686"); 1753 Builder.defineMacro("__i686__"); 1754 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1755 Builder.defineMacro("__pentiumpro"); 1756 Builder.defineMacro("__pentiumpro__"); 1757 break; 1758 case CK_Pentium4: 1759 case CK_Pentium4M: 1760 Builder.defineMacro("__pentium4"); 1761 Builder.defineMacro("__pentium4__"); 1762 Builder.defineMacro("__tune_pentium4__"); 1763 break; 1764 case CK_Yonah: 1765 case CK_Prescott: 1766 case CK_Nocona: 1767 Builder.defineMacro("__nocona"); 1768 Builder.defineMacro("__nocona__"); 1769 Builder.defineMacro("__tune_nocona__"); 1770 break; 1771 case CK_Core2: 1772 case CK_Penryn: 1773 Builder.defineMacro("__core2"); 1774 Builder.defineMacro("__core2__"); 1775 Builder.defineMacro("__tune_core2__"); 1776 break; 1777 case CK_Atom: 1778 Builder.defineMacro("__atom"); 1779 Builder.defineMacro("__atom__"); 1780 Builder.defineMacro("__tune_atom__"); 1781 break; 1782 case CK_Corei7: 1783 case CK_Corei7AVX: 1784 case CK_CoreAVXi: 1785 Builder.defineMacro("__corei7"); 1786 Builder.defineMacro("__corei7__"); 1787 Builder.defineMacro("__tune_corei7__"); 1788 break; 1789 case CK_K6_2: 1790 Builder.defineMacro("__k6_2__"); 1791 Builder.defineMacro("__tune_k6_2__"); 1792 // Fallthrough 1793 case CK_K6_3: 1794 if (CPU != CK_K6_2) { // In case of fallthrough 1795 // FIXME: GCC may be enabling these in cases where some other k6 1796 // architecture is specified but -m3dnow is explicitly provided. The 1797 // exact semantics need to be determined and emulated here. 1798 Builder.defineMacro("__k6_3__"); 1799 Builder.defineMacro("__tune_k6_3__"); 1800 } 1801 // Fallthrough 1802 case CK_K6: 1803 Builder.defineMacro("__k6"); 1804 Builder.defineMacro("__k6__"); 1805 Builder.defineMacro("__tune_k6__"); 1806 break; 1807 case CK_Athlon: 1808 case CK_AthlonThunderbird: 1809 case CK_Athlon4: 1810 case CK_AthlonXP: 1811 case CK_AthlonMP: 1812 Builder.defineMacro("__athlon"); 1813 Builder.defineMacro("__athlon__"); 1814 Builder.defineMacro("__tune_athlon__"); 1815 if (SSELevel != NoSSE) { 1816 Builder.defineMacro("__athlon_sse__"); 1817 Builder.defineMacro("__tune_athlon_sse__"); 1818 } 1819 break; 1820 case CK_K8: 1821 case CK_K8SSE3: 1822 case CK_x86_64: 1823 case CK_Opteron: 1824 case CK_OpteronSSE3: 1825 case CK_Athlon64: 1826 case CK_Athlon64SSE3: 1827 case CK_AthlonFX: 1828 Builder.defineMacro("__k8"); 1829 Builder.defineMacro("__k8__"); 1830 Builder.defineMacro("__tune_k8__"); 1831 break; 1832 case CK_Geode: 1833 Builder.defineMacro("__geode"); 1834 Builder.defineMacro("__geode__"); 1835 Builder.defineMacro("__tune_geode__"); 1836 break; 1837 } 1838 1839 // Target properties. 1840 Builder.defineMacro("__LITTLE_ENDIAN__"); 1841 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1842 1843 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1844 // functions in glibc header files that use FP Stack inline asm which the 1845 // backend can't deal with (PR879). 1846 Builder.defineMacro("__NO_MATH_INLINES"); 1847 1848 if (HasAES) 1849 Builder.defineMacro("__AES__"); 1850 1851 if (HasAVX) 1852 Builder.defineMacro("__AVX__"); 1853 1854 // Each case falls through to the previous one here. 1855 switch (SSELevel) { 1856 case SSE42: 1857 Builder.defineMacro("__SSE4_2__"); 1858 case SSE41: 1859 Builder.defineMacro("__SSE4_1__"); 1860 case SSSE3: 1861 Builder.defineMacro("__SSSE3__"); 1862 case SSE3: 1863 Builder.defineMacro("__SSE3__"); 1864 case SSE2: 1865 Builder.defineMacro("__SSE2__"); 1866 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1867 case SSE1: 1868 Builder.defineMacro("__SSE__"); 1869 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1870 case NoSSE: 1871 break; 1872 } 1873 1874 if (Opts.MicrosoftExt && PointerWidth == 32) { 1875 switch (SSELevel) { 1876 case SSE42: 1877 case SSE41: 1878 case SSSE3: 1879 case SSE3: 1880 case SSE2: 1881 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1882 break; 1883 case SSE1: 1884 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1885 break; 1886 default: 1887 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1888 } 1889 } 1890 1891 // Each case falls through to the previous one here. 1892 switch (MMX3DNowLevel) { 1893 case AMD3DNowAthlon: 1894 Builder.defineMacro("__3dNOW_A__"); 1895 case AMD3DNow: 1896 Builder.defineMacro("__3dNOW__"); 1897 case MMX: 1898 Builder.defineMacro("__MMX__"); 1899 case NoMMX3DNow: 1900 break; 1901 } 1902 } 1903 1904 1905 bool 1906 X86TargetInfo::validateAsmConstraint(const char *&Name, 1907 TargetInfo::ConstraintInfo &Info) const { 1908 switch (*Name) { 1909 default: return false; 1910 case 'Y': // first letter of a pair: 1911 switch (*(Name+1)) { 1912 default: return false; 1913 case '0': // First SSE register. 1914 case 't': // Any SSE register, when SSE2 is enabled. 1915 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1916 case 'm': // any MMX register, when inter-unit moves enabled. 1917 break; // falls through to setAllowsRegister. 1918 } 1919 case 'a': // eax. 1920 case 'b': // ebx. 1921 case 'c': // ecx. 1922 case 'd': // edx. 1923 case 'S': // esi. 1924 case 'D': // edi. 1925 case 'A': // edx:eax. 1926 case 'f': // any x87 floating point stack register. 1927 case 't': // top of floating point stack. 1928 case 'u': // second from top of floating point stack. 1929 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1930 case 'y': // Any MMX register. 1931 case 'x': // Any SSE register. 1932 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1933 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1934 case 'l': // "Index" registers: any general register that can be used as an 1935 // index in a base+index memory access. 1936 Info.setAllowsRegister(); 1937 return true; 1938 case 'C': // SSE floating point constant. 1939 case 'G': // x87 floating point constant. 1940 case 'e': // 32-bit signed integer constant for use with zero-extending 1941 // x86_64 instructions. 1942 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1943 // x86_64 instructions. 1944 return true; 1945 } 1946 return false; 1947 } 1948 1949 1950 std::string 1951 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1952 switch (*Constraint) { 1953 case 'a': return std::string("{ax}"); 1954 case 'b': return std::string("{bx}"); 1955 case 'c': return std::string("{cx}"); 1956 case 'd': return std::string("{dx}"); 1957 case 'S': return std::string("{si}"); 1958 case 'D': return std::string("{di}"); 1959 case 'p': // address 1960 return std::string("im"); 1961 case 't': // top of floating point stack. 1962 return std::string("{st}"); 1963 case 'u': // second from top of floating point stack. 1964 return std::string("{st(1)}"); // second from top of floating point stack. 1965 default: 1966 return std::string(1, *Constraint); 1967 } 1968 } 1969 } // end anonymous namespace 1970 1971 namespace { 1972 // X86-32 generic target 1973 class X86_32TargetInfo : public X86TargetInfo { 1974 public: 1975 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1976 DoubleAlign = LongLongAlign = 32; 1977 LongDoubleWidth = 96; 1978 LongDoubleAlign = 32; 1979 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1980 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1981 "a0:0:64-f80:32:32-n8:16:32-S128"; 1982 SizeType = UnsignedInt; 1983 PtrDiffType = SignedInt; 1984 IntPtrType = SignedInt; 1985 RegParmMax = 3; 1986 1987 // Use fpret for all types. 1988 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1989 (1 << TargetInfo::Double) | 1990 (1 << TargetInfo::LongDouble)); 1991 1992 // x86-32 has atomics up to 8 bytes 1993 // FIXME: Check that we actually have cmpxchg8b before setting 1994 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 1995 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 1996 } 1997 virtual const char *getVAListDeclaration() const { 1998 return "typedef char* __builtin_va_list;"; 1999 } 2000 2001 int getEHDataRegisterNumber(unsigned RegNo) const { 2002 if (RegNo == 0) return 0; 2003 if (RegNo == 1) return 2; 2004 return -1; 2005 } 2006 }; 2007 } // end anonymous namespace 2008 2009 namespace { 2010 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2011 public: 2012 OpenBSDI386TargetInfo(const std::string& triple) : 2013 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2014 SizeType = UnsignedLong; 2015 IntPtrType = SignedLong; 2016 PtrDiffType = SignedLong; 2017 } 2018 }; 2019 } // end anonymous namespace 2020 2021 namespace { 2022 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2023 public: 2024 DarwinI386TargetInfo(const std::string& triple) : 2025 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2026 LongDoubleWidth = 128; 2027 LongDoubleAlign = 128; 2028 SizeType = UnsignedLong; 2029 IntPtrType = SignedLong; 2030 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2031 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2032 "a0:0:64-f80:128:128-n8:16:32-S128"; 2033 HasAlignMac68kSupport = true; 2034 } 2035 2036 }; 2037 } // end anonymous namespace 2038 2039 namespace { 2040 // x86-32 Windows target 2041 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2042 public: 2043 WindowsX86_32TargetInfo(const std::string& triple) 2044 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2045 TLSSupported = false; 2046 WCharType = UnsignedShort; 2047 DoubleAlign = LongLongAlign = 64; 2048 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2049 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2050 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2051 } 2052 virtual void getTargetDefines(const LangOptions &Opts, 2053 MacroBuilder &Builder) const { 2054 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2055 } 2056 }; 2057 } // end anonymous namespace 2058 2059 namespace { 2060 2061 // x86-32 Windows Visual Studio target 2062 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2063 public: 2064 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2065 : WindowsX86_32TargetInfo(triple) { 2066 LongDoubleWidth = LongDoubleAlign = 64; 2067 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2068 } 2069 virtual void getTargetDefines(const LangOptions &Opts, 2070 MacroBuilder &Builder) const { 2071 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2072 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2073 // The value of the following reflects processor type. 2074 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2075 // We lost the original triple, so we use the default. 2076 Builder.defineMacro("_M_IX86", "600"); 2077 } 2078 }; 2079 } // end anonymous namespace 2080 2081 namespace { 2082 // x86-32 MinGW target 2083 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2084 public: 2085 MinGWX86_32TargetInfo(const std::string& triple) 2086 : WindowsX86_32TargetInfo(triple) { 2087 } 2088 virtual void getTargetDefines(const LangOptions &Opts, 2089 MacroBuilder &Builder) const { 2090 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2091 DefineStd(Builder, "WIN32", Opts); 2092 DefineStd(Builder, "WINNT", Opts); 2093 Builder.defineMacro("_X86_"); 2094 Builder.defineMacro("__MSVCRT__"); 2095 Builder.defineMacro("__MINGW32__"); 2096 2097 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2098 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2099 if (Opts.MicrosoftExt) 2100 // Provide "as-is" __declspec. 2101 Builder.defineMacro("__declspec", "__declspec"); 2102 else 2103 // Provide alias of __attribute__ like mingw32-gcc. 2104 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2105 } 2106 }; 2107 } // end anonymous namespace 2108 2109 namespace { 2110 // x86-32 Cygwin target 2111 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2112 public: 2113 CygwinX86_32TargetInfo(const std::string& triple) 2114 : X86_32TargetInfo(triple) { 2115 TLSSupported = false; 2116 WCharType = UnsignedShort; 2117 DoubleAlign = LongLongAlign = 64; 2118 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2119 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2120 "a0:0:64-f80:32:32-n8:16:32-S32"; 2121 } 2122 virtual void getTargetDefines(const LangOptions &Opts, 2123 MacroBuilder &Builder) const { 2124 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2125 Builder.defineMacro("__CYGWIN__"); 2126 Builder.defineMacro("__CYGWIN32__"); 2127 DefineStd(Builder, "unix", Opts); 2128 if (Opts.CPlusPlus) 2129 Builder.defineMacro("_GNU_SOURCE"); 2130 } 2131 }; 2132 } // end anonymous namespace 2133 2134 namespace { 2135 // x86-32 Haiku target 2136 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2137 public: 2138 HaikuX86_32TargetInfo(const std::string& triple) 2139 : X86_32TargetInfo(triple) { 2140 SizeType = UnsignedLong; 2141 IntPtrType = SignedLong; 2142 PtrDiffType = SignedLong; 2143 this->UserLabelPrefix = ""; 2144 } 2145 virtual void getTargetDefines(const LangOptions &Opts, 2146 MacroBuilder &Builder) const { 2147 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2148 Builder.defineMacro("__INTEL__"); 2149 Builder.defineMacro("__HAIKU__"); 2150 } 2151 }; 2152 } // end anonymous namespace 2153 2154 // RTEMS Target 2155 template<typename Target> 2156 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2157 protected: 2158 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2159 MacroBuilder &Builder) const { 2160 // RTEMS defines; list based off of gcc output 2161 2162 Builder.defineMacro("__rtems__"); 2163 Builder.defineMacro("__ELF__"); 2164 } 2165 public: 2166 RTEMSTargetInfo(const std::string &triple) 2167 : OSTargetInfo<Target>(triple) { 2168 this->UserLabelPrefix = ""; 2169 2170 llvm::Triple Triple(triple); 2171 switch (Triple.getArch()) { 2172 default: 2173 case llvm::Triple::x86: 2174 // this->MCountName = ".mcount"; 2175 break; 2176 case llvm::Triple::mips: 2177 case llvm::Triple::mipsel: 2178 case llvm::Triple::ppc: 2179 case llvm::Triple::ppc64: 2180 // this->MCountName = "_mcount"; 2181 break; 2182 case llvm::Triple::arm: 2183 // this->MCountName = "__mcount"; 2184 break; 2185 } 2186 2187 } 2188 }; 2189 2190 namespace { 2191 // x86-32 RTEMS target 2192 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2193 public: 2194 RTEMSX86_32TargetInfo(const std::string& triple) 2195 : X86_32TargetInfo(triple) { 2196 SizeType = UnsignedLong; 2197 IntPtrType = SignedLong; 2198 PtrDiffType = SignedLong; 2199 this->UserLabelPrefix = ""; 2200 } 2201 virtual void getTargetDefines(const LangOptions &Opts, 2202 MacroBuilder &Builder) const { 2203 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2204 Builder.defineMacro("__INTEL__"); 2205 Builder.defineMacro("__rtems__"); 2206 } 2207 }; 2208 } // end anonymous namespace 2209 2210 namespace { 2211 // x86-64 generic target 2212 class X86_64TargetInfo : public X86TargetInfo { 2213 public: 2214 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2215 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2216 LongDoubleWidth = 128; 2217 LongDoubleAlign = 128; 2218 LargeArrayMinWidth = 128; 2219 LargeArrayAlign = 128; 2220 IntMaxType = SignedLong; 2221 UIntMaxType = UnsignedLong; 2222 Int64Type = SignedLong; 2223 RegParmMax = 6; 2224 2225 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2226 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2227 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2228 2229 // Use fpret only for long double. 2230 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2231 2232 // x86-64 has atomics up to 16 bytes. 2233 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2234 // on CPUs with cmpxchg16b 2235 MaxAtomicPromoteWidth = 128; 2236 MaxAtomicInlineWidth = 64; 2237 } 2238 virtual const char *getVAListDeclaration() const { 2239 return "typedef struct __va_list_tag {" 2240 " unsigned gp_offset;" 2241 " unsigned fp_offset;" 2242 " void* overflow_arg_area;" 2243 " void* reg_save_area;" 2244 "} __va_list_tag;" 2245 "typedef __va_list_tag __builtin_va_list[1];"; 2246 } 2247 2248 int getEHDataRegisterNumber(unsigned RegNo) const { 2249 if (RegNo == 0) return 0; 2250 if (RegNo == 1) return 1; 2251 return -1; 2252 } 2253 }; 2254 } // end anonymous namespace 2255 2256 namespace { 2257 // x86-64 Windows target 2258 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2259 public: 2260 WindowsX86_64TargetInfo(const std::string& triple) 2261 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2262 TLSSupported = false; 2263 WCharType = UnsignedShort; 2264 LongWidth = LongAlign = 32; 2265 DoubleAlign = LongLongAlign = 64; 2266 IntMaxType = SignedLongLong; 2267 UIntMaxType = UnsignedLongLong; 2268 Int64Type = SignedLongLong; 2269 SizeType = UnsignedLongLong; 2270 PtrDiffType = SignedLongLong; 2271 IntPtrType = SignedLongLong; 2272 this->UserLabelPrefix = ""; 2273 } 2274 virtual void getTargetDefines(const LangOptions &Opts, 2275 MacroBuilder &Builder) const { 2276 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2277 Builder.defineMacro("_WIN64"); 2278 } 2279 virtual const char *getVAListDeclaration() const { 2280 return "typedef char* __builtin_va_list;"; 2281 } 2282 }; 2283 } // end anonymous namespace 2284 2285 namespace { 2286 // x86-64 Windows Visual Studio target 2287 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2288 public: 2289 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2290 : WindowsX86_64TargetInfo(triple) { 2291 LongDoubleWidth = LongDoubleAlign = 64; 2292 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2293 } 2294 virtual void getTargetDefines(const LangOptions &Opts, 2295 MacroBuilder &Builder) const { 2296 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2297 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2298 Builder.defineMacro("_M_X64"); 2299 Builder.defineMacro("_M_AMD64"); 2300 } 2301 }; 2302 } // end anonymous namespace 2303 2304 namespace { 2305 // x86-64 MinGW target 2306 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2307 public: 2308 MinGWX86_64TargetInfo(const std::string& triple) 2309 : WindowsX86_64TargetInfo(triple) { 2310 } 2311 virtual void getTargetDefines(const LangOptions &Opts, 2312 MacroBuilder &Builder) const { 2313 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2314 DefineStd(Builder, "WIN64", Opts); 2315 Builder.defineMacro("__MSVCRT__"); 2316 Builder.defineMacro("__MINGW32__"); 2317 Builder.defineMacro("__MINGW64__"); 2318 2319 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2320 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2321 if (Opts.MicrosoftExt) 2322 // Provide "as-is" __declspec. 2323 Builder.defineMacro("__declspec", "__declspec"); 2324 else 2325 // Provide alias of __attribute__ like mingw32-gcc. 2326 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2327 } 2328 }; 2329 } // end anonymous namespace 2330 2331 namespace { 2332 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2333 public: 2334 DarwinX86_64TargetInfo(const std::string& triple) 2335 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2336 Int64Type = SignedLongLong; 2337 } 2338 }; 2339 } // end anonymous namespace 2340 2341 namespace { 2342 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2343 public: 2344 OpenBSDX86_64TargetInfo(const std::string& triple) 2345 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2346 IntMaxType = SignedLongLong; 2347 UIntMaxType = UnsignedLongLong; 2348 Int64Type = SignedLongLong; 2349 } 2350 }; 2351 } // end anonymous namespace 2352 2353 namespace { 2354 class ARMTargetInfo : public TargetInfo { 2355 // Possible FPU choices. 2356 enum FPUMode { 2357 NoFPU, 2358 VFP2FPU, 2359 VFP3FPU, 2360 NeonFPU 2361 }; 2362 2363 static bool FPUModeIsVFP(FPUMode Mode) { 2364 return Mode >= VFP2FPU && Mode <= NeonFPU; 2365 } 2366 2367 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2368 static const char * const GCCRegNames[]; 2369 2370 std::string ABI, CPU; 2371 2372 unsigned FPU : 3; 2373 2374 unsigned IsThumb : 1; 2375 2376 // Initialized via features. 2377 unsigned SoftFloat : 1; 2378 unsigned SoftFloatABI : 1; 2379 2380 static const Builtin::Info BuiltinInfo[]; 2381 2382 public: 2383 ARMTargetInfo(const std::string &TripleStr) 2384 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2385 { 2386 SizeType = UnsignedInt; 2387 PtrDiffType = SignedInt; 2388 2389 // {} in inline assembly are neon specifiers, not assembly variant 2390 // specifiers. 2391 NoAsmVariants = true; 2392 2393 // FIXME: Should we just treat this as a feature? 2394 IsThumb = getTriple().getArchName().startswith("thumb"); 2395 if (IsThumb) { 2396 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2397 // so set preferred for small types to 32. 2398 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2399 "i64:64:64-f32:32:32-f64:64:64-" 2400 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2401 } else { 2402 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2403 "i64:64:64-f32:32:32-f64:64:64-" 2404 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2405 } 2406 2407 // ARM targets default to using the ARM C++ ABI. 2408 CXXABI = CXXABI_ARM; 2409 2410 // ARM has atomics up to 8 bytes 2411 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2412 MaxAtomicPromoteWidth = 64; 2413 } 2414 virtual const char *getABI() const { return ABI.c_str(); } 2415 virtual bool setABI(const std::string &Name) { 2416 ABI = Name; 2417 2418 // The defaults (above) are for AAPCS, check if we need to change them. 2419 // 2420 // FIXME: We need support for -meabi... we could just mangle it into the 2421 // name. 2422 if (Name == "apcs-gnu") { 2423 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2424 SizeType = UnsignedLong; 2425 2426 // Do not respect the alignment of bit-field types when laying out 2427 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2428 UseBitFieldTypeAlignment = false; 2429 2430 /// Do force alignment of members that follow zero length bitfields. If 2431 /// the alignment of the zero-length bitfield is greater than the member 2432 /// that follows it, `bar', `bar' will be aligned as the type of the 2433 /// zero length bitfield. 2434 UseZeroLengthBitfieldAlignment = true; 2435 2436 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2437 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2438 /// gcc. 2439 ZeroLengthBitfieldBoundary = 32; 2440 2441 if (IsThumb) { 2442 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2443 // so set preferred for small types to 32. 2444 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2445 "i64:32:64-f32:32:32-f64:32:64-" 2446 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2447 } else { 2448 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2449 "i64:32:64-f32:32:32-f64:32:64-" 2450 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2451 } 2452 2453 // FIXME: Override "preferred align" for double and long long. 2454 } else if (Name == "aapcs") { 2455 // FIXME: Enumerated types are variable width in straight AAPCS. 2456 } else if (Name == "aapcs-linux") { 2457 ; 2458 } else 2459 return false; 2460 2461 return true; 2462 } 2463 2464 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2465 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2466 Features["vfp2"] = true; 2467 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2468 Features["neon"] = true; 2469 } 2470 2471 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2472 const std::string &Name, 2473 bool Enabled) const { 2474 if (Name == "soft-float" || Name == "soft-float-abi" || 2475 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2476 Features[Name] = Enabled; 2477 } else 2478 return false; 2479 2480 return true; 2481 } 2482 2483 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2484 FPU = NoFPU; 2485 SoftFloat = SoftFloatABI = false; 2486 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2487 if (Features[i] == "+soft-float") 2488 SoftFloat = true; 2489 else if (Features[i] == "+soft-float-abi") 2490 SoftFloatABI = true; 2491 else if (Features[i] == "+vfp2") 2492 FPU = VFP2FPU; 2493 else if (Features[i] == "+vfp3") 2494 FPU = VFP3FPU; 2495 else if (Features[i] == "+neon") 2496 FPU = NeonFPU; 2497 } 2498 2499 // Remove front-end specific options which the backend handles differently. 2500 std::vector<std::string>::iterator it; 2501 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2502 if (it != Features.end()) 2503 Features.erase(it); 2504 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2505 if (it != Features.end()) 2506 Features.erase(it); 2507 } 2508 2509 static const char *getCPUDefineSuffix(StringRef Name) { 2510 return llvm::StringSwitch<const char*>(Name) 2511 .Cases("arm8", "arm810", "4") 2512 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2513 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2514 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2515 .Case("ep9312", "4T") 2516 .Cases("arm10tdmi", "arm1020t", "5T") 2517 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2518 .Case("arm926ej-s", "5TEJ") 2519 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2520 .Cases("xscale", "iwmmxt", "5TE") 2521 .Case("arm1136j-s", "6J") 2522 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2523 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2524 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2525 .Cases("cortex-a8", "cortex-a9", "7A") 2526 .Case("cortex-m3", "7M") 2527 .Case("cortex-m0", "6M") 2528 .Default(0); 2529 } 2530 virtual bool setCPU(const std::string &Name) { 2531 if (!getCPUDefineSuffix(Name)) 2532 return false; 2533 2534 CPU = Name; 2535 return true; 2536 } 2537 virtual void getTargetDefines(const LangOptions &Opts, 2538 MacroBuilder &Builder) const { 2539 // Target identification. 2540 Builder.defineMacro("__arm"); 2541 Builder.defineMacro("__arm__"); 2542 2543 // Target properties. 2544 Builder.defineMacro("__ARMEL__"); 2545 Builder.defineMacro("__LITTLE_ENDIAN__"); 2546 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2547 2548 StringRef CPUArch = getCPUDefineSuffix(CPU); 2549 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2550 2551 // Subtarget options. 2552 2553 // FIXME: It's more complicated than this and we don't really support 2554 // interworking. 2555 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2556 Builder.defineMacro("__THUMB_INTERWORK__"); 2557 2558 if (ABI == "aapcs" || ABI == "aapcs-linux") 2559 Builder.defineMacro("__ARM_EABI__"); 2560 2561 if (SoftFloat) 2562 Builder.defineMacro("__SOFTFP__"); 2563 2564 if (CPU == "xscale") 2565 Builder.defineMacro("__XSCALE__"); 2566 2567 bool IsARMv7 = CPUArch.startswith("7"); 2568 if (IsThumb) { 2569 Builder.defineMacro("__THUMBEL__"); 2570 Builder.defineMacro("__thumb__"); 2571 if (CPUArch == "6T2" || IsARMv7) 2572 Builder.defineMacro("__thumb2__"); 2573 } 2574 2575 // Note, this is always on in gcc, even though it doesn't make sense. 2576 Builder.defineMacro("__APCS_32__"); 2577 2578 if (FPUModeIsVFP((FPUMode) FPU)) 2579 Builder.defineMacro("__VFP_FP__"); 2580 2581 // This only gets set when Neon instructions are actually available, unlike 2582 // the VFP define, hence the soft float and arch check. This is subtly 2583 // different from gcc, we follow the intent which was that it should be set 2584 // when Neon instructions are actually available. 2585 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2586 Builder.defineMacro("__ARM_NEON__"); 2587 } 2588 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2589 unsigned &NumRecords) const { 2590 Records = BuiltinInfo; 2591 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2592 } 2593 virtual const char *getVAListDeclaration() const { 2594 return "typedef void* __builtin_va_list;"; 2595 } 2596 virtual void getGCCRegNames(const char * const *&Names, 2597 unsigned &NumNames) const; 2598 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2599 unsigned &NumAliases) const; 2600 virtual bool validateAsmConstraint(const char *&Name, 2601 TargetInfo::ConstraintInfo &Info) const { 2602 // FIXME: Check if this is complete 2603 switch (*Name) { 2604 default: 2605 case 'l': // r0-r7 2606 case 'h': // r8-r15 2607 case 'w': // VFP Floating point register single precision 2608 case 'P': // VFP Floating point register double precision 2609 Info.setAllowsRegister(); 2610 return true; 2611 case 'Q': // A memory address that is a single base register. 2612 Info.setAllowsMemory(); 2613 return true; 2614 case 'U': // a memory reference... 2615 switch (Name[1]) { 2616 case 'q': // ...ARMV4 ldrsb 2617 case 'v': // ...VFP load/store (reg+constant offset) 2618 case 'y': // ...iWMMXt load/store 2619 case 't': // address valid for load/store opaque types wider 2620 // than 128-bits 2621 case 'n': // valid address for Neon doubleword vector load/store 2622 case 'm': // valid address for Neon element and structure load/store 2623 case 's': // valid address for non-offset loads/stores of quad-word 2624 // values in four ARM registers 2625 Info.setAllowsMemory(); 2626 Name++; 2627 return true; 2628 } 2629 } 2630 return false; 2631 } 2632 virtual std::string convertConstraint(const char *&Constraint) const { 2633 std::string R; 2634 switch (*Constraint) { 2635 case 'U': // Two-character constraint; add "^" hint for later parsing. 2636 R = std::string("^") + std::string(Constraint, 2); 2637 Constraint++; 2638 break; 2639 case 'p': // 'p' should be translated to 'r' by default. 2640 R = std::string("r"); 2641 break; 2642 default: 2643 return std::string(1, *Constraint); 2644 } 2645 return R; 2646 } 2647 virtual const char *getClobbers() const { 2648 // FIXME: Is this really right? 2649 return ""; 2650 } 2651 }; 2652 2653 const char * const ARMTargetInfo::GCCRegNames[] = { 2654 // Integer registers 2655 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2656 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2657 2658 // Float registers 2659 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2660 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2661 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2662 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2663 2664 // Double registers 2665 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2666 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2667 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2668 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2669 2670 // Quad registers 2671 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2672 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2673 }; 2674 2675 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2676 unsigned &NumNames) const { 2677 Names = GCCRegNames; 2678 NumNames = llvm::array_lengthof(GCCRegNames); 2679 } 2680 2681 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2682 { { "a1" }, "r0" }, 2683 { { "a2" }, "r1" }, 2684 { { "a3" }, "r2" }, 2685 { { "a4" }, "r3" }, 2686 { { "v1" }, "r4" }, 2687 { { "v2" }, "r5" }, 2688 { { "v3" }, "r6" }, 2689 { { "v4" }, "r7" }, 2690 { { "v5" }, "r8" }, 2691 { { "v6", "rfp" }, "r9" }, 2692 { { "sl" }, "r10" }, 2693 { { "fp" }, "r11" }, 2694 { { "ip" }, "r12" }, 2695 { { "r13" }, "sp" }, 2696 { { "r14" }, "lr" }, 2697 { { "r15" }, "pc" }, 2698 // The S, D and Q registers overlap, but aren't really aliases; we 2699 // don't want to substitute one of these for a different-sized one. 2700 }; 2701 2702 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2703 unsigned &NumAliases) const { 2704 Aliases = GCCRegAliases; 2705 NumAliases = llvm::array_lengthof(GCCRegAliases); 2706 } 2707 2708 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2709 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2710 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2711 ALL_LANGUAGES }, 2712 #include "clang/Basic/BuiltinsARM.def" 2713 }; 2714 } // end anonymous namespace. 2715 2716 2717 namespace { 2718 class DarwinARMTargetInfo : 2719 public DarwinTargetInfo<ARMTargetInfo> { 2720 protected: 2721 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2722 MacroBuilder &Builder) const { 2723 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2724 } 2725 2726 public: 2727 DarwinARMTargetInfo(const std::string& triple) 2728 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2729 HasAlignMac68kSupport = true; 2730 // iOS always has 64-bit atomic instructions. 2731 // FIXME: This should be based off of the target features in ARMTargetInfo. 2732 MaxAtomicInlineWidth = 64; 2733 } 2734 }; 2735 } // end anonymous namespace. 2736 2737 namespace { 2738 class SparcV8TargetInfo : public TargetInfo { 2739 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2740 static const char * const GCCRegNames[]; 2741 bool SoftFloat; 2742 public: 2743 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2744 // FIXME: Support Sparc quad-precision long double? 2745 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2746 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2747 } 2748 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2749 const std::string &Name, 2750 bool Enabled) const { 2751 if (Name == "soft-float") 2752 Features[Name] = Enabled; 2753 else 2754 return false; 2755 2756 return true; 2757 } 2758 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2759 SoftFloat = false; 2760 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2761 if (Features[i] == "+soft-float") 2762 SoftFloat = true; 2763 } 2764 virtual void getTargetDefines(const LangOptions &Opts, 2765 MacroBuilder &Builder) const { 2766 DefineStd(Builder, "sparc", Opts); 2767 Builder.defineMacro("__sparcv8"); 2768 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2769 2770 if (SoftFloat) 2771 Builder.defineMacro("SOFT_FLOAT", "1"); 2772 } 2773 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2774 unsigned &NumRecords) const { 2775 // FIXME: Implement! 2776 } 2777 virtual const char *getVAListDeclaration() const { 2778 return "typedef void* __builtin_va_list;"; 2779 } 2780 virtual void getGCCRegNames(const char * const *&Names, 2781 unsigned &NumNames) const; 2782 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2783 unsigned &NumAliases) const; 2784 virtual bool validateAsmConstraint(const char *&Name, 2785 TargetInfo::ConstraintInfo &info) const { 2786 // FIXME: Implement! 2787 return false; 2788 } 2789 virtual const char *getClobbers() const { 2790 // FIXME: Implement! 2791 return ""; 2792 } 2793 }; 2794 2795 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2796 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2797 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2798 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2799 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2800 }; 2801 2802 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2803 unsigned &NumNames) const { 2804 Names = GCCRegNames; 2805 NumNames = llvm::array_lengthof(GCCRegNames); 2806 } 2807 2808 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2809 { { "g0" }, "r0" }, 2810 { { "g1" }, "r1" }, 2811 { { "g2" }, "r2" }, 2812 { { "g3" }, "r3" }, 2813 { { "g4" }, "r4" }, 2814 { { "g5" }, "r5" }, 2815 { { "g6" }, "r6" }, 2816 { { "g7" }, "r7" }, 2817 { { "o0" }, "r8" }, 2818 { { "o1" }, "r9" }, 2819 { { "o2" }, "r10" }, 2820 { { "o3" }, "r11" }, 2821 { { "o4" }, "r12" }, 2822 { { "o5" }, "r13" }, 2823 { { "o6", "sp" }, "r14" }, 2824 { { "o7" }, "r15" }, 2825 { { "l0" }, "r16" }, 2826 { { "l1" }, "r17" }, 2827 { { "l2" }, "r18" }, 2828 { { "l3" }, "r19" }, 2829 { { "l4" }, "r20" }, 2830 { { "l5" }, "r21" }, 2831 { { "l6" }, "r22" }, 2832 { { "l7" }, "r23" }, 2833 { { "i0" }, "r24" }, 2834 { { "i1" }, "r25" }, 2835 { { "i2" }, "r26" }, 2836 { { "i3" }, "r27" }, 2837 { { "i4" }, "r28" }, 2838 { { "i5" }, "r29" }, 2839 { { "i6", "fp" }, "r30" }, 2840 { { "i7" }, "r31" }, 2841 }; 2842 2843 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2844 unsigned &NumAliases) const { 2845 Aliases = GCCRegAliases; 2846 NumAliases = llvm::array_lengthof(GCCRegAliases); 2847 } 2848 } // end anonymous namespace. 2849 2850 namespace { 2851 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2852 public: 2853 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2854 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2855 SizeType = UnsignedInt; 2856 PtrDiffType = SignedInt; 2857 } 2858 }; 2859 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2860 public: 2861 SolarisSparcV8TargetInfo(const std::string& triple) : 2862 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2863 SizeType = UnsignedInt; 2864 PtrDiffType = SignedInt; 2865 } 2866 }; 2867 } // end anonymous namespace. 2868 2869 namespace { 2870 class MSP430TargetInfo : public TargetInfo { 2871 static const char * const GCCRegNames[]; 2872 public: 2873 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2874 TLSSupported = false; 2875 IntWidth = 16; IntAlign = 16; 2876 LongWidth = 32; LongLongWidth = 64; 2877 LongAlign = LongLongAlign = 16; 2878 PointerWidth = 16; PointerAlign = 16; 2879 SizeType = UnsignedInt; 2880 IntMaxType = SignedLong; 2881 UIntMaxType = UnsignedLong; 2882 IntPtrType = SignedShort; 2883 PtrDiffType = SignedInt; 2884 SigAtomicType = SignedLong; 2885 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2886 } 2887 virtual void getTargetDefines(const LangOptions &Opts, 2888 MacroBuilder &Builder) const { 2889 Builder.defineMacro("MSP430"); 2890 Builder.defineMacro("__MSP430__"); 2891 // FIXME: defines for different 'flavours' of MCU 2892 } 2893 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2894 unsigned &NumRecords) const { 2895 // FIXME: Implement. 2896 Records = 0; 2897 NumRecords = 0; 2898 } 2899 virtual void getGCCRegNames(const char * const *&Names, 2900 unsigned &NumNames) const; 2901 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2902 unsigned &NumAliases) const { 2903 // No aliases. 2904 Aliases = 0; 2905 NumAliases = 0; 2906 } 2907 virtual bool validateAsmConstraint(const char *&Name, 2908 TargetInfo::ConstraintInfo &info) const { 2909 // No target constraints for now. 2910 return false; 2911 } 2912 virtual const char *getClobbers() const { 2913 // FIXME: Is this really right? 2914 return ""; 2915 } 2916 virtual const char *getVAListDeclaration() const { 2917 // FIXME: implement 2918 return "typedef char* __builtin_va_list;"; 2919 } 2920 }; 2921 2922 const char * const MSP430TargetInfo::GCCRegNames[] = { 2923 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2924 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2925 }; 2926 2927 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2928 unsigned &NumNames) const { 2929 Names = GCCRegNames; 2930 NumNames = llvm::array_lengthof(GCCRegNames); 2931 } 2932 } 2933 2934 2935 namespace { 2936 class SystemZTargetInfo : public TargetInfo { 2937 static const char * const GCCRegNames[]; 2938 public: 2939 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2940 TLSSupported = false; 2941 IntWidth = IntAlign = 32; 2942 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2943 PointerWidth = PointerAlign = 64; 2944 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2945 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2946 } 2947 virtual void getTargetDefines(const LangOptions &Opts, 2948 MacroBuilder &Builder) const { 2949 Builder.defineMacro("__s390__"); 2950 Builder.defineMacro("__s390x__"); 2951 } 2952 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2953 unsigned &NumRecords) const { 2954 // FIXME: Implement. 2955 Records = 0; 2956 NumRecords = 0; 2957 } 2958 2959 virtual void getGCCRegNames(const char * const *&Names, 2960 unsigned &NumNames) const; 2961 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2962 unsigned &NumAliases) const { 2963 // No aliases. 2964 Aliases = 0; 2965 NumAliases = 0; 2966 } 2967 virtual bool validateAsmConstraint(const char *&Name, 2968 TargetInfo::ConstraintInfo &info) const { 2969 // FIXME: implement 2970 return true; 2971 } 2972 virtual const char *getClobbers() const { 2973 // FIXME: Is this really right? 2974 return ""; 2975 } 2976 virtual const char *getVAListDeclaration() const { 2977 // FIXME: implement 2978 return "typedef char* __builtin_va_list;"; 2979 } 2980 }; 2981 2982 const char * const SystemZTargetInfo::GCCRegNames[] = { 2983 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2984 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2985 }; 2986 2987 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2988 unsigned &NumNames) const { 2989 Names = GCCRegNames; 2990 NumNames = llvm::array_lengthof(GCCRegNames); 2991 } 2992 } 2993 2994 namespace { 2995 class BlackfinTargetInfo : public TargetInfo { 2996 static const char * const GCCRegNames[]; 2997 public: 2998 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2999 TLSSupported = false; 3000 DoubleAlign = 32; 3001 LongLongAlign = 32; 3002 LongDoubleAlign = 32; 3003 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 3004 } 3005 3006 virtual void getTargetDefines(const LangOptions &Opts, 3007 MacroBuilder &Builder) const { 3008 DefineStd(Builder, "bfin", Opts); 3009 DefineStd(Builder, "BFIN", Opts); 3010 Builder.defineMacro("__ADSPBLACKFIN__"); 3011 // FIXME: This one is really dependent on -mcpu 3012 Builder.defineMacro("__ADSPLPBLACKFIN__"); 3013 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 3014 } 3015 3016 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3017 unsigned &NumRecords) const { 3018 // FIXME: Implement. 3019 Records = 0; 3020 NumRecords = 0; 3021 } 3022 3023 virtual void getGCCRegNames(const char * const *&Names, 3024 unsigned &NumNames) const; 3025 3026 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3027 unsigned &NumAliases) const { 3028 // No aliases. 3029 Aliases = 0; 3030 NumAliases = 0; 3031 } 3032 3033 virtual bool validateAsmConstraint(const char *&Name, 3034 TargetInfo::ConstraintInfo &Info) const { 3035 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 3036 Info.setAllowsRegister(); 3037 return true; 3038 } 3039 return false; 3040 } 3041 3042 virtual const char *getClobbers() const { 3043 return ""; 3044 } 3045 3046 virtual const char *getVAListDeclaration() const { 3047 return "typedef char* __builtin_va_list;"; 3048 } 3049 }; 3050 3051 const char * const BlackfinTargetInfo::GCCRegNames[] = { 3052 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3053 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 3054 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 3055 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 3056 "a0", "a1", "cc", 3057 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 3058 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 3059 }; 3060 3061 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 3062 unsigned &NumNames) const { 3063 Names = GCCRegNames; 3064 NumNames = llvm::array_lengthof(GCCRegNames); 3065 } 3066 } 3067 3068 namespace { 3069 3070 // LLVM and Clang cannot be used directly to output native binaries for 3071 // target, but is used to compile C code to llvm bitcode with correct 3072 // type and alignment information. 3073 // 3074 // TCE uses the llvm bitcode as input and uses it for generating customized 3075 // target processor and program binary. TCE co-design environment is 3076 // publicly available in http://tce.cs.tut.fi 3077 3078 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3079 3, // opencl_global 3080 4, // opencl_local 3081 5 // opencl_constant 3082 }; 3083 3084 class TCETargetInfo : public TargetInfo{ 3085 public: 3086 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3087 TLSSupported = false; 3088 IntWidth = 32; 3089 LongWidth = LongLongWidth = 32; 3090 PointerWidth = 32; 3091 IntAlign = 32; 3092 LongAlign = LongLongAlign = 32; 3093 PointerAlign = 32; 3094 SizeType = UnsignedInt; 3095 IntMaxType = SignedLong; 3096 UIntMaxType = UnsignedLong; 3097 IntPtrType = SignedInt; 3098 PtrDiffType = SignedInt; 3099 FloatWidth = 32; 3100 FloatAlign = 32; 3101 DoubleWidth = 32; 3102 DoubleAlign = 32; 3103 LongDoubleWidth = 32; 3104 LongDoubleAlign = 32; 3105 FloatFormat = &llvm::APFloat::IEEEsingle; 3106 DoubleFormat = &llvm::APFloat::IEEEsingle; 3107 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3108 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3109 "i16:16:32-i32:32:32-i64:32:32-" 3110 "f32:32:32-f64:32:32-v64:32:32-" 3111 "v128:32:32-a0:0:32-n32"; 3112 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3113 } 3114 3115 virtual void getTargetDefines(const LangOptions &Opts, 3116 MacroBuilder &Builder) const { 3117 DefineStd(Builder, "tce", Opts); 3118 Builder.defineMacro("__TCE__"); 3119 Builder.defineMacro("__TCE_V1__"); 3120 } 3121 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3122 unsigned &NumRecords) const {} 3123 virtual const char *getClobbers() const { 3124 return ""; 3125 } 3126 virtual const char *getVAListDeclaration() const { 3127 return "typedef void* __builtin_va_list;"; 3128 } 3129 virtual void getGCCRegNames(const char * const *&Names, 3130 unsigned &NumNames) const {} 3131 virtual bool validateAsmConstraint(const char *&Name, 3132 TargetInfo::ConstraintInfo &info) const { 3133 return true; 3134 } 3135 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3136 unsigned &NumAliases) const {} 3137 }; 3138 } 3139 3140 namespace { 3141 class MipsTargetInfoBase : public TargetInfo { 3142 std::string CPU; 3143 protected: 3144 std::string ABI; 3145 public: 3146 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3147 : TargetInfo(triple), ABI(ABIStr) { 3148 SizeType = UnsignedInt; 3149 PtrDiffType = SignedInt; 3150 } 3151 virtual const char *getABI() const { return ABI.c_str(); } 3152 virtual bool setABI(const std::string &Name) = 0; 3153 virtual bool setCPU(const std::string &Name) { 3154 CPU = Name; 3155 return true; 3156 } 3157 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3158 Features[ABI] = true; 3159 Features[CPU] = true; 3160 } 3161 virtual void getArchDefines(const LangOptions &Opts, 3162 MacroBuilder &Builder) const = 0; 3163 virtual void getTargetDefines(const LangOptions &Opts, 3164 MacroBuilder &Builder) const = 0; 3165 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3166 unsigned &NumRecords) const { 3167 // FIXME: Implement! 3168 } 3169 virtual const char *getVAListDeclaration() const { 3170 return "typedef void* __builtin_va_list;"; 3171 } 3172 virtual void getGCCRegNames(const char * const *&Names, 3173 unsigned &NumNames) const { 3174 static const char * const GCCRegNames[] = { 3175 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3176 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3177 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3178 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3179 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3180 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3181 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3182 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3183 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3184 "$fcc5","$fcc6","$fcc7" 3185 }; 3186 Names = GCCRegNames; 3187 NumNames = llvm::array_lengthof(GCCRegNames); 3188 } 3189 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3190 unsigned &NumAliases) const = 0; 3191 virtual bool validateAsmConstraint(const char *&Name, 3192 TargetInfo::ConstraintInfo &Info) const { 3193 switch (*Name) { 3194 default: 3195 case 'r': // CPU registers. 3196 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3197 case 'y': // Equivalent to "r", backwards compatibility only. 3198 case 'f': // floating-point registers. 3199 Info.setAllowsRegister(); 3200 return true; 3201 } 3202 return false; 3203 } 3204 3205 virtual const char *getClobbers() const { 3206 // FIXME: Implement! 3207 return ""; 3208 } 3209 }; 3210 3211 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3212 public: 3213 Mips32TargetInfoBase(const std::string& triple) : 3214 MipsTargetInfoBase(triple, "o32") {} 3215 virtual bool setABI(const std::string &Name) { 3216 if ((Name == "o32") || (Name == "eabi")) { 3217 ABI = Name; 3218 return true; 3219 } else 3220 return false; 3221 } 3222 virtual void getArchDefines(const LangOptions &Opts, 3223 MacroBuilder &Builder) const { 3224 if (ABI == "o32") { 3225 Builder.defineMacro("__mips_o32"); 3226 Builder.defineMacro("_ABIO32", "1"); 3227 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3228 } 3229 else if (ABI == "eabi") 3230 Builder.defineMacro("__mips_eabi"); 3231 else 3232 llvm_unreachable("Invalid ABI for Mips32."); 3233 } 3234 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3235 unsigned &NumAliases) const { 3236 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3237 { { "at" }, "$1" }, 3238 { { "v0" }, "$2" }, 3239 { { "v1" }, "$3" }, 3240 { { "a0" }, "$4" }, 3241 { { "a1" }, "$5" }, 3242 { { "a2" }, "$6" }, 3243 { { "a3" }, "$7" }, 3244 { { "t0" }, "$8" }, 3245 { { "t1" }, "$9" }, 3246 { { "t2" }, "$10" }, 3247 { { "t3" }, "$11" }, 3248 { { "t4" }, "$12" }, 3249 { { "t5" }, "$13" }, 3250 { { "t6" }, "$14" }, 3251 { { "t7" }, "$15" }, 3252 { { "s0" }, "$16" }, 3253 { { "s1" }, "$17" }, 3254 { { "s2" }, "$18" }, 3255 { { "s3" }, "$19" }, 3256 { { "s4" }, "$20" }, 3257 { { "s5" }, "$21" }, 3258 { { "s6" }, "$22" }, 3259 { { "s7" }, "$23" }, 3260 { { "t8" }, "$24" }, 3261 { { "t9" }, "$25" }, 3262 { { "k0" }, "$26" }, 3263 { { "k1" }, "$27" }, 3264 { { "gp" }, "$28" }, 3265 { { "sp" }, "$29" }, 3266 { { "fp" }, "$30" }, 3267 { { "ra" }, "$31" } 3268 }; 3269 Aliases = GCCRegAliases; 3270 NumAliases = llvm::array_lengthof(GCCRegAliases); 3271 } 3272 }; 3273 3274 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3275 public: 3276 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3277 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3278 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3279 } 3280 virtual void getTargetDefines(const LangOptions &Opts, 3281 MacroBuilder &Builder) const { 3282 DefineStd(Builder, "mips", Opts); 3283 Builder.defineMacro("_mips"); 3284 DefineStd(Builder, "MIPSEB", Opts); 3285 Builder.defineMacro("_MIPSEB"); 3286 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3287 getArchDefines(Opts, Builder); 3288 } 3289 }; 3290 3291 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3292 public: 3293 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3294 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3295 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3296 } 3297 virtual void getTargetDefines(const LangOptions &Opts, 3298 MacroBuilder &Builder) const { 3299 DefineStd(Builder, "mips", Opts); 3300 Builder.defineMacro("_mips"); 3301 DefineStd(Builder, "MIPSEL", Opts); 3302 Builder.defineMacro("_MIPSEL"); 3303 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3304 getArchDefines(Opts, Builder); 3305 } 3306 }; 3307 3308 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3309 virtual void SetDescriptionString(const std::string &Name) = 0; 3310 public: 3311 Mips64TargetInfoBase(const std::string& triple) : 3312 MipsTargetInfoBase(triple, "n64") {} 3313 virtual bool setABI(const std::string &Name) { 3314 SetDescriptionString(Name); 3315 if ((Name == "n32") || (Name == "n64")) { 3316 ABI = Name; 3317 return true; 3318 } else 3319 return false; 3320 } 3321 virtual void getArchDefines(const LangOptions &Opts, 3322 MacroBuilder &Builder) const { 3323 if (ABI == "n32") { 3324 Builder.defineMacro("__mips_n32"); 3325 Builder.defineMacro("_ABIN32", "2"); 3326 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3327 } 3328 else if (ABI == "n64") { 3329 Builder.defineMacro("__mips_n64"); 3330 Builder.defineMacro("_ABI64", "3"); 3331 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3332 } 3333 else 3334 llvm_unreachable("Invalid ABI for Mips64."); 3335 } 3336 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3337 unsigned &NumAliases) const { 3338 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3339 { { "at" }, "$1" }, 3340 { { "v0" }, "$2" }, 3341 { { "v1" }, "$3" }, 3342 { { "a0" }, "$4" }, 3343 { { "a1" }, "$5" }, 3344 { { "a2" }, "$6" }, 3345 { { "a3" }, "$7" }, 3346 { { "a4" }, "$8" }, 3347 { { "a5" }, "$9" }, 3348 { { "a6" }, "$10" }, 3349 { { "a7" }, "$11" }, 3350 { { "t0" }, "$12" }, 3351 { { "t1" }, "$13" }, 3352 { { "t2" }, "$14" }, 3353 { { "t3" }, "$15" }, 3354 { { "s0" }, "$16" }, 3355 { { "s1" }, "$17" }, 3356 { { "s2" }, "$18" }, 3357 { { "s3" }, "$19" }, 3358 { { "s4" }, "$20" }, 3359 { { "s5" }, "$21" }, 3360 { { "s6" }, "$22" }, 3361 { { "s7" }, "$23" }, 3362 { { "t8" }, "$24" }, 3363 { { "t9" }, "$25" }, 3364 { { "k0" }, "$26" }, 3365 { { "k1" }, "$27" }, 3366 { { "gp" }, "$28" }, 3367 { { "sp" }, "$29" }, 3368 { { "fp" }, "$30" }, 3369 { { "ra" }, "$31" } 3370 }; 3371 Aliases = GCCRegAliases; 3372 NumAliases = llvm::array_lengthof(GCCRegAliases); 3373 } 3374 }; 3375 3376 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3377 virtual void SetDescriptionString(const std::string &Name) { 3378 // Change DescriptionString only if ABI is n32. 3379 if (Name == "n32") 3380 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3381 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3382 } 3383 public: 3384 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3385 // Default ABI is n64. 3386 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3387 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3388 } 3389 virtual void getTargetDefines(const LangOptions &Opts, 3390 MacroBuilder &Builder) const { 3391 DefineStd(Builder, "mips", Opts); 3392 Builder.defineMacro("_mips"); 3393 DefineStd(Builder, "MIPSEB", Opts); 3394 Builder.defineMacro("_MIPSEB"); 3395 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3396 getArchDefines(Opts, Builder); 3397 } 3398 }; 3399 3400 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3401 virtual void SetDescriptionString(const std::string &Name) { 3402 // Change DescriptionString only if ABI is n32. 3403 if (Name == "n32") 3404 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3405 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3406 } 3407 public: 3408 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3409 // Default ABI is n64. 3410 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3411 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3412 } 3413 virtual void getTargetDefines(const LangOptions &Opts, 3414 MacroBuilder &Builder) const { 3415 DefineStd(Builder, "mips", Opts); 3416 Builder.defineMacro("_mips"); 3417 DefineStd(Builder, "MIPSEL", Opts); 3418 Builder.defineMacro("_MIPSEL"); 3419 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3420 getArchDefines(Opts, Builder); 3421 } 3422 }; 3423 } // end anonymous namespace. 3424 3425 namespace { 3426 class PNaClTargetInfo : public TargetInfo { 3427 public: 3428 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3429 this->UserLabelPrefix = ""; 3430 this->LongAlign = 32; 3431 this->LongWidth = 32; 3432 this->PointerAlign = 32; 3433 this->PointerWidth = 32; 3434 this->IntMaxType = TargetInfo::SignedLongLong; 3435 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3436 this->Int64Type = TargetInfo::SignedLongLong; 3437 this->DoubleAlign = 64; 3438 this->LongDoubleWidth = 64; 3439 this->LongDoubleAlign = 64; 3440 this->SizeType = TargetInfo::UnsignedInt; 3441 this->PtrDiffType = TargetInfo::SignedInt; 3442 this->IntPtrType = TargetInfo::SignedInt; 3443 this->RegParmMax = 2; 3444 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3445 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3446 } 3447 3448 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3449 } 3450 virtual void getArchDefines(const LangOptions &Opts, 3451 MacroBuilder &Builder) const { 3452 Builder.defineMacro("__le32__"); 3453 Builder.defineMacro("__pnacl__"); 3454 } 3455 virtual void getTargetDefines(const LangOptions &Opts, 3456 MacroBuilder &Builder) const { 3457 DefineStd(Builder, "unix", Opts); 3458 Builder.defineMacro("__ELF__"); 3459 if (Opts.POSIXThreads) 3460 Builder.defineMacro("_REENTRANT"); 3461 if (Opts.CPlusPlus) 3462 Builder.defineMacro("_GNU_SOURCE"); 3463 3464 Builder.defineMacro("__native_client__"); 3465 getArchDefines(Opts, Builder); 3466 } 3467 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3468 unsigned &NumRecords) const { 3469 } 3470 virtual const char *getVAListDeclaration() const { 3471 return "typedef int __builtin_va_list[4];"; 3472 } 3473 virtual void getGCCRegNames(const char * const *&Names, 3474 unsigned &NumNames) const; 3475 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3476 unsigned &NumAliases) const; 3477 virtual bool validateAsmConstraint(const char *&Name, 3478 TargetInfo::ConstraintInfo &Info) const { 3479 return false; 3480 } 3481 3482 virtual const char *getClobbers() const { 3483 return ""; 3484 } 3485 }; 3486 3487 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3488 unsigned &NumNames) const { 3489 Names = NULL; 3490 NumNames = 0; 3491 } 3492 3493 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3494 unsigned &NumAliases) const { 3495 Aliases = NULL; 3496 NumAliases = 0; 3497 } 3498 } // end anonymous namespace. 3499 3500 3501 //===----------------------------------------------------------------------===// 3502 // Driver code 3503 //===----------------------------------------------------------------------===// 3504 3505 static TargetInfo *AllocateTarget(const std::string &T) { 3506 llvm::Triple Triple(T); 3507 llvm::Triple::OSType os = Triple.getOS(); 3508 3509 switch (Triple.getArch()) { 3510 default: 3511 return NULL; 3512 3513 case llvm::Triple::arm: 3514 case llvm::Triple::thumb: 3515 if (Triple.isOSDarwin()) 3516 return new DarwinARMTargetInfo(T); 3517 3518 switch (os) { 3519 case llvm::Triple::Linux: 3520 return new LinuxTargetInfo<ARMTargetInfo>(T); 3521 case llvm::Triple::FreeBSD: 3522 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3523 case llvm::Triple::NetBSD: 3524 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3525 case llvm::Triple::RTEMS: 3526 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3527 default: 3528 return new ARMTargetInfo(T); 3529 } 3530 3531 case llvm::Triple::bfin: 3532 if ( os == llvm::Triple::RTEMS ) 3533 return new RTEMSTargetInfo<BlackfinTargetInfo>(T); 3534 return new BlackfinTargetInfo(T); 3535 3536 case llvm::Triple::msp430: 3537 return new MSP430TargetInfo(T); 3538 3539 case llvm::Triple::mips: 3540 switch (os) { 3541 case llvm::Triple::Linux: 3542 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3543 case llvm::Triple::RTEMS: 3544 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3545 case llvm::Triple::FreeBSD: 3546 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3547 case llvm::Triple::NetBSD: 3548 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3549 default: 3550 return new Mips32EBTargetInfo(T); 3551 } 3552 3553 case llvm::Triple::mipsel: 3554 switch (os) { 3555 case llvm::Triple::Linux: 3556 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3557 case llvm::Triple::RTEMS: 3558 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3559 case llvm::Triple::FreeBSD: 3560 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3561 case llvm::Triple::NetBSD: 3562 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3563 default: 3564 return new Mips32ELTargetInfo(T); 3565 } 3566 3567 case llvm::Triple::mips64: 3568 switch (os) { 3569 case llvm::Triple::Linux: 3570 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3571 case llvm::Triple::RTEMS: 3572 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3573 case llvm::Triple::FreeBSD: 3574 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3575 case llvm::Triple::NetBSD: 3576 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3577 default: 3578 return new Mips64EBTargetInfo(T); 3579 } 3580 3581 case llvm::Triple::mips64el: 3582 switch (os) { 3583 case llvm::Triple::Linux: 3584 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3585 case llvm::Triple::RTEMS: 3586 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3587 case llvm::Triple::FreeBSD: 3588 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3589 case llvm::Triple::NetBSD: 3590 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3591 default: 3592 return new Mips64ELTargetInfo(T); 3593 } 3594 3595 case llvm::Triple::le32: 3596 switch (os) { 3597 case llvm::Triple::NativeClient: 3598 return new PNaClTargetInfo(T); 3599 default: 3600 return NULL; 3601 } 3602 3603 case llvm::Triple::ppc: 3604 if (Triple.isOSDarwin()) 3605 return new DarwinPPC32TargetInfo(T); 3606 switch (os) { 3607 case llvm::Triple::Linux: 3608 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3609 case llvm::Triple::FreeBSD: 3610 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3611 case llvm::Triple::NetBSD: 3612 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3613 case llvm::Triple::RTEMS: 3614 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3615 default: 3616 return new PPC32TargetInfo(T); 3617 } 3618 3619 case llvm::Triple::ppc64: 3620 if (Triple.isOSDarwin()) 3621 return new DarwinPPC64TargetInfo(T); 3622 switch (os) { 3623 case llvm::Triple::Linux: 3624 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3625 case llvm::Triple::Lv2: 3626 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3627 case llvm::Triple::FreeBSD: 3628 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3629 case llvm::Triple::NetBSD: 3630 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3631 default: 3632 return new PPC64TargetInfo(T); 3633 } 3634 3635 case llvm::Triple::ptx32: 3636 return new PTX32TargetInfo(T); 3637 case llvm::Triple::ptx64: 3638 return new PTX64TargetInfo(T); 3639 3640 case llvm::Triple::mblaze: 3641 return new MBlazeTargetInfo(T); 3642 3643 case llvm::Triple::sparc: 3644 switch (os) { 3645 case llvm::Triple::Linux: 3646 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3647 case llvm::Triple::AuroraUX: 3648 return new AuroraUXSparcV8TargetInfo(T); 3649 case llvm::Triple::Solaris: 3650 return new SolarisSparcV8TargetInfo(T); 3651 case llvm::Triple::NetBSD: 3652 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3653 case llvm::Triple::RTEMS: 3654 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3655 default: 3656 return new SparcV8TargetInfo(T); 3657 } 3658 3659 // FIXME: Need a real SPU target. 3660 case llvm::Triple::cellspu: 3661 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3662 3663 case llvm::Triple::systemz: 3664 return new SystemZTargetInfo(T); 3665 3666 case llvm::Triple::tce: 3667 return new TCETargetInfo(T); 3668 3669 case llvm::Triple::x86: 3670 if (Triple.isOSDarwin()) 3671 return new DarwinI386TargetInfo(T); 3672 3673 switch (os) { 3674 case llvm::Triple::AuroraUX: 3675 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3676 case llvm::Triple::Linux: 3677 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3678 case llvm::Triple::DragonFly: 3679 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3680 case llvm::Triple::NetBSD: 3681 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3682 case llvm::Triple::OpenBSD: 3683 return new OpenBSDI386TargetInfo(T); 3684 case llvm::Triple::FreeBSD: 3685 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3686 case llvm::Triple::Minix: 3687 return new MinixTargetInfo<X86_32TargetInfo>(T); 3688 case llvm::Triple::Solaris: 3689 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3690 case llvm::Triple::Cygwin: 3691 return new CygwinX86_32TargetInfo(T); 3692 case llvm::Triple::MinGW32: 3693 return new MinGWX86_32TargetInfo(T); 3694 case llvm::Triple::Win32: 3695 return new VisualStudioWindowsX86_32TargetInfo(T); 3696 case llvm::Triple::Haiku: 3697 return new HaikuX86_32TargetInfo(T); 3698 case llvm::Triple::RTEMS: 3699 return new RTEMSX86_32TargetInfo(T); 3700 default: 3701 return new X86_32TargetInfo(T); 3702 } 3703 3704 case llvm::Triple::x86_64: 3705 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3706 return new DarwinX86_64TargetInfo(T); 3707 3708 switch (os) { 3709 case llvm::Triple::AuroraUX: 3710 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3711 case llvm::Triple::Linux: 3712 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3713 case llvm::Triple::DragonFly: 3714 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3715 case llvm::Triple::NetBSD: 3716 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3717 case llvm::Triple::OpenBSD: 3718 return new OpenBSDX86_64TargetInfo(T); 3719 case llvm::Triple::FreeBSD: 3720 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3721 case llvm::Triple::Solaris: 3722 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3723 case llvm::Triple::MinGW32: 3724 return new MinGWX86_64TargetInfo(T); 3725 case llvm::Triple::Win32: // This is what Triple.h supports now. 3726 return new VisualStudioWindowsX86_64TargetInfo(T); 3727 default: 3728 return new X86_64TargetInfo(T); 3729 } 3730 } 3731 } 3732 3733 /// CreateTargetInfo - Return the target info object for the specified target 3734 /// triple. 3735 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3736 TargetOptions &Opts) { 3737 llvm::Triple Triple(Opts.Triple); 3738 3739 // Construct the target 3740 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3741 if (!Target) { 3742 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3743 return 0; 3744 } 3745 3746 // Set the target CPU if specified. 3747 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3748 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3749 return 0; 3750 } 3751 3752 // Set the target ABI if specified. 3753 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3754 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3755 return 0; 3756 } 3757 3758 // Set the target C++ ABI. 3759 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3760 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3761 return 0; 3762 } 3763 3764 // Compute the default target features, we need the target to handle this 3765 // because features may have dependencies on one another. 3766 llvm::StringMap<bool> Features; 3767 Target->getDefaultFeatures(Features); 3768 3769 // Apply the user specified deltas. 3770 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3771 ie = Opts.Features.end(); it != ie; ++it) { 3772 const char *Name = it->c_str(); 3773 3774 // Apply the feature via the target. 3775 if ((Name[0] != '-' && Name[0] != '+') || 3776 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3777 Diags.Report(diag::err_target_invalid_feature) << Name; 3778 return 0; 3779 } 3780 } 3781 3782 // Add the features to the compile options. 3783 // 3784 // FIXME: If we are completely confident that we have the right set, we only 3785 // need to pass the minuses. 3786 Opts.Features.clear(); 3787 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3788 ie = Features.end(); it != ie; ++it) 3789 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3790 it->first().str()); 3791 Target->HandleTargetFeatures(Opts.Features); 3792 3793 return Target.take(); 3794 } 3795