1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 unsigned Release = Triple.getOSMajorVersion(); 251 if (Release == 0U) 252 Release = 8; 253 254 Builder.defineMacro("__FreeBSD__", Twine(Release)); 255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 257 DefineStd(Builder, "unix", Opts); 258 Builder.defineMacro("__ELF__"); 259 } 260 public: 261 FreeBSDTargetInfo(const std::string &triple) 262 : OSTargetInfo<Target>(triple) { 263 this->UserLabelPrefix = ""; 264 265 llvm::Triple Triple(triple); 266 switch (Triple.getArch()) { 267 default: 268 case llvm::Triple::x86: 269 case llvm::Triple::x86_64: 270 this->MCountName = ".mcount"; 271 break; 272 case llvm::Triple::mips: 273 case llvm::Triple::mipsel: 274 case llvm::Triple::ppc: 275 case llvm::Triple::ppc64: 276 this->MCountName = "_mcount"; 277 break; 278 case llvm::Triple::arm: 279 this->MCountName = "__mcount"; 280 break; 281 } 282 283 } 284 }; 285 286 // Minix Target 287 template<typename Target> 288 class MinixTargetInfo : public OSTargetInfo<Target> { 289 protected: 290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 291 MacroBuilder &Builder) const { 292 // Minix defines 293 294 Builder.defineMacro("__minix", "3"); 295 Builder.defineMacro("_EM_WSIZE", "4"); 296 Builder.defineMacro("_EM_PSIZE", "4"); 297 Builder.defineMacro("_EM_SSIZE", "2"); 298 Builder.defineMacro("_EM_LSIZE", "4"); 299 Builder.defineMacro("_EM_FSIZE", "4"); 300 Builder.defineMacro("_EM_DSIZE", "8"); 301 DefineStd(Builder, "unix", Opts); 302 } 303 public: 304 MinixTargetInfo(const std::string &triple) 305 : OSTargetInfo<Target>(triple) { 306 this->UserLabelPrefix = ""; 307 } 308 }; 309 310 // Linux target 311 template<typename Target> 312 class LinuxTargetInfo : public OSTargetInfo<Target> { 313 protected: 314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 315 MacroBuilder &Builder) const { 316 // Linux defines; list based off of gcc output 317 DefineStd(Builder, "unix", Opts); 318 DefineStd(Builder, "linux", Opts); 319 Builder.defineMacro("__gnu_linux__"); 320 Builder.defineMacro("__ELF__"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326 public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336 }; 337 338 // NetBSD Target 339 template<typename Target> 340 class NetBSDTargetInfo : public OSTargetInfo<Target> { 341 protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351 public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356 }; 357 358 // OpenBSD Target 359 template<typename Target> 360 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361 protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_POSIX_THREADS"); 371 } 372 public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) {} 375 }; 376 377 // PSP Target 378 template<typename Target> 379 class PSPTargetInfo : public OSTargetInfo<Target> { 380 protected: 381 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 382 MacroBuilder &Builder) const { 383 // PSP defines; list based on the output of the pspdev gcc toolchain. 384 Builder.defineMacro("PSP"); 385 Builder.defineMacro("_PSP"); 386 Builder.defineMacro("__psp__"); 387 Builder.defineMacro("__ELF__"); 388 } 389 public: 390 PSPTargetInfo(const std::string& triple) 391 : OSTargetInfo<Target>(triple) { 392 this->UserLabelPrefix = ""; 393 } 394 }; 395 396 // PS3 PPU Target 397 template<typename Target> 398 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 399 protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PS3 PPU defines. 403 Builder.defineMacro("__PPC__"); 404 Builder.defineMacro("__PPU__"); 405 Builder.defineMacro("__CELLOS_LV2__"); 406 Builder.defineMacro("__ELF__"); 407 Builder.defineMacro("__LP32__"); 408 Builder.defineMacro("_ARCH_PPC64"); 409 Builder.defineMacro("__powerpc64__"); 410 } 411 public: 412 PS3PPUTargetInfo(const std::string& triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 416 this->IntMaxType = TargetInfo::SignedLongLong; 417 this->UIntMaxType = TargetInfo::UnsignedLongLong; 418 this->Int64Type = TargetInfo::SignedLongLong; 419 this->SizeType = TargetInfo::UnsignedInt; 420 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 421 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 422 } 423 }; 424 425 // FIXME: Need a real SPU target. 426 // PS3 SPU Target 427 template<typename Target> 428 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 429 protected: 430 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 431 MacroBuilder &Builder) const { 432 // PS3 PPU defines. 433 Builder.defineMacro("__SPU__"); 434 Builder.defineMacro("__ELF__"); 435 } 436 public: 437 PS3SPUTargetInfo(const std::string& triple) 438 : OSTargetInfo<Target>(triple) { 439 this->UserLabelPrefix = ""; 440 } 441 }; 442 443 // AuroraUX target 444 template<typename Target> 445 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 446 protected: 447 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 448 MacroBuilder &Builder) const { 449 DefineStd(Builder, "sun", Opts); 450 DefineStd(Builder, "unix", Opts); 451 Builder.defineMacro("__ELF__"); 452 Builder.defineMacro("__svr4__"); 453 Builder.defineMacro("__SVR4"); 454 } 455 public: 456 AuroraUXTargetInfo(const std::string& triple) 457 : OSTargetInfo<Target>(triple) { 458 this->UserLabelPrefix = ""; 459 this->WCharType = this->SignedLong; 460 // FIXME: WIntType should be SignedLong 461 } 462 }; 463 464 // Solaris target 465 template<typename Target> 466 class SolarisTargetInfo : public OSTargetInfo<Target> { 467 protected: 468 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 469 MacroBuilder &Builder) const { 470 DefineStd(Builder, "sun", Opts); 471 DefineStd(Builder, "unix", Opts); 472 Builder.defineMacro("__ELF__"); 473 Builder.defineMacro("__svr4__"); 474 Builder.defineMacro("__SVR4"); 475 } 476 public: 477 SolarisTargetInfo(const std::string& triple) 478 : OSTargetInfo<Target>(triple) { 479 this->UserLabelPrefix = ""; 480 this->WCharType = this->SignedLong; 481 // FIXME: WIntType should be SignedLong 482 } 483 }; 484 485 // Windows target 486 template<typename Target> 487 class WindowsTargetInfo : public OSTargetInfo<Target> { 488 protected: 489 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 490 MacroBuilder &Builder) const { 491 Builder.defineMacro("_WIN32"); 492 } 493 void getVisualStudioDefines(const LangOptions &Opts, 494 MacroBuilder &Builder) const { 495 if (Opts.CPlusPlus) { 496 if (Opts.RTTI) 497 Builder.defineMacro("_CPPRTTI"); 498 499 if (Opts.Exceptions) 500 Builder.defineMacro("_CPPUNWIND"); 501 } 502 503 if (!Opts.CharIsSigned) 504 Builder.defineMacro("_CHAR_UNSIGNED"); 505 506 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 507 // but it works for now. 508 if (Opts.POSIXThreads) 509 Builder.defineMacro("_MT"); 510 511 if (Opts.MSCVersion != 0) 512 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 513 514 if (Opts.MicrosoftExt) { 515 Builder.defineMacro("_MSC_EXTENSIONS"); 516 517 if (Opts.CPlusPlus0x) { 518 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 519 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 520 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 521 } 522 } 523 524 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 525 } 526 527 public: 528 WindowsTargetInfo(const std::string &triple) 529 : OSTargetInfo<Target>(triple) {} 530 }; 531 532 } // end anonymous namespace. 533 534 //===----------------------------------------------------------------------===// 535 // Specific target implementations. 536 //===----------------------------------------------------------------------===// 537 538 namespace { 539 // PPC abstract base class 540 class PPCTargetInfo : public TargetInfo { 541 static const Builtin::Info BuiltinInfo[]; 542 static const char * const GCCRegNames[]; 543 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 544 public: 545 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 546 547 virtual void getTargetBuiltins(const Builtin::Info *&Records, 548 unsigned &NumRecords) const { 549 Records = BuiltinInfo; 550 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 551 } 552 553 virtual void getTargetDefines(const LangOptions &Opts, 554 MacroBuilder &Builder) const; 555 556 virtual void getGCCRegNames(const char * const *&Names, 557 unsigned &NumNames) const; 558 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 559 unsigned &NumAliases) const; 560 virtual bool validateAsmConstraint(const char *&Name, 561 TargetInfo::ConstraintInfo &Info) const { 562 switch (*Name) { 563 default: return false; 564 case 'O': // Zero 565 break; 566 case 'b': // Base register 567 case 'f': // Floating point register 568 Info.setAllowsRegister(); 569 break; 570 // FIXME: The following are added to allow parsing. 571 // I just took a guess at what the actions should be. 572 // Also, is more specific checking needed? I.e. specific registers? 573 case 'd': // Floating point register (containing 64-bit value) 574 case 'v': // Altivec vector register 575 Info.setAllowsRegister(); 576 break; 577 case 'w': 578 switch (Name[1]) { 579 case 'd':// VSX vector register to hold vector double data 580 case 'f':// VSX vector register to hold vector float data 581 case 's':// VSX vector register to hold scalar float data 582 case 'a':// Any VSX register 583 break; 584 default: 585 return false; 586 } 587 Info.setAllowsRegister(); 588 Name++; // Skip over 'w'. 589 break; 590 case 'h': // `MQ', `CTR', or `LINK' register 591 case 'q': // `MQ' register 592 case 'c': // `CTR' register 593 case 'l': // `LINK' register 594 case 'x': // `CR' register (condition register) number 0 595 case 'y': // `CR' register (condition register) 596 case 'z': // `XER[CA]' carry bit (part of the XER register) 597 Info.setAllowsRegister(); 598 break; 599 case 'I': // Signed 16-bit constant 600 case 'J': // Unsigned 16-bit constant shifted left 16 bits 601 // (use `L' instead for SImode constants) 602 case 'K': // Unsigned 16-bit constant 603 case 'L': // Signed 16-bit constant shifted left 16 bits 604 case 'M': // Constant larger than 31 605 case 'N': // Exact power of 2 606 case 'P': // Constant whose negation is a signed 16-bit constant 607 case 'G': // Floating point constant that can be loaded into a 608 // register with one instruction per word 609 case 'H': // Integer/Floating point constant that can be loaded 610 // into a register using three instructions 611 break; 612 case 'm': // Memory operand. Note that on PowerPC targets, m can 613 // include addresses that update the base register. It 614 // is therefore only safe to use `m' in an asm statement 615 // if that asm statement accesses the operand exactly once. 616 // The asm statement must also use `%U<opno>' as a 617 // placeholder for the "update" flag in the corresponding 618 // load or store instruction. For example: 619 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 620 // is correct but: 621 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 622 // is not. Use es rather than m if you don't want the base 623 // register to be updated. 624 case 'e': 625 if (Name[1] != 's') 626 return false; 627 // es: A "stable" memory operand; that is, one which does not 628 // include any automodification of the base register. Unlike 629 // `m', this constraint can be used in asm statements that 630 // might access the operand several times, or that might not 631 // access it at all. 632 Info.setAllowsMemory(); 633 Name++; // Skip over 'e'. 634 break; 635 case 'Q': // Memory operand that is an offset from a register (it is 636 // usually better to use `m' or `es' in asm statements) 637 case 'Z': // Memory operand that is an indexed or indirect from a 638 // register (it is usually better to use `m' or `es' in 639 // asm statements) 640 Info.setAllowsMemory(); 641 Info.setAllowsRegister(); 642 break; 643 case 'R': // AIX TOC entry 644 case 'a': // Address operand that is an indexed or indirect from a 645 // register (`p' is preferable for asm statements) 646 case 'S': // Constant suitable as a 64-bit mask operand 647 case 'T': // Constant suitable as a 32-bit mask operand 648 case 'U': // System V Release 4 small data area reference 649 case 't': // AND masks that can be performed by two rldic{l, r} 650 // instructions 651 case 'W': // Vector constant that does not require memory 652 case 'j': // Vector constant that is all zeros. 653 break; 654 // End FIXME. 655 } 656 return true; 657 } 658 virtual const char *getClobbers() const { 659 return ""; 660 } 661 }; 662 663 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 664 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 665 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 666 ALL_LANGUAGES }, 667 #include "clang/Basic/BuiltinsPPC.def" 668 }; 669 670 671 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 672 /// #defines that are not tied to a specific subtarget. 673 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 674 MacroBuilder &Builder) const { 675 // Target identification. 676 Builder.defineMacro("__ppc__"); 677 Builder.defineMacro("_ARCH_PPC"); 678 Builder.defineMacro("__powerpc__"); 679 Builder.defineMacro("__POWERPC__"); 680 if (PointerWidth == 64) { 681 Builder.defineMacro("_ARCH_PPC64"); 682 Builder.defineMacro("_LP64"); 683 Builder.defineMacro("__LP64__"); 684 Builder.defineMacro("__powerpc64__"); 685 Builder.defineMacro("__ppc64__"); 686 } else { 687 Builder.defineMacro("__ppc__"); 688 } 689 690 // Target properties. 691 if (getTriple().getOS() != llvm::Triple::NetBSD) 692 Builder.defineMacro("_BIG_ENDIAN"); 693 Builder.defineMacro("__BIG_ENDIAN__"); 694 695 // Subtarget options. 696 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 697 Builder.defineMacro("__REGISTER_PREFIX__", ""); 698 699 // FIXME: Should be controlled by command line option. 700 Builder.defineMacro("__LONG_DOUBLE_128__"); 701 702 if (Opts.AltiVec) { 703 Builder.defineMacro("__VEC__", "10206"); 704 Builder.defineMacro("__ALTIVEC__"); 705 } 706 } 707 708 709 const char * const PPCTargetInfo::GCCRegNames[] = { 710 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 711 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 712 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 713 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 714 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 715 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 716 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 717 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 718 "mq", "lr", "ctr", "ap", 719 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 720 "xer", 721 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 722 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 723 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 724 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 725 "vrsave", "vscr", 726 "spe_acc", "spefscr", 727 "sfp" 728 }; 729 730 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 731 unsigned &NumNames) const { 732 Names = GCCRegNames; 733 NumNames = llvm::array_lengthof(GCCRegNames); 734 } 735 736 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 737 // While some of these aliases do map to different registers 738 // they still share the same register name. 739 { { "0" }, "r0" }, 740 { { "1"}, "r1" }, 741 { { "2" }, "r2" }, 742 { { "3" }, "r3" }, 743 { { "4" }, "r4" }, 744 { { "5" }, "r5" }, 745 { { "6" }, "r6" }, 746 { { "7" }, "r7" }, 747 { { "8" }, "r8" }, 748 { { "9" }, "r9" }, 749 { { "10" }, "r10" }, 750 { { "11" }, "r11" }, 751 { { "12" }, "r12" }, 752 { { "13" }, "r13" }, 753 { { "14" }, "r14" }, 754 { { "15" }, "r15" }, 755 { { "16" }, "r16" }, 756 { { "17" }, "r17" }, 757 { { "18" }, "r18" }, 758 { { "19" }, "r19" }, 759 { { "20" }, "r20" }, 760 { { "21" }, "r21" }, 761 { { "22" }, "r22" }, 762 { { "23" }, "r23" }, 763 { { "24" }, "r24" }, 764 { { "25" }, "r25" }, 765 { { "26" }, "r26" }, 766 { { "27" }, "r27" }, 767 { { "28" }, "r28" }, 768 { { "29" }, "r29" }, 769 { { "30" }, "r30" }, 770 { { "31" }, "r31" }, 771 { { "fr0" }, "f0" }, 772 { { "fr1" }, "f1" }, 773 { { "fr2" }, "f2" }, 774 { { "fr3" }, "f3" }, 775 { { "fr4" }, "f4" }, 776 { { "fr5" }, "f5" }, 777 { { "fr6" }, "f6" }, 778 { { "fr7" }, "f7" }, 779 { { "fr8" }, "f8" }, 780 { { "fr9" }, "f9" }, 781 { { "fr10" }, "f10" }, 782 { { "fr11" }, "f11" }, 783 { { "fr12" }, "f12" }, 784 { { "fr13" }, "f13" }, 785 { { "fr14" }, "f14" }, 786 { { "fr15" }, "f15" }, 787 { { "fr16" }, "f16" }, 788 { { "fr17" }, "f17" }, 789 { { "fr18" }, "f18" }, 790 { { "fr19" }, "f19" }, 791 { { "fr20" }, "f20" }, 792 { { "fr21" }, "f21" }, 793 { { "fr22" }, "f22" }, 794 { { "fr23" }, "f23" }, 795 { { "fr24" }, "f24" }, 796 { { "fr25" }, "f25" }, 797 { { "fr26" }, "f26" }, 798 { { "fr27" }, "f27" }, 799 { { "fr28" }, "f28" }, 800 { { "fr29" }, "f29" }, 801 { { "fr30" }, "f30" }, 802 { { "fr31" }, "f31" }, 803 { { "cc" }, "cr0" }, 804 }; 805 806 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 807 unsigned &NumAliases) const { 808 Aliases = GCCRegAliases; 809 NumAliases = llvm::array_lengthof(GCCRegAliases); 810 } 811 } // end anonymous namespace. 812 813 namespace { 814 class PPC32TargetInfo : public PPCTargetInfo { 815 public: 816 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 817 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 818 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 819 820 switch (getTriple().getOS()) { 821 case llvm::Triple::FreeBSD: 822 case llvm::Triple::NetBSD: 823 SizeType = UnsignedInt; 824 break; 825 default: 826 break; 827 } 828 } 829 830 virtual const char *getVAListDeclaration() const { 831 // This is the ELF definition, and is overridden by the Darwin sub-target 832 return "typedef struct __va_list_tag {" 833 " unsigned char gpr;" 834 " unsigned char fpr;" 835 " unsigned short reserved;" 836 " void* overflow_arg_area;" 837 " void* reg_save_area;" 838 "} __builtin_va_list[1];"; 839 } 840 }; 841 } // end anonymous namespace. 842 843 namespace { 844 class PPC64TargetInfo : public PPCTargetInfo { 845 public: 846 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 847 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 848 IntMaxType = SignedLong; 849 UIntMaxType = UnsignedLong; 850 Int64Type = SignedLong; 851 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 852 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 853 } 854 virtual const char *getVAListDeclaration() const { 855 return "typedef char* __builtin_va_list;"; 856 } 857 }; 858 } // end anonymous namespace. 859 860 861 namespace { 862 class DarwinPPC32TargetInfo : 863 public DarwinTargetInfo<PPC32TargetInfo> { 864 public: 865 DarwinPPC32TargetInfo(const std::string& triple) 866 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 867 HasAlignMac68kSupport = true; 868 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 869 } 870 virtual const char *getVAListDeclaration() const { 871 return "typedef char* __builtin_va_list;"; 872 } 873 }; 874 875 class DarwinPPC64TargetInfo : 876 public DarwinTargetInfo<PPC64TargetInfo> { 877 public: 878 DarwinPPC64TargetInfo(const std::string& triple) 879 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 880 HasAlignMac68kSupport = true; 881 } 882 }; 883 } // end anonymous namespace. 884 885 namespace { 886 static const unsigned PTXAddrSpaceMap[] = { 887 0, // opencl_global 888 4, // opencl_local 889 1 // opencl_constant 890 }; 891 class PTXTargetInfo : public TargetInfo { 892 static const char * const GCCRegNames[]; 893 static const Builtin::Info BuiltinInfo[]; 894 std::vector<llvm::StringRef> AvailableFeatures; 895 public: 896 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 897 TLSSupported = false; 898 LongWidth = LongAlign = 64; 899 AddrSpaceMap = &PTXAddrSpaceMap; 900 // Define available target features 901 // These must be defined in sorted order! 902 AvailableFeatures.push_back("compute10"); 903 AvailableFeatures.push_back("compute11"); 904 AvailableFeatures.push_back("compute12"); 905 AvailableFeatures.push_back("compute13"); 906 AvailableFeatures.push_back("compute20"); 907 AvailableFeatures.push_back("double"); 908 AvailableFeatures.push_back("no-fma"); 909 AvailableFeatures.push_back("ptx20"); 910 AvailableFeatures.push_back("ptx21"); 911 AvailableFeatures.push_back("ptx22"); 912 AvailableFeatures.push_back("ptx23"); 913 AvailableFeatures.push_back("sm10"); 914 AvailableFeatures.push_back("sm11"); 915 AvailableFeatures.push_back("sm12"); 916 AvailableFeatures.push_back("sm13"); 917 AvailableFeatures.push_back("sm20"); 918 AvailableFeatures.push_back("sm21"); 919 AvailableFeatures.push_back("sm22"); 920 AvailableFeatures.push_back("sm23"); 921 } 922 virtual void getTargetDefines(const LangOptions &Opts, 923 MacroBuilder &Builder) const { 924 Builder.defineMacro("__PTX__"); 925 } 926 virtual void getTargetBuiltins(const Builtin::Info *&Records, 927 unsigned &NumRecords) const { 928 Records = BuiltinInfo; 929 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 930 } 931 932 virtual void getGCCRegNames(const char * const *&Names, 933 unsigned &NumNames) const; 934 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 935 unsigned &NumAliases) const { 936 // No aliases. 937 Aliases = 0; 938 NumAliases = 0; 939 } 940 virtual bool validateAsmConstraint(const char *&Name, 941 TargetInfo::ConstraintInfo &info) const { 942 // FIXME: implement 943 return true; 944 } 945 virtual const char *getClobbers() const { 946 // FIXME: Is this really right? 947 return ""; 948 } 949 virtual const char *getVAListDeclaration() const { 950 // FIXME: implement 951 return "typedef char* __builtin_va_list;"; 952 } 953 954 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 955 const std::string &Name, 956 bool Enabled) const; 957 }; 958 959 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 960 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 961 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 962 ALL_LANGUAGES }, 963 #include "clang/Basic/BuiltinsPTX.def" 964 }; 965 966 const char * const PTXTargetInfo::GCCRegNames[] = { 967 "r0" 968 }; 969 970 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 971 unsigned &NumNames) const { 972 Names = GCCRegNames; 973 NumNames = llvm::array_lengthof(GCCRegNames); 974 } 975 976 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 977 const std::string &Name, 978 bool Enabled) const { 979 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 980 Name)) { 981 Features[Name] = Enabled; 982 return true; 983 } else { 984 return false; 985 } 986 } 987 988 class PTX32TargetInfo : public PTXTargetInfo { 989 public: 990 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 991 PointerWidth = PointerAlign = 32; 992 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 993 DescriptionString 994 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 995 } 996 }; 997 998 class PTX64TargetInfo : public PTXTargetInfo { 999 public: 1000 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1001 PointerWidth = PointerAlign = 64; 1002 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1003 DescriptionString 1004 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1005 } 1006 }; 1007 } 1008 1009 namespace { 1010 // MBlaze abstract base class 1011 class MBlazeTargetInfo : public TargetInfo { 1012 static const char * const GCCRegNames[]; 1013 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1014 1015 public: 1016 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1017 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1018 } 1019 1020 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1021 unsigned &NumRecords) const { 1022 // FIXME: Implement. 1023 Records = 0; 1024 NumRecords = 0; 1025 } 1026 1027 virtual void getTargetDefines(const LangOptions &Opts, 1028 MacroBuilder &Builder) const; 1029 1030 virtual const char *getVAListDeclaration() const { 1031 return "typedef char* __builtin_va_list;"; 1032 } 1033 virtual const char *getTargetPrefix() const { 1034 return "mblaze"; 1035 } 1036 virtual void getGCCRegNames(const char * const *&Names, 1037 unsigned &NumNames) const; 1038 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1039 unsigned &NumAliases) const; 1040 virtual bool validateAsmConstraint(const char *&Name, 1041 TargetInfo::ConstraintInfo &Info) const { 1042 switch (*Name) { 1043 default: return false; 1044 case 'O': // Zero 1045 return true; 1046 case 'b': // Base register 1047 case 'f': // Floating point register 1048 Info.setAllowsRegister(); 1049 return true; 1050 } 1051 } 1052 virtual const char *getClobbers() const { 1053 return ""; 1054 } 1055 }; 1056 1057 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1058 /// #defines that are not tied to a specific subtarget. 1059 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1060 MacroBuilder &Builder) const { 1061 // Target identification. 1062 Builder.defineMacro("__microblaze__"); 1063 Builder.defineMacro("_ARCH_MICROBLAZE"); 1064 Builder.defineMacro("__MICROBLAZE__"); 1065 1066 // Target properties. 1067 Builder.defineMacro("_BIG_ENDIAN"); 1068 Builder.defineMacro("__BIG_ENDIAN__"); 1069 1070 // Subtarget options. 1071 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1072 } 1073 1074 1075 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1076 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1077 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1078 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1079 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1080 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1081 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1082 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1083 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1084 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1085 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1086 }; 1087 1088 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1089 unsigned &NumNames) const { 1090 Names = GCCRegNames; 1091 NumNames = llvm::array_lengthof(GCCRegNames); 1092 } 1093 1094 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1095 { {"f0"}, "r0" }, 1096 { {"f1"}, "r1" }, 1097 { {"f2"}, "r2" }, 1098 { {"f3"}, "r3" }, 1099 { {"f4"}, "r4" }, 1100 { {"f5"}, "r5" }, 1101 { {"f6"}, "r6" }, 1102 { {"f7"}, "r7" }, 1103 { {"f8"}, "r8" }, 1104 { {"f9"}, "r9" }, 1105 { {"f10"}, "r10" }, 1106 { {"f11"}, "r11" }, 1107 { {"f12"}, "r12" }, 1108 { {"f13"}, "r13" }, 1109 { {"f14"}, "r14" }, 1110 { {"f15"}, "r15" }, 1111 { {"f16"}, "r16" }, 1112 { {"f17"}, "r17" }, 1113 { {"f18"}, "r18" }, 1114 { {"f19"}, "r19" }, 1115 { {"f20"}, "r20" }, 1116 { {"f21"}, "r21" }, 1117 { {"f22"}, "r22" }, 1118 { {"f23"}, "r23" }, 1119 { {"f24"}, "r24" }, 1120 { {"f25"}, "r25" }, 1121 { {"f26"}, "r26" }, 1122 { {"f27"}, "r27" }, 1123 { {"f28"}, "r28" }, 1124 { {"f29"}, "r29" }, 1125 { {"f30"}, "r30" }, 1126 { {"f31"}, "r31" }, 1127 }; 1128 1129 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1130 unsigned &NumAliases) const { 1131 Aliases = GCCRegAliases; 1132 NumAliases = llvm::array_lengthof(GCCRegAliases); 1133 } 1134 } // end anonymous namespace. 1135 1136 namespace { 1137 // Namespace for x86 abstract base class 1138 const Builtin::Info BuiltinInfo[] = { 1139 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1140 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1141 ALL_LANGUAGES }, 1142 #include "clang/Basic/BuiltinsX86.def" 1143 }; 1144 1145 static const char* const GCCRegNames[] = { 1146 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1147 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1148 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1149 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1150 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1152 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1153 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1154 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1155 }; 1156 1157 const TargetInfo::AddlRegName AddlRegNames[] = { 1158 { { "al", "ah", "eax", "rax" }, 0 }, 1159 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1160 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1161 { { "dl", "dh", "edx", "rdx" }, 1 }, 1162 { { "esi", "rsi" }, 4 }, 1163 { { "edi", "rdi" }, 5 }, 1164 { { "esp", "rsp" }, 7 }, 1165 { { "ebp", "rbp" }, 6 }, 1166 }; 1167 1168 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1169 // most of the implementation can be shared. 1170 class X86TargetInfo : public TargetInfo { 1171 enum X86SSEEnum { 1172 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1173 } SSELevel; 1174 enum MMX3DNowEnum { 1175 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1176 } MMX3DNowLevel; 1177 1178 bool HasAES; 1179 bool HasAVX; 1180 1181 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1182 /// 1183 /// Each enumeration represents a particular CPU supported by Clang. These 1184 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1185 enum CPUKind { 1186 CK_Generic, 1187 1188 /// \name i386 1189 /// i386-generation processors. 1190 //@{ 1191 CK_i386, 1192 //@} 1193 1194 /// \name i486 1195 /// i486-generation processors. 1196 //@{ 1197 CK_i486, 1198 CK_WinChipC6, 1199 CK_WinChip2, 1200 CK_C3, 1201 //@} 1202 1203 /// \name i586 1204 /// i586-generation processors, P5 microarchitecture based. 1205 //@{ 1206 CK_i586, 1207 CK_Pentium, 1208 CK_PentiumMMX, 1209 //@} 1210 1211 /// \name i686 1212 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1213 //@{ 1214 CK_i686, 1215 CK_PentiumPro, 1216 CK_Pentium2, 1217 CK_Pentium3, 1218 CK_Pentium3M, 1219 CK_PentiumM, 1220 CK_C3_2, 1221 1222 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1223 /// Clang however has some logic to suport this. 1224 // FIXME: Warn, deprecate, and potentially remove this. 1225 CK_Yonah, 1226 //@} 1227 1228 /// \name Netburst 1229 /// Netburst microarchitecture based processors. 1230 //@{ 1231 CK_Pentium4, 1232 CK_Pentium4M, 1233 CK_Prescott, 1234 CK_Nocona, 1235 //@} 1236 1237 /// \name Core 1238 /// Core microarchitecture based processors. 1239 //@{ 1240 CK_Core2, 1241 1242 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1243 /// codename which GCC no longer accepts as an option to -march, but Clang 1244 /// has some logic for recognizing it. 1245 // FIXME: Warn, deprecate, and potentially remove this. 1246 CK_Penryn, 1247 //@} 1248 1249 /// \name Atom 1250 /// Atom processors 1251 //@{ 1252 CK_Atom, 1253 //@} 1254 1255 /// \name Nehalem 1256 /// Nehalem microarchitecture based processors. 1257 //@{ 1258 CK_Corei7, 1259 CK_Corei7AVX, 1260 CK_CoreAVXi, 1261 //@} 1262 1263 /// \name K6 1264 /// K6 architecture processors. 1265 //@{ 1266 CK_K6, 1267 CK_K6_2, 1268 CK_K6_3, 1269 //@} 1270 1271 /// \name K7 1272 /// K7 architecture processors. 1273 //@{ 1274 CK_Athlon, 1275 CK_AthlonThunderbird, 1276 CK_Athlon4, 1277 CK_AthlonXP, 1278 CK_AthlonMP, 1279 //@} 1280 1281 /// \name K8 1282 /// K8 architecture processors. 1283 //@{ 1284 CK_Athlon64, 1285 CK_Athlon64SSE3, 1286 CK_AthlonFX, 1287 CK_K8, 1288 CK_K8SSE3, 1289 CK_Opteron, 1290 CK_OpteronSSE3, 1291 CK_AMDFAM10, 1292 1293 /// \name K10 1294 /// K10 architecture processors. 1295 //@{ 1296 CK_BDVER1, 1297 CK_BDVER2, 1298 1299 /// This specification is deprecated and will be removed in the future. 1300 /// Users should prefer \see CK_K8. 1301 // FIXME: Warn on this when the CPU is set to it. 1302 CK_x86_64, 1303 //@} 1304 1305 /// \name Geode 1306 /// Geode processors. 1307 //@{ 1308 CK_Geode 1309 //@} 1310 } CPU; 1311 1312 public: 1313 X86TargetInfo(const std::string& triple) 1314 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1315 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1316 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1317 } 1318 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1319 unsigned &NumRecords) const { 1320 Records = BuiltinInfo; 1321 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1322 } 1323 virtual void getGCCRegNames(const char * const *&Names, 1324 unsigned &NumNames) const { 1325 Names = GCCRegNames; 1326 NumNames = llvm::array_lengthof(GCCRegNames); 1327 } 1328 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1329 unsigned &NumAliases) const { 1330 Aliases = 0; 1331 NumAliases = 0; 1332 } 1333 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1334 unsigned &NumNames) const { 1335 Names = AddlRegNames; 1336 NumNames = llvm::array_lengthof(AddlRegNames); 1337 } 1338 virtual bool validateAsmConstraint(const char *&Name, 1339 TargetInfo::ConstraintInfo &info) const; 1340 virtual std::string convertConstraint(const char *&Constraint) const; 1341 virtual const char *getClobbers() const { 1342 return "~{dirflag},~{fpsr},~{flags}"; 1343 } 1344 virtual void getTargetDefines(const LangOptions &Opts, 1345 MacroBuilder &Builder) const; 1346 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1347 const std::string &Name, 1348 bool Enabled) const; 1349 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1350 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1351 virtual const char* getABI() const { 1352 if (PointerWidth == 64 && HasAVX) 1353 return "avx"; 1354 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1355 return "no-mmx"; 1356 return ""; 1357 } 1358 virtual bool setCPU(const std::string &Name) { 1359 CPU = llvm::StringSwitch<CPUKind>(Name) 1360 .Case("i386", CK_i386) 1361 .Case("i486", CK_i486) 1362 .Case("winchip-c6", CK_WinChipC6) 1363 .Case("winchip2", CK_WinChip2) 1364 .Case("c3", CK_C3) 1365 .Case("i586", CK_i586) 1366 .Case("pentium", CK_Pentium) 1367 .Case("pentium-mmx", CK_PentiumMMX) 1368 .Case("i686", CK_i686) 1369 .Case("pentiumpro", CK_PentiumPro) 1370 .Case("pentium2", CK_Pentium2) 1371 .Case("pentium3", CK_Pentium3) 1372 .Case("pentium3m", CK_Pentium3M) 1373 .Case("pentium-m", CK_PentiumM) 1374 .Case("c3-2", CK_C3_2) 1375 .Case("yonah", CK_Yonah) 1376 .Case("pentium4", CK_Pentium4) 1377 .Case("pentium4m", CK_Pentium4M) 1378 .Case("prescott", CK_Prescott) 1379 .Case("nocona", CK_Nocona) 1380 .Case("core2", CK_Core2) 1381 .Case("penryn", CK_Penryn) 1382 .Case("atom", CK_Atom) 1383 .Case("corei7", CK_Corei7) 1384 .Case("corei7-avx", CK_Corei7AVX) 1385 .Case("core-avx-i", CK_CoreAVXi) 1386 .Case("k6", CK_K6) 1387 .Case("k6-2", CK_K6_2) 1388 .Case("k6-3", CK_K6_3) 1389 .Case("athlon", CK_Athlon) 1390 .Case("athlon-tbird", CK_AthlonThunderbird) 1391 .Case("athlon-4", CK_Athlon4) 1392 .Case("athlon-xp", CK_AthlonXP) 1393 .Case("athlon-mp", CK_AthlonMP) 1394 .Case("athlon64", CK_Athlon64) 1395 .Case("athlon64-sse3", CK_Athlon64SSE3) 1396 .Case("athlon-fx", CK_AthlonFX) 1397 .Case("k8", CK_K8) 1398 .Case("k8-sse3", CK_K8SSE3) 1399 .Case("opteron", CK_Opteron) 1400 .Case("opteron-sse3", CK_OpteronSSE3) 1401 .Case("amdfam10", CK_AMDFAM10) 1402 .Case("bdver1", CK_BDVER1) 1403 .Case("bdver2", CK_BDVER2) 1404 .Case("x86-64", CK_x86_64) 1405 .Case("geode", CK_Geode) 1406 .Default(CK_Generic); 1407 1408 // Perform any per-CPU checks necessary to determine if this CPU is 1409 // acceptable. 1410 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1411 // invalid without explaining *why*. 1412 switch (CPU) { 1413 case CK_Generic: 1414 // No processor selected! 1415 return false; 1416 1417 case CK_i386: 1418 case CK_i486: 1419 case CK_WinChipC6: 1420 case CK_WinChip2: 1421 case CK_C3: 1422 case CK_i586: 1423 case CK_Pentium: 1424 case CK_PentiumMMX: 1425 case CK_i686: 1426 case CK_PentiumPro: 1427 case CK_Pentium2: 1428 case CK_Pentium3: 1429 case CK_Pentium3M: 1430 case CK_PentiumM: 1431 case CK_Yonah: 1432 case CK_C3_2: 1433 case CK_Pentium4: 1434 case CK_Pentium4M: 1435 case CK_Prescott: 1436 case CK_K6: 1437 case CK_K6_2: 1438 case CK_K6_3: 1439 case CK_Athlon: 1440 case CK_AthlonThunderbird: 1441 case CK_Athlon4: 1442 case CK_AthlonXP: 1443 case CK_AthlonMP: 1444 case CK_Geode: 1445 // Only accept certain architectures when compiling in 32-bit mode. 1446 if (PointerWidth != 32) 1447 return false; 1448 1449 // Fallthrough 1450 case CK_Nocona: 1451 case CK_Core2: 1452 case CK_Penryn: 1453 case CK_Atom: 1454 case CK_Corei7: 1455 case CK_Corei7AVX: 1456 case CK_CoreAVXi: 1457 case CK_Athlon64: 1458 case CK_Athlon64SSE3: 1459 case CK_AthlonFX: 1460 case CK_K8: 1461 case CK_K8SSE3: 1462 case CK_Opteron: 1463 case CK_OpteronSSE3: 1464 case CK_AMDFAM10: 1465 case CK_BDVER1: 1466 case CK_BDVER2: 1467 case CK_x86_64: 1468 return true; 1469 } 1470 llvm_unreachable("Unhandled CPU kind"); 1471 } 1472 }; 1473 1474 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1475 // FIXME: This should not be here. 1476 Features["3dnow"] = false; 1477 Features["3dnowa"] = false; 1478 Features["mmx"] = false; 1479 Features["sse"] = false; 1480 Features["sse2"] = false; 1481 Features["sse3"] = false; 1482 Features["ssse3"] = false; 1483 Features["sse41"] = false; 1484 Features["sse42"] = false; 1485 Features["sse4a"] = false; 1486 Features["aes"] = false; 1487 Features["avx"] = false; 1488 1489 // FIXME: This *really* should not be here. 1490 1491 // X86_64 always has SSE2. 1492 if (PointerWidth == 64) 1493 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1494 1495 switch (CPU) { 1496 case CK_Generic: 1497 case CK_i386: 1498 case CK_i486: 1499 case CK_i586: 1500 case CK_Pentium: 1501 case CK_i686: 1502 case CK_PentiumPro: 1503 break; 1504 case CK_PentiumMMX: 1505 case CK_Pentium2: 1506 setFeatureEnabled(Features, "mmx", true); 1507 break; 1508 case CK_Pentium3: 1509 case CK_Pentium3M: 1510 setFeatureEnabled(Features, "mmx", true); 1511 setFeatureEnabled(Features, "sse", true); 1512 break; 1513 case CK_PentiumM: 1514 case CK_Pentium4: 1515 case CK_Pentium4M: 1516 case CK_x86_64: 1517 setFeatureEnabled(Features, "mmx", true); 1518 setFeatureEnabled(Features, "sse2", true); 1519 break; 1520 case CK_Yonah: 1521 case CK_Prescott: 1522 case CK_Nocona: 1523 setFeatureEnabled(Features, "mmx", true); 1524 setFeatureEnabled(Features, "sse3", true); 1525 break; 1526 case CK_Core2: 1527 setFeatureEnabled(Features, "mmx", true); 1528 setFeatureEnabled(Features, "ssse3", true); 1529 break; 1530 case CK_Penryn: 1531 setFeatureEnabled(Features, "mmx", true); 1532 setFeatureEnabled(Features, "sse4", true); 1533 Features["sse42"] = false; 1534 break; 1535 case CK_Atom: 1536 setFeatureEnabled(Features, "mmx", true); 1537 setFeatureEnabled(Features, "ssse3", true); 1538 break; 1539 case CK_Corei7: 1540 setFeatureEnabled(Features, "mmx", true); 1541 setFeatureEnabled(Features, "sse4", true); 1542 setFeatureEnabled(Features, "aes", true); 1543 break; 1544 case CK_Corei7AVX: 1545 case CK_CoreAVXi: 1546 setFeatureEnabled(Features, "mmx", true); 1547 setFeatureEnabled(Features, "sse4", true); 1548 setFeatureEnabled(Features, "aes", true); 1549 //setFeatureEnabled(Features, "avx", true); 1550 break; 1551 case CK_K6: 1552 case CK_WinChipC6: 1553 setFeatureEnabled(Features, "mmx", true); 1554 break; 1555 case CK_K6_2: 1556 case CK_K6_3: 1557 case CK_WinChip2: 1558 case CK_C3: 1559 setFeatureEnabled(Features, "3dnow", true); 1560 break; 1561 case CK_Athlon: 1562 case CK_AthlonThunderbird: 1563 case CK_Geode: 1564 setFeatureEnabled(Features, "3dnowa", true); 1565 break; 1566 case CK_Athlon4: 1567 case CK_AthlonXP: 1568 case CK_AthlonMP: 1569 setFeatureEnabled(Features, "sse", true); 1570 setFeatureEnabled(Features, "3dnowa", true); 1571 break; 1572 case CK_K8: 1573 case CK_Opteron: 1574 case CK_Athlon64: 1575 case CK_AthlonFX: 1576 setFeatureEnabled(Features, "sse2", true); 1577 setFeatureEnabled(Features, "3dnowa", true); 1578 break; 1579 case CK_K8SSE3: 1580 case CK_OpteronSSE3: 1581 case CK_Athlon64SSE3: 1582 setFeatureEnabled(Features, "sse3", true); 1583 setFeatureEnabled(Features, "3dnowa", true); 1584 break; 1585 case CK_AMDFAM10: 1586 setFeatureEnabled(Features, "sse3", true); 1587 setFeatureEnabled(Features, "sse4a", true); 1588 setFeatureEnabled(Features, "3dnowa", true); 1589 break; 1590 case CK_BDVER1: 1591 case CK_BDVER2: 1592 setFeatureEnabled(Features, "sse4", true); 1593 setFeatureEnabled(Features, "sse4a", true); 1594 setFeatureEnabled(Features, "aes", true); 1595 break; 1596 case CK_C3_2: 1597 setFeatureEnabled(Features, "mmx", true); 1598 setFeatureEnabled(Features, "sse", true); 1599 break; 1600 } 1601 } 1602 1603 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1604 const std::string &Name, 1605 bool Enabled) const { 1606 // FIXME: This *really* should not be here. We need some way of translating 1607 // options into llvm subtarget features. 1608 if (!Features.count(Name) && 1609 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1610 return false; 1611 1612 // FIXME: this should probably use a switch with fall through. 1613 1614 if (Enabled) { 1615 if (Name == "mmx") 1616 Features["mmx"] = true; 1617 else if (Name == "sse") 1618 Features["mmx"] = Features["sse"] = true; 1619 else if (Name == "sse2") 1620 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1621 else if (Name == "sse3") 1622 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1623 true; 1624 else if (Name == "ssse3") 1625 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1626 Features["ssse3"] = true; 1627 else if (Name == "sse4" || Name == "sse4.2") 1628 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1629 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1630 else if (Name == "sse4.1") 1631 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1632 Features["ssse3"] = Features["sse41"] = true; 1633 else if (Name == "3dnow") 1634 Features["mmx"] = Features["3dnow"] = true; 1635 else if (Name == "3dnowa") 1636 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1637 else if (Name == "aes") 1638 Features["aes"] = true; 1639 else if (Name == "avx") 1640 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1641 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1642 Features["avx"] = true; 1643 else if (Name == "sse4a") 1644 Features["mmx"] = Features["sse4a"] = true; 1645 } else { 1646 if (Name == "mmx") 1647 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1648 else if (Name == "sse") 1649 Features["sse"] = Features["sse2"] = Features["sse3"] = 1650 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1651 else if (Name == "sse2") 1652 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1653 Features["sse41"] = Features["sse42"] = false; 1654 else if (Name == "sse3") 1655 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1656 Features["sse42"] = false; 1657 else if (Name == "ssse3") 1658 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1659 else if (Name == "sse4" || Name == "sse4.1") 1660 Features["sse41"] = Features["sse42"] = false; 1661 else if (Name == "sse4.2") 1662 Features["sse42"] = false; 1663 else if (Name == "3dnow") 1664 Features["3dnow"] = Features["3dnowa"] = false; 1665 else if (Name == "3dnowa") 1666 Features["3dnowa"] = false; 1667 else if (Name == "aes") 1668 Features["aes"] = false; 1669 else if (Name == "avx") 1670 Features["avx"] = false; 1671 else if (Name == "sse4a") 1672 Features["sse4a"] = false; 1673 } 1674 1675 return true; 1676 } 1677 1678 /// HandleTargetOptions - Perform initialization based on the user 1679 /// configured set of features. 1680 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1681 // Remember the maximum enabled sselevel. 1682 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1683 // Ignore disabled features. 1684 if (Features[i][0] == '-') 1685 continue; 1686 1687 if (Features[i].substr(1) == "aes") { 1688 HasAES = true; 1689 continue; 1690 } 1691 1692 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1693 // For now let it be enabled together with other SSE levels. 1694 if (Features[i].substr(1) == "avx") { 1695 HasAVX = true; 1696 continue; 1697 } 1698 1699 assert(Features[i][0] == '+' && "Invalid target feature!"); 1700 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1701 .Case("sse42", SSE42) 1702 .Case("sse41", SSE41) 1703 .Case("ssse3", SSSE3) 1704 .Case("sse3", SSE3) 1705 .Case("sse2", SSE2) 1706 .Case("sse", SSE1) 1707 .Default(NoSSE); 1708 SSELevel = std::max(SSELevel, Level); 1709 1710 MMX3DNowEnum ThreeDNowLevel = 1711 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1712 .Case("3dnowa", AMD3DNowAthlon) 1713 .Case("3dnow", AMD3DNow) 1714 .Case("mmx", MMX) 1715 .Default(NoMMX3DNow); 1716 1717 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1718 } 1719 1720 // Don't tell the backend if we're turning off mmx; it will end up disabling 1721 // SSE, which we don't want. 1722 std::vector<std::string>::iterator it; 1723 it = std::find(Features.begin(), Features.end(), "-mmx"); 1724 if (it != Features.end()) 1725 Features.erase(it); 1726 } 1727 1728 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1729 /// definitions for this particular subtarget. 1730 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1731 MacroBuilder &Builder) const { 1732 // Target identification. 1733 if (PointerWidth == 64) { 1734 Builder.defineMacro("_LP64"); 1735 Builder.defineMacro("__LP64__"); 1736 Builder.defineMacro("__amd64__"); 1737 Builder.defineMacro("__amd64"); 1738 Builder.defineMacro("__x86_64"); 1739 Builder.defineMacro("__x86_64__"); 1740 } else { 1741 DefineStd(Builder, "i386", Opts); 1742 } 1743 1744 // Subtarget options. 1745 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1746 // truly should be based on -mtune options. 1747 switch (CPU) { 1748 case CK_Generic: 1749 break; 1750 case CK_i386: 1751 // The rest are coming from the i386 define above. 1752 Builder.defineMacro("__tune_i386__"); 1753 break; 1754 case CK_i486: 1755 case CK_WinChipC6: 1756 case CK_WinChip2: 1757 case CK_C3: 1758 Builder.defineMacro("__i486"); 1759 Builder.defineMacro("__i486__"); 1760 Builder.defineMacro("__tune_i486__"); 1761 break; 1762 case CK_PentiumMMX: 1763 Builder.defineMacro("__pentium_mmx__"); 1764 Builder.defineMacro("__tune_pentium_mmx__"); 1765 // Fallthrough 1766 case CK_i586: 1767 case CK_Pentium: 1768 Builder.defineMacro("__i586"); 1769 Builder.defineMacro("__i586__"); 1770 Builder.defineMacro("__tune_i586__"); 1771 Builder.defineMacro("__pentium"); 1772 Builder.defineMacro("__pentium__"); 1773 Builder.defineMacro("__tune_pentium__"); 1774 break; 1775 case CK_Pentium3: 1776 case CK_Pentium3M: 1777 case CK_PentiumM: 1778 Builder.defineMacro("__tune_pentium3__"); 1779 // Fallthrough 1780 case CK_Pentium2: 1781 case CK_C3_2: 1782 Builder.defineMacro("__tune_pentium2__"); 1783 // Fallthrough 1784 case CK_PentiumPro: 1785 Builder.defineMacro("__tune_i686__"); 1786 Builder.defineMacro("__tune_pentiumpro__"); 1787 // Fallthrough 1788 case CK_i686: 1789 Builder.defineMacro("__i686"); 1790 Builder.defineMacro("__i686__"); 1791 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1792 Builder.defineMacro("__pentiumpro"); 1793 Builder.defineMacro("__pentiumpro__"); 1794 break; 1795 case CK_Pentium4: 1796 case CK_Pentium4M: 1797 Builder.defineMacro("__pentium4"); 1798 Builder.defineMacro("__pentium4__"); 1799 Builder.defineMacro("__tune_pentium4__"); 1800 break; 1801 case CK_Yonah: 1802 case CK_Prescott: 1803 case CK_Nocona: 1804 Builder.defineMacro("__nocona"); 1805 Builder.defineMacro("__nocona__"); 1806 Builder.defineMacro("__tune_nocona__"); 1807 break; 1808 case CK_Core2: 1809 case CK_Penryn: 1810 Builder.defineMacro("__core2"); 1811 Builder.defineMacro("__core2__"); 1812 Builder.defineMacro("__tune_core2__"); 1813 break; 1814 case CK_Atom: 1815 Builder.defineMacro("__atom"); 1816 Builder.defineMacro("__atom__"); 1817 Builder.defineMacro("__tune_atom__"); 1818 break; 1819 case CK_Corei7: 1820 case CK_Corei7AVX: 1821 case CK_CoreAVXi: 1822 Builder.defineMacro("__corei7"); 1823 Builder.defineMacro("__corei7__"); 1824 Builder.defineMacro("__tune_corei7__"); 1825 break; 1826 case CK_K6_2: 1827 Builder.defineMacro("__k6_2__"); 1828 Builder.defineMacro("__tune_k6_2__"); 1829 // Fallthrough 1830 case CK_K6_3: 1831 if (CPU != CK_K6_2) { // In case of fallthrough 1832 // FIXME: GCC may be enabling these in cases where some other k6 1833 // architecture is specified but -m3dnow is explicitly provided. The 1834 // exact semantics need to be determined and emulated here. 1835 Builder.defineMacro("__k6_3__"); 1836 Builder.defineMacro("__tune_k6_3__"); 1837 } 1838 // Fallthrough 1839 case CK_K6: 1840 Builder.defineMacro("__k6"); 1841 Builder.defineMacro("__k6__"); 1842 Builder.defineMacro("__tune_k6__"); 1843 break; 1844 case CK_Athlon: 1845 case CK_AthlonThunderbird: 1846 case CK_Athlon4: 1847 case CK_AthlonXP: 1848 case CK_AthlonMP: 1849 Builder.defineMacro("__athlon"); 1850 Builder.defineMacro("__athlon__"); 1851 Builder.defineMacro("__tune_athlon__"); 1852 if (SSELevel != NoSSE) { 1853 Builder.defineMacro("__athlon_sse__"); 1854 Builder.defineMacro("__tune_athlon_sse__"); 1855 } 1856 break; 1857 case CK_K8: 1858 case CK_K8SSE3: 1859 case CK_x86_64: 1860 case CK_Opteron: 1861 case CK_OpteronSSE3: 1862 case CK_Athlon64: 1863 case CK_Athlon64SSE3: 1864 case CK_AthlonFX: 1865 Builder.defineMacro("__k8"); 1866 Builder.defineMacro("__k8__"); 1867 Builder.defineMacro("__tune_k8__"); 1868 break; 1869 case CK_AMDFAM10: 1870 Builder.defineMacro("__amdfam10"); 1871 Builder.defineMacro("__amdfam10__"); 1872 Builder.defineMacro("__tune_amdfam10__"); 1873 break; 1874 case CK_BDVER1: 1875 Builder.defineMacro("__bdver1"); 1876 Builder.defineMacro("__bdver1__"); 1877 Builder.defineMacro("__tune__bdver1__"); 1878 break; 1879 case CK_BDVER2: 1880 Builder.defineMacro("__bdver2"); 1881 Builder.defineMacro("__bdver2__"); 1882 Builder.defineMacro("__tune__bdver2__"); 1883 break; 1884 case CK_Geode: 1885 Builder.defineMacro("__geode"); 1886 Builder.defineMacro("__geode__"); 1887 Builder.defineMacro("__tune_geode__"); 1888 break; 1889 } 1890 1891 // Target properties. 1892 Builder.defineMacro("__LITTLE_ENDIAN__"); 1893 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1894 1895 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1896 // functions in glibc header files that use FP Stack inline asm which the 1897 // backend can't deal with (PR879). 1898 Builder.defineMacro("__NO_MATH_INLINES"); 1899 1900 if (HasAES) 1901 Builder.defineMacro("__AES__"); 1902 1903 if (HasAVX) 1904 Builder.defineMacro("__AVX__"); 1905 1906 // Each case falls through to the previous one here. 1907 switch (SSELevel) { 1908 case SSE42: 1909 Builder.defineMacro("__SSE4_2__"); 1910 case SSE41: 1911 Builder.defineMacro("__SSE4_1__"); 1912 case SSSE3: 1913 Builder.defineMacro("__SSSE3__"); 1914 case SSE3: 1915 Builder.defineMacro("__SSE3__"); 1916 case SSE2: 1917 Builder.defineMacro("__SSE2__"); 1918 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1919 case SSE1: 1920 Builder.defineMacro("__SSE__"); 1921 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1922 case NoSSE: 1923 break; 1924 } 1925 1926 if (Opts.MicrosoftExt && PointerWidth == 32) { 1927 switch (SSELevel) { 1928 case SSE42: 1929 case SSE41: 1930 case SSSE3: 1931 case SSE3: 1932 case SSE2: 1933 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1934 break; 1935 case SSE1: 1936 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1937 break; 1938 default: 1939 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1940 } 1941 } 1942 1943 // Each case falls through to the previous one here. 1944 switch (MMX3DNowLevel) { 1945 case AMD3DNowAthlon: 1946 Builder.defineMacro("__3dNOW_A__"); 1947 case AMD3DNow: 1948 Builder.defineMacro("__3dNOW__"); 1949 case MMX: 1950 Builder.defineMacro("__MMX__"); 1951 case NoMMX3DNow: 1952 break; 1953 } 1954 } 1955 1956 1957 bool 1958 X86TargetInfo::validateAsmConstraint(const char *&Name, 1959 TargetInfo::ConstraintInfo &Info) const { 1960 switch (*Name) { 1961 default: return false; 1962 case 'Y': // first letter of a pair: 1963 switch (*(Name+1)) { 1964 default: return false; 1965 case '0': // First SSE register. 1966 case 't': // Any SSE register, when SSE2 is enabled. 1967 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1968 case 'm': // any MMX register, when inter-unit moves enabled. 1969 break; // falls through to setAllowsRegister. 1970 } 1971 case 'a': // eax. 1972 case 'b': // ebx. 1973 case 'c': // ecx. 1974 case 'd': // edx. 1975 case 'S': // esi. 1976 case 'D': // edi. 1977 case 'A': // edx:eax. 1978 case 'f': // any x87 floating point stack register. 1979 case 't': // top of floating point stack. 1980 case 'u': // second from top of floating point stack. 1981 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1982 case 'y': // Any MMX register. 1983 case 'x': // Any SSE register. 1984 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1985 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1986 case 'l': // "Index" registers: any general register that can be used as an 1987 // index in a base+index memory access. 1988 Info.setAllowsRegister(); 1989 return true; 1990 case 'C': // SSE floating point constant. 1991 case 'G': // x87 floating point constant. 1992 case 'e': // 32-bit signed integer constant for use with zero-extending 1993 // x86_64 instructions. 1994 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1995 // x86_64 instructions. 1996 return true; 1997 } 1998 return false; 1999 } 2000 2001 2002 std::string 2003 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2004 switch (*Constraint) { 2005 case 'a': return std::string("{ax}"); 2006 case 'b': return std::string("{bx}"); 2007 case 'c': return std::string("{cx}"); 2008 case 'd': return std::string("{dx}"); 2009 case 'S': return std::string("{si}"); 2010 case 'D': return std::string("{di}"); 2011 case 'p': // address 2012 return std::string("im"); 2013 case 't': // top of floating point stack. 2014 return std::string("{st}"); 2015 case 'u': // second from top of floating point stack. 2016 return std::string("{st(1)}"); // second from top of floating point stack. 2017 default: 2018 return std::string(1, *Constraint); 2019 } 2020 } 2021 } // end anonymous namespace 2022 2023 namespace { 2024 // X86-32 generic target 2025 class X86_32TargetInfo : public X86TargetInfo { 2026 public: 2027 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2028 DoubleAlign = LongLongAlign = 32; 2029 LongDoubleWidth = 96; 2030 LongDoubleAlign = 32; 2031 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2032 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2033 "a0:0:64-f80:32:32-n8:16:32-S128"; 2034 SizeType = UnsignedInt; 2035 PtrDiffType = SignedInt; 2036 IntPtrType = SignedInt; 2037 RegParmMax = 3; 2038 2039 // Use fpret for all types. 2040 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2041 (1 << TargetInfo::Double) | 2042 (1 << TargetInfo::LongDouble)); 2043 2044 // x86-32 has atomics up to 8 bytes 2045 // FIXME: Check that we actually have cmpxchg8b before setting 2046 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2047 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2048 } 2049 virtual const char *getVAListDeclaration() const { 2050 return "typedef char* __builtin_va_list;"; 2051 } 2052 2053 int getEHDataRegisterNumber(unsigned RegNo) const { 2054 if (RegNo == 0) return 0; 2055 if (RegNo == 1) return 2; 2056 return -1; 2057 } 2058 }; 2059 } // end anonymous namespace 2060 2061 namespace { 2062 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2063 public: 2064 OpenBSDI386TargetInfo(const std::string& triple) : 2065 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2066 SizeType = UnsignedLong; 2067 IntPtrType = SignedLong; 2068 PtrDiffType = SignedLong; 2069 } 2070 }; 2071 } // end anonymous namespace 2072 2073 namespace { 2074 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2075 public: 2076 DarwinI386TargetInfo(const std::string& triple) : 2077 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2078 LongDoubleWidth = 128; 2079 LongDoubleAlign = 128; 2080 SizeType = UnsignedLong; 2081 IntPtrType = SignedLong; 2082 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2083 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2084 "a0:0:64-f80:128:128-n8:16:32-S128"; 2085 HasAlignMac68kSupport = true; 2086 } 2087 2088 }; 2089 } // end anonymous namespace 2090 2091 namespace { 2092 // x86-32 Windows target 2093 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2094 public: 2095 WindowsX86_32TargetInfo(const std::string& triple) 2096 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2097 TLSSupported = false; 2098 WCharType = UnsignedShort; 2099 DoubleAlign = LongLongAlign = 64; 2100 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2101 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2102 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2103 } 2104 virtual void getTargetDefines(const LangOptions &Opts, 2105 MacroBuilder &Builder) const { 2106 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2107 } 2108 }; 2109 } // end anonymous namespace 2110 2111 namespace { 2112 2113 // x86-32 Windows Visual Studio target 2114 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2115 public: 2116 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2117 : WindowsX86_32TargetInfo(triple) { 2118 LongDoubleWidth = LongDoubleAlign = 64; 2119 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2120 } 2121 virtual void getTargetDefines(const LangOptions &Opts, 2122 MacroBuilder &Builder) const { 2123 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2124 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2125 // The value of the following reflects processor type. 2126 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2127 // We lost the original triple, so we use the default. 2128 Builder.defineMacro("_M_IX86", "600"); 2129 } 2130 }; 2131 } // end anonymous namespace 2132 2133 namespace { 2134 // x86-32 MinGW target 2135 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2136 public: 2137 MinGWX86_32TargetInfo(const std::string& triple) 2138 : WindowsX86_32TargetInfo(triple) { 2139 } 2140 virtual void getTargetDefines(const LangOptions &Opts, 2141 MacroBuilder &Builder) const { 2142 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2143 DefineStd(Builder, "WIN32", Opts); 2144 DefineStd(Builder, "WINNT", Opts); 2145 Builder.defineMacro("_X86_"); 2146 Builder.defineMacro("__MSVCRT__"); 2147 Builder.defineMacro("__MINGW32__"); 2148 2149 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2150 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2151 if (Opts.MicrosoftExt) 2152 // Provide "as-is" __declspec. 2153 Builder.defineMacro("__declspec", "__declspec"); 2154 else 2155 // Provide alias of __attribute__ like mingw32-gcc. 2156 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2157 } 2158 }; 2159 } // end anonymous namespace 2160 2161 namespace { 2162 // x86-32 Cygwin target 2163 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2164 public: 2165 CygwinX86_32TargetInfo(const std::string& triple) 2166 : X86_32TargetInfo(triple) { 2167 TLSSupported = false; 2168 WCharType = UnsignedShort; 2169 DoubleAlign = LongLongAlign = 64; 2170 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2171 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2172 "a0:0:64-f80:32:32-n8:16:32-S32"; 2173 } 2174 virtual void getTargetDefines(const LangOptions &Opts, 2175 MacroBuilder &Builder) const { 2176 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2177 Builder.defineMacro("__CYGWIN__"); 2178 Builder.defineMacro("__CYGWIN32__"); 2179 DefineStd(Builder, "unix", Opts); 2180 if (Opts.CPlusPlus) 2181 Builder.defineMacro("_GNU_SOURCE"); 2182 } 2183 }; 2184 } // end anonymous namespace 2185 2186 namespace { 2187 // x86-32 Haiku target 2188 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2189 public: 2190 HaikuX86_32TargetInfo(const std::string& triple) 2191 : X86_32TargetInfo(triple) { 2192 SizeType = UnsignedLong; 2193 IntPtrType = SignedLong; 2194 PtrDiffType = SignedLong; 2195 this->UserLabelPrefix = ""; 2196 } 2197 virtual void getTargetDefines(const LangOptions &Opts, 2198 MacroBuilder &Builder) const { 2199 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2200 Builder.defineMacro("__INTEL__"); 2201 Builder.defineMacro("__HAIKU__"); 2202 } 2203 }; 2204 } // end anonymous namespace 2205 2206 // RTEMS Target 2207 template<typename Target> 2208 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2209 protected: 2210 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2211 MacroBuilder &Builder) const { 2212 // RTEMS defines; list based off of gcc output 2213 2214 Builder.defineMacro("__rtems__"); 2215 Builder.defineMacro("__ELF__"); 2216 } 2217 public: 2218 RTEMSTargetInfo(const std::string &triple) 2219 : OSTargetInfo<Target>(triple) { 2220 this->UserLabelPrefix = ""; 2221 2222 llvm::Triple Triple(triple); 2223 switch (Triple.getArch()) { 2224 default: 2225 case llvm::Triple::x86: 2226 // this->MCountName = ".mcount"; 2227 break; 2228 case llvm::Triple::mips: 2229 case llvm::Triple::mipsel: 2230 case llvm::Triple::ppc: 2231 case llvm::Triple::ppc64: 2232 // this->MCountName = "_mcount"; 2233 break; 2234 case llvm::Triple::arm: 2235 // this->MCountName = "__mcount"; 2236 break; 2237 } 2238 2239 } 2240 }; 2241 2242 namespace { 2243 // x86-32 RTEMS target 2244 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2245 public: 2246 RTEMSX86_32TargetInfo(const std::string& triple) 2247 : X86_32TargetInfo(triple) { 2248 SizeType = UnsignedLong; 2249 IntPtrType = SignedLong; 2250 PtrDiffType = SignedLong; 2251 this->UserLabelPrefix = ""; 2252 } 2253 virtual void getTargetDefines(const LangOptions &Opts, 2254 MacroBuilder &Builder) const { 2255 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2256 Builder.defineMacro("__INTEL__"); 2257 Builder.defineMacro("__rtems__"); 2258 } 2259 }; 2260 } // end anonymous namespace 2261 2262 namespace { 2263 // x86-64 generic target 2264 class X86_64TargetInfo : public X86TargetInfo { 2265 public: 2266 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2267 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2268 LongDoubleWidth = 128; 2269 LongDoubleAlign = 128; 2270 LargeArrayMinWidth = 128; 2271 LargeArrayAlign = 128; 2272 IntMaxType = SignedLong; 2273 UIntMaxType = UnsignedLong; 2274 Int64Type = SignedLong; 2275 RegParmMax = 6; 2276 2277 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2278 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2279 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2280 2281 // Use fpret only for long double. 2282 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2283 2284 // Use fp2ret for _Complex long double. 2285 ComplexLongDoubleUsesFP2Ret = true; 2286 2287 // x86-64 has atomics up to 16 bytes. 2288 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2289 // on CPUs with cmpxchg16b 2290 MaxAtomicPromoteWidth = 128; 2291 MaxAtomicInlineWidth = 64; 2292 } 2293 virtual const char *getVAListDeclaration() const { 2294 return "typedef struct __va_list_tag {" 2295 " unsigned gp_offset;" 2296 " unsigned fp_offset;" 2297 " void* overflow_arg_area;" 2298 " void* reg_save_area;" 2299 "} __va_list_tag;" 2300 "typedef __va_list_tag __builtin_va_list[1];"; 2301 } 2302 2303 int getEHDataRegisterNumber(unsigned RegNo) const { 2304 if (RegNo == 0) return 0; 2305 if (RegNo == 1) return 1; 2306 return -1; 2307 } 2308 }; 2309 } // end anonymous namespace 2310 2311 namespace { 2312 // x86-64 Windows target 2313 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2314 public: 2315 WindowsX86_64TargetInfo(const std::string& triple) 2316 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2317 TLSSupported = false; 2318 WCharType = UnsignedShort; 2319 LongWidth = LongAlign = 32; 2320 DoubleAlign = LongLongAlign = 64; 2321 IntMaxType = SignedLongLong; 2322 UIntMaxType = UnsignedLongLong; 2323 Int64Type = SignedLongLong; 2324 SizeType = UnsignedLongLong; 2325 PtrDiffType = SignedLongLong; 2326 IntPtrType = SignedLongLong; 2327 this->UserLabelPrefix = ""; 2328 } 2329 virtual void getTargetDefines(const LangOptions &Opts, 2330 MacroBuilder &Builder) const { 2331 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2332 Builder.defineMacro("_WIN64"); 2333 } 2334 virtual const char *getVAListDeclaration() const { 2335 return "typedef char* __builtin_va_list;"; 2336 } 2337 }; 2338 } // end anonymous namespace 2339 2340 namespace { 2341 // x86-64 Windows Visual Studio target 2342 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2343 public: 2344 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2345 : WindowsX86_64TargetInfo(triple) { 2346 LongDoubleWidth = LongDoubleAlign = 64; 2347 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2348 } 2349 virtual void getTargetDefines(const LangOptions &Opts, 2350 MacroBuilder &Builder) const { 2351 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2352 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2353 Builder.defineMacro("_M_X64"); 2354 Builder.defineMacro("_M_AMD64"); 2355 } 2356 }; 2357 } // end anonymous namespace 2358 2359 namespace { 2360 // x86-64 MinGW target 2361 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2362 public: 2363 MinGWX86_64TargetInfo(const std::string& triple) 2364 : WindowsX86_64TargetInfo(triple) { 2365 } 2366 virtual void getTargetDefines(const LangOptions &Opts, 2367 MacroBuilder &Builder) const { 2368 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2369 DefineStd(Builder, "WIN64", Opts); 2370 Builder.defineMacro("__MSVCRT__"); 2371 Builder.defineMacro("__MINGW32__"); 2372 Builder.defineMacro("__MINGW64__"); 2373 2374 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2375 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2376 if (Opts.MicrosoftExt) 2377 // Provide "as-is" __declspec. 2378 Builder.defineMacro("__declspec", "__declspec"); 2379 else 2380 // Provide alias of __attribute__ like mingw32-gcc. 2381 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2382 } 2383 }; 2384 } // end anonymous namespace 2385 2386 namespace { 2387 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2388 public: 2389 DarwinX86_64TargetInfo(const std::string& triple) 2390 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2391 Int64Type = SignedLongLong; 2392 } 2393 }; 2394 } // end anonymous namespace 2395 2396 namespace { 2397 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2398 public: 2399 OpenBSDX86_64TargetInfo(const std::string& triple) 2400 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2401 IntMaxType = SignedLongLong; 2402 UIntMaxType = UnsignedLongLong; 2403 Int64Type = SignedLongLong; 2404 } 2405 }; 2406 } // end anonymous namespace 2407 2408 namespace { 2409 class ARMTargetInfo : public TargetInfo { 2410 // Possible FPU choices. 2411 enum FPUMode { 2412 NoFPU, 2413 VFP2FPU, 2414 VFP3FPU, 2415 NeonFPU 2416 }; 2417 2418 static bool FPUModeIsVFP(FPUMode Mode) { 2419 return Mode >= VFP2FPU && Mode <= NeonFPU; 2420 } 2421 2422 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2423 static const char * const GCCRegNames[]; 2424 2425 std::string ABI, CPU; 2426 2427 unsigned FPU : 3; 2428 2429 unsigned IsThumb : 1; 2430 2431 // Initialized via features. 2432 unsigned SoftFloat : 1; 2433 unsigned SoftFloatABI : 1; 2434 2435 static const Builtin::Info BuiltinInfo[]; 2436 2437 public: 2438 ARMTargetInfo(const std::string &TripleStr) 2439 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2440 { 2441 SizeType = UnsignedInt; 2442 PtrDiffType = SignedInt; 2443 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2444 WCharType = UnsignedInt; 2445 2446 // {} in inline assembly are neon specifiers, not assembly variant 2447 // specifiers. 2448 NoAsmVariants = true; 2449 2450 // FIXME: Should we just treat this as a feature? 2451 IsThumb = getTriple().getArchName().startswith("thumb"); 2452 if (IsThumb) { 2453 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2454 // so set preferred for small types to 32. 2455 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2456 "i64:64:64-f32:32:32-f64:64:64-" 2457 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2458 } else { 2459 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2460 "i64:64:64-f32:32:32-f64:64:64-" 2461 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2462 } 2463 2464 // ARM targets default to using the ARM C++ ABI. 2465 CXXABI = CXXABI_ARM; 2466 2467 // ARM has atomics up to 8 bytes 2468 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2469 MaxAtomicPromoteWidth = 64; 2470 } 2471 virtual const char *getABI() const { return ABI.c_str(); } 2472 virtual bool setABI(const std::string &Name) { 2473 ABI = Name; 2474 2475 // The defaults (above) are for AAPCS, check if we need to change them. 2476 // 2477 // FIXME: We need support for -meabi... we could just mangle it into the 2478 // name. 2479 if (Name == "apcs-gnu") { 2480 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2481 SizeType = UnsignedLong; 2482 2483 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2484 WCharType = SignedInt; 2485 2486 // Do not respect the alignment of bit-field types when laying out 2487 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2488 UseBitFieldTypeAlignment = false; 2489 2490 /// Do force alignment of members that follow zero length bitfields. If 2491 /// the alignment of the zero-length bitfield is greater than the member 2492 /// that follows it, `bar', `bar' will be aligned as the type of the 2493 /// zero length bitfield. 2494 UseZeroLengthBitfieldAlignment = true; 2495 2496 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2497 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2498 /// gcc. 2499 ZeroLengthBitfieldBoundary = 32; 2500 2501 if (IsThumb) { 2502 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2503 // so set preferred for small types to 32. 2504 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2505 "i64:32:64-f32:32:32-f64:32:64-" 2506 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2507 } else { 2508 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2509 "i64:32:64-f32:32:32-f64:32:64-" 2510 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2511 } 2512 2513 // FIXME: Override "preferred align" for double and long long. 2514 } else if (Name == "aapcs") { 2515 // FIXME: Enumerated types are variable width in straight AAPCS. 2516 } else if (Name == "aapcs-linux") { 2517 ; 2518 } else 2519 return false; 2520 2521 return true; 2522 } 2523 2524 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2525 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2526 Features["vfp2"] = true; 2527 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2528 Features["neon"] = true; 2529 } 2530 2531 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2532 const std::string &Name, 2533 bool Enabled) const { 2534 if (Name == "soft-float" || Name == "soft-float-abi" || 2535 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2536 Features[Name] = Enabled; 2537 } else 2538 return false; 2539 2540 return true; 2541 } 2542 2543 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2544 FPU = NoFPU; 2545 SoftFloat = SoftFloatABI = false; 2546 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2547 if (Features[i] == "+soft-float") 2548 SoftFloat = true; 2549 else if (Features[i] == "+soft-float-abi") 2550 SoftFloatABI = true; 2551 else if (Features[i] == "+vfp2") 2552 FPU = VFP2FPU; 2553 else if (Features[i] == "+vfp3") 2554 FPU = VFP3FPU; 2555 else if (Features[i] == "+neon") 2556 FPU = NeonFPU; 2557 } 2558 2559 // Remove front-end specific options which the backend handles differently. 2560 std::vector<std::string>::iterator it; 2561 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2562 if (it != Features.end()) 2563 Features.erase(it); 2564 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2565 if (it != Features.end()) 2566 Features.erase(it); 2567 } 2568 2569 static const char *getCPUDefineSuffix(StringRef Name) { 2570 return llvm::StringSwitch<const char*>(Name) 2571 .Cases("arm8", "arm810", "4") 2572 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2573 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2574 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2575 .Case("ep9312", "4T") 2576 .Cases("arm10tdmi", "arm1020t", "5T") 2577 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2578 .Case("arm926ej-s", "5TEJ") 2579 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2580 .Cases("xscale", "iwmmxt", "5TE") 2581 .Case("arm1136j-s", "6J") 2582 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2583 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2584 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2585 .Cases("cortex-a8", "cortex-a9", "7A") 2586 .Case("cortex-m3", "7M") 2587 .Case("cortex-m0", "6M") 2588 .Default(0); 2589 } 2590 virtual bool setCPU(const std::string &Name) { 2591 if (!getCPUDefineSuffix(Name)) 2592 return false; 2593 2594 CPU = Name; 2595 return true; 2596 } 2597 virtual void getTargetDefines(const LangOptions &Opts, 2598 MacroBuilder &Builder) const { 2599 // Target identification. 2600 Builder.defineMacro("__arm"); 2601 Builder.defineMacro("__arm__"); 2602 2603 // Target properties. 2604 Builder.defineMacro("__ARMEL__"); 2605 Builder.defineMacro("__LITTLE_ENDIAN__"); 2606 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2607 2608 StringRef CPUArch = getCPUDefineSuffix(CPU); 2609 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2610 2611 // Subtarget options. 2612 2613 // FIXME: It's more complicated than this and we don't really support 2614 // interworking. 2615 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2616 Builder.defineMacro("__THUMB_INTERWORK__"); 2617 2618 if (ABI == "aapcs" || ABI == "aapcs-linux") 2619 Builder.defineMacro("__ARM_EABI__"); 2620 2621 if (SoftFloat) 2622 Builder.defineMacro("__SOFTFP__"); 2623 2624 if (CPU == "xscale") 2625 Builder.defineMacro("__XSCALE__"); 2626 2627 bool IsARMv7 = CPUArch.startswith("7"); 2628 if (IsThumb) { 2629 Builder.defineMacro("__THUMBEL__"); 2630 Builder.defineMacro("__thumb__"); 2631 if (CPUArch == "6T2" || IsARMv7) 2632 Builder.defineMacro("__thumb2__"); 2633 } 2634 2635 // Note, this is always on in gcc, even though it doesn't make sense. 2636 Builder.defineMacro("__APCS_32__"); 2637 2638 if (FPUModeIsVFP((FPUMode) FPU)) 2639 Builder.defineMacro("__VFP_FP__"); 2640 2641 // This only gets set when Neon instructions are actually available, unlike 2642 // the VFP define, hence the soft float and arch check. This is subtly 2643 // different from gcc, we follow the intent which was that it should be set 2644 // when Neon instructions are actually available. 2645 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2646 Builder.defineMacro("__ARM_NEON__"); 2647 } 2648 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2649 unsigned &NumRecords) const { 2650 Records = BuiltinInfo; 2651 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2652 } 2653 virtual const char *getVAListDeclaration() const { 2654 return "typedef void* __builtin_va_list;"; 2655 } 2656 virtual void getGCCRegNames(const char * const *&Names, 2657 unsigned &NumNames) const; 2658 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2659 unsigned &NumAliases) const; 2660 virtual bool validateAsmConstraint(const char *&Name, 2661 TargetInfo::ConstraintInfo &Info) const { 2662 // FIXME: Check if this is complete 2663 switch (*Name) { 2664 default: 2665 case 'l': // r0-r7 2666 case 'h': // r8-r15 2667 case 'w': // VFP Floating point register single precision 2668 case 'P': // VFP Floating point register double precision 2669 Info.setAllowsRegister(); 2670 return true; 2671 case 'Q': // A memory address that is a single base register. 2672 Info.setAllowsMemory(); 2673 return true; 2674 case 'U': // a memory reference... 2675 switch (Name[1]) { 2676 case 'q': // ...ARMV4 ldrsb 2677 case 'v': // ...VFP load/store (reg+constant offset) 2678 case 'y': // ...iWMMXt load/store 2679 case 't': // address valid for load/store opaque types wider 2680 // than 128-bits 2681 case 'n': // valid address for Neon doubleword vector load/store 2682 case 'm': // valid address for Neon element and structure load/store 2683 case 's': // valid address for non-offset loads/stores of quad-word 2684 // values in four ARM registers 2685 Info.setAllowsMemory(); 2686 Name++; 2687 return true; 2688 } 2689 } 2690 return false; 2691 } 2692 virtual std::string convertConstraint(const char *&Constraint) const { 2693 std::string R; 2694 switch (*Constraint) { 2695 case 'U': // Two-character constraint; add "^" hint for later parsing. 2696 R = std::string("^") + std::string(Constraint, 2); 2697 Constraint++; 2698 break; 2699 case 'p': // 'p' should be translated to 'r' by default. 2700 R = std::string("r"); 2701 break; 2702 default: 2703 return std::string(1, *Constraint); 2704 } 2705 return R; 2706 } 2707 virtual const char *getClobbers() const { 2708 // FIXME: Is this really right? 2709 return ""; 2710 } 2711 }; 2712 2713 const char * const ARMTargetInfo::GCCRegNames[] = { 2714 // Integer registers 2715 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2716 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2717 2718 // Float registers 2719 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2720 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2721 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2722 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2723 2724 // Double registers 2725 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2726 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2727 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2728 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2729 2730 // Quad registers 2731 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2732 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2733 }; 2734 2735 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2736 unsigned &NumNames) const { 2737 Names = GCCRegNames; 2738 NumNames = llvm::array_lengthof(GCCRegNames); 2739 } 2740 2741 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2742 { { "a1" }, "r0" }, 2743 { { "a2" }, "r1" }, 2744 { { "a3" }, "r2" }, 2745 { { "a4" }, "r3" }, 2746 { { "v1" }, "r4" }, 2747 { { "v2" }, "r5" }, 2748 { { "v3" }, "r6" }, 2749 { { "v4" }, "r7" }, 2750 { { "v5" }, "r8" }, 2751 { { "v6", "rfp" }, "r9" }, 2752 { { "sl" }, "r10" }, 2753 { { "fp" }, "r11" }, 2754 { { "ip" }, "r12" }, 2755 { { "r13" }, "sp" }, 2756 { { "r14" }, "lr" }, 2757 { { "r15" }, "pc" }, 2758 // The S, D and Q registers overlap, but aren't really aliases; we 2759 // don't want to substitute one of these for a different-sized one. 2760 }; 2761 2762 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2763 unsigned &NumAliases) const { 2764 Aliases = GCCRegAliases; 2765 NumAliases = llvm::array_lengthof(GCCRegAliases); 2766 } 2767 2768 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2769 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2770 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2771 ALL_LANGUAGES }, 2772 #include "clang/Basic/BuiltinsARM.def" 2773 }; 2774 } // end anonymous namespace. 2775 2776 2777 namespace { 2778 class DarwinARMTargetInfo : 2779 public DarwinTargetInfo<ARMTargetInfo> { 2780 protected: 2781 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2782 MacroBuilder &Builder) const { 2783 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2784 } 2785 2786 public: 2787 DarwinARMTargetInfo(const std::string& triple) 2788 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2789 HasAlignMac68kSupport = true; 2790 // iOS always has 64-bit atomic instructions. 2791 // FIXME: This should be based off of the target features in ARMTargetInfo. 2792 MaxAtomicInlineWidth = 64; 2793 } 2794 }; 2795 } // end anonymous namespace. 2796 2797 namespace { 2798 class SparcV8TargetInfo : public TargetInfo { 2799 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2800 static const char * const GCCRegNames[]; 2801 bool SoftFloat; 2802 public: 2803 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2804 // FIXME: Support Sparc quad-precision long double? 2805 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2806 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2807 } 2808 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2809 const std::string &Name, 2810 bool Enabled) const { 2811 if (Name == "soft-float") 2812 Features[Name] = Enabled; 2813 else 2814 return false; 2815 2816 return true; 2817 } 2818 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2819 SoftFloat = false; 2820 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2821 if (Features[i] == "+soft-float") 2822 SoftFloat = true; 2823 } 2824 virtual void getTargetDefines(const LangOptions &Opts, 2825 MacroBuilder &Builder) const { 2826 DefineStd(Builder, "sparc", Opts); 2827 Builder.defineMacro("__sparcv8"); 2828 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2829 2830 if (SoftFloat) 2831 Builder.defineMacro("SOFT_FLOAT", "1"); 2832 } 2833 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2834 unsigned &NumRecords) const { 2835 // FIXME: Implement! 2836 } 2837 virtual const char *getVAListDeclaration() const { 2838 return "typedef void* __builtin_va_list;"; 2839 } 2840 virtual void getGCCRegNames(const char * const *&Names, 2841 unsigned &NumNames) const; 2842 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2843 unsigned &NumAliases) const; 2844 virtual bool validateAsmConstraint(const char *&Name, 2845 TargetInfo::ConstraintInfo &info) const { 2846 // FIXME: Implement! 2847 return false; 2848 } 2849 virtual const char *getClobbers() const { 2850 // FIXME: Implement! 2851 return ""; 2852 } 2853 }; 2854 2855 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2856 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2857 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2858 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2859 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2860 }; 2861 2862 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2863 unsigned &NumNames) const { 2864 Names = GCCRegNames; 2865 NumNames = llvm::array_lengthof(GCCRegNames); 2866 } 2867 2868 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2869 { { "g0" }, "r0" }, 2870 { { "g1" }, "r1" }, 2871 { { "g2" }, "r2" }, 2872 { { "g3" }, "r3" }, 2873 { { "g4" }, "r4" }, 2874 { { "g5" }, "r5" }, 2875 { { "g6" }, "r6" }, 2876 { { "g7" }, "r7" }, 2877 { { "o0" }, "r8" }, 2878 { { "o1" }, "r9" }, 2879 { { "o2" }, "r10" }, 2880 { { "o3" }, "r11" }, 2881 { { "o4" }, "r12" }, 2882 { { "o5" }, "r13" }, 2883 { { "o6", "sp" }, "r14" }, 2884 { { "o7" }, "r15" }, 2885 { { "l0" }, "r16" }, 2886 { { "l1" }, "r17" }, 2887 { { "l2" }, "r18" }, 2888 { { "l3" }, "r19" }, 2889 { { "l4" }, "r20" }, 2890 { { "l5" }, "r21" }, 2891 { { "l6" }, "r22" }, 2892 { { "l7" }, "r23" }, 2893 { { "i0" }, "r24" }, 2894 { { "i1" }, "r25" }, 2895 { { "i2" }, "r26" }, 2896 { { "i3" }, "r27" }, 2897 { { "i4" }, "r28" }, 2898 { { "i5" }, "r29" }, 2899 { { "i6", "fp" }, "r30" }, 2900 { { "i7" }, "r31" }, 2901 }; 2902 2903 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2904 unsigned &NumAliases) const { 2905 Aliases = GCCRegAliases; 2906 NumAliases = llvm::array_lengthof(GCCRegAliases); 2907 } 2908 } // end anonymous namespace. 2909 2910 namespace { 2911 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2912 public: 2913 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2914 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2915 SizeType = UnsignedInt; 2916 PtrDiffType = SignedInt; 2917 } 2918 }; 2919 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2920 public: 2921 SolarisSparcV8TargetInfo(const std::string& triple) : 2922 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2923 SizeType = UnsignedInt; 2924 PtrDiffType = SignedInt; 2925 } 2926 }; 2927 } // end anonymous namespace. 2928 2929 namespace { 2930 class MSP430TargetInfo : public TargetInfo { 2931 static const char * const GCCRegNames[]; 2932 public: 2933 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2934 TLSSupported = false; 2935 IntWidth = 16; IntAlign = 16; 2936 LongWidth = 32; LongLongWidth = 64; 2937 LongAlign = LongLongAlign = 16; 2938 PointerWidth = 16; PointerAlign = 16; 2939 SizeType = UnsignedInt; 2940 IntMaxType = SignedLong; 2941 UIntMaxType = UnsignedLong; 2942 IntPtrType = SignedShort; 2943 PtrDiffType = SignedInt; 2944 SigAtomicType = SignedLong; 2945 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2946 } 2947 virtual void getTargetDefines(const LangOptions &Opts, 2948 MacroBuilder &Builder) const { 2949 Builder.defineMacro("MSP430"); 2950 Builder.defineMacro("__MSP430__"); 2951 // FIXME: defines for different 'flavours' of MCU 2952 } 2953 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2954 unsigned &NumRecords) const { 2955 // FIXME: Implement. 2956 Records = 0; 2957 NumRecords = 0; 2958 } 2959 virtual void getGCCRegNames(const char * const *&Names, 2960 unsigned &NumNames) const; 2961 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2962 unsigned &NumAliases) const { 2963 // No aliases. 2964 Aliases = 0; 2965 NumAliases = 0; 2966 } 2967 virtual bool validateAsmConstraint(const char *&Name, 2968 TargetInfo::ConstraintInfo &info) const { 2969 // No target constraints for now. 2970 return false; 2971 } 2972 virtual const char *getClobbers() const { 2973 // FIXME: Is this really right? 2974 return ""; 2975 } 2976 virtual const char *getVAListDeclaration() const { 2977 // FIXME: implement 2978 return "typedef char* __builtin_va_list;"; 2979 } 2980 }; 2981 2982 const char * const MSP430TargetInfo::GCCRegNames[] = { 2983 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2984 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2985 }; 2986 2987 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2988 unsigned &NumNames) const { 2989 Names = GCCRegNames; 2990 NumNames = llvm::array_lengthof(GCCRegNames); 2991 } 2992 } 2993 2994 namespace { 2995 2996 // LLVM and Clang cannot be used directly to output native binaries for 2997 // target, but is used to compile C code to llvm bitcode with correct 2998 // type and alignment information. 2999 // 3000 // TCE uses the llvm bitcode as input and uses it for generating customized 3001 // target processor and program binary. TCE co-design environment is 3002 // publicly available in http://tce.cs.tut.fi 3003 3004 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3005 3, // opencl_global 3006 4, // opencl_local 3007 5 // opencl_constant 3008 }; 3009 3010 class TCETargetInfo : public TargetInfo{ 3011 public: 3012 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3013 TLSSupported = false; 3014 IntWidth = 32; 3015 LongWidth = LongLongWidth = 32; 3016 PointerWidth = 32; 3017 IntAlign = 32; 3018 LongAlign = LongLongAlign = 32; 3019 PointerAlign = 32; 3020 SizeType = UnsignedInt; 3021 IntMaxType = SignedLong; 3022 UIntMaxType = UnsignedLong; 3023 IntPtrType = SignedInt; 3024 PtrDiffType = SignedInt; 3025 FloatWidth = 32; 3026 FloatAlign = 32; 3027 DoubleWidth = 32; 3028 DoubleAlign = 32; 3029 LongDoubleWidth = 32; 3030 LongDoubleAlign = 32; 3031 FloatFormat = &llvm::APFloat::IEEEsingle; 3032 DoubleFormat = &llvm::APFloat::IEEEsingle; 3033 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3034 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3035 "i16:16:32-i32:32:32-i64:32:32-" 3036 "f32:32:32-f64:32:32-v64:32:32-" 3037 "v128:32:32-a0:0:32-n32"; 3038 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3039 } 3040 3041 virtual void getTargetDefines(const LangOptions &Opts, 3042 MacroBuilder &Builder) const { 3043 DefineStd(Builder, "tce", Opts); 3044 Builder.defineMacro("__TCE__"); 3045 Builder.defineMacro("__TCE_V1__"); 3046 } 3047 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3048 unsigned &NumRecords) const {} 3049 virtual const char *getClobbers() const { 3050 return ""; 3051 } 3052 virtual const char *getVAListDeclaration() const { 3053 return "typedef void* __builtin_va_list;"; 3054 } 3055 virtual void getGCCRegNames(const char * const *&Names, 3056 unsigned &NumNames) const {} 3057 virtual bool validateAsmConstraint(const char *&Name, 3058 TargetInfo::ConstraintInfo &info) const { 3059 return true; 3060 } 3061 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3062 unsigned &NumAliases) const {} 3063 }; 3064 } 3065 3066 namespace { 3067 class MipsTargetInfoBase : public TargetInfo { 3068 std::string CPU; 3069 protected: 3070 std::string ABI; 3071 public: 3072 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3073 : TargetInfo(triple), ABI(ABIStr) {} 3074 virtual const char *getABI() const { return ABI.c_str(); } 3075 virtual bool setABI(const std::string &Name) = 0; 3076 virtual bool setCPU(const std::string &Name) { 3077 CPU = Name; 3078 return true; 3079 } 3080 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3081 Features[ABI] = true; 3082 Features[CPU] = true; 3083 } 3084 virtual void getArchDefines(const LangOptions &Opts, 3085 MacroBuilder &Builder) const = 0; 3086 virtual void getTargetDefines(const LangOptions &Opts, 3087 MacroBuilder &Builder) const = 0; 3088 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3089 unsigned &NumRecords) const { 3090 // FIXME: Implement! 3091 } 3092 virtual const char *getVAListDeclaration() const { 3093 return "typedef void* __builtin_va_list;"; 3094 } 3095 virtual void getGCCRegNames(const char * const *&Names, 3096 unsigned &NumNames) const { 3097 static const char * const GCCRegNames[] = { 3098 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3099 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3100 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3101 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3102 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3103 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3104 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3105 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3106 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3107 "$fcc5","$fcc6","$fcc7" 3108 }; 3109 Names = GCCRegNames; 3110 NumNames = llvm::array_lengthof(GCCRegNames); 3111 } 3112 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3113 unsigned &NumAliases) const = 0; 3114 virtual bool validateAsmConstraint(const char *&Name, 3115 TargetInfo::ConstraintInfo &Info) const { 3116 switch (*Name) { 3117 default: 3118 return false; 3119 3120 case 'r': // CPU registers. 3121 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3122 case 'y': // Equivalent to "r", backwards compatibility only. 3123 case 'f': // floating-point registers. 3124 Info.setAllowsRegister(); 3125 return true; 3126 } 3127 return false; 3128 } 3129 3130 virtual const char *getClobbers() const { 3131 // FIXME: Implement! 3132 return ""; 3133 } 3134 }; 3135 3136 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3137 public: 3138 Mips32TargetInfoBase(const std::string& triple) : 3139 MipsTargetInfoBase(triple, "o32") { 3140 SizeType = UnsignedInt; 3141 PtrDiffType = SignedInt; 3142 } 3143 virtual bool setABI(const std::string &Name) { 3144 if ((Name == "o32") || (Name == "eabi")) { 3145 ABI = Name; 3146 return true; 3147 } else 3148 return false; 3149 } 3150 virtual void getArchDefines(const LangOptions &Opts, 3151 MacroBuilder &Builder) const { 3152 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3153 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3154 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3155 3156 if (ABI == "o32") { 3157 Builder.defineMacro("__mips_o32"); 3158 Builder.defineMacro("_ABIO32", "1"); 3159 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3160 } 3161 else if (ABI == "eabi") 3162 Builder.defineMacro("__mips_eabi"); 3163 else 3164 llvm_unreachable("Invalid ABI for Mips32."); 3165 } 3166 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3167 unsigned &NumAliases) const { 3168 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3169 { { "at" }, "$1" }, 3170 { { "v0" }, "$2" }, 3171 { { "v1" }, "$3" }, 3172 { { "a0" }, "$4" }, 3173 { { "a1" }, "$5" }, 3174 { { "a2" }, "$6" }, 3175 { { "a3" }, "$7" }, 3176 { { "t0" }, "$8" }, 3177 { { "t1" }, "$9" }, 3178 { { "t2" }, "$10" }, 3179 { { "t3" }, "$11" }, 3180 { { "t4" }, "$12" }, 3181 { { "t5" }, "$13" }, 3182 { { "t6" }, "$14" }, 3183 { { "t7" }, "$15" }, 3184 { { "s0" }, "$16" }, 3185 { { "s1" }, "$17" }, 3186 { { "s2" }, "$18" }, 3187 { { "s3" }, "$19" }, 3188 { { "s4" }, "$20" }, 3189 { { "s5" }, "$21" }, 3190 { { "s6" }, "$22" }, 3191 { { "s7" }, "$23" }, 3192 { { "t8" }, "$24" }, 3193 { { "t9" }, "$25" }, 3194 { { "k0" }, "$26" }, 3195 { { "k1" }, "$27" }, 3196 { { "gp" }, "$28" }, 3197 { { "sp" }, "$29" }, 3198 { { "fp" }, "$30" }, 3199 { { "ra" }, "$31" } 3200 }; 3201 Aliases = GCCRegAliases; 3202 NumAliases = llvm::array_lengthof(GCCRegAliases); 3203 } 3204 }; 3205 3206 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3207 public: 3208 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3209 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3210 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3211 } 3212 virtual void getTargetDefines(const LangOptions &Opts, 3213 MacroBuilder &Builder) const { 3214 DefineStd(Builder, "mips", Opts); 3215 Builder.defineMacro("_mips"); 3216 DefineStd(Builder, "MIPSEB", Opts); 3217 Builder.defineMacro("_MIPSEB"); 3218 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3219 getArchDefines(Opts, Builder); 3220 } 3221 }; 3222 3223 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3224 public: 3225 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3226 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3227 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3228 } 3229 virtual void getTargetDefines(const LangOptions &Opts, 3230 MacroBuilder &Builder) const { 3231 DefineStd(Builder, "mips", Opts); 3232 Builder.defineMacro("_mips"); 3233 DefineStd(Builder, "MIPSEL", Opts); 3234 Builder.defineMacro("_MIPSEL"); 3235 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3236 getArchDefines(Opts, Builder); 3237 } 3238 }; 3239 3240 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3241 virtual void SetDescriptionString(const std::string &Name) = 0; 3242 public: 3243 Mips64TargetInfoBase(const std::string& triple) : 3244 MipsTargetInfoBase(triple, "n64") { 3245 LongWidth = LongAlign = 64; 3246 PointerWidth = PointerAlign = 64; 3247 LongDoubleWidth = LongDoubleAlign = 128; 3248 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3249 } 3250 virtual bool setABI(const std::string &Name) { 3251 SetDescriptionString(Name); 3252 3253 if (Name != "n32" && Name != "n64") 3254 return false; 3255 3256 ABI = Name; 3257 3258 if (Name == "n32") { 3259 LongWidth = LongAlign = 32; 3260 PointerWidth = PointerAlign = 32; 3261 } 3262 3263 return true; 3264 } 3265 virtual void getArchDefines(const LangOptions &Opts, 3266 MacroBuilder &Builder) const { 3267 if (ABI == "n32") { 3268 Builder.defineMacro("__mips_n32"); 3269 Builder.defineMacro("_ABIN32", "2"); 3270 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3271 } 3272 else if (ABI == "n64") { 3273 Builder.defineMacro("__mips_n64"); 3274 Builder.defineMacro("_ABI64", "3"); 3275 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3276 } 3277 else 3278 llvm_unreachable("Invalid ABI for Mips64."); 3279 } 3280 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3281 unsigned &NumAliases) const { 3282 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3283 { { "at" }, "$1" }, 3284 { { "v0" }, "$2" }, 3285 { { "v1" }, "$3" }, 3286 { { "a0" }, "$4" }, 3287 { { "a1" }, "$5" }, 3288 { { "a2" }, "$6" }, 3289 { { "a3" }, "$7" }, 3290 { { "a4" }, "$8" }, 3291 { { "a5" }, "$9" }, 3292 { { "a6" }, "$10" }, 3293 { { "a7" }, "$11" }, 3294 { { "t0" }, "$12" }, 3295 { { "t1" }, "$13" }, 3296 { { "t2" }, "$14" }, 3297 { { "t3" }, "$15" }, 3298 { { "s0" }, "$16" }, 3299 { { "s1" }, "$17" }, 3300 { { "s2" }, "$18" }, 3301 { { "s3" }, "$19" }, 3302 { { "s4" }, "$20" }, 3303 { { "s5" }, "$21" }, 3304 { { "s6" }, "$22" }, 3305 { { "s7" }, "$23" }, 3306 { { "t8" }, "$24" }, 3307 { { "t9" }, "$25" }, 3308 { { "k0" }, "$26" }, 3309 { { "k1" }, "$27" }, 3310 { { "gp" }, "$28" }, 3311 { { "sp" }, "$29" }, 3312 { { "fp" }, "$30" }, 3313 { { "ra" }, "$31" } 3314 }; 3315 Aliases = GCCRegAliases; 3316 NumAliases = llvm::array_lengthof(GCCRegAliases); 3317 } 3318 }; 3319 3320 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3321 virtual void SetDescriptionString(const std::string &Name) { 3322 // Change DescriptionString only if ABI is n32. 3323 if (Name == "n32") 3324 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3325 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3326 "v64:64:64-n32"; 3327 } 3328 public: 3329 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3330 // Default ABI is n64. 3331 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3332 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3333 "v64:64:64-n32"; 3334 } 3335 virtual void getTargetDefines(const LangOptions &Opts, 3336 MacroBuilder &Builder) const { 3337 DefineStd(Builder, "mips", Opts); 3338 Builder.defineMacro("_mips"); 3339 DefineStd(Builder, "MIPSEB", Opts); 3340 Builder.defineMacro("_MIPSEB"); 3341 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3342 getArchDefines(Opts, Builder); 3343 } 3344 }; 3345 3346 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3347 virtual void SetDescriptionString(const std::string &Name) { 3348 // Change DescriptionString only if ABI is n32. 3349 if (Name == "n32") 3350 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3351 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3352 "-v64:64:64-n32"; 3353 } 3354 public: 3355 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3356 // Default ABI is n64. 3357 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3358 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3359 "v64:64:64-n32"; 3360 } 3361 virtual void getTargetDefines(const LangOptions &Opts, 3362 MacroBuilder &Builder) const { 3363 DefineStd(Builder, "mips", Opts); 3364 Builder.defineMacro("_mips"); 3365 DefineStd(Builder, "MIPSEL", Opts); 3366 Builder.defineMacro("_MIPSEL"); 3367 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3368 getArchDefines(Opts, Builder); 3369 } 3370 }; 3371 } // end anonymous namespace. 3372 3373 namespace { 3374 class PNaClTargetInfo : public TargetInfo { 3375 public: 3376 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3377 this->UserLabelPrefix = ""; 3378 this->LongAlign = 32; 3379 this->LongWidth = 32; 3380 this->PointerAlign = 32; 3381 this->PointerWidth = 32; 3382 this->IntMaxType = TargetInfo::SignedLongLong; 3383 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3384 this->Int64Type = TargetInfo::SignedLongLong; 3385 this->DoubleAlign = 64; 3386 this->LongDoubleWidth = 64; 3387 this->LongDoubleAlign = 64; 3388 this->SizeType = TargetInfo::UnsignedInt; 3389 this->PtrDiffType = TargetInfo::SignedInt; 3390 this->IntPtrType = TargetInfo::SignedInt; 3391 this->RegParmMax = 2; 3392 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3393 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3394 } 3395 3396 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3397 } 3398 virtual void getArchDefines(const LangOptions &Opts, 3399 MacroBuilder &Builder) const { 3400 Builder.defineMacro("__le32__"); 3401 Builder.defineMacro("__pnacl__"); 3402 } 3403 virtual void getTargetDefines(const LangOptions &Opts, 3404 MacroBuilder &Builder) const { 3405 DefineStd(Builder, "unix", Opts); 3406 Builder.defineMacro("__ELF__"); 3407 if (Opts.POSIXThreads) 3408 Builder.defineMacro("_REENTRANT"); 3409 if (Opts.CPlusPlus) 3410 Builder.defineMacro("_GNU_SOURCE"); 3411 3412 Builder.defineMacro("__native_client__"); 3413 getArchDefines(Opts, Builder); 3414 } 3415 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3416 unsigned &NumRecords) const { 3417 } 3418 virtual const char *getVAListDeclaration() const { 3419 return "typedef int __builtin_va_list[4];"; 3420 } 3421 virtual void getGCCRegNames(const char * const *&Names, 3422 unsigned &NumNames) const; 3423 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3424 unsigned &NumAliases) const; 3425 virtual bool validateAsmConstraint(const char *&Name, 3426 TargetInfo::ConstraintInfo &Info) const { 3427 return false; 3428 } 3429 3430 virtual const char *getClobbers() const { 3431 return ""; 3432 } 3433 }; 3434 3435 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3436 unsigned &NumNames) const { 3437 Names = NULL; 3438 NumNames = 0; 3439 } 3440 3441 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3442 unsigned &NumAliases) const { 3443 Aliases = NULL; 3444 NumAliases = 0; 3445 } 3446 } // end anonymous namespace. 3447 3448 3449 //===----------------------------------------------------------------------===// 3450 // Driver code 3451 //===----------------------------------------------------------------------===// 3452 3453 static TargetInfo *AllocateTarget(const std::string &T) { 3454 llvm::Triple Triple(T); 3455 llvm::Triple::OSType os = Triple.getOS(); 3456 3457 switch (Triple.getArch()) { 3458 default: 3459 return NULL; 3460 3461 case llvm::Triple::arm: 3462 case llvm::Triple::thumb: 3463 if (Triple.isOSDarwin()) 3464 return new DarwinARMTargetInfo(T); 3465 3466 switch (os) { 3467 case llvm::Triple::Linux: 3468 return new LinuxTargetInfo<ARMTargetInfo>(T); 3469 case llvm::Triple::FreeBSD: 3470 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3471 case llvm::Triple::NetBSD: 3472 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3473 case llvm::Triple::RTEMS: 3474 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3475 default: 3476 return new ARMTargetInfo(T); 3477 } 3478 3479 case llvm::Triple::msp430: 3480 return new MSP430TargetInfo(T); 3481 3482 case llvm::Triple::mips: 3483 switch (os) { 3484 case llvm::Triple::Linux: 3485 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3486 case llvm::Triple::RTEMS: 3487 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3488 case llvm::Triple::FreeBSD: 3489 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3490 case llvm::Triple::NetBSD: 3491 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3492 default: 3493 return new Mips32EBTargetInfo(T); 3494 } 3495 3496 case llvm::Triple::mipsel: 3497 switch (os) { 3498 case llvm::Triple::Linux: 3499 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3500 case llvm::Triple::RTEMS: 3501 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3502 case llvm::Triple::FreeBSD: 3503 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3504 case llvm::Triple::NetBSD: 3505 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3506 default: 3507 return new Mips32ELTargetInfo(T); 3508 } 3509 3510 case llvm::Triple::mips64: 3511 switch (os) { 3512 case llvm::Triple::Linux: 3513 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3514 case llvm::Triple::RTEMS: 3515 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3516 case llvm::Triple::FreeBSD: 3517 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3518 case llvm::Triple::NetBSD: 3519 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3520 default: 3521 return new Mips64EBTargetInfo(T); 3522 } 3523 3524 case llvm::Triple::mips64el: 3525 switch (os) { 3526 case llvm::Triple::Linux: 3527 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3528 case llvm::Triple::RTEMS: 3529 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3530 case llvm::Triple::FreeBSD: 3531 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3532 case llvm::Triple::NetBSD: 3533 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3534 default: 3535 return new Mips64ELTargetInfo(T); 3536 } 3537 3538 case llvm::Triple::le32: 3539 switch (os) { 3540 case llvm::Triple::NativeClient: 3541 return new PNaClTargetInfo(T); 3542 default: 3543 return NULL; 3544 } 3545 3546 case llvm::Triple::ppc: 3547 if (Triple.isOSDarwin()) 3548 return new DarwinPPC32TargetInfo(T); 3549 switch (os) { 3550 case llvm::Triple::Linux: 3551 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3552 case llvm::Triple::FreeBSD: 3553 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3554 case llvm::Triple::NetBSD: 3555 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3556 case llvm::Triple::RTEMS: 3557 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3558 default: 3559 return new PPC32TargetInfo(T); 3560 } 3561 3562 case llvm::Triple::ppc64: 3563 if (Triple.isOSDarwin()) 3564 return new DarwinPPC64TargetInfo(T); 3565 switch (os) { 3566 case llvm::Triple::Linux: 3567 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3568 case llvm::Triple::Lv2: 3569 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3570 case llvm::Triple::FreeBSD: 3571 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3572 case llvm::Triple::NetBSD: 3573 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3574 default: 3575 return new PPC64TargetInfo(T); 3576 } 3577 3578 case llvm::Triple::ptx32: 3579 return new PTX32TargetInfo(T); 3580 case llvm::Triple::ptx64: 3581 return new PTX64TargetInfo(T); 3582 3583 case llvm::Triple::mblaze: 3584 return new MBlazeTargetInfo(T); 3585 3586 case llvm::Triple::sparc: 3587 switch (os) { 3588 case llvm::Triple::Linux: 3589 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3590 case llvm::Triple::AuroraUX: 3591 return new AuroraUXSparcV8TargetInfo(T); 3592 case llvm::Triple::Solaris: 3593 return new SolarisSparcV8TargetInfo(T); 3594 case llvm::Triple::NetBSD: 3595 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3596 case llvm::Triple::RTEMS: 3597 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3598 default: 3599 return new SparcV8TargetInfo(T); 3600 } 3601 3602 // FIXME: Need a real SPU target. 3603 case llvm::Triple::cellspu: 3604 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3605 3606 case llvm::Triple::tce: 3607 return new TCETargetInfo(T); 3608 3609 case llvm::Triple::x86: 3610 if (Triple.isOSDarwin()) 3611 return new DarwinI386TargetInfo(T); 3612 3613 switch (os) { 3614 case llvm::Triple::AuroraUX: 3615 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3616 case llvm::Triple::Linux: 3617 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3618 case llvm::Triple::DragonFly: 3619 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3620 case llvm::Triple::NetBSD: 3621 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3622 case llvm::Triple::OpenBSD: 3623 return new OpenBSDI386TargetInfo(T); 3624 case llvm::Triple::FreeBSD: 3625 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3626 case llvm::Triple::Minix: 3627 return new MinixTargetInfo<X86_32TargetInfo>(T); 3628 case llvm::Triple::Solaris: 3629 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3630 case llvm::Triple::Cygwin: 3631 return new CygwinX86_32TargetInfo(T); 3632 case llvm::Triple::MinGW32: 3633 return new MinGWX86_32TargetInfo(T); 3634 case llvm::Triple::Win32: 3635 return new VisualStudioWindowsX86_32TargetInfo(T); 3636 case llvm::Triple::Haiku: 3637 return new HaikuX86_32TargetInfo(T); 3638 case llvm::Triple::RTEMS: 3639 return new RTEMSX86_32TargetInfo(T); 3640 default: 3641 return new X86_32TargetInfo(T); 3642 } 3643 3644 case llvm::Triple::x86_64: 3645 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3646 return new DarwinX86_64TargetInfo(T); 3647 3648 switch (os) { 3649 case llvm::Triple::AuroraUX: 3650 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3651 case llvm::Triple::Linux: 3652 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3653 case llvm::Triple::DragonFly: 3654 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3655 case llvm::Triple::NetBSD: 3656 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3657 case llvm::Triple::OpenBSD: 3658 return new OpenBSDX86_64TargetInfo(T); 3659 case llvm::Triple::FreeBSD: 3660 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3661 case llvm::Triple::Solaris: 3662 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3663 case llvm::Triple::MinGW32: 3664 return new MinGWX86_64TargetInfo(T); 3665 case llvm::Triple::Win32: // This is what Triple.h supports now. 3666 return new VisualStudioWindowsX86_64TargetInfo(T); 3667 default: 3668 return new X86_64TargetInfo(T); 3669 } 3670 } 3671 } 3672 3673 /// CreateTargetInfo - Return the target info object for the specified target 3674 /// triple. 3675 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3676 TargetOptions &Opts) { 3677 llvm::Triple Triple(Opts.Triple); 3678 3679 // Construct the target 3680 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3681 if (!Target) { 3682 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3683 return 0; 3684 } 3685 3686 // Set the target CPU if specified. 3687 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3688 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3689 return 0; 3690 } 3691 3692 // Set the target ABI if specified. 3693 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3694 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3695 return 0; 3696 } 3697 3698 // Set the target C++ ABI. 3699 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3700 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3701 return 0; 3702 } 3703 3704 // Compute the default target features, we need the target to handle this 3705 // because features may have dependencies on one another. 3706 llvm::StringMap<bool> Features; 3707 Target->getDefaultFeatures(Features); 3708 3709 // Apply the user specified deltas. 3710 // First the enables. 3711 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3712 ie = Opts.Features.end(); it != ie; ++it) { 3713 const char *Name = it->c_str(); 3714 3715 if (Name[0] != '+') 3716 continue; 3717 3718 // Apply the feature via the target. 3719 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 3720 Diags.Report(diag::err_target_invalid_feature) << Name; 3721 return 0; 3722 } 3723 } 3724 3725 // Then the disables. 3726 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3727 ie = Opts.Features.end(); it != ie; ++it) { 3728 const char *Name = it->c_str(); 3729 3730 if (Name[0] == '+') 3731 continue; 3732 3733 // Apply the feature via the target. 3734 if (Name[0] != '-' || 3735 !Target->setFeatureEnabled(Features, Name + 1, false)) { 3736 Diags.Report(diag::err_target_invalid_feature) << Name; 3737 return 0; 3738 } 3739 } 3740 3741 // Add the features to the compile options. 3742 // 3743 // FIXME: If we are completely confident that we have the right set, we only 3744 // need to pass the minuses. 3745 Opts.Features.clear(); 3746 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3747 ie = Features.end(); it != ie; ++it) 3748 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3749 it->first().str()); 3750 Target->HandleTargetFeatures(Opts.Features); 3751 3752 return Target.take(); 3753 } 3754