1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63 } 64 65 //===----------------------------------------------------------------------===// 66 // Defines specific to certain operating systems. 67 //===----------------------------------------------------------------------===// 68 69 namespace { 70 template<typename TgtInfo> 71 class OSTargetInfo : public TgtInfo { 72 protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75 public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83 }; 84 } // end anonymous namespace 85 86 87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 if (Triple.isMacOSX()) { 123 Triple.getMacOSXVersion(Maj, Min, Rev); 124 PlatformName = "macosx"; 125 } else { 126 Triple.getOSVersion(Maj, Min, Rev); 127 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 128 } 129 130 // If -target arch-pc-win32-macho option specified, we're 131 // generating code for Win32 ABI. No need to emit 132 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 133 if (PlatformName == "win32") { 134 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 135 return; 136 } 137 138 // Set the appropriate OS version define. 139 if (Triple.getOS() == llvm::Triple::IOS) { 140 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 141 char Str[6]; 142 Str[0] = '0' + Maj; 143 Str[1] = '0' + (Min / 10); 144 Str[2] = '0' + (Min % 10); 145 Str[3] = '0' + (Rev / 10); 146 Str[4] = '0' + (Rev % 10); 147 Str[5] = '\0'; 148 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 149 } else { 150 // Note that the Driver allows versions which aren't representable in the 151 // define (because we only get a single digit for the minor and micro 152 // revision numbers). So, we limit them to the maximum representable 153 // version. 154 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 155 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 156 char Str[5]; 157 Str[0] = '0' + (Maj / 10); 158 Str[1] = '0' + (Maj % 10); 159 Str[2] = '0' + std::min(Min, 9U); 160 Str[3] = '0' + std::min(Rev, 9U); 161 Str[4] = '\0'; 162 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 163 } 164 165 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 166 } 167 168 namespace { 169 template<typename Target> 170 class DarwinTargetInfo : public OSTargetInfo<Target> { 171 protected: 172 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 173 MacroBuilder &Builder) const { 174 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 175 this->PlatformMinVersion); 176 } 177 178 public: 179 DarwinTargetInfo(const std::string& triple) : 180 OSTargetInfo<Target>(triple) { 181 llvm::Triple T = llvm::Triple(triple); 182 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 183 this->MCountName = "\01mcount"; 184 } 185 186 virtual std::string isValidSectionSpecifier(StringRef SR) const { 187 // Let MCSectionMachO validate this. 188 StringRef Segment, Section; 189 unsigned TAA, StubSize; 190 bool HasTAA; 191 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 192 TAA, HasTAA, StubSize); 193 } 194 195 virtual const char *getStaticInitSectionSpecifier() const { 196 // FIXME: We should return 0 when building kexts. 197 return "__TEXT,__StaticInit,regular,pure_instructions"; 198 } 199 200 /// Darwin does not support protected visibility. Darwin's "default" 201 /// is very similar to ELF's "protected"; Darwin requires a "weak" 202 /// attribute on declarations that can be dynamically replaced. 203 virtual bool hasProtectedVisibility() const { 204 return false; 205 } 206 }; 207 208 209 // DragonFlyBSD Target 210 template<typename Target> 211 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 212 protected: 213 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 214 MacroBuilder &Builder) const { 215 // DragonFly defines; list based off of gcc output 216 Builder.defineMacro("__DragonFly__"); 217 Builder.defineMacro("__DragonFly_cc_version", "100001"); 218 Builder.defineMacro("__ELF__"); 219 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 220 Builder.defineMacro("__tune_i386__"); 221 DefineStd(Builder, "unix", Opts); 222 } 223 public: 224 DragonFlyBSDTargetInfo(const std::string &triple) 225 : OSTargetInfo<Target>(triple) { 226 this->UserLabelPrefix = ""; 227 228 llvm::Triple Triple(triple); 229 switch (Triple.getArch()) { 230 default: 231 case llvm::Triple::x86: 232 case llvm::Triple::x86_64: 233 this->MCountName = ".mcount"; 234 break; 235 } 236 } 237 }; 238 239 // FreeBSD Target 240 template<typename Target> 241 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 242 protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // FreeBSD defines; list based off of gcc output 246 247 unsigned Release = Triple.getOSMajorVersion(); 248 if (Release == 0U) 249 Release = 8; 250 251 Builder.defineMacro("__FreeBSD__", Twine(Release)); 252 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 253 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 254 DefineStd(Builder, "unix", Opts); 255 Builder.defineMacro("__ELF__"); 256 } 257 public: 258 FreeBSDTargetInfo(const std::string &triple) 259 : OSTargetInfo<Target>(triple) { 260 this->UserLabelPrefix = ""; 261 262 llvm::Triple Triple(triple); 263 switch (Triple.getArch()) { 264 default: 265 case llvm::Triple::x86: 266 case llvm::Triple::x86_64: 267 this->MCountName = ".mcount"; 268 break; 269 case llvm::Triple::mips: 270 case llvm::Triple::mipsel: 271 case llvm::Triple::ppc: 272 case llvm::Triple::ppc64: 273 this->MCountName = "_mcount"; 274 break; 275 case llvm::Triple::arm: 276 this->MCountName = "__mcount"; 277 break; 278 } 279 280 } 281 }; 282 283 // Minix Target 284 template<typename Target> 285 class MinixTargetInfo : public OSTargetInfo<Target> { 286 protected: 287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 288 MacroBuilder &Builder) const { 289 // Minix defines 290 291 Builder.defineMacro("__minix", "3"); 292 Builder.defineMacro("_EM_WSIZE", "4"); 293 Builder.defineMacro("_EM_PSIZE", "4"); 294 Builder.defineMacro("_EM_SSIZE", "2"); 295 Builder.defineMacro("_EM_LSIZE", "4"); 296 Builder.defineMacro("_EM_FSIZE", "4"); 297 Builder.defineMacro("_EM_DSIZE", "8"); 298 Builder.defineMacro("__ELF__"); 299 DefineStd(Builder, "unix", Opts); 300 } 301 public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306 }; 307 308 // Linux target 309 template<typename Target> 310 class LinuxTargetInfo : public OSTargetInfo<Target> { 311 protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI) 320 Builder.defineMacro("__ANDROID__", "1"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326 public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336 }; 337 338 // NetBSD Target 339 template<typename Target> 340 class NetBSDTargetInfo : public OSTargetInfo<Target> { 341 protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351 public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356 }; 357 358 // OpenBSD Target 359 template<typename Target> 360 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361 protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_REENTRANT"); 371 } 372 public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) { 375 this->UserLabelPrefix = ""; 376 377 llvm::Triple Triple(triple); 378 switch (Triple.getArch()) { 379 default: 380 case llvm::Triple::x86: 381 case llvm::Triple::x86_64: 382 case llvm::Triple::arm: 383 case llvm::Triple::sparc: 384 this->MCountName = "__mcount"; 385 break; 386 case llvm::Triple::mips64: 387 case llvm::Triple::mips64el: 388 case llvm::Triple::ppc: 389 case llvm::Triple::sparcv9: 390 this->MCountName = "_mcount"; 391 break; 392 } 393 } 394 }; 395 396 // PSP Target 397 template<typename Target> 398 class PSPTargetInfo : public OSTargetInfo<Target> { 399 protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PSP defines; list based on the output of the pspdev gcc toolchain. 403 Builder.defineMacro("PSP"); 404 Builder.defineMacro("_PSP"); 405 Builder.defineMacro("__psp__"); 406 Builder.defineMacro("__ELF__"); 407 } 408 public: 409 PSPTargetInfo(const std::string& triple) 410 : OSTargetInfo<Target>(triple) { 411 this->UserLabelPrefix = ""; 412 } 413 }; 414 415 // PS3 PPU Target 416 template<typename Target> 417 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 418 protected: 419 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 420 MacroBuilder &Builder) const { 421 // PS3 PPU defines. 422 Builder.defineMacro("__PPC__"); 423 Builder.defineMacro("__PPU__"); 424 Builder.defineMacro("__CELLOS_LV2__"); 425 Builder.defineMacro("__ELF__"); 426 Builder.defineMacro("__LP32__"); 427 Builder.defineMacro("_ARCH_PPC64"); 428 Builder.defineMacro("__powerpc64__"); 429 } 430 public: 431 PS3PPUTargetInfo(const std::string& triple) 432 : OSTargetInfo<Target>(triple) { 433 this->UserLabelPrefix = ""; 434 this->LongWidth = this->LongAlign = 32; 435 this->PointerWidth = this->PointerAlign = 32; 436 this->IntMaxType = TargetInfo::SignedLongLong; 437 this->UIntMaxType = TargetInfo::UnsignedLongLong; 438 this->Int64Type = TargetInfo::SignedLongLong; 439 this->SizeType = TargetInfo::UnsignedInt; 440 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 441 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 442 } 443 }; 444 445 // FIXME: Need a real SPU target. 446 // PS3 SPU Target 447 template<typename Target> 448 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 449 protected: 450 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 451 MacroBuilder &Builder) const { 452 // PS3 PPU defines. 453 Builder.defineMacro("__SPU__"); 454 Builder.defineMacro("__ELF__"); 455 } 456 public: 457 PS3SPUTargetInfo(const std::string& triple) 458 : OSTargetInfo<Target>(triple) { 459 this->UserLabelPrefix = ""; 460 } 461 }; 462 463 // AuroraUX target 464 template<typename Target> 465 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 466 protected: 467 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 468 MacroBuilder &Builder) const { 469 DefineStd(Builder, "sun", Opts); 470 DefineStd(Builder, "unix", Opts); 471 Builder.defineMacro("__ELF__"); 472 Builder.defineMacro("__svr4__"); 473 Builder.defineMacro("__SVR4"); 474 } 475 public: 476 AuroraUXTargetInfo(const std::string& triple) 477 : OSTargetInfo<Target>(triple) { 478 this->UserLabelPrefix = ""; 479 this->WCharType = this->SignedLong; 480 // FIXME: WIntType should be SignedLong 481 } 482 }; 483 484 // Solaris target 485 template<typename Target> 486 class SolarisTargetInfo : public OSTargetInfo<Target> { 487 protected: 488 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 489 MacroBuilder &Builder) const { 490 DefineStd(Builder, "sun", Opts); 491 DefineStd(Builder, "unix", Opts); 492 Builder.defineMacro("__ELF__"); 493 Builder.defineMacro("__svr4__"); 494 Builder.defineMacro("__SVR4"); 495 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and 496 // newer, but to 500 for everything else. feature_test.h has a check to 497 // ensure that you are not using C99 with an old version of X/Open or C89 498 // with a new version. 499 if (Opts.C99 || Opts.C11) 500 Builder.defineMacro("_XOPEN_SOURCE", "600"); 501 else 502 Builder.defineMacro("_XOPEN_SOURCE", "500"); 503 if (Opts.CPlusPlus) 504 Builder.defineMacro("__C99FEATURES__"); 505 Builder.defineMacro("_LARGEFILE_SOURCE"); 506 Builder.defineMacro("_LARGEFILE64_SOURCE"); 507 Builder.defineMacro("__EXTENSIONS__"); 508 Builder.defineMacro("_REENTRANT"); 509 } 510 public: 511 SolarisTargetInfo(const std::string& triple) 512 : OSTargetInfo<Target>(triple) { 513 this->UserLabelPrefix = ""; 514 this->WCharType = this->SignedInt; 515 // FIXME: WIntType should be SignedLong 516 } 517 }; 518 519 // Windows target 520 template<typename Target> 521 class WindowsTargetInfo : public OSTargetInfo<Target> { 522 protected: 523 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 524 MacroBuilder &Builder) const { 525 Builder.defineMacro("_WIN32"); 526 } 527 void getVisualStudioDefines(const LangOptions &Opts, 528 MacroBuilder &Builder) const { 529 if (Opts.CPlusPlus) { 530 if (Opts.RTTI) 531 Builder.defineMacro("_CPPRTTI"); 532 533 if (Opts.Exceptions) 534 Builder.defineMacro("_CPPUNWIND"); 535 } 536 537 if (!Opts.CharIsSigned) 538 Builder.defineMacro("_CHAR_UNSIGNED"); 539 540 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 541 // but it works for now. 542 if (Opts.POSIXThreads) 543 Builder.defineMacro("_MT"); 544 545 if (Opts.MSCVersion != 0) 546 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 547 548 if (Opts.MicrosoftExt) { 549 Builder.defineMacro("_MSC_EXTENSIONS"); 550 551 if (Opts.CPlusPlus0x) { 552 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 553 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 554 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 555 } 556 } 557 558 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 559 } 560 561 public: 562 WindowsTargetInfo(const std::string &triple) 563 : OSTargetInfo<Target>(triple) {} 564 }; 565 566 } // end anonymous namespace. 567 568 //===----------------------------------------------------------------------===// 569 // Specific target implementations. 570 //===----------------------------------------------------------------------===// 571 572 namespace { 573 // PPC abstract base class 574 class PPCTargetInfo : public TargetInfo { 575 static const Builtin::Info BuiltinInfo[]; 576 static const char * const GCCRegNames[]; 577 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 578 std::string CPU; 579 public: 580 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) { 581 LongDoubleWidth = LongDoubleAlign = 128; 582 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble; 583 } 584 585 virtual bool setCPU(const std::string &Name) { 586 bool CPUKnown = llvm::StringSwitch<bool>(Name) 587 .Case("generic", true) 588 .Case("440", true) 589 .Case("450", true) 590 .Case("601", true) 591 .Case("602", true) 592 .Case("603", true) 593 .Case("603e", true) 594 .Case("603ev", true) 595 .Case("604", true) 596 .Case("604e", true) 597 .Case("620", true) 598 .Case("g3", true) 599 .Case("7400", true) 600 .Case("g4", true) 601 .Case("7450", true) 602 .Case("g4+", true) 603 .Case("750", true) 604 .Case("970", true) 605 .Case("g5", true) 606 .Case("a2", true) 607 .Case("pwr6", true) 608 .Case("pwr7", true) 609 .Case("ppc", true) 610 .Case("ppc64", true) 611 .Default(false); 612 613 if (CPUKnown) 614 CPU = Name; 615 616 return CPUKnown; 617 } 618 619 virtual void getTargetBuiltins(const Builtin::Info *&Records, 620 unsigned &NumRecords) const { 621 Records = BuiltinInfo; 622 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 623 } 624 625 virtual bool isCLZForZeroUndef() const { return false; } 626 627 virtual void getTargetDefines(const LangOptions &Opts, 628 MacroBuilder &Builder) const; 629 630 virtual bool hasFeature(StringRef Feature) const; 631 632 virtual void getGCCRegNames(const char * const *&Names, 633 unsigned &NumNames) const; 634 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 635 unsigned &NumAliases) const; 636 virtual bool validateAsmConstraint(const char *&Name, 637 TargetInfo::ConstraintInfo &Info) const { 638 switch (*Name) { 639 default: return false; 640 case 'O': // Zero 641 break; 642 case 'b': // Base register 643 case 'f': // Floating point register 644 Info.setAllowsRegister(); 645 break; 646 // FIXME: The following are added to allow parsing. 647 // I just took a guess at what the actions should be. 648 // Also, is more specific checking needed? I.e. specific registers? 649 case 'd': // Floating point register (containing 64-bit value) 650 case 'v': // Altivec vector register 651 Info.setAllowsRegister(); 652 break; 653 case 'w': 654 switch (Name[1]) { 655 case 'd':// VSX vector register to hold vector double data 656 case 'f':// VSX vector register to hold vector float data 657 case 's':// VSX vector register to hold scalar float data 658 case 'a':// Any VSX register 659 break; 660 default: 661 return false; 662 } 663 Info.setAllowsRegister(); 664 Name++; // Skip over 'w'. 665 break; 666 case 'h': // `MQ', `CTR', or `LINK' register 667 case 'q': // `MQ' register 668 case 'c': // `CTR' register 669 case 'l': // `LINK' register 670 case 'x': // `CR' register (condition register) number 0 671 case 'y': // `CR' register (condition register) 672 case 'z': // `XER[CA]' carry bit (part of the XER register) 673 Info.setAllowsRegister(); 674 break; 675 case 'I': // Signed 16-bit constant 676 case 'J': // Unsigned 16-bit constant shifted left 16 bits 677 // (use `L' instead for SImode constants) 678 case 'K': // Unsigned 16-bit constant 679 case 'L': // Signed 16-bit constant shifted left 16 bits 680 case 'M': // Constant larger than 31 681 case 'N': // Exact power of 2 682 case 'P': // Constant whose negation is a signed 16-bit constant 683 case 'G': // Floating point constant that can be loaded into a 684 // register with one instruction per word 685 case 'H': // Integer/Floating point constant that can be loaded 686 // into a register using three instructions 687 break; 688 case 'm': // Memory operand. Note that on PowerPC targets, m can 689 // include addresses that update the base register. It 690 // is therefore only safe to use `m' in an asm statement 691 // if that asm statement accesses the operand exactly once. 692 // The asm statement must also use `%U<opno>' as a 693 // placeholder for the "update" flag in the corresponding 694 // load or store instruction. For example: 695 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 696 // is correct but: 697 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 698 // is not. Use es rather than m if you don't want the base 699 // register to be updated. 700 case 'e': 701 if (Name[1] != 's') 702 return false; 703 // es: A "stable" memory operand; that is, one which does not 704 // include any automodification of the base register. Unlike 705 // `m', this constraint can be used in asm statements that 706 // might access the operand several times, or that might not 707 // access it at all. 708 Info.setAllowsMemory(); 709 Name++; // Skip over 'e'. 710 break; 711 case 'Q': // Memory operand that is an offset from a register (it is 712 // usually better to use `m' or `es' in asm statements) 713 case 'Z': // Memory operand that is an indexed or indirect from a 714 // register (it is usually better to use `m' or `es' in 715 // asm statements) 716 Info.setAllowsMemory(); 717 Info.setAllowsRegister(); 718 break; 719 case 'R': // AIX TOC entry 720 case 'a': // Address operand that is an indexed or indirect from a 721 // register (`p' is preferable for asm statements) 722 case 'S': // Constant suitable as a 64-bit mask operand 723 case 'T': // Constant suitable as a 32-bit mask operand 724 case 'U': // System V Release 4 small data area reference 725 case 't': // AND masks that can be performed by two rldic{l, r} 726 // instructions 727 case 'W': // Vector constant that does not require memory 728 case 'j': // Vector constant that is all zeros. 729 break; 730 // End FIXME. 731 } 732 return true; 733 } 734 virtual const char *getClobbers() const { 735 return ""; 736 } 737 }; 738 739 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 740 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 741 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 742 ALL_LANGUAGES }, 743 #include "clang/Basic/BuiltinsPPC.def" 744 }; 745 746 747 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 748 /// #defines that are not tied to a specific subtarget. 749 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 750 MacroBuilder &Builder) const { 751 // Target identification. 752 Builder.defineMacro("__ppc__"); 753 Builder.defineMacro("_ARCH_PPC"); 754 Builder.defineMacro("__powerpc__"); 755 Builder.defineMacro("__POWERPC__"); 756 if (PointerWidth == 64) { 757 Builder.defineMacro("_ARCH_PPC64"); 758 Builder.defineMacro("_LP64"); 759 Builder.defineMacro("__LP64__"); 760 Builder.defineMacro("__powerpc64__"); 761 Builder.defineMacro("__ppc64__"); 762 } else { 763 Builder.defineMacro("__ppc__"); 764 } 765 766 // Target properties. 767 if (getTriple().getOS() != llvm::Triple::NetBSD) 768 Builder.defineMacro("_BIG_ENDIAN"); 769 Builder.defineMacro("__BIG_ENDIAN__"); 770 771 // Subtarget options. 772 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 773 Builder.defineMacro("__REGISTER_PREFIX__", ""); 774 775 // FIXME: Should be controlled by command line option. 776 Builder.defineMacro("__LONG_DOUBLE_128__"); 777 778 if (Opts.AltiVec) { 779 Builder.defineMacro("__VEC__", "10206"); 780 Builder.defineMacro("__ALTIVEC__"); 781 } 782 783 // CPU identification. 784 if (CPU == "440") { 785 Builder.defineMacro("_ARCH_440"); 786 } else if (CPU == "450") { 787 Builder.defineMacro("_ARCH_440"); 788 Builder.defineMacro("_ARCH_450"); 789 } else if (CPU == "970") { 790 Builder.defineMacro("_ARCH_970"); 791 } else if (CPU == "pwr6") { 792 Builder.defineMacro("_ARCH_PWR6"); 793 } else if (CPU == "pwr7") { 794 Builder.defineMacro("_ARCH_PWR7"); 795 } 796 } 797 798 bool PPCTargetInfo::hasFeature(StringRef Feature) const { 799 return Feature == "powerpc"; 800 } 801 802 803 const char * const PPCTargetInfo::GCCRegNames[] = { 804 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 805 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 806 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 807 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 808 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 809 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 810 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 811 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 812 "mq", "lr", "ctr", "ap", 813 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 814 "xer", 815 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 816 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 817 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 818 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 819 "vrsave", "vscr", 820 "spe_acc", "spefscr", 821 "sfp" 822 }; 823 824 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 825 unsigned &NumNames) const { 826 Names = GCCRegNames; 827 NumNames = llvm::array_lengthof(GCCRegNames); 828 } 829 830 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 831 // While some of these aliases do map to different registers 832 // they still share the same register name. 833 { { "0" }, "r0" }, 834 { { "1"}, "r1" }, 835 { { "2" }, "r2" }, 836 { { "3" }, "r3" }, 837 { { "4" }, "r4" }, 838 { { "5" }, "r5" }, 839 { { "6" }, "r6" }, 840 { { "7" }, "r7" }, 841 { { "8" }, "r8" }, 842 { { "9" }, "r9" }, 843 { { "10" }, "r10" }, 844 { { "11" }, "r11" }, 845 { { "12" }, "r12" }, 846 { { "13" }, "r13" }, 847 { { "14" }, "r14" }, 848 { { "15" }, "r15" }, 849 { { "16" }, "r16" }, 850 { { "17" }, "r17" }, 851 { { "18" }, "r18" }, 852 { { "19" }, "r19" }, 853 { { "20" }, "r20" }, 854 { { "21" }, "r21" }, 855 { { "22" }, "r22" }, 856 { { "23" }, "r23" }, 857 { { "24" }, "r24" }, 858 { { "25" }, "r25" }, 859 { { "26" }, "r26" }, 860 { { "27" }, "r27" }, 861 { { "28" }, "r28" }, 862 { { "29" }, "r29" }, 863 { { "30" }, "r30" }, 864 { { "31" }, "r31" }, 865 { { "fr0" }, "f0" }, 866 { { "fr1" }, "f1" }, 867 { { "fr2" }, "f2" }, 868 { { "fr3" }, "f3" }, 869 { { "fr4" }, "f4" }, 870 { { "fr5" }, "f5" }, 871 { { "fr6" }, "f6" }, 872 { { "fr7" }, "f7" }, 873 { { "fr8" }, "f8" }, 874 { { "fr9" }, "f9" }, 875 { { "fr10" }, "f10" }, 876 { { "fr11" }, "f11" }, 877 { { "fr12" }, "f12" }, 878 { { "fr13" }, "f13" }, 879 { { "fr14" }, "f14" }, 880 { { "fr15" }, "f15" }, 881 { { "fr16" }, "f16" }, 882 { { "fr17" }, "f17" }, 883 { { "fr18" }, "f18" }, 884 { { "fr19" }, "f19" }, 885 { { "fr20" }, "f20" }, 886 { { "fr21" }, "f21" }, 887 { { "fr22" }, "f22" }, 888 { { "fr23" }, "f23" }, 889 { { "fr24" }, "f24" }, 890 { { "fr25" }, "f25" }, 891 { { "fr26" }, "f26" }, 892 { { "fr27" }, "f27" }, 893 { { "fr28" }, "f28" }, 894 { { "fr29" }, "f29" }, 895 { { "fr30" }, "f30" }, 896 { { "fr31" }, "f31" }, 897 { { "cc" }, "cr0" }, 898 }; 899 900 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 901 unsigned &NumAliases) const { 902 Aliases = GCCRegAliases; 903 NumAliases = llvm::array_lengthof(GCCRegAliases); 904 } 905 } // end anonymous namespace. 906 907 namespace { 908 class PPC32TargetInfo : public PPCTargetInfo { 909 public: 910 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 911 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 912 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 913 914 switch (getTriple().getOS()) { 915 case llvm::Triple::Linux: 916 case llvm::Triple::FreeBSD: 917 case llvm::Triple::NetBSD: 918 SizeType = UnsignedInt; 919 PtrDiffType = SignedInt; 920 IntPtrType = SignedInt; 921 break; 922 default: 923 break; 924 } 925 926 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 927 LongDoubleWidth = LongDoubleAlign = 64; 928 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 929 } 930 } 931 932 virtual BuiltinVaListKind getBuiltinVaListKind() const { 933 // This is the ELF definition, and is overridden by the Darwin sub-target 934 return TargetInfo::PowerABIBuiltinVaList; 935 } 936 }; 937 } // end anonymous namespace. 938 939 namespace { 940 class PPC64TargetInfo : public PPCTargetInfo { 941 public: 942 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 943 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 944 IntMaxType = SignedLong; 945 UIntMaxType = UnsignedLong; 946 Int64Type = SignedLong; 947 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 948 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 949 950 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 951 LongDoubleWidth = LongDoubleAlign = 64; 952 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 953 } 954 } 955 virtual BuiltinVaListKind getBuiltinVaListKind() const { 956 return TargetInfo::CharPtrBuiltinVaList; 957 } 958 }; 959 } // end anonymous namespace. 960 961 962 namespace { 963 class DarwinPPC32TargetInfo : 964 public DarwinTargetInfo<PPC32TargetInfo> { 965 public: 966 DarwinPPC32TargetInfo(const std::string& triple) 967 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 968 HasAlignMac68kSupport = true; 969 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 970 LongLongAlign = 32; 971 SuitableAlign = 128; 972 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 973 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 974 } 975 virtual BuiltinVaListKind getBuiltinVaListKind() const { 976 return TargetInfo::CharPtrBuiltinVaList; 977 } 978 }; 979 980 class DarwinPPC64TargetInfo : 981 public DarwinTargetInfo<PPC64TargetInfo> { 982 public: 983 DarwinPPC64TargetInfo(const std::string& triple) 984 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 985 HasAlignMac68kSupport = true; 986 SuitableAlign = 128; 987 } 988 }; 989 } // end anonymous namespace. 990 991 namespace { 992 static const unsigned NVPTXAddrSpaceMap[] = { 993 1, // opencl_global 994 3, // opencl_local 995 4, // opencl_constant 996 1, // cuda_device 997 4, // cuda_constant 998 3, // cuda_shared 999 }; 1000 class NVPTXTargetInfo : public TargetInfo { 1001 static const char * const GCCRegNames[]; 1002 static const Builtin::Info BuiltinInfo[]; 1003 std::vector<llvm::StringRef> AvailableFeatures; 1004 public: 1005 NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 1006 BigEndian = false; 1007 TLSSupported = false; 1008 LongWidth = LongAlign = 64; 1009 AddrSpaceMap = &NVPTXAddrSpaceMap; 1010 // Define available target features 1011 // These must be defined in sorted order! 1012 } 1013 virtual void getTargetDefines(const LangOptions &Opts, 1014 MacroBuilder &Builder) const { 1015 Builder.defineMacro("__PTX__"); 1016 Builder.defineMacro("__NVPTX__"); 1017 } 1018 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1019 unsigned &NumRecords) const { 1020 Records = BuiltinInfo; 1021 NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 1022 } 1023 virtual bool hasFeature(StringRef Feature) const { 1024 return Feature == "ptx" || Feature == "nvptx"; 1025 } 1026 1027 virtual void getGCCRegNames(const char * const *&Names, 1028 unsigned &NumNames) const; 1029 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1030 unsigned &NumAliases) const { 1031 // No aliases. 1032 Aliases = 0; 1033 NumAliases = 0; 1034 } 1035 virtual bool validateAsmConstraint(const char *&Name, 1036 TargetInfo::ConstraintInfo &info) const { 1037 // FIXME: implement 1038 return true; 1039 } 1040 virtual const char *getClobbers() const { 1041 // FIXME: Is this really right? 1042 return ""; 1043 } 1044 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1045 // FIXME: implement 1046 return TargetInfo::CharPtrBuiltinVaList; 1047 } 1048 virtual bool setCPU(const std::string &Name) { 1049 return Name == "sm_10" || Name == "sm_13" || Name == "sm_20"; 1050 } 1051 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1052 StringRef Name, 1053 bool Enabled) const; 1054 }; 1055 1056 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = { 1057 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1058 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1059 ALL_LANGUAGES }, 1060 #include "clang/Basic/BuiltinsNVPTX.def" 1061 }; 1062 1063 const char * const NVPTXTargetInfo::GCCRegNames[] = { 1064 "r0" 1065 }; 1066 1067 void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names, 1068 unsigned &NumNames) const { 1069 Names = GCCRegNames; 1070 NumNames = llvm::array_lengthof(GCCRegNames); 1071 } 1072 1073 bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1074 StringRef Name, 1075 bool Enabled) const { 1076 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1077 Name)) { 1078 Features[Name] = Enabled; 1079 return true; 1080 } else { 1081 return false; 1082 } 1083 } 1084 1085 class NVPTX32TargetInfo : public NVPTXTargetInfo { 1086 public: 1087 NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1088 PointerWidth = PointerAlign = 32; 1089 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1090 DescriptionString 1091 = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1092 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1093 "n16:32:64"; 1094 } 1095 }; 1096 1097 class NVPTX64TargetInfo : public NVPTXTargetInfo { 1098 public: 1099 NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1100 PointerWidth = PointerAlign = 64; 1101 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1102 DescriptionString 1103 = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1104 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1105 "n16:32:64"; 1106 } 1107 }; 1108 } 1109 1110 namespace { 1111 // MBlaze abstract base class 1112 class MBlazeTargetInfo : public TargetInfo { 1113 static const char * const GCCRegNames[]; 1114 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1115 1116 public: 1117 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1118 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1119 } 1120 1121 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1122 unsigned &NumRecords) const { 1123 // FIXME: Implement. 1124 Records = 0; 1125 NumRecords = 0; 1126 } 1127 1128 virtual void getTargetDefines(const LangOptions &Opts, 1129 MacroBuilder &Builder) const; 1130 1131 virtual bool hasFeature(StringRef Feature) const { 1132 return Feature == "mblaze"; 1133 } 1134 1135 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1136 return TargetInfo::CharPtrBuiltinVaList; 1137 } 1138 virtual const char *getTargetPrefix() const { 1139 return "mblaze"; 1140 } 1141 virtual void getGCCRegNames(const char * const *&Names, 1142 unsigned &NumNames) const; 1143 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1144 unsigned &NumAliases) const; 1145 virtual bool validateAsmConstraint(const char *&Name, 1146 TargetInfo::ConstraintInfo &Info) const { 1147 switch (*Name) { 1148 default: return false; 1149 case 'O': // Zero 1150 return true; 1151 case 'b': // Base register 1152 case 'f': // Floating point register 1153 Info.setAllowsRegister(); 1154 return true; 1155 } 1156 } 1157 virtual const char *getClobbers() const { 1158 return ""; 1159 } 1160 }; 1161 1162 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1163 /// #defines that are not tied to a specific subtarget. 1164 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1165 MacroBuilder &Builder) const { 1166 // Target identification. 1167 Builder.defineMacro("__microblaze__"); 1168 Builder.defineMacro("_ARCH_MICROBLAZE"); 1169 Builder.defineMacro("__MICROBLAZE__"); 1170 1171 // Target properties. 1172 Builder.defineMacro("_BIG_ENDIAN"); 1173 Builder.defineMacro("__BIG_ENDIAN__"); 1174 1175 // Subtarget options. 1176 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1177 } 1178 1179 1180 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1181 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1182 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1183 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1184 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1185 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1186 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1187 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1188 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1189 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1190 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1191 }; 1192 1193 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1194 unsigned &NumNames) const { 1195 Names = GCCRegNames; 1196 NumNames = llvm::array_lengthof(GCCRegNames); 1197 } 1198 1199 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1200 { {"f0"}, "r0" }, 1201 { {"f1"}, "r1" }, 1202 { {"f2"}, "r2" }, 1203 { {"f3"}, "r3" }, 1204 { {"f4"}, "r4" }, 1205 { {"f5"}, "r5" }, 1206 { {"f6"}, "r6" }, 1207 { {"f7"}, "r7" }, 1208 { {"f8"}, "r8" }, 1209 { {"f9"}, "r9" }, 1210 { {"f10"}, "r10" }, 1211 { {"f11"}, "r11" }, 1212 { {"f12"}, "r12" }, 1213 { {"f13"}, "r13" }, 1214 { {"f14"}, "r14" }, 1215 { {"f15"}, "r15" }, 1216 { {"f16"}, "r16" }, 1217 { {"f17"}, "r17" }, 1218 { {"f18"}, "r18" }, 1219 { {"f19"}, "r19" }, 1220 { {"f20"}, "r20" }, 1221 { {"f21"}, "r21" }, 1222 { {"f22"}, "r22" }, 1223 { {"f23"}, "r23" }, 1224 { {"f24"}, "r24" }, 1225 { {"f25"}, "r25" }, 1226 { {"f26"}, "r26" }, 1227 { {"f27"}, "r27" }, 1228 { {"f28"}, "r28" }, 1229 { {"f29"}, "r29" }, 1230 { {"f30"}, "r30" }, 1231 { {"f31"}, "r31" }, 1232 }; 1233 1234 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1235 unsigned &NumAliases) const { 1236 Aliases = GCCRegAliases; 1237 NumAliases = llvm::array_lengthof(GCCRegAliases); 1238 } 1239 } // end anonymous namespace. 1240 1241 namespace { 1242 // Namespace for x86 abstract base class 1243 const Builtin::Info BuiltinInfo[] = { 1244 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1245 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1246 ALL_LANGUAGES }, 1247 #include "clang/Basic/BuiltinsX86.def" 1248 }; 1249 1250 static const char* const GCCRegNames[] = { 1251 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1252 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1253 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1254 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1255 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1256 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1257 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1258 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1259 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1260 }; 1261 1262 const TargetInfo::AddlRegName AddlRegNames[] = { 1263 { { "al", "ah", "eax", "rax" }, 0 }, 1264 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1265 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1266 { { "dl", "dh", "edx", "rdx" }, 1 }, 1267 { { "esi", "rsi" }, 4 }, 1268 { { "edi", "rdi" }, 5 }, 1269 { { "esp", "rsp" }, 7 }, 1270 { { "ebp", "rbp" }, 6 }, 1271 }; 1272 1273 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1274 // most of the implementation can be shared. 1275 class X86TargetInfo : public TargetInfo { 1276 enum X86SSEEnum { 1277 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1278 } SSELevel; 1279 enum MMX3DNowEnum { 1280 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1281 } MMX3DNowLevel; 1282 1283 bool HasAES; 1284 bool HasPCLMUL; 1285 bool HasLZCNT; 1286 bool HasBMI; 1287 bool HasBMI2; 1288 bool HasPOPCNT; 1289 bool HasSSE4a; 1290 bool HasFMA4; 1291 bool HasFMA; 1292 bool HasXOP; 1293 1294 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1295 /// 1296 /// Each enumeration represents a particular CPU supported by Clang. These 1297 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1298 enum CPUKind { 1299 CK_Generic, 1300 1301 /// \name i386 1302 /// i386-generation processors. 1303 //@{ 1304 CK_i386, 1305 //@} 1306 1307 /// \name i486 1308 /// i486-generation processors. 1309 //@{ 1310 CK_i486, 1311 CK_WinChipC6, 1312 CK_WinChip2, 1313 CK_C3, 1314 //@} 1315 1316 /// \name i586 1317 /// i586-generation processors, P5 microarchitecture based. 1318 //@{ 1319 CK_i586, 1320 CK_Pentium, 1321 CK_PentiumMMX, 1322 //@} 1323 1324 /// \name i686 1325 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1326 //@{ 1327 CK_i686, 1328 CK_PentiumPro, 1329 CK_Pentium2, 1330 CK_Pentium3, 1331 CK_Pentium3M, 1332 CK_PentiumM, 1333 CK_C3_2, 1334 1335 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1336 /// Clang however has some logic to suport this. 1337 // FIXME: Warn, deprecate, and potentially remove this. 1338 CK_Yonah, 1339 //@} 1340 1341 /// \name Netburst 1342 /// Netburst microarchitecture based processors. 1343 //@{ 1344 CK_Pentium4, 1345 CK_Pentium4M, 1346 CK_Prescott, 1347 CK_Nocona, 1348 //@} 1349 1350 /// \name Core 1351 /// Core microarchitecture based processors. 1352 //@{ 1353 CK_Core2, 1354 1355 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1356 /// codename which GCC no longer accepts as an option to -march, but Clang 1357 /// has some logic for recognizing it. 1358 // FIXME: Warn, deprecate, and potentially remove this. 1359 CK_Penryn, 1360 //@} 1361 1362 /// \name Atom 1363 /// Atom processors 1364 //@{ 1365 CK_Atom, 1366 //@} 1367 1368 /// \name Nehalem 1369 /// Nehalem microarchitecture based processors. 1370 //@{ 1371 CK_Corei7, 1372 CK_Corei7AVX, 1373 CK_CoreAVXi, 1374 CK_CoreAVX2, 1375 //@} 1376 1377 /// \name K6 1378 /// K6 architecture processors. 1379 //@{ 1380 CK_K6, 1381 CK_K6_2, 1382 CK_K6_3, 1383 //@} 1384 1385 /// \name K7 1386 /// K7 architecture processors. 1387 //@{ 1388 CK_Athlon, 1389 CK_AthlonThunderbird, 1390 CK_Athlon4, 1391 CK_AthlonXP, 1392 CK_AthlonMP, 1393 //@} 1394 1395 /// \name K8 1396 /// K8 architecture processors. 1397 //@{ 1398 CK_Athlon64, 1399 CK_Athlon64SSE3, 1400 CK_AthlonFX, 1401 CK_K8, 1402 CK_K8SSE3, 1403 CK_Opteron, 1404 CK_OpteronSSE3, 1405 CK_AMDFAM10, 1406 //@} 1407 1408 /// \name Bobcat 1409 /// Bobcat architecture processors. 1410 //@{ 1411 CK_BTVER1, 1412 //@} 1413 1414 /// \name Bulldozer 1415 /// Bulldozer architecture processors. 1416 //@{ 1417 CK_BDVER1, 1418 CK_BDVER2, 1419 //@} 1420 1421 /// This specification is deprecated and will be removed in the future. 1422 /// Users should prefer \see CK_K8. 1423 // FIXME: Warn on this when the CPU is set to it. 1424 CK_x86_64, 1425 //@} 1426 1427 /// \name Geode 1428 /// Geode processors. 1429 //@{ 1430 CK_Geode 1431 //@} 1432 } CPU; 1433 1434 public: 1435 X86TargetInfo(const std::string& triple) 1436 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1437 HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasBMI(false), 1438 HasBMI2(false), HasPOPCNT(false), HasSSE4a(false), HasFMA4(false), 1439 HasFMA(false), HasXOP(false), CPU(CK_Generic) { 1440 BigEndian = false; 1441 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1442 } 1443 virtual unsigned getFloatEvalMethod() const { 1444 // X87 evaluates with 80 bits "long double" precision. 1445 return SSELevel == NoSSE ? 2 : 0; 1446 } 1447 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1448 unsigned &NumRecords) const { 1449 Records = BuiltinInfo; 1450 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1451 } 1452 virtual void getGCCRegNames(const char * const *&Names, 1453 unsigned &NumNames) const { 1454 Names = GCCRegNames; 1455 NumNames = llvm::array_lengthof(GCCRegNames); 1456 } 1457 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1458 unsigned &NumAliases) const { 1459 Aliases = 0; 1460 NumAliases = 0; 1461 } 1462 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1463 unsigned &NumNames) const { 1464 Names = AddlRegNames; 1465 NumNames = llvm::array_lengthof(AddlRegNames); 1466 } 1467 virtual bool validateAsmConstraint(const char *&Name, 1468 TargetInfo::ConstraintInfo &info) const; 1469 virtual std::string convertConstraint(const char *&Constraint) const; 1470 virtual const char *getClobbers() const { 1471 return "~{dirflag},~{fpsr},~{flags}"; 1472 } 1473 virtual void getTargetDefines(const LangOptions &Opts, 1474 MacroBuilder &Builder) const; 1475 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1476 StringRef Name, 1477 bool Enabled) const; 1478 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1479 virtual bool hasFeature(StringRef Feature) const; 1480 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1481 virtual const char* getABI() const { 1482 if (PointerWidth == 64 && SSELevel >= AVX) 1483 return "avx"; 1484 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1485 return "no-mmx"; 1486 return ""; 1487 } 1488 virtual bool setCPU(const std::string &Name) { 1489 CPU = llvm::StringSwitch<CPUKind>(Name) 1490 .Case("i386", CK_i386) 1491 .Case("i486", CK_i486) 1492 .Case("winchip-c6", CK_WinChipC6) 1493 .Case("winchip2", CK_WinChip2) 1494 .Case("c3", CK_C3) 1495 .Case("i586", CK_i586) 1496 .Case("pentium", CK_Pentium) 1497 .Case("pentium-mmx", CK_PentiumMMX) 1498 .Case("i686", CK_i686) 1499 .Case("pentiumpro", CK_PentiumPro) 1500 .Case("pentium2", CK_Pentium2) 1501 .Case("pentium3", CK_Pentium3) 1502 .Case("pentium3m", CK_Pentium3M) 1503 .Case("pentium-m", CK_PentiumM) 1504 .Case("c3-2", CK_C3_2) 1505 .Case("yonah", CK_Yonah) 1506 .Case("pentium4", CK_Pentium4) 1507 .Case("pentium4m", CK_Pentium4M) 1508 .Case("prescott", CK_Prescott) 1509 .Case("nocona", CK_Nocona) 1510 .Case("core2", CK_Core2) 1511 .Case("penryn", CK_Penryn) 1512 .Case("atom", CK_Atom) 1513 .Case("corei7", CK_Corei7) 1514 .Case("corei7-avx", CK_Corei7AVX) 1515 .Case("core-avx-i", CK_CoreAVXi) 1516 .Case("core-avx2", CK_CoreAVX2) 1517 .Case("k6", CK_K6) 1518 .Case("k6-2", CK_K6_2) 1519 .Case("k6-3", CK_K6_3) 1520 .Case("athlon", CK_Athlon) 1521 .Case("athlon-tbird", CK_AthlonThunderbird) 1522 .Case("athlon-4", CK_Athlon4) 1523 .Case("athlon-xp", CK_AthlonXP) 1524 .Case("athlon-mp", CK_AthlonMP) 1525 .Case("athlon64", CK_Athlon64) 1526 .Case("athlon64-sse3", CK_Athlon64SSE3) 1527 .Case("athlon-fx", CK_AthlonFX) 1528 .Case("k8", CK_K8) 1529 .Case("k8-sse3", CK_K8SSE3) 1530 .Case("opteron", CK_Opteron) 1531 .Case("opteron-sse3", CK_OpteronSSE3) 1532 .Case("amdfam10", CK_AMDFAM10) 1533 .Case("btver1", CK_BTVER1) 1534 .Case("bdver1", CK_BDVER1) 1535 .Case("bdver2", CK_BDVER2) 1536 .Case("x86-64", CK_x86_64) 1537 .Case("geode", CK_Geode) 1538 .Default(CK_Generic); 1539 1540 // Perform any per-CPU checks necessary to determine if this CPU is 1541 // acceptable. 1542 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1543 // invalid without explaining *why*. 1544 switch (CPU) { 1545 case CK_Generic: 1546 // No processor selected! 1547 return false; 1548 1549 case CK_i386: 1550 case CK_i486: 1551 case CK_WinChipC6: 1552 case CK_WinChip2: 1553 case CK_C3: 1554 case CK_i586: 1555 case CK_Pentium: 1556 case CK_PentiumMMX: 1557 case CK_i686: 1558 case CK_PentiumPro: 1559 case CK_Pentium2: 1560 case CK_Pentium3: 1561 case CK_Pentium3M: 1562 case CK_PentiumM: 1563 case CK_Yonah: 1564 case CK_C3_2: 1565 case CK_Pentium4: 1566 case CK_Pentium4M: 1567 case CK_Prescott: 1568 case CK_K6: 1569 case CK_K6_2: 1570 case CK_K6_3: 1571 case CK_Athlon: 1572 case CK_AthlonThunderbird: 1573 case CK_Athlon4: 1574 case CK_AthlonXP: 1575 case CK_AthlonMP: 1576 case CK_Geode: 1577 // Only accept certain architectures when compiling in 32-bit mode. 1578 if (PointerWidth != 32) 1579 return false; 1580 1581 // Fallthrough 1582 case CK_Nocona: 1583 case CK_Core2: 1584 case CK_Penryn: 1585 case CK_Atom: 1586 case CK_Corei7: 1587 case CK_Corei7AVX: 1588 case CK_CoreAVXi: 1589 case CK_CoreAVX2: 1590 case CK_Athlon64: 1591 case CK_Athlon64SSE3: 1592 case CK_AthlonFX: 1593 case CK_K8: 1594 case CK_K8SSE3: 1595 case CK_Opteron: 1596 case CK_OpteronSSE3: 1597 case CK_AMDFAM10: 1598 case CK_BTVER1: 1599 case CK_BDVER1: 1600 case CK_BDVER2: 1601 case CK_x86_64: 1602 return true; 1603 } 1604 llvm_unreachable("Unhandled CPU kind"); 1605 } 1606 }; 1607 1608 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1609 // FIXME: This should not be here. 1610 Features["3dnow"] = false; 1611 Features["3dnowa"] = false; 1612 Features["mmx"] = false; 1613 Features["sse"] = false; 1614 Features["sse2"] = false; 1615 Features["sse3"] = false; 1616 Features["ssse3"] = false; 1617 Features["sse41"] = false; 1618 Features["sse42"] = false; 1619 Features["sse4a"] = false; 1620 Features["aes"] = false; 1621 Features["pclmul"] = false; 1622 Features["avx"] = false; 1623 Features["avx2"] = false; 1624 Features["lzcnt"] = false; 1625 Features["bmi"] = false; 1626 Features["bmi2"] = false; 1627 Features["popcnt"] = false; 1628 Features["fma4"] = false; 1629 Features["fma"] = false; 1630 Features["xop"] = false; 1631 1632 // FIXME: This *really* should not be here. 1633 1634 // X86_64 always has SSE2. 1635 if (PointerWidth == 64) 1636 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1637 1638 switch (CPU) { 1639 case CK_Generic: 1640 case CK_i386: 1641 case CK_i486: 1642 case CK_i586: 1643 case CK_Pentium: 1644 case CK_i686: 1645 case CK_PentiumPro: 1646 break; 1647 case CK_PentiumMMX: 1648 case CK_Pentium2: 1649 setFeatureEnabled(Features, "mmx", true); 1650 break; 1651 case CK_Pentium3: 1652 case CK_Pentium3M: 1653 setFeatureEnabled(Features, "mmx", true); 1654 setFeatureEnabled(Features, "sse", true); 1655 break; 1656 case CK_PentiumM: 1657 case CK_Pentium4: 1658 case CK_Pentium4M: 1659 case CK_x86_64: 1660 setFeatureEnabled(Features, "mmx", true); 1661 setFeatureEnabled(Features, "sse2", true); 1662 break; 1663 case CK_Yonah: 1664 case CK_Prescott: 1665 case CK_Nocona: 1666 setFeatureEnabled(Features, "mmx", true); 1667 setFeatureEnabled(Features, "sse3", true); 1668 break; 1669 case CK_Core2: 1670 setFeatureEnabled(Features, "mmx", true); 1671 setFeatureEnabled(Features, "ssse3", true); 1672 break; 1673 case CK_Penryn: 1674 setFeatureEnabled(Features, "mmx", true); 1675 setFeatureEnabled(Features, "sse4.1", true); 1676 break; 1677 case CK_Atom: 1678 setFeatureEnabled(Features, "mmx", true); 1679 setFeatureEnabled(Features, "ssse3", true); 1680 break; 1681 case CK_Corei7: 1682 setFeatureEnabled(Features, "mmx", true); 1683 setFeatureEnabled(Features, "sse4", true); 1684 break; 1685 case CK_Corei7AVX: 1686 case CK_CoreAVXi: 1687 setFeatureEnabled(Features, "mmx", true); 1688 setFeatureEnabled(Features, "avx", true); 1689 setFeatureEnabled(Features, "aes", true); 1690 setFeatureEnabled(Features, "pclmul", true); 1691 break; 1692 case CK_CoreAVX2: 1693 setFeatureEnabled(Features, "mmx", true); 1694 setFeatureEnabled(Features, "avx2", true); 1695 setFeatureEnabled(Features, "aes", true); 1696 setFeatureEnabled(Features, "pclmul", true); 1697 setFeatureEnabled(Features, "lzcnt", true); 1698 setFeatureEnabled(Features, "bmi", true); 1699 setFeatureEnabled(Features, "bmi2", true); 1700 setFeatureEnabled(Features, "fma", true); 1701 break; 1702 case CK_K6: 1703 case CK_WinChipC6: 1704 setFeatureEnabled(Features, "mmx", true); 1705 break; 1706 case CK_K6_2: 1707 case CK_K6_3: 1708 case CK_WinChip2: 1709 case CK_C3: 1710 setFeatureEnabled(Features, "3dnow", true); 1711 break; 1712 case CK_Athlon: 1713 case CK_AthlonThunderbird: 1714 case CK_Geode: 1715 setFeatureEnabled(Features, "3dnowa", true); 1716 break; 1717 case CK_Athlon4: 1718 case CK_AthlonXP: 1719 case CK_AthlonMP: 1720 setFeatureEnabled(Features, "sse", true); 1721 setFeatureEnabled(Features, "3dnowa", true); 1722 break; 1723 case CK_K8: 1724 case CK_Opteron: 1725 case CK_Athlon64: 1726 case CK_AthlonFX: 1727 setFeatureEnabled(Features, "sse2", true); 1728 setFeatureEnabled(Features, "3dnowa", true); 1729 break; 1730 case CK_K8SSE3: 1731 case CK_OpteronSSE3: 1732 case CK_Athlon64SSE3: 1733 setFeatureEnabled(Features, "sse3", true); 1734 setFeatureEnabled(Features, "3dnowa", true); 1735 break; 1736 case CK_AMDFAM10: 1737 setFeatureEnabled(Features, "sse3", true); 1738 setFeatureEnabled(Features, "sse4a", true); 1739 setFeatureEnabled(Features, "3dnowa", true); 1740 break; 1741 case CK_BTVER1: 1742 setFeatureEnabled(Features, "ssse3", true); 1743 setFeatureEnabled(Features, "sse4a", true); 1744 break; 1745 case CK_BDVER1: 1746 case CK_BDVER2: 1747 setFeatureEnabled(Features, "avx", true); 1748 setFeatureEnabled(Features, "xop", true); 1749 setFeatureEnabled(Features, "aes", true); 1750 setFeatureEnabled(Features, "pclmul", true); 1751 break; 1752 case CK_C3_2: 1753 setFeatureEnabled(Features, "mmx", true); 1754 setFeatureEnabled(Features, "sse", true); 1755 break; 1756 } 1757 } 1758 1759 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1760 StringRef Name, 1761 bool Enabled) const { 1762 // FIXME: This *really* should not be here. We need some way of translating 1763 // options into llvm subtarget features. 1764 if (!Features.count(Name) && 1765 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1766 return false; 1767 1768 // FIXME: this should probably use a switch with fall through. 1769 1770 if (Enabled) { 1771 if (Name == "mmx") 1772 Features["mmx"] = true; 1773 else if (Name == "sse") 1774 Features["mmx"] = Features["sse"] = true; 1775 else if (Name == "sse2") 1776 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1777 else if (Name == "sse3") 1778 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1779 true; 1780 else if (Name == "ssse3") 1781 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1782 Features["ssse3"] = true; 1783 else if (Name == "sse4" || Name == "sse4.2") 1784 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1785 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1786 Features["popcnt"] = true; 1787 else if (Name == "sse4.1") 1788 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1789 Features["ssse3"] = Features["sse41"] = true; 1790 else if (Name == "3dnow") 1791 Features["mmx"] = Features["3dnow"] = true; 1792 else if (Name == "3dnowa") 1793 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1794 else if (Name == "aes") 1795 Features["sse"] = Features["sse2"] = Features["aes"] = true; 1796 else if (Name == "pclmul") 1797 Features["sse"] = Features["sse2"] = Features["pclmul"] = true; 1798 else if (Name == "avx") 1799 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1800 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1801 Features["popcnt"] = Features["avx"] = true; 1802 else if (Name == "avx2") 1803 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1804 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1805 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1806 else if (Name == "fma") 1807 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1808 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1809 Features["popcnt"] = Features["avx"] = Features["fma"] = true; 1810 else if (Name == "fma4") 1811 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1812 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1813 Features["popcnt"] = Features["avx"] = Features["sse4a"] = 1814 Features["fma4"] = true; 1815 else if (Name == "xop") 1816 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1817 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1818 Features["popcnt"] = Features["avx"] = Features["sse4a"] = 1819 Features["fma4"] = Features["xop"] = true; 1820 else if (Name == "sse4a") 1821 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1822 Features["sse4a"] = true; 1823 else if (Name == "lzcnt") 1824 Features["lzcnt"] = true; 1825 else if (Name == "bmi") 1826 Features["bmi"] = true; 1827 else if (Name == "bmi2") 1828 Features["bmi2"] = true; 1829 else if (Name == "popcnt") 1830 Features["popcnt"] = true; 1831 } else { 1832 if (Name == "mmx") 1833 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1834 else if (Name == "sse") 1835 Features["sse"] = Features["sse2"] = Features["sse3"] = 1836 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1837 Features["sse4a"] = Features["avx"] = Features["avx2"] = 1838 Features["fma"] = Features["fma4"] = Features["aes"] = 1839 Features["pclmul"] = Features["xop"] = false; 1840 else if (Name == "sse2") 1841 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1842 Features["sse41"] = Features["sse42"] = Features["sse4a"] = 1843 Features["avx"] = Features["avx2"] = Features["fma"] = 1844 Features["fma4"] = Features["aes"] = Features["pclmul"] = 1845 Features["xop"] = false; 1846 else if (Name == "sse3") 1847 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1848 Features["sse42"] = Features["sse4a"] = Features["avx"] = 1849 Features["avx2"] = Features["fma"] = Features["fma4"] = 1850 Features["xop"] = false; 1851 else if (Name == "ssse3") 1852 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1853 Features["avx"] = Features["avx2"] = Features["fma"] = false; 1854 else if (Name == "sse4" || Name == "sse4.1") 1855 Features["sse41"] = Features["sse42"] = Features["avx"] = 1856 Features["avx2"] = Features["fma"] = false; 1857 else if (Name == "sse4.2") 1858 Features["sse42"] = Features["avx"] = Features["avx2"] = 1859 Features["fma"] = false; 1860 else if (Name == "3dnow") 1861 Features["3dnow"] = Features["3dnowa"] = false; 1862 else if (Name == "3dnowa") 1863 Features["3dnowa"] = false; 1864 else if (Name == "aes") 1865 Features["aes"] = false; 1866 else if (Name == "pclmul") 1867 Features["pclmul"] = false; 1868 else if (Name == "avx") 1869 Features["avx"] = Features["avx2"] = Features["fma"] = 1870 Features["fma4"] = Features["xop"] = false; 1871 else if (Name == "avx2") 1872 Features["avx2"] = false; 1873 else if (Name == "fma") 1874 Features["fma"] = false; 1875 else if (Name == "sse4a") 1876 Features["sse4a"] = Features["fma4"] = Features["xop"] = false; 1877 else if (Name == "lzcnt") 1878 Features["lzcnt"] = false; 1879 else if (Name == "bmi") 1880 Features["bmi"] = false; 1881 else if (Name == "bmi2") 1882 Features["bmi2"] = false; 1883 else if (Name == "popcnt") 1884 Features["popcnt"] = false; 1885 else if (Name == "fma4") 1886 Features["fma4"] = Features["xop"] = false; 1887 else if (Name == "xop") 1888 Features["xop"] = false; 1889 } 1890 1891 return true; 1892 } 1893 1894 /// HandleTargetOptions - Perform initialization based on the user 1895 /// configured set of features. 1896 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1897 // Remember the maximum enabled sselevel. 1898 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1899 // Ignore disabled features. 1900 if (Features[i][0] == '-') 1901 continue; 1902 1903 StringRef Feature = StringRef(Features[i]).substr(1); 1904 1905 if (Feature == "aes") { 1906 HasAES = true; 1907 continue; 1908 } 1909 1910 if (Feature == "pclmul") { 1911 HasPCLMUL = true; 1912 continue; 1913 } 1914 1915 if (Feature == "lzcnt") { 1916 HasLZCNT = true; 1917 continue; 1918 } 1919 1920 if (Feature == "bmi") { 1921 HasBMI = true; 1922 continue; 1923 } 1924 1925 if (Feature == "bmi2") { 1926 HasBMI2 = true; 1927 continue; 1928 } 1929 1930 if (Feature == "popcnt") { 1931 HasPOPCNT = true; 1932 continue; 1933 } 1934 1935 if (Feature == "sse4a") { 1936 HasSSE4a = true; 1937 continue; 1938 } 1939 1940 if (Feature == "fma4") { 1941 HasFMA4 = true; 1942 continue; 1943 } 1944 1945 if (Feature == "fma") { 1946 HasFMA = true; 1947 continue; 1948 } 1949 1950 if (Feature == "xop") { 1951 HasXOP = true; 1952 continue; 1953 } 1954 1955 assert(Features[i][0] == '+' && "Invalid target feature!"); 1956 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) 1957 .Case("avx2", AVX2) 1958 .Case("avx", AVX) 1959 .Case("sse42", SSE42) 1960 .Case("sse41", SSE41) 1961 .Case("ssse3", SSSE3) 1962 .Case("sse3", SSE3) 1963 .Case("sse2", SSE2) 1964 .Case("sse", SSE1) 1965 .Default(NoSSE); 1966 SSELevel = std::max(SSELevel, Level); 1967 1968 MMX3DNowEnum ThreeDNowLevel = 1969 llvm::StringSwitch<MMX3DNowEnum>(Feature) 1970 .Case("3dnowa", AMD3DNowAthlon) 1971 .Case("3dnow", AMD3DNow) 1972 .Case("mmx", MMX) 1973 .Default(NoMMX3DNow); 1974 1975 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1976 } 1977 1978 // Don't tell the backend if we're turning off mmx; it will end up disabling 1979 // SSE, which we don't want. 1980 std::vector<std::string>::iterator it; 1981 it = std::find(Features.begin(), Features.end(), "-mmx"); 1982 if (it != Features.end()) 1983 Features.erase(it); 1984 } 1985 1986 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1987 /// definitions for this particular subtarget. 1988 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1989 MacroBuilder &Builder) const { 1990 // Target identification. 1991 if (PointerWidth == 64) { 1992 if (getLongWidth() == 64) { 1993 Builder.defineMacro("_LP64"); 1994 Builder.defineMacro("__LP64__"); 1995 } 1996 Builder.defineMacro("__amd64__"); 1997 Builder.defineMacro("__amd64"); 1998 Builder.defineMacro("__x86_64"); 1999 Builder.defineMacro("__x86_64__"); 2000 } else { 2001 DefineStd(Builder, "i386", Opts); 2002 } 2003 2004 // Subtarget options. 2005 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 2006 // truly should be based on -mtune options. 2007 switch (CPU) { 2008 case CK_Generic: 2009 break; 2010 case CK_i386: 2011 // The rest are coming from the i386 define above. 2012 Builder.defineMacro("__tune_i386__"); 2013 break; 2014 case CK_i486: 2015 case CK_WinChipC6: 2016 case CK_WinChip2: 2017 case CK_C3: 2018 defineCPUMacros(Builder, "i486"); 2019 break; 2020 case CK_PentiumMMX: 2021 Builder.defineMacro("__pentium_mmx__"); 2022 Builder.defineMacro("__tune_pentium_mmx__"); 2023 // Fallthrough 2024 case CK_i586: 2025 case CK_Pentium: 2026 defineCPUMacros(Builder, "i586"); 2027 defineCPUMacros(Builder, "pentium"); 2028 break; 2029 case CK_Pentium3: 2030 case CK_Pentium3M: 2031 case CK_PentiumM: 2032 Builder.defineMacro("__tune_pentium3__"); 2033 // Fallthrough 2034 case CK_Pentium2: 2035 case CK_C3_2: 2036 Builder.defineMacro("__tune_pentium2__"); 2037 // Fallthrough 2038 case CK_PentiumPro: 2039 Builder.defineMacro("__tune_i686__"); 2040 Builder.defineMacro("__tune_pentiumpro__"); 2041 // Fallthrough 2042 case CK_i686: 2043 Builder.defineMacro("__i686"); 2044 Builder.defineMacro("__i686__"); 2045 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 2046 Builder.defineMacro("__pentiumpro"); 2047 Builder.defineMacro("__pentiumpro__"); 2048 break; 2049 case CK_Pentium4: 2050 case CK_Pentium4M: 2051 defineCPUMacros(Builder, "pentium4"); 2052 break; 2053 case CK_Yonah: 2054 case CK_Prescott: 2055 case CK_Nocona: 2056 defineCPUMacros(Builder, "nocona"); 2057 break; 2058 case CK_Core2: 2059 case CK_Penryn: 2060 defineCPUMacros(Builder, "core2"); 2061 break; 2062 case CK_Atom: 2063 defineCPUMacros(Builder, "atom"); 2064 break; 2065 case CK_Corei7: 2066 case CK_Corei7AVX: 2067 case CK_CoreAVXi: 2068 case CK_CoreAVX2: 2069 defineCPUMacros(Builder, "corei7"); 2070 break; 2071 case CK_K6_2: 2072 Builder.defineMacro("__k6_2__"); 2073 Builder.defineMacro("__tune_k6_2__"); 2074 // Fallthrough 2075 case CK_K6_3: 2076 if (CPU != CK_K6_2) { // In case of fallthrough 2077 // FIXME: GCC may be enabling these in cases where some other k6 2078 // architecture is specified but -m3dnow is explicitly provided. The 2079 // exact semantics need to be determined and emulated here. 2080 Builder.defineMacro("__k6_3__"); 2081 Builder.defineMacro("__tune_k6_3__"); 2082 } 2083 // Fallthrough 2084 case CK_K6: 2085 defineCPUMacros(Builder, "k6"); 2086 break; 2087 case CK_Athlon: 2088 case CK_AthlonThunderbird: 2089 case CK_Athlon4: 2090 case CK_AthlonXP: 2091 case CK_AthlonMP: 2092 defineCPUMacros(Builder, "athlon"); 2093 if (SSELevel != NoSSE) { 2094 Builder.defineMacro("__athlon_sse__"); 2095 Builder.defineMacro("__tune_athlon_sse__"); 2096 } 2097 break; 2098 case CK_K8: 2099 case CK_K8SSE3: 2100 case CK_x86_64: 2101 case CK_Opteron: 2102 case CK_OpteronSSE3: 2103 case CK_Athlon64: 2104 case CK_Athlon64SSE3: 2105 case CK_AthlonFX: 2106 defineCPUMacros(Builder, "k8"); 2107 break; 2108 case CK_AMDFAM10: 2109 defineCPUMacros(Builder, "amdfam10"); 2110 break; 2111 case CK_BTVER1: 2112 defineCPUMacros(Builder, "btver1"); 2113 break; 2114 case CK_BDVER1: 2115 defineCPUMacros(Builder, "bdver1"); 2116 break; 2117 case CK_BDVER2: 2118 defineCPUMacros(Builder, "bdver2"); 2119 break; 2120 case CK_Geode: 2121 defineCPUMacros(Builder, "geode"); 2122 break; 2123 } 2124 2125 // Target properties. 2126 Builder.defineMacro("__LITTLE_ENDIAN__"); 2127 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2128 2129 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 2130 // functions in glibc header files that use FP Stack inline asm which the 2131 // backend can't deal with (PR879). 2132 Builder.defineMacro("__NO_MATH_INLINES"); 2133 2134 if (HasAES) 2135 Builder.defineMacro("__AES__"); 2136 2137 if (HasPCLMUL) 2138 Builder.defineMacro("__PCLMUL__"); 2139 2140 if (HasLZCNT) 2141 Builder.defineMacro("__LZCNT__"); 2142 2143 if (HasBMI) 2144 Builder.defineMacro("__BMI__"); 2145 2146 if (HasBMI2) 2147 Builder.defineMacro("__BMI2__"); 2148 2149 if (HasPOPCNT) 2150 Builder.defineMacro("__POPCNT__"); 2151 2152 if (HasSSE4a) 2153 Builder.defineMacro("__SSE4A__"); 2154 2155 if (HasFMA4) 2156 Builder.defineMacro("__FMA4__"); 2157 2158 if (HasFMA) 2159 Builder.defineMacro("__FMA__"); 2160 2161 if (HasXOP) 2162 Builder.defineMacro("__XOP__"); 2163 2164 // Each case falls through to the previous one here. 2165 switch (SSELevel) { 2166 case AVX2: 2167 Builder.defineMacro("__AVX2__"); 2168 case AVX: 2169 Builder.defineMacro("__AVX__"); 2170 case SSE42: 2171 Builder.defineMacro("__SSE4_2__"); 2172 case SSE41: 2173 Builder.defineMacro("__SSE4_1__"); 2174 case SSSE3: 2175 Builder.defineMacro("__SSSE3__"); 2176 case SSE3: 2177 Builder.defineMacro("__SSE3__"); 2178 case SSE2: 2179 Builder.defineMacro("__SSE2__"); 2180 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2181 case SSE1: 2182 Builder.defineMacro("__SSE__"); 2183 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2184 case NoSSE: 2185 break; 2186 } 2187 2188 if (Opts.MicrosoftExt && PointerWidth == 32) { 2189 switch (SSELevel) { 2190 case AVX2: 2191 case AVX: 2192 case SSE42: 2193 case SSE41: 2194 case SSSE3: 2195 case SSE3: 2196 case SSE2: 2197 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2198 break; 2199 case SSE1: 2200 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2201 break; 2202 default: 2203 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2204 } 2205 } 2206 2207 // Each case falls through to the previous one here. 2208 switch (MMX3DNowLevel) { 2209 case AMD3DNowAthlon: 2210 Builder.defineMacro("__3dNOW_A__"); 2211 case AMD3DNow: 2212 Builder.defineMacro("__3dNOW__"); 2213 case MMX: 2214 Builder.defineMacro("__MMX__"); 2215 case NoMMX3DNow: 2216 break; 2217 } 2218 } 2219 2220 bool X86TargetInfo::hasFeature(StringRef Feature) const { 2221 return llvm::StringSwitch<bool>(Feature) 2222 .Case("aes", HasAES) 2223 .Case("avx", SSELevel >= AVX) 2224 .Case("avx2", SSELevel >= AVX2) 2225 .Case("bmi", HasBMI) 2226 .Case("bmi2", HasBMI2) 2227 .Case("fma", HasFMA) 2228 .Case("fma4", HasFMA4) 2229 .Case("lzcnt", HasLZCNT) 2230 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) 2231 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon) 2232 .Case("mmx", MMX3DNowLevel >= MMX) 2233 .Case("pclmul", HasPCLMUL) 2234 .Case("popcnt", HasPOPCNT) 2235 .Case("sse", SSELevel >= SSE1) 2236 .Case("sse2", SSELevel >= SSE2) 2237 .Case("sse3", SSELevel >= SSE3) 2238 .Case("ssse3", SSELevel >= SSSE3) 2239 .Case("sse41", SSELevel >= SSE41) 2240 .Case("sse42", SSELevel >= SSE42) 2241 .Case("sse4a", HasSSE4a) 2242 .Case("x86", true) 2243 .Case("x86_32", PointerWidth == 32) 2244 .Case("x86_64", PointerWidth == 64) 2245 .Case("xop", HasXOP) 2246 .Default(false); 2247 } 2248 2249 bool 2250 X86TargetInfo::validateAsmConstraint(const char *&Name, 2251 TargetInfo::ConstraintInfo &Info) const { 2252 switch (*Name) { 2253 default: return false; 2254 case 'Y': // first letter of a pair: 2255 switch (*(Name+1)) { 2256 default: return false; 2257 case '0': // First SSE register. 2258 case 't': // Any SSE register, when SSE2 is enabled. 2259 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2260 case 'm': // any MMX register, when inter-unit moves enabled. 2261 break; // falls through to setAllowsRegister. 2262 } 2263 case 'a': // eax. 2264 case 'b': // ebx. 2265 case 'c': // ecx. 2266 case 'd': // edx. 2267 case 'S': // esi. 2268 case 'D': // edi. 2269 case 'A': // edx:eax. 2270 case 'f': // any x87 floating point stack register. 2271 case 't': // top of floating point stack. 2272 case 'u': // second from top of floating point stack. 2273 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2274 case 'y': // Any MMX register. 2275 case 'x': // Any SSE register. 2276 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2277 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2278 case 'l': // "Index" registers: any general register that can be used as an 2279 // index in a base+index memory access. 2280 Info.setAllowsRegister(); 2281 return true; 2282 case 'C': // SSE floating point constant. 2283 case 'G': // x87 floating point constant. 2284 case 'e': // 32-bit signed integer constant for use with zero-extending 2285 // x86_64 instructions. 2286 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2287 // x86_64 instructions. 2288 return true; 2289 } 2290 } 2291 2292 2293 std::string 2294 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2295 switch (*Constraint) { 2296 case 'a': return std::string("{ax}"); 2297 case 'b': return std::string("{bx}"); 2298 case 'c': return std::string("{cx}"); 2299 case 'd': return std::string("{dx}"); 2300 case 'S': return std::string("{si}"); 2301 case 'D': return std::string("{di}"); 2302 case 'p': // address 2303 return std::string("im"); 2304 case 't': // top of floating point stack. 2305 return std::string("{st}"); 2306 case 'u': // second from top of floating point stack. 2307 return std::string("{st(1)}"); // second from top of floating point stack. 2308 default: 2309 return std::string(1, *Constraint); 2310 } 2311 } 2312 } // end anonymous namespace 2313 2314 namespace { 2315 // X86-32 generic target 2316 class X86_32TargetInfo : public X86TargetInfo { 2317 public: 2318 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2319 DoubleAlign = LongLongAlign = 32; 2320 LongDoubleWidth = 96; 2321 LongDoubleAlign = 32; 2322 SuitableAlign = 128; 2323 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2324 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2325 "a0:0:64-f80:32:32-n8:16:32-S128"; 2326 SizeType = UnsignedInt; 2327 PtrDiffType = SignedInt; 2328 IntPtrType = SignedInt; 2329 RegParmMax = 3; 2330 2331 // Use fpret for all types. 2332 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2333 (1 << TargetInfo::Double) | 2334 (1 << TargetInfo::LongDouble)); 2335 2336 // x86-32 has atomics up to 8 bytes 2337 // FIXME: Check that we actually have cmpxchg8b before setting 2338 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2339 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2340 } 2341 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2342 return TargetInfo::CharPtrBuiltinVaList; 2343 } 2344 2345 int getEHDataRegisterNumber(unsigned RegNo) const { 2346 if (RegNo == 0) return 0; 2347 if (RegNo == 1) return 2; 2348 return -1; 2349 } 2350 }; 2351 } // end anonymous namespace 2352 2353 namespace { 2354 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2355 public: 2356 NetBSDI386TargetInfo(const std::string &triple) : 2357 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2358 } 2359 2360 virtual unsigned getFloatEvalMethod() const { 2361 // NetBSD defaults to "double" rounding 2362 return 1; 2363 } 2364 }; 2365 } // end anonymous namespace 2366 2367 namespace { 2368 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2369 public: 2370 OpenBSDI386TargetInfo(const std::string& triple) : 2371 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2372 SizeType = UnsignedLong; 2373 IntPtrType = SignedLong; 2374 PtrDiffType = SignedLong; 2375 } 2376 }; 2377 } // end anonymous namespace 2378 2379 namespace { 2380 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2381 public: 2382 DarwinI386TargetInfo(const std::string& triple) : 2383 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2384 LongDoubleWidth = 128; 2385 LongDoubleAlign = 128; 2386 SuitableAlign = 128; 2387 SizeType = UnsignedLong; 2388 IntPtrType = SignedLong; 2389 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2390 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2391 "a0:0:64-f80:128:128-n8:16:32-S128"; 2392 HasAlignMac68kSupport = true; 2393 } 2394 2395 }; 2396 } // end anonymous namespace 2397 2398 namespace { 2399 // x86-32 Windows target 2400 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2401 public: 2402 WindowsX86_32TargetInfo(const std::string& triple) 2403 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2404 TLSSupported = false; 2405 WCharType = UnsignedShort; 2406 DoubleAlign = LongLongAlign = 64; 2407 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2408 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2409 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2410 } 2411 virtual void getTargetDefines(const LangOptions &Opts, 2412 MacroBuilder &Builder) const { 2413 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2414 } 2415 }; 2416 } // end anonymous namespace 2417 2418 namespace { 2419 2420 // x86-32 Windows Visual Studio target 2421 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2422 public: 2423 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2424 : WindowsX86_32TargetInfo(triple) { 2425 LongDoubleWidth = LongDoubleAlign = 64; 2426 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2427 } 2428 virtual void getTargetDefines(const LangOptions &Opts, 2429 MacroBuilder &Builder) const { 2430 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2431 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2432 // The value of the following reflects processor type. 2433 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2434 // We lost the original triple, so we use the default. 2435 Builder.defineMacro("_M_IX86", "600"); 2436 } 2437 }; 2438 } // end anonymous namespace 2439 2440 namespace { 2441 // x86-32 MinGW target 2442 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2443 public: 2444 MinGWX86_32TargetInfo(const std::string& triple) 2445 : WindowsX86_32TargetInfo(triple) { 2446 } 2447 virtual void getTargetDefines(const LangOptions &Opts, 2448 MacroBuilder &Builder) const { 2449 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2450 DefineStd(Builder, "WIN32", Opts); 2451 DefineStd(Builder, "WINNT", Opts); 2452 Builder.defineMacro("_X86_"); 2453 Builder.defineMacro("__MSVCRT__"); 2454 Builder.defineMacro("__MINGW32__"); 2455 2456 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2457 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2458 if (Opts.MicrosoftExt) 2459 // Provide "as-is" __declspec. 2460 Builder.defineMacro("__declspec", "__declspec"); 2461 else 2462 // Provide alias of __attribute__ like mingw32-gcc. 2463 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2464 } 2465 }; 2466 } // end anonymous namespace 2467 2468 namespace { 2469 // x86-32 Cygwin target 2470 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2471 public: 2472 CygwinX86_32TargetInfo(const std::string& triple) 2473 : X86_32TargetInfo(triple) { 2474 TLSSupported = false; 2475 WCharType = UnsignedShort; 2476 DoubleAlign = LongLongAlign = 64; 2477 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2478 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2479 "a0:0:64-f80:32:32-n8:16:32-S32"; 2480 } 2481 virtual void getTargetDefines(const LangOptions &Opts, 2482 MacroBuilder &Builder) const { 2483 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2484 Builder.defineMacro("__CYGWIN__"); 2485 Builder.defineMacro("__CYGWIN32__"); 2486 DefineStd(Builder, "unix", Opts); 2487 if (Opts.CPlusPlus) 2488 Builder.defineMacro("_GNU_SOURCE"); 2489 } 2490 }; 2491 } // end anonymous namespace 2492 2493 namespace { 2494 // x86-32 Haiku target 2495 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2496 public: 2497 HaikuX86_32TargetInfo(const std::string& triple) 2498 : X86_32TargetInfo(triple) { 2499 SizeType = UnsignedLong; 2500 IntPtrType = SignedLong; 2501 PtrDiffType = SignedLong; 2502 this->UserLabelPrefix = ""; 2503 } 2504 virtual void getTargetDefines(const LangOptions &Opts, 2505 MacroBuilder &Builder) const { 2506 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2507 Builder.defineMacro("__INTEL__"); 2508 Builder.defineMacro("__HAIKU__"); 2509 } 2510 }; 2511 } // end anonymous namespace 2512 2513 // RTEMS Target 2514 template<typename Target> 2515 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2516 protected: 2517 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2518 MacroBuilder &Builder) const { 2519 // RTEMS defines; list based off of gcc output 2520 2521 Builder.defineMacro("__rtems__"); 2522 Builder.defineMacro("__ELF__"); 2523 } 2524 public: 2525 RTEMSTargetInfo(const std::string &triple) 2526 : OSTargetInfo<Target>(triple) { 2527 this->UserLabelPrefix = ""; 2528 2529 llvm::Triple Triple(triple); 2530 switch (Triple.getArch()) { 2531 default: 2532 case llvm::Triple::x86: 2533 // this->MCountName = ".mcount"; 2534 break; 2535 case llvm::Triple::mips: 2536 case llvm::Triple::mipsel: 2537 case llvm::Triple::ppc: 2538 case llvm::Triple::ppc64: 2539 // this->MCountName = "_mcount"; 2540 break; 2541 case llvm::Triple::arm: 2542 // this->MCountName = "__mcount"; 2543 break; 2544 } 2545 2546 } 2547 }; 2548 2549 namespace { 2550 // x86-32 RTEMS target 2551 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2552 public: 2553 RTEMSX86_32TargetInfo(const std::string& triple) 2554 : X86_32TargetInfo(triple) { 2555 SizeType = UnsignedLong; 2556 IntPtrType = SignedLong; 2557 PtrDiffType = SignedLong; 2558 this->UserLabelPrefix = ""; 2559 } 2560 virtual void getTargetDefines(const LangOptions &Opts, 2561 MacroBuilder &Builder) const { 2562 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2563 Builder.defineMacro("__INTEL__"); 2564 Builder.defineMacro("__rtems__"); 2565 } 2566 }; 2567 } // end anonymous namespace 2568 2569 namespace { 2570 // x86-64 generic target 2571 class X86_64TargetInfo : public X86TargetInfo { 2572 public: 2573 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2574 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2575 LongDoubleWidth = 128; 2576 LongDoubleAlign = 128; 2577 LargeArrayMinWidth = 128; 2578 LargeArrayAlign = 128; 2579 SuitableAlign = 128; 2580 IntMaxType = SignedLong; 2581 UIntMaxType = UnsignedLong; 2582 Int64Type = SignedLong; 2583 RegParmMax = 6; 2584 2585 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2586 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2587 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2588 2589 // Use fpret only for long double. 2590 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2591 2592 // Use fp2ret for _Complex long double. 2593 ComplexLongDoubleUsesFP2Ret = true; 2594 2595 // x86-64 has atomics up to 16 bytes. 2596 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2597 // on CPUs with cmpxchg16b 2598 MaxAtomicPromoteWidth = 128; 2599 MaxAtomicInlineWidth = 64; 2600 } 2601 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2602 return TargetInfo::X86_64ABIBuiltinVaList; 2603 } 2604 2605 int getEHDataRegisterNumber(unsigned RegNo) const { 2606 if (RegNo == 0) return 0; 2607 if (RegNo == 1) return 1; 2608 return -1; 2609 } 2610 }; 2611 } // end anonymous namespace 2612 2613 namespace { 2614 // x86-64 Windows target 2615 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2616 public: 2617 WindowsX86_64TargetInfo(const std::string& triple) 2618 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2619 TLSSupported = false; 2620 WCharType = UnsignedShort; 2621 LongWidth = LongAlign = 32; 2622 DoubleAlign = LongLongAlign = 64; 2623 IntMaxType = SignedLongLong; 2624 UIntMaxType = UnsignedLongLong; 2625 Int64Type = SignedLongLong; 2626 SizeType = UnsignedLongLong; 2627 PtrDiffType = SignedLongLong; 2628 IntPtrType = SignedLongLong; 2629 this->UserLabelPrefix = ""; 2630 } 2631 virtual void getTargetDefines(const LangOptions &Opts, 2632 MacroBuilder &Builder) const { 2633 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2634 Builder.defineMacro("_WIN64"); 2635 } 2636 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2637 return TargetInfo::CharPtrBuiltinVaList; 2638 } 2639 }; 2640 } // end anonymous namespace 2641 2642 namespace { 2643 // x86-64 Windows Visual Studio target 2644 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2645 public: 2646 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2647 : WindowsX86_64TargetInfo(triple) { 2648 LongDoubleWidth = LongDoubleAlign = 64; 2649 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2650 } 2651 virtual void getTargetDefines(const LangOptions &Opts, 2652 MacroBuilder &Builder) const { 2653 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2654 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2655 Builder.defineMacro("_M_X64"); 2656 Builder.defineMacro("_M_AMD64"); 2657 } 2658 }; 2659 } // end anonymous namespace 2660 2661 namespace { 2662 // x86-64 MinGW target 2663 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2664 public: 2665 MinGWX86_64TargetInfo(const std::string& triple) 2666 : WindowsX86_64TargetInfo(triple) { 2667 } 2668 virtual void getTargetDefines(const LangOptions &Opts, 2669 MacroBuilder &Builder) const { 2670 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2671 DefineStd(Builder, "WIN64", Opts); 2672 Builder.defineMacro("__MSVCRT__"); 2673 Builder.defineMacro("__MINGW32__"); 2674 Builder.defineMacro("__MINGW64__"); 2675 2676 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2677 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2678 if (Opts.MicrosoftExt) 2679 // Provide "as-is" __declspec. 2680 Builder.defineMacro("__declspec", "__declspec"); 2681 else 2682 // Provide alias of __attribute__ like mingw32-gcc. 2683 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2684 } 2685 }; 2686 } // end anonymous namespace 2687 2688 namespace { 2689 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2690 public: 2691 DarwinX86_64TargetInfo(const std::string& triple) 2692 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2693 Int64Type = SignedLongLong; 2694 } 2695 }; 2696 } // end anonymous namespace 2697 2698 namespace { 2699 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2700 public: 2701 OpenBSDX86_64TargetInfo(const std::string& triple) 2702 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2703 IntMaxType = SignedLongLong; 2704 UIntMaxType = UnsignedLongLong; 2705 Int64Type = SignedLongLong; 2706 } 2707 }; 2708 } // end anonymous namespace 2709 2710 namespace { 2711 class ARMTargetInfo : public TargetInfo { 2712 // Possible FPU choices. 2713 enum FPUMode { 2714 NoFPU, 2715 VFP2FPU, 2716 VFP3FPU, 2717 NeonFPU 2718 }; 2719 2720 static bool FPUModeIsVFP(FPUMode Mode) { 2721 return Mode >= VFP2FPU && Mode <= NeonFPU; 2722 } 2723 2724 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2725 static const char * const GCCRegNames[]; 2726 2727 std::string ABI, CPU; 2728 2729 unsigned FPU : 3; 2730 2731 unsigned IsThumb : 1; 2732 2733 // Initialized via features. 2734 unsigned SoftFloat : 1; 2735 unsigned SoftFloatABI : 1; 2736 2737 static const Builtin::Info BuiltinInfo[]; 2738 2739 public: 2740 ARMTargetInfo(const std::string &TripleStr) 2741 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2742 { 2743 BigEndian = false; 2744 SizeType = UnsignedInt; 2745 PtrDiffType = SignedInt; 2746 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2747 WCharType = UnsignedInt; 2748 2749 // {} in inline assembly are neon specifiers, not assembly variant 2750 // specifiers. 2751 NoAsmVariants = true; 2752 2753 // FIXME: Should we just treat this as a feature? 2754 IsThumb = getTriple().getArchName().startswith("thumb"); 2755 if (IsThumb) { 2756 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2757 // so set preferred for small types to 32. 2758 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2759 "i64:64:64-f32:32:32-f64:64:64-" 2760 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2761 } else { 2762 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2763 "i64:64:64-f32:32:32-f64:64:64-" 2764 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2765 } 2766 2767 // ARM targets default to using the ARM C++ ABI. 2768 CXXABI = CXXABI_ARM; 2769 2770 // ARM has atomics up to 8 bytes 2771 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2772 MaxAtomicPromoteWidth = 64; 2773 2774 // Do force alignment of members that follow zero length bitfields. If 2775 // the alignment of the zero-length bitfield is greater than the member 2776 // that follows it, `bar', `bar' will be aligned as the type of the 2777 // zero length bitfield. 2778 UseZeroLengthBitfieldAlignment = true; 2779 } 2780 virtual const char *getABI() const { return ABI.c_str(); } 2781 virtual bool setABI(const std::string &Name) { 2782 ABI = Name; 2783 2784 // The defaults (above) are for AAPCS, check if we need to change them. 2785 // 2786 // FIXME: We need support for -meabi... we could just mangle it into the 2787 // name. 2788 if (Name == "apcs-gnu") { 2789 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2790 SizeType = UnsignedLong; 2791 2792 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2793 WCharType = SignedInt; 2794 2795 // Do not respect the alignment of bit-field types when laying out 2796 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2797 UseBitFieldTypeAlignment = false; 2798 2799 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2800 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2801 /// gcc. 2802 ZeroLengthBitfieldBoundary = 32; 2803 2804 if (IsThumb) { 2805 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2806 // so set preferred for small types to 32. 2807 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2808 "i64:32:64-f32:32:32-f64:32:64-" 2809 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2810 } else { 2811 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2812 "i64:32:64-f32:32:32-f64:32:64-" 2813 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2814 } 2815 2816 // FIXME: Override "preferred align" for double and long long. 2817 } else if (Name == "aapcs") { 2818 // FIXME: Enumerated types are variable width in straight AAPCS. 2819 } else if (Name == "aapcs-linux") { 2820 ; 2821 } else 2822 return false; 2823 2824 return true; 2825 } 2826 2827 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2828 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2829 Features["vfp2"] = true; 2830 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2831 Features["neon"] = true; 2832 } 2833 2834 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2835 StringRef Name, 2836 bool Enabled) const { 2837 if (Name == "soft-float" || Name == "soft-float-abi" || 2838 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" || 2839 Name == "neonfp") { 2840 Features[Name] = Enabled; 2841 } else 2842 return false; 2843 2844 return true; 2845 } 2846 2847 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2848 FPU = NoFPU; 2849 SoftFloat = SoftFloatABI = false; 2850 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2851 if (Features[i] == "+soft-float") 2852 SoftFloat = true; 2853 else if (Features[i] == "+soft-float-abi") 2854 SoftFloatABI = true; 2855 else if (Features[i] == "+vfp2") 2856 FPU = VFP2FPU; 2857 else if (Features[i] == "+vfp3") 2858 FPU = VFP3FPU; 2859 else if (Features[i] == "+neon") 2860 FPU = NeonFPU; 2861 } 2862 2863 // Remove front-end specific options which the backend handles differently. 2864 std::vector<std::string>::iterator it; 2865 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2866 if (it != Features.end()) 2867 Features.erase(it); 2868 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2869 if (it != Features.end()) 2870 Features.erase(it); 2871 } 2872 2873 virtual bool hasFeature(StringRef Feature) const { 2874 return llvm::StringSwitch<bool>(Feature) 2875 .Case("arm", true) 2876 .Case("softfloat", SoftFloat) 2877 .Case("thumb", IsThumb) 2878 .Case("neon", FPU == NeonFPU && !SoftFloat && 2879 StringRef(getCPUDefineSuffix(CPU)).startswith("7")) 2880 .Default(false); 2881 } 2882 static const char *getCPUDefineSuffix(StringRef Name) { 2883 return llvm::StringSwitch<const char*>(Name) 2884 .Cases("arm8", "arm810", "4") 2885 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2886 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2887 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2888 .Case("ep9312", "4T") 2889 .Cases("arm10tdmi", "arm1020t", "5T") 2890 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2891 .Case("arm926ej-s", "5TEJ") 2892 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2893 .Cases("xscale", "iwmmxt", "5TE") 2894 .Case("arm1136j-s", "6J") 2895 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2896 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2897 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2898 .Cases("cortex-a8", "cortex-a9", "7A") 2899 .Case("cortex-m3", "7M") 2900 .Case("cortex-m4", "7M") 2901 .Case("cortex-m0", "6M") 2902 .Default(0); 2903 } 2904 virtual bool setCPU(const std::string &Name) { 2905 if (!getCPUDefineSuffix(Name)) 2906 return false; 2907 2908 CPU = Name; 2909 return true; 2910 } 2911 virtual void getTargetDefines(const LangOptions &Opts, 2912 MacroBuilder &Builder) const { 2913 // Target identification. 2914 Builder.defineMacro("__arm"); 2915 Builder.defineMacro("__arm__"); 2916 2917 // Target properties. 2918 Builder.defineMacro("__ARMEL__"); 2919 Builder.defineMacro("__LITTLE_ENDIAN__"); 2920 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2921 2922 StringRef CPUArch = getCPUDefineSuffix(CPU); 2923 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2924 2925 // Subtarget options. 2926 2927 // FIXME: It's more complicated than this and we don't really support 2928 // interworking. 2929 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2930 Builder.defineMacro("__THUMB_INTERWORK__"); 2931 2932 if (ABI == "aapcs" || ABI == "aapcs-linux") 2933 Builder.defineMacro("__ARM_EABI__"); 2934 2935 if (SoftFloat) 2936 Builder.defineMacro("__SOFTFP__"); 2937 2938 if (CPU == "xscale") 2939 Builder.defineMacro("__XSCALE__"); 2940 2941 bool IsARMv7 = CPUArch.startswith("7"); 2942 if (IsThumb) { 2943 Builder.defineMacro("__THUMBEL__"); 2944 Builder.defineMacro("__thumb__"); 2945 if (CPUArch == "6T2" || IsARMv7) 2946 Builder.defineMacro("__thumb2__"); 2947 } 2948 2949 // Note, this is always on in gcc, even though it doesn't make sense. 2950 Builder.defineMacro("__APCS_32__"); 2951 2952 if (FPUModeIsVFP((FPUMode) FPU)) 2953 Builder.defineMacro("__VFP_FP__"); 2954 2955 // This only gets set when Neon instructions are actually available, unlike 2956 // the VFP define, hence the soft float and arch check. This is subtly 2957 // different from gcc, we follow the intent which was that it should be set 2958 // when Neon instructions are actually available. 2959 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2960 Builder.defineMacro("__ARM_NEON__"); 2961 } 2962 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2963 unsigned &NumRecords) const { 2964 Records = BuiltinInfo; 2965 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2966 } 2967 virtual bool isCLZForZeroUndef() const { return false; } 2968 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2969 return TargetInfo::VoidPtrBuiltinVaList; 2970 } 2971 virtual void getGCCRegNames(const char * const *&Names, 2972 unsigned &NumNames) const; 2973 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2974 unsigned &NumAliases) const; 2975 virtual bool validateAsmConstraint(const char *&Name, 2976 TargetInfo::ConstraintInfo &Info) const { 2977 // FIXME: Check if this is complete 2978 switch (*Name) { 2979 default: 2980 case 'l': // r0-r7 2981 case 'h': // r8-r15 2982 case 'w': // VFP Floating point register single precision 2983 case 'P': // VFP Floating point register double precision 2984 Info.setAllowsRegister(); 2985 return true; 2986 case 'Q': // A memory address that is a single base register. 2987 Info.setAllowsMemory(); 2988 return true; 2989 case 'U': // a memory reference... 2990 switch (Name[1]) { 2991 case 'q': // ...ARMV4 ldrsb 2992 case 'v': // ...VFP load/store (reg+constant offset) 2993 case 'y': // ...iWMMXt load/store 2994 case 't': // address valid for load/store opaque types wider 2995 // than 128-bits 2996 case 'n': // valid address for Neon doubleword vector load/store 2997 case 'm': // valid address for Neon element and structure load/store 2998 case 's': // valid address for non-offset loads/stores of quad-word 2999 // values in four ARM registers 3000 Info.setAllowsMemory(); 3001 Name++; 3002 return true; 3003 } 3004 } 3005 return false; 3006 } 3007 virtual std::string convertConstraint(const char *&Constraint) const { 3008 std::string R; 3009 switch (*Constraint) { 3010 case 'U': // Two-character constraint; add "^" hint for later parsing. 3011 R = std::string("^") + std::string(Constraint, 2); 3012 Constraint++; 3013 break; 3014 case 'p': // 'p' should be translated to 'r' by default. 3015 R = std::string("r"); 3016 break; 3017 default: 3018 return std::string(1, *Constraint); 3019 } 3020 return R; 3021 } 3022 virtual const char *getClobbers() const { 3023 // FIXME: Is this really right? 3024 return ""; 3025 } 3026 }; 3027 3028 const char * const ARMTargetInfo::GCCRegNames[] = { 3029 // Integer registers 3030 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3031 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 3032 3033 // Float registers 3034 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 3035 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 3036 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 3037 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 3038 3039 // Double registers 3040 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 3041 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 3042 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 3043 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 3044 3045 // Quad registers 3046 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 3047 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 3048 }; 3049 3050 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 3051 unsigned &NumNames) const { 3052 Names = GCCRegNames; 3053 NumNames = llvm::array_lengthof(GCCRegNames); 3054 } 3055 3056 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 3057 { { "a1" }, "r0" }, 3058 { { "a2" }, "r1" }, 3059 { { "a3" }, "r2" }, 3060 { { "a4" }, "r3" }, 3061 { { "v1" }, "r4" }, 3062 { { "v2" }, "r5" }, 3063 { { "v3" }, "r6" }, 3064 { { "v4" }, "r7" }, 3065 { { "v5" }, "r8" }, 3066 { { "v6", "rfp" }, "r9" }, 3067 { { "sl" }, "r10" }, 3068 { { "fp" }, "r11" }, 3069 { { "ip" }, "r12" }, 3070 { { "r13" }, "sp" }, 3071 { { "r14" }, "lr" }, 3072 { { "r15" }, "pc" }, 3073 // The S, D and Q registers overlap, but aren't really aliases; we 3074 // don't want to substitute one of these for a different-sized one. 3075 }; 3076 3077 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3078 unsigned &NumAliases) const { 3079 Aliases = GCCRegAliases; 3080 NumAliases = llvm::array_lengthof(GCCRegAliases); 3081 } 3082 3083 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 3084 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3085 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3086 ALL_LANGUAGES }, 3087 #include "clang/Basic/BuiltinsARM.def" 3088 }; 3089 } // end anonymous namespace. 3090 3091 namespace { 3092 class DarwinARMTargetInfo : 3093 public DarwinTargetInfo<ARMTargetInfo> { 3094 protected: 3095 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 3096 MacroBuilder &Builder) const { 3097 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 3098 } 3099 3100 public: 3101 DarwinARMTargetInfo(const std::string& triple) 3102 : DarwinTargetInfo<ARMTargetInfo>(triple) { 3103 HasAlignMac68kSupport = true; 3104 // iOS always has 64-bit atomic instructions. 3105 // FIXME: This should be based off of the target features in ARMTargetInfo. 3106 MaxAtomicInlineWidth = 64; 3107 } 3108 }; 3109 } // end anonymous namespace. 3110 3111 3112 namespace { 3113 // Hexagon abstract base class 3114 class HexagonTargetInfo : public TargetInfo { 3115 static const Builtin::Info BuiltinInfo[]; 3116 static const char * const GCCRegNames[]; 3117 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3118 std::string CPU; 3119 public: 3120 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 3121 BigEndian = false; 3122 DescriptionString = ("e-p:32:32:32-" 3123 "i64:64:64-i32:32:32-i16:16:16-i1:32:32" 3124 "f64:64:64-f32:32:32-a0:0-n32"); 3125 3126 // {} in inline assembly are packet specifiers, not assembly variant 3127 // specifiers. 3128 NoAsmVariants = true; 3129 } 3130 3131 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3132 unsigned &NumRecords) const { 3133 Records = BuiltinInfo; 3134 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 3135 } 3136 3137 virtual bool validateAsmConstraint(const char *&Name, 3138 TargetInfo::ConstraintInfo &Info) const { 3139 return true; 3140 } 3141 3142 virtual void getTargetDefines(const LangOptions &Opts, 3143 MacroBuilder &Builder) const; 3144 3145 virtual bool hasFeature(StringRef Feature) const { 3146 return Feature == "hexagon"; 3147 } 3148 3149 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3150 return TargetInfo::CharPtrBuiltinVaList; 3151 } 3152 virtual void getGCCRegNames(const char * const *&Names, 3153 unsigned &NumNames) const; 3154 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3155 unsigned &NumAliases) const; 3156 virtual const char *getClobbers() const { 3157 return ""; 3158 } 3159 3160 static const char *getHexagonCPUSuffix(StringRef Name) { 3161 return llvm::StringSwitch<const char*>(Name) 3162 .Case("hexagonv2", "2") 3163 .Case("hexagonv3", "3") 3164 .Case("hexagonv4", "4") 3165 .Case("hexagonv5", "5") 3166 .Default(0); 3167 } 3168 3169 virtual bool setCPU(const std::string &Name) { 3170 if (!getHexagonCPUSuffix(Name)) 3171 return false; 3172 3173 CPU = Name; 3174 return true; 3175 } 3176 }; 3177 3178 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 3179 MacroBuilder &Builder) const { 3180 Builder.defineMacro("qdsp6"); 3181 Builder.defineMacro("__qdsp6", "1"); 3182 Builder.defineMacro("__qdsp6__", "1"); 3183 3184 Builder.defineMacro("hexagon"); 3185 Builder.defineMacro("__hexagon", "1"); 3186 Builder.defineMacro("__hexagon__", "1"); 3187 3188 if(CPU == "hexagonv1") { 3189 Builder.defineMacro("__HEXAGON_V1__"); 3190 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3191 if(Opts.HexagonQdsp6Compat) { 3192 Builder.defineMacro("__QDSP6_V1__"); 3193 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3194 } 3195 } 3196 else if(CPU == "hexagonv2") { 3197 Builder.defineMacro("__HEXAGON_V2__"); 3198 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3199 if(Opts.HexagonQdsp6Compat) { 3200 Builder.defineMacro("__QDSP6_V2__"); 3201 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3202 } 3203 } 3204 else if(CPU == "hexagonv3") { 3205 Builder.defineMacro("__HEXAGON_V3__"); 3206 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3207 if(Opts.HexagonQdsp6Compat) { 3208 Builder.defineMacro("__QDSP6_V3__"); 3209 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3210 } 3211 } 3212 else if(CPU == "hexagonv4") { 3213 Builder.defineMacro("__HEXAGON_V4__"); 3214 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3215 if(Opts.HexagonQdsp6Compat) { 3216 Builder.defineMacro("__QDSP6_V4__"); 3217 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3218 } 3219 } 3220 else if(CPU == "hexagonv5") { 3221 Builder.defineMacro("__HEXAGON_V5__"); 3222 Builder.defineMacro("__HEXAGON_ARCH__", "5"); 3223 if(Opts.HexagonQdsp6Compat) { 3224 Builder.defineMacro("__QDSP6_V5__"); 3225 Builder.defineMacro("__QDSP6_ARCH__", "5"); 3226 } 3227 } 3228 } 3229 3230 const char * const HexagonTargetInfo::GCCRegNames[] = { 3231 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3232 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3233 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3234 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3235 "p0", "p1", "p2", "p3", 3236 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3237 }; 3238 3239 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3240 unsigned &NumNames) const { 3241 Names = GCCRegNames; 3242 NumNames = llvm::array_lengthof(GCCRegNames); 3243 } 3244 3245 3246 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3247 { { "sp" }, "r29" }, 3248 { { "fp" }, "r30" }, 3249 { { "lr" }, "r31" }, 3250 }; 3251 3252 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3253 unsigned &NumAliases) const { 3254 Aliases = GCCRegAliases; 3255 NumAliases = llvm::array_lengthof(GCCRegAliases); 3256 } 3257 3258 3259 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3260 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3261 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3262 ALL_LANGUAGES }, 3263 #include "clang/Basic/BuiltinsHexagon.def" 3264 }; 3265 } 3266 3267 3268 namespace { 3269 class SparcV8TargetInfo : public TargetInfo { 3270 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3271 static const char * const GCCRegNames[]; 3272 bool SoftFloat; 3273 public: 3274 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3275 // FIXME: Support Sparc quad-precision long double? 3276 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3277 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3278 } 3279 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3280 StringRef Name, 3281 bool Enabled) const { 3282 if (Name == "soft-float") 3283 Features[Name] = Enabled; 3284 else 3285 return false; 3286 3287 return true; 3288 } 3289 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3290 SoftFloat = false; 3291 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3292 if (Features[i] == "+soft-float") 3293 SoftFloat = true; 3294 } 3295 virtual void getTargetDefines(const LangOptions &Opts, 3296 MacroBuilder &Builder) const { 3297 DefineStd(Builder, "sparc", Opts); 3298 Builder.defineMacro("__sparcv8"); 3299 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3300 3301 if (SoftFloat) 3302 Builder.defineMacro("SOFT_FLOAT", "1"); 3303 } 3304 3305 virtual bool hasFeature(StringRef Feature) const { 3306 return llvm::StringSwitch<bool>(Feature) 3307 .Case("softfloat", SoftFloat) 3308 .Case("sparc", true) 3309 .Default(false); 3310 } 3311 3312 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3313 unsigned &NumRecords) const { 3314 // FIXME: Implement! 3315 } 3316 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3317 return TargetInfo::VoidPtrBuiltinVaList; 3318 } 3319 virtual void getGCCRegNames(const char * const *&Names, 3320 unsigned &NumNames) const; 3321 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3322 unsigned &NumAliases) const; 3323 virtual bool validateAsmConstraint(const char *&Name, 3324 TargetInfo::ConstraintInfo &info) const { 3325 // FIXME: Implement! 3326 return false; 3327 } 3328 virtual const char *getClobbers() const { 3329 // FIXME: Implement! 3330 return ""; 3331 } 3332 }; 3333 3334 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3335 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3336 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3337 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3338 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3339 }; 3340 3341 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3342 unsigned &NumNames) const { 3343 Names = GCCRegNames; 3344 NumNames = llvm::array_lengthof(GCCRegNames); 3345 } 3346 3347 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3348 { { "g0" }, "r0" }, 3349 { { "g1" }, "r1" }, 3350 { { "g2" }, "r2" }, 3351 { { "g3" }, "r3" }, 3352 { { "g4" }, "r4" }, 3353 { { "g5" }, "r5" }, 3354 { { "g6" }, "r6" }, 3355 { { "g7" }, "r7" }, 3356 { { "o0" }, "r8" }, 3357 { { "o1" }, "r9" }, 3358 { { "o2" }, "r10" }, 3359 { { "o3" }, "r11" }, 3360 { { "o4" }, "r12" }, 3361 { { "o5" }, "r13" }, 3362 { { "o6", "sp" }, "r14" }, 3363 { { "o7" }, "r15" }, 3364 { { "l0" }, "r16" }, 3365 { { "l1" }, "r17" }, 3366 { { "l2" }, "r18" }, 3367 { { "l3" }, "r19" }, 3368 { { "l4" }, "r20" }, 3369 { { "l5" }, "r21" }, 3370 { { "l6" }, "r22" }, 3371 { { "l7" }, "r23" }, 3372 { { "i0" }, "r24" }, 3373 { { "i1" }, "r25" }, 3374 { { "i2" }, "r26" }, 3375 { { "i3" }, "r27" }, 3376 { { "i4" }, "r28" }, 3377 { { "i5" }, "r29" }, 3378 { { "i6", "fp" }, "r30" }, 3379 { { "i7" }, "r31" }, 3380 }; 3381 3382 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3383 unsigned &NumAliases) const { 3384 Aliases = GCCRegAliases; 3385 NumAliases = llvm::array_lengthof(GCCRegAliases); 3386 } 3387 } // end anonymous namespace. 3388 3389 namespace { 3390 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3391 public: 3392 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3393 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3394 SizeType = UnsignedInt; 3395 PtrDiffType = SignedInt; 3396 } 3397 }; 3398 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3399 public: 3400 SolarisSparcV8TargetInfo(const std::string& triple) : 3401 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3402 SizeType = UnsignedInt; 3403 PtrDiffType = SignedInt; 3404 } 3405 }; 3406 } // end anonymous namespace. 3407 3408 namespace { 3409 class MSP430TargetInfo : public TargetInfo { 3410 static const char * const GCCRegNames[]; 3411 public: 3412 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3413 BigEndian = false; 3414 TLSSupported = false; 3415 IntWidth = 16; IntAlign = 16; 3416 LongWidth = 32; LongLongWidth = 64; 3417 LongAlign = LongLongAlign = 16; 3418 PointerWidth = 16; PointerAlign = 16; 3419 SuitableAlign = 16; 3420 SizeType = UnsignedInt; 3421 IntMaxType = SignedLong; 3422 UIntMaxType = UnsignedLong; 3423 IntPtrType = SignedShort; 3424 PtrDiffType = SignedInt; 3425 SigAtomicType = SignedLong; 3426 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3427 } 3428 virtual void getTargetDefines(const LangOptions &Opts, 3429 MacroBuilder &Builder) const { 3430 Builder.defineMacro("MSP430"); 3431 Builder.defineMacro("__MSP430__"); 3432 // FIXME: defines for different 'flavours' of MCU 3433 } 3434 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3435 unsigned &NumRecords) const { 3436 // FIXME: Implement. 3437 Records = 0; 3438 NumRecords = 0; 3439 } 3440 virtual bool hasFeature(StringRef Feature) const { 3441 return Feature == "msp430"; 3442 } 3443 virtual void getGCCRegNames(const char * const *&Names, 3444 unsigned &NumNames) const; 3445 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3446 unsigned &NumAliases) const { 3447 // No aliases. 3448 Aliases = 0; 3449 NumAliases = 0; 3450 } 3451 virtual bool validateAsmConstraint(const char *&Name, 3452 TargetInfo::ConstraintInfo &info) const { 3453 // No target constraints for now. 3454 return false; 3455 } 3456 virtual const char *getClobbers() const { 3457 // FIXME: Is this really right? 3458 return ""; 3459 } 3460 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3461 // FIXME: implement 3462 return TargetInfo::CharPtrBuiltinVaList; 3463 } 3464 }; 3465 3466 const char * const MSP430TargetInfo::GCCRegNames[] = { 3467 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3468 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3469 }; 3470 3471 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3472 unsigned &NumNames) const { 3473 Names = GCCRegNames; 3474 NumNames = llvm::array_lengthof(GCCRegNames); 3475 } 3476 } 3477 3478 namespace { 3479 3480 // LLVM and Clang cannot be used directly to output native binaries for 3481 // target, but is used to compile C code to llvm bitcode with correct 3482 // type and alignment information. 3483 // 3484 // TCE uses the llvm bitcode as input and uses it for generating customized 3485 // target processor and program binary. TCE co-design environment is 3486 // publicly available in http://tce.cs.tut.fi 3487 3488 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3489 3, // opencl_global 3490 4, // opencl_local 3491 5, // opencl_constant 3492 0, // cuda_device 3493 0, // cuda_constant 3494 0 // cuda_shared 3495 }; 3496 3497 class TCETargetInfo : public TargetInfo{ 3498 public: 3499 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3500 TLSSupported = false; 3501 IntWidth = 32; 3502 LongWidth = LongLongWidth = 32; 3503 PointerWidth = 32; 3504 IntAlign = 32; 3505 LongAlign = LongLongAlign = 32; 3506 PointerAlign = 32; 3507 SuitableAlign = 32; 3508 SizeType = UnsignedInt; 3509 IntMaxType = SignedLong; 3510 UIntMaxType = UnsignedLong; 3511 IntPtrType = SignedInt; 3512 PtrDiffType = SignedInt; 3513 FloatWidth = 32; 3514 FloatAlign = 32; 3515 DoubleWidth = 32; 3516 DoubleAlign = 32; 3517 LongDoubleWidth = 32; 3518 LongDoubleAlign = 32; 3519 FloatFormat = &llvm::APFloat::IEEEsingle; 3520 DoubleFormat = &llvm::APFloat::IEEEsingle; 3521 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3522 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3523 "i16:16:32-i32:32:32-i64:32:32-" 3524 "f32:32:32-f64:32:32-v64:32:32-" 3525 "v128:32:32-a0:0:32-n32"; 3526 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3527 } 3528 3529 virtual void getTargetDefines(const LangOptions &Opts, 3530 MacroBuilder &Builder) const { 3531 DefineStd(Builder, "tce", Opts); 3532 Builder.defineMacro("__TCE__"); 3533 Builder.defineMacro("__TCE_V1__"); 3534 } 3535 virtual bool hasFeature(StringRef Feature) const { 3536 return Feature == "tce"; 3537 } 3538 3539 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3540 unsigned &NumRecords) const {} 3541 virtual const char *getClobbers() const { 3542 return ""; 3543 } 3544 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3545 return TargetInfo::VoidPtrBuiltinVaList; 3546 } 3547 virtual void getGCCRegNames(const char * const *&Names, 3548 unsigned &NumNames) const {} 3549 virtual bool validateAsmConstraint(const char *&Name, 3550 TargetInfo::ConstraintInfo &info) const { 3551 return true; 3552 } 3553 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3554 unsigned &NumAliases) const {} 3555 }; 3556 } 3557 3558 namespace { 3559 class MipsTargetInfoBase : public TargetInfo { 3560 static const Builtin::Info BuiltinInfo[]; 3561 std::string CPU; 3562 bool SoftFloat; 3563 bool SingleFloat; 3564 3565 protected: 3566 std::string ABI; 3567 3568 public: 3569 MipsTargetInfoBase(const std::string& triple, 3570 const std::string& ABIStr, 3571 const std::string& CPUStr) 3572 : TargetInfo(triple), 3573 CPU(CPUStr), 3574 SoftFloat(false), SingleFloat(false), 3575 ABI(ABIStr) 3576 {} 3577 3578 virtual const char *getABI() const { return ABI.c_str(); } 3579 virtual bool setABI(const std::string &Name) = 0; 3580 virtual bool setCPU(const std::string &Name) { 3581 CPU = Name; 3582 return true; 3583 } 3584 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3585 Features[ABI] = true; 3586 Features[CPU] = true; 3587 } 3588 3589 virtual void getArchDefines(const LangOptions &Opts, 3590 MacroBuilder &Builder) const { 3591 if (SoftFloat && SingleFloat) 3592 llvm_unreachable("Invalid float ABI for Mips."); 3593 else if (SoftFloat) 3594 Builder.defineMacro("__mips_soft_float", Twine(1)); 3595 else { 3596 Builder.defineMacro("__mips_hard_float", Twine(1)); 3597 if (SingleFloat) 3598 Builder.defineMacro("__mips_single_float", Twine(1)); 3599 } 3600 3601 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3602 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3603 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3604 } 3605 3606 virtual void getTargetDefines(const LangOptions &Opts, 3607 MacroBuilder &Builder) const = 0; 3608 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3609 unsigned &NumRecords) const { 3610 Records = BuiltinInfo; 3611 NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin; 3612 } 3613 virtual bool hasFeature(StringRef Feature) const { 3614 return Feature == "mips"; 3615 } 3616 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3617 return TargetInfo::VoidPtrBuiltinVaList; 3618 } 3619 virtual void getGCCRegNames(const char * const *&Names, 3620 unsigned &NumNames) const { 3621 static const char * const GCCRegNames[] = { 3622 // CPU register names 3623 // Must match second column of GCCRegAliases 3624 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3625 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3626 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3627 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", 3628 // Floating point register names 3629 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3630 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3631 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3632 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3633 // Hi/lo and condition register names 3634 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3635 "$fcc5","$fcc6","$fcc7" 3636 }; 3637 Names = GCCRegNames; 3638 NumNames = llvm::array_lengthof(GCCRegNames); 3639 } 3640 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3641 unsigned &NumAliases) const = 0; 3642 virtual bool validateAsmConstraint(const char *&Name, 3643 TargetInfo::ConstraintInfo &Info) const { 3644 switch (*Name) { 3645 default: 3646 return false; 3647 3648 case 'r': // CPU registers. 3649 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3650 case 'y': // Equivalent to "r", backwards compatibility only. 3651 case 'f': // floating-point registers. 3652 case 'c': // $25 for indirect jumps 3653 case 'l': // lo register 3654 case 'x': // hilo register pair 3655 Info.setAllowsRegister(); 3656 return true; 3657 } 3658 } 3659 3660 virtual const char *getClobbers() const { 3661 // FIXME: Implement! 3662 return ""; 3663 } 3664 3665 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3666 StringRef Name, 3667 bool Enabled) const { 3668 if (Name == "soft-float" || Name == "single-float" || 3669 Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" || 3670 Name == "mips32" || Name == "mips32r2" || 3671 Name == "mips64" || Name == "mips64r2") { 3672 Features[Name] = Enabled; 3673 return true; 3674 } 3675 return false; 3676 } 3677 3678 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3679 SoftFloat = false; 3680 SingleFloat = false; 3681 3682 for (std::vector<std::string>::iterator it = Features.begin(), 3683 ie = Features.end(); it != ie; ++it) { 3684 if (*it == "+single-float") { 3685 SingleFloat = true; 3686 break; 3687 } 3688 3689 if (*it == "+soft-float") { 3690 SoftFloat = true; 3691 // This option is front-end specific. 3692 // Do not need to pass it to the backend. 3693 Features.erase(it); 3694 break; 3695 } 3696 } 3697 } 3698 }; 3699 3700 const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = { 3701 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3702 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3703 ALL_LANGUAGES }, 3704 #include "clang/Basic/BuiltinsMips.def" 3705 }; 3706 3707 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3708 public: 3709 Mips32TargetInfoBase(const std::string& triple) : 3710 MipsTargetInfoBase(triple, "o32", "mips32") { 3711 SizeType = UnsignedInt; 3712 PtrDiffType = SignedInt; 3713 } 3714 virtual bool setABI(const std::string &Name) { 3715 if ((Name == "o32") || (Name == "eabi")) { 3716 ABI = Name; 3717 return true; 3718 } else 3719 return false; 3720 } 3721 virtual void getArchDefines(const LangOptions &Opts, 3722 MacroBuilder &Builder) const { 3723 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3724 3725 if (ABI == "o32") { 3726 Builder.defineMacro("__mips_o32"); 3727 Builder.defineMacro("_ABIO32", "1"); 3728 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3729 } 3730 else if (ABI == "eabi") 3731 Builder.defineMacro("__mips_eabi"); 3732 else 3733 llvm_unreachable("Invalid ABI for Mips32."); 3734 } 3735 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3736 unsigned &NumAliases) const { 3737 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3738 { { "at" }, "$1" }, 3739 { { "v0" }, "$2" }, 3740 { { "v1" }, "$3" }, 3741 { { "a0" }, "$4" }, 3742 { { "a1" }, "$5" }, 3743 { { "a2" }, "$6" }, 3744 { { "a3" }, "$7" }, 3745 { { "t0" }, "$8" }, 3746 { { "t1" }, "$9" }, 3747 { { "t2" }, "$10" }, 3748 { { "t3" }, "$11" }, 3749 { { "t4" }, "$12" }, 3750 { { "t5" }, "$13" }, 3751 { { "t6" }, "$14" }, 3752 { { "t7" }, "$15" }, 3753 { { "s0" }, "$16" }, 3754 { { "s1" }, "$17" }, 3755 { { "s2" }, "$18" }, 3756 { { "s3" }, "$19" }, 3757 { { "s4" }, "$20" }, 3758 { { "s5" }, "$21" }, 3759 { { "s6" }, "$22" }, 3760 { { "s7" }, "$23" }, 3761 { { "t8" }, "$24" }, 3762 { { "t9" }, "$25" }, 3763 { { "k0" }, "$26" }, 3764 { { "k1" }, "$27" }, 3765 { { "gp" }, "$28" }, 3766 { { "sp","$sp" }, "$29" }, 3767 { { "fp","$fp" }, "$30" }, 3768 { { "ra" }, "$31" } 3769 }; 3770 Aliases = GCCRegAliases; 3771 NumAliases = llvm::array_lengthof(GCCRegAliases); 3772 } 3773 }; 3774 3775 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3776 public: 3777 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3778 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3779 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3780 } 3781 virtual void getTargetDefines(const LangOptions &Opts, 3782 MacroBuilder &Builder) const { 3783 DefineStd(Builder, "mips", Opts); 3784 Builder.defineMacro("_mips"); 3785 DefineStd(Builder, "MIPSEB", Opts); 3786 Builder.defineMacro("_MIPSEB"); 3787 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3788 getArchDefines(Opts, Builder); 3789 } 3790 }; 3791 3792 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3793 public: 3794 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3795 BigEndian = false; 3796 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3797 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3798 } 3799 virtual void getTargetDefines(const LangOptions &Opts, 3800 MacroBuilder &Builder) const { 3801 DefineStd(Builder, "mips", Opts); 3802 Builder.defineMacro("_mips"); 3803 DefineStd(Builder, "MIPSEL", Opts); 3804 Builder.defineMacro("_MIPSEL"); 3805 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3806 getArchDefines(Opts, Builder); 3807 } 3808 }; 3809 3810 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3811 virtual void SetDescriptionString(const std::string &Name) = 0; 3812 public: 3813 Mips64TargetInfoBase(const std::string& triple) : 3814 MipsTargetInfoBase(triple, "n64", "mips64") { 3815 LongWidth = LongAlign = 64; 3816 PointerWidth = PointerAlign = 64; 3817 LongDoubleWidth = LongDoubleAlign = 128; 3818 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3819 SuitableAlign = 128; 3820 } 3821 virtual bool setABI(const std::string &Name) { 3822 SetDescriptionString(Name); 3823 3824 if (Name != "n32" && Name != "n64") 3825 return false; 3826 3827 ABI = Name; 3828 3829 if (Name == "n32") { 3830 LongWidth = LongAlign = 32; 3831 PointerWidth = PointerAlign = 32; 3832 } 3833 3834 return true; 3835 } 3836 virtual void getArchDefines(const LangOptions &Opts, 3837 MacroBuilder &Builder) const { 3838 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3839 3840 if (ABI == "n32") { 3841 Builder.defineMacro("__mips_n32"); 3842 Builder.defineMacro("_ABIN32", "2"); 3843 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3844 } 3845 else if (ABI == "n64") { 3846 Builder.defineMacro("__mips_n64"); 3847 Builder.defineMacro("_ABI64", "3"); 3848 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3849 } 3850 else 3851 llvm_unreachable("Invalid ABI for Mips64."); 3852 } 3853 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3854 unsigned &NumAliases) const { 3855 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3856 { { "at" }, "$1" }, 3857 { { "v0" }, "$2" }, 3858 { { "v1" }, "$3" }, 3859 { { "a0" }, "$4" }, 3860 { { "a1" }, "$5" }, 3861 { { "a2" }, "$6" }, 3862 { { "a3" }, "$7" }, 3863 { { "a4" }, "$8" }, 3864 { { "a5" }, "$9" }, 3865 { { "a6" }, "$10" }, 3866 { { "a7" }, "$11" }, 3867 { { "t0" }, "$12" }, 3868 { { "t1" }, "$13" }, 3869 { { "t2" }, "$14" }, 3870 { { "t3" }, "$15" }, 3871 { { "s0" }, "$16" }, 3872 { { "s1" }, "$17" }, 3873 { { "s2" }, "$18" }, 3874 { { "s3" }, "$19" }, 3875 { { "s4" }, "$20" }, 3876 { { "s5" }, "$21" }, 3877 { { "s6" }, "$22" }, 3878 { { "s7" }, "$23" }, 3879 { { "t8" }, "$24" }, 3880 { { "t9" }, "$25" }, 3881 { { "k0" }, "$26" }, 3882 { { "k1" }, "$27" }, 3883 { { "gp" }, "$28" }, 3884 { { "sp","$sp" }, "$29" }, 3885 { { "fp","$fp" }, "$30" }, 3886 { { "ra" }, "$31" } 3887 }; 3888 Aliases = GCCRegAliases; 3889 NumAliases = llvm::array_lengthof(GCCRegAliases); 3890 } 3891 }; 3892 3893 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3894 virtual void SetDescriptionString(const std::string &Name) { 3895 // Change DescriptionString only if ABI is n32. 3896 if (Name == "n32") 3897 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3898 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3899 "v64:64:64-n32"; 3900 } 3901 public: 3902 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3903 // Default ABI is n64. 3904 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3905 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3906 "v64:64:64-n32"; 3907 } 3908 virtual void getTargetDefines(const LangOptions &Opts, 3909 MacroBuilder &Builder) const { 3910 DefineStd(Builder, "mips", Opts); 3911 Builder.defineMacro("_mips"); 3912 DefineStd(Builder, "MIPSEB", Opts); 3913 Builder.defineMacro("_MIPSEB"); 3914 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3915 getArchDefines(Opts, Builder); 3916 } 3917 }; 3918 3919 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3920 virtual void SetDescriptionString(const std::string &Name) { 3921 // Change DescriptionString only if ABI is n32. 3922 if (Name == "n32") 3923 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3924 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3925 "-v64:64:64-n32"; 3926 } 3927 public: 3928 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3929 // Default ABI is n64. 3930 BigEndian = false; 3931 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3932 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3933 "v64:64:64-n32"; 3934 } 3935 virtual void getTargetDefines(const LangOptions &Opts, 3936 MacroBuilder &Builder) const { 3937 DefineStd(Builder, "mips", Opts); 3938 Builder.defineMacro("_mips"); 3939 DefineStd(Builder, "MIPSEL", Opts); 3940 Builder.defineMacro("_MIPSEL"); 3941 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3942 getArchDefines(Opts, Builder); 3943 } 3944 }; 3945 } // end anonymous namespace. 3946 3947 namespace { 3948 class PNaClTargetInfo : public TargetInfo { 3949 public: 3950 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3951 BigEndian = false; 3952 this->UserLabelPrefix = ""; 3953 this->LongAlign = 32; 3954 this->LongWidth = 32; 3955 this->PointerAlign = 32; 3956 this->PointerWidth = 32; 3957 this->IntMaxType = TargetInfo::SignedLongLong; 3958 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3959 this->Int64Type = TargetInfo::SignedLongLong; 3960 this->DoubleAlign = 64; 3961 this->LongDoubleWidth = 64; 3962 this->LongDoubleAlign = 64; 3963 this->SizeType = TargetInfo::UnsignedInt; 3964 this->PtrDiffType = TargetInfo::SignedInt; 3965 this->IntPtrType = TargetInfo::SignedInt; 3966 this->RegParmMax = 2; 3967 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3968 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3969 } 3970 3971 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3972 } 3973 virtual void getArchDefines(const LangOptions &Opts, 3974 MacroBuilder &Builder) const { 3975 Builder.defineMacro("__le32__"); 3976 Builder.defineMacro("__pnacl__"); 3977 } 3978 virtual void getTargetDefines(const LangOptions &Opts, 3979 MacroBuilder &Builder) const { 3980 DefineStd(Builder, "unix", Opts); 3981 Builder.defineMacro("__ELF__"); 3982 if (Opts.POSIXThreads) 3983 Builder.defineMacro("_REENTRANT"); 3984 if (Opts.CPlusPlus) 3985 Builder.defineMacro("_GNU_SOURCE"); 3986 3987 Builder.defineMacro("__LITTLE_ENDIAN__"); 3988 Builder.defineMacro("__native_client__"); 3989 getArchDefines(Opts, Builder); 3990 } 3991 virtual bool hasFeature(StringRef Feature) const { 3992 return Feature == "pnacl"; 3993 } 3994 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3995 unsigned &NumRecords) const { 3996 } 3997 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3998 return TargetInfo::PNaClABIBuiltinVaList; 3999 } 4000 virtual void getGCCRegNames(const char * const *&Names, 4001 unsigned &NumNames) const; 4002 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 4003 unsigned &NumAliases) const; 4004 virtual bool validateAsmConstraint(const char *&Name, 4005 TargetInfo::ConstraintInfo &Info) const { 4006 return false; 4007 } 4008 4009 virtual const char *getClobbers() const { 4010 return ""; 4011 } 4012 }; 4013 4014 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 4015 unsigned &NumNames) const { 4016 Names = NULL; 4017 NumNames = 0; 4018 } 4019 4020 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 4021 unsigned &NumAliases) const { 4022 Aliases = NULL; 4023 NumAliases = 0; 4024 } 4025 } // end anonymous namespace. 4026 4027 4028 //===----------------------------------------------------------------------===// 4029 // Driver code 4030 //===----------------------------------------------------------------------===// 4031 4032 static TargetInfo *AllocateTarget(const std::string &T) { 4033 llvm::Triple Triple(T); 4034 llvm::Triple::OSType os = Triple.getOS(); 4035 4036 switch (Triple.getArch()) { 4037 default: 4038 return NULL; 4039 4040 case llvm::Triple::hexagon: 4041 return new HexagonTargetInfo(T); 4042 4043 case llvm::Triple::arm: 4044 case llvm::Triple::thumb: 4045 if (Triple.isOSDarwin()) 4046 return new DarwinARMTargetInfo(T); 4047 4048 switch (os) { 4049 case llvm::Triple::Linux: 4050 return new LinuxTargetInfo<ARMTargetInfo>(T); 4051 case llvm::Triple::FreeBSD: 4052 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 4053 case llvm::Triple::NetBSD: 4054 return new NetBSDTargetInfo<ARMTargetInfo>(T); 4055 case llvm::Triple::RTEMS: 4056 return new RTEMSTargetInfo<ARMTargetInfo>(T); 4057 default: 4058 return new ARMTargetInfo(T); 4059 } 4060 4061 case llvm::Triple::msp430: 4062 return new MSP430TargetInfo(T); 4063 4064 case llvm::Triple::mips: 4065 switch (os) { 4066 case llvm::Triple::Linux: 4067 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 4068 case llvm::Triple::RTEMS: 4069 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 4070 case llvm::Triple::FreeBSD: 4071 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 4072 case llvm::Triple::NetBSD: 4073 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 4074 default: 4075 return new Mips32EBTargetInfo(T); 4076 } 4077 4078 case llvm::Triple::mipsel: 4079 switch (os) { 4080 case llvm::Triple::Linux: 4081 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 4082 case llvm::Triple::RTEMS: 4083 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 4084 case llvm::Triple::FreeBSD: 4085 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 4086 case llvm::Triple::NetBSD: 4087 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 4088 default: 4089 return new Mips32ELTargetInfo(T); 4090 } 4091 4092 case llvm::Triple::mips64: 4093 switch (os) { 4094 case llvm::Triple::Linux: 4095 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 4096 case llvm::Triple::RTEMS: 4097 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 4098 case llvm::Triple::FreeBSD: 4099 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 4100 case llvm::Triple::NetBSD: 4101 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 4102 default: 4103 return new Mips64EBTargetInfo(T); 4104 } 4105 4106 case llvm::Triple::mips64el: 4107 switch (os) { 4108 case llvm::Triple::Linux: 4109 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 4110 case llvm::Triple::RTEMS: 4111 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 4112 case llvm::Triple::FreeBSD: 4113 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 4114 case llvm::Triple::NetBSD: 4115 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 4116 default: 4117 return new Mips64ELTargetInfo(T); 4118 } 4119 4120 case llvm::Triple::le32: 4121 switch (os) { 4122 case llvm::Triple::NativeClient: 4123 return new PNaClTargetInfo(T); 4124 default: 4125 return NULL; 4126 } 4127 4128 case llvm::Triple::ppc: 4129 if (Triple.isOSDarwin()) 4130 return new DarwinPPC32TargetInfo(T); 4131 switch (os) { 4132 case llvm::Triple::Linux: 4133 return new LinuxTargetInfo<PPC32TargetInfo>(T); 4134 case llvm::Triple::FreeBSD: 4135 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 4136 case llvm::Triple::NetBSD: 4137 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 4138 case llvm::Triple::RTEMS: 4139 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 4140 default: 4141 return new PPC32TargetInfo(T); 4142 } 4143 4144 case llvm::Triple::ppc64: 4145 if (Triple.isOSDarwin()) 4146 return new DarwinPPC64TargetInfo(T); 4147 switch (os) { 4148 case llvm::Triple::Linux: 4149 return new LinuxTargetInfo<PPC64TargetInfo>(T); 4150 case llvm::Triple::Lv2: 4151 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 4152 case llvm::Triple::FreeBSD: 4153 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 4154 case llvm::Triple::NetBSD: 4155 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 4156 default: 4157 return new PPC64TargetInfo(T); 4158 } 4159 4160 case llvm::Triple::nvptx: 4161 return new NVPTX32TargetInfo(T); 4162 case llvm::Triple::nvptx64: 4163 return new NVPTX64TargetInfo(T); 4164 4165 case llvm::Triple::mblaze: 4166 return new MBlazeTargetInfo(T); 4167 4168 case llvm::Triple::sparc: 4169 switch (os) { 4170 case llvm::Triple::Linux: 4171 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 4172 case llvm::Triple::AuroraUX: 4173 return new AuroraUXSparcV8TargetInfo(T); 4174 case llvm::Triple::Solaris: 4175 return new SolarisSparcV8TargetInfo(T); 4176 case llvm::Triple::NetBSD: 4177 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 4178 case llvm::Triple::RTEMS: 4179 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 4180 default: 4181 return new SparcV8TargetInfo(T); 4182 } 4183 4184 // FIXME: Need a real SPU target. 4185 case llvm::Triple::cellspu: 4186 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 4187 4188 case llvm::Triple::tce: 4189 return new TCETargetInfo(T); 4190 4191 case llvm::Triple::x86: 4192 if (Triple.isOSDarwin()) 4193 return new DarwinI386TargetInfo(T); 4194 4195 switch (os) { 4196 case llvm::Triple::AuroraUX: 4197 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 4198 case llvm::Triple::Linux: 4199 return new LinuxTargetInfo<X86_32TargetInfo>(T); 4200 case llvm::Triple::DragonFly: 4201 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 4202 case llvm::Triple::NetBSD: 4203 return new NetBSDI386TargetInfo(T); 4204 case llvm::Triple::OpenBSD: 4205 return new OpenBSDI386TargetInfo(T); 4206 case llvm::Triple::FreeBSD: 4207 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 4208 case llvm::Triple::Minix: 4209 return new MinixTargetInfo<X86_32TargetInfo>(T); 4210 case llvm::Triple::Solaris: 4211 return new SolarisTargetInfo<X86_32TargetInfo>(T); 4212 case llvm::Triple::Cygwin: 4213 return new CygwinX86_32TargetInfo(T); 4214 case llvm::Triple::MinGW32: 4215 return new MinGWX86_32TargetInfo(T); 4216 case llvm::Triple::Win32: 4217 return new VisualStudioWindowsX86_32TargetInfo(T); 4218 case llvm::Triple::Haiku: 4219 return new HaikuX86_32TargetInfo(T); 4220 case llvm::Triple::RTEMS: 4221 return new RTEMSX86_32TargetInfo(T); 4222 default: 4223 return new X86_32TargetInfo(T); 4224 } 4225 4226 case llvm::Triple::x86_64: 4227 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 4228 return new DarwinX86_64TargetInfo(T); 4229 4230 switch (os) { 4231 case llvm::Triple::AuroraUX: 4232 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 4233 case llvm::Triple::Linux: 4234 return new LinuxTargetInfo<X86_64TargetInfo>(T); 4235 case llvm::Triple::DragonFly: 4236 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 4237 case llvm::Triple::NetBSD: 4238 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 4239 case llvm::Triple::OpenBSD: 4240 return new OpenBSDX86_64TargetInfo(T); 4241 case llvm::Triple::FreeBSD: 4242 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 4243 case llvm::Triple::Solaris: 4244 return new SolarisTargetInfo<X86_64TargetInfo>(T); 4245 case llvm::Triple::MinGW32: 4246 return new MinGWX86_64TargetInfo(T); 4247 case llvm::Triple::Win32: // This is what Triple.h supports now. 4248 return new VisualStudioWindowsX86_64TargetInfo(T); 4249 default: 4250 return new X86_64TargetInfo(T); 4251 } 4252 } 4253 } 4254 4255 /// CreateTargetInfo - Return the target info object for the specified target 4256 /// triple. 4257 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 4258 TargetOptions &Opts) { 4259 llvm::Triple Triple(Opts.Triple); 4260 4261 // Construct the target 4262 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 4263 if (!Target) { 4264 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 4265 return 0; 4266 } 4267 4268 // Set the target CPU if specified. 4269 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 4270 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 4271 return 0; 4272 } 4273 4274 // Set the target ABI if specified. 4275 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 4276 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 4277 return 0; 4278 } 4279 4280 // Set the target C++ ABI. 4281 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 4282 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 4283 return 0; 4284 } 4285 4286 // Compute the default target features, we need the target to handle this 4287 // because features may have dependencies on one another. 4288 llvm::StringMap<bool> Features; 4289 Target->getDefaultFeatures(Features); 4290 4291 // Apply the user specified deltas. 4292 // First the enables. 4293 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4294 ie = Opts.Features.end(); it != ie; ++it) { 4295 const char *Name = it->c_str(); 4296 4297 if (Name[0] != '+') 4298 continue; 4299 4300 // Apply the feature via the target. 4301 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4302 Diags.Report(diag::err_target_invalid_feature) << Name; 4303 return 0; 4304 } 4305 } 4306 4307 // Then the disables. 4308 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4309 ie = Opts.Features.end(); it != ie; ++it) { 4310 const char *Name = it->c_str(); 4311 4312 if (Name[0] == '+') 4313 continue; 4314 4315 // Apply the feature via the target. 4316 if (Name[0] != '-' || 4317 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4318 Diags.Report(diag::err_target_invalid_feature) << Name; 4319 return 0; 4320 } 4321 } 4322 4323 // Add the features to the compile options. 4324 // 4325 // FIXME: If we are completely confident that we have the right set, we only 4326 // need to pass the minuses. 4327 Opts.Features.clear(); 4328 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4329 ie = Features.end(); it != ie; ++it) 4330 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str()); 4331 Target->HandleTargetFeatures(Opts.Features); 4332 4333 return Target.take(); 4334 } 4335