1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Type.h" 30 #include <algorithm> 31 using namespace clang; 32 33 //===----------------------------------------------------------------------===// 34 // Common code shared among targets. 35 //===----------------------------------------------------------------------===// 36 37 /// DefineStd - Define a macro name and standard variants. For example if 38 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 39 /// when in GNU mode. 40 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 41 const LangOptions &Opts) { 42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 43 44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 45 // in the user's namespace. 46 if (Opts.GNUMode) 47 Builder.defineMacro(MacroName); 48 49 // Define __unix. 50 Builder.defineMacro("__" + MacroName); 51 52 // Define __unix__. 53 Builder.defineMacro("__" + MacroName + "__"); 54 } 55 56 //===----------------------------------------------------------------------===// 57 // Defines specific to certain operating systems. 58 //===----------------------------------------------------------------------===// 59 60 namespace { 61 template<typename TgtInfo> 62 class OSTargetInfo : public TgtInfo { 63 protected: 64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 65 MacroBuilder &Builder) const=0; 66 public: 67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 68 virtual void getTargetDefines(const LangOptions &Opts, 69 MacroBuilder &Builder) const { 70 TgtInfo::getTargetDefines(Opts, Builder); 71 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 72 } 73 74 }; 75 } // end anonymous namespace 76 77 78 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 79 const llvm::Triple &Triple, 80 StringRef &PlatformName, 81 VersionTuple &PlatformMinVersion) { 82 Builder.defineMacro("__APPLE_CC__", "5621"); 83 Builder.defineMacro("__APPLE__"); 84 Builder.defineMacro("__MACH__"); 85 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 86 87 if (!Opts.ObjCAutoRefCount) { 88 // __weak is always defined, for use in blocks and with objc pointers. 89 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 90 91 // Darwin defines __strong even in C mode (just to nothing). 92 if (Opts.getGC() != LangOptions::NonGC) 93 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 94 else 95 Builder.defineMacro("__strong", ""); 96 97 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 98 // allow this in C, since one might have block pointers in structs that 99 // are used in pure C code and in Objective-C ARC. 100 Builder.defineMacro("__unsafe_unretained", ""); 101 102 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 103 // mode; then they become normal, C-style casts. 104 Builder.defineMacro("__bridge", ""); 105 Builder.defineMacro("__bridge_transfer", ""); 106 Builder.defineMacro("__bridge_retained", ""); 107 Builder.defineMacro("__bridge_retain", ""); 108 } 109 110 if (Opts.Static) 111 Builder.defineMacro("__STATIC__"); 112 else 113 Builder.defineMacro("__DYNAMIC__"); 114 115 if (Opts.POSIXThreads) 116 Builder.defineMacro("_REENTRANT"); 117 118 // Get the platform type and version number from the triple. 119 unsigned Maj, Min, Rev; 120 121 // If no version was given, default to to 10.4.0, for simplifying tests. 122 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 123 PlatformName = "macosx"; 124 Min = Rev = 0; 125 Maj = 8; 126 } else { 127 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 128 // "-osxNNN", and "-iosNNN"). 129 130 if (Triple.getOS() == llvm::Triple::Darwin) { 131 // For historical reasons that make little sense, the version passed here 132 // is the "darwin" version, which drops the 10 and offsets by 4. 133 Triple.getOSVersion(Maj, Min, Rev); 134 135 if (Triple.getEnvironmentName() == "iphoneos") { 136 PlatformName = "ios"; 137 } else { 138 PlatformName = "macosx"; 139 Rev = Min; 140 Min = Maj - 4; 141 Maj = 10; 142 } 143 } else { 144 Triple.getOSVersion(Maj, Min, Rev); 145 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 146 } 147 } 148 149 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 150 // generating code for Win32 ABI. No need to emit 151 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 152 if (PlatformName == "win32") { 153 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 154 return; 155 } 156 157 // Set the appropriate OS version define. 158 if (PlatformName == "ios") { 159 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 160 char Str[6]; 161 Str[0] = '0' + Maj; 162 Str[1] = '0' + (Min / 10); 163 Str[2] = '0' + (Min % 10); 164 Str[3] = '0' + (Rev / 10); 165 Str[4] = '0' + (Rev % 10); 166 Str[5] = '\0'; 167 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 168 } else { 169 // Note that the Driver allows versions which aren't representable in the 170 // define (because we only get a single digit for the minor and micro 171 // revision numbers). So, we limit them to the maximum representable 172 // version. 173 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 174 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 175 char Str[5]; 176 Str[0] = '0' + (Maj / 10); 177 Str[1] = '0' + (Maj % 10); 178 Str[2] = '0' + std::min(Min, 9U); 179 Str[3] = '0' + std::min(Rev, 9U); 180 Str[4] = '\0'; 181 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 182 } 183 184 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 185 } 186 187 namespace { 188 template<typename Target> 189 class DarwinTargetInfo : public OSTargetInfo<Target> { 190 protected: 191 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 192 MacroBuilder &Builder) const { 193 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 194 this->PlatformMinVersion); 195 } 196 197 public: 198 DarwinTargetInfo(const std::string& triple) : 199 OSTargetInfo<Target>(triple) { 200 llvm::Triple T = llvm::Triple(triple); 201 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 202 this->MCountName = "\01mcount"; 203 } 204 205 virtual std::string isValidSectionSpecifier(StringRef SR) const { 206 // Let MCSectionMachO validate this. 207 StringRef Segment, Section; 208 unsigned TAA, StubSize; 209 bool HasTAA; 210 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 211 TAA, HasTAA, StubSize); 212 } 213 214 virtual const char *getStaticInitSectionSpecifier() const { 215 // FIXME: We should return 0 when building kexts. 216 return "__TEXT,__StaticInit,regular,pure_instructions"; 217 } 218 219 }; 220 221 222 // DragonFlyBSD Target 223 template<typename Target> 224 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 225 protected: 226 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 227 MacroBuilder &Builder) const { 228 // DragonFly defines; list based off of gcc output 229 Builder.defineMacro("__DragonFly__"); 230 Builder.defineMacro("__DragonFly_cc_version", "100001"); 231 Builder.defineMacro("__ELF__"); 232 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 233 Builder.defineMacro("__tune_i386__"); 234 DefineStd(Builder, "unix", Opts); 235 } 236 public: 237 DragonFlyBSDTargetInfo(const std::string &triple) 238 : OSTargetInfo<Target>(triple) {} 239 }; 240 241 // FreeBSD Target 242 template<typename Target> 243 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 244 protected: 245 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 246 MacroBuilder &Builder) const { 247 // FreeBSD defines; list based off of gcc output 248 249 // FIXME: Move version number handling to llvm::Triple. 250 StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 251 252 Builder.defineMacro("__FreeBSD__", Release); 253 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 254 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 255 DefineStd(Builder, "unix", Opts); 256 Builder.defineMacro("__ELF__"); 257 } 258 public: 259 FreeBSDTargetInfo(const std::string &triple) 260 : OSTargetInfo<Target>(triple) { 261 this->UserLabelPrefix = ""; 262 263 llvm::Triple Triple(triple); 264 switch (Triple.getArch()) { 265 default: 266 case llvm::Triple::x86: 267 case llvm::Triple::x86_64: 268 this->MCountName = ".mcount"; 269 break; 270 case llvm::Triple::mips: 271 case llvm::Triple::mipsel: 272 case llvm::Triple::ppc: 273 case llvm::Triple::ppc64: 274 this->MCountName = "_mcount"; 275 break; 276 case llvm::Triple::arm: 277 this->MCountName = "__mcount"; 278 break; 279 } 280 281 } 282 }; 283 284 // Minix Target 285 template<typename Target> 286 class MinixTargetInfo : public OSTargetInfo<Target> { 287 protected: 288 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 289 MacroBuilder &Builder) const { 290 // Minix defines 291 292 Builder.defineMacro("__minix", "3"); 293 Builder.defineMacro("_EM_WSIZE", "4"); 294 Builder.defineMacro("_EM_PSIZE", "4"); 295 Builder.defineMacro("_EM_SSIZE", "2"); 296 Builder.defineMacro("_EM_LSIZE", "4"); 297 Builder.defineMacro("_EM_FSIZE", "4"); 298 Builder.defineMacro("_EM_DSIZE", "8"); 299 DefineStd(Builder, "unix", Opts); 300 } 301 public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306 }; 307 308 // Linux target 309 template<typename Target> 310 class LinuxTargetInfo : public OSTargetInfo<Target> { 311 protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Opts.POSIXThreads) 320 Builder.defineMacro("_REENTRANT"); 321 if (Opts.CPlusPlus) 322 Builder.defineMacro("_GNU_SOURCE"); 323 } 324 public: 325 LinuxTargetInfo(const std::string& triple) 326 : OSTargetInfo<Target>(triple) { 327 this->UserLabelPrefix = ""; 328 this->WIntType = TargetInfo::UnsignedInt; 329 } 330 }; 331 332 // NetBSD Target 333 template<typename Target> 334 class NetBSDTargetInfo : public OSTargetInfo<Target> { 335 protected: 336 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 337 MacroBuilder &Builder) const { 338 // NetBSD defines; list based off of gcc output 339 Builder.defineMacro("__NetBSD__"); 340 Builder.defineMacro("__unix__"); 341 Builder.defineMacro("__ELF__"); 342 if (Opts.POSIXThreads) 343 Builder.defineMacro("_POSIX_THREADS"); 344 } 345 public: 346 NetBSDTargetInfo(const std::string &triple) 347 : OSTargetInfo<Target>(triple) { 348 this->UserLabelPrefix = ""; 349 } 350 }; 351 352 // OpenBSD Target 353 template<typename Target> 354 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 355 protected: 356 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 357 MacroBuilder &Builder) const { 358 // OpenBSD defines; list based off of gcc output 359 360 Builder.defineMacro("__OpenBSD__"); 361 DefineStd(Builder, "unix", Opts); 362 Builder.defineMacro("__ELF__"); 363 if (Opts.POSIXThreads) 364 Builder.defineMacro("_POSIX_THREADS"); 365 } 366 public: 367 OpenBSDTargetInfo(const std::string &triple) 368 : OSTargetInfo<Target>(triple) {} 369 }; 370 371 // PSP Target 372 template<typename Target> 373 class PSPTargetInfo : public OSTargetInfo<Target> { 374 protected: 375 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 376 MacroBuilder &Builder) const { 377 // PSP defines; list based on the output of the pspdev gcc toolchain. 378 Builder.defineMacro("PSP"); 379 Builder.defineMacro("_PSP"); 380 Builder.defineMacro("__psp__"); 381 Builder.defineMacro("__ELF__"); 382 } 383 public: 384 PSPTargetInfo(const std::string& triple) 385 : OSTargetInfo<Target>(triple) { 386 this->UserLabelPrefix = ""; 387 } 388 }; 389 390 // PS3 PPU Target 391 template<typename Target> 392 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 393 protected: 394 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 395 MacroBuilder &Builder) const { 396 // PS3 PPU defines. 397 Builder.defineMacro("__PPC__"); 398 Builder.defineMacro("__PPU__"); 399 Builder.defineMacro("__CELLOS_LV2__"); 400 Builder.defineMacro("__ELF__"); 401 Builder.defineMacro("__LP32__"); 402 Builder.defineMacro("_ARCH_PPC64"); 403 Builder.defineMacro("__powerpc64__"); 404 } 405 public: 406 PS3PPUTargetInfo(const std::string& triple) 407 : OSTargetInfo<Target>(triple) { 408 this->UserLabelPrefix = ""; 409 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 410 this->IntMaxType = TargetInfo::SignedLongLong; 411 this->UIntMaxType = TargetInfo::UnsignedLongLong; 412 this->Int64Type = TargetInfo::SignedLongLong; 413 this->SizeType = TargetInfo::UnsignedInt; 414 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 415 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 416 } 417 }; 418 419 // FIXME: Need a real SPU target. 420 // PS3 SPU Target 421 template<typename Target> 422 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 423 protected: 424 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 425 MacroBuilder &Builder) const { 426 // PS3 PPU defines. 427 Builder.defineMacro("__SPU__"); 428 Builder.defineMacro("__ELF__"); 429 } 430 public: 431 PS3SPUTargetInfo(const std::string& triple) 432 : OSTargetInfo<Target>(triple) { 433 this->UserLabelPrefix = ""; 434 } 435 }; 436 437 // AuroraUX target 438 template<typename Target> 439 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 440 protected: 441 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 442 MacroBuilder &Builder) const { 443 DefineStd(Builder, "sun", Opts); 444 DefineStd(Builder, "unix", Opts); 445 Builder.defineMacro("__ELF__"); 446 Builder.defineMacro("__svr4__"); 447 Builder.defineMacro("__SVR4"); 448 } 449 public: 450 AuroraUXTargetInfo(const std::string& triple) 451 : OSTargetInfo<Target>(triple) { 452 this->UserLabelPrefix = ""; 453 this->WCharType = this->SignedLong; 454 // FIXME: WIntType should be SignedLong 455 } 456 }; 457 458 // Solaris target 459 template<typename Target> 460 class SolarisTargetInfo : public OSTargetInfo<Target> { 461 protected: 462 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 463 MacroBuilder &Builder) const { 464 DefineStd(Builder, "sun", Opts); 465 DefineStd(Builder, "unix", Opts); 466 Builder.defineMacro("__ELF__"); 467 Builder.defineMacro("__svr4__"); 468 Builder.defineMacro("__SVR4"); 469 } 470 public: 471 SolarisTargetInfo(const std::string& triple) 472 : OSTargetInfo<Target>(triple) { 473 this->UserLabelPrefix = ""; 474 this->WCharType = this->SignedLong; 475 // FIXME: WIntType should be SignedLong 476 } 477 }; 478 479 // Windows target 480 template<typename Target> 481 class WindowsTargetInfo : public OSTargetInfo<Target> { 482 protected: 483 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 484 MacroBuilder &Builder) const { 485 Builder.defineMacro("_WIN32"); 486 } 487 void getVisualStudioDefines(const LangOptions &Opts, 488 MacroBuilder &Builder) const { 489 if (Opts.CPlusPlus) { 490 if (Opts.RTTI) 491 Builder.defineMacro("_CPPRTTI"); 492 493 if (Opts.Exceptions) 494 Builder.defineMacro("_CPPUNWIND"); 495 } 496 497 if (!Opts.CharIsSigned) 498 Builder.defineMacro("_CHAR_UNSIGNED"); 499 500 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 501 // but it works for now. 502 if (Opts.POSIXThreads) 503 Builder.defineMacro("_MT"); 504 505 if (Opts.MSCVersion != 0) 506 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 507 508 if (Opts.Microsoft) { 509 Builder.defineMacro("_MSC_EXTENSIONS"); 510 511 if (Opts.CPlusPlus0x) { 512 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 513 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 514 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 515 } 516 } 517 518 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 519 } 520 521 public: 522 WindowsTargetInfo(const std::string &triple) 523 : OSTargetInfo<Target>(triple) {} 524 }; 525 526 } // end anonymous namespace. 527 528 //===----------------------------------------------------------------------===// 529 // Specific target implementations. 530 //===----------------------------------------------------------------------===// 531 532 namespace { 533 // PPC abstract base class 534 class PPCTargetInfo : public TargetInfo { 535 static const Builtin::Info BuiltinInfo[]; 536 static const char * const GCCRegNames[]; 537 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 538 public: 539 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 540 541 virtual void getTargetBuiltins(const Builtin::Info *&Records, 542 unsigned &NumRecords) const { 543 Records = BuiltinInfo; 544 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 545 } 546 547 virtual void getTargetDefines(const LangOptions &Opts, 548 MacroBuilder &Builder) const; 549 550 virtual void getGCCRegNames(const char * const *&Names, 551 unsigned &NumNames) const; 552 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 553 unsigned &NumAliases) const; 554 virtual bool validateAsmConstraint(const char *&Name, 555 TargetInfo::ConstraintInfo &Info) const { 556 switch (*Name) { 557 default: return false; 558 case 'O': // Zero 559 break; 560 case 'b': // Base register 561 case 'f': // Floating point register 562 Info.setAllowsRegister(); 563 break; 564 // FIXME: The following are added to allow parsing. 565 // I just took a guess at what the actions should be. 566 // Also, is more specific checking needed? I.e. specific registers? 567 case 'd': // Floating point register (containing 64-bit value) 568 case 'v': // Altivec vector register 569 Info.setAllowsRegister(); 570 break; 571 case 'w': 572 switch (Name[1]) { 573 case 'd':// VSX vector register to hold vector double data 574 case 'f':// VSX vector register to hold vector float data 575 case 's':// VSX vector register to hold scalar float data 576 case 'a':// Any VSX register 577 break; 578 default: 579 return false; 580 } 581 Info.setAllowsRegister(); 582 Name++; // Skip over 'w'. 583 break; 584 case 'h': // `MQ', `CTR', or `LINK' register 585 case 'q': // `MQ' register 586 case 'c': // `CTR' register 587 case 'l': // `LINK' register 588 case 'x': // `CR' register (condition register) number 0 589 case 'y': // `CR' register (condition register) 590 case 'z': // `XER[CA]' carry bit (part of the XER register) 591 Info.setAllowsRegister(); 592 break; 593 case 'I': // Signed 16-bit constant 594 case 'J': // Unsigned 16-bit constant shifted left 16 bits 595 // (use `L' instead for SImode constants) 596 case 'K': // Unsigned 16-bit constant 597 case 'L': // Signed 16-bit constant shifted left 16 bits 598 case 'M': // Constant larger than 31 599 case 'N': // Exact power of 2 600 case 'P': // Constant whose negation is a signed 16-bit constant 601 case 'G': // Floating point constant that can be loaded into a 602 // register with one instruction per word 603 case 'H': // Integer/Floating point constant that can be loaded 604 // into a register using three instructions 605 break; 606 case 'm': // Memory operand. Note that on PowerPC targets, m can 607 // include addresses that update the base register. It 608 // is therefore only safe to use `m' in an asm statement 609 // if that asm statement accesses the operand exactly once. 610 // The asm statement must also use `%U<opno>' as a 611 // placeholder for the "update" flag in the corresponding 612 // load or store instruction. For example: 613 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 614 // is correct but: 615 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 616 // is not. Use es rather than m if you don't want the base 617 // register to be updated. 618 case 'e': 619 if (Name[1] != 's') 620 return false; 621 // es: A "stable" memory operand; that is, one which does not 622 // include any automodification of the base register. Unlike 623 // `m', this constraint can be used in asm statements that 624 // might access the operand several times, or that might not 625 // access it at all. 626 Info.setAllowsMemory(); 627 Name++; // Skip over 'e'. 628 break; 629 case 'Q': // Memory operand that is an offset from a register (it is 630 // usually better to use `m' or `es' in asm statements) 631 case 'Z': // Memory operand that is an indexed or indirect from a 632 // register (it is usually better to use `m' or `es' in 633 // asm statements) 634 Info.setAllowsMemory(); 635 Info.setAllowsRegister(); 636 break; 637 case 'R': // AIX TOC entry 638 case 'a': // Address operand that is an indexed or indirect from a 639 // register (`p' is preferable for asm statements) 640 case 'S': // Constant suitable as a 64-bit mask operand 641 case 'T': // Constant suitable as a 32-bit mask operand 642 case 'U': // System V Release 4 small data area reference 643 case 't': // AND masks that can be performed by two rldic{l, r} 644 // instructions 645 case 'W': // Vector constant that does not require memory 646 case 'j': // Vector constant that is all zeros. 647 break; 648 // End FIXME. 649 } 650 return true; 651 } 652 virtual const char *getClobbers() const { 653 return ""; 654 } 655 }; 656 657 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 658 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 659 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 660 ALL_LANGUAGES }, 661 #include "clang/Basic/BuiltinsPPC.def" 662 }; 663 664 665 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 666 /// #defines that are not tied to a specific subtarget. 667 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 668 MacroBuilder &Builder) const { 669 // Target identification. 670 Builder.defineMacro("__ppc__"); 671 Builder.defineMacro("_ARCH_PPC"); 672 Builder.defineMacro("__powerpc__"); 673 Builder.defineMacro("__POWERPC__"); 674 if (PointerWidth == 64) { 675 Builder.defineMacro("_ARCH_PPC64"); 676 Builder.defineMacro("_LP64"); 677 Builder.defineMacro("__LP64__"); 678 Builder.defineMacro("__powerpc64__"); 679 Builder.defineMacro("__ppc64__"); 680 } else { 681 Builder.defineMacro("__ppc__"); 682 } 683 684 // Target properties. 685 if (getTriple().getOS() != llvm::Triple::NetBSD) 686 Builder.defineMacro("_BIG_ENDIAN"); 687 Builder.defineMacro("__BIG_ENDIAN__"); 688 689 // Subtarget options. 690 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 691 Builder.defineMacro("__REGISTER_PREFIX__", ""); 692 693 // FIXME: Should be controlled by command line option. 694 Builder.defineMacro("__LONG_DOUBLE_128__"); 695 696 if (Opts.AltiVec) { 697 Builder.defineMacro("__VEC__", "10206"); 698 Builder.defineMacro("__ALTIVEC__"); 699 } 700 } 701 702 703 const char * const PPCTargetInfo::GCCRegNames[] = { 704 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 705 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 706 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 707 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 708 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 709 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 710 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 711 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 712 "mq", "lr", "ctr", "ap", 713 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 714 "xer", 715 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 716 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 717 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 718 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 719 "vrsave", "vscr", 720 "spe_acc", "spefscr", 721 "sfp" 722 }; 723 724 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 725 unsigned &NumNames) const { 726 Names = GCCRegNames; 727 NumNames = llvm::array_lengthof(GCCRegNames); 728 } 729 730 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 731 // While some of these aliases do map to different registers 732 // they still share the same register name. 733 { { "0" }, "r0" }, 734 { { "1"}, "r1" }, 735 { { "2" }, "r2" }, 736 { { "3" }, "r3" }, 737 { { "4" }, "r4" }, 738 { { "5" }, "r5" }, 739 { { "6" }, "r6" }, 740 { { "7" }, "r7" }, 741 { { "8" }, "r8" }, 742 { { "9" }, "r9" }, 743 { { "10" }, "r10" }, 744 { { "11" }, "r11" }, 745 { { "12" }, "r12" }, 746 { { "13" }, "r13" }, 747 { { "14" }, "r14" }, 748 { { "15" }, "r15" }, 749 { { "16" }, "r16" }, 750 { { "17" }, "r17" }, 751 { { "18" }, "r18" }, 752 { { "19" }, "r19" }, 753 { { "20" }, "r20" }, 754 { { "21" }, "r21" }, 755 { { "22" }, "r22" }, 756 { { "23" }, "r23" }, 757 { { "24" }, "r24" }, 758 { { "25" }, "r25" }, 759 { { "26" }, "r26" }, 760 { { "27" }, "r27" }, 761 { { "28" }, "r28" }, 762 { { "29" }, "r29" }, 763 { { "30" }, "r30" }, 764 { { "31" }, "r31" }, 765 { { "fr0" }, "f0" }, 766 { { "fr1" }, "f1" }, 767 { { "fr2" }, "f2" }, 768 { { "fr3" }, "f3" }, 769 { { "fr4" }, "f4" }, 770 { { "fr5" }, "f5" }, 771 { { "fr6" }, "f6" }, 772 { { "fr7" }, "f7" }, 773 { { "fr8" }, "f8" }, 774 { { "fr9" }, "f9" }, 775 { { "fr10" }, "f10" }, 776 { { "fr11" }, "f11" }, 777 { { "fr12" }, "f12" }, 778 { { "fr13" }, "f13" }, 779 { { "fr14" }, "f14" }, 780 { { "fr15" }, "f15" }, 781 { { "fr16" }, "f16" }, 782 { { "fr17" }, "f17" }, 783 { { "fr18" }, "f18" }, 784 { { "fr19" }, "f19" }, 785 { { "fr20" }, "f20" }, 786 { { "fr21" }, "f21" }, 787 { { "fr22" }, "f22" }, 788 { { "fr23" }, "f23" }, 789 { { "fr24" }, "f24" }, 790 { { "fr25" }, "f25" }, 791 { { "fr26" }, "f26" }, 792 { { "fr27" }, "f27" }, 793 { { "fr28" }, "f28" }, 794 { { "fr29" }, "f29" }, 795 { { "fr30" }, "f30" }, 796 { { "fr31" }, "f31" }, 797 { { "cc" }, "cr0" }, 798 }; 799 800 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 801 unsigned &NumAliases) const { 802 Aliases = GCCRegAliases; 803 NumAliases = llvm::array_lengthof(GCCRegAliases); 804 } 805 } // end anonymous namespace. 806 807 namespace { 808 class PPC32TargetInfo : public PPCTargetInfo { 809 public: 810 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 811 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 812 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 813 814 switch (getTriple().getOS()) { 815 case llvm::Triple::FreeBSD: 816 case llvm::Triple::NetBSD: 817 SizeType = UnsignedInt; 818 break; 819 default: 820 break; 821 } 822 } 823 824 virtual const char *getVAListDeclaration() const { 825 // This is the ELF definition, and is overridden by the Darwin sub-target 826 return "typedef struct __va_list_tag {" 827 " unsigned char gpr;" 828 " unsigned char fpr;" 829 " unsigned short reserved;" 830 " void* overflow_arg_area;" 831 " void* reg_save_area;" 832 "} __builtin_va_list[1];"; 833 } 834 }; 835 } // end anonymous namespace. 836 837 namespace { 838 class PPC64TargetInfo : public PPCTargetInfo { 839 public: 840 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 841 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 842 IntMaxType = SignedLong; 843 UIntMaxType = UnsignedLong; 844 Int64Type = SignedLong; 845 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 846 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 847 } 848 virtual const char *getVAListDeclaration() const { 849 return "typedef char* __builtin_va_list;"; 850 } 851 }; 852 } // end anonymous namespace. 853 854 855 namespace { 856 class DarwinPPC32TargetInfo : 857 public DarwinTargetInfo<PPC32TargetInfo> { 858 public: 859 DarwinPPC32TargetInfo(const std::string& triple) 860 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 861 HasAlignMac68kSupport = true; 862 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 863 } 864 virtual const char *getVAListDeclaration() const { 865 return "typedef char* __builtin_va_list;"; 866 } 867 }; 868 869 class DarwinPPC64TargetInfo : 870 public DarwinTargetInfo<PPC64TargetInfo> { 871 public: 872 DarwinPPC64TargetInfo(const std::string& triple) 873 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 874 HasAlignMac68kSupport = true; 875 } 876 }; 877 } // end anonymous namespace. 878 879 namespace { 880 class PTXTargetInfo : public TargetInfo { 881 static const char * const GCCRegNames[]; 882 static const Builtin::Info BuiltinInfo[]; 883 public: 884 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 885 TLSSupported = false; 886 LongWidth = LongAlign = 64; 887 } 888 virtual void getTargetDefines(const LangOptions &Opts, 889 MacroBuilder &Builder) const { 890 Builder.defineMacro("__PTX__"); 891 } 892 virtual void getTargetBuiltins(const Builtin::Info *&Records, 893 unsigned &NumRecords) const { 894 Records = BuiltinInfo; 895 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 896 } 897 898 virtual void getGCCRegNames(const char * const *&Names, 899 unsigned &NumNames) const; 900 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 901 unsigned &NumAliases) const { 902 // No aliases. 903 Aliases = 0; 904 NumAliases = 0; 905 } 906 virtual bool validateAsmConstraint(const char *&Name, 907 TargetInfo::ConstraintInfo &info) const { 908 // FIXME: implement 909 return true; 910 } 911 virtual const char *getClobbers() const { 912 // FIXME: Is this really right? 913 return ""; 914 } 915 virtual const char *getVAListDeclaration() const { 916 // FIXME: implement 917 return "typedef char* __builtin_va_list;"; 918 } 919 920 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 921 const std::string &Name, 922 bool Enabled) const; 923 }; 924 925 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 926 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 927 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 928 ALL_LANGUAGES }, 929 #include "clang/Basic/BuiltinsPTX.def" 930 }; 931 932 const char * const PTXTargetInfo::GCCRegNames[] = { 933 "r0" 934 }; 935 936 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 937 unsigned &NumNames) const { 938 Names = GCCRegNames; 939 NumNames = llvm::array_lengthof(GCCRegNames); 940 } 941 942 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 943 const std::string &Name, 944 bool Enabled) const { 945 if (Enabled) { 946 if (Name == "double") 947 Features["double"] = true; 948 else if (Name == "no-fma") 949 Features["no-fma"] = true; 950 else if (Name == "compute10") 951 Features["compute10"] = true; 952 else if (Name == "compute11") 953 Features["compute11"] = true; 954 else if (Name == "compute12") 955 Features["compute12"] = true; 956 else if (Name == "compute13") 957 Features["compute13"] = true; 958 else if (Name == "compute20") 959 Features["compute20"] = true; 960 else if (Name == "ptx20") 961 Features["ptx20"] = true; 962 else if (Name == "ptx21") 963 Features["ptx21"] = true; 964 else if (Name == "ptx22") 965 Features["ptx22"] = true; 966 else if (Name == "ptx23") 967 Features["ptx23"] = true; 968 else if (Name == "sm10") 969 Features["sm10"] = true; 970 else if (Name == "sm11") 971 Features["sm11"] = true; 972 else if (Name == "sm12") 973 Features["sm12"] = true; 974 else if (Name == "sm13") 975 Features["sm13"] = true; 976 else if (Name == "sm20") 977 Features["sm20"] = true; 978 else if (Name == "sm21") 979 Features["sm21"] = true; 980 else if (Name == "sm22") 981 Features["sm22"] = true; 982 else if (Name == "sm23") 983 Features["sm23"] = true; 984 } else { 985 if (Name == "double") 986 Features["double"] = false; 987 else if (Name == "no-fma") 988 Features["no-fma"] = false; 989 else if (Name == "compute10") 990 Features["compute10"] = false; 991 else if (Name == "compute11") 992 Features["compute11"] = false; 993 else if (Name == "compute12") 994 Features["compute12"] = false; 995 else if (Name == "compute13") 996 Features["compute13"] = false; 997 else if (Name == "compute20") 998 Features["compute20"] = false; 999 else if (Name == "ptx20") 1000 Features["ptx20"] = false; 1001 else if (Name == "ptx21") 1002 Features["ptx21"] = false; 1003 else if (Name == "ptx22") 1004 Features["ptx22"] = false; 1005 else if (Name == "ptx23") 1006 Features["ptx23"] = false; 1007 else if (Name == "sm10") 1008 Features["sm10"] = false; 1009 else if (Name == "sm11") 1010 Features["sm11"] = false; 1011 else if (Name == "sm12") 1012 Features["sm12"] = false; 1013 else if (Name == "sm13") 1014 Features["sm13"] = false; 1015 else if (Name == "sm20") 1016 Features["sm20"] = false; 1017 else if (Name == "sm21") 1018 Features["sm21"] = false; 1019 else if (Name == "sm22") 1020 Features["sm22"] = false; 1021 else if (Name == "sm23") 1022 Features["sm23"] = false; 1023 } 1024 1025 return true; 1026 } 1027 1028 class PTX32TargetInfo : public PTXTargetInfo { 1029 public: 1030 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1031 PointerWidth = PointerAlign = 32; 1032 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1033 DescriptionString 1034 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 1035 } 1036 }; 1037 1038 class PTX64TargetInfo : public PTXTargetInfo { 1039 public: 1040 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1041 PointerWidth = PointerAlign = 64; 1042 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1043 DescriptionString 1044 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1045 } 1046 }; 1047 } 1048 1049 namespace { 1050 // MBlaze abstract base class 1051 class MBlazeTargetInfo : public TargetInfo { 1052 static const char * const GCCRegNames[]; 1053 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1054 1055 public: 1056 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1057 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1058 } 1059 1060 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1061 unsigned &NumRecords) const { 1062 // FIXME: Implement. 1063 Records = 0; 1064 NumRecords = 0; 1065 } 1066 1067 virtual void getTargetDefines(const LangOptions &Opts, 1068 MacroBuilder &Builder) const; 1069 1070 virtual const char *getVAListDeclaration() const { 1071 return "typedef char* __builtin_va_list;"; 1072 } 1073 virtual const char *getTargetPrefix() const { 1074 return "mblaze"; 1075 } 1076 virtual void getGCCRegNames(const char * const *&Names, 1077 unsigned &NumNames) const; 1078 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1079 unsigned &NumAliases) const; 1080 virtual bool validateAsmConstraint(const char *&Name, 1081 TargetInfo::ConstraintInfo &Info) const { 1082 switch (*Name) { 1083 default: return false; 1084 case 'O': // Zero 1085 return true; 1086 case 'b': // Base register 1087 case 'f': // Floating point register 1088 Info.setAllowsRegister(); 1089 return true; 1090 } 1091 } 1092 virtual const char *getClobbers() const { 1093 return ""; 1094 } 1095 }; 1096 1097 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1098 /// #defines that are not tied to a specific subtarget. 1099 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1100 MacroBuilder &Builder) const { 1101 // Target identification. 1102 Builder.defineMacro("__microblaze__"); 1103 Builder.defineMacro("_ARCH_MICROBLAZE"); 1104 Builder.defineMacro("__MICROBLAZE__"); 1105 1106 // Target properties. 1107 Builder.defineMacro("_BIG_ENDIAN"); 1108 Builder.defineMacro("__BIG_ENDIAN__"); 1109 1110 // Subtarget options. 1111 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1112 } 1113 1114 1115 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1116 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1117 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1118 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1119 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1120 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1121 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1122 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1123 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1124 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1125 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1126 }; 1127 1128 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1129 unsigned &NumNames) const { 1130 Names = GCCRegNames; 1131 NumNames = llvm::array_lengthof(GCCRegNames); 1132 } 1133 1134 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1135 { {"f0"}, "r0" }, 1136 { {"f1"}, "r1" }, 1137 { {"f2"}, "r2" }, 1138 { {"f3"}, "r3" }, 1139 { {"f4"}, "r4" }, 1140 { {"f5"}, "r5" }, 1141 { {"f6"}, "r6" }, 1142 { {"f7"}, "r7" }, 1143 { {"f8"}, "r8" }, 1144 { {"f9"}, "r9" }, 1145 { {"f10"}, "r10" }, 1146 { {"f11"}, "r11" }, 1147 { {"f12"}, "r12" }, 1148 { {"f13"}, "r13" }, 1149 { {"f14"}, "r14" }, 1150 { {"f15"}, "r15" }, 1151 { {"f16"}, "r16" }, 1152 { {"f17"}, "r17" }, 1153 { {"f18"}, "r18" }, 1154 { {"f19"}, "r19" }, 1155 { {"f20"}, "r20" }, 1156 { {"f21"}, "r21" }, 1157 { {"f22"}, "r22" }, 1158 { {"f23"}, "r23" }, 1159 { {"f24"}, "r24" }, 1160 { {"f25"}, "r25" }, 1161 { {"f26"}, "r26" }, 1162 { {"f27"}, "r27" }, 1163 { {"f28"}, "r28" }, 1164 { {"f29"}, "r29" }, 1165 { {"f30"}, "r30" }, 1166 { {"f31"}, "r31" }, 1167 }; 1168 1169 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1170 unsigned &NumAliases) const { 1171 Aliases = GCCRegAliases; 1172 NumAliases = llvm::array_lengthof(GCCRegAliases); 1173 } 1174 } // end anonymous namespace. 1175 1176 namespace { 1177 // Namespace for x86 abstract base class 1178 const Builtin::Info BuiltinInfo[] = { 1179 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1180 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1181 ALL_LANGUAGES }, 1182 #include "clang/Basic/BuiltinsX86.def" 1183 }; 1184 1185 static const char* const GCCRegNames[] = { 1186 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1187 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1188 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1189 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1190 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1191 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1192 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1193 }; 1194 1195 const TargetInfo::AddlRegName AddlRegNames[] = { 1196 { { "al", "ah", "eax", "rax" }, 0 }, 1197 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1198 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1199 { { "dl", "dh", "edx", "rdx" }, 1 }, 1200 { { "esi", "rsi" }, 4 }, 1201 { { "edi", "rdi" }, 5 }, 1202 { { "esp", "rsp" }, 7 }, 1203 { { "ebp", "rbp" }, 6 }, 1204 }; 1205 1206 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1207 // most of the implementation can be shared. 1208 class X86TargetInfo : public TargetInfo { 1209 enum X86SSEEnum { 1210 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1211 } SSELevel; 1212 enum MMX3DNowEnum { 1213 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1214 } MMX3DNowLevel; 1215 1216 bool HasAES; 1217 bool HasAVX; 1218 1219 public: 1220 X86TargetInfo(const std::string& triple) 1221 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1222 HasAES(false), HasAVX(false) { 1223 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1224 } 1225 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1226 unsigned &NumRecords) const { 1227 Records = BuiltinInfo; 1228 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1229 } 1230 virtual void getGCCRegNames(const char * const *&Names, 1231 unsigned &NumNames) const { 1232 Names = GCCRegNames; 1233 NumNames = llvm::array_lengthof(GCCRegNames); 1234 } 1235 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1236 unsigned &NumAliases) const { 1237 Aliases = 0; 1238 NumAliases = 0; 1239 } 1240 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1241 unsigned &NumNames) const { 1242 Names = AddlRegNames; 1243 NumNames = llvm::array_lengthof(AddlRegNames); 1244 } 1245 virtual bool validateAsmConstraint(const char *&Name, 1246 TargetInfo::ConstraintInfo &info) const; 1247 virtual std::string convertConstraint(const char *&Constraint) const; 1248 virtual const char *getClobbers() const { 1249 return "~{dirflag},~{fpsr},~{flags}"; 1250 } 1251 virtual void getTargetDefines(const LangOptions &Opts, 1252 MacroBuilder &Builder) const; 1253 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1254 const std::string &Name, 1255 bool Enabled) const; 1256 virtual void getDefaultFeatures(const std::string &CPU, 1257 llvm::StringMap<bool> &Features) const; 1258 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1259 virtual const char* getABI() const { 1260 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1261 } 1262 }; 1263 1264 void X86TargetInfo::getDefaultFeatures(const std::string &CPU, 1265 llvm::StringMap<bool> &Features) const { 1266 // FIXME: This should not be here. 1267 Features["3dnow"] = false; 1268 Features["3dnowa"] = false; 1269 Features["mmx"] = false; 1270 Features["sse"] = false; 1271 Features["sse2"] = false; 1272 Features["sse3"] = false; 1273 Features["ssse3"] = false; 1274 Features["sse41"] = false; 1275 Features["sse42"] = false; 1276 Features["aes"] = false; 1277 Features["avx"] = false; 1278 1279 // LLVM does not currently recognize this. 1280 // Features["sse4a"] = false; 1281 1282 // FIXME: This *really* should not be here. 1283 1284 // X86_64 always has SSE2. 1285 if (PointerWidth == 64) 1286 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1287 1288 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 1289 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro") 1290 ; 1291 else if (CPU == "pentium-mmx" || CPU == "pentium2") 1292 setFeatureEnabled(Features, "mmx", true); 1293 else if (CPU == "pentium3") { 1294 setFeatureEnabled(Features, "mmx", true); 1295 setFeatureEnabled(Features, "sse", true); 1296 } else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") { 1297 setFeatureEnabled(Features, "mmx", true); 1298 setFeatureEnabled(Features, "sse2", true); 1299 } else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") { 1300 setFeatureEnabled(Features, "mmx", true); 1301 setFeatureEnabled(Features, "sse3", true); 1302 } else if (CPU == "core2") { 1303 setFeatureEnabled(Features, "mmx", true); 1304 setFeatureEnabled(Features, "ssse3", true); 1305 } else if (CPU == "penryn") { 1306 setFeatureEnabled(Features, "mmx", true); 1307 setFeatureEnabled(Features, "sse4", true); 1308 Features["sse42"] = false; 1309 } else if (CPU == "atom") { 1310 setFeatureEnabled(Features, "mmx", true); 1311 setFeatureEnabled(Features, "sse3", true); 1312 } else if (CPU == "corei7") { 1313 setFeatureEnabled(Features, "mmx", true); 1314 setFeatureEnabled(Features, "sse4", true); 1315 setFeatureEnabled(Features, "aes", true); 1316 } else if (CPU == "corei7-avx") { 1317 setFeatureEnabled(Features, "mmx", true); 1318 setFeatureEnabled(Features, "sse4", true); 1319 setFeatureEnabled(Features, "aes", true); 1320 //setFeatureEnabled(Features, "avx", true); 1321 } else if (CPU == "k6" || CPU == "winchip-c6") 1322 setFeatureEnabled(Features, "mmx", true); 1323 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" || 1324 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") { 1325 setFeatureEnabled(Features, "3dnow", true); 1326 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") { 1327 setFeatureEnabled(Features, "sse", true); 1328 setFeatureEnabled(Features, "3dnowa", true); 1329 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" || 1330 CPU == "athlon-fx") { 1331 setFeatureEnabled(Features, "sse2", true); 1332 setFeatureEnabled(Features, "3dnowa", true); 1333 } else if (CPU == "k8-sse3") { 1334 setFeatureEnabled(Features, "sse3", true); 1335 setFeatureEnabled(Features, "3dnowa", true); 1336 } else if (CPU == "c3-2") { 1337 setFeatureEnabled(Features, "mmx", true); 1338 setFeatureEnabled(Features, "sse", true); 1339 } 1340 } 1341 1342 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1343 const std::string &Name, 1344 bool Enabled) const { 1345 // FIXME: This *really* should not be here. We need some way of translating 1346 // options into llvm subtarget features. 1347 if (!Features.count(Name) && 1348 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1349 return false; 1350 1351 if (Enabled) { 1352 if (Name == "mmx") 1353 Features["mmx"] = true; 1354 else if (Name == "sse") 1355 Features["sse"] = true; 1356 else if (Name == "sse2") 1357 Features["sse"] = Features["sse2"] = true; 1358 else if (Name == "sse3") 1359 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1360 else if (Name == "ssse3") 1361 Features["sse"] = Features["sse2"] = Features["sse3"] = 1362 Features["ssse3"] = true; 1363 else if (Name == "sse4" || Name == "sse4.2") 1364 Features["sse"] = Features["sse2"] = Features["sse3"] = 1365 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1366 else if (Name == "sse4.1") 1367 Features["sse"] = Features["sse2"] = Features["sse3"] = 1368 Features["ssse3"] = Features["sse41"] = true; 1369 else if (Name == "3dnow") 1370 Features["mmx"] = Features["3dnow"] = true; 1371 else if (Name == "3dnowa") 1372 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1373 else if (Name == "aes") 1374 Features["aes"] = true; 1375 else if (Name == "avx") 1376 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1377 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1378 } else { 1379 if (Name == "mmx") 1380 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1381 else if (Name == "sse") 1382 Features["sse"] = Features["sse2"] = Features["sse3"] = 1383 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1384 else if (Name == "sse2") 1385 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1386 Features["sse41"] = Features["sse42"] = false; 1387 else if (Name == "sse3") 1388 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1389 Features["sse42"] = false; 1390 else if (Name == "ssse3") 1391 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1392 else if (Name == "sse4" || Name == "sse4.1") 1393 Features["sse41"] = Features["sse42"] = false; 1394 else if (Name == "sse4.2") 1395 Features["sse42"] = false; 1396 else if (Name == "3dnow") 1397 Features["3dnow"] = Features["3dnowa"] = false; 1398 else if (Name == "3dnowa") 1399 Features["3dnowa"] = false; 1400 else if (Name == "aes") 1401 Features["aes"] = false; 1402 else if (Name == "avx") 1403 Features["avx"] = false; 1404 } 1405 1406 return true; 1407 } 1408 1409 /// HandleTargetOptions - Perform initialization based on the user 1410 /// configured set of features. 1411 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1412 // Remember the maximum enabled sselevel. 1413 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1414 // Ignore disabled features. 1415 if (Features[i][0] == '-') 1416 continue; 1417 1418 if (Features[i].substr(1) == "aes") { 1419 HasAES = true; 1420 continue; 1421 } 1422 1423 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1424 // For now let it be enabled together with other SSE levels. 1425 if (Features[i].substr(1) == "avx") { 1426 HasAVX = true; 1427 continue; 1428 } 1429 1430 assert(Features[i][0] == '+' && "Invalid target feature!"); 1431 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1432 .Case("sse42", SSE42) 1433 .Case("sse41", SSE41) 1434 .Case("ssse3", SSSE3) 1435 .Case("sse3", SSE3) 1436 .Case("sse2", SSE2) 1437 .Case("sse", SSE1) 1438 .Default(NoSSE); 1439 SSELevel = std::max(SSELevel, Level); 1440 1441 MMX3DNowEnum ThreeDNowLevel = 1442 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1443 .Case("3dnowa", AMD3DNowAthlon) 1444 .Case("3dnow", AMD3DNow) 1445 .Case("mmx", MMX) 1446 .Default(NoMMX3DNow); 1447 1448 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1449 } 1450 1451 // Don't tell the backend if we're turning off mmx; it will end up disabling 1452 // SSE, which we don't want. 1453 std::vector<std::string>::iterator it; 1454 it = std::find(Features.begin(), Features.end(), "-mmx"); 1455 if (it != Features.end()) 1456 Features.erase(it); 1457 } 1458 1459 /// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines 1460 /// that are not tied to a specific subtarget. 1461 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1462 MacroBuilder &Builder) const { 1463 // Target identification. 1464 if (PointerWidth == 64) { 1465 Builder.defineMacro("_LP64"); 1466 Builder.defineMacro("__LP64__"); 1467 Builder.defineMacro("__amd64__"); 1468 Builder.defineMacro("__amd64"); 1469 Builder.defineMacro("__x86_64"); 1470 Builder.defineMacro("__x86_64__"); 1471 } else { 1472 DefineStd(Builder, "i386", Opts); 1473 } 1474 1475 if (HasAES) 1476 Builder.defineMacro("__AES__"); 1477 1478 if (HasAVX) 1479 Builder.defineMacro("__AVX__"); 1480 1481 // Target properties. 1482 Builder.defineMacro("__LITTLE_ENDIAN__"); 1483 1484 // Subtarget options. 1485 Builder.defineMacro("__nocona"); 1486 Builder.defineMacro("__nocona__"); 1487 Builder.defineMacro("__tune_nocona__"); 1488 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1489 1490 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1491 // functions in glibc header files that use FP Stack inline asm which the 1492 // backend can't deal with (PR879). 1493 Builder.defineMacro("__NO_MATH_INLINES"); 1494 1495 // Each case falls through to the previous one here. 1496 switch (SSELevel) { 1497 case SSE42: 1498 Builder.defineMacro("__SSE4_2__"); 1499 case SSE41: 1500 Builder.defineMacro("__SSE4_1__"); 1501 case SSSE3: 1502 Builder.defineMacro("__SSSE3__"); 1503 case SSE3: 1504 Builder.defineMacro("__SSE3__"); 1505 case SSE2: 1506 Builder.defineMacro("__SSE2__"); 1507 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1508 case SSE1: 1509 Builder.defineMacro("__SSE__"); 1510 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1511 case NoSSE: 1512 break; 1513 } 1514 1515 if (Opts.Microsoft && PointerWidth == 32) { 1516 switch (SSELevel) { 1517 case SSE42: 1518 case SSE41: 1519 case SSSE3: 1520 case SSE3: 1521 case SSE2: 1522 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1523 break; 1524 case SSE1: 1525 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1526 break; 1527 default: 1528 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1529 } 1530 } 1531 1532 // Each case falls through to the previous one here. 1533 switch (MMX3DNowLevel) { 1534 case AMD3DNowAthlon: 1535 Builder.defineMacro("__3dNOW_A__"); 1536 case AMD3DNow: 1537 Builder.defineMacro("__3dNOW__"); 1538 case MMX: 1539 Builder.defineMacro("__MMX__"); 1540 case NoMMX3DNow: 1541 break; 1542 } 1543 } 1544 1545 1546 bool 1547 X86TargetInfo::validateAsmConstraint(const char *&Name, 1548 TargetInfo::ConstraintInfo &Info) const { 1549 switch (*Name) { 1550 default: return false; 1551 case 'Y': // first letter of a pair: 1552 switch (*(Name+1)) { 1553 default: return false; 1554 case '0': // First SSE register. 1555 case 't': // Any SSE register, when SSE2 is enabled. 1556 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1557 case 'm': // any MMX register, when inter-unit moves enabled. 1558 break; // falls through to setAllowsRegister. 1559 } 1560 case 'a': // eax. 1561 case 'b': // ebx. 1562 case 'c': // ecx. 1563 case 'd': // edx. 1564 case 'S': // esi. 1565 case 'D': // edi. 1566 case 'A': // edx:eax. 1567 case 'f': // any x87 floating point stack register. 1568 case 't': // top of floating point stack. 1569 case 'u': // second from top of floating point stack. 1570 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1571 case 'y': // Any MMX register. 1572 case 'x': // Any SSE register. 1573 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1574 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1575 case 'l': // "Index" registers: any general register that can be used as an 1576 // index in a base+index memory access. 1577 Info.setAllowsRegister(); 1578 return true; 1579 case 'C': // SSE floating point constant. 1580 case 'G': // x87 floating point constant. 1581 case 'e': // 32-bit signed integer constant for use with zero-extending 1582 // x86_64 instructions. 1583 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1584 // x86_64 instructions. 1585 return true; 1586 } 1587 return false; 1588 } 1589 1590 1591 std::string 1592 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1593 switch (*Constraint) { 1594 case 'a': return std::string("{ax}"); 1595 case 'b': return std::string("{bx}"); 1596 case 'c': return std::string("{cx}"); 1597 case 'd': return std::string("{dx}"); 1598 case 'S': return std::string("{si}"); 1599 case 'D': return std::string("{di}"); 1600 case 'p': // address 1601 return std::string("im"); 1602 case 't': // top of floating point stack. 1603 return std::string("{st}"); 1604 case 'u': // second from top of floating point stack. 1605 return std::string("{st(1)}"); // second from top of floating point stack. 1606 default: 1607 return std::string(1, *Constraint); 1608 } 1609 } 1610 } // end anonymous namespace 1611 1612 namespace { 1613 // X86-32 generic target 1614 class X86_32TargetInfo : public X86TargetInfo { 1615 public: 1616 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1617 DoubleAlign = LongLongAlign = 32; 1618 LongDoubleWidth = 96; 1619 LongDoubleAlign = 32; 1620 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1621 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1622 "a0:0:64-f80:32:32-n8:16:32"; 1623 SizeType = UnsignedInt; 1624 PtrDiffType = SignedInt; 1625 IntPtrType = SignedInt; 1626 RegParmMax = 3; 1627 1628 // Use fpret for all types. 1629 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1630 (1 << TargetInfo::Double) | 1631 (1 << TargetInfo::LongDouble)); 1632 } 1633 virtual const char *getVAListDeclaration() const { 1634 return "typedef char* __builtin_va_list;"; 1635 } 1636 1637 int getEHDataRegisterNumber(unsigned RegNo) const { 1638 if (RegNo == 0) return 0; 1639 if (RegNo == 1) return 2; 1640 return -1; 1641 } 1642 }; 1643 } // end anonymous namespace 1644 1645 namespace { 1646 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 1647 public: 1648 OpenBSDI386TargetInfo(const std::string& triple) : 1649 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 1650 SizeType = UnsignedLong; 1651 IntPtrType = SignedLong; 1652 PtrDiffType = SignedLong; 1653 } 1654 }; 1655 } // end anonymous namespace 1656 1657 namespace { 1658 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 1659 public: 1660 DarwinI386TargetInfo(const std::string& triple) : 1661 DarwinTargetInfo<X86_32TargetInfo>(triple) { 1662 LongDoubleWidth = 128; 1663 LongDoubleAlign = 128; 1664 SizeType = UnsignedLong; 1665 IntPtrType = SignedLong; 1666 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1667 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1668 "a0:0:64-f80:128:128-n8:16:32"; 1669 HasAlignMac68kSupport = true; 1670 } 1671 1672 }; 1673 } // end anonymous namespace 1674 1675 namespace { 1676 // x86-32 Windows target 1677 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 1678 public: 1679 WindowsX86_32TargetInfo(const std::string& triple) 1680 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 1681 TLSSupported = false; 1682 WCharType = UnsignedShort; 1683 DoubleAlign = LongLongAlign = 64; 1684 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1685 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 1686 "v128:128:128-a0:0:64-f80:32:32-n8:16:32"; 1687 } 1688 virtual void getTargetDefines(const LangOptions &Opts, 1689 MacroBuilder &Builder) const { 1690 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 1691 } 1692 }; 1693 } // end anonymous namespace 1694 1695 namespace { 1696 1697 // x86-32 Windows Visual Studio target 1698 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 1699 public: 1700 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 1701 : WindowsX86_32TargetInfo(triple) { 1702 LongDoubleWidth = LongDoubleAlign = 64; 1703 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1704 } 1705 virtual void getTargetDefines(const LangOptions &Opts, 1706 MacroBuilder &Builder) const { 1707 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1708 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 1709 // The value of the following reflects processor type. 1710 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 1711 // We lost the original triple, so we use the default. 1712 Builder.defineMacro("_M_IX86", "600"); 1713 } 1714 }; 1715 } // end anonymous namespace 1716 1717 namespace { 1718 // x86-32 MinGW target 1719 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 1720 public: 1721 MinGWX86_32TargetInfo(const std::string& triple) 1722 : WindowsX86_32TargetInfo(triple) { 1723 } 1724 virtual void getTargetDefines(const LangOptions &Opts, 1725 MacroBuilder &Builder) const { 1726 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 1727 DefineStd(Builder, "WIN32", Opts); 1728 DefineStd(Builder, "WINNT", Opts); 1729 Builder.defineMacro("_X86_"); 1730 Builder.defineMacro("__MSVCRT__"); 1731 Builder.defineMacro("__MINGW32__"); 1732 1733 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1734 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1735 if (Opts.Microsoft) 1736 // Provide "as-is" __declspec. 1737 Builder.defineMacro("__declspec", "__declspec"); 1738 else 1739 // Provide alias of __attribute__ like mingw32-gcc. 1740 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1741 } 1742 }; 1743 } // end anonymous namespace 1744 1745 namespace { 1746 // x86-32 Cygwin target 1747 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 1748 public: 1749 CygwinX86_32TargetInfo(const std::string& triple) 1750 : X86_32TargetInfo(triple) { 1751 TLSSupported = false; 1752 WCharType = UnsignedShort; 1753 DoubleAlign = LongLongAlign = 64; 1754 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1755 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1756 "a0:0:64-f80:32:32-n8:16:32"; 1757 } 1758 virtual void getTargetDefines(const LangOptions &Opts, 1759 MacroBuilder &Builder) const { 1760 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1761 Builder.defineMacro("__CYGWIN__"); 1762 Builder.defineMacro("__CYGWIN32__"); 1763 DefineStd(Builder, "unix", Opts); 1764 if (Opts.CPlusPlus) 1765 Builder.defineMacro("_GNU_SOURCE"); 1766 } 1767 }; 1768 } // end anonymous namespace 1769 1770 namespace { 1771 // x86-32 Haiku target 1772 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 1773 public: 1774 HaikuX86_32TargetInfo(const std::string& triple) 1775 : X86_32TargetInfo(triple) { 1776 SizeType = UnsignedLong; 1777 IntPtrType = SignedLong; 1778 PtrDiffType = SignedLong; 1779 this->UserLabelPrefix = ""; 1780 } 1781 virtual void getTargetDefines(const LangOptions &Opts, 1782 MacroBuilder &Builder) const { 1783 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1784 Builder.defineMacro("__INTEL__"); 1785 Builder.defineMacro("__HAIKU__"); 1786 } 1787 }; 1788 } // end anonymous namespace 1789 1790 // RTEMS Target 1791 template<typename Target> 1792 class RTEMSTargetInfo : public OSTargetInfo<Target> { 1793 protected: 1794 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 1795 MacroBuilder &Builder) const { 1796 // RTEMS defines; list based off of gcc output 1797 1798 Builder.defineMacro("__rtems__"); 1799 Builder.defineMacro("__ELF__"); 1800 } 1801 public: 1802 RTEMSTargetInfo(const std::string &triple) 1803 : OSTargetInfo<Target>(triple) { 1804 this->UserLabelPrefix = ""; 1805 1806 llvm::Triple Triple(triple); 1807 switch (Triple.getArch()) { 1808 default: 1809 case llvm::Triple::x86: 1810 // this->MCountName = ".mcount"; 1811 break; 1812 case llvm::Triple::mips: 1813 case llvm::Triple::mipsel: 1814 case llvm::Triple::ppc: 1815 case llvm::Triple::ppc64: 1816 // this->MCountName = "_mcount"; 1817 break; 1818 case llvm::Triple::arm: 1819 // this->MCountName = "__mcount"; 1820 break; 1821 } 1822 1823 } 1824 }; 1825 1826 namespace { 1827 // x86-32 RTEMS target 1828 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 1829 public: 1830 RTEMSX86_32TargetInfo(const std::string& triple) 1831 : X86_32TargetInfo(triple) { 1832 SizeType = UnsignedLong; 1833 IntPtrType = SignedLong; 1834 PtrDiffType = SignedLong; 1835 this->UserLabelPrefix = ""; 1836 } 1837 virtual void getTargetDefines(const LangOptions &Opts, 1838 MacroBuilder &Builder) const { 1839 X86_32TargetInfo::getTargetDefines(Opts, Builder); 1840 Builder.defineMacro("__INTEL__"); 1841 Builder.defineMacro("__rtems__"); 1842 } 1843 }; 1844 } // end anonymous namespace 1845 1846 namespace { 1847 // x86-64 generic target 1848 class X86_64TargetInfo : public X86TargetInfo { 1849 public: 1850 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 1851 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 1852 LongDoubleWidth = 128; 1853 LongDoubleAlign = 128; 1854 LargeArrayMinWidth = 128; 1855 LargeArrayAlign = 128; 1856 IntMaxType = SignedLong; 1857 UIntMaxType = UnsignedLong; 1858 Int64Type = SignedLong; 1859 RegParmMax = 6; 1860 1861 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1862 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 1863 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"; 1864 1865 // Use fpret only for long double. 1866 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 1867 } 1868 virtual const char *getVAListDeclaration() const { 1869 return "typedef struct __va_list_tag {" 1870 " unsigned gp_offset;" 1871 " unsigned fp_offset;" 1872 " void* overflow_arg_area;" 1873 " void* reg_save_area;" 1874 "} __va_list_tag;" 1875 "typedef __va_list_tag __builtin_va_list[1];"; 1876 } 1877 1878 int getEHDataRegisterNumber(unsigned RegNo) const { 1879 if (RegNo == 0) return 0; 1880 if (RegNo == 1) return 1; 1881 return -1; 1882 } 1883 }; 1884 } // end anonymous namespace 1885 1886 namespace { 1887 // x86-64 Windows target 1888 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 1889 public: 1890 WindowsX86_64TargetInfo(const std::string& triple) 1891 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 1892 TLSSupported = false; 1893 WCharType = UnsignedShort; 1894 LongWidth = LongAlign = 32; 1895 DoubleAlign = LongLongAlign = 64; 1896 IntMaxType = SignedLongLong; 1897 UIntMaxType = UnsignedLongLong; 1898 Int64Type = SignedLongLong; 1899 SizeType = UnsignedLongLong; 1900 PtrDiffType = SignedLongLong; 1901 IntPtrType = SignedLongLong; 1902 this->UserLabelPrefix = ""; 1903 } 1904 virtual void getTargetDefines(const LangOptions &Opts, 1905 MacroBuilder &Builder) const { 1906 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 1907 Builder.defineMacro("_WIN64"); 1908 } 1909 virtual const char *getVAListDeclaration() const { 1910 return "typedef char* __builtin_va_list;"; 1911 } 1912 }; 1913 } // end anonymous namespace 1914 1915 namespace { 1916 // x86-64 Windows Visual Studio target 1917 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 1918 public: 1919 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 1920 : WindowsX86_64TargetInfo(triple) { 1921 LongDoubleWidth = LongDoubleAlign = 64; 1922 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1923 } 1924 virtual void getTargetDefines(const LangOptions &Opts, 1925 MacroBuilder &Builder) const { 1926 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1927 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 1928 Builder.defineMacro("_M_X64"); 1929 Builder.defineMacro("_M_AMD64"); 1930 } 1931 }; 1932 } // end anonymous namespace 1933 1934 namespace { 1935 // x86-64 MinGW target 1936 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 1937 public: 1938 MinGWX86_64TargetInfo(const std::string& triple) 1939 : WindowsX86_64TargetInfo(triple) { 1940 } 1941 virtual void getTargetDefines(const LangOptions &Opts, 1942 MacroBuilder &Builder) const { 1943 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 1944 DefineStd(Builder, "WIN64", Opts); 1945 Builder.defineMacro("__MSVCRT__"); 1946 Builder.defineMacro("__MINGW32__"); 1947 Builder.defineMacro("__MINGW64__"); 1948 1949 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 1950 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 1951 if (Opts.Microsoft) 1952 // Provide "as-is" __declspec. 1953 Builder.defineMacro("__declspec", "__declspec"); 1954 else 1955 // Provide alias of __attribute__ like mingw32-gcc. 1956 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 1957 } 1958 }; 1959 } // end anonymous namespace 1960 1961 namespace { 1962 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 1963 public: 1964 DarwinX86_64TargetInfo(const std::string& triple) 1965 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 1966 Int64Type = SignedLongLong; 1967 } 1968 }; 1969 } // end anonymous namespace 1970 1971 namespace { 1972 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 1973 public: 1974 OpenBSDX86_64TargetInfo(const std::string& triple) 1975 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 1976 IntMaxType = SignedLongLong; 1977 UIntMaxType = UnsignedLongLong; 1978 Int64Type = SignedLongLong; 1979 } 1980 }; 1981 } // end anonymous namespace 1982 1983 namespace { 1984 class ARMTargetInfo : public TargetInfo { 1985 // Possible FPU choices. 1986 enum FPUMode { 1987 NoFPU, 1988 VFP2FPU, 1989 VFP3FPU, 1990 NeonFPU 1991 }; 1992 1993 static bool FPUModeIsVFP(FPUMode Mode) { 1994 return Mode >= VFP2FPU && Mode <= NeonFPU; 1995 } 1996 1997 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1998 static const char * const GCCRegNames[]; 1999 2000 std::string ABI, CPU; 2001 2002 unsigned FPU : 3; 2003 2004 unsigned IsThumb : 1; 2005 2006 // Initialized via features. 2007 unsigned SoftFloat : 1; 2008 unsigned SoftFloatABI : 1; 2009 2010 static const Builtin::Info BuiltinInfo[]; 2011 2012 public: 2013 ARMTargetInfo(const std::string &TripleStr) 2014 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2015 { 2016 SizeType = UnsignedInt; 2017 PtrDiffType = SignedInt; 2018 2019 // {} in inline assembly are neon specifiers, not assembly variant 2020 // specifiers. 2021 NoAsmVariants = true; 2022 2023 // FIXME: Should we just treat this as a feature? 2024 IsThumb = getTriple().getArchName().startswith("thumb"); 2025 if (IsThumb) { 2026 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2027 // so set preferred for small types to 32. 2028 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2029 "i64:64:64-f32:32:32-f64:64:64-" 2030 "v64:64:64-v128:64:128-a0:0:32-n32"); 2031 } else { 2032 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2033 "i64:64:64-f32:32:32-f64:64:64-" 2034 "v64:64:64-v128:64:128-a0:0:64-n32"); 2035 } 2036 2037 // ARM targets default to using the ARM C++ ABI. 2038 CXXABI = CXXABI_ARM; 2039 } 2040 virtual const char *getABI() const { return ABI.c_str(); } 2041 virtual bool setABI(const std::string &Name) { 2042 ABI = Name; 2043 2044 // The defaults (above) are for AAPCS, check if we need to change them. 2045 // 2046 // FIXME: We need support for -meabi... we could just mangle it into the 2047 // name. 2048 if (Name == "apcs-gnu") { 2049 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2050 SizeType = UnsignedLong; 2051 2052 // Do not respect the alignment of bit-field types when laying out 2053 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2054 UseBitFieldTypeAlignment = false; 2055 2056 /// Do force alignment of members that follow zero length bitfields. If 2057 /// the alignment of the zero-length bitfield is greater than the member 2058 /// that follows it, `bar', `bar' will be aligned as the type of the 2059 /// zero length bitfield. 2060 UseZeroLengthBitfieldAlignment = true; 2061 2062 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2063 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2064 /// gcc. 2065 ZeroLengthBitfieldBoundary = 32; 2066 2067 if (IsThumb) { 2068 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2069 // so set preferred for small types to 32. 2070 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2071 "i64:32:64-f32:32:32-f64:32:64-" 2072 "v64:32:64-v128:32:128-a0:0:32-n32"); 2073 } else { 2074 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2075 "i64:32:64-f32:32:32-f64:32:64-" 2076 "v64:32:64-v128:32:128-a0:0:32-n32"); 2077 } 2078 2079 // FIXME: Override "preferred align" for double and long long. 2080 } else if (Name == "aapcs") { 2081 // FIXME: Enumerated types are variable width in straight AAPCS. 2082 } else if (Name == "aapcs-linux") { 2083 ; 2084 } else 2085 return false; 2086 2087 return true; 2088 } 2089 2090 void getDefaultFeatures(const std::string &CPU, 2091 llvm::StringMap<bool> &Features) const { 2092 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2093 Features["vfp2"] = true; 2094 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2095 Features["neon"] = true; 2096 } 2097 2098 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2099 const std::string &Name, 2100 bool Enabled) const { 2101 if (Name == "soft-float" || Name == "soft-float-abi" || 2102 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2103 Features[Name] = Enabled; 2104 } else 2105 return false; 2106 2107 return true; 2108 } 2109 2110 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2111 FPU = NoFPU; 2112 SoftFloat = SoftFloatABI = false; 2113 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2114 if (Features[i] == "+soft-float") 2115 SoftFloat = true; 2116 else if (Features[i] == "+soft-float-abi") 2117 SoftFloatABI = true; 2118 else if (Features[i] == "+vfp2") 2119 FPU = VFP2FPU; 2120 else if (Features[i] == "+vfp3") 2121 FPU = VFP3FPU; 2122 else if (Features[i] == "+neon") 2123 FPU = NeonFPU; 2124 } 2125 2126 // Remove front-end specific options which the backend handles differently. 2127 std::vector<std::string>::iterator it; 2128 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2129 if (it != Features.end()) 2130 Features.erase(it); 2131 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2132 if (it != Features.end()) 2133 Features.erase(it); 2134 } 2135 2136 static const char *getCPUDefineSuffix(StringRef Name) { 2137 return llvm::StringSwitch<const char*>(Name) 2138 .Cases("arm8", "arm810", "4") 2139 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2140 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2141 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2142 .Case("ep9312", "4T") 2143 .Cases("arm10tdmi", "arm1020t", "5T") 2144 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2145 .Case("arm926ej-s", "5TEJ") 2146 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2147 .Cases("xscale", "iwmmxt", "5TE") 2148 .Case("arm1136j-s", "6J") 2149 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2150 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2151 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2152 .Cases("cortex-a8", "cortex-a9", "7A") 2153 .Case("cortex-m3", "7M") 2154 .Case("cortex-m0", "6M") 2155 .Default(0); 2156 } 2157 virtual bool setCPU(const std::string &Name) { 2158 if (!getCPUDefineSuffix(Name)) 2159 return false; 2160 2161 CPU = Name; 2162 return true; 2163 } 2164 virtual void getTargetDefines(const LangOptions &Opts, 2165 MacroBuilder &Builder) const { 2166 // Target identification. 2167 Builder.defineMacro("__arm"); 2168 Builder.defineMacro("__arm__"); 2169 2170 // Target properties. 2171 Builder.defineMacro("__ARMEL__"); 2172 Builder.defineMacro("__LITTLE_ENDIAN__"); 2173 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2174 2175 StringRef CPUArch = getCPUDefineSuffix(CPU); 2176 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2177 2178 // Subtarget options. 2179 2180 // FIXME: It's more complicated than this and we don't really support 2181 // interworking. 2182 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2183 Builder.defineMacro("__THUMB_INTERWORK__"); 2184 2185 if (ABI == "aapcs" || ABI == "aapcs-linux") 2186 Builder.defineMacro("__ARM_EABI__"); 2187 2188 if (SoftFloat) 2189 Builder.defineMacro("__SOFTFP__"); 2190 2191 if (CPU == "xscale") 2192 Builder.defineMacro("__XSCALE__"); 2193 2194 bool IsARMv7 = CPUArch.startswith("7"); 2195 if (IsThumb) { 2196 Builder.defineMacro("__THUMBEL__"); 2197 Builder.defineMacro("__thumb__"); 2198 if (CPUArch == "6T2" || IsARMv7) 2199 Builder.defineMacro("__thumb2__"); 2200 } 2201 2202 // Note, this is always on in gcc, even though it doesn't make sense. 2203 Builder.defineMacro("__APCS_32__"); 2204 2205 if (FPUModeIsVFP((FPUMode) FPU)) 2206 Builder.defineMacro("__VFP_FP__"); 2207 2208 // This only gets set when Neon instructions are actually available, unlike 2209 // the VFP define, hence the soft float and arch check. This is subtly 2210 // different from gcc, we follow the intent which was that it should be set 2211 // when Neon instructions are actually available. 2212 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2213 Builder.defineMacro("__ARM_NEON__"); 2214 } 2215 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2216 unsigned &NumRecords) const { 2217 Records = BuiltinInfo; 2218 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2219 } 2220 virtual const char *getVAListDeclaration() const { 2221 return "typedef void* __builtin_va_list;"; 2222 } 2223 virtual void getGCCRegNames(const char * const *&Names, 2224 unsigned &NumNames) const; 2225 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2226 unsigned &NumAliases) const; 2227 virtual bool validateAsmConstraint(const char *&Name, 2228 TargetInfo::ConstraintInfo &Info) const { 2229 // FIXME: Check if this is complete 2230 switch (*Name) { 2231 default: 2232 case 'l': // r0-r7 2233 case 'h': // r8-r15 2234 case 'w': // VFP Floating point register single precision 2235 case 'P': // VFP Floating point register double precision 2236 Info.setAllowsRegister(); 2237 return true; 2238 case 'Q': // A memory address that is a single base register. 2239 Info.setAllowsMemory(); 2240 return true; 2241 case 'U': // a memory reference... 2242 switch (Name[1]) { 2243 case 'q': // ...ARMV4 ldrsb 2244 case 'v': // ...VFP load/store (reg+constant offset) 2245 case 'y': // ...iWMMXt load/store 2246 case 't': // address valid for load/store opaque types wider 2247 // than 128-bits 2248 case 'n': // valid address for Neon doubleword vector load/store 2249 case 'm': // valid address for Neon element and structure load/store 2250 case 's': // valid address for non-offset loads/stores of quad-word 2251 // values in four ARM registers 2252 Info.setAllowsMemory(); 2253 Name++; 2254 return true; 2255 } 2256 } 2257 return false; 2258 } 2259 virtual std::string convertConstraint(const char *&Constraint) const { 2260 std::string R; 2261 switch (*Constraint) { 2262 case 'U': // Two-character constraint; add "^" hint for later parsing. 2263 R = std::string("^") + std::string(Constraint, 2); 2264 Constraint++; 2265 break; 2266 case 'p': // 'p' should be translated to 'r' by default. 2267 R = std::string("r"); 2268 break; 2269 default: 2270 return std::string(1, *Constraint); 2271 } 2272 return R; 2273 } 2274 virtual const char *getClobbers() const { 2275 // FIXME: Is this really right? 2276 return ""; 2277 } 2278 }; 2279 2280 const char * const ARMTargetInfo::GCCRegNames[] = { 2281 // Integer registers 2282 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2283 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2284 2285 // Float registers 2286 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2287 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2288 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2289 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2290 2291 // Double registers 2292 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2293 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2294 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2295 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2296 2297 // Quad registers 2298 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2299 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2300 }; 2301 2302 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2303 unsigned &NumNames) const { 2304 Names = GCCRegNames; 2305 NumNames = llvm::array_lengthof(GCCRegNames); 2306 } 2307 2308 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2309 { { "a1" }, "r0" }, 2310 { { "a2" }, "r1" }, 2311 { { "a3" }, "r2" }, 2312 { { "a4" }, "r3" }, 2313 { { "v1" }, "r4" }, 2314 { { "v2" }, "r5" }, 2315 { { "v3" }, "r6" }, 2316 { { "v4" }, "r7" }, 2317 { { "v5" }, "r8" }, 2318 { { "v6", "rfp" }, "r9" }, 2319 { { "sl" }, "r10" }, 2320 { { "fp" }, "r11" }, 2321 { { "ip" }, "r12" }, 2322 { { "r13" }, "sp" }, 2323 { { "r14" }, "lr" }, 2324 { { "r15" }, "pc" }, 2325 // The S, D and Q registers overlap, but aren't really aliases; we 2326 // don't want to substitute one of these for a different-sized one. 2327 }; 2328 2329 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2330 unsigned &NumAliases) const { 2331 Aliases = GCCRegAliases; 2332 NumAliases = llvm::array_lengthof(GCCRegAliases); 2333 } 2334 2335 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2336 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2337 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2338 ALL_LANGUAGES }, 2339 #include "clang/Basic/BuiltinsARM.def" 2340 }; 2341 } // end anonymous namespace. 2342 2343 2344 namespace { 2345 class DarwinARMTargetInfo : 2346 public DarwinTargetInfo<ARMTargetInfo> { 2347 protected: 2348 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2349 MacroBuilder &Builder) const { 2350 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2351 } 2352 2353 public: 2354 DarwinARMTargetInfo(const std::string& triple) 2355 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2356 HasAlignMac68kSupport = true; 2357 } 2358 }; 2359 } // end anonymous namespace. 2360 2361 namespace { 2362 class SparcV8TargetInfo : public TargetInfo { 2363 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2364 static const char * const GCCRegNames[]; 2365 bool SoftFloat; 2366 public: 2367 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2368 // FIXME: Support Sparc quad-precision long double? 2369 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2370 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2371 } 2372 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2373 const std::string &Name, 2374 bool Enabled) const { 2375 if (Name == "soft-float") 2376 Features[Name] = Enabled; 2377 else 2378 return false; 2379 2380 return true; 2381 } 2382 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2383 SoftFloat = false; 2384 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2385 if (Features[i] == "+soft-float") 2386 SoftFloat = true; 2387 } 2388 virtual void getTargetDefines(const LangOptions &Opts, 2389 MacroBuilder &Builder) const { 2390 DefineStd(Builder, "sparc", Opts); 2391 Builder.defineMacro("__sparcv8"); 2392 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2393 2394 if (SoftFloat) 2395 Builder.defineMacro("SOFT_FLOAT", "1"); 2396 } 2397 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2398 unsigned &NumRecords) const { 2399 // FIXME: Implement! 2400 } 2401 virtual const char *getVAListDeclaration() const { 2402 return "typedef void* __builtin_va_list;"; 2403 } 2404 virtual void getGCCRegNames(const char * const *&Names, 2405 unsigned &NumNames) const; 2406 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2407 unsigned &NumAliases) const; 2408 virtual bool validateAsmConstraint(const char *&Name, 2409 TargetInfo::ConstraintInfo &info) const { 2410 // FIXME: Implement! 2411 return false; 2412 } 2413 virtual const char *getClobbers() const { 2414 // FIXME: Implement! 2415 return ""; 2416 } 2417 }; 2418 2419 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2420 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2421 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2422 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2423 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2424 }; 2425 2426 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2427 unsigned &NumNames) const { 2428 Names = GCCRegNames; 2429 NumNames = llvm::array_lengthof(GCCRegNames); 2430 } 2431 2432 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2433 { { "g0" }, "r0" }, 2434 { { "g1" }, "r1" }, 2435 { { "g2" }, "r2" }, 2436 { { "g3" }, "r3" }, 2437 { { "g4" }, "r4" }, 2438 { { "g5" }, "r5" }, 2439 { { "g6" }, "r6" }, 2440 { { "g7" }, "r7" }, 2441 { { "o0" }, "r8" }, 2442 { { "o1" }, "r9" }, 2443 { { "o2" }, "r10" }, 2444 { { "o3" }, "r11" }, 2445 { { "o4" }, "r12" }, 2446 { { "o5" }, "r13" }, 2447 { { "o6", "sp" }, "r14" }, 2448 { { "o7" }, "r15" }, 2449 { { "l0" }, "r16" }, 2450 { { "l1" }, "r17" }, 2451 { { "l2" }, "r18" }, 2452 { { "l3" }, "r19" }, 2453 { { "l4" }, "r20" }, 2454 { { "l5" }, "r21" }, 2455 { { "l6" }, "r22" }, 2456 { { "l7" }, "r23" }, 2457 { { "i0" }, "r24" }, 2458 { { "i1" }, "r25" }, 2459 { { "i2" }, "r26" }, 2460 { { "i3" }, "r27" }, 2461 { { "i4" }, "r28" }, 2462 { { "i5" }, "r29" }, 2463 { { "i6", "fp" }, "r30" }, 2464 { { "i7" }, "r31" }, 2465 }; 2466 2467 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2468 unsigned &NumAliases) const { 2469 Aliases = GCCRegAliases; 2470 NumAliases = llvm::array_lengthof(GCCRegAliases); 2471 } 2472 } // end anonymous namespace. 2473 2474 namespace { 2475 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2476 public: 2477 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2478 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2479 SizeType = UnsignedInt; 2480 PtrDiffType = SignedInt; 2481 } 2482 }; 2483 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2484 public: 2485 SolarisSparcV8TargetInfo(const std::string& triple) : 2486 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2487 SizeType = UnsignedInt; 2488 PtrDiffType = SignedInt; 2489 } 2490 }; 2491 } // end anonymous namespace. 2492 2493 namespace { 2494 class MSP430TargetInfo : public TargetInfo { 2495 static const char * const GCCRegNames[]; 2496 public: 2497 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2498 TLSSupported = false; 2499 IntWidth = 16; IntAlign = 16; 2500 LongWidth = 32; LongLongWidth = 64; 2501 LongAlign = LongLongAlign = 16; 2502 PointerWidth = 16; PointerAlign = 16; 2503 SizeType = UnsignedInt; 2504 IntMaxType = SignedLong; 2505 UIntMaxType = UnsignedLong; 2506 IntPtrType = SignedShort; 2507 PtrDiffType = SignedInt; 2508 SigAtomicType = SignedLong; 2509 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2510 } 2511 virtual void getTargetDefines(const LangOptions &Opts, 2512 MacroBuilder &Builder) const { 2513 Builder.defineMacro("MSP430"); 2514 Builder.defineMacro("__MSP430__"); 2515 // FIXME: defines for different 'flavours' of MCU 2516 } 2517 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2518 unsigned &NumRecords) const { 2519 // FIXME: Implement. 2520 Records = 0; 2521 NumRecords = 0; 2522 } 2523 virtual void getGCCRegNames(const char * const *&Names, 2524 unsigned &NumNames) const; 2525 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2526 unsigned &NumAliases) const { 2527 // No aliases. 2528 Aliases = 0; 2529 NumAliases = 0; 2530 } 2531 virtual bool validateAsmConstraint(const char *&Name, 2532 TargetInfo::ConstraintInfo &info) const { 2533 // No target constraints for now. 2534 return false; 2535 } 2536 virtual const char *getClobbers() const { 2537 // FIXME: Is this really right? 2538 return ""; 2539 } 2540 virtual const char *getVAListDeclaration() const { 2541 // FIXME: implement 2542 return "typedef char* __builtin_va_list;"; 2543 } 2544 }; 2545 2546 const char * const MSP430TargetInfo::GCCRegNames[] = { 2547 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2548 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2549 }; 2550 2551 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2552 unsigned &NumNames) const { 2553 Names = GCCRegNames; 2554 NumNames = llvm::array_lengthof(GCCRegNames); 2555 } 2556 } 2557 2558 2559 namespace { 2560 class SystemZTargetInfo : public TargetInfo { 2561 static const char * const GCCRegNames[]; 2562 public: 2563 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2564 TLSSupported = false; 2565 IntWidth = IntAlign = 32; 2566 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2567 PointerWidth = PointerAlign = 64; 2568 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2569 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2570 } 2571 virtual void getTargetDefines(const LangOptions &Opts, 2572 MacroBuilder &Builder) const { 2573 Builder.defineMacro("__s390__"); 2574 Builder.defineMacro("__s390x__"); 2575 } 2576 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2577 unsigned &NumRecords) const { 2578 // FIXME: Implement. 2579 Records = 0; 2580 NumRecords = 0; 2581 } 2582 2583 virtual void getGCCRegNames(const char * const *&Names, 2584 unsigned &NumNames) const; 2585 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2586 unsigned &NumAliases) const { 2587 // No aliases. 2588 Aliases = 0; 2589 NumAliases = 0; 2590 } 2591 virtual bool validateAsmConstraint(const char *&Name, 2592 TargetInfo::ConstraintInfo &info) const { 2593 // FIXME: implement 2594 return true; 2595 } 2596 virtual const char *getClobbers() const { 2597 // FIXME: Is this really right? 2598 return ""; 2599 } 2600 virtual const char *getVAListDeclaration() const { 2601 // FIXME: implement 2602 return "typedef char* __builtin_va_list;"; 2603 } 2604 }; 2605 2606 const char * const SystemZTargetInfo::GCCRegNames[] = { 2607 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2608 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2609 }; 2610 2611 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2612 unsigned &NumNames) const { 2613 Names = GCCRegNames; 2614 NumNames = llvm::array_lengthof(GCCRegNames); 2615 } 2616 } 2617 2618 namespace { 2619 class BlackfinTargetInfo : public TargetInfo { 2620 static const char * const GCCRegNames[]; 2621 public: 2622 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2623 TLSSupported = false; 2624 DoubleAlign = 32; 2625 LongLongAlign = 32; 2626 LongDoubleAlign = 32; 2627 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2628 } 2629 2630 virtual void getTargetDefines(const LangOptions &Opts, 2631 MacroBuilder &Builder) const { 2632 DefineStd(Builder, "bfin", Opts); 2633 DefineStd(Builder, "BFIN", Opts); 2634 Builder.defineMacro("__ADSPBLACKFIN__"); 2635 // FIXME: This one is really dependent on -mcpu 2636 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2637 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2638 } 2639 2640 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2641 unsigned &NumRecords) const { 2642 // FIXME: Implement. 2643 Records = 0; 2644 NumRecords = 0; 2645 } 2646 2647 virtual void getGCCRegNames(const char * const *&Names, 2648 unsigned &NumNames) const; 2649 2650 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2651 unsigned &NumAliases) const { 2652 // No aliases. 2653 Aliases = 0; 2654 NumAliases = 0; 2655 } 2656 2657 virtual bool validateAsmConstraint(const char *&Name, 2658 TargetInfo::ConstraintInfo &Info) const { 2659 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 2660 Info.setAllowsRegister(); 2661 return true; 2662 } 2663 return false; 2664 } 2665 2666 virtual const char *getClobbers() const { 2667 return ""; 2668 } 2669 2670 virtual const char *getVAListDeclaration() const { 2671 return "typedef char* __builtin_va_list;"; 2672 } 2673 }; 2674 2675 const char * const BlackfinTargetInfo::GCCRegNames[] = { 2676 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2677 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 2678 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 2679 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 2680 "a0", "a1", "cc", 2681 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 2682 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 2683 }; 2684 2685 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 2686 unsigned &NumNames) const { 2687 Names = GCCRegNames; 2688 NumNames = llvm::array_lengthof(GCCRegNames); 2689 } 2690 } 2691 2692 namespace { 2693 2694 // LLVM and Clang cannot be used directly to output native binaries for 2695 // target, but is used to compile C code to llvm bitcode with correct 2696 // type and alignment information. 2697 // 2698 // TCE uses the llvm bitcode as input and uses it for generating customized 2699 // target processor and program binary. TCE co-design environment is 2700 // publicly available in http://tce.cs.tut.fi 2701 2702 class TCETargetInfo : public TargetInfo{ 2703 public: 2704 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2705 TLSSupported = false; 2706 IntWidth = 32; 2707 LongWidth = LongLongWidth = 32; 2708 PointerWidth = 32; 2709 IntAlign = 32; 2710 LongAlign = LongLongAlign = 32; 2711 PointerAlign = 32; 2712 SizeType = UnsignedInt; 2713 IntMaxType = SignedLong; 2714 UIntMaxType = UnsignedLong; 2715 IntPtrType = SignedInt; 2716 PtrDiffType = SignedInt; 2717 FloatWidth = 32; 2718 FloatAlign = 32; 2719 DoubleWidth = 32; 2720 DoubleAlign = 32; 2721 LongDoubleWidth = 32; 2722 LongDoubleAlign = 32; 2723 FloatFormat = &llvm::APFloat::IEEEsingle; 2724 DoubleFormat = &llvm::APFloat::IEEEsingle; 2725 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 2726 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 2727 "i16:16:32-i32:32:32-i64:32:32-" 2728 "f32:32:32-f64:32:32-v64:32:32-" 2729 "v128:32:32-a0:0:32-n32"; 2730 } 2731 2732 virtual void getTargetDefines(const LangOptions &Opts, 2733 MacroBuilder &Builder) const { 2734 DefineStd(Builder, "tce", Opts); 2735 Builder.defineMacro("__TCE__"); 2736 Builder.defineMacro("__TCE_V1__"); 2737 } 2738 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2739 unsigned &NumRecords) const {} 2740 virtual const char *getClobbers() const { 2741 return ""; 2742 } 2743 virtual const char *getVAListDeclaration() const { 2744 return "typedef void* __builtin_va_list;"; 2745 } 2746 virtual void getGCCRegNames(const char * const *&Names, 2747 unsigned &NumNames) const {} 2748 virtual bool validateAsmConstraint(const char *&Name, 2749 TargetInfo::ConstraintInfo &info) const { 2750 return true; 2751 } 2752 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2753 unsigned &NumAliases) const {} 2754 }; 2755 } 2756 2757 namespace { 2758 class MipsTargetInfo : public TargetInfo { 2759 std::string ABI, CPU; 2760 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2761 static const char * const GCCRegNames[]; 2762 public: 2763 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") { 2764 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2765 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2766 SizeType = UnsignedInt; 2767 PtrDiffType = SignedInt; 2768 } 2769 virtual const char *getABI() const { return ABI.c_str(); } 2770 virtual bool setABI(const std::string &Name) { 2771 2772 if ((Name == "o32") || (Name == "eabi")) { 2773 ABI = Name; 2774 return true; 2775 } else 2776 return false; 2777 } 2778 virtual bool setCPU(const std::string &Name) { 2779 CPU = Name; 2780 return true; 2781 } 2782 void getDefaultFeatures(const std::string &CPU, 2783 llvm::StringMap<bool> &Features) const { 2784 Features[ABI] = true; 2785 Features[CPU] = true; 2786 } 2787 virtual void getArchDefines(const LangOptions &Opts, 2788 MacroBuilder &Builder) const { 2789 // NOTE: O64 will not be supported. 2790 if (ABI == "o32") { 2791 Builder.defineMacro("__mips_o32"); 2792 Builder.defineMacro("_ABIO32", "1"); 2793 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 2794 } 2795 else if (ABI == "n32") { 2796 Builder.defineMacro("__mips_n32"); 2797 Builder.defineMacro("_ABIN32", "2"); 2798 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 2799 } 2800 else if (ABI == "n64") { 2801 Builder.defineMacro("__mips_n64"); 2802 Builder.defineMacro("_ABI64", "3"); 2803 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 2804 } 2805 else if (ABI == "eabi") 2806 Builder.defineMacro("__mips_eabi"); 2807 } 2808 virtual void getTargetDefines(const LangOptions &Opts, 2809 MacroBuilder &Builder) const { 2810 DefineStd(Builder, "mips", Opts); 2811 Builder.defineMacro("_mips"); 2812 DefineStd(Builder, "MIPSEB", Opts); 2813 Builder.defineMacro("_MIPSEB"); 2814 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2815 getArchDefines(Opts, Builder); 2816 } 2817 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2818 unsigned &NumRecords) const { 2819 // FIXME: Implement! 2820 } 2821 virtual const char *getVAListDeclaration() const { 2822 return "typedef void* __builtin_va_list;"; 2823 } 2824 virtual void getGCCRegNames(const char * const *&Names, 2825 unsigned &NumNames) const; 2826 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2827 unsigned &NumAliases) const; 2828 virtual bool validateAsmConstraint(const char *&Name, 2829 TargetInfo::ConstraintInfo &Info) const { 2830 switch (*Name) { 2831 default: 2832 case 'r': // CPU registers. 2833 case 'd': // Equivalent to "r" unless generating MIPS16 code. 2834 case 'y': // Equivalent to "r", backwards compatibility only. 2835 case 'f': // floating-point registers. 2836 Info.setAllowsRegister(); 2837 return true; 2838 } 2839 return false; 2840 } 2841 2842 virtual const char *getClobbers() const { 2843 // FIXME: Implement! 2844 return ""; 2845 } 2846 }; 2847 2848 const char * const MipsTargetInfo::GCCRegNames[] = { 2849 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 2850 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 2851 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 2852 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 2853 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 2854 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 2855 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 2856 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 2857 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 2858 "$fcc5","$fcc6","$fcc7" 2859 }; 2860 2861 void MipsTargetInfo::getGCCRegNames(const char * const *&Names, 2862 unsigned &NumNames) const { 2863 Names = GCCRegNames; 2864 NumNames = llvm::array_lengthof(GCCRegNames); 2865 } 2866 2867 const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = { 2868 { { "at" }, "$1" }, 2869 { { "v0" }, "$2" }, 2870 { { "v1" }, "$3" }, 2871 { { "a0" }, "$4" }, 2872 { { "a1" }, "$5" }, 2873 { { "a2" }, "$6" }, 2874 { { "a3" }, "$7" }, 2875 { { "t0" }, "$8" }, 2876 { { "t1" }, "$9" }, 2877 { { "t2" }, "$10" }, 2878 { { "t3" }, "$11" }, 2879 { { "t4" }, "$12" }, 2880 { { "t5" }, "$13" }, 2881 { { "t6" }, "$14" }, 2882 { { "t7" }, "$15" }, 2883 { { "s0" }, "$16" }, 2884 { { "s1" }, "$17" }, 2885 { { "s2" }, "$18" }, 2886 { { "s3" }, "$19" }, 2887 { { "s4" }, "$20" }, 2888 { { "s5" }, "$21" }, 2889 { { "s6" }, "$22" }, 2890 { { "s7" }, "$23" }, 2891 { { "t8" }, "$24" }, 2892 { { "t9" }, "$25" }, 2893 { { "k0" }, "$26" }, 2894 { { "k1" }, "$27" }, 2895 { { "gp" }, "$28" }, 2896 { { "sp" }, "$29" }, 2897 { { "fp" }, "$30" }, 2898 { { "ra" }, "$31" } 2899 }; 2900 2901 void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2902 unsigned &NumAliases) const { 2903 Aliases = GCCRegAliases; 2904 NumAliases = llvm::array_lengthof(GCCRegAliases); 2905 } 2906 } // end anonymous namespace. 2907 2908 namespace { 2909 class MipselTargetInfo : public MipsTargetInfo { 2910 public: 2911 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) { 2912 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 2913 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2914 } 2915 2916 virtual void getTargetDefines(const LangOptions &Opts, 2917 MacroBuilder &Builder) const; 2918 }; 2919 2920 void MipselTargetInfo::getTargetDefines(const LangOptions &Opts, 2921 MacroBuilder &Builder) const { 2922 DefineStd(Builder, "mips", Opts); 2923 Builder.defineMacro("_mips"); 2924 DefineStd(Builder, "MIPSEL", Opts); 2925 Builder.defineMacro("_MIPSEL"); 2926 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2927 getArchDefines(Opts, Builder); 2928 } 2929 } // end anonymous namespace. 2930 2931 namespace { 2932 class PNaClTargetInfo : public TargetInfo { 2933 public: 2934 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 2935 this->UserLabelPrefix = ""; 2936 this->LongAlign = 32; 2937 this->LongWidth = 32; 2938 this->PointerAlign = 32; 2939 this->PointerWidth = 32; 2940 this->IntMaxType = TargetInfo::SignedLongLong; 2941 this->UIntMaxType = TargetInfo::UnsignedLongLong; 2942 this->Int64Type = TargetInfo::SignedLongLong; 2943 this->SizeType = TargetInfo::UnsignedInt; 2944 this->DoubleAlign = 64; 2945 this->LongDoubleAlign = 64; 2946 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 2947 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 2948 } 2949 2950 void getDefaultFeatures(const std::string &CPU, 2951 llvm::StringMap<bool> &Features) const { 2952 } 2953 virtual void getArchDefines(const LangOptions &Opts, 2954 MacroBuilder &Builder) const { 2955 Builder.defineMacro("__le32__"); 2956 Builder.defineMacro("__pnacl__"); 2957 } 2958 virtual void getTargetDefines(const LangOptions &Opts, 2959 MacroBuilder &Builder) const { 2960 DefineStd(Builder, "unix", Opts); 2961 Builder.defineMacro("__ELF__"); 2962 if (Opts.POSIXThreads) 2963 Builder.defineMacro("_REENTRANT"); 2964 if (Opts.CPlusPlus) 2965 Builder.defineMacro("_GNU_SOURCE"); 2966 2967 Builder.defineMacro("__native_client__"); 2968 getArchDefines(Opts, Builder); 2969 } 2970 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2971 unsigned &NumRecords) const { 2972 } 2973 virtual const char *getVAListDeclaration() const { 2974 return "typedef struct __va_list_tag {" 2975 " void* ptr;" 2976 " void* padding1;" 2977 " void* padding2;" 2978 " void* padding3;" 2979 "} __builtin_va_list[1];"; 2980 } 2981 virtual void getGCCRegNames(const char * const *&Names, 2982 unsigned &NumNames) const; 2983 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2984 unsigned &NumAliases) const; 2985 virtual bool validateAsmConstraint(const char *&Name, 2986 TargetInfo::ConstraintInfo &Info) const { 2987 return false; 2988 } 2989 2990 virtual const char *getClobbers() const { 2991 return ""; 2992 } 2993 }; 2994 2995 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 2996 unsigned &NumNames) const { 2997 Names = NULL; 2998 NumNames = 0; 2999 } 3000 3001 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3002 unsigned &NumAliases) const { 3003 Aliases = NULL; 3004 NumAliases = 0; 3005 } 3006 } // end anonymous namespace. 3007 3008 3009 //===----------------------------------------------------------------------===// 3010 // Driver code 3011 //===----------------------------------------------------------------------===// 3012 3013 static TargetInfo *AllocateTarget(const std::string &T) { 3014 llvm::Triple Triple(T); 3015 llvm::Triple::OSType os = Triple.getOS(); 3016 3017 switch (Triple.getArch()) { 3018 default: 3019 return NULL; 3020 3021 case llvm::Triple::arm: 3022 case llvm::Triple::thumb: 3023 if (Triple.isOSDarwin()) 3024 return new DarwinARMTargetInfo(T); 3025 3026 switch (os) { 3027 case llvm::Triple::Linux: 3028 return new LinuxTargetInfo<ARMTargetInfo>(T); 3029 case llvm::Triple::FreeBSD: 3030 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3031 case llvm::Triple::NetBSD: 3032 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3033 case llvm::Triple::RTEMS: 3034 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3035 default: 3036 return new ARMTargetInfo(T); 3037 } 3038 3039 case llvm::Triple::bfin: 3040 if ( os == llvm::Triple::RTEMS ) 3041 return new RTEMSTargetInfo<BlackfinTargetInfo>(T); 3042 return new BlackfinTargetInfo(T); 3043 3044 case llvm::Triple::msp430: 3045 return new MSP430TargetInfo(T); 3046 3047 case llvm::Triple::mips: 3048 switch (os) { 3049 case llvm::Triple::Linux: 3050 return new LinuxTargetInfo<MipsTargetInfo>(T); 3051 case llvm::Triple::RTEMS: 3052 return new RTEMSTargetInfo<MipsTargetInfo>(T); 3053 case llvm::Triple::FreeBSD: 3054 return new FreeBSDTargetInfo<MipsTargetInfo>(T); 3055 case llvm::Triple::NetBSD: 3056 return new NetBSDTargetInfo<MipsTargetInfo>(T); 3057 default: 3058 return new MipsTargetInfo(T); 3059 } 3060 3061 case llvm::Triple::mipsel: 3062 switch (os) { 3063 case llvm::Triple::Linux: 3064 return new LinuxTargetInfo<MipselTargetInfo>(T); 3065 case llvm::Triple::RTEMS: 3066 return new RTEMSTargetInfo<MipselTargetInfo>(T); 3067 case llvm::Triple::FreeBSD: 3068 return new FreeBSDTargetInfo<MipselTargetInfo>(T); 3069 case llvm::Triple::NetBSD: 3070 return new NetBSDTargetInfo<MipselTargetInfo>(T); 3071 default: 3072 return new MipsTargetInfo(T); 3073 } 3074 3075 case llvm::Triple::le32: 3076 switch (os) { 3077 case llvm::Triple::NativeClient: 3078 return new PNaClTargetInfo(T); 3079 default: 3080 return NULL; 3081 } 3082 3083 case llvm::Triple::ppc: 3084 if (Triple.isOSDarwin()) 3085 return new DarwinPPC32TargetInfo(T); 3086 switch (os) { 3087 case llvm::Triple::FreeBSD: 3088 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3089 case llvm::Triple::NetBSD: 3090 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3091 case llvm::Triple::RTEMS: 3092 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3093 default: 3094 return new PPC32TargetInfo(T); 3095 } 3096 3097 case llvm::Triple::ppc64: 3098 if (Triple.isOSDarwin()) 3099 return new DarwinPPC64TargetInfo(T); 3100 switch (os) { 3101 case llvm::Triple::Lv2: 3102 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3103 case llvm::Triple::FreeBSD: 3104 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3105 case llvm::Triple::NetBSD: 3106 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3107 default: 3108 return new PPC64TargetInfo(T); 3109 } 3110 3111 case llvm::Triple::ptx32: 3112 return new PTX32TargetInfo(T); 3113 case llvm::Triple::ptx64: 3114 return new PTX64TargetInfo(T); 3115 3116 case llvm::Triple::mblaze: 3117 return new MBlazeTargetInfo(T); 3118 3119 case llvm::Triple::sparc: 3120 switch (os) { 3121 case llvm::Triple::AuroraUX: 3122 return new AuroraUXSparcV8TargetInfo(T); 3123 case llvm::Triple::Solaris: 3124 return new SolarisSparcV8TargetInfo(T); 3125 case llvm::Triple::NetBSD: 3126 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3127 case llvm::Triple::RTEMS: 3128 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3129 default: 3130 return new SparcV8TargetInfo(T); 3131 } 3132 3133 // FIXME: Need a real SPU target. 3134 case llvm::Triple::cellspu: 3135 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3136 3137 case llvm::Triple::systemz: 3138 return new SystemZTargetInfo(T); 3139 3140 case llvm::Triple::tce: 3141 return new TCETargetInfo(T); 3142 3143 case llvm::Triple::x86: 3144 if (Triple.isOSDarwin()) 3145 return new DarwinI386TargetInfo(T); 3146 3147 switch (os) { 3148 case llvm::Triple::AuroraUX: 3149 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3150 case llvm::Triple::Linux: 3151 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3152 case llvm::Triple::DragonFly: 3153 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3154 case llvm::Triple::NetBSD: 3155 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3156 case llvm::Triple::OpenBSD: 3157 return new OpenBSDI386TargetInfo(T); 3158 case llvm::Triple::FreeBSD: 3159 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3160 case llvm::Triple::Minix: 3161 return new MinixTargetInfo<X86_32TargetInfo>(T); 3162 case llvm::Triple::Solaris: 3163 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3164 case llvm::Triple::Cygwin: 3165 return new CygwinX86_32TargetInfo(T); 3166 case llvm::Triple::MinGW32: 3167 return new MinGWX86_32TargetInfo(T); 3168 case llvm::Triple::Win32: 3169 return new VisualStudioWindowsX86_32TargetInfo(T); 3170 case llvm::Triple::Haiku: 3171 return new HaikuX86_32TargetInfo(T); 3172 case llvm::Triple::RTEMS: 3173 return new RTEMSX86_32TargetInfo(T); 3174 default: 3175 return new X86_32TargetInfo(T); 3176 } 3177 3178 case llvm::Triple::x86_64: 3179 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3180 return new DarwinX86_64TargetInfo(T); 3181 3182 switch (os) { 3183 case llvm::Triple::AuroraUX: 3184 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3185 case llvm::Triple::Linux: 3186 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3187 case llvm::Triple::DragonFly: 3188 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3189 case llvm::Triple::NetBSD: 3190 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3191 case llvm::Triple::OpenBSD: 3192 return new OpenBSDX86_64TargetInfo(T); 3193 case llvm::Triple::FreeBSD: 3194 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3195 case llvm::Triple::Solaris: 3196 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3197 case llvm::Triple::MinGW32: 3198 return new MinGWX86_64TargetInfo(T); 3199 case llvm::Triple::Win32: // This is what Triple.h supports now. 3200 return new VisualStudioWindowsX86_64TargetInfo(T); 3201 default: 3202 return new X86_64TargetInfo(T); 3203 } 3204 } 3205 } 3206 3207 /// CreateTargetInfo - Return the target info object for the specified target 3208 /// triple. 3209 TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags, 3210 TargetOptions &Opts) { 3211 llvm::Triple Triple(Opts.Triple); 3212 3213 // Construct the target 3214 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3215 if (!Target) { 3216 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3217 return 0; 3218 } 3219 3220 // Set the target CPU if specified. 3221 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3222 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3223 return 0; 3224 } 3225 3226 // Set the target ABI if specified. 3227 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3228 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3229 return 0; 3230 } 3231 3232 // Set the target C++ ABI. 3233 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3234 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3235 return 0; 3236 } 3237 3238 // Compute the default target features, we need the target to handle this 3239 // because features may have dependencies on one another. 3240 llvm::StringMap<bool> Features; 3241 Target->getDefaultFeatures(Opts.CPU, Features); 3242 3243 // Apply the user specified deltas. 3244 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3245 ie = Opts.Features.end(); it != ie; ++it) { 3246 const char *Name = it->c_str(); 3247 3248 // Apply the feature via the target. 3249 if ((Name[0] != '-' && Name[0] != '+') || 3250 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3251 Diags.Report(diag::err_target_invalid_feature) << Name; 3252 return 0; 3253 } 3254 } 3255 3256 // Add the features to the compile options. 3257 // 3258 // FIXME: If we are completely confident that we have the right set, we only 3259 // need to pass the minuses. 3260 Opts.Features.clear(); 3261 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3262 ie = Features.end(); it != ie; ++it) 3263 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3264 it->first().str()); 3265 Target->HandleTargetFeatures(Opts.Features); 3266 3267 return Target.take(); 3268 } 3269