1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 // FIXME: Move version number handling to llvm::Triple. 251 StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1); 252 253 Builder.defineMacro("__FreeBSD__", Release); 254 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001"); 255 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 256 DefineStd(Builder, "unix", Opts); 257 Builder.defineMacro("__ELF__"); 258 } 259 public: 260 FreeBSDTargetInfo(const std::string &triple) 261 : OSTargetInfo<Target>(triple) { 262 this->UserLabelPrefix = ""; 263 264 llvm::Triple Triple(triple); 265 switch (Triple.getArch()) { 266 default: 267 case llvm::Triple::x86: 268 case llvm::Triple::x86_64: 269 this->MCountName = ".mcount"; 270 break; 271 case llvm::Triple::mips: 272 case llvm::Triple::mipsel: 273 case llvm::Triple::ppc: 274 case llvm::Triple::ppc64: 275 this->MCountName = "_mcount"; 276 break; 277 case llvm::Triple::arm: 278 this->MCountName = "__mcount"; 279 break; 280 } 281 282 } 283 }; 284 285 // Minix Target 286 template<typename Target> 287 class MinixTargetInfo : public OSTargetInfo<Target> { 288 protected: 289 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 290 MacroBuilder &Builder) const { 291 // Minix defines 292 293 Builder.defineMacro("__minix", "3"); 294 Builder.defineMacro("_EM_WSIZE", "4"); 295 Builder.defineMacro("_EM_PSIZE", "4"); 296 Builder.defineMacro("_EM_SSIZE", "2"); 297 Builder.defineMacro("_EM_LSIZE", "4"); 298 Builder.defineMacro("_EM_FSIZE", "4"); 299 Builder.defineMacro("_EM_DSIZE", "8"); 300 DefineStd(Builder, "unix", Opts); 301 } 302 public: 303 MinixTargetInfo(const std::string &triple) 304 : OSTargetInfo<Target>(triple) { 305 this->UserLabelPrefix = ""; 306 } 307 }; 308 309 // Linux target 310 template<typename Target> 311 class LinuxTargetInfo : public OSTargetInfo<Target> { 312 protected: 313 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 314 MacroBuilder &Builder) const { 315 // Linux defines; list based off of gcc output 316 DefineStd(Builder, "unix", Opts); 317 DefineStd(Builder, "linux", Opts); 318 Builder.defineMacro("__gnu_linux__"); 319 Builder.defineMacro("__ELF__"); 320 if (Opts.POSIXThreads) 321 Builder.defineMacro("_REENTRANT"); 322 if (Opts.CPlusPlus) 323 Builder.defineMacro("_GNU_SOURCE"); 324 } 325 public: 326 LinuxTargetInfo(const std::string& triple) 327 : OSTargetInfo<Target>(triple) { 328 this->UserLabelPrefix = ""; 329 this->WIntType = TargetInfo::UnsignedInt; 330 } 331 }; 332 333 // NetBSD Target 334 template<typename Target> 335 class NetBSDTargetInfo : public OSTargetInfo<Target> { 336 protected: 337 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 338 MacroBuilder &Builder) const { 339 // NetBSD defines; list based off of gcc output 340 Builder.defineMacro("__NetBSD__"); 341 Builder.defineMacro("__unix__"); 342 Builder.defineMacro("__ELF__"); 343 if (Opts.POSIXThreads) 344 Builder.defineMacro("_POSIX_THREADS"); 345 } 346 public: 347 NetBSDTargetInfo(const std::string &triple) 348 : OSTargetInfo<Target>(triple) { 349 this->UserLabelPrefix = ""; 350 } 351 }; 352 353 // OpenBSD Target 354 template<typename Target> 355 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 356 protected: 357 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 358 MacroBuilder &Builder) const { 359 // OpenBSD defines; list based off of gcc output 360 361 Builder.defineMacro("__OpenBSD__"); 362 DefineStd(Builder, "unix", Opts); 363 Builder.defineMacro("__ELF__"); 364 if (Opts.POSIXThreads) 365 Builder.defineMacro("_POSIX_THREADS"); 366 } 367 public: 368 OpenBSDTargetInfo(const std::string &triple) 369 : OSTargetInfo<Target>(triple) {} 370 }; 371 372 // PSP Target 373 template<typename Target> 374 class PSPTargetInfo : public OSTargetInfo<Target> { 375 protected: 376 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 377 MacroBuilder &Builder) const { 378 // PSP defines; list based on the output of the pspdev gcc toolchain. 379 Builder.defineMacro("PSP"); 380 Builder.defineMacro("_PSP"); 381 Builder.defineMacro("__psp__"); 382 Builder.defineMacro("__ELF__"); 383 } 384 public: 385 PSPTargetInfo(const std::string& triple) 386 : OSTargetInfo<Target>(triple) { 387 this->UserLabelPrefix = ""; 388 } 389 }; 390 391 // PS3 PPU Target 392 template<typename Target> 393 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 394 protected: 395 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 396 MacroBuilder &Builder) const { 397 // PS3 PPU defines. 398 Builder.defineMacro("__PPC__"); 399 Builder.defineMacro("__PPU__"); 400 Builder.defineMacro("__CELLOS_LV2__"); 401 Builder.defineMacro("__ELF__"); 402 Builder.defineMacro("__LP32__"); 403 Builder.defineMacro("_ARCH_PPC64"); 404 Builder.defineMacro("__powerpc64__"); 405 } 406 public: 407 PS3PPUTargetInfo(const std::string& triple) 408 : OSTargetInfo<Target>(triple) { 409 this->UserLabelPrefix = ""; 410 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 411 this->IntMaxType = TargetInfo::SignedLongLong; 412 this->UIntMaxType = TargetInfo::UnsignedLongLong; 413 this->Int64Type = TargetInfo::SignedLongLong; 414 this->SizeType = TargetInfo::UnsignedInt; 415 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 416 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 417 } 418 }; 419 420 // FIXME: Need a real SPU target. 421 // PS3 SPU Target 422 template<typename Target> 423 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 424 protected: 425 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 426 MacroBuilder &Builder) const { 427 // PS3 PPU defines. 428 Builder.defineMacro("__SPU__"); 429 Builder.defineMacro("__ELF__"); 430 } 431 public: 432 PS3SPUTargetInfo(const std::string& triple) 433 : OSTargetInfo<Target>(triple) { 434 this->UserLabelPrefix = ""; 435 } 436 }; 437 438 // AuroraUX target 439 template<typename Target> 440 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 441 protected: 442 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 443 MacroBuilder &Builder) const { 444 DefineStd(Builder, "sun", Opts); 445 DefineStd(Builder, "unix", Opts); 446 Builder.defineMacro("__ELF__"); 447 Builder.defineMacro("__svr4__"); 448 Builder.defineMacro("__SVR4"); 449 } 450 public: 451 AuroraUXTargetInfo(const std::string& triple) 452 : OSTargetInfo<Target>(triple) { 453 this->UserLabelPrefix = ""; 454 this->WCharType = this->SignedLong; 455 // FIXME: WIntType should be SignedLong 456 } 457 }; 458 459 // Solaris target 460 template<typename Target> 461 class SolarisTargetInfo : public OSTargetInfo<Target> { 462 protected: 463 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 464 MacroBuilder &Builder) const { 465 DefineStd(Builder, "sun", Opts); 466 DefineStd(Builder, "unix", Opts); 467 Builder.defineMacro("__ELF__"); 468 Builder.defineMacro("__svr4__"); 469 Builder.defineMacro("__SVR4"); 470 } 471 public: 472 SolarisTargetInfo(const std::string& triple) 473 : OSTargetInfo<Target>(triple) { 474 this->UserLabelPrefix = ""; 475 this->WCharType = this->SignedLong; 476 // FIXME: WIntType should be SignedLong 477 } 478 }; 479 480 // Windows target 481 template<typename Target> 482 class WindowsTargetInfo : public OSTargetInfo<Target> { 483 protected: 484 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 485 MacroBuilder &Builder) const { 486 Builder.defineMacro("_WIN32"); 487 } 488 void getVisualStudioDefines(const LangOptions &Opts, 489 MacroBuilder &Builder) const { 490 if (Opts.CPlusPlus) { 491 if (Opts.RTTI) 492 Builder.defineMacro("_CPPRTTI"); 493 494 if (Opts.Exceptions) 495 Builder.defineMacro("_CPPUNWIND"); 496 } 497 498 if (!Opts.CharIsSigned) 499 Builder.defineMacro("_CHAR_UNSIGNED"); 500 501 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 502 // but it works for now. 503 if (Opts.POSIXThreads) 504 Builder.defineMacro("_MT"); 505 506 if (Opts.MSCVersion != 0) 507 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 508 509 if (Opts.MicrosoftExt) { 510 Builder.defineMacro("_MSC_EXTENSIONS"); 511 512 if (Opts.CPlusPlus0x) { 513 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 514 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 515 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 516 } 517 } 518 519 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 520 } 521 522 public: 523 WindowsTargetInfo(const std::string &triple) 524 : OSTargetInfo<Target>(triple) {} 525 }; 526 527 } // end anonymous namespace. 528 529 //===----------------------------------------------------------------------===// 530 // Specific target implementations. 531 //===----------------------------------------------------------------------===// 532 533 namespace { 534 // PPC abstract base class 535 class PPCTargetInfo : public TargetInfo { 536 static const Builtin::Info BuiltinInfo[]; 537 static const char * const GCCRegNames[]; 538 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 539 public: 540 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 541 542 virtual void getTargetBuiltins(const Builtin::Info *&Records, 543 unsigned &NumRecords) const { 544 Records = BuiltinInfo; 545 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 546 } 547 548 virtual void getTargetDefines(const LangOptions &Opts, 549 MacroBuilder &Builder) const; 550 551 virtual void getGCCRegNames(const char * const *&Names, 552 unsigned &NumNames) const; 553 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 554 unsigned &NumAliases) const; 555 virtual bool validateAsmConstraint(const char *&Name, 556 TargetInfo::ConstraintInfo &Info) const { 557 switch (*Name) { 558 default: return false; 559 case 'O': // Zero 560 break; 561 case 'b': // Base register 562 case 'f': // Floating point register 563 Info.setAllowsRegister(); 564 break; 565 // FIXME: The following are added to allow parsing. 566 // I just took a guess at what the actions should be. 567 // Also, is more specific checking needed? I.e. specific registers? 568 case 'd': // Floating point register (containing 64-bit value) 569 case 'v': // Altivec vector register 570 Info.setAllowsRegister(); 571 break; 572 case 'w': 573 switch (Name[1]) { 574 case 'd':// VSX vector register to hold vector double data 575 case 'f':// VSX vector register to hold vector float data 576 case 's':// VSX vector register to hold scalar float data 577 case 'a':// Any VSX register 578 break; 579 default: 580 return false; 581 } 582 Info.setAllowsRegister(); 583 Name++; // Skip over 'w'. 584 break; 585 case 'h': // `MQ', `CTR', or `LINK' register 586 case 'q': // `MQ' register 587 case 'c': // `CTR' register 588 case 'l': // `LINK' register 589 case 'x': // `CR' register (condition register) number 0 590 case 'y': // `CR' register (condition register) 591 case 'z': // `XER[CA]' carry bit (part of the XER register) 592 Info.setAllowsRegister(); 593 break; 594 case 'I': // Signed 16-bit constant 595 case 'J': // Unsigned 16-bit constant shifted left 16 bits 596 // (use `L' instead for SImode constants) 597 case 'K': // Unsigned 16-bit constant 598 case 'L': // Signed 16-bit constant shifted left 16 bits 599 case 'M': // Constant larger than 31 600 case 'N': // Exact power of 2 601 case 'P': // Constant whose negation is a signed 16-bit constant 602 case 'G': // Floating point constant that can be loaded into a 603 // register with one instruction per word 604 case 'H': // Integer/Floating point constant that can be loaded 605 // into a register using three instructions 606 break; 607 case 'm': // Memory operand. Note that on PowerPC targets, m can 608 // include addresses that update the base register. It 609 // is therefore only safe to use `m' in an asm statement 610 // if that asm statement accesses the operand exactly once. 611 // The asm statement must also use `%U<opno>' as a 612 // placeholder for the "update" flag in the corresponding 613 // load or store instruction. For example: 614 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 615 // is correct but: 616 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 617 // is not. Use es rather than m if you don't want the base 618 // register to be updated. 619 case 'e': 620 if (Name[1] != 's') 621 return false; 622 // es: A "stable" memory operand; that is, one which does not 623 // include any automodification of the base register. Unlike 624 // `m', this constraint can be used in asm statements that 625 // might access the operand several times, or that might not 626 // access it at all. 627 Info.setAllowsMemory(); 628 Name++; // Skip over 'e'. 629 break; 630 case 'Q': // Memory operand that is an offset from a register (it is 631 // usually better to use `m' or `es' in asm statements) 632 case 'Z': // Memory operand that is an indexed or indirect from a 633 // register (it is usually better to use `m' or `es' in 634 // asm statements) 635 Info.setAllowsMemory(); 636 Info.setAllowsRegister(); 637 break; 638 case 'R': // AIX TOC entry 639 case 'a': // Address operand that is an indexed or indirect from a 640 // register (`p' is preferable for asm statements) 641 case 'S': // Constant suitable as a 64-bit mask operand 642 case 'T': // Constant suitable as a 32-bit mask operand 643 case 'U': // System V Release 4 small data area reference 644 case 't': // AND masks that can be performed by two rldic{l, r} 645 // instructions 646 case 'W': // Vector constant that does not require memory 647 case 'j': // Vector constant that is all zeros. 648 break; 649 // End FIXME. 650 } 651 return true; 652 } 653 virtual const char *getClobbers() const { 654 return ""; 655 } 656 }; 657 658 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 659 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 660 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 661 ALL_LANGUAGES }, 662 #include "clang/Basic/BuiltinsPPC.def" 663 }; 664 665 666 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 667 /// #defines that are not tied to a specific subtarget. 668 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 669 MacroBuilder &Builder) const { 670 // Target identification. 671 Builder.defineMacro("__ppc__"); 672 Builder.defineMacro("_ARCH_PPC"); 673 Builder.defineMacro("__powerpc__"); 674 Builder.defineMacro("__POWERPC__"); 675 if (PointerWidth == 64) { 676 Builder.defineMacro("_ARCH_PPC64"); 677 Builder.defineMacro("_LP64"); 678 Builder.defineMacro("__LP64__"); 679 Builder.defineMacro("__powerpc64__"); 680 Builder.defineMacro("__ppc64__"); 681 } else { 682 Builder.defineMacro("__ppc__"); 683 } 684 685 // Target properties. 686 if (getTriple().getOS() != llvm::Triple::NetBSD) 687 Builder.defineMacro("_BIG_ENDIAN"); 688 Builder.defineMacro("__BIG_ENDIAN__"); 689 690 // Subtarget options. 691 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 692 Builder.defineMacro("__REGISTER_PREFIX__", ""); 693 694 // FIXME: Should be controlled by command line option. 695 Builder.defineMacro("__LONG_DOUBLE_128__"); 696 697 if (Opts.AltiVec) { 698 Builder.defineMacro("__VEC__", "10206"); 699 Builder.defineMacro("__ALTIVEC__"); 700 } 701 } 702 703 704 const char * const PPCTargetInfo::GCCRegNames[] = { 705 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 706 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 707 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 708 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 709 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 710 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 711 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 712 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 713 "mq", "lr", "ctr", "ap", 714 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 715 "xer", 716 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 717 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 718 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 719 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 720 "vrsave", "vscr", 721 "spe_acc", "spefscr", 722 "sfp" 723 }; 724 725 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 726 unsigned &NumNames) const { 727 Names = GCCRegNames; 728 NumNames = llvm::array_lengthof(GCCRegNames); 729 } 730 731 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 732 // While some of these aliases do map to different registers 733 // they still share the same register name. 734 { { "0" }, "r0" }, 735 { { "1"}, "r1" }, 736 { { "2" }, "r2" }, 737 { { "3" }, "r3" }, 738 { { "4" }, "r4" }, 739 { { "5" }, "r5" }, 740 { { "6" }, "r6" }, 741 { { "7" }, "r7" }, 742 { { "8" }, "r8" }, 743 { { "9" }, "r9" }, 744 { { "10" }, "r10" }, 745 { { "11" }, "r11" }, 746 { { "12" }, "r12" }, 747 { { "13" }, "r13" }, 748 { { "14" }, "r14" }, 749 { { "15" }, "r15" }, 750 { { "16" }, "r16" }, 751 { { "17" }, "r17" }, 752 { { "18" }, "r18" }, 753 { { "19" }, "r19" }, 754 { { "20" }, "r20" }, 755 { { "21" }, "r21" }, 756 { { "22" }, "r22" }, 757 { { "23" }, "r23" }, 758 { { "24" }, "r24" }, 759 { { "25" }, "r25" }, 760 { { "26" }, "r26" }, 761 { { "27" }, "r27" }, 762 { { "28" }, "r28" }, 763 { { "29" }, "r29" }, 764 { { "30" }, "r30" }, 765 { { "31" }, "r31" }, 766 { { "fr0" }, "f0" }, 767 { { "fr1" }, "f1" }, 768 { { "fr2" }, "f2" }, 769 { { "fr3" }, "f3" }, 770 { { "fr4" }, "f4" }, 771 { { "fr5" }, "f5" }, 772 { { "fr6" }, "f6" }, 773 { { "fr7" }, "f7" }, 774 { { "fr8" }, "f8" }, 775 { { "fr9" }, "f9" }, 776 { { "fr10" }, "f10" }, 777 { { "fr11" }, "f11" }, 778 { { "fr12" }, "f12" }, 779 { { "fr13" }, "f13" }, 780 { { "fr14" }, "f14" }, 781 { { "fr15" }, "f15" }, 782 { { "fr16" }, "f16" }, 783 { { "fr17" }, "f17" }, 784 { { "fr18" }, "f18" }, 785 { { "fr19" }, "f19" }, 786 { { "fr20" }, "f20" }, 787 { { "fr21" }, "f21" }, 788 { { "fr22" }, "f22" }, 789 { { "fr23" }, "f23" }, 790 { { "fr24" }, "f24" }, 791 { { "fr25" }, "f25" }, 792 { { "fr26" }, "f26" }, 793 { { "fr27" }, "f27" }, 794 { { "fr28" }, "f28" }, 795 { { "fr29" }, "f29" }, 796 { { "fr30" }, "f30" }, 797 { { "fr31" }, "f31" }, 798 { { "cc" }, "cr0" }, 799 }; 800 801 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 802 unsigned &NumAliases) const { 803 Aliases = GCCRegAliases; 804 NumAliases = llvm::array_lengthof(GCCRegAliases); 805 } 806 } // end anonymous namespace. 807 808 namespace { 809 class PPC32TargetInfo : public PPCTargetInfo { 810 public: 811 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 812 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 813 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 814 815 switch (getTriple().getOS()) { 816 case llvm::Triple::FreeBSD: 817 case llvm::Triple::NetBSD: 818 SizeType = UnsignedInt; 819 break; 820 default: 821 break; 822 } 823 } 824 825 virtual const char *getVAListDeclaration() const { 826 // This is the ELF definition, and is overridden by the Darwin sub-target 827 return "typedef struct __va_list_tag {" 828 " unsigned char gpr;" 829 " unsigned char fpr;" 830 " unsigned short reserved;" 831 " void* overflow_arg_area;" 832 " void* reg_save_area;" 833 "} __builtin_va_list[1];"; 834 } 835 }; 836 } // end anonymous namespace. 837 838 namespace { 839 class PPC64TargetInfo : public PPCTargetInfo { 840 public: 841 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 842 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 843 IntMaxType = SignedLong; 844 UIntMaxType = UnsignedLong; 845 Int64Type = SignedLong; 846 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 847 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 848 } 849 virtual const char *getVAListDeclaration() const { 850 return "typedef char* __builtin_va_list;"; 851 } 852 }; 853 } // end anonymous namespace. 854 855 856 namespace { 857 class DarwinPPC32TargetInfo : 858 public DarwinTargetInfo<PPC32TargetInfo> { 859 public: 860 DarwinPPC32TargetInfo(const std::string& triple) 861 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 862 HasAlignMac68kSupport = true; 863 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 864 } 865 virtual const char *getVAListDeclaration() const { 866 return "typedef char* __builtin_va_list;"; 867 } 868 }; 869 870 class DarwinPPC64TargetInfo : 871 public DarwinTargetInfo<PPC64TargetInfo> { 872 public: 873 DarwinPPC64TargetInfo(const std::string& triple) 874 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 875 HasAlignMac68kSupport = true; 876 } 877 }; 878 } // end anonymous namespace. 879 880 namespace { 881 static const unsigned PTXAddrSpaceMap[] = { 882 0, // opencl_global 883 4, // opencl_local 884 1 // opencl_constant 885 }; 886 class PTXTargetInfo : public TargetInfo { 887 static const char * const GCCRegNames[]; 888 static const Builtin::Info BuiltinInfo[]; 889 std::vector<llvm::StringRef> AvailableFeatures; 890 public: 891 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 892 TLSSupported = false; 893 LongWidth = LongAlign = 64; 894 AddrSpaceMap = &PTXAddrSpaceMap; 895 // Define available target features 896 // These must be defined in sorted order! 897 AvailableFeatures.push_back("compute10"); 898 AvailableFeatures.push_back("compute11"); 899 AvailableFeatures.push_back("compute12"); 900 AvailableFeatures.push_back("compute13"); 901 AvailableFeatures.push_back("compute20"); 902 AvailableFeatures.push_back("double"); 903 AvailableFeatures.push_back("no-fma"); 904 AvailableFeatures.push_back("ptx20"); 905 AvailableFeatures.push_back("ptx21"); 906 AvailableFeatures.push_back("ptx22"); 907 AvailableFeatures.push_back("ptx23"); 908 AvailableFeatures.push_back("sm10"); 909 AvailableFeatures.push_back("sm11"); 910 AvailableFeatures.push_back("sm12"); 911 AvailableFeatures.push_back("sm13"); 912 AvailableFeatures.push_back("sm20"); 913 AvailableFeatures.push_back("sm21"); 914 AvailableFeatures.push_back("sm22"); 915 AvailableFeatures.push_back("sm23"); 916 } 917 virtual void getTargetDefines(const LangOptions &Opts, 918 MacroBuilder &Builder) const { 919 Builder.defineMacro("__PTX__"); 920 } 921 virtual void getTargetBuiltins(const Builtin::Info *&Records, 922 unsigned &NumRecords) const { 923 Records = BuiltinInfo; 924 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 925 } 926 927 virtual void getGCCRegNames(const char * const *&Names, 928 unsigned &NumNames) const; 929 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 930 unsigned &NumAliases) const { 931 // No aliases. 932 Aliases = 0; 933 NumAliases = 0; 934 } 935 virtual bool validateAsmConstraint(const char *&Name, 936 TargetInfo::ConstraintInfo &info) const { 937 // FIXME: implement 938 return true; 939 } 940 virtual const char *getClobbers() const { 941 // FIXME: Is this really right? 942 return ""; 943 } 944 virtual const char *getVAListDeclaration() const { 945 // FIXME: implement 946 return "typedef char* __builtin_va_list;"; 947 } 948 949 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 950 const std::string &Name, 951 bool Enabled) const; 952 }; 953 954 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 955 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 956 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 957 ALL_LANGUAGES }, 958 #include "clang/Basic/BuiltinsPTX.def" 959 }; 960 961 const char * const PTXTargetInfo::GCCRegNames[] = { 962 "r0" 963 }; 964 965 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 966 unsigned &NumNames) const { 967 Names = GCCRegNames; 968 NumNames = llvm::array_lengthof(GCCRegNames); 969 } 970 971 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 972 const std::string &Name, 973 bool Enabled) const { 974 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 975 Name)) { 976 Features[Name] = Enabled; 977 return true; 978 } else { 979 return false; 980 } 981 } 982 983 class PTX32TargetInfo : public PTXTargetInfo { 984 public: 985 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 986 PointerWidth = PointerAlign = 32; 987 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 988 DescriptionString 989 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 990 } 991 }; 992 993 class PTX64TargetInfo : public PTXTargetInfo { 994 public: 995 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 996 PointerWidth = PointerAlign = 64; 997 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 998 DescriptionString 999 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1000 } 1001 }; 1002 } 1003 1004 namespace { 1005 // MBlaze abstract base class 1006 class MBlazeTargetInfo : public TargetInfo { 1007 static const char * const GCCRegNames[]; 1008 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1009 1010 public: 1011 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1012 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1013 } 1014 1015 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1016 unsigned &NumRecords) const { 1017 // FIXME: Implement. 1018 Records = 0; 1019 NumRecords = 0; 1020 } 1021 1022 virtual void getTargetDefines(const LangOptions &Opts, 1023 MacroBuilder &Builder) const; 1024 1025 virtual const char *getVAListDeclaration() const { 1026 return "typedef char* __builtin_va_list;"; 1027 } 1028 virtual const char *getTargetPrefix() const { 1029 return "mblaze"; 1030 } 1031 virtual void getGCCRegNames(const char * const *&Names, 1032 unsigned &NumNames) const; 1033 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1034 unsigned &NumAliases) const; 1035 virtual bool validateAsmConstraint(const char *&Name, 1036 TargetInfo::ConstraintInfo &Info) const { 1037 switch (*Name) { 1038 default: return false; 1039 case 'O': // Zero 1040 return true; 1041 case 'b': // Base register 1042 case 'f': // Floating point register 1043 Info.setAllowsRegister(); 1044 return true; 1045 } 1046 } 1047 virtual const char *getClobbers() const { 1048 return ""; 1049 } 1050 }; 1051 1052 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1053 /// #defines that are not tied to a specific subtarget. 1054 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1055 MacroBuilder &Builder) const { 1056 // Target identification. 1057 Builder.defineMacro("__microblaze__"); 1058 Builder.defineMacro("_ARCH_MICROBLAZE"); 1059 Builder.defineMacro("__MICROBLAZE__"); 1060 1061 // Target properties. 1062 Builder.defineMacro("_BIG_ENDIAN"); 1063 Builder.defineMacro("__BIG_ENDIAN__"); 1064 1065 // Subtarget options. 1066 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1067 } 1068 1069 1070 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1071 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1072 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1073 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1074 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1075 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1076 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1077 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1078 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1079 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1080 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1081 }; 1082 1083 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1084 unsigned &NumNames) const { 1085 Names = GCCRegNames; 1086 NumNames = llvm::array_lengthof(GCCRegNames); 1087 } 1088 1089 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1090 { {"f0"}, "r0" }, 1091 { {"f1"}, "r1" }, 1092 { {"f2"}, "r2" }, 1093 { {"f3"}, "r3" }, 1094 { {"f4"}, "r4" }, 1095 { {"f5"}, "r5" }, 1096 { {"f6"}, "r6" }, 1097 { {"f7"}, "r7" }, 1098 { {"f8"}, "r8" }, 1099 { {"f9"}, "r9" }, 1100 { {"f10"}, "r10" }, 1101 { {"f11"}, "r11" }, 1102 { {"f12"}, "r12" }, 1103 { {"f13"}, "r13" }, 1104 { {"f14"}, "r14" }, 1105 { {"f15"}, "r15" }, 1106 { {"f16"}, "r16" }, 1107 { {"f17"}, "r17" }, 1108 { {"f18"}, "r18" }, 1109 { {"f19"}, "r19" }, 1110 { {"f20"}, "r20" }, 1111 { {"f21"}, "r21" }, 1112 { {"f22"}, "r22" }, 1113 { {"f23"}, "r23" }, 1114 { {"f24"}, "r24" }, 1115 { {"f25"}, "r25" }, 1116 { {"f26"}, "r26" }, 1117 { {"f27"}, "r27" }, 1118 { {"f28"}, "r28" }, 1119 { {"f29"}, "r29" }, 1120 { {"f30"}, "r30" }, 1121 { {"f31"}, "r31" }, 1122 }; 1123 1124 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1125 unsigned &NumAliases) const { 1126 Aliases = GCCRegAliases; 1127 NumAliases = llvm::array_lengthof(GCCRegAliases); 1128 } 1129 } // end anonymous namespace. 1130 1131 namespace { 1132 // Namespace for x86 abstract base class 1133 const Builtin::Info BuiltinInfo[] = { 1134 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1135 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1136 ALL_LANGUAGES }, 1137 #include "clang/Basic/BuiltinsX86.def" 1138 }; 1139 1140 static const char* const GCCRegNames[] = { 1141 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1142 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1143 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1144 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1145 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1147 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1148 }; 1149 1150 const TargetInfo::AddlRegName AddlRegNames[] = { 1151 { { "al", "ah", "eax", "rax" }, 0 }, 1152 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1153 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1154 { { "dl", "dh", "edx", "rdx" }, 1 }, 1155 { { "esi", "rsi" }, 4 }, 1156 { { "edi", "rdi" }, 5 }, 1157 { { "esp", "rsp" }, 7 }, 1158 { { "ebp", "rbp" }, 6 }, 1159 }; 1160 1161 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1162 // most of the implementation can be shared. 1163 class X86TargetInfo : public TargetInfo { 1164 enum X86SSEEnum { 1165 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1166 } SSELevel; 1167 enum MMX3DNowEnum { 1168 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1169 } MMX3DNowLevel; 1170 1171 bool HasAES; 1172 bool HasAVX; 1173 1174 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1175 /// 1176 /// Each enumeration represents a particular CPU supported by Clang. These 1177 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1178 enum CPUKind { 1179 CK_Generic, 1180 1181 /// \name i386 1182 /// i386-generation processors. 1183 //@{ 1184 CK_i386, 1185 //@} 1186 1187 /// \name i486 1188 /// i486-generation processors. 1189 //@{ 1190 CK_i486, 1191 CK_WinChipC6, 1192 CK_WinChip2, 1193 CK_C3, 1194 //@} 1195 1196 /// \name i586 1197 /// i586-generation processors, P5 microarchitecture based. 1198 //@{ 1199 CK_i586, 1200 CK_Pentium, 1201 CK_PentiumMMX, 1202 //@} 1203 1204 /// \name i686 1205 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1206 //@{ 1207 CK_i686, 1208 CK_PentiumPro, 1209 CK_Pentium2, 1210 CK_Pentium3, 1211 CK_Pentium3M, 1212 CK_PentiumM, 1213 CK_C3_2, 1214 1215 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1216 /// Clang however has some logic to suport this. 1217 // FIXME: Warn, deprecate, and potentially remove this. 1218 CK_Yonah, 1219 //@} 1220 1221 /// \name Netburst 1222 /// Netburst microarchitecture based processors. 1223 //@{ 1224 CK_Pentium4, 1225 CK_Pentium4M, 1226 CK_Prescott, 1227 CK_Nocona, 1228 //@} 1229 1230 /// \name Core 1231 /// Core microarchitecture based processors. 1232 //@{ 1233 CK_Core2, 1234 1235 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1236 /// codename which GCC no longer accepts as an option to -march, but Clang 1237 /// has some logic for recognizing it. 1238 // FIXME: Warn, deprecate, and potentially remove this. 1239 CK_Penryn, 1240 //@} 1241 1242 /// \name Atom 1243 /// Atom processors 1244 //@{ 1245 CK_Atom, 1246 //@} 1247 1248 /// \name Nehalem 1249 /// Nehalem microarchitecture based processors. 1250 //@{ 1251 CK_Corei7, 1252 CK_Corei7AVX, 1253 CK_CoreAVXi, 1254 //@} 1255 1256 /// \name K6 1257 /// K6 architecture processors. 1258 //@{ 1259 CK_K6, 1260 CK_K6_2, 1261 CK_K6_3, 1262 //@} 1263 1264 /// \name K7 1265 /// K7 architecture processors. 1266 //@{ 1267 CK_Athlon, 1268 CK_AthlonThunderbird, 1269 CK_Athlon4, 1270 CK_AthlonXP, 1271 CK_AthlonMP, 1272 //@} 1273 1274 /// \name K8 1275 /// K8 architecture processors. 1276 //@{ 1277 CK_Athlon64, 1278 CK_Athlon64SSE3, 1279 CK_AthlonFX, 1280 CK_K8, 1281 CK_K8SSE3, 1282 CK_Opteron, 1283 CK_OpteronSSE3, 1284 1285 /// This specification is deprecated and will be removed in the future. 1286 /// Users should prefer \see CK_K8. 1287 // FIXME: Warn on this when the CPU is set to it. 1288 CK_x86_64, 1289 //@} 1290 1291 /// \name Geode 1292 /// Geode processors. 1293 //@{ 1294 CK_Geode 1295 //@} 1296 } CPU; 1297 1298 public: 1299 X86TargetInfo(const std::string& triple) 1300 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1301 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1302 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1303 } 1304 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1305 unsigned &NumRecords) const { 1306 Records = BuiltinInfo; 1307 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1308 } 1309 virtual void getGCCRegNames(const char * const *&Names, 1310 unsigned &NumNames) const { 1311 Names = GCCRegNames; 1312 NumNames = llvm::array_lengthof(GCCRegNames); 1313 } 1314 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1315 unsigned &NumAliases) const { 1316 Aliases = 0; 1317 NumAliases = 0; 1318 } 1319 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1320 unsigned &NumNames) const { 1321 Names = AddlRegNames; 1322 NumNames = llvm::array_lengthof(AddlRegNames); 1323 } 1324 virtual bool validateAsmConstraint(const char *&Name, 1325 TargetInfo::ConstraintInfo &info) const; 1326 virtual std::string convertConstraint(const char *&Constraint) const; 1327 virtual const char *getClobbers() const { 1328 return "~{dirflag},~{fpsr},~{flags}"; 1329 } 1330 virtual void getTargetDefines(const LangOptions &Opts, 1331 MacroBuilder &Builder) const; 1332 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1333 const std::string &Name, 1334 bool Enabled) const; 1335 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1336 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1337 virtual const char* getABI() const { 1338 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1339 } 1340 virtual bool setCPU(const std::string &Name) { 1341 CPU = llvm::StringSwitch<CPUKind>(Name) 1342 .Case("i386", CK_i386) 1343 .Case("i486", CK_i486) 1344 .Case("winchip-c6", CK_WinChipC6) 1345 .Case("winchip2", CK_WinChip2) 1346 .Case("c3", CK_C3) 1347 .Case("i586", CK_i586) 1348 .Case("pentium", CK_Pentium) 1349 .Case("pentium-mmx", CK_PentiumMMX) 1350 .Case("i686", CK_i686) 1351 .Case("pentiumpro", CK_PentiumPro) 1352 .Case("pentium2", CK_Pentium2) 1353 .Case("pentium3", CK_Pentium3) 1354 .Case("pentium3m", CK_Pentium3M) 1355 .Case("pentium-m", CK_PentiumM) 1356 .Case("c3-2", CK_C3_2) 1357 .Case("yonah", CK_Yonah) 1358 .Case("pentium4", CK_Pentium4) 1359 .Case("pentium4m", CK_Pentium4M) 1360 .Case("prescott", CK_Prescott) 1361 .Case("nocona", CK_Nocona) 1362 .Case("core2", CK_Core2) 1363 .Case("penryn", CK_Penryn) 1364 .Case("atom", CK_Atom) 1365 .Case("corei7", CK_Corei7) 1366 .Case("corei7-avx", CK_Corei7AVX) 1367 .Case("core-avx-i", CK_CoreAVXi) 1368 .Case("k6", CK_K6) 1369 .Case("k6-2", CK_K6_2) 1370 .Case("k6-3", CK_K6_3) 1371 .Case("athlon", CK_Athlon) 1372 .Case("athlon-tbird", CK_AthlonThunderbird) 1373 .Case("athlon-4", CK_Athlon4) 1374 .Case("athlon-xp", CK_AthlonXP) 1375 .Case("athlon-mp", CK_AthlonMP) 1376 .Case("athlon64", CK_Athlon64) 1377 .Case("athlon64-sse3", CK_Athlon64SSE3) 1378 .Case("athlon-fx", CK_AthlonFX) 1379 .Case("k8", CK_K8) 1380 .Case("k8-sse3", CK_K8SSE3) 1381 .Case("opteron", CK_Opteron) 1382 .Case("opteron-sse3", CK_OpteronSSE3) 1383 .Case("x86-64", CK_x86_64) 1384 .Case("geode", CK_Geode) 1385 .Default(CK_Generic); 1386 1387 // Perform any per-CPU checks necessary to determine if this CPU is 1388 // acceptable. 1389 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1390 // invalid without explaining *why*. 1391 switch (CPU) { 1392 case CK_Generic: 1393 // No processor selected! 1394 return false; 1395 1396 case CK_i386: 1397 case CK_i486: 1398 case CK_WinChipC6: 1399 case CK_WinChip2: 1400 case CK_C3: 1401 case CK_i586: 1402 case CK_Pentium: 1403 case CK_PentiumMMX: 1404 case CK_i686: 1405 case CK_PentiumPro: 1406 case CK_Pentium2: 1407 case CK_Pentium3: 1408 case CK_Pentium3M: 1409 case CK_PentiumM: 1410 case CK_Yonah: 1411 case CK_C3_2: 1412 case CK_Pentium4: 1413 case CK_Pentium4M: 1414 case CK_Prescott: 1415 case CK_K6: 1416 case CK_K6_2: 1417 case CK_K6_3: 1418 case CK_Athlon: 1419 case CK_AthlonThunderbird: 1420 case CK_Athlon4: 1421 case CK_AthlonXP: 1422 case CK_AthlonMP: 1423 case CK_Geode: 1424 // Only accept certain architectures when compiling in 32-bit mode. 1425 if (PointerWidth != 32) 1426 return false; 1427 1428 // Fallthrough 1429 case CK_Nocona: 1430 case CK_Core2: 1431 case CK_Penryn: 1432 case CK_Atom: 1433 case CK_Corei7: 1434 case CK_Corei7AVX: 1435 case CK_CoreAVXi: 1436 case CK_Athlon64: 1437 case CK_Athlon64SSE3: 1438 case CK_AthlonFX: 1439 case CK_K8: 1440 case CK_K8SSE3: 1441 case CK_Opteron: 1442 case CK_OpteronSSE3: 1443 case CK_x86_64: 1444 return true; 1445 } 1446 llvm_unreachable("Unhandled CPU kind"); 1447 } 1448 }; 1449 1450 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1451 // FIXME: This should not be here. 1452 Features["3dnow"] = false; 1453 Features["3dnowa"] = false; 1454 Features["mmx"] = false; 1455 Features["sse"] = false; 1456 Features["sse2"] = false; 1457 Features["sse3"] = false; 1458 Features["ssse3"] = false; 1459 Features["sse41"] = false; 1460 Features["sse42"] = false; 1461 Features["aes"] = false; 1462 Features["avx"] = false; 1463 1464 // LLVM does not currently recognize this. 1465 // Features["sse4a"] = false; 1466 1467 // FIXME: This *really* should not be here. 1468 1469 // X86_64 always has SSE2. 1470 if (PointerWidth == 64) 1471 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1472 1473 switch (CPU) { 1474 case CK_Generic: 1475 case CK_i386: 1476 case CK_i486: 1477 case CK_i586: 1478 case CK_Pentium: 1479 case CK_i686: 1480 case CK_PentiumPro: 1481 break; 1482 case CK_PentiumMMX: 1483 case CK_Pentium2: 1484 setFeatureEnabled(Features, "mmx", true); 1485 break; 1486 case CK_Pentium3: 1487 case CK_Pentium3M: 1488 setFeatureEnabled(Features, "mmx", true); 1489 setFeatureEnabled(Features, "sse", true); 1490 break; 1491 case CK_PentiumM: 1492 case CK_Pentium4: 1493 case CK_Pentium4M: 1494 case CK_x86_64: 1495 setFeatureEnabled(Features, "mmx", true); 1496 setFeatureEnabled(Features, "sse2", true); 1497 break; 1498 case CK_Yonah: 1499 case CK_Prescott: 1500 case CK_Nocona: 1501 setFeatureEnabled(Features, "mmx", true); 1502 setFeatureEnabled(Features, "sse3", true); 1503 break; 1504 case CK_Core2: 1505 setFeatureEnabled(Features, "mmx", true); 1506 setFeatureEnabled(Features, "ssse3", true); 1507 break; 1508 case CK_Penryn: 1509 setFeatureEnabled(Features, "mmx", true); 1510 setFeatureEnabled(Features, "sse4", true); 1511 Features["sse42"] = false; 1512 break; 1513 case CK_Atom: 1514 setFeatureEnabled(Features, "mmx", true); 1515 setFeatureEnabled(Features, "ssse3", true); 1516 break; 1517 case CK_Corei7: 1518 setFeatureEnabled(Features, "mmx", true); 1519 setFeatureEnabled(Features, "sse4", true); 1520 setFeatureEnabled(Features, "aes", true); 1521 break; 1522 case CK_Corei7AVX: 1523 case CK_CoreAVXi: 1524 setFeatureEnabled(Features, "mmx", true); 1525 setFeatureEnabled(Features, "sse4", true); 1526 setFeatureEnabled(Features, "aes", true); 1527 //setFeatureEnabled(Features, "avx", true); 1528 break; 1529 case CK_K6: 1530 case CK_WinChipC6: 1531 setFeatureEnabled(Features, "mmx", true); 1532 break; 1533 case CK_K6_2: 1534 case CK_K6_3: 1535 case CK_WinChip2: 1536 case CK_C3: 1537 setFeatureEnabled(Features, "3dnow", true); 1538 break; 1539 case CK_Athlon: 1540 case CK_AthlonThunderbird: 1541 case CK_Geode: 1542 setFeatureEnabled(Features, "3dnowa", true); 1543 break; 1544 case CK_Athlon4: 1545 case CK_AthlonXP: 1546 case CK_AthlonMP: 1547 setFeatureEnabled(Features, "sse", true); 1548 setFeatureEnabled(Features, "3dnowa", true); 1549 break; 1550 case CK_K8: 1551 case CK_Opteron: 1552 case CK_Athlon64: 1553 case CK_AthlonFX: 1554 setFeatureEnabled(Features, "sse2", true); 1555 setFeatureEnabled(Features, "3dnowa", true); 1556 break; 1557 case CK_K8SSE3: 1558 case CK_OpteronSSE3: 1559 case CK_Athlon64SSE3: 1560 setFeatureEnabled(Features, "sse3", true); 1561 setFeatureEnabled(Features, "3dnowa", true); 1562 break; 1563 case CK_C3_2: 1564 setFeatureEnabled(Features, "mmx", true); 1565 setFeatureEnabled(Features, "sse", true); 1566 break; 1567 } 1568 } 1569 1570 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1571 const std::string &Name, 1572 bool Enabled) const { 1573 // FIXME: This *really* should not be here. We need some way of translating 1574 // options into llvm subtarget features. 1575 if (!Features.count(Name) && 1576 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1577 return false; 1578 1579 if (Enabled) { 1580 if (Name == "mmx") 1581 Features["mmx"] = true; 1582 else if (Name == "sse") 1583 Features["sse"] = true; 1584 else if (Name == "sse2") 1585 Features["sse"] = Features["sse2"] = true; 1586 else if (Name == "sse3") 1587 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1588 else if (Name == "ssse3") 1589 Features["sse"] = Features["sse2"] = Features["sse3"] = 1590 Features["ssse3"] = true; 1591 else if (Name == "sse4" || Name == "sse4.2") 1592 Features["sse"] = Features["sse2"] = Features["sse3"] = 1593 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1594 else if (Name == "sse4.1") 1595 Features["sse"] = Features["sse2"] = Features["sse3"] = 1596 Features["ssse3"] = Features["sse41"] = true; 1597 else if (Name == "3dnow") 1598 Features["mmx"] = Features["3dnow"] = true; 1599 else if (Name == "3dnowa") 1600 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1601 else if (Name == "aes") 1602 Features["aes"] = true; 1603 else if (Name == "avx") 1604 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1605 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1606 } else { 1607 if (Name == "mmx") 1608 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1609 else if (Name == "sse") 1610 Features["sse"] = Features["sse2"] = Features["sse3"] = 1611 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1612 else if (Name == "sse2") 1613 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1614 Features["sse41"] = Features["sse42"] = false; 1615 else if (Name == "sse3") 1616 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1617 Features["sse42"] = false; 1618 else if (Name == "ssse3") 1619 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1620 else if (Name == "sse4" || Name == "sse4.1") 1621 Features["sse41"] = Features["sse42"] = false; 1622 else if (Name == "sse4.2") 1623 Features["sse42"] = false; 1624 else if (Name == "3dnow") 1625 Features["3dnow"] = Features["3dnowa"] = false; 1626 else if (Name == "3dnowa") 1627 Features["3dnowa"] = false; 1628 else if (Name == "aes") 1629 Features["aes"] = false; 1630 else if (Name == "avx") 1631 Features["avx"] = false; 1632 } 1633 1634 return true; 1635 } 1636 1637 /// HandleTargetOptions - Perform initialization based on the user 1638 /// configured set of features. 1639 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1640 // Remember the maximum enabled sselevel. 1641 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1642 // Ignore disabled features. 1643 if (Features[i][0] == '-') 1644 continue; 1645 1646 if (Features[i].substr(1) == "aes") { 1647 HasAES = true; 1648 continue; 1649 } 1650 1651 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1652 // For now let it be enabled together with other SSE levels. 1653 if (Features[i].substr(1) == "avx") { 1654 HasAVX = true; 1655 continue; 1656 } 1657 1658 assert(Features[i][0] == '+' && "Invalid target feature!"); 1659 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1660 .Case("sse42", SSE42) 1661 .Case("sse41", SSE41) 1662 .Case("ssse3", SSSE3) 1663 .Case("sse3", SSE3) 1664 .Case("sse2", SSE2) 1665 .Case("sse", SSE1) 1666 .Default(NoSSE); 1667 SSELevel = std::max(SSELevel, Level); 1668 1669 MMX3DNowEnum ThreeDNowLevel = 1670 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1671 .Case("3dnowa", AMD3DNowAthlon) 1672 .Case("3dnow", AMD3DNow) 1673 .Case("mmx", MMX) 1674 .Default(NoMMX3DNow); 1675 1676 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1677 } 1678 1679 // Don't tell the backend if we're turning off mmx; it will end up disabling 1680 // SSE, which we don't want. 1681 std::vector<std::string>::iterator it; 1682 it = std::find(Features.begin(), Features.end(), "-mmx"); 1683 if (it != Features.end()) 1684 Features.erase(it); 1685 } 1686 1687 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1688 /// definitions for this particular subtarget. 1689 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1690 MacroBuilder &Builder) const { 1691 // Target identification. 1692 if (PointerWidth == 64) { 1693 Builder.defineMacro("_LP64"); 1694 Builder.defineMacro("__LP64__"); 1695 Builder.defineMacro("__amd64__"); 1696 Builder.defineMacro("__amd64"); 1697 Builder.defineMacro("__x86_64"); 1698 Builder.defineMacro("__x86_64__"); 1699 } else { 1700 DefineStd(Builder, "i386", Opts); 1701 } 1702 1703 // Subtarget options. 1704 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1705 // truly should be based on -mtune options. 1706 switch (CPU) { 1707 case CK_Generic: 1708 break; 1709 case CK_i386: 1710 // The rest are coming from the i386 define above. 1711 Builder.defineMacro("__tune_i386__"); 1712 break; 1713 case CK_i486: 1714 case CK_WinChipC6: 1715 case CK_WinChip2: 1716 case CK_C3: 1717 Builder.defineMacro("__i486"); 1718 Builder.defineMacro("__i486__"); 1719 Builder.defineMacro("__tune_i486__"); 1720 break; 1721 case CK_PentiumMMX: 1722 Builder.defineMacro("__pentium_mmx__"); 1723 Builder.defineMacro("__tune_pentium_mmx__"); 1724 // Fallthrough 1725 case CK_i586: 1726 case CK_Pentium: 1727 Builder.defineMacro("__i586"); 1728 Builder.defineMacro("__i586__"); 1729 Builder.defineMacro("__tune_i586__"); 1730 Builder.defineMacro("__pentium"); 1731 Builder.defineMacro("__pentium__"); 1732 Builder.defineMacro("__tune_pentium__"); 1733 break; 1734 case CK_Pentium3: 1735 case CK_Pentium3M: 1736 case CK_PentiumM: 1737 Builder.defineMacro("__tune_pentium3__"); 1738 // Fallthrough 1739 case CK_Pentium2: 1740 case CK_C3_2: 1741 Builder.defineMacro("__tune_pentium2__"); 1742 // Fallthrough 1743 case CK_PentiumPro: 1744 Builder.defineMacro("__tune_i686__"); 1745 Builder.defineMacro("__tune_pentiumpro__"); 1746 // Fallthrough 1747 case CK_i686: 1748 Builder.defineMacro("__i686"); 1749 Builder.defineMacro("__i686__"); 1750 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1751 Builder.defineMacro("__pentiumpro"); 1752 Builder.defineMacro("__pentiumpro__"); 1753 break; 1754 case CK_Pentium4: 1755 case CK_Pentium4M: 1756 Builder.defineMacro("__pentium4"); 1757 Builder.defineMacro("__pentium4__"); 1758 Builder.defineMacro("__tune_pentium4__"); 1759 break; 1760 case CK_Yonah: 1761 case CK_Prescott: 1762 case CK_Nocona: 1763 Builder.defineMacro("__nocona"); 1764 Builder.defineMacro("__nocona__"); 1765 Builder.defineMacro("__tune_nocona__"); 1766 break; 1767 case CK_Core2: 1768 case CK_Penryn: 1769 Builder.defineMacro("__core2"); 1770 Builder.defineMacro("__core2__"); 1771 Builder.defineMacro("__tune_core2__"); 1772 break; 1773 case CK_Atom: 1774 Builder.defineMacro("__atom"); 1775 Builder.defineMacro("__atom__"); 1776 Builder.defineMacro("__tune_atom__"); 1777 break; 1778 case CK_Corei7: 1779 case CK_Corei7AVX: 1780 case CK_CoreAVXi: 1781 Builder.defineMacro("__corei7"); 1782 Builder.defineMacro("__corei7__"); 1783 Builder.defineMacro("__tune_corei7__"); 1784 break; 1785 case CK_K6_2: 1786 Builder.defineMacro("__k6_2__"); 1787 Builder.defineMacro("__tune_k6_2__"); 1788 // Fallthrough 1789 case CK_K6_3: 1790 if (CPU != CK_K6_2) { // In case of fallthrough 1791 // FIXME: GCC may be enabling these in cases where some other k6 1792 // architecture is specified but -m3dnow is explicitly provided. The 1793 // exact semantics need to be determined and emulated here. 1794 Builder.defineMacro("__k6_3__"); 1795 Builder.defineMacro("__tune_k6_3__"); 1796 } 1797 // Fallthrough 1798 case CK_K6: 1799 Builder.defineMacro("__k6"); 1800 Builder.defineMacro("__k6__"); 1801 Builder.defineMacro("__tune_k6__"); 1802 break; 1803 case CK_Athlon: 1804 case CK_AthlonThunderbird: 1805 case CK_Athlon4: 1806 case CK_AthlonXP: 1807 case CK_AthlonMP: 1808 Builder.defineMacro("__athlon"); 1809 Builder.defineMacro("__athlon__"); 1810 Builder.defineMacro("__tune_athlon__"); 1811 if (SSELevel != NoSSE) { 1812 Builder.defineMacro("__athlon_sse__"); 1813 Builder.defineMacro("__tune_athlon_sse__"); 1814 } 1815 break; 1816 case CK_K8: 1817 case CK_K8SSE3: 1818 case CK_x86_64: 1819 case CK_Opteron: 1820 case CK_OpteronSSE3: 1821 case CK_Athlon64: 1822 case CK_Athlon64SSE3: 1823 case CK_AthlonFX: 1824 Builder.defineMacro("__k8"); 1825 Builder.defineMacro("__k8__"); 1826 Builder.defineMacro("__tune_k8__"); 1827 break; 1828 case CK_Geode: 1829 Builder.defineMacro("__geode"); 1830 Builder.defineMacro("__geode__"); 1831 Builder.defineMacro("__tune_geode__"); 1832 break; 1833 } 1834 1835 // Target properties. 1836 Builder.defineMacro("__LITTLE_ENDIAN__"); 1837 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1838 1839 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1840 // functions in glibc header files that use FP Stack inline asm which the 1841 // backend can't deal with (PR879). 1842 Builder.defineMacro("__NO_MATH_INLINES"); 1843 1844 if (HasAES) 1845 Builder.defineMacro("__AES__"); 1846 1847 if (HasAVX) 1848 Builder.defineMacro("__AVX__"); 1849 1850 // Each case falls through to the previous one here. 1851 switch (SSELevel) { 1852 case SSE42: 1853 Builder.defineMacro("__SSE4_2__"); 1854 case SSE41: 1855 Builder.defineMacro("__SSE4_1__"); 1856 case SSSE3: 1857 Builder.defineMacro("__SSSE3__"); 1858 case SSE3: 1859 Builder.defineMacro("__SSE3__"); 1860 case SSE2: 1861 Builder.defineMacro("__SSE2__"); 1862 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1863 case SSE1: 1864 Builder.defineMacro("__SSE__"); 1865 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1866 case NoSSE: 1867 break; 1868 } 1869 1870 if (Opts.MicrosoftExt && PointerWidth == 32) { 1871 switch (SSELevel) { 1872 case SSE42: 1873 case SSE41: 1874 case SSSE3: 1875 case SSE3: 1876 case SSE2: 1877 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1878 break; 1879 case SSE1: 1880 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1881 break; 1882 default: 1883 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1884 } 1885 } 1886 1887 // Each case falls through to the previous one here. 1888 switch (MMX3DNowLevel) { 1889 case AMD3DNowAthlon: 1890 Builder.defineMacro("__3dNOW_A__"); 1891 case AMD3DNow: 1892 Builder.defineMacro("__3dNOW__"); 1893 case MMX: 1894 Builder.defineMacro("__MMX__"); 1895 case NoMMX3DNow: 1896 break; 1897 } 1898 } 1899 1900 1901 bool 1902 X86TargetInfo::validateAsmConstraint(const char *&Name, 1903 TargetInfo::ConstraintInfo &Info) const { 1904 switch (*Name) { 1905 default: return false; 1906 case 'Y': // first letter of a pair: 1907 switch (*(Name+1)) { 1908 default: return false; 1909 case '0': // First SSE register. 1910 case 't': // Any SSE register, when SSE2 is enabled. 1911 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1912 case 'm': // any MMX register, when inter-unit moves enabled. 1913 break; // falls through to setAllowsRegister. 1914 } 1915 case 'a': // eax. 1916 case 'b': // ebx. 1917 case 'c': // ecx. 1918 case 'd': // edx. 1919 case 'S': // esi. 1920 case 'D': // edi. 1921 case 'A': // edx:eax. 1922 case 'f': // any x87 floating point stack register. 1923 case 't': // top of floating point stack. 1924 case 'u': // second from top of floating point stack. 1925 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1926 case 'y': // Any MMX register. 1927 case 'x': // Any SSE register. 1928 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1929 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1930 case 'l': // "Index" registers: any general register that can be used as an 1931 // index in a base+index memory access. 1932 Info.setAllowsRegister(); 1933 return true; 1934 case 'C': // SSE floating point constant. 1935 case 'G': // x87 floating point constant. 1936 case 'e': // 32-bit signed integer constant for use with zero-extending 1937 // x86_64 instructions. 1938 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1939 // x86_64 instructions. 1940 return true; 1941 } 1942 return false; 1943 } 1944 1945 1946 std::string 1947 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1948 switch (*Constraint) { 1949 case 'a': return std::string("{ax}"); 1950 case 'b': return std::string("{bx}"); 1951 case 'c': return std::string("{cx}"); 1952 case 'd': return std::string("{dx}"); 1953 case 'S': return std::string("{si}"); 1954 case 'D': return std::string("{di}"); 1955 case 'p': // address 1956 return std::string("im"); 1957 case 't': // top of floating point stack. 1958 return std::string("{st}"); 1959 case 'u': // second from top of floating point stack. 1960 return std::string("{st(1)}"); // second from top of floating point stack. 1961 default: 1962 return std::string(1, *Constraint); 1963 } 1964 } 1965 } // end anonymous namespace 1966 1967 namespace { 1968 // X86-32 generic target 1969 class X86_32TargetInfo : public X86TargetInfo { 1970 public: 1971 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1972 DoubleAlign = LongLongAlign = 32; 1973 LongDoubleWidth = 96; 1974 LongDoubleAlign = 32; 1975 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1976 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1977 "a0:0:64-f80:32:32-n8:16:32-S128"; 1978 SizeType = UnsignedInt; 1979 PtrDiffType = SignedInt; 1980 IntPtrType = SignedInt; 1981 RegParmMax = 3; 1982 1983 // Use fpret for all types. 1984 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1985 (1 << TargetInfo::Double) | 1986 (1 << TargetInfo::LongDouble)); 1987 } 1988 virtual const char *getVAListDeclaration() const { 1989 return "typedef char* __builtin_va_list;"; 1990 } 1991 1992 int getEHDataRegisterNumber(unsigned RegNo) const { 1993 if (RegNo == 0) return 0; 1994 if (RegNo == 1) return 2; 1995 return -1; 1996 } 1997 }; 1998 } // end anonymous namespace 1999 2000 namespace { 2001 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2002 public: 2003 OpenBSDI386TargetInfo(const std::string& triple) : 2004 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2005 SizeType = UnsignedLong; 2006 IntPtrType = SignedLong; 2007 PtrDiffType = SignedLong; 2008 } 2009 }; 2010 } // end anonymous namespace 2011 2012 namespace { 2013 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2014 public: 2015 DarwinI386TargetInfo(const std::string& triple) : 2016 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2017 LongDoubleWidth = 128; 2018 LongDoubleAlign = 128; 2019 SizeType = UnsignedLong; 2020 IntPtrType = SignedLong; 2021 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2022 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2023 "a0:0:64-f80:128:128-n8:16:32-S128"; 2024 HasAlignMac68kSupport = true; 2025 } 2026 2027 }; 2028 } // end anonymous namespace 2029 2030 namespace { 2031 // x86-32 Windows target 2032 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2033 public: 2034 WindowsX86_32TargetInfo(const std::string& triple) 2035 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2036 TLSSupported = false; 2037 WCharType = UnsignedShort; 2038 DoubleAlign = LongLongAlign = 64; 2039 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2040 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2041 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2042 } 2043 virtual void getTargetDefines(const LangOptions &Opts, 2044 MacroBuilder &Builder) const { 2045 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2046 } 2047 }; 2048 } // end anonymous namespace 2049 2050 namespace { 2051 2052 // x86-32 Windows Visual Studio target 2053 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2054 public: 2055 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2056 : WindowsX86_32TargetInfo(triple) { 2057 LongDoubleWidth = LongDoubleAlign = 64; 2058 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2059 } 2060 virtual void getTargetDefines(const LangOptions &Opts, 2061 MacroBuilder &Builder) const { 2062 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2063 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2064 // The value of the following reflects processor type. 2065 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2066 // We lost the original triple, so we use the default. 2067 Builder.defineMacro("_M_IX86", "600"); 2068 } 2069 }; 2070 } // end anonymous namespace 2071 2072 namespace { 2073 // x86-32 MinGW target 2074 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2075 public: 2076 MinGWX86_32TargetInfo(const std::string& triple) 2077 : WindowsX86_32TargetInfo(triple) { 2078 } 2079 virtual void getTargetDefines(const LangOptions &Opts, 2080 MacroBuilder &Builder) const { 2081 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2082 DefineStd(Builder, "WIN32", Opts); 2083 DefineStd(Builder, "WINNT", Opts); 2084 Builder.defineMacro("_X86_"); 2085 Builder.defineMacro("__MSVCRT__"); 2086 Builder.defineMacro("__MINGW32__"); 2087 2088 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2089 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2090 if (Opts.MicrosoftExt) 2091 // Provide "as-is" __declspec. 2092 Builder.defineMacro("__declspec", "__declspec"); 2093 else 2094 // Provide alias of __attribute__ like mingw32-gcc. 2095 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2096 } 2097 }; 2098 } // end anonymous namespace 2099 2100 namespace { 2101 // x86-32 Cygwin target 2102 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2103 public: 2104 CygwinX86_32TargetInfo(const std::string& triple) 2105 : X86_32TargetInfo(triple) { 2106 TLSSupported = false; 2107 WCharType = UnsignedShort; 2108 DoubleAlign = LongLongAlign = 64; 2109 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2110 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2111 "a0:0:64-f80:32:32-n8:16:32-S32"; 2112 } 2113 virtual void getTargetDefines(const LangOptions &Opts, 2114 MacroBuilder &Builder) const { 2115 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2116 Builder.defineMacro("__CYGWIN__"); 2117 Builder.defineMacro("__CYGWIN32__"); 2118 DefineStd(Builder, "unix", Opts); 2119 if (Opts.CPlusPlus) 2120 Builder.defineMacro("_GNU_SOURCE"); 2121 } 2122 }; 2123 } // end anonymous namespace 2124 2125 namespace { 2126 // x86-32 Haiku target 2127 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2128 public: 2129 HaikuX86_32TargetInfo(const std::string& triple) 2130 : X86_32TargetInfo(triple) { 2131 SizeType = UnsignedLong; 2132 IntPtrType = SignedLong; 2133 PtrDiffType = SignedLong; 2134 this->UserLabelPrefix = ""; 2135 } 2136 virtual void getTargetDefines(const LangOptions &Opts, 2137 MacroBuilder &Builder) const { 2138 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2139 Builder.defineMacro("__INTEL__"); 2140 Builder.defineMacro("__HAIKU__"); 2141 } 2142 }; 2143 } // end anonymous namespace 2144 2145 // RTEMS Target 2146 template<typename Target> 2147 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2148 protected: 2149 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2150 MacroBuilder &Builder) const { 2151 // RTEMS defines; list based off of gcc output 2152 2153 Builder.defineMacro("__rtems__"); 2154 Builder.defineMacro("__ELF__"); 2155 } 2156 public: 2157 RTEMSTargetInfo(const std::string &triple) 2158 : OSTargetInfo<Target>(triple) { 2159 this->UserLabelPrefix = ""; 2160 2161 llvm::Triple Triple(triple); 2162 switch (Triple.getArch()) { 2163 default: 2164 case llvm::Triple::x86: 2165 // this->MCountName = ".mcount"; 2166 break; 2167 case llvm::Triple::mips: 2168 case llvm::Triple::mipsel: 2169 case llvm::Triple::ppc: 2170 case llvm::Triple::ppc64: 2171 // this->MCountName = "_mcount"; 2172 break; 2173 case llvm::Triple::arm: 2174 // this->MCountName = "__mcount"; 2175 break; 2176 } 2177 2178 } 2179 }; 2180 2181 namespace { 2182 // x86-32 RTEMS target 2183 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2184 public: 2185 RTEMSX86_32TargetInfo(const std::string& triple) 2186 : X86_32TargetInfo(triple) { 2187 SizeType = UnsignedLong; 2188 IntPtrType = SignedLong; 2189 PtrDiffType = SignedLong; 2190 this->UserLabelPrefix = ""; 2191 } 2192 virtual void getTargetDefines(const LangOptions &Opts, 2193 MacroBuilder &Builder) const { 2194 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2195 Builder.defineMacro("__INTEL__"); 2196 Builder.defineMacro("__rtems__"); 2197 } 2198 }; 2199 } // end anonymous namespace 2200 2201 namespace { 2202 // x86-64 generic target 2203 class X86_64TargetInfo : public X86TargetInfo { 2204 public: 2205 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2206 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2207 LongDoubleWidth = 128; 2208 LongDoubleAlign = 128; 2209 LargeArrayMinWidth = 128; 2210 LargeArrayAlign = 128; 2211 IntMaxType = SignedLong; 2212 UIntMaxType = UnsignedLong; 2213 Int64Type = SignedLong; 2214 RegParmMax = 6; 2215 2216 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2217 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2218 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2219 2220 // Use fpret only for long double. 2221 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2222 } 2223 virtual const char *getVAListDeclaration() const { 2224 return "typedef struct __va_list_tag {" 2225 " unsigned gp_offset;" 2226 " unsigned fp_offset;" 2227 " void* overflow_arg_area;" 2228 " void* reg_save_area;" 2229 "} __va_list_tag;" 2230 "typedef __va_list_tag __builtin_va_list[1];"; 2231 } 2232 2233 int getEHDataRegisterNumber(unsigned RegNo) const { 2234 if (RegNo == 0) return 0; 2235 if (RegNo == 1) return 1; 2236 return -1; 2237 } 2238 }; 2239 } // end anonymous namespace 2240 2241 namespace { 2242 // x86-64 Windows target 2243 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2244 public: 2245 WindowsX86_64TargetInfo(const std::string& triple) 2246 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2247 TLSSupported = false; 2248 WCharType = UnsignedShort; 2249 LongWidth = LongAlign = 32; 2250 DoubleAlign = LongLongAlign = 64; 2251 IntMaxType = SignedLongLong; 2252 UIntMaxType = UnsignedLongLong; 2253 Int64Type = SignedLongLong; 2254 SizeType = UnsignedLongLong; 2255 PtrDiffType = SignedLongLong; 2256 IntPtrType = SignedLongLong; 2257 this->UserLabelPrefix = ""; 2258 } 2259 virtual void getTargetDefines(const LangOptions &Opts, 2260 MacroBuilder &Builder) const { 2261 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2262 Builder.defineMacro("_WIN64"); 2263 } 2264 virtual const char *getVAListDeclaration() const { 2265 return "typedef char* __builtin_va_list;"; 2266 } 2267 }; 2268 } // end anonymous namespace 2269 2270 namespace { 2271 // x86-64 Windows Visual Studio target 2272 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2273 public: 2274 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2275 : WindowsX86_64TargetInfo(triple) { 2276 LongDoubleWidth = LongDoubleAlign = 64; 2277 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2278 } 2279 virtual void getTargetDefines(const LangOptions &Opts, 2280 MacroBuilder &Builder) const { 2281 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2282 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2283 Builder.defineMacro("_M_X64"); 2284 Builder.defineMacro("_M_AMD64"); 2285 } 2286 }; 2287 } // end anonymous namespace 2288 2289 namespace { 2290 // x86-64 MinGW target 2291 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2292 public: 2293 MinGWX86_64TargetInfo(const std::string& triple) 2294 : WindowsX86_64TargetInfo(triple) { 2295 } 2296 virtual void getTargetDefines(const LangOptions &Opts, 2297 MacroBuilder &Builder) const { 2298 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2299 DefineStd(Builder, "WIN64", Opts); 2300 Builder.defineMacro("__MSVCRT__"); 2301 Builder.defineMacro("__MINGW32__"); 2302 Builder.defineMacro("__MINGW64__"); 2303 2304 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2305 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2306 if (Opts.MicrosoftExt) 2307 // Provide "as-is" __declspec. 2308 Builder.defineMacro("__declspec", "__declspec"); 2309 else 2310 // Provide alias of __attribute__ like mingw32-gcc. 2311 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2312 } 2313 }; 2314 } // end anonymous namespace 2315 2316 namespace { 2317 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2318 public: 2319 DarwinX86_64TargetInfo(const std::string& triple) 2320 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2321 Int64Type = SignedLongLong; 2322 } 2323 }; 2324 } // end anonymous namespace 2325 2326 namespace { 2327 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2328 public: 2329 OpenBSDX86_64TargetInfo(const std::string& triple) 2330 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2331 IntMaxType = SignedLongLong; 2332 UIntMaxType = UnsignedLongLong; 2333 Int64Type = SignedLongLong; 2334 } 2335 }; 2336 } // end anonymous namespace 2337 2338 namespace { 2339 class ARMTargetInfo : public TargetInfo { 2340 // Possible FPU choices. 2341 enum FPUMode { 2342 NoFPU, 2343 VFP2FPU, 2344 VFP3FPU, 2345 NeonFPU 2346 }; 2347 2348 static bool FPUModeIsVFP(FPUMode Mode) { 2349 return Mode >= VFP2FPU && Mode <= NeonFPU; 2350 } 2351 2352 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2353 static const char * const GCCRegNames[]; 2354 2355 std::string ABI, CPU; 2356 2357 unsigned FPU : 3; 2358 2359 unsigned IsThumb : 1; 2360 2361 // Initialized via features. 2362 unsigned SoftFloat : 1; 2363 unsigned SoftFloatABI : 1; 2364 2365 static const Builtin::Info BuiltinInfo[]; 2366 2367 public: 2368 ARMTargetInfo(const std::string &TripleStr) 2369 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2370 { 2371 SizeType = UnsignedInt; 2372 PtrDiffType = SignedInt; 2373 2374 // {} in inline assembly are neon specifiers, not assembly variant 2375 // specifiers. 2376 NoAsmVariants = true; 2377 2378 // FIXME: Should we just treat this as a feature? 2379 IsThumb = getTriple().getArchName().startswith("thumb"); 2380 if (IsThumb) { 2381 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2382 // so set preferred for small types to 32. 2383 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2384 "i64:64:64-f32:32:32-f64:64:64-" 2385 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2386 } else { 2387 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2388 "i64:64:64-f32:32:32-f64:64:64-" 2389 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2390 } 2391 2392 // ARM targets default to using the ARM C++ ABI. 2393 CXXABI = CXXABI_ARM; 2394 } 2395 virtual const char *getABI() const { return ABI.c_str(); } 2396 virtual bool setABI(const std::string &Name) { 2397 ABI = Name; 2398 2399 // The defaults (above) are for AAPCS, check if we need to change them. 2400 // 2401 // FIXME: We need support for -meabi... we could just mangle it into the 2402 // name. 2403 if (Name == "apcs-gnu") { 2404 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2405 SizeType = UnsignedLong; 2406 2407 // Do not respect the alignment of bit-field types when laying out 2408 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2409 UseBitFieldTypeAlignment = false; 2410 2411 /// Do force alignment of members that follow zero length bitfields. If 2412 /// the alignment of the zero-length bitfield is greater than the member 2413 /// that follows it, `bar', `bar' will be aligned as the type of the 2414 /// zero length bitfield. 2415 UseZeroLengthBitfieldAlignment = true; 2416 2417 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2418 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2419 /// gcc. 2420 ZeroLengthBitfieldBoundary = 32; 2421 2422 if (IsThumb) { 2423 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2424 // so set preferred for small types to 32. 2425 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2426 "i64:32:64-f32:32:32-f64:32:64-" 2427 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2428 } else { 2429 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2430 "i64:32:64-f32:32:32-f64:32:64-" 2431 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2432 } 2433 2434 // FIXME: Override "preferred align" for double and long long. 2435 } else if (Name == "aapcs") { 2436 // FIXME: Enumerated types are variable width in straight AAPCS. 2437 } else if (Name == "aapcs-linux") { 2438 ; 2439 } else 2440 return false; 2441 2442 return true; 2443 } 2444 2445 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2446 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2447 Features["vfp2"] = true; 2448 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2449 Features["neon"] = true; 2450 } 2451 2452 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2453 const std::string &Name, 2454 bool Enabled) const { 2455 if (Name == "soft-float" || Name == "soft-float-abi" || 2456 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2457 Features[Name] = Enabled; 2458 } else 2459 return false; 2460 2461 return true; 2462 } 2463 2464 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2465 FPU = NoFPU; 2466 SoftFloat = SoftFloatABI = false; 2467 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2468 if (Features[i] == "+soft-float") 2469 SoftFloat = true; 2470 else if (Features[i] == "+soft-float-abi") 2471 SoftFloatABI = true; 2472 else if (Features[i] == "+vfp2") 2473 FPU = VFP2FPU; 2474 else if (Features[i] == "+vfp3") 2475 FPU = VFP3FPU; 2476 else if (Features[i] == "+neon") 2477 FPU = NeonFPU; 2478 } 2479 2480 // Remove front-end specific options which the backend handles differently. 2481 std::vector<std::string>::iterator it; 2482 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2483 if (it != Features.end()) 2484 Features.erase(it); 2485 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2486 if (it != Features.end()) 2487 Features.erase(it); 2488 } 2489 2490 static const char *getCPUDefineSuffix(StringRef Name) { 2491 return llvm::StringSwitch<const char*>(Name) 2492 .Cases("arm8", "arm810", "4") 2493 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2494 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2495 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2496 .Case("ep9312", "4T") 2497 .Cases("arm10tdmi", "arm1020t", "5T") 2498 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2499 .Case("arm926ej-s", "5TEJ") 2500 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2501 .Cases("xscale", "iwmmxt", "5TE") 2502 .Case("arm1136j-s", "6J") 2503 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2504 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2505 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2506 .Cases("cortex-a8", "cortex-a9", "7A") 2507 .Case("cortex-m3", "7M") 2508 .Case("cortex-m0", "6M") 2509 .Default(0); 2510 } 2511 virtual bool setCPU(const std::string &Name) { 2512 if (!getCPUDefineSuffix(Name)) 2513 return false; 2514 2515 CPU = Name; 2516 return true; 2517 } 2518 virtual void getTargetDefines(const LangOptions &Opts, 2519 MacroBuilder &Builder) const { 2520 // Target identification. 2521 Builder.defineMacro("__arm"); 2522 Builder.defineMacro("__arm__"); 2523 2524 // Target properties. 2525 Builder.defineMacro("__ARMEL__"); 2526 Builder.defineMacro("__LITTLE_ENDIAN__"); 2527 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2528 2529 StringRef CPUArch = getCPUDefineSuffix(CPU); 2530 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2531 2532 // Subtarget options. 2533 2534 // FIXME: It's more complicated than this and we don't really support 2535 // interworking. 2536 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2537 Builder.defineMacro("__THUMB_INTERWORK__"); 2538 2539 if (ABI == "aapcs" || ABI == "aapcs-linux") 2540 Builder.defineMacro("__ARM_EABI__"); 2541 2542 if (SoftFloat) 2543 Builder.defineMacro("__SOFTFP__"); 2544 2545 if (CPU == "xscale") 2546 Builder.defineMacro("__XSCALE__"); 2547 2548 bool IsARMv7 = CPUArch.startswith("7"); 2549 if (IsThumb) { 2550 Builder.defineMacro("__THUMBEL__"); 2551 Builder.defineMacro("__thumb__"); 2552 if (CPUArch == "6T2" || IsARMv7) 2553 Builder.defineMacro("__thumb2__"); 2554 } 2555 2556 // Note, this is always on in gcc, even though it doesn't make sense. 2557 Builder.defineMacro("__APCS_32__"); 2558 2559 if (FPUModeIsVFP((FPUMode) FPU)) 2560 Builder.defineMacro("__VFP_FP__"); 2561 2562 // This only gets set when Neon instructions are actually available, unlike 2563 // the VFP define, hence the soft float and arch check. This is subtly 2564 // different from gcc, we follow the intent which was that it should be set 2565 // when Neon instructions are actually available. 2566 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2567 Builder.defineMacro("__ARM_NEON__"); 2568 } 2569 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2570 unsigned &NumRecords) const { 2571 Records = BuiltinInfo; 2572 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2573 } 2574 virtual const char *getVAListDeclaration() const { 2575 return "typedef void* __builtin_va_list;"; 2576 } 2577 virtual void getGCCRegNames(const char * const *&Names, 2578 unsigned &NumNames) const; 2579 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2580 unsigned &NumAliases) const; 2581 virtual bool validateAsmConstraint(const char *&Name, 2582 TargetInfo::ConstraintInfo &Info) const { 2583 // FIXME: Check if this is complete 2584 switch (*Name) { 2585 default: 2586 case 'l': // r0-r7 2587 case 'h': // r8-r15 2588 case 'w': // VFP Floating point register single precision 2589 case 'P': // VFP Floating point register double precision 2590 Info.setAllowsRegister(); 2591 return true; 2592 case 'Q': // A memory address that is a single base register. 2593 Info.setAllowsMemory(); 2594 return true; 2595 case 'U': // a memory reference... 2596 switch (Name[1]) { 2597 case 'q': // ...ARMV4 ldrsb 2598 case 'v': // ...VFP load/store (reg+constant offset) 2599 case 'y': // ...iWMMXt load/store 2600 case 't': // address valid for load/store opaque types wider 2601 // than 128-bits 2602 case 'n': // valid address for Neon doubleword vector load/store 2603 case 'm': // valid address for Neon element and structure load/store 2604 case 's': // valid address for non-offset loads/stores of quad-word 2605 // values in four ARM registers 2606 Info.setAllowsMemory(); 2607 Name++; 2608 return true; 2609 } 2610 } 2611 return false; 2612 } 2613 virtual std::string convertConstraint(const char *&Constraint) const { 2614 std::string R; 2615 switch (*Constraint) { 2616 case 'U': // Two-character constraint; add "^" hint for later parsing. 2617 R = std::string("^") + std::string(Constraint, 2); 2618 Constraint++; 2619 break; 2620 case 'p': // 'p' should be translated to 'r' by default. 2621 R = std::string("r"); 2622 break; 2623 default: 2624 return std::string(1, *Constraint); 2625 } 2626 return R; 2627 } 2628 virtual const char *getClobbers() const { 2629 // FIXME: Is this really right? 2630 return ""; 2631 } 2632 }; 2633 2634 const char * const ARMTargetInfo::GCCRegNames[] = { 2635 // Integer registers 2636 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2637 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2638 2639 // Float registers 2640 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2641 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2642 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2643 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2644 2645 // Double registers 2646 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2647 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2648 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2649 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2650 2651 // Quad registers 2652 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2653 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2654 }; 2655 2656 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2657 unsigned &NumNames) const { 2658 Names = GCCRegNames; 2659 NumNames = llvm::array_lengthof(GCCRegNames); 2660 } 2661 2662 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2663 { { "a1" }, "r0" }, 2664 { { "a2" }, "r1" }, 2665 { { "a3" }, "r2" }, 2666 { { "a4" }, "r3" }, 2667 { { "v1" }, "r4" }, 2668 { { "v2" }, "r5" }, 2669 { { "v3" }, "r6" }, 2670 { { "v4" }, "r7" }, 2671 { { "v5" }, "r8" }, 2672 { { "v6", "rfp" }, "r9" }, 2673 { { "sl" }, "r10" }, 2674 { { "fp" }, "r11" }, 2675 { { "ip" }, "r12" }, 2676 { { "r13" }, "sp" }, 2677 { { "r14" }, "lr" }, 2678 { { "r15" }, "pc" }, 2679 // The S, D and Q registers overlap, but aren't really aliases; we 2680 // don't want to substitute one of these for a different-sized one. 2681 }; 2682 2683 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2684 unsigned &NumAliases) const { 2685 Aliases = GCCRegAliases; 2686 NumAliases = llvm::array_lengthof(GCCRegAliases); 2687 } 2688 2689 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2690 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2691 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2692 ALL_LANGUAGES }, 2693 #include "clang/Basic/BuiltinsARM.def" 2694 }; 2695 } // end anonymous namespace. 2696 2697 2698 namespace { 2699 class DarwinARMTargetInfo : 2700 public DarwinTargetInfo<ARMTargetInfo> { 2701 protected: 2702 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2703 MacroBuilder &Builder) const { 2704 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2705 } 2706 2707 public: 2708 DarwinARMTargetInfo(const std::string& triple) 2709 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2710 HasAlignMac68kSupport = true; 2711 } 2712 }; 2713 } // end anonymous namespace. 2714 2715 namespace { 2716 class SparcV8TargetInfo : public TargetInfo { 2717 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2718 static const char * const GCCRegNames[]; 2719 bool SoftFloat; 2720 public: 2721 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2722 // FIXME: Support Sparc quad-precision long double? 2723 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2724 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2725 } 2726 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2727 const std::string &Name, 2728 bool Enabled) const { 2729 if (Name == "soft-float") 2730 Features[Name] = Enabled; 2731 else 2732 return false; 2733 2734 return true; 2735 } 2736 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2737 SoftFloat = false; 2738 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2739 if (Features[i] == "+soft-float") 2740 SoftFloat = true; 2741 } 2742 virtual void getTargetDefines(const LangOptions &Opts, 2743 MacroBuilder &Builder) const { 2744 DefineStd(Builder, "sparc", Opts); 2745 Builder.defineMacro("__sparcv8"); 2746 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2747 2748 if (SoftFloat) 2749 Builder.defineMacro("SOFT_FLOAT", "1"); 2750 } 2751 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2752 unsigned &NumRecords) const { 2753 // FIXME: Implement! 2754 } 2755 virtual const char *getVAListDeclaration() const { 2756 return "typedef void* __builtin_va_list;"; 2757 } 2758 virtual void getGCCRegNames(const char * const *&Names, 2759 unsigned &NumNames) const; 2760 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2761 unsigned &NumAliases) const; 2762 virtual bool validateAsmConstraint(const char *&Name, 2763 TargetInfo::ConstraintInfo &info) const { 2764 // FIXME: Implement! 2765 return false; 2766 } 2767 virtual const char *getClobbers() const { 2768 // FIXME: Implement! 2769 return ""; 2770 } 2771 }; 2772 2773 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2774 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2775 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2776 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2777 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2778 }; 2779 2780 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2781 unsigned &NumNames) const { 2782 Names = GCCRegNames; 2783 NumNames = llvm::array_lengthof(GCCRegNames); 2784 } 2785 2786 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2787 { { "g0" }, "r0" }, 2788 { { "g1" }, "r1" }, 2789 { { "g2" }, "r2" }, 2790 { { "g3" }, "r3" }, 2791 { { "g4" }, "r4" }, 2792 { { "g5" }, "r5" }, 2793 { { "g6" }, "r6" }, 2794 { { "g7" }, "r7" }, 2795 { { "o0" }, "r8" }, 2796 { { "o1" }, "r9" }, 2797 { { "o2" }, "r10" }, 2798 { { "o3" }, "r11" }, 2799 { { "o4" }, "r12" }, 2800 { { "o5" }, "r13" }, 2801 { { "o6", "sp" }, "r14" }, 2802 { { "o7" }, "r15" }, 2803 { { "l0" }, "r16" }, 2804 { { "l1" }, "r17" }, 2805 { { "l2" }, "r18" }, 2806 { { "l3" }, "r19" }, 2807 { { "l4" }, "r20" }, 2808 { { "l5" }, "r21" }, 2809 { { "l6" }, "r22" }, 2810 { { "l7" }, "r23" }, 2811 { { "i0" }, "r24" }, 2812 { { "i1" }, "r25" }, 2813 { { "i2" }, "r26" }, 2814 { { "i3" }, "r27" }, 2815 { { "i4" }, "r28" }, 2816 { { "i5" }, "r29" }, 2817 { { "i6", "fp" }, "r30" }, 2818 { { "i7" }, "r31" }, 2819 }; 2820 2821 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2822 unsigned &NumAliases) const { 2823 Aliases = GCCRegAliases; 2824 NumAliases = llvm::array_lengthof(GCCRegAliases); 2825 } 2826 } // end anonymous namespace. 2827 2828 namespace { 2829 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2830 public: 2831 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2832 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2833 SizeType = UnsignedInt; 2834 PtrDiffType = SignedInt; 2835 } 2836 }; 2837 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2838 public: 2839 SolarisSparcV8TargetInfo(const std::string& triple) : 2840 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2841 SizeType = UnsignedInt; 2842 PtrDiffType = SignedInt; 2843 } 2844 }; 2845 } // end anonymous namespace. 2846 2847 namespace { 2848 class MSP430TargetInfo : public TargetInfo { 2849 static const char * const GCCRegNames[]; 2850 public: 2851 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2852 TLSSupported = false; 2853 IntWidth = 16; IntAlign = 16; 2854 LongWidth = 32; LongLongWidth = 64; 2855 LongAlign = LongLongAlign = 16; 2856 PointerWidth = 16; PointerAlign = 16; 2857 SizeType = UnsignedInt; 2858 IntMaxType = SignedLong; 2859 UIntMaxType = UnsignedLong; 2860 IntPtrType = SignedShort; 2861 PtrDiffType = SignedInt; 2862 SigAtomicType = SignedLong; 2863 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2864 } 2865 virtual void getTargetDefines(const LangOptions &Opts, 2866 MacroBuilder &Builder) const { 2867 Builder.defineMacro("MSP430"); 2868 Builder.defineMacro("__MSP430__"); 2869 // FIXME: defines for different 'flavours' of MCU 2870 } 2871 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2872 unsigned &NumRecords) const { 2873 // FIXME: Implement. 2874 Records = 0; 2875 NumRecords = 0; 2876 } 2877 virtual void getGCCRegNames(const char * const *&Names, 2878 unsigned &NumNames) const; 2879 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2880 unsigned &NumAliases) const { 2881 // No aliases. 2882 Aliases = 0; 2883 NumAliases = 0; 2884 } 2885 virtual bool validateAsmConstraint(const char *&Name, 2886 TargetInfo::ConstraintInfo &info) const { 2887 // No target constraints for now. 2888 return false; 2889 } 2890 virtual const char *getClobbers() const { 2891 // FIXME: Is this really right? 2892 return ""; 2893 } 2894 virtual const char *getVAListDeclaration() const { 2895 // FIXME: implement 2896 return "typedef char* __builtin_va_list;"; 2897 } 2898 }; 2899 2900 const char * const MSP430TargetInfo::GCCRegNames[] = { 2901 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2902 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2903 }; 2904 2905 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2906 unsigned &NumNames) const { 2907 Names = GCCRegNames; 2908 NumNames = llvm::array_lengthof(GCCRegNames); 2909 } 2910 } 2911 2912 2913 namespace { 2914 class SystemZTargetInfo : public TargetInfo { 2915 static const char * const GCCRegNames[]; 2916 public: 2917 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2918 TLSSupported = false; 2919 IntWidth = IntAlign = 32; 2920 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2921 PointerWidth = PointerAlign = 64; 2922 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2923 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2924 } 2925 virtual void getTargetDefines(const LangOptions &Opts, 2926 MacroBuilder &Builder) const { 2927 Builder.defineMacro("__s390__"); 2928 Builder.defineMacro("__s390x__"); 2929 } 2930 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2931 unsigned &NumRecords) const { 2932 // FIXME: Implement. 2933 Records = 0; 2934 NumRecords = 0; 2935 } 2936 2937 virtual void getGCCRegNames(const char * const *&Names, 2938 unsigned &NumNames) const; 2939 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2940 unsigned &NumAliases) const { 2941 // No aliases. 2942 Aliases = 0; 2943 NumAliases = 0; 2944 } 2945 virtual bool validateAsmConstraint(const char *&Name, 2946 TargetInfo::ConstraintInfo &info) const { 2947 // FIXME: implement 2948 return true; 2949 } 2950 virtual const char *getClobbers() const { 2951 // FIXME: Is this really right? 2952 return ""; 2953 } 2954 virtual const char *getVAListDeclaration() const { 2955 // FIXME: implement 2956 return "typedef char* __builtin_va_list;"; 2957 } 2958 }; 2959 2960 const char * const SystemZTargetInfo::GCCRegNames[] = { 2961 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2962 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2963 }; 2964 2965 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2966 unsigned &NumNames) const { 2967 Names = GCCRegNames; 2968 NumNames = llvm::array_lengthof(GCCRegNames); 2969 } 2970 } 2971 2972 namespace { 2973 class BlackfinTargetInfo : public TargetInfo { 2974 static const char * const GCCRegNames[]; 2975 public: 2976 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 2977 TLSSupported = false; 2978 DoubleAlign = 32; 2979 LongLongAlign = 32; 2980 LongDoubleAlign = 32; 2981 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 2982 } 2983 2984 virtual void getTargetDefines(const LangOptions &Opts, 2985 MacroBuilder &Builder) const { 2986 DefineStd(Builder, "bfin", Opts); 2987 DefineStd(Builder, "BFIN", Opts); 2988 Builder.defineMacro("__ADSPBLACKFIN__"); 2989 // FIXME: This one is really dependent on -mcpu 2990 Builder.defineMacro("__ADSPLPBLACKFIN__"); 2991 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 2992 } 2993 2994 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2995 unsigned &NumRecords) const { 2996 // FIXME: Implement. 2997 Records = 0; 2998 NumRecords = 0; 2999 } 3000 3001 virtual void getGCCRegNames(const char * const *&Names, 3002 unsigned &NumNames) const; 3003 3004 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3005 unsigned &NumAliases) const { 3006 // No aliases. 3007 Aliases = 0; 3008 NumAliases = 0; 3009 } 3010 3011 virtual bool validateAsmConstraint(const char *&Name, 3012 TargetInfo::ConstraintInfo &Info) const { 3013 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 3014 Info.setAllowsRegister(); 3015 return true; 3016 } 3017 return false; 3018 } 3019 3020 virtual const char *getClobbers() const { 3021 return ""; 3022 } 3023 3024 virtual const char *getVAListDeclaration() const { 3025 return "typedef char* __builtin_va_list;"; 3026 } 3027 }; 3028 3029 const char * const BlackfinTargetInfo::GCCRegNames[] = { 3030 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3031 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 3032 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 3033 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 3034 "a0", "a1", "cc", 3035 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 3036 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 3037 }; 3038 3039 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 3040 unsigned &NumNames) const { 3041 Names = GCCRegNames; 3042 NumNames = llvm::array_lengthof(GCCRegNames); 3043 } 3044 } 3045 3046 namespace { 3047 3048 // LLVM and Clang cannot be used directly to output native binaries for 3049 // target, but is used to compile C code to llvm bitcode with correct 3050 // type and alignment information. 3051 // 3052 // TCE uses the llvm bitcode as input and uses it for generating customized 3053 // target processor and program binary. TCE co-design environment is 3054 // publicly available in http://tce.cs.tut.fi 3055 3056 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3057 3, // opencl_global 3058 4, // opencl_local 3059 5 // opencl_constant 3060 }; 3061 3062 class TCETargetInfo : public TargetInfo{ 3063 public: 3064 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3065 TLSSupported = false; 3066 IntWidth = 32; 3067 LongWidth = LongLongWidth = 32; 3068 PointerWidth = 32; 3069 IntAlign = 32; 3070 LongAlign = LongLongAlign = 32; 3071 PointerAlign = 32; 3072 SizeType = UnsignedInt; 3073 IntMaxType = SignedLong; 3074 UIntMaxType = UnsignedLong; 3075 IntPtrType = SignedInt; 3076 PtrDiffType = SignedInt; 3077 FloatWidth = 32; 3078 FloatAlign = 32; 3079 DoubleWidth = 32; 3080 DoubleAlign = 32; 3081 LongDoubleWidth = 32; 3082 LongDoubleAlign = 32; 3083 FloatFormat = &llvm::APFloat::IEEEsingle; 3084 DoubleFormat = &llvm::APFloat::IEEEsingle; 3085 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3086 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3087 "i16:16:32-i32:32:32-i64:32:32-" 3088 "f32:32:32-f64:32:32-v64:32:32-" 3089 "v128:32:32-a0:0:32-n32"; 3090 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3091 } 3092 3093 virtual void getTargetDefines(const LangOptions &Opts, 3094 MacroBuilder &Builder) const { 3095 DefineStd(Builder, "tce", Opts); 3096 Builder.defineMacro("__TCE__"); 3097 Builder.defineMacro("__TCE_V1__"); 3098 } 3099 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3100 unsigned &NumRecords) const {} 3101 virtual const char *getClobbers() const { 3102 return ""; 3103 } 3104 virtual const char *getVAListDeclaration() const { 3105 return "typedef void* __builtin_va_list;"; 3106 } 3107 virtual void getGCCRegNames(const char * const *&Names, 3108 unsigned &NumNames) const {} 3109 virtual bool validateAsmConstraint(const char *&Name, 3110 TargetInfo::ConstraintInfo &info) const { 3111 return true; 3112 } 3113 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3114 unsigned &NumAliases) const {} 3115 }; 3116 } 3117 3118 namespace { 3119 class MipsTargetInfoBase : public TargetInfo { 3120 std::string CPU; 3121 protected: 3122 std::string ABI; 3123 public: 3124 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3125 : TargetInfo(triple), ABI(ABIStr) { 3126 SizeType = UnsignedInt; 3127 PtrDiffType = SignedInt; 3128 } 3129 virtual const char *getABI() const { return ABI.c_str(); } 3130 virtual bool setABI(const std::string &Name) = 0; 3131 virtual bool setCPU(const std::string &Name) { 3132 CPU = Name; 3133 return true; 3134 } 3135 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3136 Features[ABI] = true; 3137 Features[CPU] = true; 3138 } 3139 virtual void getArchDefines(const LangOptions &Opts, 3140 MacroBuilder &Builder) const = 0; 3141 virtual void getTargetDefines(const LangOptions &Opts, 3142 MacroBuilder &Builder) const = 0; 3143 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3144 unsigned &NumRecords) const { 3145 // FIXME: Implement! 3146 } 3147 virtual const char *getVAListDeclaration() const { 3148 return "typedef void* __builtin_va_list;"; 3149 } 3150 virtual void getGCCRegNames(const char * const *&Names, 3151 unsigned &NumNames) const { 3152 static const char * const GCCRegNames[] = { 3153 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3154 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3155 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3156 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3157 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3158 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3159 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3160 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3161 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3162 "$fcc5","$fcc6","$fcc7" 3163 }; 3164 Names = GCCRegNames; 3165 NumNames = llvm::array_lengthof(GCCRegNames); 3166 } 3167 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3168 unsigned &NumAliases) const = 0; 3169 virtual bool validateAsmConstraint(const char *&Name, 3170 TargetInfo::ConstraintInfo &Info) const { 3171 switch (*Name) { 3172 default: 3173 case 'r': // CPU registers. 3174 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3175 case 'y': // Equivalent to "r", backwards compatibility only. 3176 case 'f': // floating-point registers. 3177 Info.setAllowsRegister(); 3178 return true; 3179 } 3180 return false; 3181 } 3182 3183 virtual const char *getClobbers() const { 3184 // FIXME: Implement! 3185 return ""; 3186 } 3187 }; 3188 3189 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3190 public: 3191 Mips32TargetInfoBase(const std::string& triple) : 3192 MipsTargetInfoBase(triple, "o32") {} 3193 virtual bool setABI(const std::string &Name) { 3194 if ((Name == "o32") || (Name == "eabi")) { 3195 ABI = Name; 3196 return true; 3197 } else 3198 return false; 3199 } 3200 virtual void getArchDefines(const LangOptions &Opts, 3201 MacroBuilder &Builder) const { 3202 if (ABI == "o32") { 3203 Builder.defineMacro("__mips_o32"); 3204 Builder.defineMacro("_ABIO32", "1"); 3205 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3206 } 3207 else if (ABI == "eabi") 3208 Builder.defineMacro("__mips_eabi"); 3209 else 3210 llvm_unreachable("Invalid ABI for Mips32."); 3211 } 3212 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3213 unsigned &NumAliases) const { 3214 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3215 { { "at" }, "$1" }, 3216 { { "v0" }, "$2" }, 3217 { { "v1" }, "$3" }, 3218 { { "a0" }, "$4" }, 3219 { { "a1" }, "$5" }, 3220 { { "a2" }, "$6" }, 3221 { { "a3" }, "$7" }, 3222 { { "t0" }, "$8" }, 3223 { { "t1" }, "$9" }, 3224 { { "t2" }, "$10" }, 3225 { { "t3" }, "$11" }, 3226 { { "t4" }, "$12" }, 3227 { { "t5" }, "$13" }, 3228 { { "t6" }, "$14" }, 3229 { { "t7" }, "$15" }, 3230 { { "s0" }, "$16" }, 3231 { { "s1" }, "$17" }, 3232 { { "s2" }, "$18" }, 3233 { { "s3" }, "$19" }, 3234 { { "s4" }, "$20" }, 3235 { { "s5" }, "$21" }, 3236 { { "s6" }, "$22" }, 3237 { { "s7" }, "$23" }, 3238 { { "t8" }, "$24" }, 3239 { { "t9" }, "$25" }, 3240 { { "k0" }, "$26" }, 3241 { { "k1" }, "$27" }, 3242 { { "gp" }, "$28" }, 3243 { { "sp" }, "$29" }, 3244 { { "fp" }, "$30" }, 3245 { { "ra" }, "$31" } 3246 }; 3247 Aliases = GCCRegAliases; 3248 NumAliases = llvm::array_lengthof(GCCRegAliases); 3249 } 3250 }; 3251 3252 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3253 public: 3254 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3255 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3256 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3257 } 3258 virtual void getTargetDefines(const LangOptions &Opts, 3259 MacroBuilder &Builder) const { 3260 DefineStd(Builder, "mips", Opts); 3261 Builder.defineMacro("_mips"); 3262 DefineStd(Builder, "MIPSEB", Opts); 3263 Builder.defineMacro("_MIPSEB"); 3264 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3265 getArchDefines(Opts, Builder); 3266 } 3267 }; 3268 3269 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3270 public: 3271 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3272 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3273 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3274 } 3275 virtual void getTargetDefines(const LangOptions &Opts, 3276 MacroBuilder &Builder) const { 3277 DefineStd(Builder, "mips", Opts); 3278 Builder.defineMacro("_mips"); 3279 DefineStd(Builder, "MIPSEL", Opts); 3280 Builder.defineMacro("_MIPSEL"); 3281 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3282 getArchDefines(Opts, Builder); 3283 } 3284 }; 3285 3286 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3287 virtual void SetDescriptionString(const std::string &Name) = 0; 3288 public: 3289 Mips64TargetInfoBase(const std::string& triple) : 3290 MipsTargetInfoBase(triple, "n64") {} 3291 virtual bool setABI(const std::string &Name) { 3292 SetDescriptionString(Name); 3293 if ((Name == "n32") || (Name == "n64")) { 3294 ABI = Name; 3295 return true; 3296 } else 3297 return false; 3298 } 3299 virtual void getArchDefines(const LangOptions &Opts, 3300 MacroBuilder &Builder) const { 3301 if (ABI == "n32") { 3302 Builder.defineMacro("__mips_n32"); 3303 Builder.defineMacro("_ABIN32", "2"); 3304 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3305 } 3306 else if (ABI == "n64") { 3307 Builder.defineMacro("__mips_n64"); 3308 Builder.defineMacro("_ABI64", "3"); 3309 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3310 } 3311 else 3312 llvm_unreachable("Invalid ABI for Mips64."); 3313 } 3314 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3315 unsigned &NumAliases) const { 3316 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3317 { { "at" }, "$1" }, 3318 { { "v0" }, "$2" }, 3319 { { "v1" }, "$3" }, 3320 { { "a0" }, "$4" }, 3321 { { "a1" }, "$5" }, 3322 { { "a2" }, "$6" }, 3323 { { "a3" }, "$7" }, 3324 { { "a4" }, "$8" }, 3325 { { "a5" }, "$9" }, 3326 { { "a6" }, "$10" }, 3327 { { "a7" }, "$11" }, 3328 { { "t0" }, "$12" }, 3329 { { "t1" }, "$13" }, 3330 { { "t2" }, "$14" }, 3331 { { "t3" }, "$15" }, 3332 { { "s0" }, "$16" }, 3333 { { "s1" }, "$17" }, 3334 { { "s2" }, "$18" }, 3335 { { "s3" }, "$19" }, 3336 { { "s4" }, "$20" }, 3337 { { "s5" }, "$21" }, 3338 { { "s6" }, "$22" }, 3339 { { "s7" }, "$23" }, 3340 { { "t8" }, "$24" }, 3341 { { "t9" }, "$25" }, 3342 { { "k0" }, "$26" }, 3343 { { "k1" }, "$27" }, 3344 { { "gp" }, "$28" }, 3345 { { "sp" }, "$29" }, 3346 { { "fp" }, "$30" }, 3347 { { "ra" }, "$31" } 3348 }; 3349 Aliases = GCCRegAliases; 3350 NumAliases = llvm::array_lengthof(GCCRegAliases); 3351 } 3352 }; 3353 3354 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3355 virtual void SetDescriptionString(const std::string &Name) { 3356 // Change DescriptionString only if ABI is n32. 3357 if (Name == "n32") 3358 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3359 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3360 } 3361 public: 3362 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3363 // Default ABI is n64. 3364 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3365 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3366 } 3367 virtual void getTargetDefines(const LangOptions &Opts, 3368 MacroBuilder &Builder) const { 3369 DefineStd(Builder, "mips", Opts); 3370 Builder.defineMacro("_mips"); 3371 DefineStd(Builder, "MIPSEB", Opts); 3372 Builder.defineMacro("_MIPSEB"); 3373 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3374 getArchDefines(Opts, Builder); 3375 } 3376 }; 3377 3378 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3379 virtual void SetDescriptionString(const std::string &Name) { 3380 // Change DescriptionString only if ABI is n32. 3381 if (Name == "n32") 3382 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3383 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3384 } 3385 public: 3386 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3387 // Default ABI is n64. 3388 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3389 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3390 } 3391 virtual void getTargetDefines(const LangOptions &Opts, 3392 MacroBuilder &Builder) const { 3393 DefineStd(Builder, "mips", Opts); 3394 Builder.defineMacro("_mips"); 3395 DefineStd(Builder, "MIPSEL", Opts); 3396 Builder.defineMacro("_MIPSEL"); 3397 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3398 getArchDefines(Opts, Builder); 3399 } 3400 }; 3401 } // end anonymous namespace. 3402 3403 namespace { 3404 class PNaClTargetInfo : public TargetInfo { 3405 public: 3406 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3407 this->UserLabelPrefix = ""; 3408 this->LongAlign = 32; 3409 this->LongWidth = 32; 3410 this->PointerAlign = 32; 3411 this->PointerWidth = 32; 3412 this->IntMaxType = TargetInfo::SignedLongLong; 3413 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3414 this->Int64Type = TargetInfo::SignedLongLong; 3415 this->DoubleAlign = 64; 3416 this->LongDoubleWidth = 64; 3417 this->LongDoubleAlign = 64; 3418 this->SizeType = TargetInfo::UnsignedInt; 3419 this->PtrDiffType = TargetInfo::SignedInt; 3420 this->IntPtrType = TargetInfo::SignedInt; 3421 this->RegParmMax = 2; 3422 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3423 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3424 } 3425 3426 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3427 } 3428 virtual void getArchDefines(const LangOptions &Opts, 3429 MacroBuilder &Builder) const { 3430 Builder.defineMacro("__le32__"); 3431 Builder.defineMacro("__pnacl__"); 3432 } 3433 virtual void getTargetDefines(const LangOptions &Opts, 3434 MacroBuilder &Builder) const { 3435 DefineStd(Builder, "unix", Opts); 3436 Builder.defineMacro("__ELF__"); 3437 if (Opts.POSIXThreads) 3438 Builder.defineMacro("_REENTRANT"); 3439 if (Opts.CPlusPlus) 3440 Builder.defineMacro("_GNU_SOURCE"); 3441 3442 Builder.defineMacro("__native_client__"); 3443 getArchDefines(Opts, Builder); 3444 } 3445 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3446 unsigned &NumRecords) const { 3447 } 3448 virtual const char *getVAListDeclaration() const { 3449 return "typedef int __builtin_va_list[4];"; 3450 } 3451 virtual void getGCCRegNames(const char * const *&Names, 3452 unsigned &NumNames) const; 3453 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3454 unsigned &NumAliases) const; 3455 virtual bool validateAsmConstraint(const char *&Name, 3456 TargetInfo::ConstraintInfo &Info) const { 3457 return false; 3458 } 3459 3460 virtual const char *getClobbers() const { 3461 return ""; 3462 } 3463 }; 3464 3465 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3466 unsigned &NumNames) const { 3467 Names = NULL; 3468 NumNames = 0; 3469 } 3470 3471 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3472 unsigned &NumAliases) const { 3473 Aliases = NULL; 3474 NumAliases = 0; 3475 } 3476 } // end anonymous namespace. 3477 3478 3479 //===----------------------------------------------------------------------===// 3480 // Driver code 3481 //===----------------------------------------------------------------------===// 3482 3483 static TargetInfo *AllocateTarget(const std::string &T) { 3484 llvm::Triple Triple(T); 3485 llvm::Triple::OSType os = Triple.getOS(); 3486 3487 switch (Triple.getArch()) { 3488 default: 3489 return NULL; 3490 3491 case llvm::Triple::arm: 3492 case llvm::Triple::thumb: 3493 if (Triple.isOSDarwin()) 3494 return new DarwinARMTargetInfo(T); 3495 3496 switch (os) { 3497 case llvm::Triple::Linux: 3498 return new LinuxTargetInfo<ARMTargetInfo>(T); 3499 case llvm::Triple::FreeBSD: 3500 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3501 case llvm::Triple::NetBSD: 3502 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3503 case llvm::Triple::RTEMS: 3504 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3505 default: 3506 return new ARMTargetInfo(T); 3507 } 3508 3509 case llvm::Triple::bfin: 3510 if ( os == llvm::Triple::RTEMS ) 3511 return new RTEMSTargetInfo<BlackfinTargetInfo>(T); 3512 return new BlackfinTargetInfo(T); 3513 3514 case llvm::Triple::msp430: 3515 return new MSP430TargetInfo(T); 3516 3517 case llvm::Triple::mips: 3518 switch (os) { 3519 case llvm::Triple::Linux: 3520 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3521 case llvm::Triple::RTEMS: 3522 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3523 case llvm::Triple::FreeBSD: 3524 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3525 case llvm::Triple::NetBSD: 3526 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3527 default: 3528 return new Mips32EBTargetInfo(T); 3529 } 3530 3531 case llvm::Triple::mipsel: 3532 switch (os) { 3533 case llvm::Triple::Linux: 3534 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3535 case llvm::Triple::RTEMS: 3536 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3537 case llvm::Triple::FreeBSD: 3538 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3539 case llvm::Triple::NetBSD: 3540 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3541 default: 3542 return new Mips32ELTargetInfo(T); 3543 } 3544 3545 case llvm::Triple::mips64: 3546 switch (os) { 3547 case llvm::Triple::Linux: 3548 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3549 case llvm::Triple::RTEMS: 3550 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3551 case llvm::Triple::FreeBSD: 3552 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3553 case llvm::Triple::NetBSD: 3554 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3555 default: 3556 return new Mips64EBTargetInfo(T); 3557 } 3558 3559 case llvm::Triple::mips64el: 3560 switch (os) { 3561 case llvm::Triple::Linux: 3562 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3563 case llvm::Triple::RTEMS: 3564 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3565 case llvm::Triple::FreeBSD: 3566 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3567 case llvm::Triple::NetBSD: 3568 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3569 default: 3570 return new Mips64ELTargetInfo(T); 3571 } 3572 3573 case llvm::Triple::le32: 3574 switch (os) { 3575 case llvm::Triple::NativeClient: 3576 return new PNaClTargetInfo(T); 3577 default: 3578 return NULL; 3579 } 3580 3581 case llvm::Triple::ppc: 3582 if (Triple.isOSDarwin()) 3583 return new DarwinPPC32TargetInfo(T); 3584 switch (os) { 3585 case llvm::Triple::Linux: 3586 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3587 case llvm::Triple::FreeBSD: 3588 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3589 case llvm::Triple::NetBSD: 3590 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3591 case llvm::Triple::RTEMS: 3592 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3593 default: 3594 return new PPC32TargetInfo(T); 3595 } 3596 3597 case llvm::Triple::ppc64: 3598 if (Triple.isOSDarwin()) 3599 return new DarwinPPC64TargetInfo(T); 3600 switch (os) { 3601 case llvm::Triple::Linux: 3602 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3603 case llvm::Triple::Lv2: 3604 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3605 case llvm::Triple::FreeBSD: 3606 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3607 case llvm::Triple::NetBSD: 3608 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3609 default: 3610 return new PPC64TargetInfo(T); 3611 } 3612 3613 case llvm::Triple::ptx32: 3614 return new PTX32TargetInfo(T); 3615 case llvm::Triple::ptx64: 3616 return new PTX64TargetInfo(T); 3617 3618 case llvm::Triple::mblaze: 3619 return new MBlazeTargetInfo(T); 3620 3621 case llvm::Triple::sparc: 3622 switch (os) { 3623 case llvm::Triple::Linux: 3624 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3625 case llvm::Triple::AuroraUX: 3626 return new AuroraUXSparcV8TargetInfo(T); 3627 case llvm::Triple::Solaris: 3628 return new SolarisSparcV8TargetInfo(T); 3629 case llvm::Triple::NetBSD: 3630 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3631 case llvm::Triple::RTEMS: 3632 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3633 default: 3634 return new SparcV8TargetInfo(T); 3635 } 3636 3637 // FIXME: Need a real SPU target. 3638 case llvm::Triple::cellspu: 3639 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3640 3641 case llvm::Triple::systemz: 3642 return new SystemZTargetInfo(T); 3643 3644 case llvm::Triple::tce: 3645 return new TCETargetInfo(T); 3646 3647 case llvm::Triple::x86: 3648 if (Triple.isOSDarwin()) 3649 return new DarwinI386TargetInfo(T); 3650 3651 switch (os) { 3652 case llvm::Triple::AuroraUX: 3653 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3654 case llvm::Triple::Linux: 3655 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3656 case llvm::Triple::DragonFly: 3657 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3658 case llvm::Triple::NetBSD: 3659 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3660 case llvm::Triple::OpenBSD: 3661 return new OpenBSDI386TargetInfo(T); 3662 case llvm::Triple::FreeBSD: 3663 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3664 case llvm::Triple::Minix: 3665 return new MinixTargetInfo<X86_32TargetInfo>(T); 3666 case llvm::Triple::Solaris: 3667 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3668 case llvm::Triple::Cygwin: 3669 return new CygwinX86_32TargetInfo(T); 3670 case llvm::Triple::MinGW32: 3671 return new MinGWX86_32TargetInfo(T); 3672 case llvm::Triple::Win32: 3673 return new VisualStudioWindowsX86_32TargetInfo(T); 3674 case llvm::Triple::Haiku: 3675 return new HaikuX86_32TargetInfo(T); 3676 case llvm::Triple::RTEMS: 3677 return new RTEMSX86_32TargetInfo(T); 3678 default: 3679 return new X86_32TargetInfo(T); 3680 } 3681 3682 case llvm::Triple::x86_64: 3683 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3684 return new DarwinX86_64TargetInfo(T); 3685 3686 switch (os) { 3687 case llvm::Triple::AuroraUX: 3688 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3689 case llvm::Triple::Linux: 3690 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3691 case llvm::Triple::DragonFly: 3692 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3693 case llvm::Triple::NetBSD: 3694 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3695 case llvm::Triple::OpenBSD: 3696 return new OpenBSDX86_64TargetInfo(T); 3697 case llvm::Triple::FreeBSD: 3698 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3699 case llvm::Triple::Solaris: 3700 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3701 case llvm::Triple::MinGW32: 3702 return new MinGWX86_64TargetInfo(T); 3703 case llvm::Triple::Win32: // This is what Triple.h supports now. 3704 return new VisualStudioWindowsX86_64TargetInfo(T); 3705 default: 3706 return new X86_64TargetInfo(T); 3707 } 3708 } 3709 } 3710 3711 /// CreateTargetInfo - Return the target info object for the specified target 3712 /// triple. 3713 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3714 TargetOptions &Opts) { 3715 llvm::Triple Triple(Opts.Triple); 3716 3717 // Construct the target 3718 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3719 if (!Target) { 3720 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3721 return 0; 3722 } 3723 3724 // Set the target CPU if specified. 3725 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3726 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3727 return 0; 3728 } 3729 3730 // Set the target ABI if specified. 3731 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3732 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3733 return 0; 3734 } 3735 3736 // Set the target C++ ABI. 3737 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3738 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3739 return 0; 3740 } 3741 3742 // Compute the default target features, we need the target to handle this 3743 // because features may have dependencies on one another. 3744 llvm::StringMap<bool> Features; 3745 Target->getDefaultFeatures(Features); 3746 3747 // Apply the user specified deltas. 3748 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3749 ie = Opts.Features.end(); it != ie; ++it) { 3750 const char *Name = it->c_str(); 3751 3752 // Apply the feature via the target. 3753 if ((Name[0] != '-' && Name[0] != '+') || 3754 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3755 Diags.Report(diag::err_target_invalid_feature) << Name; 3756 return 0; 3757 } 3758 } 3759 3760 // Add the features to the compile options. 3761 // 3762 // FIXME: If we are completely confident that we have the right set, we only 3763 // need to pass the minuses. 3764 Opts.Features.clear(); 3765 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3766 ie = Features.end(); it != ie; ++it) 3767 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3768 it->first().str()); 3769 Target->HandleTargetFeatures(Opts.Features); 3770 3771 return Target.take(); 3772 } 3773