1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 unsigned Release = Triple.getOSMajorVersion(); 251 if (Release == 0U) 252 Release = 8; 253 254 Builder.defineMacro("__FreeBSD__", Twine(Release)); 255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 257 DefineStd(Builder, "unix", Opts); 258 Builder.defineMacro("__ELF__"); 259 } 260 public: 261 FreeBSDTargetInfo(const std::string &triple) 262 : OSTargetInfo<Target>(triple) { 263 this->UserLabelPrefix = ""; 264 265 llvm::Triple Triple(triple); 266 switch (Triple.getArch()) { 267 default: 268 case llvm::Triple::x86: 269 case llvm::Triple::x86_64: 270 this->MCountName = ".mcount"; 271 break; 272 case llvm::Triple::mips: 273 case llvm::Triple::mipsel: 274 case llvm::Triple::ppc: 275 case llvm::Triple::ppc64: 276 this->MCountName = "_mcount"; 277 break; 278 case llvm::Triple::arm: 279 this->MCountName = "__mcount"; 280 break; 281 } 282 283 } 284 }; 285 286 // Minix Target 287 template<typename Target> 288 class MinixTargetInfo : public OSTargetInfo<Target> { 289 protected: 290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 291 MacroBuilder &Builder) const { 292 // Minix defines 293 294 Builder.defineMacro("__minix", "3"); 295 Builder.defineMacro("_EM_WSIZE", "4"); 296 Builder.defineMacro("_EM_PSIZE", "4"); 297 Builder.defineMacro("_EM_SSIZE", "2"); 298 Builder.defineMacro("_EM_LSIZE", "4"); 299 Builder.defineMacro("_EM_FSIZE", "4"); 300 Builder.defineMacro("_EM_DSIZE", "8"); 301 DefineStd(Builder, "unix", Opts); 302 } 303 public: 304 MinixTargetInfo(const std::string &triple) 305 : OSTargetInfo<Target>(triple) { 306 this->UserLabelPrefix = ""; 307 } 308 }; 309 310 // Linux target 311 template<typename Target> 312 class LinuxTargetInfo : public OSTargetInfo<Target> { 313 protected: 314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 315 MacroBuilder &Builder) const { 316 // Linux defines; list based off of gcc output 317 DefineStd(Builder, "unix", Opts); 318 DefineStd(Builder, "linux", Opts); 319 Builder.defineMacro("__gnu_linux__"); 320 Builder.defineMacro("__ELF__"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326 public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336 }; 337 338 // NetBSD Target 339 template<typename Target> 340 class NetBSDTargetInfo : public OSTargetInfo<Target> { 341 protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351 public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356 }; 357 358 // OpenBSD Target 359 template<typename Target> 360 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361 protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_POSIX_THREADS"); 371 } 372 public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) {} 375 }; 376 377 // PSP Target 378 template<typename Target> 379 class PSPTargetInfo : public OSTargetInfo<Target> { 380 protected: 381 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 382 MacroBuilder &Builder) const { 383 // PSP defines; list based on the output of the pspdev gcc toolchain. 384 Builder.defineMacro("PSP"); 385 Builder.defineMacro("_PSP"); 386 Builder.defineMacro("__psp__"); 387 Builder.defineMacro("__ELF__"); 388 } 389 public: 390 PSPTargetInfo(const std::string& triple) 391 : OSTargetInfo<Target>(triple) { 392 this->UserLabelPrefix = ""; 393 } 394 }; 395 396 // PS3 PPU Target 397 template<typename Target> 398 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 399 protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PS3 PPU defines. 403 Builder.defineMacro("__PPC__"); 404 Builder.defineMacro("__PPU__"); 405 Builder.defineMacro("__CELLOS_LV2__"); 406 Builder.defineMacro("__ELF__"); 407 Builder.defineMacro("__LP32__"); 408 Builder.defineMacro("_ARCH_PPC64"); 409 Builder.defineMacro("__powerpc64__"); 410 } 411 public: 412 PS3PPUTargetInfo(const std::string& triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 416 this->IntMaxType = TargetInfo::SignedLongLong; 417 this->UIntMaxType = TargetInfo::UnsignedLongLong; 418 this->Int64Type = TargetInfo::SignedLongLong; 419 this->SizeType = TargetInfo::UnsignedInt; 420 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 421 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 422 } 423 }; 424 425 // FIXME: Need a real SPU target. 426 // PS3 SPU Target 427 template<typename Target> 428 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 429 protected: 430 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 431 MacroBuilder &Builder) const { 432 // PS3 PPU defines. 433 Builder.defineMacro("__SPU__"); 434 Builder.defineMacro("__ELF__"); 435 } 436 public: 437 PS3SPUTargetInfo(const std::string& triple) 438 : OSTargetInfo<Target>(triple) { 439 this->UserLabelPrefix = ""; 440 } 441 }; 442 443 // AuroraUX target 444 template<typename Target> 445 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 446 protected: 447 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 448 MacroBuilder &Builder) const { 449 DefineStd(Builder, "sun", Opts); 450 DefineStd(Builder, "unix", Opts); 451 Builder.defineMacro("__ELF__"); 452 Builder.defineMacro("__svr4__"); 453 Builder.defineMacro("__SVR4"); 454 } 455 public: 456 AuroraUXTargetInfo(const std::string& triple) 457 : OSTargetInfo<Target>(triple) { 458 this->UserLabelPrefix = ""; 459 this->WCharType = this->SignedLong; 460 // FIXME: WIntType should be SignedLong 461 } 462 }; 463 464 // Solaris target 465 template<typename Target> 466 class SolarisTargetInfo : public OSTargetInfo<Target> { 467 protected: 468 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 469 MacroBuilder &Builder) const { 470 DefineStd(Builder, "sun", Opts); 471 DefineStd(Builder, "unix", Opts); 472 Builder.defineMacro("__ELF__"); 473 Builder.defineMacro("__svr4__"); 474 Builder.defineMacro("__SVR4"); 475 } 476 public: 477 SolarisTargetInfo(const std::string& triple) 478 : OSTargetInfo<Target>(triple) { 479 this->UserLabelPrefix = ""; 480 this->WCharType = this->SignedLong; 481 // FIXME: WIntType should be SignedLong 482 } 483 }; 484 485 // Windows target 486 template<typename Target> 487 class WindowsTargetInfo : public OSTargetInfo<Target> { 488 protected: 489 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 490 MacroBuilder &Builder) const { 491 Builder.defineMacro("_WIN32"); 492 } 493 void getVisualStudioDefines(const LangOptions &Opts, 494 MacroBuilder &Builder) const { 495 if (Opts.CPlusPlus) { 496 if (Opts.RTTI) 497 Builder.defineMacro("_CPPRTTI"); 498 499 if (Opts.Exceptions) 500 Builder.defineMacro("_CPPUNWIND"); 501 } 502 503 if (!Opts.CharIsSigned) 504 Builder.defineMacro("_CHAR_UNSIGNED"); 505 506 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 507 // but it works for now. 508 if (Opts.POSIXThreads) 509 Builder.defineMacro("_MT"); 510 511 if (Opts.MSCVersion != 0) 512 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 513 514 if (Opts.MicrosoftExt) { 515 Builder.defineMacro("_MSC_EXTENSIONS"); 516 517 if (Opts.CPlusPlus0x) { 518 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 519 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 520 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 521 } 522 } 523 524 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 525 } 526 527 public: 528 WindowsTargetInfo(const std::string &triple) 529 : OSTargetInfo<Target>(triple) {} 530 }; 531 532 } // end anonymous namespace. 533 534 //===----------------------------------------------------------------------===// 535 // Specific target implementations. 536 //===----------------------------------------------------------------------===// 537 538 namespace { 539 // PPC abstract base class 540 class PPCTargetInfo : public TargetInfo { 541 static const Builtin::Info BuiltinInfo[]; 542 static const char * const GCCRegNames[]; 543 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 544 public: 545 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 546 547 virtual void getTargetBuiltins(const Builtin::Info *&Records, 548 unsigned &NumRecords) const { 549 Records = BuiltinInfo; 550 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 551 } 552 553 virtual void getTargetDefines(const LangOptions &Opts, 554 MacroBuilder &Builder) const; 555 556 virtual void getGCCRegNames(const char * const *&Names, 557 unsigned &NumNames) const; 558 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 559 unsigned &NumAliases) const; 560 virtual bool validateAsmConstraint(const char *&Name, 561 TargetInfo::ConstraintInfo &Info) const { 562 switch (*Name) { 563 default: return false; 564 case 'O': // Zero 565 break; 566 case 'b': // Base register 567 case 'f': // Floating point register 568 Info.setAllowsRegister(); 569 break; 570 // FIXME: The following are added to allow parsing. 571 // I just took a guess at what the actions should be. 572 // Also, is more specific checking needed? I.e. specific registers? 573 case 'd': // Floating point register (containing 64-bit value) 574 case 'v': // Altivec vector register 575 Info.setAllowsRegister(); 576 break; 577 case 'w': 578 switch (Name[1]) { 579 case 'd':// VSX vector register to hold vector double data 580 case 'f':// VSX vector register to hold vector float data 581 case 's':// VSX vector register to hold scalar float data 582 case 'a':// Any VSX register 583 break; 584 default: 585 return false; 586 } 587 Info.setAllowsRegister(); 588 Name++; // Skip over 'w'. 589 break; 590 case 'h': // `MQ', `CTR', or `LINK' register 591 case 'q': // `MQ' register 592 case 'c': // `CTR' register 593 case 'l': // `LINK' register 594 case 'x': // `CR' register (condition register) number 0 595 case 'y': // `CR' register (condition register) 596 case 'z': // `XER[CA]' carry bit (part of the XER register) 597 Info.setAllowsRegister(); 598 break; 599 case 'I': // Signed 16-bit constant 600 case 'J': // Unsigned 16-bit constant shifted left 16 bits 601 // (use `L' instead for SImode constants) 602 case 'K': // Unsigned 16-bit constant 603 case 'L': // Signed 16-bit constant shifted left 16 bits 604 case 'M': // Constant larger than 31 605 case 'N': // Exact power of 2 606 case 'P': // Constant whose negation is a signed 16-bit constant 607 case 'G': // Floating point constant that can be loaded into a 608 // register with one instruction per word 609 case 'H': // Integer/Floating point constant that can be loaded 610 // into a register using three instructions 611 break; 612 case 'm': // Memory operand. Note that on PowerPC targets, m can 613 // include addresses that update the base register. It 614 // is therefore only safe to use `m' in an asm statement 615 // if that asm statement accesses the operand exactly once. 616 // The asm statement must also use `%U<opno>' as a 617 // placeholder for the "update" flag in the corresponding 618 // load or store instruction. For example: 619 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 620 // is correct but: 621 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 622 // is not. Use es rather than m if you don't want the base 623 // register to be updated. 624 case 'e': 625 if (Name[1] != 's') 626 return false; 627 // es: A "stable" memory operand; that is, one which does not 628 // include any automodification of the base register. Unlike 629 // `m', this constraint can be used in asm statements that 630 // might access the operand several times, or that might not 631 // access it at all. 632 Info.setAllowsMemory(); 633 Name++; // Skip over 'e'. 634 break; 635 case 'Q': // Memory operand that is an offset from a register (it is 636 // usually better to use `m' or `es' in asm statements) 637 case 'Z': // Memory operand that is an indexed or indirect from a 638 // register (it is usually better to use `m' or `es' in 639 // asm statements) 640 Info.setAllowsMemory(); 641 Info.setAllowsRegister(); 642 break; 643 case 'R': // AIX TOC entry 644 case 'a': // Address operand that is an indexed or indirect from a 645 // register (`p' is preferable for asm statements) 646 case 'S': // Constant suitable as a 64-bit mask operand 647 case 'T': // Constant suitable as a 32-bit mask operand 648 case 'U': // System V Release 4 small data area reference 649 case 't': // AND masks that can be performed by two rldic{l, r} 650 // instructions 651 case 'W': // Vector constant that does not require memory 652 case 'j': // Vector constant that is all zeros. 653 break; 654 // End FIXME. 655 } 656 return true; 657 } 658 virtual const char *getClobbers() const { 659 return ""; 660 } 661 }; 662 663 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 664 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 665 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 666 ALL_LANGUAGES }, 667 #include "clang/Basic/BuiltinsPPC.def" 668 }; 669 670 671 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 672 /// #defines that are not tied to a specific subtarget. 673 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 674 MacroBuilder &Builder) const { 675 // Target identification. 676 Builder.defineMacro("__ppc__"); 677 Builder.defineMacro("_ARCH_PPC"); 678 Builder.defineMacro("__powerpc__"); 679 Builder.defineMacro("__POWERPC__"); 680 if (PointerWidth == 64) { 681 Builder.defineMacro("_ARCH_PPC64"); 682 Builder.defineMacro("_LP64"); 683 Builder.defineMacro("__LP64__"); 684 Builder.defineMacro("__powerpc64__"); 685 Builder.defineMacro("__ppc64__"); 686 } else { 687 Builder.defineMacro("__ppc__"); 688 } 689 690 // Target properties. 691 if (getTriple().getOS() != llvm::Triple::NetBSD) 692 Builder.defineMacro("_BIG_ENDIAN"); 693 Builder.defineMacro("__BIG_ENDIAN__"); 694 695 // Subtarget options. 696 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 697 Builder.defineMacro("__REGISTER_PREFIX__", ""); 698 699 // FIXME: Should be controlled by command line option. 700 Builder.defineMacro("__LONG_DOUBLE_128__"); 701 702 if (Opts.AltiVec) { 703 Builder.defineMacro("__VEC__", "10206"); 704 Builder.defineMacro("__ALTIVEC__"); 705 } 706 } 707 708 709 const char * const PPCTargetInfo::GCCRegNames[] = { 710 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 711 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 712 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 713 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 714 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 715 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 716 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 717 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 718 "mq", "lr", "ctr", "ap", 719 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 720 "xer", 721 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 722 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 723 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 724 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 725 "vrsave", "vscr", 726 "spe_acc", "spefscr", 727 "sfp" 728 }; 729 730 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 731 unsigned &NumNames) const { 732 Names = GCCRegNames; 733 NumNames = llvm::array_lengthof(GCCRegNames); 734 } 735 736 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 737 // While some of these aliases do map to different registers 738 // they still share the same register name. 739 { { "0" }, "r0" }, 740 { { "1"}, "r1" }, 741 { { "2" }, "r2" }, 742 { { "3" }, "r3" }, 743 { { "4" }, "r4" }, 744 { { "5" }, "r5" }, 745 { { "6" }, "r6" }, 746 { { "7" }, "r7" }, 747 { { "8" }, "r8" }, 748 { { "9" }, "r9" }, 749 { { "10" }, "r10" }, 750 { { "11" }, "r11" }, 751 { { "12" }, "r12" }, 752 { { "13" }, "r13" }, 753 { { "14" }, "r14" }, 754 { { "15" }, "r15" }, 755 { { "16" }, "r16" }, 756 { { "17" }, "r17" }, 757 { { "18" }, "r18" }, 758 { { "19" }, "r19" }, 759 { { "20" }, "r20" }, 760 { { "21" }, "r21" }, 761 { { "22" }, "r22" }, 762 { { "23" }, "r23" }, 763 { { "24" }, "r24" }, 764 { { "25" }, "r25" }, 765 { { "26" }, "r26" }, 766 { { "27" }, "r27" }, 767 { { "28" }, "r28" }, 768 { { "29" }, "r29" }, 769 { { "30" }, "r30" }, 770 { { "31" }, "r31" }, 771 { { "fr0" }, "f0" }, 772 { { "fr1" }, "f1" }, 773 { { "fr2" }, "f2" }, 774 { { "fr3" }, "f3" }, 775 { { "fr4" }, "f4" }, 776 { { "fr5" }, "f5" }, 777 { { "fr6" }, "f6" }, 778 { { "fr7" }, "f7" }, 779 { { "fr8" }, "f8" }, 780 { { "fr9" }, "f9" }, 781 { { "fr10" }, "f10" }, 782 { { "fr11" }, "f11" }, 783 { { "fr12" }, "f12" }, 784 { { "fr13" }, "f13" }, 785 { { "fr14" }, "f14" }, 786 { { "fr15" }, "f15" }, 787 { { "fr16" }, "f16" }, 788 { { "fr17" }, "f17" }, 789 { { "fr18" }, "f18" }, 790 { { "fr19" }, "f19" }, 791 { { "fr20" }, "f20" }, 792 { { "fr21" }, "f21" }, 793 { { "fr22" }, "f22" }, 794 { { "fr23" }, "f23" }, 795 { { "fr24" }, "f24" }, 796 { { "fr25" }, "f25" }, 797 { { "fr26" }, "f26" }, 798 { { "fr27" }, "f27" }, 799 { { "fr28" }, "f28" }, 800 { { "fr29" }, "f29" }, 801 { { "fr30" }, "f30" }, 802 { { "fr31" }, "f31" }, 803 { { "cc" }, "cr0" }, 804 }; 805 806 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 807 unsigned &NumAliases) const { 808 Aliases = GCCRegAliases; 809 NumAliases = llvm::array_lengthof(GCCRegAliases); 810 } 811 } // end anonymous namespace. 812 813 namespace { 814 class PPC32TargetInfo : public PPCTargetInfo { 815 public: 816 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 817 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 818 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 819 820 switch (getTriple().getOS()) { 821 case llvm::Triple::FreeBSD: 822 case llvm::Triple::NetBSD: 823 SizeType = UnsignedInt; 824 break; 825 default: 826 break; 827 } 828 } 829 830 virtual const char *getVAListDeclaration() const { 831 // This is the ELF definition, and is overridden by the Darwin sub-target 832 return "typedef struct __va_list_tag {" 833 " unsigned char gpr;" 834 " unsigned char fpr;" 835 " unsigned short reserved;" 836 " void* overflow_arg_area;" 837 " void* reg_save_area;" 838 "} __builtin_va_list[1];"; 839 } 840 }; 841 } // end anonymous namespace. 842 843 namespace { 844 class PPC64TargetInfo : public PPCTargetInfo { 845 public: 846 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 847 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 848 IntMaxType = SignedLong; 849 UIntMaxType = UnsignedLong; 850 Int64Type = SignedLong; 851 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 852 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 853 } 854 virtual const char *getVAListDeclaration() const { 855 return "typedef char* __builtin_va_list;"; 856 } 857 }; 858 } // end anonymous namespace. 859 860 861 namespace { 862 class DarwinPPC32TargetInfo : 863 public DarwinTargetInfo<PPC32TargetInfo> { 864 public: 865 DarwinPPC32TargetInfo(const std::string& triple) 866 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 867 HasAlignMac68kSupport = true; 868 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 869 } 870 virtual const char *getVAListDeclaration() const { 871 return "typedef char* __builtin_va_list;"; 872 } 873 }; 874 875 class DarwinPPC64TargetInfo : 876 public DarwinTargetInfo<PPC64TargetInfo> { 877 public: 878 DarwinPPC64TargetInfo(const std::string& triple) 879 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 880 HasAlignMac68kSupport = true; 881 } 882 }; 883 } // end anonymous namespace. 884 885 namespace { 886 static const unsigned PTXAddrSpaceMap[] = { 887 0, // opencl_global 888 4, // opencl_local 889 1 // opencl_constant 890 }; 891 class PTXTargetInfo : public TargetInfo { 892 static const char * const GCCRegNames[]; 893 static const Builtin::Info BuiltinInfo[]; 894 std::vector<llvm::StringRef> AvailableFeatures; 895 public: 896 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 897 TLSSupported = false; 898 LongWidth = LongAlign = 64; 899 AddrSpaceMap = &PTXAddrSpaceMap; 900 // Define available target features 901 // These must be defined in sorted order! 902 AvailableFeatures.push_back("compute10"); 903 AvailableFeatures.push_back("compute11"); 904 AvailableFeatures.push_back("compute12"); 905 AvailableFeatures.push_back("compute13"); 906 AvailableFeatures.push_back("compute20"); 907 AvailableFeatures.push_back("double"); 908 AvailableFeatures.push_back("no-fma"); 909 AvailableFeatures.push_back("ptx20"); 910 AvailableFeatures.push_back("ptx21"); 911 AvailableFeatures.push_back("ptx22"); 912 AvailableFeatures.push_back("ptx23"); 913 AvailableFeatures.push_back("sm10"); 914 AvailableFeatures.push_back("sm11"); 915 AvailableFeatures.push_back("sm12"); 916 AvailableFeatures.push_back("sm13"); 917 AvailableFeatures.push_back("sm20"); 918 AvailableFeatures.push_back("sm21"); 919 AvailableFeatures.push_back("sm22"); 920 AvailableFeatures.push_back("sm23"); 921 } 922 virtual void getTargetDefines(const LangOptions &Opts, 923 MacroBuilder &Builder) const { 924 Builder.defineMacro("__PTX__"); 925 } 926 virtual void getTargetBuiltins(const Builtin::Info *&Records, 927 unsigned &NumRecords) const { 928 Records = BuiltinInfo; 929 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 930 } 931 932 virtual void getGCCRegNames(const char * const *&Names, 933 unsigned &NumNames) const; 934 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 935 unsigned &NumAliases) const { 936 // No aliases. 937 Aliases = 0; 938 NumAliases = 0; 939 } 940 virtual bool validateAsmConstraint(const char *&Name, 941 TargetInfo::ConstraintInfo &info) const { 942 // FIXME: implement 943 return true; 944 } 945 virtual const char *getClobbers() const { 946 // FIXME: Is this really right? 947 return ""; 948 } 949 virtual const char *getVAListDeclaration() const { 950 // FIXME: implement 951 return "typedef char* __builtin_va_list;"; 952 } 953 954 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 955 const std::string &Name, 956 bool Enabled) const; 957 }; 958 959 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 960 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 961 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 962 ALL_LANGUAGES }, 963 #include "clang/Basic/BuiltinsPTX.def" 964 }; 965 966 const char * const PTXTargetInfo::GCCRegNames[] = { 967 "r0" 968 }; 969 970 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 971 unsigned &NumNames) const { 972 Names = GCCRegNames; 973 NumNames = llvm::array_lengthof(GCCRegNames); 974 } 975 976 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 977 const std::string &Name, 978 bool Enabled) const { 979 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 980 Name)) { 981 Features[Name] = Enabled; 982 return true; 983 } else { 984 return false; 985 } 986 } 987 988 class PTX32TargetInfo : public PTXTargetInfo { 989 public: 990 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 991 PointerWidth = PointerAlign = 32; 992 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 993 DescriptionString 994 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 995 } 996 }; 997 998 class PTX64TargetInfo : public PTXTargetInfo { 999 public: 1000 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1001 PointerWidth = PointerAlign = 64; 1002 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1003 DescriptionString 1004 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1005 } 1006 }; 1007 } 1008 1009 namespace { 1010 // MBlaze abstract base class 1011 class MBlazeTargetInfo : public TargetInfo { 1012 static const char * const GCCRegNames[]; 1013 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1014 1015 public: 1016 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1017 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1018 } 1019 1020 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1021 unsigned &NumRecords) const { 1022 // FIXME: Implement. 1023 Records = 0; 1024 NumRecords = 0; 1025 } 1026 1027 virtual void getTargetDefines(const LangOptions &Opts, 1028 MacroBuilder &Builder) const; 1029 1030 virtual const char *getVAListDeclaration() const { 1031 return "typedef char* __builtin_va_list;"; 1032 } 1033 virtual const char *getTargetPrefix() const { 1034 return "mblaze"; 1035 } 1036 virtual void getGCCRegNames(const char * const *&Names, 1037 unsigned &NumNames) const; 1038 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1039 unsigned &NumAliases) const; 1040 virtual bool validateAsmConstraint(const char *&Name, 1041 TargetInfo::ConstraintInfo &Info) const { 1042 switch (*Name) { 1043 default: return false; 1044 case 'O': // Zero 1045 return true; 1046 case 'b': // Base register 1047 case 'f': // Floating point register 1048 Info.setAllowsRegister(); 1049 return true; 1050 } 1051 } 1052 virtual const char *getClobbers() const { 1053 return ""; 1054 } 1055 }; 1056 1057 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1058 /// #defines that are not tied to a specific subtarget. 1059 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1060 MacroBuilder &Builder) const { 1061 // Target identification. 1062 Builder.defineMacro("__microblaze__"); 1063 Builder.defineMacro("_ARCH_MICROBLAZE"); 1064 Builder.defineMacro("__MICROBLAZE__"); 1065 1066 // Target properties. 1067 Builder.defineMacro("_BIG_ENDIAN"); 1068 Builder.defineMacro("__BIG_ENDIAN__"); 1069 1070 // Subtarget options. 1071 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1072 } 1073 1074 1075 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1076 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1077 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1078 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1079 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1080 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1081 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1082 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1083 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1084 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1085 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1086 }; 1087 1088 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1089 unsigned &NumNames) const { 1090 Names = GCCRegNames; 1091 NumNames = llvm::array_lengthof(GCCRegNames); 1092 } 1093 1094 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1095 { {"f0"}, "r0" }, 1096 { {"f1"}, "r1" }, 1097 { {"f2"}, "r2" }, 1098 { {"f3"}, "r3" }, 1099 { {"f4"}, "r4" }, 1100 { {"f5"}, "r5" }, 1101 { {"f6"}, "r6" }, 1102 { {"f7"}, "r7" }, 1103 { {"f8"}, "r8" }, 1104 { {"f9"}, "r9" }, 1105 { {"f10"}, "r10" }, 1106 { {"f11"}, "r11" }, 1107 { {"f12"}, "r12" }, 1108 { {"f13"}, "r13" }, 1109 { {"f14"}, "r14" }, 1110 { {"f15"}, "r15" }, 1111 { {"f16"}, "r16" }, 1112 { {"f17"}, "r17" }, 1113 { {"f18"}, "r18" }, 1114 { {"f19"}, "r19" }, 1115 { {"f20"}, "r20" }, 1116 { {"f21"}, "r21" }, 1117 { {"f22"}, "r22" }, 1118 { {"f23"}, "r23" }, 1119 { {"f24"}, "r24" }, 1120 { {"f25"}, "r25" }, 1121 { {"f26"}, "r26" }, 1122 { {"f27"}, "r27" }, 1123 { {"f28"}, "r28" }, 1124 { {"f29"}, "r29" }, 1125 { {"f30"}, "r30" }, 1126 { {"f31"}, "r31" }, 1127 }; 1128 1129 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1130 unsigned &NumAliases) const { 1131 Aliases = GCCRegAliases; 1132 NumAliases = llvm::array_lengthof(GCCRegAliases); 1133 } 1134 } // end anonymous namespace. 1135 1136 namespace { 1137 // Namespace for x86 abstract base class 1138 const Builtin::Info BuiltinInfo[] = { 1139 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1140 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1141 ALL_LANGUAGES }, 1142 #include "clang/Basic/BuiltinsX86.def" 1143 }; 1144 1145 static const char* const GCCRegNames[] = { 1146 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1147 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1148 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1149 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1150 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1152 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1153 }; 1154 1155 const TargetInfo::AddlRegName AddlRegNames[] = { 1156 { { "al", "ah", "eax", "rax" }, 0 }, 1157 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1158 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1159 { { "dl", "dh", "edx", "rdx" }, 1 }, 1160 { { "esi", "rsi" }, 4 }, 1161 { { "edi", "rdi" }, 5 }, 1162 { { "esp", "rsp" }, 7 }, 1163 { { "ebp", "rbp" }, 6 }, 1164 }; 1165 1166 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1167 // most of the implementation can be shared. 1168 class X86TargetInfo : public TargetInfo { 1169 enum X86SSEEnum { 1170 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1171 } SSELevel; 1172 enum MMX3DNowEnum { 1173 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1174 } MMX3DNowLevel; 1175 1176 bool HasAES; 1177 bool HasAVX; 1178 1179 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1180 /// 1181 /// Each enumeration represents a particular CPU supported by Clang. These 1182 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1183 enum CPUKind { 1184 CK_Generic, 1185 1186 /// \name i386 1187 /// i386-generation processors. 1188 //@{ 1189 CK_i386, 1190 //@} 1191 1192 /// \name i486 1193 /// i486-generation processors. 1194 //@{ 1195 CK_i486, 1196 CK_WinChipC6, 1197 CK_WinChip2, 1198 CK_C3, 1199 //@} 1200 1201 /// \name i586 1202 /// i586-generation processors, P5 microarchitecture based. 1203 //@{ 1204 CK_i586, 1205 CK_Pentium, 1206 CK_PentiumMMX, 1207 //@} 1208 1209 /// \name i686 1210 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1211 //@{ 1212 CK_i686, 1213 CK_PentiumPro, 1214 CK_Pentium2, 1215 CK_Pentium3, 1216 CK_Pentium3M, 1217 CK_PentiumM, 1218 CK_C3_2, 1219 1220 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1221 /// Clang however has some logic to suport this. 1222 // FIXME: Warn, deprecate, and potentially remove this. 1223 CK_Yonah, 1224 //@} 1225 1226 /// \name Netburst 1227 /// Netburst microarchitecture based processors. 1228 //@{ 1229 CK_Pentium4, 1230 CK_Pentium4M, 1231 CK_Prescott, 1232 CK_Nocona, 1233 //@} 1234 1235 /// \name Core 1236 /// Core microarchitecture based processors. 1237 //@{ 1238 CK_Core2, 1239 1240 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1241 /// codename which GCC no longer accepts as an option to -march, but Clang 1242 /// has some logic for recognizing it. 1243 // FIXME: Warn, deprecate, and potentially remove this. 1244 CK_Penryn, 1245 //@} 1246 1247 /// \name Atom 1248 /// Atom processors 1249 //@{ 1250 CK_Atom, 1251 //@} 1252 1253 /// \name Nehalem 1254 /// Nehalem microarchitecture based processors. 1255 //@{ 1256 CK_Corei7, 1257 CK_Corei7AVX, 1258 CK_CoreAVXi, 1259 //@} 1260 1261 /// \name K6 1262 /// K6 architecture processors. 1263 //@{ 1264 CK_K6, 1265 CK_K6_2, 1266 CK_K6_3, 1267 //@} 1268 1269 /// \name K7 1270 /// K7 architecture processors. 1271 //@{ 1272 CK_Athlon, 1273 CK_AthlonThunderbird, 1274 CK_Athlon4, 1275 CK_AthlonXP, 1276 CK_AthlonMP, 1277 //@} 1278 1279 /// \name K8 1280 /// K8 architecture processors. 1281 //@{ 1282 CK_Athlon64, 1283 CK_Athlon64SSE3, 1284 CK_AthlonFX, 1285 CK_K8, 1286 CK_K8SSE3, 1287 CK_Opteron, 1288 CK_OpteronSSE3, 1289 CK_AMDFAM10, 1290 1291 /// This specification is deprecated and will be removed in the future. 1292 /// Users should prefer \see CK_K8. 1293 // FIXME: Warn on this when the CPU is set to it. 1294 CK_x86_64, 1295 //@} 1296 1297 /// \name Geode 1298 /// Geode processors. 1299 //@{ 1300 CK_Geode 1301 //@} 1302 } CPU; 1303 1304 public: 1305 X86TargetInfo(const std::string& triple) 1306 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1307 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1308 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1309 } 1310 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1311 unsigned &NumRecords) const { 1312 Records = BuiltinInfo; 1313 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1314 } 1315 virtual void getGCCRegNames(const char * const *&Names, 1316 unsigned &NumNames) const { 1317 Names = GCCRegNames; 1318 NumNames = llvm::array_lengthof(GCCRegNames); 1319 } 1320 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1321 unsigned &NumAliases) const { 1322 Aliases = 0; 1323 NumAliases = 0; 1324 } 1325 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1326 unsigned &NumNames) const { 1327 Names = AddlRegNames; 1328 NumNames = llvm::array_lengthof(AddlRegNames); 1329 } 1330 virtual bool validateAsmConstraint(const char *&Name, 1331 TargetInfo::ConstraintInfo &info) const; 1332 virtual std::string convertConstraint(const char *&Constraint) const; 1333 virtual const char *getClobbers() const { 1334 return "~{dirflag},~{fpsr},~{flags}"; 1335 } 1336 virtual void getTargetDefines(const LangOptions &Opts, 1337 MacroBuilder &Builder) const; 1338 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1339 const std::string &Name, 1340 bool Enabled) const; 1341 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1342 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1343 virtual const char* getABI() const { 1344 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1345 } 1346 virtual bool setCPU(const std::string &Name) { 1347 CPU = llvm::StringSwitch<CPUKind>(Name) 1348 .Case("i386", CK_i386) 1349 .Case("i486", CK_i486) 1350 .Case("winchip-c6", CK_WinChipC6) 1351 .Case("winchip2", CK_WinChip2) 1352 .Case("c3", CK_C3) 1353 .Case("i586", CK_i586) 1354 .Case("pentium", CK_Pentium) 1355 .Case("pentium-mmx", CK_PentiumMMX) 1356 .Case("i686", CK_i686) 1357 .Case("pentiumpro", CK_PentiumPro) 1358 .Case("pentium2", CK_Pentium2) 1359 .Case("pentium3", CK_Pentium3) 1360 .Case("pentium3m", CK_Pentium3M) 1361 .Case("pentium-m", CK_PentiumM) 1362 .Case("c3-2", CK_C3_2) 1363 .Case("yonah", CK_Yonah) 1364 .Case("pentium4", CK_Pentium4) 1365 .Case("pentium4m", CK_Pentium4M) 1366 .Case("prescott", CK_Prescott) 1367 .Case("nocona", CK_Nocona) 1368 .Case("core2", CK_Core2) 1369 .Case("penryn", CK_Penryn) 1370 .Case("atom", CK_Atom) 1371 .Case("corei7", CK_Corei7) 1372 .Case("corei7-avx", CK_Corei7AVX) 1373 .Case("core-avx-i", CK_CoreAVXi) 1374 .Case("k6", CK_K6) 1375 .Case("k6-2", CK_K6_2) 1376 .Case("k6-3", CK_K6_3) 1377 .Case("athlon", CK_Athlon) 1378 .Case("athlon-tbird", CK_AthlonThunderbird) 1379 .Case("athlon-4", CK_Athlon4) 1380 .Case("athlon-xp", CK_AthlonXP) 1381 .Case("athlon-mp", CK_AthlonMP) 1382 .Case("athlon64", CK_Athlon64) 1383 .Case("athlon64-sse3", CK_Athlon64SSE3) 1384 .Case("athlon-fx", CK_AthlonFX) 1385 .Case("k8", CK_K8) 1386 .Case("k8-sse3", CK_K8SSE3) 1387 .Case("opteron", CK_Opteron) 1388 .Case("opteron-sse3", CK_OpteronSSE3) 1389 .Case("amdfam10", CK_AMDFAM10) 1390 .Case("x86-64", CK_x86_64) 1391 .Case("geode", CK_Geode) 1392 .Default(CK_Generic); 1393 1394 // Perform any per-CPU checks necessary to determine if this CPU is 1395 // acceptable. 1396 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1397 // invalid without explaining *why*. 1398 switch (CPU) { 1399 case CK_Generic: 1400 // No processor selected! 1401 return false; 1402 1403 case CK_i386: 1404 case CK_i486: 1405 case CK_WinChipC6: 1406 case CK_WinChip2: 1407 case CK_C3: 1408 case CK_i586: 1409 case CK_Pentium: 1410 case CK_PentiumMMX: 1411 case CK_i686: 1412 case CK_PentiumPro: 1413 case CK_Pentium2: 1414 case CK_Pentium3: 1415 case CK_Pentium3M: 1416 case CK_PentiumM: 1417 case CK_Yonah: 1418 case CK_C3_2: 1419 case CK_Pentium4: 1420 case CK_Pentium4M: 1421 case CK_Prescott: 1422 case CK_K6: 1423 case CK_K6_2: 1424 case CK_K6_3: 1425 case CK_Athlon: 1426 case CK_AthlonThunderbird: 1427 case CK_Athlon4: 1428 case CK_AthlonXP: 1429 case CK_AthlonMP: 1430 case CK_Geode: 1431 // Only accept certain architectures when compiling in 32-bit mode. 1432 if (PointerWidth != 32) 1433 return false; 1434 1435 // Fallthrough 1436 case CK_Nocona: 1437 case CK_Core2: 1438 case CK_Penryn: 1439 case CK_Atom: 1440 case CK_Corei7: 1441 case CK_Corei7AVX: 1442 case CK_CoreAVXi: 1443 case CK_Athlon64: 1444 case CK_Athlon64SSE3: 1445 case CK_AthlonFX: 1446 case CK_K8: 1447 case CK_K8SSE3: 1448 case CK_Opteron: 1449 case CK_OpteronSSE3: 1450 case CK_AMDFAM10: 1451 case CK_x86_64: 1452 return true; 1453 } 1454 llvm_unreachable("Unhandled CPU kind"); 1455 } 1456 }; 1457 1458 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1459 // FIXME: This should not be here. 1460 Features["3dnow"] = false; 1461 Features["3dnowa"] = false; 1462 Features["mmx"] = false; 1463 Features["sse"] = false; 1464 Features["sse2"] = false; 1465 Features["sse3"] = false; 1466 Features["ssse3"] = false; 1467 Features["sse41"] = false; 1468 Features["sse42"] = false; 1469 Features["sse4a"] = false; 1470 Features["aes"] = false; 1471 Features["avx"] = false; 1472 1473 // FIXME: This *really* should not be here. 1474 1475 // X86_64 always has SSE2. 1476 if (PointerWidth == 64) 1477 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1478 1479 switch (CPU) { 1480 case CK_Generic: 1481 case CK_i386: 1482 case CK_i486: 1483 case CK_i586: 1484 case CK_Pentium: 1485 case CK_i686: 1486 case CK_PentiumPro: 1487 break; 1488 case CK_PentiumMMX: 1489 case CK_Pentium2: 1490 setFeatureEnabled(Features, "mmx", true); 1491 break; 1492 case CK_Pentium3: 1493 case CK_Pentium3M: 1494 setFeatureEnabled(Features, "mmx", true); 1495 setFeatureEnabled(Features, "sse", true); 1496 break; 1497 case CK_PentiumM: 1498 case CK_Pentium4: 1499 case CK_Pentium4M: 1500 case CK_x86_64: 1501 setFeatureEnabled(Features, "mmx", true); 1502 setFeatureEnabled(Features, "sse2", true); 1503 break; 1504 case CK_Yonah: 1505 case CK_Prescott: 1506 case CK_Nocona: 1507 setFeatureEnabled(Features, "mmx", true); 1508 setFeatureEnabled(Features, "sse3", true); 1509 break; 1510 case CK_Core2: 1511 setFeatureEnabled(Features, "mmx", true); 1512 setFeatureEnabled(Features, "ssse3", true); 1513 break; 1514 case CK_Penryn: 1515 setFeatureEnabled(Features, "mmx", true); 1516 setFeatureEnabled(Features, "sse4", true); 1517 Features["sse42"] = false; 1518 break; 1519 case CK_Atom: 1520 setFeatureEnabled(Features, "mmx", true); 1521 setFeatureEnabled(Features, "ssse3", true); 1522 break; 1523 case CK_Corei7: 1524 setFeatureEnabled(Features, "mmx", true); 1525 setFeatureEnabled(Features, "sse4", true); 1526 setFeatureEnabled(Features, "aes", true); 1527 break; 1528 case CK_Corei7AVX: 1529 case CK_CoreAVXi: 1530 setFeatureEnabled(Features, "mmx", true); 1531 setFeatureEnabled(Features, "sse4", true); 1532 setFeatureEnabled(Features, "aes", true); 1533 //setFeatureEnabled(Features, "avx", true); 1534 break; 1535 case CK_K6: 1536 case CK_WinChipC6: 1537 setFeatureEnabled(Features, "mmx", true); 1538 break; 1539 case CK_K6_2: 1540 case CK_K6_3: 1541 case CK_WinChip2: 1542 case CK_C3: 1543 setFeatureEnabled(Features, "3dnow", true); 1544 break; 1545 case CK_Athlon: 1546 case CK_AthlonThunderbird: 1547 case CK_Geode: 1548 setFeatureEnabled(Features, "3dnowa", true); 1549 break; 1550 case CK_Athlon4: 1551 case CK_AthlonXP: 1552 case CK_AthlonMP: 1553 setFeatureEnabled(Features, "sse", true); 1554 setFeatureEnabled(Features, "3dnowa", true); 1555 break; 1556 case CK_K8: 1557 case CK_Opteron: 1558 case CK_Athlon64: 1559 case CK_AthlonFX: 1560 setFeatureEnabled(Features, "sse2", true); 1561 setFeatureEnabled(Features, "3dnowa", true); 1562 break; 1563 case CK_K8SSE3: 1564 case CK_OpteronSSE3: 1565 case CK_Athlon64SSE3: 1566 setFeatureEnabled(Features, "sse3", true); 1567 setFeatureEnabled(Features, "3dnowa", true); 1568 break; 1569 case CK_AMDFAM10: 1570 setFeatureEnabled(Features, "sse3", true); 1571 setFeatureEnabled(Features, "sse4a", true); 1572 setFeatureEnabled(Features, "3dnowa", true); 1573 break; 1574 case CK_C3_2: 1575 setFeatureEnabled(Features, "mmx", true); 1576 setFeatureEnabled(Features, "sse", true); 1577 break; 1578 } 1579 } 1580 1581 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1582 const std::string &Name, 1583 bool Enabled) const { 1584 // FIXME: This *really* should not be here. We need some way of translating 1585 // options into llvm subtarget features. 1586 if (!Features.count(Name) && 1587 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1588 return false; 1589 1590 // FIXME: this should probably use a switch with fall through. 1591 1592 if (Enabled) { 1593 if (Name == "mmx") 1594 Features["mmx"] = true; 1595 else if (Name == "sse") 1596 Features["mmx"] = Features["sse"] = true; 1597 else if (Name == "sse2") 1598 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1599 else if (Name == "sse3") 1600 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1601 true; 1602 else if (Name == "ssse3") 1603 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1604 Features["ssse3"] = true; 1605 else if (Name == "sse4" || Name == "sse4.2") 1606 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1607 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1608 else if (Name == "sse4.1") 1609 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1610 Features["ssse3"] = Features["sse41"] = true; 1611 else if (Name == "3dnow") 1612 Features["mmx"] = Features["3dnow"] = true; 1613 else if (Name == "3dnowa") 1614 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1615 else if (Name == "aes") 1616 Features["aes"] = true; 1617 else if (Name == "avx") 1618 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1619 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1620 Features["avx"] = true; 1621 else if (Name == "sse4a") 1622 Features["mmx"] = Features["sse4a"] = true; 1623 } else { 1624 if (Name == "mmx") 1625 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1626 else if (Name == "sse") 1627 Features["sse"] = Features["sse2"] = Features["sse3"] = 1628 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1629 else if (Name == "sse2") 1630 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1631 Features["sse41"] = Features["sse42"] = false; 1632 else if (Name == "sse3") 1633 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1634 Features["sse42"] = false; 1635 else if (Name == "ssse3") 1636 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1637 else if (Name == "sse4" || Name == "sse4.1") 1638 Features["sse41"] = Features["sse42"] = false; 1639 else if (Name == "sse4.2") 1640 Features["sse42"] = false; 1641 else if (Name == "3dnow") 1642 Features["3dnow"] = Features["3dnowa"] = false; 1643 else if (Name == "3dnowa") 1644 Features["3dnowa"] = false; 1645 else if (Name == "aes") 1646 Features["aes"] = false; 1647 else if (Name == "avx") 1648 Features["avx"] = false; 1649 else if (Name == "sse4a") 1650 Features["sse4a"] = false; 1651 } 1652 1653 return true; 1654 } 1655 1656 /// HandleTargetOptions - Perform initialization based on the user 1657 /// configured set of features. 1658 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1659 // Remember the maximum enabled sselevel. 1660 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1661 // Ignore disabled features. 1662 if (Features[i][0] == '-') 1663 continue; 1664 1665 if (Features[i].substr(1) == "aes") { 1666 HasAES = true; 1667 continue; 1668 } 1669 1670 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1671 // For now let it be enabled together with other SSE levels. 1672 if (Features[i].substr(1) == "avx") { 1673 HasAVX = true; 1674 continue; 1675 } 1676 1677 assert(Features[i][0] == '+' && "Invalid target feature!"); 1678 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1679 .Case("sse42", SSE42) 1680 .Case("sse41", SSE41) 1681 .Case("ssse3", SSSE3) 1682 .Case("sse3", SSE3) 1683 .Case("sse2", SSE2) 1684 .Case("sse", SSE1) 1685 .Default(NoSSE); 1686 SSELevel = std::max(SSELevel, Level); 1687 1688 MMX3DNowEnum ThreeDNowLevel = 1689 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1690 .Case("3dnowa", AMD3DNowAthlon) 1691 .Case("3dnow", AMD3DNow) 1692 .Case("mmx", MMX) 1693 .Default(NoMMX3DNow); 1694 1695 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1696 } 1697 1698 // Don't tell the backend if we're turning off mmx; it will end up disabling 1699 // SSE, which we don't want. 1700 std::vector<std::string>::iterator it; 1701 it = std::find(Features.begin(), Features.end(), "-mmx"); 1702 if (it != Features.end()) 1703 Features.erase(it); 1704 } 1705 1706 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1707 /// definitions for this particular subtarget. 1708 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1709 MacroBuilder &Builder) const { 1710 // Target identification. 1711 if (PointerWidth == 64) { 1712 Builder.defineMacro("_LP64"); 1713 Builder.defineMacro("__LP64__"); 1714 Builder.defineMacro("__amd64__"); 1715 Builder.defineMacro("__amd64"); 1716 Builder.defineMacro("__x86_64"); 1717 Builder.defineMacro("__x86_64__"); 1718 } else { 1719 DefineStd(Builder, "i386", Opts); 1720 } 1721 1722 // Subtarget options. 1723 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1724 // truly should be based on -mtune options. 1725 switch (CPU) { 1726 case CK_Generic: 1727 break; 1728 case CK_i386: 1729 // The rest are coming from the i386 define above. 1730 Builder.defineMacro("__tune_i386__"); 1731 break; 1732 case CK_i486: 1733 case CK_WinChipC6: 1734 case CK_WinChip2: 1735 case CK_C3: 1736 Builder.defineMacro("__i486"); 1737 Builder.defineMacro("__i486__"); 1738 Builder.defineMacro("__tune_i486__"); 1739 break; 1740 case CK_PentiumMMX: 1741 Builder.defineMacro("__pentium_mmx__"); 1742 Builder.defineMacro("__tune_pentium_mmx__"); 1743 // Fallthrough 1744 case CK_i586: 1745 case CK_Pentium: 1746 Builder.defineMacro("__i586"); 1747 Builder.defineMacro("__i586__"); 1748 Builder.defineMacro("__tune_i586__"); 1749 Builder.defineMacro("__pentium"); 1750 Builder.defineMacro("__pentium__"); 1751 Builder.defineMacro("__tune_pentium__"); 1752 break; 1753 case CK_Pentium3: 1754 case CK_Pentium3M: 1755 case CK_PentiumM: 1756 Builder.defineMacro("__tune_pentium3__"); 1757 // Fallthrough 1758 case CK_Pentium2: 1759 case CK_C3_2: 1760 Builder.defineMacro("__tune_pentium2__"); 1761 // Fallthrough 1762 case CK_PentiumPro: 1763 Builder.defineMacro("__tune_i686__"); 1764 Builder.defineMacro("__tune_pentiumpro__"); 1765 // Fallthrough 1766 case CK_i686: 1767 Builder.defineMacro("__i686"); 1768 Builder.defineMacro("__i686__"); 1769 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1770 Builder.defineMacro("__pentiumpro"); 1771 Builder.defineMacro("__pentiumpro__"); 1772 break; 1773 case CK_Pentium4: 1774 case CK_Pentium4M: 1775 Builder.defineMacro("__pentium4"); 1776 Builder.defineMacro("__pentium4__"); 1777 Builder.defineMacro("__tune_pentium4__"); 1778 break; 1779 case CK_Yonah: 1780 case CK_Prescott: 1781 case CK_Nocona: 1782 Builder.defineMacro("__nocona"); 1783 Builder.defineMacro("__nocona__"); 1784 Builder.defineMacro("__tune_nocona__"); 1785 break; 1786 case CK_Core2: 1787 case CK_Penryn: 1788 Builder.defineMacro("__core2"); 1789 Builder.defineMacro("__core2__"); 1790 Builder.defineMacro("__tune_core2__"); 1791 break; 1792 case CK_Atom: 1793 Builder.defineMacro("__atom"); 1794 Builder.defineMacro("__atom__"); 1795 Builder.defineMacro("__tune_atom__"); 1796 break; 1797 case CK_Corei7: 1798 case CK_Corei7AVX: 1799 case CK_CoreAVXi: 1800 Builder.defineMacro("__corei7"); 1801 Builder.defineMacro("__corei7__"); 1802 Builder.defineMacro("__tune_corei7__"); 1803 break; 1804 case CK_K6_2: 1805 Builder.defineMacro("__k6_2__"); 1806 Builder.defineMacro("__tune_k6_2__"); 1807 // Fallthrough 1808 case CK_K6_3: 1809 if (CPU != CK_K6_2) { // In case of fallthrough 1810 // FIXME: GCC may be enabling these in cases where some other k6 1811 // architecture is specified but -m3dnow is explicitly provided. The 1812 // exact semantics need to be determined and emulated here. 1813 Builder.defineMacro("__k6_3__"); 1814 Builder.defineMacro("__tune_k6_3__"); 1815 } 1816 // Fallthrough 1817 case CK_K6: 1818 Builder.defineMacro("__k6"); 1819 Builder.defineMacro("__k6__"); 1820 Builder.defineMacro("__tune_k6__"); 1821 break; 1822 case CK_Athlon: 1823 case CK_AthlonThunderbird: 1824 case CK_Athlon4: 1825 case CK_AthlonXP: 1826 case CK_AthlonMP: 1827 Builder.defineMacro("__athlon"); 1828 Builder.defineMacro("__athlon__"); 1829 Builder.defineMacro("__tune_athlon__"); 1830 if (SSELevel != NoSSE) { 1831 Builder.defineMacro("__athlon_sse__"); 1832 Builder.defineMacro("__tune_athlon_sse__"); 1833 } 1834 break; 1835 case CK_K8: 1836 case CK_K8SSE3: 1837 case CK_x86_64: 1838 case CK_Opteron: 1839 case CK_OpteronSSE3: 1840 case CK_Athlon64: 1841 case CK_Athlon64SSE3: 1842 case CK_AthlonFX: 1843 Builder.defineMacro("__k8"); 1844 Builder.defineMacro("__k8__"); 1845 Builder.defineMacro("__tune_k8__"); 1846 break; 1847 case CK_AMDFAM10: 1848 Builder.defineMacro("__amdfam10"); 1849 Builder.defineMacro("__amdfam10__"); 1850 Builder.defineMacro("__tune_amdfam10__"); 1851 break; 1852 case CK_Geode: 1853 Builder.defineMacro("__geode"); 1854 Builder.defineMacro("__geode__"); 1855 Builder.defineMacro("__tune_geode__"); 1856 break; 1857 } 1858 1859 // Target properties. 1860 Builder.defineMacro("__LITTLE_ENDIAN__"); 1861 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1862 1863 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1864 // functions in glibc header files that use FP Stack inline asm which the 1865 // backend can't deal with (PR879). 1866 Builder.defineMacro("__NO_MATH_INLINES"); 1867 1868 if (HasAES) 1869 Builder.defineMacro("__AES__"); 1870 1871 if (HasAVX) 1872 Builder.defineMacro("__AVX__"); 1873 1874 // Each case falls through to the previous one here. 1875 switch (SSELevel) { 1876 case SSE42: 1877 Builder.defineMacro("__SSE4_2__"); 1878 case SSE41: 1879 Builder.defineMacro("__SSE4_1__"); 1880 case SSSE3: 1881 Builder.defineMacro("__SSSE3__"); 1882 case SSE3: 1883 Builder.defineMacro("__SSE3__"); 1884 case SSE2: 1885 Builder.defineMacro("__SSE2__"); 1886 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1887 case SSE1: 1888 Builder.defineMacro("__SSE__"); 1889 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1890 case NoSSE: 1891 break; 1892 } 1893 1894 if (Opts.MicrosoftExt && PointerWidth == 32) { 1895 switch (SSELevel) { 1896 case SSE42: 1897 case SSE41: 1898 case SSSE3: 1899 case SSE3: 1900 case SSE2: 1901 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1902 break; 1903 case SSE1: 1904 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1905 break; 1906 default: 1907 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1908 } 1909 } 1910 1911 // Each case falls through to the previous one here. 1912 switch (MMX3DNowLevel) { 1913 case AMD3DNowAthlon: 1914 Builder.defineMacro("__3dNOW_A__"); 1915 case AMD3DNow: 1916 Builder.defineMacro("__3dNOW__"); 1917 case MMX: 1918 Builder.defineMacro("__MMX__"); 1919 case NoMMX3DNow: 1920 break; 1921 } 1922 } 1923 1924 1925 bool 1926 X86TargetInfo::validateAsmConstraint(const char *&Name, 1927 TargetInfo::ConstraintInfo &Info) const { 1928 switch (*Name) { 1929 default: return false; 1930 case 'Y': // first letter of a pair: 1931 switch (*(Name+1)) { 1932 default: return false; 1933 case '0': // First SSE register. 1934 case 't': // Any SSE register, when SSE2 is enabled. 1935 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1936 case 'm': // any MMX register, when inter-unit moves enabled. 1937 break; // falls through to setAllowsRegister. 1938 } 1939 case 'a': // eax. 1940 case 'b': // ebx. 1941 case 'c': // ecx. 1942 case 'd': // edx. 1943 case 'S': // esi. 1944 case 'D': // edi. 1945 case 'A': // edx:eax. 1946 case 'f': // any x87 floating point stack register. 1947 case 't': // top of floating point stack. 1948 case 'u': // second from top of floating point stack. 1949 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1950 case 'y': // Any MMX register. 1951 case 'x': // Any SSE register. 1952 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1953 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1954 case 'l': // "Index" registers: any general register that can be used as an 1955 // index in a base+index memory access. 1956 Info.setAllowsRegister(); 1957 return true; 1958 case 'C': // SSE floating point constant. 1959 case 'G': // x87 floating point constant. 1960 case 'e': // 32-bit signed integer constant for use with zero-extending 1961 // x86_64 instructions. 1962 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1963 // x86_64 instructions. 1964 return true; 1965 } 1966 return false; 1967 } 1968 1969 1970 std::string 1971 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1972 switch (*Constraint) { 1973 case 'a': return std::string("{ax}"); 1974 case 'b': return std::string("{bx}"); 1975 case 'c': return std::string("{cx}"); 1976 case 'd': return std::string("{dx}"); 1977 case 'S': return std::string("{si}"); 1978 case 'D': return std::string("{di}"); 1979 case 'p': // address 1980 return std::string("im"); 1981 case 't': // top of floating point stack. 1982 return std::string("{st}"); 1983 case 'u': // second from top of floating point stack. 1984 return std::string("{st(1)}"); // second from top of floating point stack. 1985 default: 1986 return std::string(1, *Constraint); 1987 } 1988 } 1989 } // end anonymous namespace 1990 1991 namespace { 1992 // X86-32 generic target 1993 class X86_32TargetInfo : public X86TargetInfo { 1994 public: 1995 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1996 DoubleAlign = LongLongAlign = 32; 1997 LongDoubleWidth = 96; 1998 LongDoubleAlign = 32; 1999 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2000 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2001 "a0:0:64-f80:32:32-n8:16:32-S128"; 2002 SizeType = UnsignedInt; 2003 PtrDiffType = SignedInt; 2004 IntPtrType = SignedInt; 2005 RegParmMax = 3; 2006 2007 // Use fpret for all types. 2008 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2009 (1 << TargetInfo::Double) | 2010 (1 << TargetInfo::LongDouble)); 2011 2012 // x86-32 has atomics up to 8 bytes 2013 // FIXME: Check that we actually have cmpxchg8b before setting 2014 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2015 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2016 } 2017 virtual const char *getVAListDeclaration() const { 2018 return "typedef char* __builtin_va_list;"; 2019 } 2020 2021 int getEHDataRegisterNumber(unsigned RegNo) const { 2022 if (RegNo == 0) return 0; 2023 if (RegNo == 1) return 2; 2024 return -1; 2025 } 2026 }; 2027 } // end anonymous namespace 2028 2029 namespace { 2030 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2031 public: 2032 OpenBSDI386TargetInfo(const std::string& triple) : 2033 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2034 SizeType = UnsignedLong; 2035 IntPtrType = SignedLong; 2036 PtrDiffType = SignedLong; 2037 } 2038 }; 2039 } // end anonymous namespace 2040 2041 namespace { 2042 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2043 public: 2044 DarwinI386TargetInfo(const std::string& triple) : 2045 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2046 LongDoubleWidth = 128; 2047 LongDoubleAlign = 128; 2048 SizeType = UnsignedLong; 2049 IntPtrType = SignedLong; 2050 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2051 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2052 "a0:0:64-f80:128:128-n8:16:32-S128"; 2053 HasAlignMac68kSupport = true; 2054 } 2055 2056 }; 2057 } // end anonymous namespace 2058 2059 namespace { 2060 // x86-32 Windows target 2061 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2062 public: 2063 WindowsX86_32TargetInfo(const std::string& triple) 2064 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2065 TLSSupported = false; 2066 WCharType = UnsignedShort; 2067 DoubleAlign = LongLongAlign = 64; 2068 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2069 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2070 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2071 } 2072 virtual void getTargetDefines(const LangOptions &Opts, 2073 MacroBuilder &Builder) const { 2074 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2075 } 2076 }; 2077 } // end anonymous namespace 2078 2079 namespace { 2080 2081 // x86-32 Windows Visual Studio target 2082 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2083 public: 2084 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2085 : WindowsX86_32TargetInfo(triple) { 2086 LongDoubleWidth = LongDoubleAlign = 64; 2087 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2088 } 2089 virtual void getTargetDefines(const LangOptions &Opts, 2090 MacroBuilder &Builder) const { 2091 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2092 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2093 // The value of the following reflects processor type. 2094 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2095 // We lost the original triple, so we use the default. 2096 Builder.defineMacro("_M_IX86", "600"); 2097 } 2098 }; 2099 } // end anonymous namespace 2100 2101 namespace { 2102 // x86-32 MinGW target 2103 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2104 public: 2105 MinGWX86_32TargetInfo(const std::string& triple) 2106 : WindowsX86_32TargetInfo(triple) { 2107 } 2108 virtual void getTargetDefines(const LangOptions &Opts, 2109 MacroBuilder &Builder) const { 2110 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2111 DefineStd(Builder, "WIN32", Opts); 2112 DefineStd(Builder, "WINNT", Opts); 2113 Builder.defineMacro("_X86_"); 2114 Builder.defineMacro("__MSVCRT__"); 2115 Builder.defineMacro("__MINGW32__"); 2116 2117 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2118 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2119 if (Opts.MicrosoftExt) 2120 // Provide "as-is" __declspec. 2121 Builder.defineMacro("__declspec", "__declspec"); 2122 else 2123 // Provide alias of __attribute__ like mingw32-gcc. 2124 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2125 } 2126 }; 2127 } // end anonymous namespace 2128 2129 namespace { 2130 // x86-32 Cygwin target 2131 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2132 public: 2133 CygwinX86_32TargetInfo(const std::string& triple) 2134 : X86_32TargetInfo(triple) { 2135 TLSSupported = false; 2136 WCharType = UnsignedShort; 2137 DoubleAlign = LongLongAlign = 64; 2138 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2139 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2140 "a0:0:64-f80:32:32-n8:16:32-S32"; 2141 } 2142 virtual void getTargetDefines(const LangOptions &Opts, 2143 MacroBuilder &Builder) const { 2144 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2145 Builder.defineMacro("__CYGWIN__"); 2146 Builder.defineMacro("__CYGWIN32__"); 2147 DefineStd(Builder, "unix", Opts); 2148 if (Opts.CPlusPlus) 2149 Builder.defineMacro("_GNU_SOURCE"); 2150 } 2151 }; 2152 } // end anonymous namespace 2153 2154 namespace { 2155 // x86-32 Haiku target 2156 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2157 public: 2158 HaikuX86_32TargetInfo(const std::string& triple) 2159 : X86_32TargetInfo(triple) { 2160 SizeType = UnsignedLong; 2161 IntPtrType = SignedLong; 2162 PtrDiffType = SignedLong; 2163 this->UserLabelPrefix = ""; 2164 } 2165 virtual void getTargetDefines(const LangOptions &Opts, 2166 MacroBuilder &Builder) const { 2167 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2168 Builder.defineMacro("__INTEL__"); 2169 Builder.defineMacro("__HAIKU__"); 2170 } 2171 }; 2172 } // end anonymous namespace 2173 2174 // RTEMS Target 2175 template<typename Target> 2176 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2177 protected: 2178 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2179 MacroBuilder &Builder) const { 2180 // RTEMS defines; list based off of gcc output 2181 2182 Builder.defineMacro("__rtems__"); 2183 Builder.defineMacro("__ELF__"); 2184 } 2185 public: 2186 RTEMSTargetInfo(const std::string &triple) 2187 : OSTargetInfo<Target>(triple) { 2188 this->UserLabelPrefix = ""; 2189 2190 llvm::Triple Triple(triple); 2191 switch (Triple.getArch()) { 2192 default: 2193 case llvm::Triple::x86: 2194 // this->MCountName = ".mcount"; 2195 break; 2196 case llvm::Triple::mips: 2197 case llvm::Triple::mipsel: 2198 case llvm::Triple::ppc: 2199 case llvm::Triple::ppc64: 2200 // this->MCountName = "_mcount"; 2201 break; 2202 case llvm::Triple::arm: 2203 // this->MCountName = "__mcount"; 2204 break; 2205 } 2206 2207 } 2208 }; 2209 2210 namespace { 2211 // x86-32 RTEMS target 2212 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2213 public: 2214 RTEMSX86_32TargetInfo(const std::string& triple) 2215 : X86_32TargetInfo(triple) { 2216 SizeType = UnsignedLong; 2217 IntPtrType = SignedLong; 2218 PtrDiffType = SignedLong; 2219 this->UserLabelPrefix = ""; 2220 } 2221 virtual void getTargetDefines(const LangOptions &Opts, 2222 MacroBuilder &Builder) const { 2223 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2224 Builder.defineMacro("__INTEL__"); 2225 Builder.defineMacro("__rtems__"); 2226 } 2227 }; 2228 } // end anonymous namespace 2229 2230 namespace { 2231 // x86-64 generic target 2232 class X86_64TargetInfo : public X86TargetInfo { 2233 public: 2234 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2235 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2236 LongDoubleWidth = 128; 2237 LongDoubleAlign = 128; 2238 LargeArrayMinWidth = 128; 2239 LargeArrayAlign = 128; 2240 IntMaxType = SignedLong; 2241 UIntMaxType = UnsignedLong; 2242 Int64Type = SignedLong; 2243 RegParmMax = 6; 2244 2245 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2246 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2247 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2248 2249 // Use fpret only for long double. 2250 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2251 2252 // Use fp2ret for _Complex long double. 2253 ComplexLongDoubleUsesFP2Ret = true; 2254 2255 // x86-64 has atomics up to 16 bytes. 2256 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2257 // on CPUs with cmpxchg16b 2258 MaxAtomicPromoteWidth = 128; 2259 MaxAtomicInlineWidth = 64; 2260 } 2261 virtual const char *getVAListDeclaration() const { 2262 return "typedef struct __va_list_tag {" 2263 " unsigned gp_offset;" 2264 " unsigned fp_offset;" 2265 " void* overflow_arg_area;" 2266 " void* reg_save_area;" 2267 "} __va_list_tag;" 2268 "typedef __va_list_tag __builtin_va_list[1];"; 2269 } 2270 2271 int getEHDataRegisterNumber(unsigned RegNo) const { 2272 if (RegNo == 0) return 0; 2273 if (RegNo == 1) return 1; 2274 return -1; 2275 } 2276 }; 2277 } // end anonymous namespace 2278 2279 namespace { 2280 // x86-64 Windows target 2281 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2282 public: 2283 WindowsX86_64TargetInfo(const std::string& triple) 2284 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2285 TLSSupported = false; 2286 WCharType = UnsignedShort; 2287 LongWidth = LongAlign = 32; 2288 DoubleAlign = LongLongAlign = 64; 2289 IntMaxType = SignedLongLong; 2290 UIntMaxType = UnsignedLongLong; 2291 Int64Type = SignedLongLong; 2292 SizeType = UnsignedLongLong; 2293 PtrDiffType = SignedLongLong; 2294 IntPtrType = SignedLongLong; 2295 this->UserLabelPrefix = ""; 2296 } 2297 virtual void getTargetDefines(const LangOptions &Opts, 2298 MacroBuilder &Builder) const { 2299 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2300 Builder.defineMacro("_WIN64"); 2301 } 2302 virtual const char *getVAListDeclaration() const { 2303 return "typedef char* __builtin_va_list;"; 2304 } 2305 }; 2306 } // end anonymous namespace 2307 2308 namespace { 2309 // x86-64 Windows Visual Studio target 2310 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2311 public: 2312 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2313 : WindowsX86_64TargetInfo(triple) { 2314 LongDoubleWidth = LongDoubleAlign = 64; 2315 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2316 } 2317 virtual void getTargetDefines(const LangOptions &Opts, 2318 MacroBuilder &Builder) const { 2319 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2320 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2321 Builder.defineMacro("_M_X64"); 2322 Builder.defineMacro("_M_AMD64"); 2323 } 2324 }; 2325 } // end anonymous namespace 2326 2327 namespace { 2328 // x86-64 MinGW target 2329 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2330 public: 2331 MinGWX86_64TargetInfo(const std::string& triple) 2332 : WindowsX86_64TargetInfo(triple) { 2333 } 2334 virtual void getTargetDefines(const LangOptions &Opts, 2335 MacroBuilder &Builder) const { 2336 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2337 DefineStd(Builder, "WIN64", Opts); 2338 Builder.defineMacro("__MSVCRT__"); 2339 Builder.defineMacro("__MINGW32__"); 2340 Builder.defineMacro("__MINGW64__"); 2341 2342 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2343 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2344 if (Opts.MicrosoftExt) 2345 // Provide "as-is" __declspec. 2346 Builder.defineMacro("__declspec", "__declspec"); 2347 else 2348 // Provide alias of __attribute__ like mingw32-gcc. 2349 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2350 } 2351 }; 2352 } // end anonymous namespace 2353 2354 namespace { 2355 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2356 public: 2357 DarwinX86_64TargetInfo(const std::string& triple) 2358 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2359 Int64Type = SignedLongLong; 2360 } 2361 }; 2362 } // end anonymous namespace 2363 2364 namespace { 2365 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2366 public: 2367 OpenBSDX86_64TargetInfo(const std::string& triple) 2368 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2369 IntMaxType = SignedLongLong; 2370 UIntMaxType = UnsignedLongLong; 2371 Int64Type = SignedLongLong; 2372 } 2373 }; 2374 } // end anonymous namespace 2375 2376 namespace { 2377 class ARMTargetInfo : public TargetInfo { 2378 // Possible FPU choices. 2379 enum FPUMode { 2380 NoFPU, 2381 VFP2FPU, 2382 VFP3FPU, 2383 NeonFPU 2384 }; 2385 2386 static bool FPUModeIsVFP(FPUMode Mode) { 2387 return Mode >= VFP2FPU && Mode <= NeonFPU; 2388 } 2389 2390 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2391 static const char * const GCCRegNames[]; 2392 2393 std::string ABI, CPU; 2394 2395 unsigned FPU : 3; 2396 2397 unsigned IsThumb : 1; 2398 2399 // Initialized via features. 2400 unsigned SoftFloat : 1; 2401 unsigned SoftFloatABI : 1; 2402 2403 static const Builtin::Info BuiltinInfo[]; 2404 2405 public: 2406 ARMTargetInfo(const std::string &TripleStr) 2407 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2408 { 2409 SizeType = UnsignedInt; 2410 PtrDiffType = SignedInt; 2411 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2412 WCharType = UnsignedInt; 2413 2414 // {} in inline assembly are neon specifiers, not assembly variant 2415 // specifiers. 2416 NoAsmVariants = true; 2417 2418 // FIXME: Should we just treat this as a feature? 2419 IsThumb = getTriple().getArchName().startswith("thumb"); 2420 if (IsThumb) { 2421 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2422 // so set preferred for small types to 32. 2423 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2424 "i64:64:64-f32:32:32-f64:64:64-" 2425 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2426 } else { 2427 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2428 "i64:64:64-f32:32:32-f64:64:64-" 2429 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2430 } 2431 2432 // ARM targets default to using the ARM C++ ABI. 2433 CXXABI = CXXABI_ARM; 2434 2435 // ARM has atomics up to 8 bytes 2436 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2437 MaxAtomicPromoteWidth = 64; 2438 } 2439 virtual const char *getABI() const { return ABI.c_str(); } 2440 virtual bool setABI(const std::string &Name) { 2441 ABI = Name; 2442 2443 // The defaults (above) are for AAPCS, check if we need to change them. 2444 // 2445 // FIXME: We need support for -meabi... we could just mangle it into the 2446 // name. 2447 if (Name == "apcs-gnu") { 2448 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2449 SizeType = UnsignedLong; 2450 2451 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2452 WCharType = SignedInt; 2453 2454 // Do not respect the alignment of bit-field types when laying out 2455 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2456 UseBitFieldTypeAlignment = false; 2457 2458 /// Do force alignment of members that follow zero length bitfields. If 2459 /// the alignment of the zero-length bitfield is greater than the member 2460 /// that follows it, `bar', `bar' will be aligned as the type of the 2461 /// zero length bitfield. 2462 UseZeroLengthBitfieldAlignment = true; 2463 2464 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2465 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2466 /// gcc. 2467 ZeroLengthBitfieldBoundary = 32; 2468 2469 if (IsThumb) { 2470 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2471 // so set preferred for small types to 32. 2472 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2473 "i64:32:64-f32:32:32-f64:32:64-" 2474 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2475 } else { 2476 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2477 "i64:32:64-f32:32:32-f64:32:64-" 2478 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2479 } 2480 2481 // FIXME: Override "preferred align" for double and long long. 2482 } else if (Name == "aapcs") { 2483 // FIXME: Enumerated types are variable width in straight AAPCS. 2484 } else if (Name == "aapcs-linux") { 2485 ; 2486 } else 2487 return false; 2488 2489 return true; 2490 } 2491 2492 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2493 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2494 Features["vfp2"] = true; 2495 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2496 Features["neon"] = true; 2497 } 2498 2499 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2500 const std::string &Name, 2501 bool Enabled) const { 2502 if (Name == "soft-float" || Name == "soft-float-abi" || 2503 Name == "vfp2" || Name == "vfp3" || Name == "neon") { 2504 Features[Name] = Enabled; 2505 } else 2506 return false; 2507 2508 return true; 2509 } 2510 2511 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2512 FPU = NoFPU; 2513 SoftFloat = SoftFloatABI = false; 2514 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2515 if (Features[i] == "+soft-float") 2516 SoftFloat = true; 2517 else if (Features[i] == "+soft-float-abi") 2518 SoftFloatABI = true; 2519 else if (Features[i] == "+vfp2") 2520 FPU = VFP2FPU; 2521 else if (Features[i] == "+vfp3") 2522 FPU = VFP3FPU; 2523 else if (Features[i] == "+neon") 2524 FPU = NeonFPU; 2525 } 2526 2527 // Remove front-end specific options which the backend handles differently. 2528 std::vector<std::string>::iterator it; 2529 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2530 if (it != Features.end()) 2531 Features.erase(it); 2532 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2533 if (it != Features.end()) 2534 Features.erase(it); 2535 } 2536 2537 static const char *getCPUDefineSuffix(StringRef Name) { 2538 return llvm::StringSwitch<const char*>(Name) 2539 .Cases("arm8", "arm810", "4") 2540 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2541 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2542 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2543 .Case("ep9312", "4T") 2544 .Cases("arm10tdmi", "arm1020t", "5T") 2545 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2546 .Case("arm926ej-s", "5TEJ") 2547 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2548 .Cases("xscale", "iwmmxt", "5TE") 2549 .Case("arm1136j-s", "6J") 2550 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2551 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2552 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2553 .Cases("cortex-a8", "cortex-a9", "7A") 2554 .Case("cortex-m3", "7M") 2555 .Case("cortex-m0", "6M") 2556 .Default(0); 2557 } 2558 virtual bool setCPU(const std::string &Name) { 2559 if (!getCPUDefineSuffix(Name)) 2560 return false; 2561 2562 CPU = Name; 2563 return true; 2564 } 2565 virtual void getTargetDefines(const LangOptions &Opts, 2566 MacroBuilder &Builder) const { 2567 // Target identification. 2568 Builder.defineMacro("__arm"); 2569 Builder.defineMacro("__arm__"); 2570 2571 // Target properties. 2572 Builder.defineMacro("__ARMEL__"); 2573 Builder.defineMacro("__LITTLE_ENDIAN__"); 2574 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2575 2576 StringRef CPUArch = getCPUDefineSuffix(CPU); 2577 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2578 2579 // Subtarget options. 2580 2581 // FIXME: It's more complicated than this and we don't really support 2582 // interworking. 2583 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2584 Builder.defineMacro("__THUMB_INTERWORK__"); 2585 2586 if (ABI == "aapcs" || ABI == "aapcs-linux") 2587 Builder.defineMacro("__ARM_EABI__"); 2588 2589 if (SoftFloat) 2590 Builder.defineMacro("__SOFTFP__"); 2591 2592 if (CPU == "xscale") 2593 Builder.defineMacro("__XSCALE__"); 2594 2595 bool IsARMv7 = CPUArch.startswith("7"); 2596 if (IsThumb) { 2597 Builder.defineMacro("__THUMBEL__"); 2598 Builder.defineMacro("__thumb__"); 2599 if (CPUArch == "6T2" || IsARMv7) 2600 Builder.defineMacro("__thumb2__"); 2601 } 2602 2603 // Note, this is always on in gcc, even though it doesn't make sense. 2604 Builder.defineMacro("__APCS_32__"); 2605 2606 if (FPUModeIsVFP((FPUMode) FPU)) 2607 Builder.defineMacro("__VFP_FP__"); 2608 2609 // This only gets set when Neon instructions are actually available, unlike 2610 // the VFP define, hence the soft float and arch check. This is subtly 2611 // different from gcc, we follow the intent which was that it should be set 2612 // when Neon instructions are actually available. 2613 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2614 Builder.defineMacro("__ARM_NEON__"); 2615 } 2616 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2617 unsigned &NumRecords) const { 2618 Records = BuiltinInfo; 2619 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2620 } 2621 virtual const char *getVAListDeclaration() const { 2622 return "typedef void* __builtin_va_list;"; 2623 } 2624 virtual void getGCCRegNames(const char * const *&Names, 2625 unsigned &NumNames) const; 2626 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2627 unsigned &NumAliases) const; 2628 virtual bool validateAsmConstraint(const char *&Name, 2629 TargetInfo::ConstraintInfo &Info) const { 2630 // FIXME: Check if this is complete 2631 switch (*Name) { 2632 default: 2633 case 'l': // r0-r7 2634 case 'h': // r8-r15 2635 case 'w': // VFP Floating point register single precision 2636 case 'P': // VFP Floating point register double precision 2637 Info.setAllowsRegister(); 2638 return true; 2639 case 'Q': // A memory address that is a single base register. 2640 Info.setAllowsMemory(); 2641 return true; 2642 case 'U': // a memory reference... 2643 switch (Name[1]) { 2644 case 'q': // ...ARMV4 ldrsb 2645 case 'v': // ...VFP load/store (reg+constant offset) 2646 case 'y': // ...iWMMXt load/store 2647 case 't': // address valid for load/store opaque types wider 2648 // than 128-bits 2649 case 'n': // valid address for Neon doubleword vector load/store 2650 case 'm': // valid address for Neon element and structure load/store 2651 case 's': // valid address for non-offset loads/stores of quad-word 2652 // values in four ARM registers 2653 Info.setAllowsMemory(); 2654 Name++; 2655 return true; 2656 } 2657 } 2658 return false; 2659 } 2660 virtual std::string convertConstraint(const char *&Constraint) const { 2661 std::string R; 2662 switch (*Constraint) { 2663 case 'U': // Two-character constraint; add "^" hint for later parsing. 2664 R = std::string("^") + std::string(Constraint, 2); 2665 Constraint++; 2666 break; 2667 case 'p': // 'p' should be translated to 'r' by default. 2668 R = std::string("r"); 2669 break; 2670 default: 2671 return std::string(1, *Constraint); 2672 } 2673 return R; 2674 } 2675 virtual const char *getClobbers() const { 2676 // FIXME: Is this really right? 2677 return ""; 2678 } 2679 }; 2680 2681 const char * const ARMTargetInfo::GCCRegNames[] = { 2682 // Integer registers 2683 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2684 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2685 2686 // Float registers 2687 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2688 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2689 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2690 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2691 2692 // Double registers 2693 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2694 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2695 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2696 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2697 2698 // Quad registers 2699 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2700 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2701 }; 2702 2703 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2704 unsigned &NumNames) const { 2705 Names = GCCRegNames; 2706 NumNames = llvm::array_lengthof(GCCRegNames); 2707 } 2708 2709 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2710 { { "a1" }, "r0" }, 2711 { { "a2" }, "r1" }, 2712 { { "a3" }, "r2" }, 2713 { { "a4" }, "r3" }, 2714 { { "v1" }, "r4" }, 2715 { { "v2" }, "r5" }, 2716 { { "v3" }, "r6" }, 2717 { { "v4" }, "r7" }, 2718 { { "v5" }, "r8" }, 2719 { { "v6", "rfp" }, "r9" }, 2720 { { "sl" }, "r10" }, 2721 { { "fp" }, "r11" }, 2722 { { "ip" }, "r12" }, 2723 { { "r13" }, "sp" }, 2724 { { "r14" }, "lr" }, 2725 { { "r15" }, "pc" }, 2726 // The S, D and Q registers overlap, but aren't really aliases; we 2727 // don't want to substitute one of these for a different-sized one. 2728 }; 2729 2730 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2731 unsigned &NumAliases) const { 2732 Aliases = GCCRegAliases; 2733 NumAliases = llvm::array_lengthof(GCCRegAliases); 2734 } 2735 2736 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2737 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2738 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2739 ALL_LANGUAGES }, 2740 #include "clang/Basic/BuiltinsARM.def" 2741 }; 2742 } // end anonymous namespace. 2743 2744 2745 namespace { 2746 class DarwinARMTargetInfo : 2747 public DarwinTargetInfo<ARMTargetInfo> { 2748 protected: 2749 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2750 MacroBuilder &Builder) const { 2751 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2752 } 2753 2754 public: 2755 DarwinARMTargetInfo(const std::string& triple) 2756 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2757 HasAlignMac68kSupport = true; 2758 // iOS always has 64-bit atomic instructions. 2759 // FIXME: This should be based off of the target features in ARMTargetInfo. 2760 MaxAtomicInlineWidth = 64; 2761 } 2762 }; 2763 } // end anonymous namespace. 2764 2765 namespace { 2766 class SparcV8TargetInfo : public TargetInfo { 2767 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2768 static const char * const GCCRegNames[]; 2769 bool SoftFloat; 2770 public: 2771 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2772 // FIXME: Support Sparc quad-precision long double? 2773 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2774 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2775 } 2776 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2777 const std::string &Name, 2778 bool Enabled) const { 2779 if (Name == "soft-float") 2780 Features[Name] = Enabled; 2781 else 2782 return false; 2783 2784 return true; 2785 } 2786 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2787 SoftFloat = false; 2788 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2789 if (Features[i] == "+soft-float") 2790 SoftFloat = true; 2791 } 2792 virtual void getTargetDefines(const LangOptions &Opts, 2793 MacroBuilder &Builder) const { 2794 DefineStd(Builder, "sparc", Opts); 2795 Builder.defineMacro("__sparcv8"); 2796 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2797 2798 if (SoftFloat) 2799 Builder.defineMacro("SOFT_FLOAT", "1"); 2800 } 2801 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2802 unsigned &NumRecords) const { 2803 // FIXME: Implement! 2804 } 2805 virtual const char *getVAListDeclaration() const { 2806 return "typedef void* __builtin_va_list;"; 2807 } 2808 virtual void getGCCRegNames(const char * const *&Names, 2809 unsigned &NumNames) const; 2810 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2811 unsigned &NumAliases) const; 2812 virtual bool validateAsmConstraint(const char *&Name, 2813 TargetInfo::ConstraintInfo &info) const { 2814 // FIXME: Implement! 2815 return false; 2816 } 2817 virtual const char *getClobbers() const { 2818 // FIXME: Implement! 2819 return ""; 2820 } 2821 }; 2822 2823 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2824 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2825 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2826 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2827 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2828 }; 2829 2830 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2831 unsigned &NumNames) const { 2832 Names = GCCRegNames; 2833 NumNames = llvm::array_lengthof(GCCRegNames); 2834 } 2835 2836 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2837 { { "g0" }, "r0" }, 2838 { { "g1" }, "r1" }, 2839 { { "g2" }, "r2" }, 2840 { { "g3" }, "r3" }, 2841 { { "g4" }, "r4" }, 2842 { { "g5" }, "r5" }, 2843 { { "g6" }, "r6" }, 2844 { { "g7" }, "r7" }, 2845 { { "o0" }, "r8" }, 2846 { { "o1" }, "r9" }, 2847 { { "o2" }, "r10" }, 2848 { { "o3" }, "r11" }, 2849 { { "o4" }, "r12" }, 2850 { { "o5" }, "r13" }, 2851 { { "o6", "sp" }, "r14" }, 2852 { { "o7" }, "r15" }, 2853 { { "l0" }, "r16" }, 2854 { { "l1" }, "r17" }, 2855 { { "l2" }, "r18" }, 2856 { { "l3" }, "r19" }, 2857 { { "l4" }, "r20" }, 2858 { { "l5" }, "r21" }, 2859 { { "l6" }, "r22" }, 2860 { { "l7" }, "r23" }, 2861 { { "i0" }, "r24" }, 2862 { { "i1" }, "r25" }, 2863 { { "i2" }, "r26" }, 2864 { { "i3" }, "r27" }, 2865 { { "i4" }, "r28" }, 2866 { { "i5" }, "r29" }, 2867 { { "i6", "fp" }, "r30" }, 2868 { { "i7" }, "r31" }, 2869 }; 2870 2871 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2872 unsigned &NumAliases) const { 2873 Aliases = GCCRegAliases; 2874 NumAliases = llvm::array_lengthof(GCCRegAliases); 2875 } 2876 } // end anonymous namespace. 2877 2878 namespace { 2879 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2880 public: 2881 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2882 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2883 SizeType = UnsignedInt; 2884 PtrDiffType = SignedInt; 2885 } 2886 }; 2887 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2888 public: 2889 SolarisSparcV8TargetInfo(const std::string& triple) : 2890 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2891 SizeType = UnsignedInt; 2892 PtrDiffType = SignedInt; 2893 } 2894 }; 2895 } // end anonymous namespace. 2896 2897 namespace { 2898 class MSP430TargetInfo : public TargetInfo { 2899 static const char * const GCCRegNames[]; 2900 public: 2901 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2902 TLSSupported = false; 2903 IntWidth = 16; IntAlign = 16; 2904 LongWidth = 32; LongLongWidth = 64; 2905 LongAlign = LongLongAlign = 16; 2906 PointerWidth = 16; PointerAlign = 16; 2907 SizeType = UnsignedInt; 2908 IntMaxType = SignedLong; 2909 UIntMaxType = UnsignedLong; 2910 IntPtrType = SignedShort; 2911 PtrDiffType = SignedInt; 2912 SigAtomicType = SignedLong; 2913 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2914 } 2915 virtual void getTargetDefines(const LangOptions &Opts, 2916 MacroBuilder &Builder) const { 2917 Builder.defineMacro("MSP430"); 2918 Builder.defineMacro("__MSP430__"); 2919 // FIXME: defines for different 'flavours' of MCU 2920 } 2921 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2922 unsigned &NumRecords) const { 2923 // FIXME: Implement. 2924 Records = 0; 2925 NumRecords = 0; 2926 } 2927 virtual void getGCCRegNames(const char * const *&Names, 2928 unsigned &NumNames) const; 2929 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2930 unsigned &NumAliases) const { 2931 // No aliases. 2932 Aliases = 0; 2933 NumAliases = 0; 2934 } 2935 virtual bool validateAsmConstraint(const char *&Name, 2936 TargetInfo::ConstraintInfo &info) const { 2937 // No target constraints for now. 2938 return false; 2939 } 2940 virtual const char *getClobbers() const { 2941 // FIXME: Is this really right? 2942 return ""; 2943 } 2944 virtual const char *getVAListDeclaration() const { 2945 // FIXME: implement 2946 return "typedef char* __builtin_va_list;"; 2947 } 2948 }; 2949 2950 const char * const MSP430TargetInfo::GCCRegNames[] = { 2951 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2952 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2953 }; 2954 2955 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2956 unsigned &NumNames) const { 2957 Names = GCCRegNames; 2958 NumNames = llvm::array_lengthof(GCCRegNames); 2959 } 2960 } 2961 2962 namespace { 2963 2964 // LLVM and Clang cannot be used directly to output native binaries for 2965 // target, but is used to compile C code to llvm bitcode with correct 2966 // type and alignment information. 2967 // 2968 // TCE uses the llvm bitcode as input and uses it for generating customized 2969 // target processor and program binary. TCE co-design environment is 2970 // publicly available in http://tce.cs.tut.fi 2971 2972 static const unsigned TCEOpenCLAddrSpaceMap[] = { 2973 3, // opencl_global 2974 4, // opencl_local 2975 5 // opencl_constant 2976 }; 2977 2978 class TCETargetInfo : public TargetInfo{ 2979 public: 2980 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 2981 TLSSupported = false; 2982 IntWidth = 32; 2983 LongWidth = LongLongWidth = 32; 2984 PointerWidth = 32; 2985 IntAlign = 32; 2986 LongAlign = LongLongAlign = 32; 2987 PointerAlign = 32; 2988 SizeType = UnsignedInt; 2989 IntMaxType = SignedLong; 2990 UIntMaxType = UnsignedLong; 2991 IntPtrType = SignedInt; 2992 PtrDiffType = SignedInt; 2993 FloatWidth = 32; 2994 FloatAlign = 32; 2995 DoubleWidth = 32; 2996 DoubleAlign = 32; 2997 LongDoubleWidth = 32; 2998 LongDoubleAlign = 32; 2999 FloatFormat = &llvm::APFloat::IEEEsingle; 3000 DoubleFormat = &llvm::APFloat::IEEEsingle; 3001 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3002 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3003 "i16:16:32-i32:32:32-i64:32:32-" 3004 "f32:32:32-f64:32:32-v64:32:32-" 3005 "v128:32:32-a0:0:32-n32"; 3006 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3007 } 3008 3009 virtual void getTargetDefines(const LangOptions &Opts, 3010 MacroBuilder &Builder) const { 3011 DefineStd(Builder, "tce", Opts); 3012 Builder.defineMacro("__TCE__"); 3013 Builder.defineMacro("__TCE_V1__"); 3014 } 3015 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3016 unsigned &NumRecords) const {} 3017 virtual const char *getClobbers() const { 3018 return ""; 3019 } 3020 virtual const char *getVAListDeclaration() const { 3021 return "typedef void* __builtin_va_list;"; 3022 } 3023 virtual void getGCCRegNames(const char * const *&Names, 3024 unsigned &NumNames) const {} 3025 virtual bool validateAsmConstraint(const char *&Name, 3026 TargetInfo::ConstraintInfo &info) const { 3027 return true; 3028 } 3029 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3030 unsigned &NumAliases) const {} 3031 }; 3032 } 3033 3034 namespace { 3035 class MipsTargetInfoBase : public TargetInfo { 3036 std::string CPU; 3037 protected: 3038 std::string ABI; 3039 public: 3040 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3041 : TargetInfo(triple), ABI(ABIStr) {} 3042 virtual const char *getABI() const { return ABI.c_str(); } 3043 virtual bool setABI(const std::string &Name) = 0; 3044 virtual bool setCPU(const std::string &Name) { 3045 CPU = Name; 3046 return true; 3047 } 3048 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3049 Features[ABI] = true; 3050 Features[CPU] = true; 3051 } 3052 virtual void getArchDefines(const LangOptions &Opts, 3053 MacroBuilder &Builder) const = 0; 3054 virtual void getTargetDefines(const LangOptions &Opts, 3055 MacroBuilder &Builder) const = 0; 3056 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3057 unsigned &NumRecords) const { 3058 // FIXME: Implement! 3059 } 3060 virtual const char *getVAListDeclaration() const { 3061 return "typedef void* __builtin_va_list;"; 3062 } 3063 virtual void getGCCRegNames(const char * const *&Names, 3064 unsigned &NumNames) const { 3065 static const char * const GCCRegNames[] = { 3066 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3067 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3068 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3069 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3070 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3071 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3072 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3073 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3074 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3075 "$fcc5","$fcc6","$fcc7" 3076 }; 3077 Names = GCCRegNames; 3078 NumNames = llvm::array_lengthof(GCCRegNames); 3079 } 3080 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3081 unsigned &NumAliases) const = 0; 3082 virtual bool validateAsmConstraint(const char *&Name, 3083 TargetInfo::ConstraintInfo &Info) const { 3084 switch (*Name) { 3085 default: 3086 return false; 3087 3088 case 'r': // CPU registers. 3089 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3090 case 'y': // Equivalent to "r", backwards compatibility only. 3091 case 'f': // floating-point registers. 3092 Info.setAllowsRegister(); 3093 return true; 3094 } 3095 return false; 3096 } 3097 3098 virtual const char *getClobbers() const { 3099 // FIXME: Implement! 3100 return ""; 3101 } 3102 }; 3103 3104 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3105 public: 3106 Mips32TargetInfoBase(const std::string& triple) : 3107 MipsTargetInfoBase(triple, "o32") { 3108 SizeType = UnsignedInt; 3109 PtrDiffType = SignedInt; 3110 } 3111 virtual bool setABI(const std::string &Name) { 3112 if ((Name == "o32") || (Name == "eabi")) { 3113 ABI = Name; 3114 return true; 3115 } else 3116 return false; 3117 } 3118 virtual void getArchDefines(const LangOptions &Opts, 3119 MacroBuilder &Builder) const { 3120 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3121 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3122 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3123 3124 if (ABI == "o32") { 3125 Builder.defineMacro("__mips_o32"); 3126 Builder.defineMacro("_ABIO32", "1"); 3127 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3128 } 3129 else if (ABI == "eabi") 3130 Builder.defineMacro("__mips_eabi"); 3131 else 3132 llvm_unreachable("Invalid ABI for Mips32."); 3133 } 3134 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3135 unsigned &NumAliases) const { 3136 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3137 { { "at" }, "$1" }, 3138 { { "v0" }, "$2" }, 3139 { { "v1" }, "$3" }, 3140 { { "a0" }, "$4" }, 3141 { { "a1" }, "$5" }, 3142 { { "a2" }, "$6" }, 3143 { { "a3" }, "$7" }, 3144 { { "t0" }, "$8" }, 3145 { { "t1" }, "$9" }, 3146 { { "t2" }, "$10" }, 3147 { { "t3" }, "$11" }, 3148 { { "t4" }, "$12" }, 3149 { { "t5" }, "$13" }, 3150 { { "t6" }, "$14" }, 3151 { { "t7" }, "$15" }, 3152 { { "s0" }, "$16" }, 3153 { { "s1" }, "$17" }, 3154 { { "s2" }, "$18" }, 3155 { { "s3" }, "$19" }, 3156 { { "s4" }, "$20" }, 3157 { { "s5" }, "$21" }, 3158 { { "s6" }, "$22" }, 3159 { { "s7" }, "$23" }, 3160 { { "t8" }, "$24" }, 3161 { { "t9" }, "$25" }, 3162 { { "k0" }, "$26" }, 3163 { { "k1" }, "$27" }, 3164 { { "gp" }, "$28" }, 3165 { { "sp" }, "$29" }, 3166 { { "fp" }, "$30" }, 3167 { { "ra" }, "$31" } 3168 }; 3169 Aliases = GCCRegAliases; 3170 NumAliases = llvm::array_lengthof(GCCRegAliases); 3171 } 3172 }; 3173 3174 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3175 public: 3176 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3177 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3178 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3179 } 3180 virtual void getTargetDefines(const LangOptions &Opts, 3181 MacroBuilder &Builder) const { 3182 DefineStd(Builder, "mips", Opts); 3183 Builder.defineMacro("_mips"); 3184 DefineStd(Builder, "MIPSEB", Opts); 3185 Builder.defineMacro("_MIPSEB"); 3186 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3187 getArchDefines(Opts, Builder); 3188 } 3189 }; 3190 3191 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3192 public: 3193 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3194 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3195 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3196 } 3197 virtual void getTargetDefines(const LangOptions &Opts, 3198 MacroBuilder &Builder) const { 3199 DefineStd(Builder, "mips", Opts); 3200 Builder.defineMacro("_mips"); 3201 DefineStd(Builder, "MIPSEL", Opts); 3202 Builder.defineMacro("_MIPSEL"); 3203 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3204 getArchDefines(Opts, Builder); 3205 } 3206 }; 3207 3208 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3209 virtual void SetDescriptionString(const std::string &Name) = 0; 3210 public: 3211 Mips64TargetInfoBase(const std::string& triple) : 3212 MipsTargetInfoBase(triple, "n64") { 3213 LongWidth = LongAlign = 64; 3214 PointerWidth = PointerAlign = 64; 3215 LongDoubleWidth = LongDoubleAlign = 128; 3216 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3217 } 3218 virtual bool setABI(const std::string &Name) { 3219 SetDescriptionString(Name); 3220 3221 if (Name != "n32" && Name != "n64") 3222 return false; 3223 3224 ABI = Name; 3225 3226 if (Name == "n32") { 3227 LongWidth = LongAlign = 32; 3228 PointerWidth = PointerAlign = 32; 3229 } 3230 3231 return true; 3232 } 3233 virtual void getArchDefines(const LangOptions &Opts, 3234 MacroBuilder &Builder) const { 3235 if (ABI == "n32") { 3236 Builder.defineMacro("__mips_n32"); 3237 Builder.defineMacro("_ABIN32", "2"); 3238 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3239 } 3240 else if (ABI == "n64") { 3241 Builder.defineMacro("__mips_n64"); 3242 Builder.defineMacro("_ABI64", "3"); 3243 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3244 } 3245 else 3246 llvm_unreachable("Invalid ABI for Mips64."); 3247 } 3248 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3249 unsigned &NumAliases) const { 3250 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3251 { { "at" }, "$1" }, 3252 { { "v0" }, "$2" }, 3253 { { "v1" }, "$3" }, 3254 { { "a0" }, "$4" }, 3255 { { "a1" }, "$5" }, 3256 { { "a2" }, "$6" }, 3257 { { "a3" }, "$7" }, 3258 { { "a4" }, "$8" }, 3259 { { "a5" }, "$9" }, 3260 { { "a6" }, "$10" }, 3261 { { "a7" }, "$11" }, 3262 { { "t0" }, "$12" }, 3263 { { "t1" }, "$13" }, 3264 { { "t2" }, "$14" }, 3265 { { "t3" }, "$15" }, 3266 { { "s0" }, "$16" }, 3267 { { "s1" }, "$17" }, 3268 { { "s2" }, "$18" }, 3269 { { "s3" }, "$19" }, 3270 { { "s4" }, "$20" }, 3271 { { "s5" }, "$21" }, 3272 { { "s6" }, "$22" }, 3273 { { "s7" }, "$23" }, 3274 { { "t8" }, "$24" }, 3275 { { "t9" }, "$25" }, 3276 { { "k0" }, "$26" }, 3277 { { "k1" }, "$27" }, 3278 { { "gp" }, "$28" }, 3279 { { "sp" }, "$29" }, 3280 { { "fp" }, "$30" }, 3281 { { "ra" }, "$31" } 3282 }; 3283 Aliases = GCCRegAliases; 3284 NumAliases = llvm::array_lengthof(GCCRegAliases); 3285 } 3286 }; 3287 3288 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3289 virtual void SetDescriptionString(const std::string &Name) { 3290 // Change DescriptionString only if ABI is n32. 3291 if (Name == "n32") 3292 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3293 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3294 "v64:64:64-n32"; 3295 } 3296 public: 3297 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3298 // Default ABI is n64. 3299 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3300 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3301 "v64:64:64-n32"; 3302 } 3303 virtual void getTargetDefines(const LangOptions &Opts, 3304 MacroBuilder &Builder) const { 3305 DefineStd(Builder, "mips", Opts); 3306 Builder.defineMacro("_mips"); 3307 DefineStd(Builder, "MIPSEB", Opts); 3308 Builder.defineMacro("_MIPSEB"); 3309 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3310 getArchDefines(Opts, Builder); 3311 } 3312 }; 3313 3314 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3315 virtual void SetDescriptionString(const std::string &Name) { 3316 // Change DescriptionString only if ABI is n32. 3317 if (Name == "n32") 3318 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3319 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 3320 "-v64:64:64-n32"; 3321 } 3322 public: 3323 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3324 // Default ABI is n64. 3325 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3326 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 3327 "v64:64:64-n32"; 3328 } 3329 virtual void getTargetDefines(const LangOptions &Opts, 3330 MacroBuilder &Builder) const { 3331 DefineStd(Builder, "mips", Opts); 3332 Builder.defineMacro("_mips"); 3333 DefineStd(Builder, "MIPSEL", Opts); 3334 Builder.defineMacro("_MIPSEL"); 3335 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3336 getArchDefines(Opts, Builder); 3337 } 3338 }; 3339 } // end anonymous namespace. 3340 3341 namespace { 3342 class PNaClTargetInfo : public TargetInfo { 3343 public: 3344 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3345 this->UserLabelPrefix = ""; 3346 this->LongAlign = 32; 3347 this->LongWidth = 32; 3348 this->PointerAlign = 32; 3349 this->PointerWidth = 32; 3350 this->IntMaxType = TargetInfo::SignedLongLong; 3351 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3352 this->Int64Type = TargetInfo::SignedLongLong; 3353 this->DoubleAlign = 64; 3354 this->LongDoubleWidth = 64; 3355 this->LongDoubleAlign = 64; 3356 this->SizeType = TargetInfo::UnsignedInt; 3357 this->PtrDiffType = TargetInfo::SignedInt; 3358 this->IntPtrType = TargetInfo::SignedInt; 3359 this->RegParmMax = 2; 3360 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3361 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3362 } 3363 3364 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3365 } 3366 virtual void getArchDefines(const LangOptions &Opts, 3367 MacroBuilder &Builder) const { 3368 Builder.defineMacro("__le32__"); 3369 Builder.defineMacro("__pnacl__"); 3370 } 3371 virtual void getTargetDefines(const LangOptions &Opts, 3372 MacroBuilder &Builder) const { 3373 DefineStd(Builder, "unix", Opts); 3374 Builder.defineMacro("__ELF__"); 3375 if (Opts.POSIXThreads) 3376 Builder.defineMacro("_REENTRANT"); 3377 if (Opts.CPlusPlus) 3378 Builder.defineMacro("_GNU_SOURCE"); 3379 3380 Builder.defineMacro("__native_client__"); 3381 getArchDefines(Opts, Builder); 3382 } 3383 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3384 unsigned &NumRecords) const { 3385 } 3386 virtual const char *getVAListDeclaration() const { 3387 return "typedef int __builtin_va_list[4];"; 3388 } 3389 virtual void getGCCRegNames(const char * const *&Names, 3390 unsigned &NumNames) const; 3391 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3392 unsigned &NumAliases) const; 3393 virtual bool validateAsmConstraint(const char *&Name, 3394 TargetInfo::ConstraintInfo &Info) const { 3395 return false; 3396 } 3397 3398 virtual const char *getClobbers() const { 3399 return ""; 3400 } 3401 }; 3402 3403 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3404 unsigned &NumNames) const { 3405 Names = NULL; 3406 NumNames = 0; 3407 } 3408 3409 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3410 unsigned &NumAliases) const { 3411 Aliases = NULL; 3412 NumAliases = 0; 3413 } 3414 } // end anonymous namespace. 3415 3416 3417 //===----------------------------------------------------------------------===// 3418 // Driver code 3419 //===----------------------------------------------------------------------===// 3420 3421 static TargetInfo *AllocateTarget(const std::string &T) { 3422 llvm::Triple Triple(T); 3423 llvm::Triple::OSType os = Triple.getOS(); 3424 3425 switch (Triple.getArch()) { 3426 default: 3427 return NULL; 3428 3429 case llvm::Triple::arm: 3430 case llvm::Triple::thumb: 3431 if (Triple.isOSDarwin()) 3432 return new DarwinARMTargetInfo(T); 3433 3434 switch (os) { 3435 case llvm::Triple::Linux: 3436 return new LinuxTargetInfo<ARMTargetInfo>(T); 3437 case llvm::Triple::FreeBSD: 3438 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3439 case llvm::Triple::NetBSD: 3440 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3441 case llvm::Triple::RTEMS: 3442 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3443 default: 3444 return new ARMTargetInfo(T); 3445 } 3446 3447 case llvm::Triple::msp430: 3448 return new MSP430TargetInfo(T); 3449 3450 case llvm::Triple::mips: 3451 switch (os) { 3452 case llvm::Triple::Linux: 3453 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3454 case llvm::Triple::RTEMS: 3455 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3456 case llvm::Triple::FreeBSD: 3457 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3458 case llvm::Triple::NetBSD: 3459 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3460 default: 3461 return new Mips32EBTargetInfo(T); 3462 } 3463 3464 case llvm::Triple::mipsel: 3465 switch (os) { 3466 case llvm::Triple::Linux: 3467 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3468 case llvm::Triple::RTEMS: 3469 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3470 case llvm::Triple::FreeBSD: 3471 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3472 case llvm::Triple::NetBSD: 3473 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3474 default: 3475 return new Mips32ELTargetInfo(T); 3476 } 3477 3478 case llvm::Triple::mips64: 3479 switch (os) { 3480 case llvm::Triple::Linux: 3481 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3482 case llvm::Triple::RTEMS: 3483 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3484 case llvm::Triple::FreeBSD: 3485 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3486 case llvm::Triple::NetBSD: 3487 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3488 default: 3489 return new Mips64EBTargetInfo(T); 3490 } 3491 3492 case llvm::Triple::mips64el: 3493 switch (os) { 3494 case llvm::Triple::Linux: 3495 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3496 case llvm::Triple::RTEMS: 3497 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3498 case llvm::Triple::FreeBSD: 3499 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3500 case llvm::Triple::NetBSD: 3501 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3502 default: 3503 return new Mips64ELTargetInfo(T); 3504 } 3505 3506 case llvm::Triple::le32: 3507 switch (os) { 3508 case llvm::Triple::NativeClient: 3509 return new PNaClTargetInfo(T); 3510 default: 3511 return NULL; 3512 } 3513 3514 case llvm::Triple::ppc: 3515 if (Triple.isOSDarwin()) 3516 return new DarwinPPC32TargetInfo(T); 3517 switch (os) { 3518 case llvm::Triple::Linux: 3519 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3520 case llvm::Triple::FreeBSD: 3521 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3522 case llvm::Triple::NetBSD: 3523 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3524 case llvm::Triple::RTEMS: 3525 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3526 default: 3527 return new PPC32TargetInfo(T); 3528 } 3529 3530 case llvm::Triple::ppc64: 3531 if (Triple.isOSDarwin()) 3532 return new DarwinPPC64TargetInfo(T); 3533 switch (os) { 3534 case llvm::Triple::Linux: 3535 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3536 case llvm::Triple::Lv2: 3537 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3538 case llvm::Triple::FreeBSD: 3539 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3540 case llvm::Triple::NetBSD: 3541 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3542 default: 3543 return new PPC64TargetInfo(T); 3544 } 3545 3546 case llvm::Triple::ptx32: 3547 return new PTX32TargetInfo(T); 3548 case llvm::Triple::ptx64: 3549 return new PTX64TargetInfo(T); 3550 3551 case llvm::Triple::mblaze: 3552 return new MBlazeTargetInfo(T); 3553 3554 case llvm::Triple::sparc: 3555 switch (os) { 3556 case llvm::Triple::Linux: 3557 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3558 case llvm::Triple::AuroraUX: 3559 return new AuroraUXSparcV8TargetInfo(T); 3560 case llvm::Triple::Solaris: 3561 return new SolarisSparcV8TargetInfo(T); 3562 case llvm::Triple::NetBSD: 3563 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3564 case llvm::Triple::RTEMS: 3565 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3566 default: 3567 return new SparcV8TargetInfo(T); 3568 } 3569 3570 // FIXME: Need a real SPU target. 3571 case llvm::Triple::cellspu: 3572 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3573 3574 case llvm::Triple::tce: 3575 return new TCETargetInfo(T); 3576 3577 case llvm::Triple::x86: 3578 if (Triple.isOSDarwin()) 3579 return new DarwinI386TargetInfo(T); 3580 3581 switch (os) { 3582 case llvm::Triple::AuroraUX: 3583 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3584 case llvm::Triple::Linux: 3585 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3586 case llvm::Triple::DragonFly: 3587 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3588 case llvm::Triple::NetBSD: 3589 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3590 case llvm::Triple::OpenBSD: 3591 return new OpenBSDI386TargetInfo(T); 3592 case llvm::Triple::FreeBSD: 3593 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3594 case llvm::Triple::Minix: 3595 return new MinixTargetInfo<X86_32TargetInfo>(T); 3596 case llvm::Triple::Solaris: 3597 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3598 case llvm::Triple::Cygwin: 3599 return new CygwinX86_32TargetInfo(T); 3600 case llvm::Triple::MinGW32: 3601 return new MinGWX86_32TargetInfo(T); 3602 case llvm::Triple::Win32: 3603 return new VisualStudioWindowsX86_32TargetInfo(T); 3604 case llvm::Triple::Haiku: 3605 return new HaikuX86_32TargetInfo(T); 3606 case llvm::Triple::RTEMS: 3607 return new RTEMSX86_32TargetInfo(T); 3608 default: 3609 return new X86_32TargetInfo(T); 3610 } 3611 3612 case llvm::Triple::x86_64: 3613 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3614 return new DarwinX86_64TargetInfo(T); 3615 3616 switch (os) { 3617 case llvm::Triple::AuroraUX: 3618 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3619 case llvm::Triple::Linux: 3620 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3621 case llvm::Triple::DragonFly: 3622 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3623 case llvm::Triple::NetBSD: 3624 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3625 case llvm::Triple::OpenBSD: 3626 return new OpenBSDX86_64TargetInfo(T); 3627 case llvm::Triple::FreeBSD: 3628 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3629 case llvm::Triple::Solaris: 3630 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3631 case llvm::Triple::MinGW32: 3632 return new MinGWX86_64TargetInfo(T); 3633 case llvm::Triple::Win32: // This is what Triple.h supports now. 3634 return new VisualStudioWindowsX86_64TargetInfo(T); 3635 default: 3636 return new X86_64TargetInfo(T); 3637 } 3638 } 3639 } 3640 3641 /// CreateTargetInfo - Return the target info object for the specified target 3642 /// triple. 3643 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3644 TargetOptions &Opts) { 3645 llvm::Triple Triple(Opts.Triple); 3646 3647 // Construct the target 3648 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3649 if (!Target) { 3650 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3651 return 0; 3652 } 3653 3654 // Set the target CPU if specified. 3655 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3656 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3657 return 0; 3658 } 3659 3660 // Set the target ABI if specified. 3661 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3662 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3663 return 0; 3664 } 3665 3666 // Set the target C++ ABI. 3667 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3668 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3669 return 0; 3670 } 3671 3672 // Compute the default target features, we need the target to handle this 3673 // because features may have dependencies on one another. 3674 llvm::StringMap<bool> Features; 3675 Target->getDefaultFeatures(Features); 3676 3677 // Apply the user specified deltas. 3678 // First the enables. 3679 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3680 ie = Opts.Features.end(); it != ie; ++it) { 3681 const char *Name = it->c_str(); 3682 3683 if (Name[0] != '+') 3684 continue; 3685 3686 // Apply the feature via the target. 3687 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 3688 Diags.Report(diag::err_target_invalid_feature) << Name; 3689 return 0; 3690 } 3691 } 3692 3693 // Then the disables. 3694 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3695 ie = Opts.Features.end(); it != ie; ++it) { 3696 const char *Name = it->c_str(); 3697 3698 if (Name[0] == '+') 3699 continue; 3700 3701 // Apply the feature via the target. 3702 if (Name[0] != '-' || 3703 !Target->setFeatureEnabled(Features, Name + 1, false)) { 3704 Diags.Report(diag::err_target_invalid_feature) << Name; 3705 return 0; 3706 } 3707 } 3708 3709 // Add the features to the compile options. 3710 // 3711 // FIXME: If we are completely confident that we have the right set, we only 3712 // need to pass the minuses. 3713 Opts.Features.clear(); 3714 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3715 ie = Features.end(); it != ie; ++it) 3716 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3717 it->first().str()); 3718 Target->HandleTargetFeatures(Opts.Features); 3719 3720 return Target.take(); 3721 } 3722