1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, 58 bool Tuning = true) { 59 Builder.defineMacro("__" + CPUName); 60 Builder.defineMacro("__" + CPUName + "__"); 61 if (Tuning) 62 Builder.defineMacro("__tune_" + CPUName + "__"); 63 } 64 65 //===----------------------------------------------------------------------===// 66 // Defines specific to certain operating systems. 67 //===----------------------------------------------------------------------===// 68 69 namespace { 70 template<typename TgtInfo> 71 class OSTargetInfo : public TgtInfo { 72 protected: 73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 74 MacroBuilder &Builder) const=0; 75 public: 76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 77 virtual void getTargetDefines(const LangOptions &Opts, 78 MacroBuilder &Builder) const { 79 TgtInfo::getTargetDefines(Opts, Builder); 80 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 81 } 82 83 }; 84 } // end anonymous namespace 85 86 87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 88 const llvm::Triple &Triple, 89 StringRef &PlatformName, 90 VersionTuple &PlatformMinVersion) { 91 Builder.defineMacro("__APPLE_CC__", "5621"); 92 Builder.defineMacro("__APPLE__"); 93 Builder.defineMacro("__MACH__"); 94 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 95 96 if (!Opts.ObjCAutoRefCount) { 97 // __weak is always defined, for use in blocks and with objc pointers. 98 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 99 100 // Darwin defines __strong even in C mode (just to nothing). 101 if (Opts.getGC() != LangOptions::NonGC) 102 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 103 else 104 Builder.defineMacro("__strong", ""); 105 106 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 107 // allow this in C, since one might have block pointers in structs that 108 // are used in pure C code and in Objective-C ARC. 109 Builder.defineMacro("__unsafe_unretained", ""); 110 } 111 112 if (Opts.Static) 113 Builder.defineMacro("__STATIC__"); 114 else 115 Builder.defineMacro("__DYNAMIC__"); 116 117 if (Opts.POSIXThreads) 118 Builder.defineMacro("_REENTRANT"); 119 120 // Get the platform type and version number from the triple. 121 unsigned Maj, Min, Rev; 122 if (Triple.isMacOSX()) { 123 Triple.getMacOSXVersion(Maj, Min, Rev); 124 PlatformName = "macosx"; 125 } else { 126 Triple.getOSVersion(Maj, Min, Rev); 127 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 128 } 129 130 // If -target arch-pc-win32-macho option specified, we're 131 // generating code for Win32 ABI. No need to emit 132 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 133 if (PlatformName == "win32") { 134 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 135 return; 136 } 137 138 // Set the appropriate OS version define. 139 if (Triple.getOS() == llvm::Triple::IOS) { 140 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 141 char Str[6]; 142 Str[0] = '0' + Maj; 143 Str[1] = '0' + (Min / 10); 144 Str[2] = '0' + (Min % 10); 145 Str[3] = '0' + (Rev / 10); 146 Str[4] = '0' + (Rev % 10); 147 Str[5] = '\0'; 148 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 149 } else { 150 // Note that the Driver allows versions which aren't representable in the 151 // define (because we only get a single digit for the minor and micro 152 // revision numbers). So, we limit them to the maximum representable 153 // version. 154 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 155 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 156 char Str[5]; 157 Str[0] = '0' + (Maj / 10); 158 Str[1] = '0' + (Maj % 10); 159 Str[2] = '0' + std::min(Min, 9U); 160 Str[3] = '0' + std::min(Rev, 9U); 161 Str[4] = '\0'; 162 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 163 } 164 165 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 166 } 167 168 namespace { 169 template<typename Target> 170 class DarwinTargetInfo : public OSTargetInfo<Target> { 171 protected: 172 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 173 MacroBuilder &Builder) const { 174 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 175 this->PlatformMinVersion); 176 } 177 178 public: 179 DarwinTargetInfo(const std::string& triple) : 180 OSTargetInfo<Target>(triple) { 181 llvm::Triple T = llvm::Triple(triple); 182 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 183 this->MCountName = "\01mcount"; 184 } 185 186 virtual std::string isValidSectionSpecifier(StringRef SR) const { 187 // Let MCSectionMachO validate this. 188 StringRef Segment, Section; 189 unsigned TAA, StubSize; 190 bool HasTAA; 191 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 192 TAA, HasTAA, StubSize); 193 } 194 195 virtual const char *getStaticInitSectionSpecifier() const { 196 // FIXME: We should return 0 when building kexts. 197 return "__TEXT,__StaticInit,regular,pure_instructions"; 198 } 199 200 /// Darwin does not support protected visibility. Darwin's "default" 201 /// is very similar to ELF's "protected"; Darwin requires a "weak" 202 /// attribute on declarations that can be dynamically replaced. 203 virtual bool hasProtectedVisibility() const { 204 return false; 205 } 206 }; 207 208 209 // DragonFlyBSD Target 210 template<typename Target> 211 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 212 protected: 213 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 214 MacroBuilder &Builder) const { 215 // DragonFly defines; list based off of gcc output 216 Builder.defineMacro("__DragonFly__"); 217 Builder.defineMacro("__DragonFly_cc_version", "100001"); 218 Builder.defineMacro("__ELF__"); 219 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 220 Builder.defineMacro("__tune_i386__"); 221 DefineStd(Builder, "unix", Opts); 222 } 223 public: 224 DragonFlyBSDTargetInfo(const std::string &triple) 225 : OSTargetInfo<Target>(triple) { 226 this->UserLabelPrefix = ""; 227 228 llvm::Triple Triple(triple); 229 switch (Triple.getArch()) { 230 default: 231 case llvm::Triple::x86: 232 case llvm::Triple::x86_64: 233 this->MCountName = ".mcount"; 234 break; 235 } 236 } 237 }; 238 239 // FreeBSD Target 240 template<typename Target> 241 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 242 protected: 243 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const { 245 // FreeBSD defines; list based off of gcc output 246 247 unsigned Release = Triple.getOSMajorVersion(); 248 if (Release == 0U) 249 Release = 8; 250 251 Builder.defineMacro("__FreeBSD__", Twine(Release)); 252 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 253 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 254 DefineStd(Builder, "unix", Opts); 255 Builder.defineMacro("__ELF__"); 256 } 257 public: 258 FreeBSDTargetInfo(const std::string &triple) 259 : OSTargetInfo<Target>(triple) { 260 this->UserLabelPrefix = ""; 261 262 llvm::Triple Triple(triple); 263 switch (Triple.getArch()) { 264 default: 265 case llvm::Triple::x86: 266 case llvm::Triple::x86_64: 267 this->MCountName = ".mcount"; 268 break; 269 case llvm::Triple::mips: 270 case llvm::Triple::mipsel: 271 case llvm::Triple::ppc: 272 case llvm::Triple::ppc64: 273 this->MCountName = "_mcount"; 274 break; 275 case llvm::Triple::arm: 276 this->MCountName = "__mcount"; 277 break; 278 } 279 280 } 281 }; 282 283 // Minix Target 284 template<typename Target> 285 class MinixTargetInfo : public OSTargetInfo<Target> { 286 protected: 287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 288 MacroBuilder &Builder) const { 289 // Minix defines 290 291 Builder.defineMacro("__minix", "3"); 292 Builder.defineMacro("_EM_WSIZE", "4"); 293 Builder.defineMacro("_EM_PSIZE", "4"); 294 Builder.defineMacro("_EM_SSIZE", "2"); 295 Builder.defineMacro("_EM_LSIZE", "4"); 296 Builder.defineMacro("_EM_FSIZE", "4"); 297 Builder.defineMacro("_EM_DSIZE", "8"); 298 Builder.defineMacro("__ELF__"); 299 DefineStd(Builder, "unix", Opts); 300 } 301 public: 302 MinixTargetInfo(const std::string &triple) 303 : OSTargetInfo<Target>(triple) { 304 this->UserLabelPrefix = ""; 305 } 306 }; 307 308 // Linux target 309 template<typename Target> 310 class LinuxTargetInfo : public OSTargetInfo<Target> { 311 protected: 312 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 313 MacroBuilder &Builder) const { 314 // Linux defines; list based off of gcc output 315 DefineStd(Builder, "unix", Opts); 316 DefineStd(Builder, "linux", Opts); 317 Builder.defineMacro("__gnu_linux__"); 318 Builder.defineMacro("__ELF__"); 319 if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI) 320 Builder.defineMacro("__ANDROID__", "1"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326 public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336 }; 337 338 // NetBSD Target 339 template<typename Target> 340 class NetBSDTargetInfo : public OSTargetInfo<Target> { 341 protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351 public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356 }; 357 358 // OpenBSD Target 359 template<typename Target> 360 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361 protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_REENTRANT"); 371 } 372 public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) { 375 this->UserLabelPrefix = ""; 376 this->TLSSupported = false; 377 378 llvm::Triple Triple(triple); 379 switch (Triple.getArch()) { 380 default: 381 case llvm::Triple::x86: 382 case llvm::Triple::x86_64: 383 case llvm::Triple::arm: 384 case llvm::Triple::sparc: 385 this->MCountName = "__mcount"; 386 break; 387 case llvm::Triple::mips64: 388 case llvm::Triple::mips64el: 389 case llvm::Triple::ppc: 390 case llvm::Triple::sparcv9: 391 this->MCountName = "_mcount"; 392 break; 393 } 394 } 395 }; 396 397 // Bitrig Target 398 template<typename Target> 399 class BitrigTargetInfo : public OSTargetInfo<Target> { 400 protected: 401 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 402 MacroBuilder &Builder) const { 403 // Bitrig defines; list based off of gcc output 404 405 Builder.defineMacro("__Bitrig__"); 406 DefineStd(Builder, "unix", Opts); 407 Builder.defineMacro("__ELF__"); 408 if (Opts.POSIXThreads) 409 Builder.defineMacro("_REENTRANT"); 410 } 411 public: 412 BitrigTargetInfo(const std::string &triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->TLSSupported = false; 416 this->MCountName = "__mcount"; 417 } 418 }; 419 420 // PSP Target 421 template<typename Target> 422 class PSPTargetInfo : public OSTargetInfo<Target> { 423 protected: 424 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 425 MacroBuilder &Builder) const { 426 // PSP defines; list based on the output of the pspdev gcc toolchain. 427 Builder.defineMacro("PSP"); 428 Builder.defineMacro("_PSP"); 429 Builder.defineMacro("__psp__"); 430 Builder.defineMacro("__ELF__"); 431 } 432 public: 433 PSPTargetInfo(const std::string& triple) 434 : OSTargetInfo<Target>(triple) { 435 this->UserLabelPrefix = ""; 436 } 437 }; 438 439 // PS3 PPU Target 440 template<typename Target> 441 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 442 protected: 443 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 444 MacroBuilder &Builder) const { 445 // PS3 PPU defines. 446 Builder.defineMacro("__PPC__"); 447 Builder.defineMacro("__PPU__"); 448 Builder.defineMacro("__CELLOS_LV2__"); 449 Builder.defineMacro("__ELF__"); 450 Builder.defineMacro("__LP32__"); 451 Builder.defineMacro("_ARCH_PPC64"); 452 Builder.defineMacro("__powerpc64__"); 453 } 454 public: 455 PS3PPUTargetInfo(const std::string& triple) 456 : OSTargetInfo<Target>(triple) { 457 this->UserLabelPrefix = ""; 458 this->LongWidth = this->LongAlign = 32; 459 this->PointerWidth = this->PointerAlign = 32; 460 this->IntMaxType = TargetInfo::SignedLongLong; 461 this->UIntMaxType = TargetInfo::UnsignedLongLong; 462 this->Int64Type = TargetInfo::SignedLongLong; 463 this->SizeType = TargetInfo::UnsignedInt; 464 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 465 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 466 } 467 }; 468 469 // FIXME: Need a real SPU target. 470 // PS3 SPU Target 471 template<typename Target> 472 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 473 protected: 474 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 475 MacroBuilder &Builder) const { 476 // PS3 PPU defines. 477 Builder.defineMacro("__SPU__"); 478 Builder.defineMacro("__ELF__"); 479 } 480 public: 481 PS3SPUTargetInfo(const std::string& triple) 482 : OSTargetInfo<Target>(triple) { 483 this->UserLabelPrefix = ""; 484 } 485 }; 486 487 // AuroraUX target 488 template<typename Target> 489 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 490 protected: 491 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 492 MacroBuilder &Builder) const { 493 DefineStd(Builder, "sun", Opts); 494 DefineStd(Builder, "unix", Opts); 495 Builder.defineMacro("__ELF__"); 496 Builder.defineMacro("__svr4__"); 497 Builder.defineMacro("__SVR4"); 498 } 499 public: 500 AuroraUXTargetInfo(const std::string& triple) 501 : OSTargetInfo<Target>(triple) { 502 this->UserLabelPrefix = ""; 503 this->WCharType = this->SignedLong; 504 // FIXME: WIntType should be SignedLong 505 } 506 }; 507 508 // Solaris target 509 template<typename Target> 510 class SolarisTargetInfo : public OSTargetInfo<Target> { 511 protected: 512 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 513 MacroBuilder &Builder) const { 514 DefineStd(Builder, "sun", Opts); 515 DefineStd(Builder, "unix", Opts); 516 Builder.defineMacro("__ELF__"); 517 Builder.defineMacro("__svr4__"); 518 Builder.defineMacro("__SVR4"); 519 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and 520 // newer, but to 500 for everything else. feature_test.h has a check to 521 // ensure that you are not using C99 with an old version of X/Open or C89 522 // with a new version. 523 if (Opts.C99 || Opts.C11) 524 Builder.defineMacro("_XOPEN_SOURCE", "600"); 525 else 526 Builder.defineMacro("_XOPEN_SOURCE", "500"); 527 if (Opts.CPlusPlus) 528 Builder.defineMacro("__C99FEATURES__"); 529 Builder.defineMacro("_LARGEFILE_SOURCE"); 530 Builder.defineMacro("_LARGEFILE64_SOURCE"); 531 Builder.defineMacro("__EXTENSIONS__"); 532 Builder.defineMacro("_REENTRANT"); 533 } 534 public: 535 SolarisTargetInfo(const std::string& triple) 536 : OSTargetInfo<Target>(triple) { 537 this->UserLabelPrefix = ""; 538 this->WCharType = this->SignedInt; 539 // FIXME: WIntType should be SignedLong 540 } 541 }; 542 543 // Windows target 544 template<typename Target> 545 class WindowsTargetInfo : public OSTargetInfo<Target> { 546 protected: 547 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 548 MacroBuilder &Builder) const { 549 Builder.defineMacro("_WIN32"); 550 } 551 void getVisualStudioDefines(const LangOptions &Opts, 552 MacroBuilder &Builder) const { 553 if (Opts.CPlusPlus) { 554 if (Opts.RTTI) 555 Builder.defineMacro("_CPPRTTI"); 556 557 if (Opts.Exceptions) 558 Builder.defineMacro("_CPPUNWIND"); 559 } 560 561 if (!Opts.CharIsSigned) 562 Builder.defineMacro("_CHAR_UNSIGNED"); 563 564 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 565 // but it works for now. 566 if (Opts.POSIXThreads) 567 Builder.defineMacro("_MT"); 568 569 if (Opts.MSCVersion != 0) 570 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 571 572 if (Opts.MicrosoftExt) { 573 Builder.defineMacro("_MSC_EXTENSIONS"); 574 575 if (Opts.CPlusPlus0x) { 576 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 577 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 578 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 579 } 580 } 581 582 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 583 } 584 585 public: 586 WindowsTargetInfo(const std::string &triple) 587 : OSTargetInfo<Target>(triple) {} 588 }; 589 590 } // end anonymous namespace. 591 592 //===----------------------------------------------------------------------===// 593 // Specific target implementations. 594 //===----------------------------------------------------------------------===// 595 596 namespace { 597 // PPC abstract base class 598 class PPCTargetInfo : public TargetInfo { 599 static const Builtin::Info BuiltinInfo[]; 600 static const char * const GCCRegNames[]; 601 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 602 std::string CPU; 603 public: 604 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) { 605 LongDoubleWidth = LongDoubleAlign = 128; 606 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble; 607 } 608 609 /// \brief Flags for architecture specific defines. 610 typedef enum { 611 ArchDefineNone = 0, 612 ArchDefineName = 1 << 0, // <name> is substituted for arch name. 613 ArchDefinePpcgr = 1 << 1, 614 ArchDefinePpcsq = 1 << 2, 615 ArchDefine440 = 1 << 3, 616 ArchDefine603 = 1 << 4, 617 ArchDefine604 = 1 << 5, 618 ArchDefinePwr4 = 1 << 6, 619 ArchDefinePwr6 = 1 << 7 620 } ArchDefineTypes; 621 622 virtual bool setCPU(const std::string &Name) { 623 bool CPUKnown = llvm::StringSwitch<bool>(Name) 624 .Case("generic", true) 625 .Case("440", true) 626 .Case("450", true) 627 .Case("601", true) 628 .Case("602", true) 629 .Case("603", true) 630 .Case("603e", true) 631 .Case("603ev", true) 632 .Case("604", true) 633 .Case("604e", true) 634 .Case("620", true) 635 .Case("g3", true) 636 .Case("7400", true) 637 .Case("g4", true) 638 .Case("7450", true) 639 .Case("g4+", true) 640 .Case("750", true) 641 .Case("970", true) 642 .Case("g5", true) 643 .Case("a2", true) 644 .Case("pwr6", true) 645 .Case("pwr7", true) 646 .Case("ppc", true) 647 .Case("ppc64", true) 648 .Default(false); 649 650 if (CPUKnown) 651 CPU = Name; 652 653 return CPUKnown; 654 } 655 656 virtual void getTargetBuiltins(const Builtin::Info *&Records, 657 unsigned &NumRecords) const { 658 Records = BuiltinInfo; 659 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 660 } 661 662 virtual bool isCLZForZeroUndef() const { return false; } 663 664 virtual void getTargetDefines(const LangOptions &Opts, 665 MacroBuilder &Builder) const; 666 667 virtual bool hasFeature(StringRef Feature) const; 668 669 virtual void getGCCRegNames(const char * const *&Names, 670 unsigned &NumNames) const; 671 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 672 unsigned &NumAliases) const; 673 virtual bool validateAsmConstraint(const char *&Name, 674 TargetInfo::ConstraintInfo &Info) const { 675 switch (*Name) { 676 default: return false; 677 case 'O': // Zero 678 break; 679 case 'b': // Base register 680 case 'f': // Floating point register 681 Info.setAllowsRegister(); 682 break; 683 // FIXME: The following are added to allow parsing. 684 // I just took a guess at what the actions should be. 685 // Also, is more specific checking needed? I.e. specific registers? 686 case 'd': // Floating point register (containing 64-bit value) 687 case 'v': // Altivec vector register 688 Info.setAllowsRegister(); 689 break; 690 case 'w': 691 switch (Name[1]) { 692 case 'd':// VSX vector register to hold vector double data 693 case 'f':// VSX vector register to hold vector float data 694 case 's':// VSX vector register to hold scalar float data 695 case 'a':// Any VSX register 696 break; 697 default: 698 return false; 699 } 700 Info.setAllowsRegister(); 701 Name++; // Skip over 'w'. 702 break; 703 case 'h': // `MQ', `CTR', or `LINK' register 704 case 'q': // `MQ' register 705 case 'c': // `CTR' register 706 case 'l': // `LINK' register 707 case 'x': // `CR' register (condition register) number 0 708 case 'y': // `CR' register (condition register) 709 case 'z': // `XER[CA]' carry bit (part of the XER register) 710 Info.setAllowsRegister(); 711 break; 712 case 'I': // Signed 16-bit constant 713 case 'J': // Unsigned 16-bit constant shifted left 16 bits 714 // (use `L' instead for SImode constants) 715 case 'K': // Unsigned 16-bit constant 716 case 'L': // Signed 16-bit constant shifted left 16 bits 717 case 'M': // Constant larger than 31 718 case 'N': // Exact power of 2 719 case 'P': // Constant whose negation is a signed 16-bit constant 720 case 'G': // Floating point constant that can be loaded into a 721 // register with one instruction per word 722 case 'H': // Integer/Floating point constant that can be loaded 723 // into a register using three instructions 724 break; 725 case 'm': // Memory operand. Note that on PowerPC targets, m can 726 // include addresses that update the base register. It 727 // is therefore only safe to use `m' in an asm statement 728 // if that asm statement accesses the operand exactly once. 729 // The asm statement must also use `%U<opno>' as a 730 // placeholder for the "update" flag in the corresponding 731 // load or store instruction. For example: 732 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 733 // is correct but: 734 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 735 // is not. Use es rather than m if you don't want the base 736 // register to be updated. 737 case 'e': 738 if (Name[1] != 's') 739 return false; 740 // es: A "stable" memory operand; that is, one which does not 741 // include any automodification of the base register. Unlike 742 // `m', this constraint can be used in asm statements that 743 // might access the operand several times, or that might not 744 // access it at all. 745 Info.setAllowsMemory(); 746 Name++; // Skip over 'e'. 747 break; 748 case 'Q': // Memory operand that is an offset from a register (it is 749 // usually better to use `m' or `es' in asm statements) 750 case 'Z': // Memory operand that is an indexed or indirect from a 751 // register (it is usually better to use `m' or `es' in 752 // asm statements) 753 Info.setAllowsMemory(); 754 Info.setAllowsRegister(); 755 break; 756 case 'R': // AIX TOC entry 757 case 'a': // Address operand that is an indexed or indirect from a 758 // register (`p' is preferable for asm statements) 759 case 'S': // Constant suitable as a 64-bit mask operand 760 case 'T': // Constant suitable as a 32-bit mask operand 761 case 'U': // System V Release 4 small data area reference 762 case 't': // AND masks that can be performed by two rldic{l, r} 763 // instructions 764 case 'W': // Vector constant that does not require memory 765 case 'j': // Vector constant that is all zeros. 766 break; 767 // End FIXME. 768 } 769 return true; 770 } 771 virtual const char *getClobbers() const { 772 return ""; 773 } 774 }; 775 776 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 777 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 778 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 779 ALL_LANGUAGES }, 780 #include "clang/Basic/BuiltinsPPC.def" 781 }; 782 783 784 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 785 /// #defines that are not tied to a specific subtarget. 786 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 787 MacroBuilder &Builder) const { 788 // Target identification. 789 Builder.defineMacro("__ppc__"); 790 Builder.defineMacro("_ARCH_PPC"); 791 Builder.defineMacro("__powerpc__"); 792 Builder.defineMacro("__POWERPC__"); 793 if (PointerWidth == 64) { 794 Builder.defineMacro("_ARCH_PPC64"); 795 Builder.defineMacro("__powerpc64__"); 796 Builder.defineMacro("__ppc64__"); 797 } else { 798 Builder.defineMacro("__ppc__"); 799 } 800 801 // Target properties. 802 if (getTriple().getOS() != llvm::Triple::NetBSD && 803 getTriple().getOS() != llvm::Triple::OpenBSD) 804 Builder.defineMacro("_BIG_ENDIAN"); 805 Builder.defineMacro("__BIG_ENDIAN__"); 806 807 // Subtarget options. 808 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 809 Builder.defineMacro("__REGISTER_PREFIX__", ""); 810 811 // FIXME: Should be controlled by command line option. 812 Builder.defineMacro("__LONG_DOUBLE_128__"); 813 814 if (Opts.AltiVec) { 815 Builder.defineMacro("__VEC__", "10206"); 816 Builder.defineMacro("__ALTIVEC__"); 817 } 818 819 // CPU identification. 820 ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU) 821 .Case("440", ArchDefineName) 822 .Case("450", ArchDefineName | ArchDefine440) 823 .Case("601", ArchDefineName) 824 .Case("602", ArchDefineName | ArchDefinePpcgr) 825 .Case("603", ArchDefineName | ArchDefinePpcgr) 826 .Case("603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr) 827 .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr) 828 .Case("604", ArchDefineName | ArchDefinePpcgr) 829 .Case("604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr) 830 .Case("620", ArchDefineName | ArchDefinePpcgr) 831 .Case("7400", ArchDefineName | ArchDefinePpcgr) 832 .Case("7450", ArchDefineName | ArchDefinePpcgr) 833 .Case("750", ArchDefineName | ArchDefinePpcgr) 834 .Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr 835 | ArchDefinePpcsq) 836 .Case("pwr6", ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq) 837 .Case("pwr7", ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr 838 | ArchDefinePpcsq) 839 .Default(ArchDefineNone); 840 841 if (defs & ArchDefineName) 842 Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper())); 843 if (defs & ArchDefinePpcgr) 844 Builder.defineMacro("_ARCH_PPCGR"); 845 if (defs & ArchDefinePpcsq) 846 Builder.defineMacro("_ARCH_PPCSQ"); 847 if (defs & ArchDefine440) 848 Builder.defineMacro("_ARCH_440"); 849 if (defs & ArchDefine603) 850 Builder.defineMacro("_ARCH_603"); 851 if (defs & ArchDefine604) 852 Builder.defineMacro("_ARCH_604"); 853 if (defs & (ArchDefinePwr4 | ArchDefinePwr6)) 854 Builder.defineMacro("_ARCH_PWR4"); 855 if (defs & ArchDefinePwr6) { 856 Builder.defineMacro("_ARCH_PWR5"); 857 Builder.defineMacro("_ARCH_PWR6"); 858 } 859 } 860 861 bool PPCTargetInfo::hasFeature(StringRef Feature) const { 862 return Feature == "powerpc"; 863 } 864 865 866 const char * const PPCTargetInfo::GCCRegNames[] = { 867 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 868 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 869 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 870 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 871 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 872 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 873 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 874 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 875 "mq", "lr", "ctr", "ap", 876 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 877 "xer", 878 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 879 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 880 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 881 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 882 "vrsave", "vscr", 883 "spe_acc", "spefscr", 884 "sfp" 885 }; 886 887 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 888 unsigned &NumNames) const { 889 Names = GCCRegNames; 890 NumNames = llvm::array_lengthof(GCCRegNames); 891 } 892 893 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 894 // While some of these aliases do map to different registers 895 // they still share the same register name. 896 { { "0" }, "r0" }, 897 { { "1"}, "r1" }, 898 { { "2" }, "r2" }, 899 { { "3" }, "r3" }, 900 { { "4" }, "r4" }, 901 { { "5" }, "r5" }, 902 { { "6" }, "r6" }, 903 { { "7" }, "r7" }, 904 { { "8" }, "r8" }, 905 { { "9" }, "r9" }, 906 { { "10" }, "r10" }, 907 { { "11" }, "r11" }, 908 { { "12" }, "r12" }, 909 { { "13" }, "r13" }, 910 { { "14" }, "r14" }, 911 { { "15" }, "r15" }, 912 { { "16" }, "r16" }, 913 { { "17" }, "r17" }, 914 { { "18" }, "r18" }, 915 { { "19" }, "r19" }, 916 { { "20" }, "r20" }, 917 { { "21" }, "r21" }, 918 { { "22" }, "r22" }, 919 { { "23" }, "r23" }, 920 { { "24" }, "r24" }, 921 { { "25" }, "r25" }, 922 { { "26" }, "r26" }, 923 { { "27" }, "r27" }, 924 { { "28" }, "r28" }, 925 { { "29" }, "r29" }, 926 { { "30" }, "r30" }, 927 { { "31" }, "r31" }, 928 { { "fr0" }, "f0" }, 929 { { "fr1" }, "f1" }, 930 { { "fr2" }, "f2" }, 931 { { "fr3" }, "f3" }, 932 { { "fr4" }, "f4" }, 933 { { "fr5" }, "f5" }, 934 { { "fr6" }, "f6" }, 935 { { "fr7" }, "f7" }, 936 { { "fr8" }, "f8" }, 937 { { "fr9" }, "f9" }, 938 { { "fr10" }, "f10" }, 939 { { "fr11" }, "f11" }, 940 { { "fr12" }, "f12" }, 941 { { "fr13" }, "f13" }, 942 { { "fr14" }, "f14" }, 943 { { "fr15" }, "f15" }, 944 { { "fr16" }, "f16" }, 945 { { "fr17" }, "f17" }, 946 { { "fr18" }, "f18" }, 947 { { "fr19" }, "f19" }, 948 { { "fr20" }, "f20" }, 949 { { "fr21" }, "f21" }, 950 { { "fr22" }, "f22" }, 951 { { "fr23" }, "f23" }, 952 { { "fr24" }, "f24" }, 953 { { "fr25" }, "f25" }, 954 { { "fr26" }, "f26" }, 955 { { "fr27" }, "f27" }, 956 { { "fr28" }, "f28" }, 957 { { "fr29" }, "f29" }, 958 { { "fr30" }, "f30" }, 959 { { "fr31" }, "f31" }, 960 { { "cc" }, "cr0" }, 961 }; 962 963 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 964 unsigned &NumAliases) const { 965 Aliases = GCCRegAliases; 966 NumAliases = llvm::array_lengthof(GCCRegAliases); 967 } 968 } // end anonymous namespace. 969 970 namespace { 971 class PPC32TargetInfo : public PPCTargetInfo { 972 public: 973 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 974 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 975 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 976 977 switch (getTriple().getOS()) { 978 case llvm::Triple::Linux: 979 case llvm::Triple::FreeBSD: 980 case llvm::Triple::NetBSD: 981 SizeType = UnsignedInt; 982 PtrDiffType = SignedInt; 983 IntPtrType = SignedInt; 984 break; 985 default: 986 break; 987 } 988 989 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 990 LongDoubleWidth = LongDoubleAlign = 64; 991 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 992 } 993 } 994 995 virtual BuiltinVaListKind getBuiltinVaListKind() const { 996 // This is the ELF definition, and is overridden by the Darwin sub-target 997 return TargetInfo::PowerABIBuiltinVaList; 998 } 999 }; 1000 } // end anonymous namespace. 1001 1002 namespace { 1003 class PPC64TargetInfo : public PPCTargetInfo { 1004 public: 1005 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 1006 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 1007 IntMaxType = SignedLong; 1008 UIntMaxType = UnsignedLong; 1009 Int64Type = SignedLong; 1010 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1011 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 1012 1013 if (getTriple().getOS() == llvm::Triple::FreeBSD) { 1014 LongDoubleWidth = LongDoubleAlign = 64; 1015 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 1016 } 1017 } 1018 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1019 return TargetInfo::CharPtrBuiltinVaList; 1020 } 1021 }; 1022 } // end anonymous namespace. 1023 1024 1025 namespace { 1026 class DarwinPPC32TargetInfo : 1027 public DarwinTargetInfo<PPC32TargetInfo> { 1028 public: 1029 DarwinPPC32TargetInfo(const std::string& triple) 1030 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 1031 HasAlignMac68kSupport = true; 1032 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 1033 LongLongAlign = 32; 1034 SuitableAlign = 128; 1035 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1036 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32"; 1037 } 1038 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1039 return TargetInfo::CharPtrBuiltinVaList; 1040 } 1041 }; 1042 1043 class DarwinPPC64TargetInfo : 1044 public DarwinTargetInfo<PPC64TargetInfo> { 1045 public: 1046 DarwinPPC64TargetInfo(const std::string& triple) 1047 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 1048 HasAlignMac68kSupport = true; 1049 SuitableAlign = 128; 1050 } 1051 }; 1052 } // end anonymous namespace. 1053 1054 namespace { 1055 static const unsigned NVPTXAddrSpaceMap[] = { 1056 1, // opencl_global 1057 3, // opencl_local 1058 4, // opencl_constant 1059 1, // cuda_device 1060 4, // cuda_constant 1061 3, // cuda_shared 1062 }; 1063 class NVPTXTargetInfo : public TargetInfo { 1064 static const char * const GCCRegNames[]; 1065 static const Builtin::Info BuiltinInfo[]; 1066 std::vector<llvm::StringRef> AvailableFeatures; 1067 public: 1068 NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 1069 BigEndian = false; 1070 TLSSupported = false; 1071 LongWidth = LongAlign = 64; 1072 AddrSpaceMap = &NVPTXAddrSpaceMap; 1073 // Define available target features 1074 // These must be defined in sorted order! 1075 NoAsmVariants = true; 1076 } 1077 virtual void getTargetDefines(const LangOptions &Opts, 1078 MacroBuilder &Builder) const { 1079 Builder.defineMacro("__PTX__"); 1080 Builder.defineMacro("__NVPTX__"); 1081 } 1082 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1083 unsigned &NumRecords) const { 1084 Records = BuiltinInfo; 1085 NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 1086 } 1087 virtual bool hasFeature(StringRef Feature) const { 1088 return Feature == "ptx" || Feature == "nvptx"; 1089 } 1090 1091 virtual void getGCCRegNames(const char * const *&Names, 1092 unsigned &NumNames) const; 1093 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1094 unsigned &NumAliases) const { 1095 // No aliases. 1096 Aliases = 0; 1097 NumAliases = 0; 1098 } 1099 virtual bool validateAsmConstraint(const char *&Name, 1100 TargetInfo::ConstraintInfo &info) const { 1101 // FIXME: implement 1102 return true; 1103 } 1104 virtual const char *getClobbers() const { 1105 // FIXME: Is this really right? 1106 return ""; 1107 } 1108 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1109 // FIXME: implement 1110 return TargetInfo::CharPtrBuiltinVaList; 1111 } 1112 virtual bool setCPU(const std::string &Name) { 1113 return Name == "sm_10" || Name == "sm_13" || Name == "sm_20"; 1114 } 1115 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1116 StringRef Name, 1117 bool Enabled) const; 1118 }; 1119 1120 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = { 1121 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1122 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1123 ALL_LANGUAGES }, 1124 #include "clang/Basic/BuiltinsNVPTX.def" 1125 }; 1126 1127 const char * const NVPTXTargetInfo::GCCRegNames[] = { 1128 "r0" 1129 }; 1130 1131 void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names, 1132 unsigned &NumNames) const { 1133 Names = GCCRegNames; 1134 NumNames = llvm::array_lengthof(GCCRegNames); 1135 } 1136 1137 bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1138 StringRef Name, 1139 bool Enabled) const { 1140 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 1141 Name)) { 1142 Features[Name] = Enabled; 1143 return true; 1144 } else { 1145 return false; 1146 } 1147 } 1148 1149 class NVPTX32TargetInfo : public NVPTXTargetInfo { 1150 public: 1151 NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1152 PointerWidth = PointerAlign = 32; 1153 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 1154 DescriptionString 1155 = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1156 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1157 "n16:32:64"; 1158 } 1159 }; 1160 1161 class NVPTX64TargetInfo : public NVPTXTargetInfo { 1162 public: 1163 NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) { 1164 PointerWidth = PointerAlign = 64; 1165 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1166 DescriptionString 1167 = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 1168 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-" 1169 "n16:32:64"; 1170 } 1171 }; 1172 } 1173 1174 namespace { 1175 // MBlaze abstract base class 1176 class MBlazeTargetInfo : public TargetInfo { 1177 static const char * const GCCRegNames[]; 1178 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1179 1180 public: 1181 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1182 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1183 } 1184 1185 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1186 unsigned &NumRecords) const { 1187 // FIXME: Implement. 1188 Records = 0; 1189 NumRecords = 0; 1190 } 1191 1192 virtual void getTargetDefines(const LangOptions &Opts, 1193 MacroBuilder &Builder) const; 1194 1195 virtual bool hasFeature(StringRef Feature) const { 1196 return Feature == "mblaze"; 1197 } 1198 1199 virtual BuiltinVaListKind getBuiltinVaListKind() const { 1200 return TargetInfo::CharPtrBuiltinVaList; 1201 } 1202 virtual const char *getTargetPrefix() const { 1203 return "mblaze"; 1204 } 1205 virtual void getGCCRegNames(const char * const *&Names, 1206 unsigned &NumNames) const; 1207 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1208 unsigned &NumAliases) const; 1209 virtual bool validateAsmConstraint(const char *&Name, 1210 TargetInfo::ConstraintInfo &Info) const { 1211 switch (*Name) { 1212 default: return false; 1213 case 'O': // Zero 1214 return true; 1215 case 'b': // Base register 1216 case 'f': // Floating point register 1217 Info.setAllowsRegister(); 1218 return true; 1219 } 1220 } 1221 virtual const char *getClobbers() const { 1222 return ""; 1223 } 1224 }; 1225 1226 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1227 /// #defines that are not tied to a specific subtarget. 1228 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1229 MacroBuilder &Builder) const { 1230 // Target identification. 1231 Builder.defineMacro("__microblaze__"); 1232 Builder.defineMacro("_ARCH_MICROBLAZE"); 1233 Builder.defineMacro("__MICROBLAZE__"); 1234 1235 // Target properties. 1236 Builder.defineMacro("_BIG_ENDIAN"); 1237 Builder.defineMacro("__BIG_ENDIAN__"); 1238 1239 // Subtarget options. 1240 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1241 } 1242 1243 1244 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1245 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1246 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1247 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1248 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1249 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1250 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1251 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1252 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1253 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1254 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1255 }; 1256 1257 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1258 unsigned &NumNames) const { 1259 Names = GCCRegNames; 1260 NumNames = llvm::array_lengthof(GCCRegNames); 1261 } 1262 1263 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1264 { {"f0"}, "r0" }, 1265 { {"f1"}, "r1" }, 1266 { {"f2"}, "r2" }, 1267 { {"f3"}, "r3" }, 1268 { {"f4"}, "r4" }, 1269 { {"f5"}, "r5" }, 1270 { {"f6"}, "r6" }, 1271 { {"f7"}, "r7" }, 1272 { {"f8"}, "r8" }, 1273 { {"f9"}, "r9" }, 1274 { {"f10"}, "r10" }, 1275 { {"f11"}, "r11" }, 1276 { {"f12"}, "r12" }, 1277 { {"f13"}, "r13" }, 1278 { {"f14"}, "r14" }, 1279 { {"f15"}, "r15" }, 1280 { {"f16"}, "r16" }, 1281 { {"f17"}, "r17" }, 1282 { {"f18"}, "r18" }, 1283 { {"f19"}, "r19" }, 1284 { {"f20"}, "r20" }, 1285 { {"f21"}, "r21" }, 1286 { {"f22"}, "r22" }, 1287 { {"f23"}, "r23" }, 1288 { {"f24"}, "r24" }, 1289 { {"f25"}, "r25" }, 1290 { {"f26"}, "r26" }, 1291 { {"f27"}, "r27" }, 1292 { {"f28"}, "r28" }, 1293 { {"f29"}, "r29" }, 1294 { {"f30"}, "r30" }, 1295 { {"f31"}, "r31" }, 1296 }; 1297 1298 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1299 unsigned &NumAliases) const { 1300 Aliases = GCCRegAliases; 1301 NumAliases = llvm::array_lengthof(GCCRegAliases); 1302 } 1303 } // end anonymous namespace. 1304 1305 namespace { 1306 // Namespace for x86 abstract base class 1307 const Builtin::Info BuiltinInfo[] = { 1308 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1309 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1310 ALL_LANGUAGES }, 1311 #include "clang/Basic/BuiltinsX86.def" 1312 }; 1313 1314 static const char* const GCCRegNames[] = { 1315 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1316 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1317 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1318 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1319 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1320 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1321 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1322 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", 1323 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15", 1324 }; 1325 1326 const TargetInfo::AddlRegName AddlRegNames[] = { 1327 { { "al", "ah", "eax", "rax" }, 0 }, 1328 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1329 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1330 { { "dl", "dh", "edx", "rdx" }, 1 }, 1331 { { "esi", "rsi" }, 4 }, 1332 { { "edi", "rdi" }, 5 }, 1333 { { "esp", "rsp" }, 7 }, 1334 { { "ebp", "rbp" }, 6 }, 1335 }; 1336 1337 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1338 // most of the implementation can be shared. 1339 class X86TargetInfo : public TargetInfo { 1340 enum X86SSEEnum { 1341 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 1342 } SSELevel; 1343 enum MMX3DNowEnum { 1344 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1345 } MMX3DNowLevel; 1346 1347 bool HasAES; 1348 bool HasPCLMUL; 1349 bool HasLZCNT; 1350 bool HasRDRND; 1351 bool HasBMI; 1352 bool HasBMI2; 1353 bool HasPOPCNT; 1354 bool HasSSE4a; 1355 bool HasFMA4; 1356 bool HasFMA; 1357 bool HasXOP; 1358 1359 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1360 /// 1361 /// Each enumeration represents a particular CPU supported by Clang. These 1362 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1363 enum CPUKind { 1364 CK_Generic, 1365 1366 /// \name i386 1367 /// i386-generation processors. 1368 //@{ 1369 CK_i386, 1370 //@} 1371 1372 /// \name i486 1373 /// i486-generation processors. 1374 //@{ 1375 CK_i486, 1376 CK_WinChipC6, 1377 CK_WinChip2, 1378 CK_C3, 1379 //@} 1380 1381 /// \name i586 1382 /// i586-generation processors, P5 microarchitecture based. 1383 //@{ 1384 CK_i586, 1385 CK_Pentium, 1386 CK_PentiumMMX, 1387 //@} 1388 1389 /// \name i686 1390 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1391 //@{ 1392 CK_i686, 1393 CK_PentiumPro, 1394 CK_Pentium2, 1395 CK_Pentium3, 1396 CK_Pentium3M, 1397 CK_PentiumM, 1398 CK_C3_2, 1399 1400 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1401 /// Clang however has some logic to suport this. 1402 // FIXME: Warn, deprecate, and potentially remove this. 1403 CK_Yonah, 1404 //@} 1405 1406 /// \name Netburst 1407 /// Netburst microarchitecture based processors. 1408 //@{ 1409 CK_Pentium4, 1410 CK_Pentium4M, 1411 CK_Prescott, 1412 CK_Nocona, 1413 //@} 1414 1415 /// \name Core 1416 /// Core microarchitecture based processors. 1417 //@{ 1418 CK_Core2, 1419 1420 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1421 /// codename which GCC no longer accepts as an option to -march, but Clang 1422 /// has some logic for recognizing it. 1423 // FIXME: Warn, deprecate, and potentially remove this. 1424 CK_Penryn, 1425 //@} 1426 1427 /// \name Atom 1428 /// Atom processors 1429 //@{ 1430 CK_Atom, 1431 //@} 1432 1433 /// \name Nehalem 1434 /// Nehalem microarchitecture based processors. 1435 //@{ 1436 CK_Corei7, 1437 CK_Corei7AVX, 1438 CK_CoreAVXi, 1439 CK_CoreAVX2, 1440 //@} 1441 1442 /// \name K6 1443 /// K6 architecture processors. 1444 //@{ 1445 CK_K6, 1446 CK_K6_2, 1447 CK_K6_3, 1448 //@} 1449 1450 /// \name K7 1451 /// K7 architecture processors. 1452 //@{ 1453 CK_Athlon, 1454 CK_AthlonThunderbird, 1455 CK_Athlon4, 1456 CK_AthlonXP, 1457 CK_AthlonMP, 1458 //@} 1459 1460 /// \name K8 1461 /// K8 architecture processors. 1462 //@{ 1463 CK_Athlon64, 1464 CK_Athlon64SSE3, 1465 CK_AthlonFX, 1466 CK_K8, 1467 CK_K8SSE3, 1468 CK_Opteron, 1469 CK_OpteronSSE3, 1470 CK_AMDFAM10, 1471 //@} 1472 1473 /// \name Bobcat 1474 /// Bobcat architecture processors. 1475 //@{ 1476 CK_BTVER1, 1477 //@} 1478 1479 /// \name Bulldozer 1480 /// Bulldozer architecture processors. 1481 //@{ 1482 CK_BDVER1, 1483 CK_BDVER2, 1484 //@} 1485 1486 /// This specification is deprecated and will be removed in the future. 1487 /// Users should prefer \see CK_K8. 1488 // FIXME: Warn on this when the CPU is set to it. 1489 CK_x86_64, 1490 //@} 1491 1492 /// \name Geode 1493 /// Geode processors. 1494 //@{ 1495 CK_Geode 1496 //@} 1497 } CPU; 1498 1499 public: 1500 X86TargetInfo(const std::string& triple) 1501 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1502 HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false), 1503 HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false), 1504 HasFMA4(false), HasFMA(false), HasXOP(false), CPU(CK_Generic) { 1505 BigEndian = false; 1506 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1507 } 1508 virtual unsigned getFloatEvalMethod() const { 1509 // X87 evaluates with 80 bits "long double" precision. 1510 return SSELevel == NoSSE ? 2 : 0; 1511 } 1512 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1513 unsigned &NumRecords) const { 1514 Records = BuiltinInfo; 1515 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1516 } 1517 virtual void getGCCRegNames(const char * const *&Names, 1518 unsigned &NumNames) const { 1519 Names = GCCRegNames; 1520 NumNames = llvm::array_lengthof(GCCRegNames); 1521 } 1522 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1523 unsigned &NumAliases) const { 1524 Aliases = 0; 1525 NumAliases = 0; 1526 } 1527 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1528 unsigned &NumNames) const { 1529 Names = AddlRegNames; 1530 NumNames = llvm::array_lengthof(AddlRegNames); 1531 } 1532 virtual bool validateAsmConstraint(const char *&Name, 1533 TargetInfo::ConstraintInfo &info) const; 1534 virtual std::string convertConstraint(const char *&Constraint) const; 1535 virtual const char *getClobbers() const { 1536 return "~{dirflag},~{fpsr},~{flags}"; 1537 } 1538 virtual void getTargetDefines(const LangOptions &Opts, 1539 MacroBuilder &Builder) const; 1540 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1541 StringRef Name, 1542 bool Enabled) const; 1543 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1544 virtual bool hasFeature(StringRef Feature) const; 1545 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1546 virtual const char* getABI() const { 1547 if (PointerWidth == 64 && SSELevel >= AVX) 1548 return "avx"; 1549 else if (PointerWidth == 32 && MMX3DNowLevel == NoMMX3DNow) 1550 return "no-mmx"; 1551 return ""; 1552 } 1553 virtual bool setCPU(const std::string &Name) { 1554 CPU = llvm::StringSwitch<CPUKind>(Name) 1555 .Case("i386", CK_i386) 1556 .Case("i486", CK_i486) 1557 .Case("winchip-c6", CK_WinChipC6) 1558 .Case("winchip2", CK_WinChip2) 1559 .Case("c3", CK_C3) 1560 .Case("i586", CK_i586) 1561 .Case("pentium", CK_Pentium) 1562 .Case("pentium-mmx", CK_PentiumMMX) 1563 .Case("i686", CK_i686) 1564 .Case("pentiumpro", CK_PentiumPro) 1565 .Case("pentium2", CK_Pentium2) 1566 .Case("pentium3", CK_Pentium3) 1567 .Case("pentium3m", CK_Pentium3M) 1568 .Case("pentium-m", CK_PentiumM) 1569 .Case("c3-2", CK_C3_2) 1570 .Case("yonah", CK_Yonah) 1571 .Case("pentium4", CK_Pentium4) 1572 .Case("pentium4m", CK_Pentium4M) 1573 .Case("prescott", CK_Prescott) 1574 .Case("nocona", CK_Nocona) 1575 .Case("core2", CK_Core2) 1576 .Case("penryn", CK_Penryn) 1577 .Case("atom", CK_Atom) 1578 .Case("corei7", CK_Corei7) 1579 .Case("corei7-avx", CK_Corei7AVX) 1580 .Case("core-avx-i", CK_CoreAVXi) 1581 .Case("core-avx2", CK_CoreAVX2) 1582 .Case("k6", CK_K6) 1583 .Case("k6-2", CK_K6_2) 1584 .Case("k6-3", CK_K6_3) 1585 .Case("athlon", CK_Athlon) 1586 .Case("athlon-tbird", CK_AthlonThunderbird) 1587 .Case("athlon-4", CK_Athlon4) 1588 .Case("athlon-xp", CK_AthlonXP) 1589 .Case("athlon-mp", CK_AthlonMP) 1590 .Case("athlon64", CK_Athlon64) 1591 .Case("athlon64-sse3", CK_Athlon64SSE3) 1592 .Case("athlon-fx", CK_AthlonFX) 1593 .Case("k8", CK_K8) 1594 .Case("k8-sse3", CK_K8SSE3) 1595 .Case("opteron", CK_Opteron) 1596 .Case("opteron-sse3", CK_OpteronSSE3) 1597 .Case("amdfam10", CK_AMDFAM10) 1598 .Case("btver1", CK_BTVER1) 1599 .Case("bdver1", CK_BDVER1) 1600 .Case("bdver2", CK_BDVER2) 1601 .Case("x86-64", CK_x86_64) 1602 .Case("geode", CK_Geode) 1603 .Default(CK_Generic); 1604 1605 // Perform any per-CPU checks necessary to determine if this CPU is 1606 // acceptable. 1607 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1608 // invalid without explaining *why*. 1609 switch (CPU) { 1610 case CK_Generic: 1611 // No processor selected! 1612 return false; 1613 1614 case CK_i386: 1615 case CK_i486: 1616 case CK_WinChipC6: 1617 case CK_WinChip2: 1618 case CK_C3: 1619 case CK_i586: 1620 case CK_Pentium: 1621 case CK_PentiumMMX: 1622 case CK_i686: 1623 case CK_PentiumPro: 1624 case CK_Pentium2: 1625 case CK_Pentium3: 1626 case CK_Pentium3M: 1627 case CK_PentiumM: 1628 case CK_Yonah: 1629 case CK_C3_2: 1630 case CK_Pentium4: 1631 case CK_Pentium4M: 1632 case CK_Prescott: 1633 case CK_K6: 1634 case CK_K6_2: 1635 case CK_K6_3: 1636 case CK_Athlon: 1637 case CK_AthlonThunderbird: 1638 case CK_Athlon4: 1639 case CK_AthlonXP: 1640 case CK_AthlonMP: 1641 case CK_Geode: 1642 // Only accept certain architectures when compiling in 32-bit mode. 1643 if (PointerWidth != 32) 1644 return false; 1645 1646 // Fallthrough 1647 case CK_Nocona: 1648 case CK_Core2: 1649 case CK_Penryn: 1650 case CK_Atom: 1651 case CK_Corei7: 1652 case CK_Corei7AVX: 1653 case CK_CoreAVXi: 1654 case CK_CoreAVX2: 1655 case CK_Athlon64: 1656 case CK_Athlon64SSE3: 1657 case CK_AthlonFX: 1658 case CK_K8: 1659 case CK_K8SSE3: 1660 case CK_Opteron: 1661 case CK_OpteronSSE3: 1662 case CK_AMDFAM10: 1663 case CK_BTVER1: 1664 case CK_BDVER1: 1665 case CK_BDVER2: 1666 case CK_x86_64: 1667 return true; 1668 } 1669 llvm_unreachable("Unhandled CPU kind"); 1670 } 1671 }; 1672 1673 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1674 // FIXME: This should not be here. 1675 Features["3dnow"] = false; 1676 Features["3dnowa"] = false; 1677 Features["mmx"] = false; 1678 Features["sse"] = false; 1679 Features["sse2"] = false; 1680 Features["sse3"] = false; 1681 Features["ssse3"] = false; 1682 Features["sse41"] = false; 1683 Features["sse42"] = false; 1684 Features["sse4a"] = false; 1685 Features["aes"] = false; 1686 Features["pclmul"] = false; 1687 Features["avx"] = false; 1688 Features["avx2"] = false; 1689 Features["lzcnt"] = false; 1690 Features["rdrand"] = false; 1691 Features["bmi"] = false; 1692 Features["bmi2"] = false; 1693 Features["popcnt"] = false; 1694 Features["fma4"] = false; 1695 Features["fma"] = false; 1696 Features["xop"] = false; 1697 1698 // FIXME: This *really* should not be here. 1699 1700 // X86_64 always has SSE2. 1701 if (PointerWidth == 64) 1702 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1703 1704 switch (CPU) { 1705 case CK_Generic: 1706 case CK_i386: 1707 case CK_i486: 1708 case CK_i586: 1709 case CK_Pentium: 1710 case CK_i686: 1711 case CK_PentiumPro: 1712 break; 1713 case CK_PentiumMMX: 1714 case CK_Pentium2: 1715 setFeatureEnabled(Features, "mmx", true); 1716 break; 1717 case CK_Pentium3: 1718 case CK_Pentium3M: 1719 setFeatureEnabled(Features, "mmx", true); 1720 setFeatureEnabled(Features, "sse", true); 1721 break; 1722 case CK_PentiumM: 1723 case CK_Pentium4: 1724 case CK_Pentium4M: 1725 case CK_x86_64: 1726 setFeatureEnabled(Features, "mmx", true); 1727 setFeatureEnabled(Features, "sse2", true); 1728 break; 1729 case CK_Yonah: 1730 case CK_Prescott: 1731 case CK_Nocona: 1732 setFeatureEnabled(Features, "mmx", true); 1733 setFeatureEnabled(Features, "sse3", true); 1734 break; 1735 case CK_Core2: 1736 setFeatureEnabled(Features, "mmx", true); 1737 setFeatureEnabled(Features, "ssse3", true); 1738 break; 1739 case CK_Penryn: 1740 setFeatureEnabled(Features, "mmx", true); 1741 setFeatureEnabled(Features, "sse4.1", true); 1742 break; 1743 case CK_Atom: 1744 setFeatureEnabled(Features, "mmx", true); 1745 setFeatureEnabled(Features, "ssse3", true); 1746 break; 1747 case CK_Corei7: 1748 setFeatureEnabled(Features, "mmx", true); 1749 setFeatureEnabled(Features, "sse4", true); 1750 break; 1751 case CK_Corei7AVX: 1752 setFeatureEnabled(Features, "mmx", true); 1753 setFeatureEnabled(Features, "avx", true); 1754 setFeatureEnabled(Features, "aes", true); 1755 setFeatureEnabled(Features, "pclmul", true); 1756 break; 1757 case CK_CoreAVXi: 1758 setFeatureEnabled(Features, "mmx", true); 1759 setFeatureEnabled(Features, "avx", true); 1760 setFeatureEnabled(Features, "aes", true); 1761 setFeatureEnabled(Features, "pclmul", true); 1762 setFeatureEnabled(Features, "rdrnd", true); 1763 break; 1764 case CK_CoreAVX2: 1765 setFeatureEnabled(Features, "mmx", true); 1766 setFeatureEnabled(Features, "avx2", true); 1767 setFeatureEnabled(Features, "aes", true); 1768 setFeatureEnabled(Features, "pclmul", true); 1769 setFeatureEnabled(Features, "lzcnt", true); 1770 setFeatureEnabled(Features, "rdrnd", true); 1771 setFeatureEnabled(Features, "bmi", true); 1772 setFeatureEnabled(Features, "bmi2", true); 1773 setFeatureEnabled(Features, "fma", true); 1774 break; 1775 case CK_K6: 1776 case CK_WinChipC6: 1777 setFeatureEnabled(Features, "mmx", true); 1778 break; 1779 case CK_K6_2: 1780 case CK_K6_3: 1781 case CK_WinChip2: 1782 case CK_C3: 1783 setFeatureEnabled(Features, "3dnow", true); 1784 break; 1785 case CK_Athlon: 1786 case CK_AthlonThunderbird: 1787 case CK_Geode: 1788 setFeatureEnabled(Features, "3dnowa", true); 1789 break; 1790 case CK_Athlon4: 1791 case CK_AthlonXP: 1792 case CK_AthlonMP: 1793 setFeatureEnabled(Features, "sse", true); 1794 setFeatureEnabled(Features, "3dnowa", true); 1795 break; 1796 case CK_K8: 1797 case CK_Opteron: 1798 case CK_Athlon64: 1799 case CK_AthlonFX: 1800 setFeatureEnabled(Features, "sse2", true); 1801 setFeatureEnabled(Features, "3dnowa", true); 1802 break; 1803 case CK_K8SSE3: 1804 case CK_OpteronSSE3: 1805 case CK_Athlon64SSE3: 1806 setFeatureEnabled(Features, "sse3", true); 1807 setFeatureEnabled(Features, "3dnowa", true); 1808 break; 1809 case CK_AMDFAM10: 1810 setFeatureEnabled(Features, "sse3", true); 1811 setFeatureEnabled(Features, "sse4a", true); 1812 setFeatureEnabled(Features, "3dnowa", true); 1813 break; 1814 case CK_BTVER1: 1815 setFeatureEnabled(Features, "ssse3", true); 1816 setFeatureEnabled(Features, "sse4a", true); 1817 break; 1818 case CK_BDVER1: 1819 case CK_BDVER2: 1820 setFeatureEnabled(Features, "avx", true); 1821 setFeatureEnabled(Features, "xop", true); 1822 setFeatureEnabled(Features, "aes", true); 1823 setFeatureEnabled(Features, "pclmul", true); 1824 break; 1825 case CK_C3_2: 1826 setFeatureEnabled(Features, "mmx", true); 1827 setFeatureEnabled(Features, "sse", true); 1828 break; 1829 } 1830 } 1831 1832 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1833 StringRef Name, 1834 bool Enabled) const { 1835 // FIXME: This *really* should not be here. We need some way of translating 1836 // options into llvm subtarget features. 1837 if (!Features.count(Name) && 1838 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" && 1839 Name != "rdrnd")) 1840 return false; 1841 1842 // FIXME: this should probably use a switch with fall through. 1843 1844 if (Enabled) { 1845 if (Name == "mmx") 1846 Features["mmx"] = true; 1847 else if (Name == "sse") 1848 Features["mmx"] = Features["sse"] = true; 1849 else if (Name == "sse2") 1850 Features["mmx"] = Features["sse"] = Features["sse2"] = true; 1851 else if (Name == "sse3") 1852 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1853 true; 1854 else if (Name == "ssse3") 1855 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1856 Features["ssse3"] = true; 1857 else if (Name == "sse4" || Name == "sse4.2") 1858 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1859 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1860 Features["popcnt"] = true; 1861 else if (Name == "sse4.1") 1862 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1863 Features["ssse3"] = Features["sse41"] = true; 1864 else if (Name == "3dnow") 1865 Features["mmx"] = Features["3dnow"] = true; 1866 else if (Name == "3dnowa") 1867 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1868 else if (Name == "aes") 1869 Features["sse"] = Features["sse2"] = Features["aes"] = true; 1870 else if (Name == "pclmul") 1871 Features["sse"] = Features["sse2"] = Features["pclmul"] = true; 1872 else if (Name == "avx") 1873 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1874 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1875 Features["popcnt"] = Features["avx"] = true; 1876 else if (Name == "avx2") 1877 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1878 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1879 Features["popcnt"] = Features["avx"] = Features["avx2"] = true; 1880 else if (Name == "fma") 1881 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1882 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1883 Features["popcnt"] = Features["avx"] = Features["fma"] = true; 1884 else if (Name == "fma4") 1885 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1886 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1887 Features["popcnt"] = Features["avx"] = Features["sse4a"] = 1888 Features["fma4"] = true; 1889 else if (Name == "xop") 1890 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1891 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1892 Features["popcnt"] = Features["avx"] = Features["sse4a"] = 1893 Features["fma4"] = Features["xop"] = true; 1894 else if (Name == "sse4a") 1895 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1896 Features["sse4a"] = true; 1897 else if (Name == "lzcnt") 1898 Features["lzcnt"] = true; 1899 else if (Name == "rdrnd") 1900 Features["rdrand"] = true; 1901 else if (Name == "bmi") 1902 Features["bmi"] = true; 1903 else if (Name == "bmi2") 1904 Features["bmi2"] = true; 1905 else if (Name == "popcnt") 1906 Features["popcnt"] = true; 1907 } else { 1908 if (Name == "mmx") 1909 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1910 else if (Name == "sse") 1911 Features["sse"] = Features["sse2"] = Features["sse3"] = 1912 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1913 Features["sse4a"] = Features["avx"] = Features["avx2"] = 1914 Features["fma"] = Features["fma4"] = Features["aes"] = 1915 Features["pclmul"] = Features["xop"] = false; 1916 else if (Name == "sse2") 1917 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1918 Features["sse41"] = Features["sse42"] = Features["sse4a"] = 1919 Features["avx"] = Features["avx2"] = Features["fma"] = 1920 Features["fma4"] = Features["aes"] = Features["pclmul"] = 1921 Features["xop"] = false; 1922 else if (Name == "sse3") 1923 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1924 Features["sse42"] = Features["sse4a"] = Features["avx"] = 1925 Features["avx2"] = Features["fma"] = Features["fma4"] = 1926 Features["xop"] = false; 1927 else if (Name == "ssse3") 1928 Features["ssse3"] = Features["sse41"] = Features["sse42"] = 1929 Features["avx"] = Features["avx2"] = Features["fma"] = false; 1930 else if (Name == "sse4" || Name == "sse4.1") 1931 Features["sse41"] = Features["sse42"] = Features["avx"] = 1932 Features["avx2"] = Features["fma"] = false; 1933 else if (Name == "sse4.2") 1934 Features["sse42"] = Features["avx"] = Features["avx2"] = 1935 Features["fma"] = false; 1936 else if (Name == "3dnow") 1937 Features["3dnow"] = Features["3dnowa"] = false; 1938 else if (Name == "3dnowa") 1939 Features["3dnowa"] = false; 1940 else if (Name == "aes") 1941 Features["aes"] = false; 1942 else if (Name == "pclmul") 1943 Features["pclmul"] = false; 1944 else if (Name == "avx") 1945 Features["avx"] = Features["avx2"] = Features["fma"] = 1946 Features["fma4"] = Features["xop"] = false; 1947 else if (Name == "avx2") 1948 Features["avx2"] = false; 1949 else if (Name == "fma") 1950 Features["fma"] = false; 1951 else if (Name == "sse4a") 1952 Features["sse4a"] = Features["fma4"] = Features["xop"] = false; 1953 else if (Name == "lzcnt") 1954 Features["lzcnt"] = false; 1955 else if (Name == "rdrnd") 1956 Features["rdrand"] = false; 1957 else if (Name == "bmi") 1958 Features["bmi"] = false; 1959 else if (Name == "bmi2") 1960 Features["bmi2"] = false; 1961 else if (Name == "popcnt") 1962 Features["popcnt"] = false; 1963 else if (Name == "fma4") 1964 Features["fma4"] = Features["xop"] = false; 1965 else if (Name == "xop") 1966 Features["xop"] = false; 1967 } 1968 1969 return true; 1970 } 1971 1972 /// HandleTargetOptions - Perform initialization based on the user 1973 /// configured set of features. 1974 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1975 // Remember the maximum enabled sselevel. 1976 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1977 // Ignore disabled features. 1978 if (Features[i][0] == '-') 1979 continue; 1980 1981 StringRef Feature = StringRef(Features[i]).substr(1); 1982 1983 if (Feature == "aes") { 1984 HasAES = true; 1985 continue; 1986 } 1987 1988 if (Feature == "pclmul") { 1989 HasPCLMUL = true; 1990 continue; 1991 } 1992 1993 if (Feature == "lzcnt") { 1994 HasLZCNT = true; 1995 continue; 1996 } 1997 1998 if (Feature == "rdrand") { 1999 HasRDRND = true; 2000 continue; 2001 } 2002 2003 if (Feature == "bmi") { 2004 HasBMI = true; 2005 continue; 2006 } 2007 2008 if (Feature == "bmi2") { 2009 HasBMI2 = true; 2010 continue; 2011 } 2012 2013 if (Feature == "popcnt") { 2014 HasPOPCNT = true; 2015 continue; 2016 } 2017 2018 if (Feature == "sse4a") { 2019 HasSSE4a = true; 2020 continue; 2021 } 2022 2023 if (Feature == "fma4") { 2024 HasFMA4 = true; 2025 continue; 2026 } 2027 2028 if (Feature == "fma") { 2029 HasFMA = true; 2030 continue; 2031 } 2032 2033 if (Feature == "xop") { 2034 HasXOP = true; 2035 continue; 2036 } 2037 2038 assert(Features[i][0] == '+' && "Invalid target feature!"); 2039 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) 2040 .Case("avx2", AVX2) 2041 .Case("avx", AVX) 2042 .Case("sse42", SSE42) 2043 .Case("sse41", SSE41) 2044 .Case("ssse3", SSSE3) 2045 .Case("sse3", SSE3) 2046 .Case("sse2", SSE2) 2047 .Case("sse", SSE1) 2048 .Default(NoSSE); 2049 SSELevel = std::max(SSELevel, Level); 2050 2051 MMX3DNowEnum ThreeDNowLevel = 2052 llvm::StringSwitch<MMX3DNowEnum>(Feature) 2053 .Case("3dnowa", AMD3DNowAthlon) 2054 .Case("3dnow", AMD3DNow) 2055 .Case("mmx", MMX) 2056 .Default(NoMMX3DNow); 2057 2058 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 2059 } 2060 2061 // Don't tell the backend if we're turning off mmx; it will end up disabling 2062 // SSE, which we don't want. 2063 std::vector<std::string>::iterator it; 2064 it = std::find(Features.begin(), Features.end(), "-mmx"); 2065 if (it != Features.end()) 2066 Features.erase(it); 2067 } 2068 2069 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 2070 /// definitions for this particular subtarget. 2071 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 2072 MacroBuilder &Builder) const { 2073 // Target identification. 2074 if (PointerWidth == 64) { 2075 Builder.defineMacro("__amd64__"); 2076 Builder.defineMacro("__amd64"); 2077 Builder.defineMacro("__x86_64"); 2078 Builder.defineMacro("__x86_64__"); 2079 } else { 2080 DefineStd(Builder, "i386", Opts); 2081 } 2082 2083 // Subtarget options. 2084 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 2085 // truly should be based on -mtune options. 2086 switch (CPU) { 2087 case CK_Generic: 2088 break; 2089 case CK_i386: 2090 // The rest are coming from the i386 define above. 2091 Builder.defineMacro("__tune_i386__"); 2092 break; 2093 case CK_i486: 2094 case CK_WinChipC6: 2095 case CK_WinChip2: 2096 case CK_C3: 2097 defineCPUMacros(Builder, "i486"); 2098 break; 2099 case CK_PentiumMMX: 2100 Builder.defineMacro("__pentium_mmx__"); 2101 Builder.defineMacro("__tune_pentium_mmx__"); 2102 // Fallthrough 2103 case CK_i586: 2104 case CK_Pentium: 2105 defineCPUMacros(Builder, "i586"); 2106 defineCPUMacros(Builder, "pentium"); 2107 break; 2108 case CK_Pentium3: 2109 case CK_Pentium3M: 2110 case CK_PentiumM: 2111 Builder.defineMacro("__tune_pentium3__"); 2112 // Fallthrough 2113 case CK_Pentium2: 2114 case CK_C3_2: 2115 Builder.defineMacro("__tune_pentium2__"); 2116 // Fallthrough 2117 case CK_PentiumPro: 2118 Builder.defineMacro("__tune_i686__"); 2119 Builder.defineMacro("__tune_pentiumpro__"); 2120 // Fallthrough 2121 case CK_i686: 2122 Builder.defineMacro("__i686"); 2123 Builder.defineMacro("__i686__"); 2124 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 2125 Builder.defineMacro("__pentiumpro"); 2126 Builder.defineMacro("__pentiumpro__"); 2127 break; 2128 case CK_Pentium4: 2129 case CK_Pentium4M: 2130 defineCPUMacros(Builder, "pentium4"); 2131 break; 2132 case CK_Yonah: 2133 case CK_Prescott: 2134 case CK_Nocona: 2135 defineCPUMacros(Builder, "nocona"); 2136 break; 2137 case CK_Core2: 2138 case CK_Penryn: 2139 defineCPUMacros(Builder, "core2"); 2140 break; 2141 case CK_Atom: 2142 defineCPUMacros(Builder, "atom"); 2143 break; 2144 case CK_Corei7: 2145 case CK_Corei7AVX: 2146 case CK_CoreAVXi: 2147 case CK_CoreAVX2: 2148 defineCPUMacros(Builder, "corei7"); 2149 break; 2150 case CK_K6_2: 2151 Builder.defineMacro("__k6_2__"); 2152 Builder.defineMacro("__tune_k6_2__"); 2153 // Fallthrough 2154 case CK_K6_3: 2155 if (CPU != CK_K6_2) { // In case of fallthrough 2156 // FIXME: GCC may be enabling these in cases where some other k6 2157 // architecture is specified but -m3dnow is explicitly provided. The 2158 // exact semantics need to be determined and emulated here. 2159 Builder.defineMacro("__k6_3__"); 2160 Builder.defineMacro("__tune_k6_3__"); 2161 } 2162 // Fallthrough 2163 case CK_K6: 2164 defineCPUMacros(Builder, "k6"); 2165 break; 2166 case CK_Athlon: 2167 case CK_AthlonThunderbird: 2168 case CK_Athlon4: 2169 case CK_AthlonXP: 2170 case CK_AthlonMP: 2171 defineCPUMacros(Builder, "athlon"); 2172 if (SSELevel != NoSSE) { 2173 Builder.defineMacro("__athlon_sse__"); 2174 Builder.defineMacro("__tune_athlon_sse__"); 2175 } 2176 break; 2177 case CK_K8: 2178 case CK_K8SSE3: 2179 case CK_x86_64: 2180 case CK_Opteron: 2181 case CK_OpteronSSE3: 2182 case CK_Athlon64: 2183 case CK_Athlon64SSE3: 2184 case CK_AthlonFX: 2185 defineCPUMacros(Builder, "k8"); 2186 break; 2187 case CK_AMDFAM10: 2188 defineCPUMacros(Builder, "amdfam10"); 2189 break; 2190 case CK_BTVER1: 2191 defineCPUMacros(Builder, "btver1"); 2192 break; 2193 case CK_BDVER1: 2194 defineCPUMacros(Builder, "bdver1"); 2195 break; 2196 case CK_BDVER2: 2197 defineCPUMacros(Builder, "bdver2"); 2198 break; 2199 case CK_Geode: 2200 defineCPUMacros(Builder, "geode"); 2201 break; 2202 } 2203 2204 // Target properties. 2205 Builder.defineMacro("__LITTLE_ENDIAN__"); 2206 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2207 2208 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 2209 // functions in glibc header files that use FP Stack inline asm which the 2210 // backend can't deal with (PR879). 2211 Builder.defineMacro("__NO_MATH_INLINES"); 2212 2213 if (HasAES) 2214 Builder.defineMacro("__AES__"); 2215 2216 if (HasPCLMUL) 2217 Builder.defineMacro("__PCLMUL__"); 2218 2219 if (HasLZCNT) 2220 Builder.defineMacro("__LZCNT__"); 2221 2222 if (HasRDRND) 2223 Builder.defineMacro("__RDRND__"); 2224 2225 if (HasBMI) 2226 Builder.defineMacro("__BMI__"); 2227 2228 if (HasBMI2) 2229 Builder.defineMacro("__BMI2__"); 2230 2231 if (HasPOPCNT) 2232 Builder.defineMacro("__POPCNT__"); 2233 2234 if (HasSSE4a) 2235 Builder.defineMacro("__SSE4A__"); 2236 2237 if (HasFMA4) 2238 Builder.defineMacro("__FMA4__"); 2239 2240 if (HasFMA) 2241 Builder.defineMacro("__FMA__"); 2242 2243 if (HasXOP) 2244 Builder.defineMacro("__XOP__"); 2245 2246 // Each case falls through to the previous one here. 2247 switch (SSELevel) { 2248 case AVX2: 2249 Builder.defineMacro("__AVX2__"); 2250 case AVX: 2251 Builder.defineMacro("__AVX__"); 2252 case SSE42: 2253 Builder.defineMacro("__SSE4_2__"); 2254 case SSE41: 2255 Builder.defineMacro("__SSE4_1__"); 2256 case SSSE3: 2257 Builder.defineMacro("__SSSE3__"); 2258 case SSE3: 2259 Builder.defineMacro("__SSE3__"); 2260 case SSE2: 2261 Builder.defineMacro("__SSE2__"); 2262 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 2263 case SSE1: 2264 Builder.defineMacro("__SSE__"); 2265 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 2266 case NoSSE: 2267 break; 2268 } 2269 2270 if (Opts.MicrosoftExt && PointerWidth == 32) { 2271 switch (SSELevel) { 2272 case AVX2: 2273 case AVX: 2274 case SSE42: 2275 case SSE41: 2276 case SSSE3: 2277 case SSE3: 2278 case SSE2: 2279 Builder.defineMacro("_M_IX86_FP", Twine(2)); 2280 break; 2281 case SSE1: 2282 Builder.defineMacro("_M_IX86_FP", Twine(1)); 2283 break; 2284 default: 2285 Builder.defineMacro("_M_IX86_FP", Twine(0)); 2286 } 2287 } 2288 2289 // Each case falls through to the previous one here. 2290 switch (MMX3DNowLevel) { 2291 case AMD3DNowAthlon: 2292 Builder.defineMacro("__3dNOW_A__"); 2293 case AMD3DNow: 2294 Builder.defineMacro("__3dNOW__"); 2295 case MMX: 2296 Builder.defineMacro("__MMX__"); 2297 case NoMMX3DNow: 2298 break; 2299 } 2300 } 2301 2302 bool X86TargetInfo::hasFeature(StringRef Feature) const { 2303 return llvm::StringSwitch<bool>(Feature) 2304 .Case("aes", HasAES) 2305 .Case("avx", SSELevel >= AVX) 2306 .Case("avx2", SSELevel >= AVX2) 2307 .Case("bmi", HasBMI) 2308 .Case("bmi2", HasBMI2) 2309 .Case("fma", HasFMA) 2310 .Case("fma4", HasFMA4) 2311 .Case("lzcnt", HasLZCNT) 2312 .Case("rdrnd", HasRDRND) 2313 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) 2314 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon) 2315 .Case("mmx", MMX3DNowLevel >= MMX) 2316 .Case("pclmul", HasPCLMUL) 2317 .Case("popcnt", HasPOPCNT) 2318 .Case("sse", SSELevel >= SSE1) 2319 .Case("sse2", SSELevel >= SSE2) 2320 .Case("sse3", SSELevel >= SSE3) 2321 .Case("ssse3", SSELevel >= SSSE3) 2322 .Case("sse41", SSELevel >= SSE41) 2323 .Case("sse42", SSELevel >= SSE42) 2324 .Case("sse4a", HasSSE4a) 2325 .Case("x86", true) 2326 .Case("x86_32", PointerWidth == 32) 2327 .Case("x86_64", PointerWidth == 64) 2328 .Case("xop", HasXOP) 2329 .Default(false); 2330 } 2331 2332 bool 2333 X86TargetInfo::validateAsmConstraint(const char *&Name, 2334 TargetInfo::ConstraintInfo &Info) const { 2335 switch (*Name) { 2336 default: return false; 2337 case 'Y': // first letter of a pair: 2338 switch (*(Name+1)) { 2339 default: return false; 2340 case '0': // First SSE register. 2341 case 't': // Any SSE register, when SSE2 is enabled. 2342 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 2343 case 'm': // any MMX register, when inter-unit moves enabled. 2344 break; // falls through to setAllowsRegister. 2345 } 2346 case 'a': // eax. 2347 case 'b': // ebx. 2348 case 'c': // ecx. 2349 case 'd': // edx. 2350 case 'S': // esi. 2351 case 'D': // edi. 2352 case 'A': // edx:eax. 2353 case 'f': // any x87 floating point stack register. 2354 case 't': // top of floating point stack. 2355 case 'u': // second from top of floating point stack. 2356 case 'q': // Any register accessible as [r]l: a, b, c, and d. 2357 case 'y': // Any MMX register. 2358 case 'x': // Any SSE register. 2359 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 2360 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 2361 case 'l': // "Index" registers: any general register that can be used as an 2362 // index in a base+index memory access. 2363 Info.setAllowsRegister(); 2364 return true; 2365 case 'C': // SSE floating point constant. 2366 case 'G': // x87 floating point constant. 2367 case 'e': // 32-bit signed integer constant for use with zero-extending 2368 // x86_64 instructions. 2369 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 2370 // x86_64 instructions. 2371 return true; 2372 } 2373 } 2374 2375 2376 std::string 2377 X86TargetInfo::convertConstraint(const char *&Constraint) const { 2378 switch (*Constraint) { 2379 case 'a': return std::string("{ax}"); 2380 case 'b': return std::string("{bx}"); 2381 case 'c': return std::string("{cx}"); 2382 case 'd': return std::string("{dx}"); 2383 case 'S': return std::string("{si}"); 2384 case 'D': return std::string("{di}"); 2385 case 'p': // address 2386 return std::string("im"); 2387 case 't': // top of floating point stack. 2388 return std::string("{st}"); 2389 case 'u': // second from top of floating point stack. 2390 return std::string("{st(1)}"); // second from top of floating point stack. 2391 default: 2392 return std::string(1, *Constraint); 2393 } 2394 } 2395 } // end anonymous namespace 2396 2397 namespace { 2398 // X86-32 generic target 2399 class X86_32TargetInfo : public X86TargetInfo { 2400 public: 2401 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 2402 DoubleAlign = LongLongAlign = 32; 2403 LongDoubleWidth = 96; 2404 LongDoubleAlign = 32; 2405 SuitableAlign = 128; 2406 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2407 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2408 "a0:0:64-f80:32:32-n8:16:32-S128"; 2409 SizeType = UnsignedInt; 2410 PtrDiffType = SignedInt; 2411 IntPtrType = SignedInt; 2412 RegParmMax = 3; 2413 2414 // Use fpret for all types. 2415 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 2416 (1 << TargetInfo::Double) | 2417 (1 << TargetInfo::LongDouble)); 2418 2419 // x86-32 has atomics up to 8 bytes 2420 // FIXME: Check that we actually have cmpxchg8b before setting 2421 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 2422 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 2423 } 2424 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2425 return TargetInfo::CharPtrBuiltinVaList; 2426 } 2427 2428 int getEHDataRegisterNumber(unsigned RegNo) const { 2429 if (RegNo == 0) return 0; 2430 if (RegNo == 1) return 2; 2431 return -1; 2432 } 2433 }; 2434 } // end anonymous namespace 2435 2436 namespace { 2437 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> { 2438 public: 2439 NetBSDI386TargetInfo(const std::string &triple) : 2440 NetBSDTargetInfo<X86_32TargetInfo>(triple) { 2441 } 2442 2443 virtual unsigned getFloatEvalMethod() const { 2444 // NetBSD defaults to "double" rounding 2445 return 1; 2446 } 2447 }; 2448 } // end anonymous namespace 2449 2450 namespace { 2451 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2452 public: 2453 OpenBSDI386TargetInfo(const std::string& triple) : 2454 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2455 SizeType = UnsignedLong; 2456 IntPtrType = SignedLong; 2457 PtrDiffType = SignedLong; 2458 } 2459 }; 2460 } // end anonymous namespace 2461 2462 namespace { 2463 class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> { 2464 public: 2465 BitrigI386TargetInfo(const std::string& triple) : 2466 BitrigTargetInfo<X86_32TargetInfo>(triple) { 2467 SizeType = UnsignedLong; 2468 IntPtrType = SignedLong; 2469 PtrDiffType = SignedLong; 2470 } 2471 }; 2472 } // end anonymous namespace 2473 2474 namespace { 2475 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2476 public: 2477 DarwinI386TargetInfo(const std::string& triple) : 2478 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2479 LongDoubleWidth = 128; 2480 LongDoubleAlign = 128; 2481 SuitableAlign = 128; 2482 MaxVectorAlign = 256; 2483 SizeType = UnsignedLong; 2484 IntPtrType = SignedLong; 2485 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2486 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2487 "a0:0:64-f80:128:128-n8:16:32-S128"; 2488 HasAlignMac68kSupport = true; 2489 } 2490 2491 }; 2492 } // end anonymous namespace 2493 2494 namespace { 2495 // x86-32 Windows target 2496 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2497 public: 2498 WindowsX86_32TargetInfo(const std::string& triple) 2499 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2500 TLSSupported = false; 2501 WCharType = UnsignedShort; 2502 DoubleAlign = LongLongAlign = 64; 2503 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2504 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2505 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2506 } 2507 virtual void getTargetDefines(const LangOptions &Opts, 2508 MacroBuilder &Builder) const { 2509 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2510 } 2511 }; 2512 } // end anonymous namespace 2513 2514 namespace { 2515 2516 // x86-32 Windows Visual Studio target 2517 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2518 public: 2519 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2520 : WindowsX86_32TargetInfo(triple) { 2521 LongDoubleWidth = LongDoubleAlign = 64; 2522 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2523 } 2524 virtual void getTargetDefines(const LangOptions &Opts, 2525 MacroBuilder &Builder) const { 2526 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2527 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2528 // The value of the following reflects processor type. 2529 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2530 // We lost the original triple, so we use the default. 2531 Builder.defineMacro("_M_IX86", "600"); 2532 } 2533 }; 2534 } // end anonymous namespace 2535 2536 namespace { 2537 // x86-32 MinGW target 2538 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2539 public: 2540 MinGWX86_32TargetInfo(const std::string& triple) 2541 : WindowsX86_32TargetInfo(triple) { 2542 } 2543 virtual void getTargetDefines(const LangOptions &Opts, 2544 MacroBuilder &Builder) const { 2545 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2546 DefineStd(Builder, "WIN32", Opts); 2547 DefineStd(Builder, "WINNT", Opts); 2548 Builder.defineMacro("_X86_"); 2549 Builder.defineMacro("__MSVCRT__"); 2550 Builder.defineMacro("__MINGW32__"); 2551 2552 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2553 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2554 if (Opts.MicrosoftExt) 2555 // Provide "as-is" __declspec. 2556 Builder.defineMacro("__declspec", "__declspec"); 2557 else 2558 // Provide alias of __attribute__ like mingw32-gcc. 2559 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2560 } 2561 }; 2562 } // end anonymous namespace 2563 2564 namespace { 2565 // x86-32 Cygwin target 2566 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2567 public: 2568 CygwinX86_32TargetInfo(const std::string& triple) 2569 : X86_32TargetInfo(triple) { 2570 TLSSupported = false; 2571 WCharType = UnsignedShort; 2572 DoubleAlign = LongLongAlign = 64; 2573 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2574 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2575 "a0:0:64-f80:32:32-n8:16:32-S32"; 2576 } 2577 virtual void getTargetDefines(const LangOptions &Opts, 2578 MacroBuilder &Builder) const { 2579 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2580 Builder.defineMacro("__CYGWIN__"); 2581 Builder.defineMacro("__CYGWIN32__"); 2582 DefineStd(Builder, "unix", Opts); 2583 if (Opts.CPlusPlus) 2584 Builder.defineMacro("_GNU_SOURCE"); 2585 } 2586 }; 2587 } // end anonymous namespace 2588 2589 namespace { 2590 // x86-32 Haiku target 2591 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2592 public: 2593 HaikuX86_32TargetInfo(const std::string& triple) 2594 : X86_32TargetInfo(triple) { 2595 SizeType = UnsignedLong; 2596 IntPtrType = SignedLong; 2597 PtrDiffType = SignedLong; 2598 this->UserLabelPrefix = ""; 2599 } 2600 virtual void getTargetDefines(const LangOptions &Opts, 2601 MacroBuilder &Builder) const { 2602 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2603 Builder.defineMacro("__INTEL__"); 2604 Builder.defineMacro("__HAIKU__"); 2605 } 2606 }; 2607 } // end anonymous namespace 2608 2609 // RTEMS Target 2610 template<typename Target> 2611 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2612 protected: 2613 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2614 MacroBuilder &Builder) const { 2615 // RTEMS defines; list based off of gcc output 2616 2617 Builder.defineMacro("__rtems__"); 2618 Builder.defineMacro("__ELF__"); 2619 } 2620 public: 2621 RTEMSTargetInfo(const std::string &triple) 2622 : OSTargetInfo<Target>(triple) { 2623 this->UserLabelPrefix = ""; 2624 2625 llvm::Triple Triple(triple); 2626 switch (Triple.getArch()) { 2627 default: 2628 case llvm::Triple::x86: 2629 // this->MCountName = ".mcount"; 2630 break; 2631 case llvm::Triple::mips: 2632 case llvm::Triple::mipsel: 2633 case llvm::Triple::ppc: 2634 case llvm::Triple::ppc64: 2635 // this->MCountName = "_mcount"; 2636 break; 2637 case llvm::Triple::arm: 2638 // this->MCountName = "__mcount"; 2639 break; 2640 } 2641 2642 } 2643 }; 2644 2645 namespace { 2646 // x86-32 RTEMS target 2647 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2648 public: 2649 RTEMSX86_32TargetInfo(const std::string& triple) 2650 : X86_32TargetInfo(triple) { 2651 SizeType = UnsignedLong; 2652 IntPtrType = SignedLong; 2653 PtrDiffType = SignedLong; 2654 this->UserLabelPrefix = ""; 2655 } 2656 virtual void getTargetDefines(const LangOptions &Opts, 2657 MacroBuilder &Builder) const { 2658 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2659 Builder.defineMacro("__INTEL__"); 2660 Builder.defineMacro("__rtems__"); 2661 } 2662 }; 2663 } // end anonymous namespace 2664 2665 namespace { 2666 // x86-64 generic target 2667 class X86_64TargetInfo : public X86TargetInfo { 2668 public: 2669 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2670 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2671 LongDoubleWidth = 128; 2672 LongDoubleAlign = 128; 2673 LargeArrayMinWidth = 128; 2674 LargeArrayAlign = 128; 2675 SuitableAlign = 128; 2676 IntMaxType = SignedLong; 2677 UIntMaxType = UnsignedLong; 2678 Int64Type = SignedLong; 2679 RegParmMax = 6; 2680 2681 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2682 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2683 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2684 2685 // Use fpret only for long double. 2686 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2687 2688 // Use fp2ret for _Complex long double. 2689 ComplexLongDoubleUsesFP2Ret = true; 2690 2691 // x86-64 has atomics up to 16 bytes. 2692 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2693 // on CPUs with cmpxchg16b 2694 MaxAtomicPromoteWidth = 128; 2695 MaxAtomicInlineWidth = 64; 2696 } 2697 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2698 return TargetInfo::X86_64ABIBuiltinVaList; 2699 } 2700 2701 int getEHDataRegisterNumber(unsigned RegNo) const { 2702 if (RegNo == 0) return 0; 2703 if (RegNo == 1) return 1; 2704 return -1; 2705 } 2706 }; 2707 } // end anonymous namespace 2708 2709 namespace { 2710 // x86-64 Windows target 2711 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2712 public: 2713 WindowsX86_64TargetInfo(const std::string& triple) 2714 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2715 TLSSupported = false; 2716 WCharType = UnsignedShort; 2717 LongWidth = LongAlign = 32; 2718 DoubleAlign = LongLongAlign = 64; 2719 IntMaxType = SignedLongLong; 2720 UIntMaxType = UnsignedLongLong; 2721 Int64Type = SignedLongLong; 2722 SizeType = UnsignedLongLong; 2723 PtrDiffType = SignedLongLong; 2724 IntPtrType = SignedLongLong; 2725 this->UserLabelPrefix = ""; 2726 } 2727 virtual void getTargetDefines(const LangOptions &Opts, 2728 MacroBuilder &Builder) const { 2729 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2730 Builder.defineMacro("_WIN64"); 2731 } 2732 virtual BuiltinVaListKind getBuiltinVaListKind() const { 2733 return TargetInfo::CharPtrBuiltinVaList; 2734 } 2735 }; 2736 } // end anonymous namespace 2737 2738 namespace { 2739 // x86-64 Windows Visual Studio target 2740 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2741 public: 2742 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2743 : WindowsX86_64TargetInfo(triple) { 2744 LongDoubleWidth = LongDoubleAlign = 64; 2745 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2746 } 2747 virtual void getTargetDefines(const LangOptions &Opts, 2748 MacroBuilder &Builder) const { 2749 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2750 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2751 Builder.defineMacro("_M_X64"); 2752 Builder.defineMacro("_M_AMD64"); 2753 } 2754 }; 2755 } // end anonymous namespace 2756 2757 namespace { 2758 // x86-64 MinGW target 2759 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2760 public: 2761 MinGWX86_64TargetInfo(const std::string& triple) 2762 : WindowsX86_64TargetInfo(triple) { 2763 } 2764 virtual void getTargetDefines(const LangOptions &Opts, 2765 MacroBuilder &Builder) const { 2766 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2767 DefineStd(Builder, "WIN64", Opts); 2768 Builder.defineMacro("__MSVCRT__"); 2769 Builder.defineMacro("__MINGW32__"); 2770 Builder.defineMacro("__MINGW64__"); 2771 2772 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2773 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2774 if (Opts.MicrosoftExt) 2775 // Provide "as-is" __declspec. 2776 Builder.defineMacro("__declspec", "__declspec"); 2777 else 2778 // Provide alias of __attribute__ like mingw32-gcc. 2779 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2780 } 2781 }; 2782 } // end anonymous namespace 2783 2784 namespace { 2785 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2786 public: 2787 DarwinX86_64TargetInfo(const std::string& triple) 2788 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2789 Int64Type = SignedLongLong; 2790 MaxVectorAlign = 256; 2791 } 2792 }; 2793 } // end anonymous namespace 2794 2795 namespace { 2796 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2797 public: 2798 OpenBSDX86_64TargetInfo(const std::string& triple) 2799 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2800 IntMaxType = SignedLongLong; 2801 UIntMaxType = UnsignedLongLong; 2802 Int64Type = SignedLongLong; 2803 } 2804 }; 2805 } // end anonymous namespace 2806 2807 namespace { 2808 class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> { 2809 public: 2810 BitrigX86_64TargetInfo(const std::string& triple) 2811 : BitrigTargetInfo<X86_64TargetInfo>(triple) { 2812 IntMaxType = SignedLongLong; 2813 UIntMaxType = UnsignedLongLong; 2814 Int64Type = SignedLongLong; 2815 } 2816 }; 2817 } // end anonymous namespace 2818 2819 namespace { 2820 class ARMTargetInfo : public TargetInfo { 2821 // Possible FPU choices. 2822 enum FPUMode { 2823 NoFPU, 2824 VFP2FPU, 2825 VFP3FPU, 2826 NeonFPU 2827 }; 2828 2829 static bool FPUModeIsVFP(FPUMode Mode) { 2830 return Mode >= VFP2FPU && Mode <= NeonFPU; 2831 } 2832 2833 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2834 static const char * const GCCRegNames[]; 2835 2836 std::string ABI, CPU; 2837 2838 unsigned FPU : 3; 2839 2840 unsigned IsThumb : 1; 2841 2842 // Initialized via features. 2843 unsigned SoftFloat : 1; 2844 unsigned SoftFloatABI : 1; 2845 2846 static const Builtin::Info BuiltinInfo[]; 2847 2848 public: 2849 ARMTargetInfo(const std::string &TripleStr) 2850 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2851 { 2852 BigEndian = false; 2853 SizeType = UnsignedInt; 2854 PtrDiffType = SignedInt; 2855 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int. 2856 WCharType = UnsignedInt; 2857 2858 // {} in inline assembly are neon specifiers, not assembly variant 2859 // specifiers. 2860 NoAsmVariants = true; 2861 2862 // FIXME: Should we just treat this as a feature? 2863 IsThumb = getTriple().getArchName().startswith("thumb"); 2864 if (IsThumb) { 2865 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2866 // so set preferred for small types to 32. 2867 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2868 "i64:64:64-f32:32:32-f64:64:64-" 2869 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2870 } else { 2871 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2872 "i64:64:64-f32:32:32-f64:64:64-" 2873 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2874 } 2875 2876 // ARM targets default to using the ARM C++ ABI. 2877 CXXABI = CXXABI_ARM; 2878 2879 // ARM has atomics up to 8 bytes 2880 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2881 MaxAtomicPromoteWidth = 64; 2882 2883 // Do force alignment of members that follow zero length bitfields. If 2884 // the alignment of the zero-length bitfield is greater than the member 2885 // that follows it, `bar', `bar' will be aligned as the type of the 2886 // zero length bitfield. 2887 UseZeroLengthBitfieldAlignment = true; 2888 } 2889 virtual const char *getABI() const { return ABI.c_str(); } 2890 virtual bool setABI(const std::string &Name) { 2891 ABI = Name; 2892 2893 // The defaults (above) are for AAPCS, check if we need to change them. 2894 // 2895 // FIXME: We need support for -meabi... we could just mangle it into the 2896 // name. 2897 if (Name == "apcs-gnu") { 2898 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32; 2899 SizeType = UnsignedLong; 2900 2901 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour. 2902 WCharType = SignedInt; 2903 2904 // Do not respect the alignment of bit-field types when laying out 2905 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2906 UseBitFieldTypeAlignment = false; 2907 2908 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2909 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2910 /// gcc. 2911 ZeroLengthBitfieldBoundary = 32; 2912 2913 if (IsThumb) { 2914 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2915 // so set preferred for small types to 32. 2916 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2917 "i64:32:64-f32:32:32-f64:32:64-" 2918 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2919 } else { 2920 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2921 "i64:32:64-f32:32:32-f64:32:64-" 2922 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2923 } 2924 2925 // FIXME: Override "preferred align" for double and long long. 2926 } else if (Name == "aapcs") { 2927 // FIXME: Enumerated types are variable width in straight AAPCS. 2928 } else if (Name == "aapcs-linux") { 2929 ; 2930 } else 2931 return false; 2932 2933 return true; 2934 } 2935 2936 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2937 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2938 Features["vfp2"] = true; 2939 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2940 Features["neon"] = true; 2941 } 2942 2943 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2944 StringRef Name, 2945 bool Enabled) const { 2946 if (Name == "soft-float" || Name == "soft-float-abi" || 2947 Name == "vfp2" || Name == "vfp3" || Name == "neon" || Name == "d16" || 2948 Name == "neonfp") { 2949 Features[Name] = Enabled; 2950 } else 2951 return false; 2952 2953 return true; 2954 } 2955 2956 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2957 FPU = NoFPU; 2958 SoftFloat = SoftFloatABI = false; 2959 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2960 if (Features[i] == "+soft-float") 2961 SoftFloat = true; 2962 else if (Features[i] == "+soft-float-abi") 2963 SoftFloatABI = true; 2964 else if (Features[i] == "+vfp2") 2965 FPU = VFP2FPU; 2966 else if (Features[i] == "+vfp3") 2967 FPU = VFP3FPU; 2968 else if (Features[i] == "+neon") 2969 FPU = NeonFPU; 2970 } 2971 2972 // Remove front-end specific options which the backend handles differently. 2973 std::vector<std::string>::iterator it; 2974 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2975 if (it != Features.end()) 2976 Features.erase(it); 2977 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2978 if (it != Features.end()) 2979 Features.erase(it); 2980 } 2981 2982 virtual bool hasFeature(StringRef Feature) const { 2983 return llvm::StringSwitch<bool>(Feature) 2984 .Case("arm", true) 2985 .Case("softfloat", SoftFloat) 2986 .Case("thumb", IsThumb) 2987 .Case("neon", FPU == NeonFPU && !SoftFloat && 2988 StringRef(getCPUDefineSuffix(CPU)).startswith("7")) 2989 .Default(false); 2990 } 2991 static const char *getCPUDefineSuffix(StringRef Name) { 2992 return llvm::StringSwitch<const char*>(Name) 2993 .Cases("arm8", "arm810", "4") 2994 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2995 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2996 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2997 .Case("ep9312", "4T") 2998 .Cases("arm10tdmi", "arm1020t", "5T") 2999 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 3000 .Case("arm926ej-s", "5TEJ") 3001 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 3002 .Cases("xscale", "iwmmxt", "5TE") 3003 .Case("arm1136j-s", "6J") 3004 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 3005 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 3006 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 3007 .Cases("cortex-a8", "cortex-a9", "7A") 3008 .Case("cortex-m3", "7M") 3009 .Case("cortex-m4", "7M") 3010 .Case("cortex-m0", "6M") 3011 .Default(0); 3012 } 3013 virtual bool setCPU(const std::string &Name) { 3014 if (!getCPUDefineSuffix(Name)) 3015 return false; 3016 3017 CPU = Name; 3018 return true; 3019 } 3020 virtual void getTargetDefines(const LangOptions &Opts, 3021 MacroBuilder &Builder) const { 3022 // Target identification. 3023 Builder.defineMacro("__arm"); 3024 Builder.defineMacro("__arm__"); 3025 3026 // Target properties. 3027 Builder.defineMacro("__ARMEL__"); 3028 Builder.defineMacro("__LITTLE_ENDIAN__"); 3029 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3030 3031 StringRef CPUArch = getCPUDefineSuffix(CPU); 3032 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 3033 3034 // Subtarget options. 3035 3036 // FIXME: It's more complicated than this and we don't really support 3037 // interworking. 3038 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 3039 Builder.defineMacro("__THUMB_INTERWORK__"); 3040 3041 if (ABI == "aapcs" || ABI == "aapcs-linux") 3042 Builder.defineMacro("__ARM_EABI__"); 3043 3044 if (SoftFloat) 3045 Builder.defineMacro("__SOFTFP__"); 3046 3047 if (CPU == "xscale") 3048 Builder.defineMacro("__XSCALE__"); 3049 3050 bool IsARMv7 = CPUArch.startswith("7"); 3051 if (IsThumb) { 3052 Builder.defineMacro("__THUMBEL__"); 3053 Builder.defineMacro("__thumb__"); 3054 if (CPUArch == "6T2" || IsARMv7) 3055 Builder.defineMacro("__thumb2__"); 3056 } 3057 3058 // Note, this is always on in gcc, even though it doesn't make sense. 3059 Builder.defineMacro("__APCS_32__"); 3060 3061 if (FPUModeIsVFP((FPUMode) FPU)) 3062 Builder.defineMacro("__VFP_FP__"); 3063 3064 // This only gets set when Neon instructions are actually available, unlike 3065 // the VFP define, hence the soft float and arch check. This is subtly 3066 // different from gcc, we follow the intent which was that it should be set 3067 // when Neon instructions are actually available. 3068 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 3069 Builder.defineMacro("__ARM_NEON__"); 3070 } 3071 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3072 unsigned &NumRecords) const { 3073 Records = BuiltinInfo; 3074 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 3075 } 3076 virtual bool isCLZForZeroUndef() const { return false; } 3077 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3078 return TargetInfo::VoidPtrBuiltinVaList; 3079 } 3080 virtual void getGCCRegNames(const char * const *&Names, 3081 unsigned &NumNames) const; 3082 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3083 unsigned &NumAliases) const; 3084 virtual bool validateAsmConstraint(const char *&Name, 3085 TargetInfo::ConstraintInfo &Info) const { 3086 switch (*Name) { 3087 default: break; 3088 case 'l': // r0-r7 3089 case 'h': // r8-r15 3090 case 'w': // VFP Floating point register single precision 3091 case 'P': // VFP Floating point register double precision 3092 Info.setAllowsRegister(); 3093 return true; 3094 case 'Q': // A memory address that is a single base register. 3095 Info.setAllowsMemory(); 3096 return true; 3097 case 'U': // a memory reference... 3098 switch (Name[1]) { 3099 case 'q': // ...ARMV4 ldrsb 3100 case 'v': // ...VFP load/store (reg+constant offset) 3101 case 'y': // ...iWMMXt load/store 3102 case 't': // address valid for load/store opaque types wider 3103 // than 128-bits 3104 case 'n': // valid address for Neon doubleword vector load/store 3105 case 'm': // valid address for Neon element and structure load/store 3106 case 's': // valid address for non-offset loads/stores of quad-word 3107 // values in four ARM registers 3108 Info.setAllowsMemory(); 3109 Name++; 3110 return true; 3111 } 3112 } 3113 return false; 3114 } 3115 virtual std::string convertConstraint(const char *&Constraint) const { 3116 std::string R; 3117 switch (*Constraint) { 3118 case 'U': // Two-character constraint; add "^" hint for later parsing. 3119 R = std::string("^") + std::string(Constraint, 2); 3120 Constraint++; 3121 break; 3122 case 'p': // 'p' should be translated to 'r' by default. 3123 R = std::string("r"); 3124 break; 3125 default: 3126 return std::string(1, *Constraint); 3127 } 3128 return R; 3129 } 3130 virtual const char *getClobbers() const { 3131 // FIXME: Is this really right? 3132 return ""; 3133 } 3134 }; 3135 3136 const char * const ARMTargetInfo::GCCRegNames[] = { 3137 // Integer registers 3138 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3139 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 3140 3141 // Float registers 3142 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 3143 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 3144 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 3145 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 3146 3147 // Double registers 3148 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 3149 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 3150 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 3151 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 3152 3153 // Quad registers 3154 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 3155 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 3156 }; 3157 3158 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 3159 unsigned &NumNames) const { 3160 Names = GCCRegNames; 3161 NumNames = llvm::array_lengthof(GCCRegNames); 3162 } 3163 3164 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 3165 { { "a1" }, "r0" }, 3166 { { "a2" }, "r1" }, 3167 { { "a3" }, "r2" }, 3168 { { "a4" }, "r3" }, 3169 { { "v1" }, "r4" }, 3170 { { "v2" }, "r5" }, 3171 { { "v3" }, "r6" }, 3172 { { "v4" }, "r7" }, 3173 { { "v5" }, "r8" }, 3174 { { "v6", "rfp" }, "r9" }, 3175 { { "sl" }, "r10" }, 3176 { { "fp" }, "r11" }, 3177 { { "ip" }, "r12" }, 3178 { { "r13" }, "sp" }, 3179 { { "r14" }, "lr" }, 3180 { { "r15" }, "pc" }, 3181 // The S, D and Q registers overlap, but aren't really aliases; we 3182 // don't want to substitute one of these for a different-sized one. 3183 }; 3184 3185 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3186 unsigned &NumAliases) const { 3187 Aliases = GCCRegAliases; 3188 NumAliases = llvm::array_lengthof(GCCRegAliases); 3189 } 3190 3191 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 3192 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3193 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3194 ALL_LANGUAGES }, 3195 #include "clang/Basic/BuiltinsARM.def" 3196 }; 3197 } // end anonymous namespace. 3198 3199 namespace { 3200 class DarwinARMTargetInfo : 3201 public DarwinTargetInfo<ARMTargetInfo> { 3202 protected: 3203 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 3204 MacroBuilder &Builder) const { 3205 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 3206 } 3207 3208 public: 3209 DarwinARMTargetInfo(const std::string& triple) 3210 : DarwinTargetInfo<ARMTargetInfo>(triple) { 3211 HasAlignMac68kSupport = true; 3212 // iOS always has 64-bit atomic instructions. 3213 // FIXME: This should be based off of the target features in ARMTargetInfo. 3214 MaxAtomicInlineWidth = 64; 3215 } 3216 }; 3217 } // end anonymous namespace. 3218 3219 3220 namespace { 3221 // Hexagon abstract base class 3222 class HexagonTargetInfo : public TargetInfo { 3223 static const Builtin::Info BuiltinInfo[]; 3224 static const char * const GCCRegNames[]; 3225 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3226 std::string CPU; 3227 public: 3228 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { 3229 BigEndian = false; 3230 DescriptionString = ("e-p:32:32:32-" 3231 "i64:64:64-i32:32:32-i16:16:16-i1:32:32" 3232 "f64:64:64-f32:32:32-a0:0-n32"); 3233 3234 // {} in inline assembly are packet specifiers, not assembly variant 3235 // specifiers. 3236 NoAsmVariants = true; 3237 } 3238 3239 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3240 unsigned &NumRecords) const { 3241 Records = BuiltinInfo; 3242 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin; 3243 } 3244 3245 virtual bool validateAsmConstraint(const char *&Name, 3246 TargetInfo::ConstraintInfo &Info) const { 3247 return true; 3248 } 3249 3250 virtual void getTargetDefines(const LangOptions &Opts, 3251 MacroBuilder &Builder) const; 3252 3253 virtual bool hasFeature(StringRef Feature) const { 3254 return Feature == "hexagon"; 3255 } 3256 3257 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3258 return TargetInfo::CharPtrBuiltinVaList; 3259 } 3260 virtual void getGCCRegNames(const char * const *&Names, 3261 unsigned &NumNames) const; 3262 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3263 unsigned &NumAliases) const; 3264 virtual const char *getClobbers() const { 3265 return ""; 3266 } 3267 3268 static const char *getHexagonCPUSuffix(StringRef Name) { 3269 return llvm::StringSwitch<const char*>(Name) 3270 .Case("hexagonv2", "2") 3271 .Case("hexagonv3", "3") 3272 .Case("hexagonv4", "4") 3273 .Case("hexagonv5", "5") 3274 .Default(0); 3275 } 3276 3277 virtual bool setCPU(const std::string &Name) { 3278 if (!getHexagonCPUSuffix(Name)) 3279 return false; 3280 3281 CPU = Name; 3282 return true; 3283 } 3284 }; 3285 3286 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, 3287 MacroBuilder &Builder) const { 3288 Builder.defineMacro("qdsp6"); 3289 Builder.defineMacro("__qdsp6", "1"); 3290 Builder.defineMacro("__qdsp6__", "1"); 3291 3292 Builder.defineMacro("hexagon"); 3293 Builder.defineMacro("__hexagon", "1"); 3294 Builder.defineMacro("__hexagon__", "1"); 3295 3296 if(CPU == "hexagonv1") { 3297 Builder.defineMacro("__HEXAGON_V1__"); 3298 Builder.defineMacro("__HEXAGON_ARCH__", "1"); 3299 if(Opts.HexagonQdsp6Compat) { 3300 Builder.defineMacro("__QDSP6_V1__"); 3301 Builder.defineMacro("__QDSP6_ARCH__", "1"); 3302 } 3303 } 3304 else if(CPU == "hexagonv2") { 3305 Builder.defineMacro("__HEXAGON_V2__"); 3306 Builder.defineMacro("__HEXAGON_ARCH__", "2"); 3307 if(Opts.HexagonQdsp6Compat) { 3308 Builder.defineMacro("__QDSP6_V2__"); 3309 Builder.defineMacro("__QDSP6_ARCH__", "2"); 3310 } 3311 } 3312 else if(CPU == "hexagonv3") { 3313 Builder.defineMacro("__HEXAGON_V3__"); 3314 Builder.defineMacro("__HEXAGON_ARCH__", "3"); 3315 if(Opts.HexagonQdsp6Compat) { 3316 Builder.defineMacro("__QDSP6_V3__"); 3317 Builder.defineMacro("__QDSP6_ARCH__", "3"); 3318 } 3319 } 3320 else if(CPU == "hexagonv4") { 3321 Builder.defineMacro("__HEXAGON_V4__"); 3322 Builder.defineMacro("__HEXAGON_ARCH__", "4"); 3323 if(Opts.HexagonQdsp6Compat) { 3324 Builder.defineMacro("__QDSP6_V4__"); 3325 Builder.defineMacro("__QDSP6_ARCH__", "4"); 3326 } 3327 } 3328 else if(CPU == "hexagonv5") { 3329 Builder.defineMacro("__HEXAGON_V5__"); 3330 Builder.defineMacro("__HEXAGON_ARCH__", "5"); 3331 if(Opts.HexagonQdsp6Compat) { 3332 Builder.defineMacro("__QDSP6_V5__"); 3333 Builder.defineMacro("__QDSP6_ARCH__", "5"); 3334 } 3335 } 3336 } 3337 3338 const char * const HexagonTargetInfo::GCCRegNames[] = { 3339 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3340 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3341 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3342 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 3343 "p0", "p1", "p2", "p3", 3344 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp" 3345 }; 3346 3347 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names, 3348 unsigned &NumNames) const { 3349 Names = GCCRegNames; 3350 NumNames = llvm::array_lengthof(GCCRegNames); 3351 } 3352 3353 3354 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = { 3355 { { "sp" }, "r29" }, 3356 { { "fp" }, "r30" }, 3357 { { "lr" }, "r31" }, 3358 }; 3359 3360 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3361 unsigned &NumAliases) const { 3362 Aliases = GCCRegAliases; 3363 NumAliases = llvm::array_lengthof(GCCRegAliases); 3364 } 3365 3366 3367 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = { 3368 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3369 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3370 ALL_LANGUAGES }, 3371 #include "clang/Basic/BuiltinsHexagon.def" 3372 }; 3373 } 3374 3375 3376 namespace { 3377 class SparcV8TargetInfo : public TargetInfo { 3378 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 3379 static const char * const GCCRegNames[]; 3380 bool SoftFloat; 3381 public: 3382 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 3383 // FIXME: Support Sparc quad-precision long double? 3384 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 3385 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3386 } 3387 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3388 StringRef Name, 3389 bool Enabled) const { 3390 if (Name == "soft-float") 3391 Features[Name] = Enabled; 3392 else 3393 return false; 3394 3395 return true; 3396 } 3397 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3398 SoftFloat = false; 3399 for (unsigned i = 0, e = Features.size(); i != e; ++i) 3400 if (Features[i] == "+soft-float") 3401 SoftFloat = true; 3402 } 3403 virtual void getTargetDefines(const LangOptions &Opts, 3404 MacroBuilder &Builder) const { 3405 DefineStd(Builder, "sparc", Opts); 3406 Builder.defineMacro("__sparcv8"); 3407 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3408 3409 if (SoftFloat) 3410 Builder.defineMacro("SOFT_FLOAT", "1"); 3411 } 3412 3413 virtual bool hasFeature(StringRef Feature) const { 3414 return llvm::StringSwitch<bool>(Feature) 3415 .Case("softfloat", SoftFloat) 3416 .Case("sparc", true) 3417 .Default(false); 3418 } 3419 3420 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3421 unsigned &NumRecords) const { 3422 // FIXME: Implement! 3423 } 3424 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3425 return TargetInfo::VoidPtrBuiltinVaList; 3426 } 3427 virtual void getGCCRegNames(const char * const *&Names, 3428 unsigned &NumNames) const; 3429 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3430 unsigned &NumAliases) const; 3431 virtual bool validateAsmConstraint(const char *&Name, 3432 TargetInfo::ConstraintInfo &info) const { 3433 // FIXME: Implement! 3434 return false; 3435 } 3436 virtual const char *getClobbers() const { 3437 // FIXME: Implement! 3438 return ""; 3439 } 3440 }; 3441 3442 const char * const SparcV8TargetInfo::GCCRegNames[] = { 3443 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3444 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 3445 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 3446 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 3447 }; 3448 3449 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 3450 unsigned &NumNames) const { 3451 Names = GCCRegNames; 3452 NumNames = llvm::array_lengthof(GCCRegNames); 3453 } 3454 3455 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 3456 { { "g0" }, "r0" }, 3457 { { "g1" }, "r1" }, 3458 { { "g2" }, "r2" }, 3459 { { "g3" }, "r3" }, 3460 { { "g4" }, "r4" }, 3461 { { "g5" }, "r5" }, 3462 { { "g6" }, "r6" }, 3463 { { "g7" }, "r7" }, 3464 { { "o0" }, "r8" }, 3465 { { "o1" }, "r9" }, 3466 { { "o2" }, "r10" }, 3467 { { "o3" }, "r11" }, 3468 { { "o4" }, "r12" }, 3469 { { "o5" }, "r13" }, 3470 { { "o6", "sp" }, "r14" }, 3471 { { "o7" }, "r15" }, 3472 { { "l0" }, "r16" }, 3473 { { "l1" }, "r17" }, 3474 { { "l2" }, "r18" }, 3475 { { "l3" }, "r19" }, 3476 { { "l4" }, "r20" }, 3477 { { "l5" }, "r21" }, 3478 { { "l6" }, "r22" }, 3479 { { "l7" }, "r23" }, 3480 { { "i0" }, "r24" }, 3481 { { "i1" }, "r25" }, 3482 { { "i2" }, "r26" }, 3483 { { "i3" }, "r27" }, 3484 { { "i4" }, "r28" }, 3485 { { "i5" }, "r29" }, 3486 { { "i6", "fp" }, "r30" }, 3487 { { "i7" }, "r31" }, 3488 }; 3489 3490 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3491 unsigned &NumAliases) const { 3492 Aliases = GCCRegAliases; 3493 NumAliases = llvm::array_lengthof(GCCRegAliases); 3494 } 3495 } // end anonymous namespace. 3496 3497 namespace { 3498 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 3499 public: 3500 AuroraUXSparcV8TargetInfo(const std::string& triple) : 3501 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 3502 SizeType = UnsignedInt; 3503 PtrDiffType = SignedInt; 3504 } 3505 }; 3506 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 3507 public: 3508 SolarisSparcV8TargetInfo(const std::string& triple) : 3509 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 3510 SizeType = UnsignedInt; 3511 PtrDiffType = SignedInt; 3512 } 3513 }; 3514 } // end anonymous namespace. 3515 3516 namespace { 3517 class MSP430TargetInfo : public TargetInfo { 3518 static const char * const GCCRegNames[]; 3519 public: 3520 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 3521 BigEndian = false; 3522 TLSSupported = false; 3523 IntWidth = 16; IntAlign = 16; 3524 LongWidth = 32; LongLongWidth = 64; 3525 LongAlign = LongLongAlign = 16; 3526 PointerWidth = 16; PointerAlign = 16; 3527 SuitableAlign = 16; 3528 SizeType = UnsignedInt; 3529 IntMaxType = SignedLong; 3530 UIntMaxType = UnsignedLong; 3531 IntPtrType = SignedShort; 3532 PtrDiffType = SignedInt; 3533 SigAtomicType = SignedLong; 3534 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 3535 } 3536 virtual void getTargetDefines(const LangOptions &Opts, 3537 MacroBuilder &Builder) const { 3538 Builder.defineMacro("MSP430"); 3539 Builder.defineMacro("__MSP430__"); 3540 // FIXME: defines for different 'flavours' of MCU 3541 } 3542 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3543 unsigned &NumRecords) const { 3544 // FIXME: Implement. 3545 Records = 0; 3546 NumRecords = 0; 3547 } 3548 virtual bool hasFeature(StringRef Feature) const { 3549 return Feature == "msp430"; 3550 } 3551 virtual void getGCCRegNames(const char * const *&Names, 3552 unsigned &NumNames) const; 3553 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3554 unsigned &NumAliases) const { 3555 // No aliases. 3556 Aliases = 0; 3557 NumAliases = 0; 3558 } 3559 virtual bool validateAsmConstraint(const char *&Name, 3560 TargetInfo::ConstraintInfo &info) const { 3561 // No target constraints for now. 3562 return false; 3563 } 3564 virtual const char *getClobbers() const { 3565 // FIXME: Is this really right? 3566 return ""; 3567 } 3568 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3569 // FIXME: implement 3570 return TargetInfo::CharPtrBuiltinVaList; 3571 } 3572 }; 3573 3574 const char * const MSP430TargetInfo::GCCRegNames[] = { 3575 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3576 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3577 }; 3578 3579 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 3580 unsigned &NumNames) const { 3581 Names = GCCRegNames; 3582 NumNames = llvm::array_lengthof(GCCRegNames); 3583 } 3584 } 3585 3586 namespace { 3587 3588 // LLVM and Clang cannot be used directly to output native binaries for 3589 // target, but is used to compile C code to llvm bitcode with correct 3590 // type and alignment information. 3591 // 3592 // TCE uses the llvm bitcode as input and uses it for generating customized 3593 // target processor and program binary. TCE co-design environment is 3594 // publicly available in http://tce.cs.tut.fi 3595 3596 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3597 3, // opencl_global 3598 4, // opencl_local 3599 5, // opencl_constant 3600 0, // cuda_device 3601 0, // cuda_constant 3602 0 // cuda_shared 3603 }; 3604 3605 class TCETargetInfo : public TargetInfo{ 3606 public: 3607 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3608 TLSSupported = false; 3609 IntWidth = 32; 3610 LongWidth = LongLongWidth = 32; 3611 PointerWidth = 32; 3612 IntAlign = 32; 3613 LongAlign = LongLongAlign = 32; 3614 PointerAlign = 32; 3615 SuitableAlign = 32; 3616 SizeType = UnsignedInt; 3617 IntMaxType = SignedLong; 3618 UIntMaxType = UnsignedLong; 3619 IntPtrType = SignedInt; 3620 PtrDiffType = SignedInt; 3621 FloatWidth = 32; 3622 FloatAlign = 32; 3623 DoubleWidth = 32; 3624 DoubleAlign = 32; 3625 LongDoubleWidth = 32; 3626 LongDoubleAlign = 32; 3627 FloatFormat = &llvm::APFloat::IEEEsingle; 3628 DoubleFormat = &llvm::APFloat::IEEEsingle; 3629 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3630 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3631 "i16:16:32-i32:32:32-i64:32:32-" 3632 "f32:32:32-f64:32:32-v64:32:32-" 3633 "v128:32:32-a0:0:32-n32"; 3634 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3635 } 3636 3637 virtual void getTargetDefines(const LangOptions &Opts, 3638 MacroBuilder &Builder) const { 3639 DefineStd(Builder, "tce", Opts); 3640 Builder.defineMacro("__TCE__"); 3641 Builder.defineMacro("__TCE_V1__"); 3642 } 3643 virtual bool hasFeature(StringRef Feature) const { 3644 return Feature == "tce"; 3645 } 3646 3647 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3648 unsigned &NumRecords) const {} 3649 virtual const char *getClobbers() const { 3650 return ""; 3651 } 3652 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3653 return TargetInfo::VoidPtrBuiltinVaList; 3654 } 3655 virtual void getGCCRegNames(const char * const *&Names, 3656 unsigned &NumNames) const {} 3657 virtual bool validateAsmConstraint(const char *&Name, 3658 TargetInfo::ConstraintInfo &info) const { 3659 return true; 3660 } 3661 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3662 unsigned &NumAliases) const {} 3663 }; 3664 } 3665 3666 namespace { 3667 class MipsTargetInfoBase : public TargetInfo { 3668 static const Builtin::Info BuiltinInfo[]; 3669 std::string CPU; 3670 bool IsMips16; 3671 enum MipsFloatABI { 3672 HardFloat, SingleFloat, SoftFloat 3673 } FloatABI; 3674 enum DspRevEnum { 3675 NoDSP, DSP1, DSP2 3676 } DspRev; 3677 3678 protected: 3679 std::string ABI; 3680 3681 public: 3682 MipsTargetInfoBase(const std::string& triple, 3683 const std::string& ABIStr, 3684 const std::string& CPUStr) 3685 : TargetInfo(triple), 3686 CPU(CPUStr), 3687 IsMips16(false), 3688 FloatABI(HardFloat), 3689 DspRev(NoDSP), 3690 ABI(ABIStr) 3691 {} 3692 3693 virtual const char *getABI() const { return ABI.c_str(); } 3694 virtual bool setABI(const std::string &Name) = 0; 3695 virtual bool setCPU(const std::string &Name) { 3696 CPU = Name; 3697 return true; 3698 } 3699 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3700 Features[ABI] = true; 3701 Features[CPU] = true; 3702 } 3703 3704 virtual void getArchDefines(const LangOptions &Opts, 3705 MacroBuilder &Builder) const { 3706 switch (FloatABI) { 3707 case HardFloat: 3708 Builder.defineMacro("__mips_hard_float", Twine(1)); 3709 break; 3710 case SingleFloat: 3711 Builder.defineMacro("__mips_hard_float", Twine(1)); 3712 Builder.defineMacro("__mips_single_float", Twine(1)); 3713 break; 3714 case SoftFloat: 3715 Builder.defineMacro("__mips_soft_float", Twine(1)); 3716 break; 3717 } 3718 3719 if (IsMips16) 3720 Builder.defineMacro("__mips16", Twine(1)); 3721 3722 switch (DspRev) { 3723 default: 3724 break; 3725 case DSP1: 3726 Builder.defineMacro("__mips_dsp_rev", Twine(1)); 3727 Builder.defineMacro("__mips_dsp", Twine(1)); 3728 break; 3729 case DSP2: 3730 Builder.defineMacro("__mips_dsp_rev", Twine(2)); 3731 Builder.defineMacro("__mips_dspr2", Twine(1)); 3732 Builder.defineMacro("__mips_dsp", Twine(1)); 3733 break; 3734 } 3735 3736 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); 3737 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); 3738 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); 3739 } 3740 3741 virtual void getTargetDefines(const LangOptions &Opts, 3742 MacroBuilder &Builder) const = 0; 3743 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3744 unsigned &NumRecords) const { 3745 Records = BuiltinInfo; 3746 NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin; 3747 } 3748 virtual bool hasFeature(StringRef Feature) const { 3749 return Feature == "mips"; 3750 } 3751 virtual BuiltinVaListKind getBuiltinVaListKind() const { 3752 return TargetInfo::VoidPtrBuiltinVaList; 3753 } 3754 virtual void getGCCRegNames(const char * const *&Names, 3755 unsigned &NumNames) const { 3756 static const char * const GCCRegNames[] = { 3757 // CPU register names 3758 // Must match second column of GCCRegAliases 3759 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3760 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3761 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3762 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", 3763 // Floating point register names 3764 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3765 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3766 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3767 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3768 // Hi/lo and condition register names 3769 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3770 "$fcc5","$fcc6","$fcc7" 3771 }; 3772 Names = GCCRegNames; 3773 NumNames = llvm::array_lengthof(GCCRegNames); 3774 } 3775 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3776 unsigned &NumAliases) const = 0; 3777 virtual bool validateAsmConstraint(const char *&Name, 3778 TargetInfo::ConstraintInfo &Info) const { 3779 switch (*Name) { 3780 default: 3781 return false; 3782 3783 case 'r': // CPU registers. 3784 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3785 case 'y': // Equivalent to "r", backwards compatibility only. 3786 case 'f': // floating-point registers. 3787 case 'c': // $25 for indirect jumps 3788 case 'l': // lo register 3789 case 'x': // hilo register pair 3790 Info.setAllowsRegister(); 3791 return true; 3792 } 3793 } 3794 3795 virtual const char *getClobbers() const { 3796 // FIXME: Implement! 3797 return ""; 3798 } 3799 3800 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 3801 StringRef Name, 3802 bool Enabled) const { 3803 if (Name == "soft-float" || Name == "single-float" || 3804 Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" || 3805 Name == "mips32" || Name == "mips32r2" || 3806 Name == "mips64" || Name == "mips64r2" || 3807 Name == "mips16" || Name == "dsp" || Name == "dspr2") { 3808 Features[Name] = Enabled; 3809 return true; 3810 } 3811 return false; 3812 } 3813 3814 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 3815 IsMips16 = false; 3816 FloatABI = HardFloat; 3817 DspRev = NoDSP; 3818 3819 for (std::vector<std::string>::iterator it = Features.begin(), 3820 ie = Features.end(); it != ie; ++it) { 3821 if (*it == "+single-float") 3822 FloatABI = SingleFloat; 3823 else if (*it == "+soft-float") 3824 FloatABI = SoftFloat; 3825 else if (*it == "+mips16") 3826 IsMips16 = true; 3827 else if (*it == "+dsp") 3828 DspRev = std::max(DspRev, DSP1); 3829 else if (*it == "+dspr2") 3830 DspRev = std::max(DspRev, DSP2); 3831 } 3832 3833 // Remove front-end specific option. 3834 std::vector<std::string>::iterator it = 3835 std::find(Features.begin(), Features.end(), "+soft-float"); 3836 if (it != Features.end()) 3837 Features.erase(it); 3838 } 3839 }; 3840 3841 const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = { 3842 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 3843 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 3844 ALL_LANGUAGES }, 3845 #include "clang/Basic/BuiltinsMips.def" 3846 }; 3847 3848 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3849 public: 3850 Mips32TargetInfoBase(const std::string& triple) : 3851 MipsTargetInfoBase(triple, "o32", "mips32") { 3852 SizeType = UnsignedInt; 3853 PtrDiffType = SignedInt; 3854 } 3855 virtual bool setABI(const std::string &Name) { 3856 if ((Name == "o32") || (Name == "eabi")) { 3857 ABI = Name; 3858 return true; 3859 } else 3860 return false; 3861 } 3862 virtual void getArchDefines(const LangOptions &Opts, 3863 MacroBuilder &Builder) const { 3864 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3865 3866 if (ABI == "o32") { 3867 Builder.defineMacro("__mips_o32"); 3868 Builder.defineMacro("_ABIO32", "1"); 3869 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3870 } 3871 else if (ABI == "eabi") 3872 Builder.defineMacro("__mips_eabi"); 3873 else 3874 llvm_unreachable("Invalid ABI for Mips32."); 3875 } 3876 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3877 unsigned &NumAliases) const { 3878 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3879 { { "at" }, "$1" }, 3880 { { "v0" }, "$2" }, 3881 { { "v1" }, "$3" }, 3882 { { "a0" }, "$4" }, 3883 { { "a1" }, "$5" }, 3884 { { "a2" }, "$6" }, 3885 { { "a3" }, "$7" }, 3886 { { "t0" }, "$8" }, 3887 { { "t1" }, "$9" }, 3888 { { "t2" }, "$10" }, 3889 { { "t3" }, "$11" }, 3890 { { "t4" }, "$12" }, 3891 { { "t5" }, "$13" }, 3892 { { "t6" }, "$14" }, 3893 { { "t7" }, "$15" }, 3894 { { "s0" }, "$16" }, 3895 { { "s1" }, "$17" }, 3896 { { "s2" }, "$18" }, 3897 { { "s3" }, "$19" }, 3898 { { "s4" }, "$20" }, 3899 { { "s5" }, "$21" }, 3900 { { "s6" }, "$22" }, 3901 { { "s7" }, "$23" }, 3902 { { "t8" }, "$24" }, 3903 { { "t9" }, "$25" }, 3904 { { "k0" }, "$26" }, 3905 { { "k1" }, "$27" }, 3906 { { "gp" }, "$28" }, 3907 { { "sp","$sp" }, "$29" }, 3908 { { "fp","$fp" }, "$30" }, 3909 { { "ra" }, "$31" } 3910 }; 3911 Aliases = GCCRegAliases; 3912 NumAliases = llvm::array_lengthof(GCCRegAliases); 3913 } 3914 }; 3915 3916 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3917 public: 3918 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3919 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3920 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3921 } 3922 virtual void getTargetDefines(const LangOptions &Opts, 3923 MacroBuilder &Builder) const { 3924 DefineStd(Builder, "mips", Opts); 3925 Builder.defineMacro("_mips"); 3926 DefineStd(Builder, "MIPSEB", Opts); 3927 Builder.defineMacro("_MIPSEB"); 3928 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3929 getArchDefines(Opts, Builder); 3930 } 3931 }; 3932 3933 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3934 public: 3935 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3936 BigEndian = false; 3937 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3938 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3939 } 3940 virtual void getTargetDefines(const LangOptions &Opts, 3941 MacroBuilder &Builder) const { 3942 DefineStd(Builder, "mips", Opts); 3943 Builder.defineMacro("_mips"); 3944 DefineStd(Builder, "MIPSEL", Opts); 3945 Builder.defineMacro("_MIPSEL"); 3946 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3947 getArchDefines(Opts, Builder); 3948 } 3949 }; 3950 3951 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3952 virtual void SetDescriptionString(const std::string &Name) = 0; 3953 public: 3954 Mips64TargetInfoBase(const std::string& triple) : 3955 MipsTargetInfoBase(triple, "n64", "mips64") { 3956 LongWidth = LongAlign = 64; 3957 PointerWidth = PointerAlign = 64; 3958 LongDoubleWidth = LongDoubleAlign = 128; 3959 LongDoubleFormat = &llvm::APFloat::IEEEquad; 3960 SuitableAlign = 128; 3961 } 3962 virtual bool setABI(const std::string &Name) { 3963 SetDescriptionString(Name); 3964 3965 if (Name != "n32" && Name != "n64") 3966 return false; 3967 3968 ABI = Name; 3969 3970 if (Name == "n32") { 3971 LongWidth = LongAlign = 32; 3972 PointerWidth = PointerAlign = 32; 3973 } 3974 3975 return true; 3976 } 3977 virtual void getArchDefines(const LangOptions &Opts, 3978 MacroBuilder &Builder) const { 3979 MipsTargetInfoBase::getArchDefines(Opts, Builder); 3980 3981 if (ABI == "n32") { 3982 Builder.defineMacro("__mips_n32"); 3983 Builder.defineMacro("_ABIN32", "2"); 3984 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3985 } 3986 else if (ABI == "n64") { 3987 Builder.defineMacro("__mips_n64"); 3988 Builder.defineMacro("_ABI64", "3"); 3989 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3990 } 3991 else 3992 llvm_unreachable("Invalid ABI for Mips64."); 3993 } 3994 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3995 unsigned &NumAliases) const { 3996 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3997 { { "at" }, "$1" }, 3998 { { "v0" }, "$2" }, 3999 { { "v1" }, "$3" }, 4000 { { "a0" }, "$4" }, 4001 { { "a1" }, "$5" }, 4002 { { "a2" }, "$6" }, 4003 { { "a3" }, "$7" }, 4004 { { "a4" }, "$8" }, 4005 { { "a5" }, "$9" }, 4006 { { "a6" }, "$10" }, 4007 { { "a7" }, "$11" }, 4008 { { "t0" }, "$12" }, 4009 { { "t1" }, "$13" }, 4010 { { "t2" }, "$14" }, 4011 { { "t3" }, "$15" }, 4012 { { "s0" }, "$16" }, 4013 { { "s1" }, "$17" }, 4014 { { "s2" }, "$18" }, 4015 { { "s3" }, "$19" }, 4016 { { "s4" }, "$20" }, 4017 { { "s5" }, "$21" }, 4018 { { "s6" }, "$22" }, 4019 { { "s7" }, "$23" }, 4020 { { "t8" }, "$24" }, 4021 { { "t9" }, "$25" }, 4022 { { "k0" }, "$26" }, 4023 { { "k1" }, "$27" }, 4024 { { "gp" }, "$28" }, 4025 { { "sp","$sp" }, "$29" }, 4026 { { "fp","$fp" }, "$30" }, 4027 { { "ra" }, "$31" } 4028 }; 4029 Aliases = GCCRegAliases; 4030 NumAliases = llvm::array_lengthof(GCCRegAliases); 4031 } 4032 }; 4033 4034 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 4035 virtual void SetDescriptionString(const std::string &Name) { 4036 // Change DescriptionString only if ABI is n32. 4037 if (Name == "n32") 4038 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 4039 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 4040 "v64:64:64-n32"; 4041 } 4042 public: 4043 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 4044 // Default ABI is n64. 4045 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 4046 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 4047 "v64:64:64-n32"; 4048 } 4049 virtual void getTargetDefines(const LangOptions &Opts, 4050 MacroBuilder &Builder) const { 4051 DefineStd(Builder, "mips", Opts); 4052 Builder.defineMacro("_mips"); 4053 DefineStd(Builder, "MIPSEB", Opts); 4054 Builder.defineMacro("_MIPSEB"); 4055 Builder.defineMacro("__REGISTER_PREFIX__", ""); 4056 getArchDefines(Opts, Builder); 4057 } 4058 }; 4059 4060 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 4061 virtual void SetDescriptionString(const std::string &Name) { 4062 // Change DescriptionString only if ABI is n32. 4063 if (Name == "n32") 4064 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 4065 "i64:64:64-f32:32:32-f64:64:64-f128:128:128" 4066 "-v64:64:64-n32"; 4067 } 4068 public: 4069 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 4070 // Default ABI is n64. 4071 BigEndian = false; 4072 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 4073 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-" 4074 "v64:64:64-n32"; 4075 } 4076 virtual void getTargetDefines(const LangOptions &Opts, 4077 MacroBuilder &Builder) const { 4078 DefineStd(Builder, "mips", Opts); 4079 Builder.defineMacro("_mips"); 4080 DefineStd(Builder, "MIPSEL", Opts); 4081 Builder.defineMacro("_MIPSEL"); 4082 Builder.defineMacro("__REGISTER_PREFIX__", ""); 4083 getArchDefines(Opts, Builder); 4084 } 4085 }; 4086 } // end anonymous namespace. 4087 4088 namespace { 4089 class PNaClTargetInfo : public TargetInfo { 4090 public: 4091 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 4092 BigEndian = false; 4093 this->UserLabelPrefix = ""; 4094 this->LongAlign = 32; 4095 this->LongWidth = 32; 4096 this->PointerAlign = 32; 4097 this->PointerWidth = 32; 4098 this->IntMaxType = TargetInfo::SignedLongLong; 4099 this->UIntMaxType = TargetInfo::UnsignedLongLong; 4100 this->Int64Type = TargetInfo::SignedLongLong; 4101 this->DoubleAlign = 64; 4102 this->LongDoubleWidth = 64; 4103 this->LongDoubleAlign = 64; 4104 this->SizeType = TargetInfo::UnsignedInt; 4105 this->PtrDiffType = TargetInfo::SignedInt; 4106 this->IntPtrType = TargetInfo::SignedInt; 4107 this->RegParmMax = 2; 4108 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 4109 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 4110 } 4111 4112 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 4113 } 4114 virtual void getArchDefines(const LangOptions &Opts, 4115 MacroBuilder &Builder) const { 4116 Builder.defineMacro("__le32__"); 4117 Builder.defineMacro("__pnacl__"); 4118 } 4119 virtual void getTargetDefines(const LangOptions &Opts, 4120 MacroBuilder &Builder) const { 4121 DefineStd(Builder, "unix", Opts); 4122 Builder.defineMacro("__ELF__"); 4123 if (Opts.POSIXThreads) 4124 Builder.defineMacro("_REENTRANT"); 4125 if (Opts.CPlusPlus) 4126 Builder.defineMacro("_GNU_SOURCE"); 4127 4128 Builder.defineMacro("__LITTLE_ENDIAN__"); 4129 Builder.defineMacro("__native_client__"); 4130 getArchDefines(Opts, Builder); 4131 } 4132 virtual bool hasFeature(StringRef Feature) const { 4133 return Feature == "pnacl"; 4134 } 4135 virtual void getTargetBuiltins(const Builtin::Info *&Records, 4136 unsigned &NumRecords) const { 4137 } 4138 virtual BuiltinVaListKind getBuiltinVaListKind() const { 4139 return TargetInfo::PNaClABIBuiltinVaList; 4140 } 4141 virtual void getGCCRegNames(const char * const *&Names, 4142 unsigned &NumNames) const; 4143 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 4144 unsigned &NumAliases) const; 4145 virtual bool validateAsmConstraint(const char *&Name, 4146 TargetInfo::ConstraintInfo &Info) const { 4147 return false; 4148 } 4149 4150 virtual const char *getClobbers() const { 4151 return ""; 4152 } 4153 }; 4154 4155 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 4156 unsigned &NumNames) const { 4157 Names = NULL; 4158 NumNames = 0; 4159 } 4160 4161 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 4162 unsigned &NumAliases) const { 4163 Aliases = NULL; 4164 NumAliases = 0; 4165 } 4166 } // end anonymous namespace. 4167 4168 4169 //===----------------------------------------------------------------------===// 4170 // Driver code 4171 //===----------------------------------------------------------------------===// 4172 4173 static TargetInfo *AllocateTarget(const std::string &T) { 4174 llvm::Triple Triple(T); 4175 llvm::Triple::OSType os = Triple.getOS(); 4176 4177 switch (Triple.getArch()) { 4178 default: 4179 return NULL; 4180 4181 case llvm::Triple::hexagon: 4182 return new HexagonTargetInfo(T); 4183 4184 case llvm::Triple::arm: 4185 case llvm::Triple::thumb: 4186 if (Triple.isOSDarwin()) 4187 return new DarwinARMTargetInfo(T); 4188 4189 switch (os) { 4190 case llvm::Triple::Linux: 4191 return new LinuxTargetInfo<ARMTargetInfo>(T); 4192 case llvm::Triple::FreeBSD: 4193 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 4194 case llvm::Triple::NetBSD: 4195 return new NetBSDTargetInfo<ARMTargetInfo>(T); 4196 case llvm::Triple::OpenBSD: 4197 return new OpenBSDTargetInfo<ARMTargetInfo>(T); 4198 case llvm::Triple::Bitrig: 4199 return new BitrigTargetInfo<ARMTargetInfo>(T); 4200 case llvm::Triple::RTEMS: 4201 return new RTEMSTargetInfo<ARMTargetInfo>(T); 4202 default: 4203 return new ARMTargetInfo(T); 4204 } 4205 4206 case llvm::Triple::msp430: 4207 return new MSP430TargetInfo(T); 4208 4209 case llvm::Triple::mips: 4210 switch (os) { 4211 case llvm::Triple::Linux: 4212 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 4213 case llvm::Triple::RTEMS: 4214 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 4215 case llvm::Triple::FreeBSD: 4216 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 4217 case llvm::Triple::NetBSD: 4218 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 4219 default: 4220 return new Mips32EBTargetInfo(T); 4221 } 4222 4223 case llvm::Triple::mipsel: 4224 switch (os) { 4225 case llvm::Triple::Linux: 4226 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 4227 case llvm::Triple::RTEMS: 4228 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 4229 case llvm::Triple::FreeBSD: 4230 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 4231 case llvm::Triple::NetBSD: 4232 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 4233 default: 4234 return new Mips32ELTargetInfo(T); 4235 } 4236 4237 case llvm::Triple::mips64: 4238 switch (os) { 4239 case llvm::Triple::Linux: 4240 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 4241 case llvm::Triple::RTEMS: 4242 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 4243 case llvm::Triple::FreeBSD: 4244 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 4245 case llvm::Triple::NetBSD: 4246 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 4247 case llvm::Triple::OpenBSD: 4248 return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T); 4249 default: 4250 return new Mips64EBTargetInfo(T); 4251 } 4252 4253 case llvm::Triple::mips64el: 4254 switch (os) { 4255 case llvm::Triple::Linux: 4256 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 4257 case llvm::Triple::RTEMS: 4258 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 4259 case llvm::Triple::FreeBSD: 4260 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 4261 case llvm::Triple::NetBSD: 4262 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 4263 case llvm::Triple::OpenBSD: 4264 return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T); 4265 default: 4266 return new Mips64ELTargetInfo(T); 4267 } 4268 4269 case llvm::Triple::le32: 4270 switch (os) { 4271 case llvm::Triple::NativeClient: 4272 return new PNaClTargetInfo(T); 4273 default: 4274 return NULL; 4275 } 4276 4277 case llvm::Triple::ppc: 4278 if (Triple.isOSDarwin()) 4279 return new DarwinPPC32TargetInfo(T); 4280 switch (os) { 4281 case llvm::Triple::Linux: 4282 return new LinuxTargetInfo<PPC32TargetInfo>(T); 4283 case llvm::Triple::FreeBSD: 4284 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 4285 case llvm::Triple::NetBSD: 4286 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 4287 case llvm::Triple::OpenBSD: 4288 return new OpenBSDTargetInfo<PPC32TargetInfo>(T); 4289 case llvm::Triple::RTEMS: 4290 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 4291 default: 4292 return new PPC32TargetInfo(T); 4293 } 4294 4295 case llvm::Triple::ppc64: 4296 if (Triple.isOSDarwin()) 4297 return new DarwinPPC64TargetInfo(T); 4298 switch (os) { 4299 case llvm::Triple::Linux: 4300 return new LinuxTargetInfo<PPC64TargetInfo>(T); 4301 case llvm::Triple::Lv2: 4302 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 4303 case llvm::Triple::FreeBSD: 4304 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 4305 case llvm::Triple::NetBSD: 4306 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 4307 default: 4308 return new PPC64TargetInfo(T); 4309 } 4310 4311 case llvm::Triple::nvptx: 4312 return new NVPTX32TargetInfo(T); 4313 case llvm::Triple::nvptx64: 4314 return new NVPTX64TargetInfo(T); 4315 4316 case llvm::Triple::mblaze: 4317 return new MBlazeTargetInfo(T); 4318 4319 case llvm::Triple::sparc: 4320 switch (os) { 4321 case llvm::Triple::Linux: 4322 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 4323 case llvm::Triple::AuroraUX: 4324 return new AuroraUXSparcV8TargetInfo(T); 4325 case llvm::Triple::Solaris: 4326 return new SolarisSparcV8TargetInfo(T); 4327 case llvm::Triple::NetBSD: 4328 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 4329 case llvm::Triple::OpenBSD: 4330 return new OpenBSDTargetInfo<SparcV8TargetInfo>(T); 4331 case llvm::Triple::RTEMS: 4332 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 4333 default: 4334 return new SparcV8TargetInfo(T); 4335 } 4336 4337 // FIXME: Need a real SPU target. 4338 case llvm::Triple::cellspu: 4339 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 4340 4341 case llvm::Triple::tce: 4342 return new TCETargetInfo(T); 4343 4344 case llvm::Triple::x86: 4345 if (Triple.isOSDarwin()) 4346 return new DarwinI386TargetInfo(T); 4347 4348 switch (os) { 4349 case llvm::Triple::AuroraUX: 4350 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 4351 case llvm::Triple::Linux: 4352 return new LinuxTargetInfo<X86_32TargetInfo>(T); 4353 case llvm::Triple::DragonFly: 4354 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 4355 case llvm::Triple::NetBSD: 4356 return new NetBSDI386TargetInfo(T); 4357 case llvm::Triple::OpenBSD: 4358 return new OpenBSDI386TargetInfo(T); 4359 case llvm::Triple::Bitrig: 4360 return new BitrigI386TargetInfo(T); 4361 case llvm::Triple::FreeBSD: 4362 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 4363 case llvm::Triple::Minix: 4364 return new MinixTargetInfo<X86_32TargetInfo>(T); 4365 case llvm::Triple::Solaris: 4366 return new SolarisTargetInfo<X86_32TargetInfo>(T); 4367 case llvm::Triple::Cygwin: 4368 return new CygwinX86_32TargetInfo(T); 4369 case llvm::Triple::MinGW32: 4370 return new MinGWX86_32TargetInfo(T); 4371 case llvm::Triple::Win32: 4372 return new VisualStudioWindowsX86_32TargetInfo(T); 4373 case llvm::Triple::Haiku: 4374 return new HaikuX86_32TargetInfo(T); 4375 case llvm::Triple::RTEMS: 4376 return new RTEMSX86_32TargetInfo(T); 4377 default: 4378 return new X86_32TargetInfo(T); 4379 } 4380 4381 case llvm::Triple::x86_64: 4382 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 4383 return new DarwinX86_64TargetInfo(T); 4384 4385 switch (os) { 4386 case llvm::Triple::AuroraUX: 4387 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 4388 case llvm::Triple::Linux: 4389 return new LinuxTargetInfo<X86_64TargetInfo>(T); 4390 case llvm::Triple::DragonFly: 4391 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 4392 case llvm::Triple::NetBSD: 4393 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 4394 case llvm::Triple::OpenBSD: 4395 return new OpenBSDX86_64TargetInfo(T); 4396 case llvm::Triple::Bitrig: 4397 return new BitrigX86_64TargetInfo(T); 4398 case llvm::Triple::FreeBSD: 4399 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 4400 case llvm::Triple::Solaris: 4401 return new SolarisTargetInfo<X86_64TargetInfo>(T); 4402 case llvm::Triple::MinGW32: 4403 return new MinGWX86_64TargetInfo(T); 4404 case llvm::Triple::Win32: // This is what Triple.h supports now. 4405 return new VisualStudioWindowsX86_64TargetInfo(T); 4406 default: 4407 return new X86_64TargetInfo(T); 4408 } 4409 } 4410 } 4411 4412 /// CreateTargetInfo - Return the target info object for the specified target 4413 /// triple. 4414 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 4415 TargetOptions &Opts) { 4416 llvm::Triple Triple(Opts.Triple); 4417 4418 // Construct the target 4419 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 4420 if (!Target) { 4421 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 4422 return 0; 4423 } 4424 4425 // Set the target CPU if specified. 4426 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 4427 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 4428 return 0; 4429 } 4430 4431 // Set the target ABI if specified. 4432 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 4433 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 4434 return 0; 4435 } 4436 4437 // Set the target C++ ABI. 4438 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 4439 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 4440 return 0; 4441 } 4442 4443 // Compute the default target features, we need the target to handle this 4444 // because features may have dependencies on one another. 4445 llvm::StringMap<bool> Features; 4446 Target->getDefaultFeatures(Features); 4447 4448 // Apply the user specified deltas. 4449 // First the enables. 4450 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4451 ie = Opts.Features.end(); it != ie; ++it) { 4452 const char *Name = it->c_str(); 4453 4454 if (Name[0] != '+') 4455 continue; 4456 4457 // Apply the feature via the target. 4458 if (!Target->setFeatureEnabled(Features, Name + 1, true)) { 4459 Diags.Report(diag::err_target_invalid_feature) << Name; 4460 return 0; 4461 } 4462 } 4463 4464 // Then the disables. 4465 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 4466 ie = Opts.Features.end(); it != ie; ++it) { 4467 const char *Name = it->c_str(); 4468 4469 if (Name[0] == '+') 4470 continue; 4471 4472 // Apply the feature via the target. 4473 if (Name[0] != '-' || 4474 !Target->setFeatureEnabled(Features, Name + 1, false)) { 4475 Diags.Report(diag::err_target_invalid_feature) << Name; 4476 return 0; 4477 } 4478 } 4479 4480 // Add the features to the compile options. 4481 // 4482 // FIXME: If we are completely confident that we have the right set, we only 4483 // need to pass the minuses. 4484 Opts.Features.clear(); 4485 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 4486 ie = Features.end(); it != ie; ++it) 4487 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str()); 4488 Target->HandleTargetFeatures(Opts.Features); 4489 4490 return Target.take(); 4491 } 4492